Quanta FM8B DAFM8BMB6F1 Hanks UMA, Studio 1555 Schematic

1

2

3

4

5

6

7

8

VER : 3A

DELL

DELL

*FM8B M/B PCB_NC

*FM8B M/B PCB_NC

A A

FM8B Hanks Intel UMA

PWA: W028J
PWA: D178M
PWB: W026J

Penryn

POWER

AC/BATT
CONNECTOR

PG 54

SYSTEM
RESET CIRCUIT

BATT
CHARGER

RUN POWER SW

+3.3V_SUS/+5V_SUS
+5V/+3.3V/+1.8V

PG 44

PG 46

PG 53

(478 Micro-FCPGA)

PG 3,4

1066 MHz FSB

Cantiga

DDR2-SODIMM1

B B

667/800 MHZ DDR II

1329 uFCBGA

FAN & THERMAL

SMSC1423

PG 39

CLOCK

SLG8SP513V
(QFN-64)

PG 17

LVDS

DP Port

PI3VDP411LSZDE

PG 15,16

DDR2-SODIMM2

PG 15,16

E-SATA Combo
with USB CONN

C C

PG 35

Cantiga

AUDIO/AMP

92HD73C

Audio
SPK conn

D D

667/800 MHZ DDR II

SATA-ODD

PG 36

SATA-HDD

PG 36

PI2EQX3211BHE

PG 35

Camera + D-MIC

PG 40

Audio
Jacks x3

PG 41PG 40

USER
INTERFACE

PG 38

SATA

SATA

SATA

IHDA
USB2.0

PG 41

FLASH
2Mbyts

DMI interface

ICH9-M

676 BGA

LPC

KBC

ITE8512

SPI PS/2

18X8

PG 31

Touchpad

PG 5,6,7,8,9,10

USB2.0 x 3
PCIEx1

PCIEx1
USB2.0

PCIEx2
USB2.0
PCIEx1
USB2.0

PG 11,12,13,14

Keyboard

PG 37

VGA

33MHz PCI

8-in-1 Card Reader

PG 32 PG 37

1

2

3

4

5

POWER

+1.5V_RUN/+1.05V_VCCP

REGULATOR

+1.8V_SUS/+1.25V_RUN
/+0.9V_DDR_VTT

PG 18

USB conn x 3

R5C833

PG 35

6

PG 48

CPU VRREGULATOR

DC/DC

+3.3V_ALW/+5V_ALW/+15V_ALW

PG 49

HDMI

Panel Connector

HDMI CONN.

CRT CONN.

PG 26

PG 18

PG 27

LAN
BCM5784M

PG 42

RJ45/Magnetics

EXPRESS-CARD

R5538

MINI-CARD

WLAN

MINI-CARD

WWAN

MINI-CARD

WPAN

1394

1394 CONN.

Card Reader CONN.

Title

Title

Title

Schematic Block Diagram1

Schematic Block Diagram1

Schematic Block Diagram1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

FM8B 3A

FM8B 3A

FM8B 3A

Date: Sheet of

Date: Sheet of

Date: Sheet of

PG 30

PG 34

PG 33

PG 33

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

7

PG 29

PG 30PG 28

PG 51

PG 52

1 58Thursday, October 09, 2008

1 58Thursday, October 09, 2008

1 58Thursday, October 09, 2008

PG 43

8

1

2

3

4

5

6

7

8

Table of Contents Power States

PAGE DESCRIPTION

1

Schematic Block Diagram

2

Front Page

3-4

Merom

5-10

Crestline
ICH9

A A

B B

C C

11-14
15-16

DDRII SO-DIMM(200P)

17

Clock Generator

18

HDMI

26

LCD Conn. & SSP

27

CRT Conn

36

SATA Conn

28-30

CARD READER/Conn & 1394

30

Express Card & Card reade
Mini Card

33
31

SIO (ITE8512)

32

FLASH/RTC

35

USB

37

TP / KEYBOARD

38

SWITCH /LED

39

FAN & Thermal

40-41

Audio CODEC(ALC888)/Phone Jack
LOM / Switch

42-43

System Reset Circuit

44

Battery Selector & Charger

46

1.05VCCP / 1.5VRUN

48
49

DDR2_1.8VSUS, 0.9V
CPU_ISL6262(2phase)

51

52

MAX8744 (+5.5V,+3,3V)
RUN Power Switch

53

DCIN,Batt

54

PAD& SCREW

55

EMI CAP

56

SMBUS BLOCK

57

Power Block Dianram

58

POWER PLANE

+PWR_SRC
+RTC_CELL
+3.3V_ALW
+5V_ALW2
+15V_ALW
+3.3V_LAN
+5V_SUS
+3.3V_SUS
+1.8V_SUS
+0.9V_DDR_VTT
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+1.05V_VCCP
+VCC_CORE
+LCDVCC
+5V_MOD
+5V_HDD
+PBATT
+SBATT

10V~+19V

+3.0V~+3.3V

+3.3V
+5V
+15V
+3.3V
+5V
+3.3V
+1.8V
+0.9V
+5V
+3.3V
+1.8V
+1.5V
+1.05V

+0.7V~+1.77V

+3.3V
+5V

+5V
+10V~+17V
+10V~+17V

GND PLANE PAGE

8731AGND
AGND_0.9V
AGND_DC/DC
AGND_DC2
AGND_DDR
AGND_ISL6260

GND

46

49

52

48

49

51

ALL

4,26,32,34,46,48,49,51,52

11,14,31,32
3,31,32,34,36,37,38,44,46,49,52,53,54

38,48,49,52,53,54
26,36,37,52,53
42,43
14,36,38,51,53
3,11,12,13,14,26,30,37,38,43,48,49,51,53
6,8,9,15,48,49,53
16,49,53

14,18,27,36,37,39,40,41,53

3,6,8,9,11,13,14,15,16,17,18
26,27,36,37,38,39,40,41,53

35,53
4,9,14,30,33,34,40,48,53
3,4,5,6,8,9,11,14,48
4,51
26
36
36

DESCRIPTION

DESCRIPTION

MAIN POWER
RTC
8051 POWER
LCD/CHARGE POWER
LARGE POWER
LAN POWER
SLP_S5# CTRLD POWER
SLP_S5# CTRLD POWER
SODIMM POWER
SODIMM POWER
SLP_S3# CTRLD POWER
SLP_S3# CTRLD POWER
SDVO POWER
CALISTOGA/ICH8 POWER
CPU/CALISTOGA/ICH8 POWER
CPU CORE POWER
LCD Power
Module Power
HDD Power
MAIN BATTERY
SECOND BATTERY

CONTROL
SIGNAL

ALWON
ALWON
+5V_ALW
AUX_ON
SUS_ON

3.3V_SUS_ON
DDR_ON

0.9V_DDR_VTT_ON
RUN_ON

3.3V_RUN_ON
RUN_ON

1.5V_RUN_ON

1.05V_RUN_ON
IMVP_VR_ON

LCDVCC_TST_EN
& ENVDD

MODC_EN#
HDDC_EN#
CHG_PBATT
CHG_SBATT

ACTIVE INVOLTAGE PAGE

S0~S5
S0~S5
S0~S5
S0~S5
S0~S5

D D

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

COMPUTER

Index & Power Status

Index & Power Status

Index & Power Status

FM8B 3A

FM8B 3A

FM8B 3A

7

2 58Thursday, October 09, 2008

2 58Thursday, October 09, 2008

2 58Thursday, October 09, 2008

8

1

H_A#[3..16]5

A A

H_ADSTB#05
H_REQ#[0..4]5

H_A#[17..35]5

B B

H_ADSTB#15

H_A20M#11

H_FERR#11

H_IGNNE#11
H_STPCLK#11

H_INTR11
H_NMI11
H_SMI#11

C C

H_A#[3..16]

H_REQ#[0..4]

H_A#[17..35]

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

Populate ITP700Flex for bringup

Layout Note:
Place couple 0.1uF Decoupling
caps with in 0.1" ITP connector.

ITP_DBRESET#

ITP_BPM#5
ITP_TDI
ITP_TDO

D D

ITP_TMS

1

R356 150R356 150

R25 54.9/FR25 54.9/F
R19 54.9/FR19 54.9/F
R22 54.9/FR22 54.9/F
R24 54.9/FR24 54.9/F

R21 54.9/FR21 54.9/F

R20 54.9/FR20 54.9/F

2

U26A

U26A

J4

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

Quard Core Only

Quard Core Only

F6

TDI_1/RSV

D3

TDO_2/RSV

N5

BMP_1#[0]/RSV

M4

BMP_1#[1]/RSV

B2

BMP_1#[2]/RSV

AE8

BMP_1#[3]/VSS

D8

DCLKPH_1/VSS

F8

ACLKPH_1/VSS

D22

GTLREF_2/RSV

T2

THRMDA_1/RSV

V3

THRMDC_1/RSV

AA8

HFPLL_1/VSS

AC8

SPARE_1[4]/VSS

AA7

BR1#/VCC

Penryn Ball-out Rev 1a

Penryn Ball-out Rev 1a

ITP_TCK

ITP_TRST#

2

ADDR GROUP 0 ADDR GROUP 1

ADDR GROUP 0 ADDR GROUP 1

+3.3V_SUS

ADS#
BNR#

BPRI#

DEFER#

DRDY#
DBSY#

BR0#

CONTROL XDP/ITP SIGNALS

CONTROL XDP/ITP SIGNALS

IERR#

INIT#

LOCK#

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HIT#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#

PREQ#

TCK
TDO

TMS

TRST#

DBR#

THERMAL

THERMAL

PROCHOT#

THERMDA
THERMDC

ICH

ICH

THERMTRIP#

H CLK

H CLK

BCLK[0]
BCLK[1]

RSVD[06]

+1.05V_VCCP

3

H1
E2
G5

H5
F21
E1

F1
D20

B3
H4
C1

F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6

TDI

AB3
AB5
AB6
C20

D21
A24
B25

C7

A22
A21

D2

R355 56R355 56

H_IERR#

1 2

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_DBRESET#

R72 56R72 56

1 2

H_PROCHOT#
H_THERMDA
H_THERMDC

H_THERM

H_THERM

R3756R37

56

1 2

C408 *2200P_NC

C408 *2200P_NC

H_THERMDA H_THERMDC

3

1 2

50

50

H_ADS# 5
H_BNR# 5
H_BPRI# 5

H_DEFER# 5
H_DRDY# 5
H_DBSY# 5
H_BR0# 5

+1.05V_VCCP

H_INIT# 11
H_LOCK# 5

H_RESET#

H_RS#0 5
H_RS#1 5
H_RS#2 5
H_TRDY# 5

H_HIT# 5
H_HITM# 5

T3PAD T3PAD
T1PAD T1PAD
T2PAD T2PAD
T4PAD T4PAD
T7PAD T7PAD

ITP_DBRESET# 13

+1.05V_VCCP

T9PAD T9PAD

H_THERMDA 39

H_THERMDC 39

+1.05V_VCCP

CLK_CPU_BCLK 17
CLK_CPU_BCLK# 17

T6PAD T6PAD

4

+1.05V_VCCP

12

R26

R26
*51/F_NC

*51/F_NC

Layout Note:
Place voltage
divider within

0.5" of GTLREF
pin

+1.05V_VCCP

Layout Note:
Place R26
close to
CPU.

H_RESET# 5

R371

R371
1K/F

1K/F

1 2
12

R366

R366
2K/F

2K/F

+1.05V_VCCP

+3.3V_ALW

5

H_D#[0..63]5

H_DSTBN#05
H_DSTBP#05
H_DINV#05

H_D#[0..63]5

H_DSTBN#15
H_DSTBP#15
H_DINV#15

R370 *1K/F_NCR370 *1K/F_NC
R369 *1K/F_NCR369 *1K/F_NC

CPU_MCH_BSEL06,17
CPU_MCH_BSEL16,17
CPU_MCH_BSEL26,17

H_D#[0..63] H_D#[0..63]

H_D#[0..63]

12
12

T68PAD T68PAD
T66PAD T66PAD
T64PAD T64PAD
T67PAD T67PAD
T5PAD T5PAD

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

V_CPU_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6
CPU_TEST7

Voltage Level shift

R75

R75
*2.2K_NC

*2.2K_NC

2

H_PROCHOT#

H_THERM

Q47

Q47

MMST3904-7-F

MMST3904-7-F

Q24

Q24

+3.3V_RUN

2

1 2

31

*2N7002W-7-F_NC

*2N7002W-7-F_NC

R378

R378
10M

10M

2

12

C421

C421

0.1U

0.1U

1 3

10

10

CPU_PROCHOT#

31

Q48

Q48
2N7002W-7-F

2N7002W-7-F

H_THERMTRIP# 6,52

ITP disable guidelines

Signal Resistor Value Connect To Resistor Placement

TDI
TMS
TRST#
TCK
TDO

150 ohm +/- 5%
39 ohm +/- 5%
680 ohm +/- 5%
27 ohm +/- 5%
Open

Within 2.0" of the ITPVTT

VTT

Within 2.0" of the ITP

GND

Within 2.0" of the ITP

GND

Within 2.0" of the ITP

VTT

Within 2.0" of the ITP

ITP_EN R268 Depop +3VRUN Close to CK410M Pin8

4

5

6

U26B

U26B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

C3

TEST7

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

Penryn Ball-out Rev 1a

Penryn Ball-out Rev 1a

6

7

H_D#[0..63] 5

H_DSTBN#2 5
H_DSTBP#2 5
H_DINV#2 5

H_D#[0..63] 5

H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#3 5

H_DPRSTP# 6,11,51
H_DPSLP# 11
H_DPWR# 5
H_PWRGOOD 11
H_CPUSLP# 5
H_PSI# 51

BSEL2 BSEL1 BSEL0FSB

DATA GRP 0

DATA GRP 0

DATA GRP 1

DATA GRP 1

MISC

MISC

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#

DATA GRP 2

DATA GRP 2

D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#

D[47]#
DSTBN[2]#
DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

DATA GRP 3

DATA GRP 3

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]#
DSTBN[3]#
DSTBP[3]#

DINV[3]#
COMP[0]

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

H_D#[0..63]

Note:
H_DPRTSTP need to daisy chain
from ICH9 to IMVP6 to CPU.

BCLK

533 0

166

667
800

0

200

0 0 02661066

COMP0
COMP1
COMP2
COMP3

R23

R23

R18

R18

54.9/F

54.9/F

27.4/F

27.4/F

1 2

1 2

Comp0,2 connect with Zo=27.4ohm,Comp1,3
connect with Zo=55ohm, make those traces
length shorter than 0.5".Trace should be
at least 25 mils away from any other
toggling signal.

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

COMPUTER

Merom Processor (HOST BUS)

Merom Processor (HOST BUS)

Merom Processor (HOST BUS)

FM8B 3A

FM8B 3A

FM8B 3A

7

8

0 1133

1

1

00

1

R368

R368

R367

R367

27.4/F

27.4/F

54.9/F

54.9/F

1 2

1 2

3 58Thursday, October 09, 2008

3 58Thursday, October 09, 2008

3 58Thursday, October 09, 2008

8

1

2

3

4

5

6

7

8

+VCC_CORE +VCC_CORE

+VCC_CORE

A A

+VCC_CORE

All use 10U 4V(+-20%,X6S,0805)Pb-Free.

12

12

C20

C20
10U

10U

0805

0805
4

4

C46

C46
10U

10U

0805

0805
4

4

12

12

C24

C24
*10U_NC

*10U_NC

0805

0805
4

4

C51

C51
*10U_NC

*10U_NC

0805

0805
4

4

12

C29

C29
10U

10U

0805

0805
4

4

12

C59

C59
10U

10U

0805

0805
4

4

12

C34

C34
10U

10U

0805

0805
4

4

12

C22

C22
10U

10U

0805

0805
4

4

12

C40

C40
10U

10U

0805

0805
4

4

12

C48

C48
10U

10U

0805

0805
4

4

8 inside cavity, north side, secondary layer.

+VCC_CORE

12

+VCC_CORE

B B

12

C33

C33
10U

10U

0805

0805
4

4

C394

C394
10U

10U

0805

0805
4

4

12

C50

C50
*10U_NC

*10U_NC

0805

0805
4

4

12

C391

C391
*10U_NC

*10U_NC

0805

0805
4

4

12

12

C23

C23
*10U_NC

*10U_NC

0805

0805
4

4

C45

C45
10U

10U

0805

0805
4

4

12

C403

C403
10U

10U

0805

0805
4

4

12

C399

C399
10U

10U

0805

0805
4

4

12

C47

C47
10U

10U

0805

0805
4

4

12

C401

C401
10U

10U

0805

0805
4

4

8 inside cavity, south side, secondary layer.

+VCC_CORE

12

C19

C19
10U

10U

0805

0805
4

4

12

C397

C397
10U

10U

0805

0805
4

4

12

C21

C21
10U

10U

0805

0805
4

4

12

C26

C26
10U

10U

0805

0805
4

4

12

C37

C37
10U

10U

0805

0805
4

4

12

C402

C402
*10U_NC

*10U_NC

0805

0805
4

4

6 inside cavity, north side, primary layer.

+VCC_CORE

C390

C390
10U

10U

0805

0805
4

4

12

C393

C393
*10U_NC

*10U_NC

0805

0805
4

4

C396

C396
10U

10U

0805

0805
4

4

12

12

C400

C400
*10U_NC

*10U_NC

0805

0805
4

4

12

C C

12

C398

C398
10U

10U

0805

0805
4

4

12

C55

C55
10U

10U

0805

0805
4

4

6 inside cavity, south side, primary layer.

+1.05V_VCCP

C28

C28

0.1U

0.1U

10

10

12

12

Layout out:
Place these inside socket cavity on North side secondary.

D D

C60

C60

0.1U

0.1U

10

10

12

C39

C39

0.1U

0.1U

10

10

12

C27

C27

0.1U

0.1U

10

10

12

C57

0.1U

0.1U

10

10

12

C38

C38

0.1U

0.1U

10

10

+PWR_SRC

+

+

C388

C388
*100U_NC

*100U_NC

25

25C57

Layout Note:
Need to add 100uF cap on PWR_SRC for cap singing.
Place on PWR_SRC near +VCC_CORE.

U26C

U26C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

Penryn Ball-out Rev 1a

Penryn Ball-out Rev 1a

AB20

VCC[068]

AB7

VCC[069]

AC7

VCC[070]

AC9

VCC[071]

AC12

VCC[072]

AC13

VCC[073]

AC15

VCC[074]

AC17

VCC[075]

AC18

VCC[076]

AD7

VCC[077]

AD9

VCC[078]

AD10

VCC[079]

AD12

VCC[080]

AD14

VCC[081]

AD15

VCC[082]

AD17

VCC[083]

AD18

VCC[084]

AE9

VCC[085]

AE10

VCC[086]

AE12

VCC[087]

AE13

VCC[088]

AE15

VCC[089]

AE17

VCC[090]

AE18

VCC[091]

AE20

VCC[092]

AF9

VCC[093]

AF10

VCC[094]

AF12

VCC[095]

AF14

VCC[096]

AF15

VCC[097]

AF17

VCC[098]

AF18

VCC[099]

AF20

VCC[100]

G21

VCCP[01]

V6

VCCP[02]

J6

VCCP[03]

K6

VCCP[04]

M6

VCCP[05]

J21

VCCP[06]

K21

VCCP[07]

M21

VCCP[08]

N21

VCCP[09]

N6

VCCP[10]

R21

VCCP[11]

R6

VCCP[12]

T21

VCCP[13]

T6

VCCP[14]

V21

VCCP[15]

W21

VCCP[16]

B26

VCCA[01]

C26

VCCA[02]

AD6

VID[0]

AF5

VID[1]

AE5

VID[2]

AF4

VID[3]

AE3

VID[4]

AF3

VID[5]

AE2

VID[6]

VCCSENSE

VCCSENSE

VSSSENSE

+

+

C392

C392
100U

100U

25

25

AF7

VSSSENSE

AE7

.

.

+1.05V_VCCP

C79

C79

+

+

220uF

220uF
7343

7343

2.5V

2.5V

VID0 51
VID1 51
VID2 51
VID3 51
VID4 51
VID5 51
VID6 51

VCCSENSE 51

VSSSENSE 51

+

+

C389

C389
*100U_NC

*100U_NC

25

25

+1.5V_RUN

12

Layout Note:
Place near PIN B26.

VCCSENSE
VSSSENSE

Route VCCSENSE and VSSSENSE
traces at 27.4ohms and
length matched to within 25
mil. Place PU and PD within
2 inch of CPU.

C409

C409

0.01U

0.01U

25

25

+VCC_CORE

12

12

12

R354

R354
100/F

100/F

R353

R353
100/F

100/F

C419

C419
10U

10U

0805

0805
4

4

U26D

U26D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]
VSS[081]P3VSS[162]

Penryn Ball-out Rev 1a

Penryn Ball-out Rev 1a

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]

VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]

VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]

VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5

AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6

AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4

AE11
AE14
AE16
AE19

.

.

AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

COMPUTER

Merom Processor (POWER)

Merom Processor (POWER)

Merom Processor (POWER)

FM8B 3A

FM8B 3A

FM8B 3A

7

4 58Thursday, October 09, 2008

4 58Thursday, October 09, 2008

4 58Thursday, October 09, 2008

8

1

2

3

4

5

6

7

8

U29A

M11

N12

P13

N10

AD14

Y10
Y12
Y14

AA8

AA13

AA9
AA11
AD11
AD10
AD13
AE12

AE9

AA2

AD8

AA3

AD3

AD7
AE14

AF3

AC1

AE3

AC3
AE11

AE8

AG2
AD6

C12

E11

A11

B11

G8

G2
H6
H2

D4
H3
M9

R2
N9

M5
N2

R1
N5
N6

N8

M3

W2

C5

U29A

F2

H_D#_0
H_D#_1

F8

H_D#_2

E6

H_D#_3
H_D#_4
H_D#_5
H_D#_6

F6

H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11

J1

H_D#_12

J2

H_D#_13
H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17
H_D#_18
H_D#_19

L6

H_D#_20
H_D#_21

J3

H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28

L7

H_D#_29
H_D#_30
H_D#_31

Y3

H_D#_32
H_D#_33

Y6

H_D#_34
H_D#_35
H_D#_36
H_D#_37

Y7

H_D#_38
H_D#_39
H_D#_40

Y9

H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING

E3

H_RCOMP

H_CPURST#
H_CPUSLP#

H_AVREF
H_DVREF

CANTIGA_1p0

CANTIGA_1p0

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#
H_ADSTB#_0
H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

HOST

HOST

4

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK#

H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

J8
L3
Y13
Y1

L10
M7
AA5
AE6

L9
M8
AA6
AE5

B15
K13
F13
B13
B14

B6
F12
C8

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

5

H_A#3

A14

A A

+1.05V_VCCP

12

R93

R93
221/F

221/F

H_SWING

12

R91

R91
100/F

100/F

B B

R88

R88

24.9/F

24.9/F

Layout Note:

1 2

H_RCOMP trace should be
10-mil wide with 20-mil
spacing.

C C

D D

1

1 2

H_RCOMP

C107

C107

0.1U

0.1U

10

10

+1.05V_VCCP

2

H_D#[0..63]3

R392

R392
1K/F

1K/F

1 2

12

R394

R394
2K/F

2K/F

H_D#[0..63]

H_SWING
H_RCOMP

H_RESET#3

H_CPUSLP#3

H_REF

12

C448

C448

0.1U

0.1U

10

10

Layout Note:
Place the 0.1 uF
decoupling capacitor
within 100 mils from
GMCH pins.

3

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_A#[3..35]

H_ADS# 3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR# 3
H_BPRI# 3
H_BR0# 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 17
CLK_MCH_BCLK# 17
H_DPWR# 3
H_DRDY# 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3

H_DINV#0 3
H_DINV#1 3
H_DINV#2 3
H_DINV#3 3

H_DSTBN#0 3
H_DSTBN#1 3
H_DSTBN#2 3
H_DSTBN#3 3

H_DSTBP#0 3
H_DSTBP#1 3
H_DSTBP#2 3
H_DSTBP#3 3

H_REQ#0 3
H_REQ#1 3
H_REQ#2 3
H_REQ#3 3
H_REQ#4 3

H_RS#0 3
H_RS#1 3
H_RS#2 3

H_A#[3..35] 3

6

C178

C178
*0.1U_NC

*0.1U_NC

1 2

10

10

C161

C161
*0.1U_NC

*0.1U_NC

1 2

10

10

+1.05V_VCCP

+1.05V_VCCP

+1.05V_VCCP

C149

C149
*0.1U_NC

*0.1U_NC

1 2

10

10

+1.05V_VCCP

Layout Note:
C149 should be near AB1,AB2,AC2,Y3

C170

C170
*0.1U_NC

*0.1U_NC

1 2

10

10

+1.05V_VCCP

C177

C177
*0.1U_NC

*0.1U_NC

1 2

10

10

C120

C120
*0.1U_NC

*0.1U_NC

1 2

10

10

+1.05V_VCCP+1.05V_VCCP

1 2

C178 should be near AD2,AE2,AG3,AE3

C177 should be near
AC5,AC6,AD7,AC7,AC9,AD9,AD11,AC11,AD12,AD13,AC14

C167 should be near E2,F3,H2,H3,G4,H5,G7,H7

C170 should be near
M6,L7,K9,M7,N8,N9,M10,M11,N12,P13

C161 should be near
H13,J13,L13,M14,L16,K16,J17,H17

C120 should be near
E13,G17,F16,C15,B14,C11,B11,A11,B12

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

COMPUTER

Crestline (HOST)

Crestline (HOST)

Crestline (HOST)

FM8B 3A

FM8B 3A

FM8B 3A

7

C167

C167
*0.1U_NC

*0.1U_NC

10

10

5 58Thursday, October 09, 2008

5 58Thursday, October 09, 2008

5 58Thursday, October 09, 2008

8

5

U29B

0

CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

U29B

M36

RSVD1

N36

RSVD2

R33

RSVD3

T33

RSVD4

AH9

RSVD5

AH10

RSVD6

AH12

RSVD7

AH13

RSVD8

K12

RSVD9

AL34

RSVD10

AK34

RSVD11

AN35

RSVD12

AM35

RSVD13

T24

RSVD14

B31

RSVD15

AJ6

RSVD16

M1

RSVD17

AY21

RSVD20

A47

RSVD21

BG23

RSVD22

BF23

RSVD23

BH18

RSVD24

BF18

RSVD25

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC_1

BF48

NC_2

BD48

NC_3

BC48

NC_4

BH47

NC_5

BG47

NC_6

BE47

NC_7

BH46

NC_8

BF46

NC_9

BG45

NC_10

BH44

NC_11

BH43

NC_12

BH6

NC_13

BH5

NC_14

BG4

NC_15

BH3

NC_16

BF3

NC_17

BH2

NC_18

BG2

NC_19

BE2

NC_20

BG1

NC_21

BF1

NC_22

BD1

NC_23

BC1

NC_24

F1

NC_25

CANTIGA_1p0

CANTIGA_1p0

R374

R374

100

100

THERMTRIP_MCH#

12

PLTRST#_R

NC

NC

RSVD

RSVD

CFG

CFG

PM

PM

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

DDR CONTROL/COMPENSATION

DDR CONTROL/COMPENSATION

SM_PWROK
SM_DRAMRST#
DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLK

CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0

DMI

DMI

DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

GFX_VR_EN

GRAPHICS VID

GRAPHICS VID

CL_PWROK

MEHDA

MEHDA

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

ICH_SYNC#

MISC

MISC

HDA_BCLK
HDA_RST#

HDA_SYNC

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

SM_VREF
SM_REXT

PEG_CLK

CL_CLK

CL_DATA
CL_RST#

CL_VREF

CLKREQ#

HDA_SDI

HDA_SDO

+1.8V_SUS

R136

R136
1K/F

1K/F

12

C182

C182

2.2U

2.2U

0805

0805
10

10

12

C188

C188

2.2U

2.2U

0805

0805
10

10

56

PAD

PAD

PAD

PAD
PAD

PAD

PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD

THERMTRIP_MCH#

T14PAD T14PAD
T25

T25

12

T27PAD T27PAD
T26

T26
T19

T19

12

T24

T24

T22

T22

T23

T23
T21

T21
T15

T15
T13

T13

12

T16

T16
T30

T30

12

12

R412 *0_NCR412 *0_NC

1 2
12

R143

R143

3.01K/F

3.01K/F

R138

R138
1K/F

1K/F

1 2

PM_EXTTS#0
PM_EXTTS#1

PM_EXTTS#0
PM_EXTTS#1

PLTRST#_R
THERMTRIP_MCH#

*0_NC

*0_NC

R373

R373
R3770R377

1 2

5

SM_RCOMP_VOH

12

C172

C172

0.01U

0.01U

25

D D

C C

B B

A A

25

SM_RCOMP_VOL

12

C175

C175

0.01U

0.01U

25

25

+3.3V_RUN

R147 10KR147 10K

1 2

R141 10KR141 10K

1 2

+1.05V_VCCP

R10656R106

1 2

Layout Note:
Location of all MCH_CFG strap
resistors needs to be close to
minmize stub.

CPU_MCH_BSEL03,17
CPU_MCH_BSEL13,17
CPU_MCH_BSEL23,17

R121 *4.02K/F_NCR121 *4.02K/F_NC

R116 *4.02K/F_NCR116 *4.02K/F_NC

R115 *4.02K/F_NCR115 *4.02K/F_NC

+3.3V_RUN

R134 *4.02K/F_NCR134 *4.02K/F_NC
R132 *4.02K/F_NCR132 *4.02K/F_NC

PM_BMBUSY#13

H_DPRSTP#3,11,51
PM_EXTTS#015
PM_EXTTS#115
ICH_PWRGD13,44

DPRSLPVR13,51

SB_NB_PCIE_RST#12

PLTRST#12,30,31,33,34,42

H_THERMTRIP#3,52

TSATN

AP24
AT21
AV24
AU20

AR24
AR21
AU24
AV20

BC28
AY28
AY36
BB36

BA17
AY16
AV16
AR13

BD17
AY17
BF15
AY13

BG22
BH21

BF28
BH28

AV42
AR36
BF17
BC36

B38
A38
E41
F41

F43
E43

AE41
AE37
AE47
AH39

AE40
AE38
AE48
AH40

AE35
AE43
AE46
AH42

AD35
AE44
AF46
AH43

B33
B32
G33
F33
E33

C34

AH37
AH36
AN36
AJ35
AH34

N28
M28
G36
E36
K36
H36

B12

B28
B30
B29
C29
A28

4

SMRCOMPP
SMRCOMPN

SM_RCOMP_VOH
SM_RCOMP_VOL

MCH_CLVREF

4

M_CLK_DDR0 15
M_CLK_DDR1 15
M_CLK_DDR3 15
M_CLK_DDR4 15

M_CLK_DDR#0 15
M_CLK_DDR#1 15
M_CLK_DDR#3 15
M_CLK_DDR#4 15

DDR_CKE0_DIMMA 15,16
DDR_CKE1_DIMMA 15,16
DDR_CKE3_DIMMB 15,16
DDR_CKE4_DIMMB 15,16

DDR_CS0_DIMMA# 15,16
DDR_CS1_DIMMA# 15,16
DDR_CS2_DIMMB# 15,16
DDR_CS3_DIMMB# 15,16

M_ODT0 15,16
M_ODT1 15,16
M_ODT2 15,16
M_ODT3 15,16

V_DDR_MCH_REF_L

R153 0R153 0

1 2

R108 499/FR108 499/F

1 2

T31 PADT31 PAD

MCH_DREFCLK 17
MCH_DREFCLK# 17
DREF_SSCLK 17
DREF_SSCLK# 17

CLK_MCH_3GPLL 17
CLK_MCH_3GPLL# 17

DMI_MRX_ITX_N0 12
DMI_MRX_ITX_N1 12
DMI_MRX_ITX_N2 12
DMI_MRX_ITX_N3 12

DMI_MRX_ITX_P0 12
DMI_MRX_ITX_P1 12
DMI_MRX_ITX_P2 12
DMI_MRX_ITX_P3 12

DMI_MTX_IRX_N0 12
DMI_MTX_IRX_N1 12
DMI_MTX_IRX_N2 12
DMI_MTX_IRX_N3 12

DMI_MTX_IRX_P0 12
DMI_MTX_IRX_P1 12
DMI_MTX_IRX_P2 12
DMI_MTX_IRX_P3 12

T69 PADT69 PAD
T70 PADT70 PAD
T32 PADT32 PAD
T35 PADT35 PAD
T33

T33

PAD

PAD

PAD

PAD

T34

T34

CL_CLK0 13
CL_DATA0 13
ICH_CL_PWROK 13,31

ICH_CL_RST0# 13

T29 PADT29 PAD
T28 PADT28 PAD

SDVO_CTRLCLK 18

SDVO_CTRLDATA 18
CLK_3GPLLREQ# 17
MCH_ICH_SYNC# 13

R396 56R396 56

12

ICH_AZ_HDMI_BITCLK 11
ICH_AZ_HDMI_RST# 11

ICH_AZ_HDMI_SDIN1 11

ICH_AZ_HDMI_SDOUT 11
ICH_AZ_HDMI_SYNC 11

+1.8V_SUS

+1.05V_VCCP

+3.3V_RUN

R164

R164
*1K/F_NC

*1K/F_NC

1 2

R168 0R168 0

1 2

R162

R162
*1K/F_NC

*1K/F_NC

1 2

SMRCOMPP
SMRCOMPN

+1.8V_SUS

R122

R122

80.6/F

80.6/F

R125

R125

80.6/F

80.6/F

Non-iAMT

MCH_CLVREF

C189

C189

0.1U

0.1U

1 2

10

10

R154 10K/F_4R154 10K/F_4
R409 10K/F_4R409 10K/F_4

L_IBG

R173

R173

2.4K/F

2.4K/F

1 2

UMA

V_DDR_MCH_REF

12

12

+1.05V_VCCP

R145

R145
1K/F

1K/F

1 2
12

R155

R155
499/F

499/F

3

U29C

U29C

BIA_PWM26
PANEL_BKEN31

LCD_DDCCLK26
LCD_DDCDAT26

ENVDD26

T71PAD T71PAD

LCD_ACLK-26
LCD_ACLK+26
LCD_BCLK-26
LCD_BCLK+26

LCD_A0-26
LCD_A1-26
LCD_A2-26

LCD_A0+26
LCD_A1+26
LCD_A2+26

LCD_B0-26
LCD_B1-26
LCD_B2-26

LCD_B0+26
LCD_B1+26
LCD_B2+26

R127 75/F_4R127 75/F_4
R123 75/F_4R123 75/F_4
R119 75/F_4R119 75/F_4

VGA_BLU27
VGA_GRN27
VGA_RED27

G_CLK_DDC227
G_DAT_DDC227

VGAHSYNC27
VGAVSYNC27

VGA_BLU
VGA_GRN
VGA_RED

R139 30/FR139 30/F
R149 1K/FR149 1K/F
R142 30/FR142 30/F

R137

R137

R130

R130

150/F

150/F

150/F

150/F

1 2

1 2

1 2
1 2
1 2

1 2

CFG5

CFG9

CFG16

CFG19

CFG20

SDVO_CRTL_DATA

3

L32

G32

L_CTRL_CLK

M32

L_CTRL_DATA

M33

LCD_DDCCLK

K33

LCD_DDCDAT

J33

M29

L_IBG

C44
B43
E37
E38
C41
C40
B37
A37

H47
E46
G40
A40

H48
D45
F40
B40

A41
H38
G37

J37

B42
G38
F37
K37

F25
H25
K25

H24

C31
E32

E28
G28

J28
G29
H32

J32

J29
E29

L29

VGA_BLU
VGA_GRN
VGA_RED

R133

R133

Layout Note:

150/F

150/F

Place 150 ohm
termination resistors
close to GMCH.

DMI X2 Select
PCI Express

Graphic Lane
FSB Dynamic

ODT
DMI Lane

Reversal

SDVO/PCIE
Concurrent
Operation

SDVO Present.

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK

L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA

L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

TVA_DAC
TVB_DAC
TVC_DAC

TV_RTN

TV_DCONSEL_0
TV_DCONSEL_1

CRT_BLUE
CRT_GREEN
CRT_RED
CRT_IRTN
CRT_DDC_CLK

CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

CANTIGA_1p0

CANTIGA_1p0

LVDS

LVDS

TV

TV

UMA

+3.3V_RUN

Low=DMIx2
High=DMIx4(Default)

Low= Reveise Lane
High=Normal operation

Low=Dynamic ODT Disable
High=Dynamic ODT Enable(default).

Low=Normal(default).
High=Lane Reversed

Low=Only SDVO or PCIEx1 is
operational (defaults)
High=SDVO and PCIEx1 are operating
simultaneously via PEG port

Low=No SDVO Device Present
(default)
High=SDVO Device Present

2

PEG_COMPI

PEG_COMPO

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8

PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_RX_10

PEG_RX_11

PEG_RX_12

PEG_RX_13

PEG_RX_14

PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8

PEG_TX#_9
PEG_TX#_10
PEG_TX#_11

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

VGA

VGA

PEG_TX_10

PEG_TX_11

PEG_TX_12

PEG_TX_13

PEG_TX_14

PEG_TX_15

R146 2.2KR146 2.2K
R140 2.2KR140 2.2K

2

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9

12
12

T37
T36

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

UMA_HDMI_HPD18

LCD_DDCCLK
LCD_DDCDAT

VCC3G_PCIE_R

PCIE_MRX_GTX_P3

PCIE_MTX_GRX_C_N0PCIE_MTX_GRX_C_N0
PCIE_MTX_GRX_C_N1PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_N2PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N3PCIE_MTX_GRX_C_N3

PCIE_MTX_GRX_C_P0PCIE_MTX_GRX_C_P0
PCIE_MTX_GRX_C_P1PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_C_P2PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_C_P3PCIE_MTX_GRX_C_P3

UMA

R159 49.9/FR159 49.9/F

1

+VCC_PEG

12

C207 0.1U 10C207 0.1U 10

1 2

C220 0.1U 10C220 0.1U 10

1 2

C224 0.1U 10C224 0.1U 10

1 2

C205 0.1U 10C205 0.1U 10

1 2

C212 0.1U 10C212 0.1U 10

1 2

C214 0.1U 10C214 0.1U 10

1 2

C231 0.1U 10C231 0.1U 10

1 2

C198 0.1U 10C198 0.1U 10

1 2

+3.3V_RUN

R415

R415
20K/F

20K/F

31

2

2N7002W-7-F

2N7002W-7-F
Q50

Q50

R414

R414
100K

100K

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

COMPUTER

Crestline (VGA,DMI)

Crestline (VGA,DMI)

Crestline (VGA,DMI)

FM8B 3A

FM8B 3A

FM8B 3A

R413

R413

7.5K/F

7.5K/F

IN_D2- 18
IN_D1- 18
IN_D0- 18
IN_CLK- 18

IN_D2+ 18
IN_D1+ 18
IN_D0+ 18
IN_CLK+ 18

1

PCIE_MRX_GTX_P3

6 58Thursday, October 09, 2008

6 58Thursday, October 09, 2008

6 58Thursday, October 09, 2008

1

2

3

4

5

6

7

8

DDR_A_D[0..63]15

A A

B B

C C

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AJ38

AJ41
AN38
AM38

AJ36

AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36

AW36

BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12

BB9
BA9

AU10

AV9

BA11

BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6

AT5
AN10
AM11

AM5

AN12
AM13

AJ11
AJ12

AJ9
AJ8

U29D

U29D

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

CANTIGA_1p0

CANTIGA_1p0

DDR_A_BS0

BD21

SA_BS_0
SA_BS_1
SA_BS_2

SA_RAS#
SA_CAS#

SA_WE#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_MA_14

BG18
AT25

BB20
BD20
AY20

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

DDR_A_BS1
DDR_A_BS2

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

DDR_A_BS0 15,16
DDR_A_BS1 15,16
DDR_A_BS2 15,16

DDR_A_RAS# 15,16

DDR_A_WE# 15,16

DDR_A_DM[0..7] 15

DDR_A_DQS[0..7] 15

DDR_A_DQS#[0..7] 15

DDR_A_MA[0..14] 15,16

DDR_B_D[0..63]15

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AK47
AH46
AP47
AP46

AJ46
AJ48

AM48

AP48
AU47
AU46

BA48

AY48

AT47

AR47

BA47

BC47

BC46

BC44

BG43

BF43

BE45

BC41

BF40

BF41

BG38

BF38

BH35

BG35

BH40

BG39

BG34

BH34

BH14

BG12

BH11

BG8
BH12
BF11

BF8
BG7
BC5
BC6

AY3

AY1

BF6

BF5
BA1
BD3
AV2
AU3
AR3
AN2

AY2
AV1
AP3
AR1

AL1

AL2

AJ1
AH1
AM2
AM3
AH3

AJ3

U29E

U29E

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

CANTIGA_1p0

CANTIGA_1p0

DDR_B_BS0

BC16

SB_BS_0
SB_BS_1
SB_BS_2

SB_RAS#
SB_CAS#

SB_WE#

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_MA_14

BB17
BB33

AU17
BG16
BF14

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

DDR_B_BS1
DDR_B_BS2

DDR_B_RAS#

DDR_B_CAS#
DDR_B_WE#

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

DDR_B_BS0 15,16
DDR_B_BS1 15,16
DDR_B_BS2 15,16

DDR_B_RAS# 15,16DDR_A_CAS# 15,16
DDR_B_CAS# 15,16
DDR_B_WE# 15,16

DDR_B_DM[0..7] 15

DDR_B_DQS[0..7] 15

DDR_B_DQS#[0..7] 15

DDR_B_MA[0..14] 15,16

D D

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

COMPUTER

Crestline (DDR2)

Crestline (DDR2)

Crestline (DDR2)

FM8B 3A

FM8B 3A

FM8B 3A

7

7 58Thursday, October 09, 2008

7 58Thursday, October 09, 2008

7 58Thursday, October 09, 2008

8

5

U29G

AP33
AN33
BH32

BG32

BF32
BD32
BC32
BB32
BA32
AY32

AW32

AV32
AU32
AT32
AR32
AP32
AN32
BH31

BG31

BF31

BG30

BH29

BG29

BF29
BD29
BC29
BB29
BA29
AY29

AW29

AV29
AU29
AT29
AR29
AP29

BA36
BB24
BD16

BB21
AW16
AW13

AT13

AE25

AB25

AA25

AE24

AC24

AA24

AE23

AC23

AB23

AA23

AJ21

AG21

AE21

AC21

AA21

AH20

AF20

AE20

AC20

AB20

AA20

AM15

AL15

AE15

AJ15

AH15

AG15

AF15

AB15

AA15

AN14

AM14

AJ14

AH14

Y26

Y24

Y21

T17
T16

Y15
V15
U15

U14
T14

5

U29G

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35

VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42

VCC_AXG_SENSE
VSS_AXG_SENSE

CANTIGA_1p0

CANTIGA_1p0

POWER

POWER

VCC SMVCC GFX

VCC SMVCC GFX

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8

VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC SM LF

VCC SM LF

+1.8V_SUS

D D

C C

+1.05V_VCCP

B B

+1.05V_VCCP

R10310R103
10

1 2

A A

R9710R97
10

1 2

UMA: Places R103, R97 to 10 ohm.
DIS: Please R103, R97 to 0 ohm.

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

AV44
BA37
AM40
AV21
AY5
AM10
BB13

4

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

4

12

C143

0.1U

0.1U

10

10

12

C122

C122

0.1U

0.1U

10

10

Layout Note:
370 mils from edge.

+VCC_AXG_NCTF

12

C141

C141

0.1U

0.1U

10

10

12

C116

C116

0.1U

0.1U

10

10

3

+1.05V_VCCP

C463

C463

+

+

Layout Note:
Inside GMCH cavity for VCC_AXG.

12

12

C136

C136
22U

22U

0805

0805
4

4

C144

C144
10U

10U

0603

0603

6.3

6.3

+1.8V_SUS

12

12

C106

C106

0.22U

0.22U

0603

0603
10

10

C153

C153

0.22U

0.22U

0603

0603
10

10

12

220U

220U

2.5

2.5
7343

7343

12

Layout Note:
Place where LVDS
and DDR2 taps.

C404

C404
22U

22U

0805

0805
4

4

Layout Note:
Inside GMCH cavity.

12

C160

C160

C154

C154

1U

1U

0.47U

0.47U

0603

0603

0603

0603

10

10

10

10

12

C173

C173

0.1U

0.1U

10

10

12

C202

C202

0.47U

0.47U

0603

0603
10

10

3

+3.3V_RUN

12

C193

C193
1U

1U

0603

0603
10

10

12

+

+

C464

C464
*330U_NC

*330U_NC

R120 10R120 10

1 2

C191

C191

0.22U

0.22U

0603

0603
10

10

12

+VCC_GMCH_L

12

C187

C187

0.22U

0.22U

0603

0603
10

10

+

+

C462

C462
*330U_NC

*330U_NCC143

Layout Note:
370 mils from edge.

C490

C490

+

+

220U

220U

7343

7343

2.5

2.5

C208

C208
1U

1U

0603

0603
10

10

2

D14

D14

21

SDMK0340L-7-F

SDMK0340L-7-F

12

C129

C129

0.1U

0.1U

10

10

+1.05V_VCCP

VCC_SM

12

12

Layout Note:
Place on the edge.

C183

C183
22U

22U

0805

0805
4

4

2

C184

C184
22U

22U

0805

0805
4

4

1

U29F

U29F

AG34

VCC_1

AC34

VCC_2

AB34

VCC_3

AA34

VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7

AM33

VCC_8

AK33

VCC_9

AJ33

VCC_10

AG33

VCC_11

AF33

VCC_12

AE33

VCC_13

AC33

VCC_14

AA33

VCC_15

Y33

VCC_16

W33

VCC_17

V33

VCC_18

U33

VCC_19

AH28

VCC_20

AF28

VCC_21

AC28

VCC_22

AA28

VCC_23

AJ26

VCC_24

AG26

VCC_25

AE26

VCC_26

AC26

VCC_27

AH25

VCC_28

AG25

VCC_29

AF25

VCC_30

AG24

VCC_31

AJ23

VCC_32

AH23

VCC_33

AF23

VCC_34

T32

VCC_35

CANTIGA_1p0

CANTIGA_1p0

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

VCC CORE

VCC CORE

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5

POWER

POWER

VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8

VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31

VCC NCTF

VCC NCTF

VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Crestline (VCC,NCTF)

Crestline (VCC,NCTF)

Crestline (VCC,NCTF)

FM8B 3A

FM8B 3A

FM8B 3A

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

8 58Thursday, October 09, 2008

8 58Thursday, October 09, 2008

8 58Thursday, October 09, 2008

1

+1.05V_VCCP

5

FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC

L55 BLM18PG181SN1D

+3.3V_RUN

D D

Non-iAMT

+1.05V_VCCP

L48 BLM11A05S

L48 BLM11A05S

L17 BLM11A05S

L17 BLM11A05S

+VCCA_MPLL_L

12

C C

+1.05V_VCCP

B B

L55 BLM18PG181SN1D

0603

0603

R405 0R405 0

1 2

45mA MAx.

FB_120ohm+-25%_100mHz
_200mA_0.2ohm DC

0603

0603

0.5/F

0.5/F

+VCCA_HPLL

12

C412

C412
22U

22U

1206

1206
10

10

+VCCA_MPLL

L59

L59

0603

0603

0603

0603

R375

R375

1 2

C411

C411
22U

22U

1206

1206
10

10

FB_220ohm+-25%_100MHz
_2A_0.1ohm DC

+VCCA_CRTDAC

12

12

C420

C420

0.1U

0.1U

10

10

12

C102

C102

0.1U

0.1U

10

10

BLM21P221SGPT

BLM21P221SGPT

0805

0805

C481

C481

0.01U

0.01U

25

25

+VCCA_DAC_BG

C477

C477

0.1U

0.1U

10

10

+1.05V_VCCP

+VCCA_PEG_PLL

12

R429

R429
1/F

1/F

0603

0603

12

C518

C518
10U

10U

0603

0603

6.3

6.3

12

C480

C480

0.1U

0.1U

10

10

C478

C478

0.01U

0.01U

25

25

+1.05V_VCCP

L57 10uH

L57 10uH

L61 10uH

L61 10uH

0.1Caps should be
placed 200 mils
with in its pins.

+1.05V_VCCP

+1.5V_RUN

40mA MAx.

10uH+-20%_100mA

12

0805

0805

12

0805

0805

12

C405

C405

+

+

*100U_NC

*100U_NC

7343

7343

6.3

6.3

L23

L23
1uH/300mA

1uH/300mA

R4070R407
0

1 2

+VCCHDA

12

C484

C484

0.1U

0.1U

10

10

FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC

L54

+3.3V_RUN

+1.5V_RUN

A A

BLM18PG181SN1D

BLM18PG181SN1D

L54
BLM18PG181SN1D

BLM18PG181SN1D

0603

0603

R408 0R408 0

1 2

L56

L56

603

603

+VCC_TVDACA

C472

C472

0.01U

0.01U

25

25

12

C485

C485

0.1U

0.1U

10

10

12

C489

C489

0.1U

0.1U

10

10

5

+VCCD_TVDAC

C166

C166

0.01U

0.01U

25

25

+VCCD_QDAC

C174

C174

0.01U

0.01U

25

25

12

C471

C471

0.1U

0.1U

10

10

+1.05V_VCCP

FB_220ohm+-25%_100MHz
_2A_0.1ohm DC

+VCCA_DPLLA

12

C499

C499
220U

220U

+

+

7343

7343

2.5

2.5

+VCCA_DPLLB

12

C510

C510
220U

220U

+

+

7343

7343

2.5

2.5

1 2

12

12

C168

C168
22U

22U

0805

0805
4

4

4

C135

C135

4.7U

4.7U

0603

0603

6.3

6.3

+1.8V_SUS

L60

L60

4

12

C222

C222

0.1U

0.1U

10

10

12

C503

C503

0.1U

0.1U

10

10

12

C87

C87
22U

22U

0805

0805
4

4

12

C162

C162
1U

1U

0603

0603
10

10

BLM21P221SGPT

BLM21P221SGPT

0805

0805

+1.5V_RUN

12

12

12

C418 0.1U 10C418 0.1U 10

C504 0.1U 10C504 0.1U 10

1 2

R175 0R175 0

+VCCD_PEG_PLL

12

R430

R430
1/F

1/F

0603

0603

12

C517

C517
10U

10U

0603

0603

6.3

6.3

C241

C241
1000P 50

1000P 50

C509

C509

0.1U

0.1U

10

10

C94

C94
22U

22U

0805

0805
4

4

C169

C169
1U

1U

0603

0603
10

10

12
12

+VCCD_LVDS

12

C210

C210
1U

1U

0603

0603
10

10

+VCCA_CRTDAC

+VCCA_DAC_BG

+VCCA_DPLLA
+VCCA_DPLLB
+VCCA_HPLL
+VCCA_MPLL

+VCC_TX_LVDS

12

+VCCA_PEG_PLL

+VCCA_SM

12

12

+VCC_TVDACA

+VCCHDA

+VCCD_TVDAC
+VCCD_QDAC
+VCCA_MPLL
+VCCD_PEG_PLL

C134

C134
1U

1U

0603

0603
10

10

+VCCA_SM_CK

C164

C164

0.1U

0.1U

10

10

12

C192

C192
*10U_NC

*10U_NC

0603

0603

6.3

6.3

+VTTLF1
+VTTLF2
+VTTLF3

12

B27
A26

A25
B25

F47

L48
AD1
AE1

AD48

AA48

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23

B24

A24

A32

M25

L28
AF1

AA47

M38

L37

C110

C110

0.47U

0.47U

0603

0603
10

10

J48
J47

U29H

U29H

CANTIGA_1p0

CANTIGA_1p0

3

VCCA_CRT_DAC_1
VCCA_CRT_DAC_2

VCCA_DAC_BG
VSSA_DAC_BG

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

VCCA_LVDS
VSSA_LVDS

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9

VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_SM_CK_3
VCCA_SM_CK_4
VCCA_SM_CK_5
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8

VCCA_TV_DAC_1
VCCA_TV_DAC_2

VCC_HDA

VCCD_TVDAC
VCCD_QDAC
VCCD_HPLL
VCCD_PEG_PLL

VCCD_LVDS_1
VCCD_LVDS_2

12

C105

C105

0.47U

0.47U

0603

0603
10

10

3

CRTPLLA PEGA SM

CRTPLLA PEGA SM

A LVDS

A LVDS

POWER

POWER

A CK

A CK

TV

TV

HDA

HDA

D TV/CRT

D TV/CRT

LVDS

LVDS

12

C115

C115

0.47U

0.47U

0603

0603
10

10

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

AXF

AXF

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

SM CK

SM CK

VCC_TX_LVDS

HV

HV

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4

PEG

PEG

VCC_PEG_5

VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4

DMI

DMI

VTTLF

VTTLF

+3.3V_VCC_HV

R410 0R410 0

12

C491

C491

0.1U/10V

0.1U/10V

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14

VTT

VTT

VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

VCC_HV_1
VCC_HV_2
VCC_HV_3

VTTLF1
VTTLF2
VTTLF3

1 2

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

B22
B21
A21

BF21
BH20
BG20
BF20

K47
C35

B35
A35

V48
U48
V47
U47
U46

AH48
AF48
AH47
AG47

A8
L1
AB2

2

+VCC_AXF

+VCC_SM_CK

+VCC_TX_LVDS

+3.3V_VCC_HV

+VCC_RXR_DMI

+VTTLF1
+VTTLF2
+VTTLF3

+1.05V_VCCP

21

R40110R401
10

1 2

2

12

C138

C138

2.2U

2.2U

0603

0603

6.3

6.3

Close to VTT

D31

D31
SDM10K45-7-F

SDM10K45-7-F

+3.3V_RUN

1

+1.05V_VCCP

12

C417

12

12

C148

C148

0.47U

0.47U

6.3

6.3

12

C124

C124

4.7U

4.7U

0603

0603

6.3

6.3

C121

C121

4.7U

4.7U

0603

0603

6.3

6.3

C417

+

+

220U

220U

7343

7343

2.5

2.5

Place on the edge.

VCC_HV

D15

D15
*SDMK0340L-7-F_NC

*SDMK0340L-7-F_NC

805L22

805

+1.05V_VCCP

+1.8V_SUS

+1.8V_SUS

+1.05V_VCCP

1

12

C130

C130
1U

1U

0603

0603
10

10

12

C147

C147

0.1U

0.1U

10

10

C236

C236

12

1000P

1000P

50

50

+VCC_PEG

12

C248

C248
220U

220U

+

+

7343

7343

2.5

2.5

12

C508

C508
10U

10U

0603

0603

6.3

6.3

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Reserved L21 pad for

12

inductor.

C145

C145
10U

10U

0603

0603

6.3

6.3

12

R112

R112
1/F

1/F

0603

0603

+VCC_SM_CK_L

12

C131

C131
10U

10U

0603

0603

6.3

6.3

12

C250

C250
*220U_NC

*220U_NC

+

+

7343

7343
4

4

12

C507

C507
22U

22U

1206

1206
10

10

L58

L58
91nH/1.5A

91nH/1.5A

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Crestline (POWER)

Crestline (POWER)

Crestline (POWER)

FM8B 3A

FM8B 3A

FM8B 3A

L22
1uH/300MA

1uH/300MA

L26

L26

1uH/300MA

1uH/300MA

805

805

R431 0 1206R431 0 1206

1 2

12

C511

C511

4.7U

4.7U

0603

0603

6.3

6.3

12

+1.05V_VCCP

+1.05V_VCCP

+3.3V_RUN

9 58Thursday, October 09, 2008

9 58Thursday, October 09, 2008

9 58Thursday, October 09, 2008

21

+VCC_HV_L

12

R126

R126
*10_NC

*10_NC

5

U29I

U29I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

VSS_8

AD47

VSS_9

D D

C C

B B

A A

5

AB47

BD46
BA46
AY46
AV46
AR46

AM46

BF44
AH44
AD44
AA44

BC43
AV43
AU43

AM43

BG42

AY42
AT42
AN42

AJ42

AE42

BD41
AU41

AM41

AH41
AD41
AA41

BG40

BB40
AV40
AN40

AT39

AM39

AJ39

AE39

BH38
BC38
BA38
AU38
AH38
AD38
AA38

BF37
BB37

AW37

AT37
AN37

AJ37

BG36

BD36
AK15
AU36

G47

V46
R46
P46
H46

U44
M44

C43

N42

U41
M41

G41
B41

H40
E40

N39
B39

U38

C38

H37
C37

Y47
T47
N47
L47

F46

Y44
T44
F44

J43

L42

Y41
T41

L39

Y38
T38

J38
F38

VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

CANTIGA_1p0

CANTIGA_1p0

VSS

VSS

4

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198

4

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23

3

U29J

U29J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

R17
M17
H17

C17
BA16
AU16

AN16

N16

K16

G16

E16
BG15
AC15

W15

A15
BG14
AA14

C14
BG13
BC13
BA13

AN13

AJ13

AE13

N13

L13
G13
E13

BF12
AV12
AT12
AM12
AA12

J12
A12

BD11
BB11
AY11
AN11
AH11

Y11
N11
G11
C11

BG10
AV10
AT10

AJ10
AE10
AA10

M10

BF9
BC9
AN9
AM9

AD9

G9

B9
BH8
BB8
AV8
AT8

3

VSS_230
VSS_231
VSS_232
VSS_233

VSS_235
VSS_237

VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252

VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273

VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296

CANTIGA_1p0

CANTIGA_1p0

VSS

VSS

VSS NCTF

VSS NCTF

VSS SCB

VSS SCB

NC

NC

VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325

VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350

VSS_351
VSS_352
VSS_353
VSS_354

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8

VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16

VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5
VSS_SCB_6

NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

U24
U28
U25
U29

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48
BH1
A48
C1
B2
A3

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

2

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

COMPUTER

Crestline (VSS)

Crestline (VSS)

Crestline (VSS)

FM8B 3A

FM8B 3A

FM8B 3A

1

10 58Thursday, October 09, 2008

10 58Thursday, October 09, 2008

10 58Thursday, October 09, 2008

1

1

2

3

4

5

6

7

8

+RTC_CELL +RTC_CELL

12

R271

R271
332K/F

332K/F

ICH_INTVRMEN ICH_LAN100_SLP

12

R272

R272
*0_NC

*0_NC

ICH9M LAN100 SLP Strap

Low = Internal VR Disabled
High = Internal VR Enabled(Default)

U21A

U21A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GLAN_DOCK#/GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9M REV 1.0

ICH9M REV 1.0

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

IHDA

IHDA

SATA

SATA

(Internal VR for VccLAN1.05 and VccCL1.05)

ICH_LAN100_SLP

LDRQ0#

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

IGNNE#

INIT#
INTR

RCIN#

NMI

SMI#

STPCLK#

TP9

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

K5

K4

L6

K2

K3

J3

J1

N7

AJ27

AJ25

AE23

AJ26

AD22

AF25

AE22

AG25

L3

AF23

AF24

AH27

AG26

AG27

AH11

AJ11

AG12

AF12

AH9

AJ9

AE10

AF10

AH18

AJ18

AJ7

AH7

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ1#/GPIO23

CPUPWRGD

THRMTRIP#

SATA_CLKN
SATA_CLKP

SATARBIAS#

SATARBIAS

Low = Internal VR Disabled
High = Internal VR Enabled(Default)

SIO_A20GATE

H_DPRSTP#
H_DPSLP#

H_FERR#_L

SIO_RCIN#

THERMTRIP#_ICH

SATA_TX5-_C
SATA_TX5+_C

SATABIAS

12

R270

R270
332K/F

332K/F

12

R269

R269
*0_NC

*0_NC

R460 56R460 56

R29624.9/F R29624.9/F

1 2

LPC_LAD0 31,33
LPC_LAD1 31,33
LPC_LAD2 31,33
LPC_LAD3 31,33

LPC_LFRAME# 31,33

T121PAD T121PAD
T63PAD T63PAD

SIO_A20GATE 31
H_A20M# 3

H_DPRSTP# 3,6,51
H_DPSLP# 3

H_FERR#

12

H_PWRGOOD 3
H_IGNNE# 3

H_INIT# 3
H_INTR 3

SIO_RCIN# 31

H_NMI 3
H_SMI# 3

H_STPCLK# 3

T74PAD T74PAD

T102PAD T102PAD
T105PAD T105PAD

SATA_RX5- 35
SATA_RX5+ 35

CLK_PCIE_SATA# 17
CLK_PCIE_SATA 17

Place within 500mils
of ICH9 ball

H_FERR# 3

E-SATA

1 2

H_DPRSTP#
H_DPSLP#
H_FERR#

SIO_A20GATE
SIO_RCIN#

THERMTRIP#_ICH

R464

R464
*56_NC

*56_NC

+1.05V_VCCP

R473

R473
*56_NC

*56_NC

1 2

R499

R499

8.2K

8.2K

1 2

+1.05V_VCCP

1 2

+3.3V_RUN

1 2

1 2

R45956R459
56

R323

R323
10K

10K

R46256R462
56

1 4
2 3

+RTC_CELL

12

R4681MR468
1M

R461 10MR461 10M

12

W1

W1

32.768KHZ

32.768KHZ

R263

R263

R477

R477

20K

20K

20K

20K

1 2

1 2

12

12

C560

C560

C309

C309

1U/10V

1U/10V

1U/10V

1U/10V

C574 0.01U/16VC574 0.01U/16V
C567 0.01U/16VC567 0.01U/16V

C582 0.01U/16VC582 0.01U/16V
C575 0.01U/16VC575 0.01U/16V

C563 0.01U/16VC563 0.01U/16V
C572 0.01U/16VC572 0.01U/16V

ICH_RTCX2ICH_RTCX1

ICH_RTCRST#
ICH_SRTCRST#
ICH_INTRUDER#

SATA_TX0-_C
SATA_TX0+_C

SATA_TX1-_C
SATA_TX1+_C

SATA_TX5-_C
SATA_TX5+_C

C546

C546
15P

15P

50V

50V

R509 33R509 33

1 2

R510 33R510 33

1 2

C596

C596
*27P/50V_NC

*27P/50V_NC

1 2

R523 33R523 33

1 2

R524 33R524 33

1 2

R504 33R504 33

1 2

R507 33R507 33

1 2

R515 33R515 33

1 2

R518 33R518 33

1 2

ACZ_BIT_CLK

ACZ_SYNC
ACZ_RST#
ACZ_SDOUT

Master HDD

Reserved for
Intel Nineveh
design.

SATA ODD

+3.3V_SUS

+1.5V_PCIE_ICH

ICH_AZ_CODEC_SDIN040
ICH_AZ_HDMI_SDIN16

+3.3V_SUS

T108

T108

T79 PADT79 PAD

T99 PADT99 PAD
T100 PADT100 PAD
T104 PADT104 PAD
T98 PADT98 PAD
T103 PADT103 PAD
T101 PADT101 PAD

R494 *10K_NCR494 *10K_NC

R457 24.9/FR457 24.9/F

1 2

PAD

PAD

T120

T120

PAD

PAD

T116

T116

R514 *10K_NCR514 *10K_NC
R508 *10K_NCR508 *10K_NC

PAD

PAD

SATA_RX0-36
SATA_RX0+36

SATA_RX1-36
SATA_RX1+36

ICH9M Internal VR Enable Strap
(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)

ICH_INTVRMEN

ICH_RTCX1
ICH_RTCX2

ICH_RTCRST#
ICH_SRTCRST#
ICH_INTRUDER#

ICH_INTVRMEN
ICH_LAN100_SLP

GLAN_CLK

LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

12

GLAN_COMP
ACZ_BIT_CLK

ACZ_SYNC
ACZ_RST#

ACZ_SDOUT

12
12

SATA_ACT#

SATA_TX0-_C
SATA_TX0+_C

SATA_TX1-_C
SATA_TX1+_C

32.768KHZ

C542

C542

A A

15P

15P

50V

50V

B B

C C

ICH_AZ_HDMI_BITCLK6
ICH_AZ_CODEC_BITCLK40

ICH_AZ_HDMI_SYNC6
ICH_AZ_CODEC_SYNC40
ICH_AZ_HDMI_RST#6
ICH_AZ_CODEC_RST#31,40
ICH_AZ_HDMI_SDOUT6
ICH_AZ_CODEC_SDOUT40

Place all series terms close to ICH9 except for SDIN input
lines,which should be close to source.Placement of R523, R524,
R509 & R510 should equal distance to the T split trace point as
R504 & R507 , R515 & R516 respective. Basically,keep the same
distance from T for all series termination resistors.

SATA_TX0-36
SATA_TX0+36

SATA_TX1-36
SATA_TX1+36

SATA_TX5-35
SATA_TX5+35

+3.3V_RUN

R519

1 2

1 2

R519
*1K_NC

*1K_NC

R274

R274
*1K_NC

*1K_NC

ACZ_SDOUT

ICH_RSVD 13

6

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

COMPUTER

ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN)

ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN)

ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN)

FM8B 3A

FM8B 3A

FM8B 3A

7

11 58Thursday, October 09, 2008

11 58Thursday, October 09, 2008

11 58Thursday, October 09, 2008

8

XOR Chain Entrance Strap

ICH RSVD

D D

1

2

3

HDA SDOUT

0
0
1
1

4

Description

0

RSVD

1

Enter XOR Chain

0

Normal Operation (Default)

1

Set PCIE port config bit 1

5

1

Place TX DC blocking caps close ICH8.

C540 0.1U 10C540 0.1U 10

PCIE_TX1-33
PCIE_TX1+33

PCIE_TX2-34
PCIE_TX2+34

PCIE_TX3-33

PCIE_TX6-/GLAN_TX-42
PCIE_TX6+/GLAN_TX+42

ICH_SPI_CS1#_R
PCI_GNT0#

R438

R438

1 2

SPI__HOLD#

PCIE_TX3+33

PCIE_TX4-30
PCIE_TX4+30

R513

R513
*1K_NC

*1K_NC

1 2

+3.3V_RUN

1 2

12

C522

C522
*0.1U_NC

*0.1U_NC

10

10

8

VDD

7

HOLD#

4

VSS

*W25X40VSSIG_NC

*W25X40VSSIG_NC

A A

B B

*10K/F_NC

*10K/F_NC

1 2

C531 0.1U 10C531 0.1U 10

1 2

C532 0.1U 10C532 0.1U 10

1 2

C533 0.1U 10C533 0.1U 10

1 2

C534 0.1U 10C534 0.1U 10

1 2

C535 0.1U 10C535 0.1U 10

1 2

C536 0.1U 10C536 0.1U 10

1 2

C537 0.1U 10C537 0.1U 10

1 2

C538 0.1U 10C538 0.1U 10

1 2

C539 0.1U 10C539 0.1U 10

1 2

R469

R469
*1K_NC

*1K_NC

SPI1001

1 2

U33

U33

R439 *22_NCR439 *22_NC

1

CE#

R441 *22_NCR441 *22_NC

6

SCK

R445 *22_NCR445 *22_NC

5

SI

R443 *22_NCR443 *22_NC

2

SO

SPI_WP#

3

WP#

WWAN Noise - ICH improvements

OC6#
OC4#
OC5#
OC7#
OC8#
USB_OC2#
USB_OC0_1#
OC9#

C C

D D

C614 *0.1U_NC 10C614 *0.1U_NC 10
C360 *0.1U_NC 10C360 *0.1U_NC 10
C362 *0.1U_NC 10C362 *0.1U_NC 10
C359 *0.1U_NC 10C359 *0.1U_NC 10
C361 *0.1U_NC 10C361 *0.1U_NC 10
C603 *0.1U_NC 10C603 *0.1U_NC 10
C613 *0.1U_NC 10C613 *0.1U_NC 10
C616 *0.1U_NC 10C616 *0.1U_NC 10

PCI_AD[0..31]28

T128 PADT128 PAD

PCI_PIRQB#28

T117 PADT117 PAD

1

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

2

Boot BIOS Strap

GNT0# SPI_CS1#

11LPC

No stuff
No stuff
Stuff

SPI_CLK_R

C523

C523
*0.1U_NC

*0.1U_NC

10

10

SPI_CS#0_R
SPI_CLK_R
SPI_MOSI
SPI_MISO

U21B

U21B

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

Interrupt I/F

Interrupt I/F

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

ICH9M REV 1.0

ICH9M REV 1.0

2

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN3_C
PCIE_TXP3_C

PCIE_TXN4_C
PCIE_TXP4_C

GLAN_TXN_C
GLAN_TXP_C

No stuff
StuffPCI
No stuff

+3.3V_RUN

+3.3V_SUS

PCI

PCI

R446

R446
*10K/F_NC

*10K/F_NC

1 2

OC7#
OC6#

OC4#

OC10#
OC11#
OC3#

REQ0#

GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#
STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

3

PCIE_RX1-33
PCIE_RX1+33

MiniWWAN

PCIE_RX2-34
PCIE_RX2+34

MiniWLAN

PCIE_RX3-33
PCIE_RX3+33

MiniWPAN

PCIE_RX4-30
PCIE_RX4+30

Express Card

T47 PADT47 PAD
T46 PADT46 PAD
T76 PADT76 PAD
T77 PADT77 PAD

PCIE_RX6-/GLAN_RX-42
PCIE_RX6+/GLAN_RX+42

Giga Bit LOM

T75 PADT75 PAD
T72 PADT72 PAD

T73 PADT73 PAD

T78 PADT78 PAD

USB_OC0_1#35
USB_OC2#35

R319 22.6/FR319 22.6/F

1 2

Places within 500 mils
of the ICH9

RP41

RP41

6
7
8
9

10

10KX8

10KX8

R498 10KR498 10K
R522 10KR522 10K
R511 10KR511 10K

PCI_REQ0#

F1

PCI_GNT0#

G4

PCI_REQ1#

B6

PCI_GNT1#

A7

SB_WWAN_PCIE_RST#

F13

PCI_GNT2#

F12

SB_LOM_PCIE_RST#

E6

PCI_GNT3#

F6
D8

B4
D6
A5

PCI_IRDY#

D3
E3

PCI_RST#_G

R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_PLOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PCI_PLTRST#

C14

CLK_PCI_ICH

D4
R2

SB_WPAN_PCIE_RST#

H4

SB_WLAN_PCIE_RST#

K6

SB_NB_PCIE_RST#

F2

ICH_IRQH_GPIO5

G2

12
12
12

3

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN3_C
PCIE_TXP3_C

PCIE_TXN4_C
PCIE_TXP4_C

GLAN_TXN_C
GLAN_TXP_C

SPI_CLK_R
SPI_CS#0_R
ICH_SPI_CS1#_R

SPI_MOSI
SPI_MISO

USB_OC0_1#
USB_OC2#

OC3#
OC4#
OC5#
OC6#
OC7#
OC8#
OC9#
OC10#
OC11#

USBRBIAS

+3.3V_SUS

5

OC8#

4

USB_OC2#OC5#

3

USB_OC0_1#

2

OC9#

1

U21D

U21D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M REV 1.0

ICH9M REV 1.0

+3.3V_SUS

PCI_REQ0# 28
PCI_GNT0# 28

T114PAD T114PAD
T56PAD T56PAD

SB_WWAN_PCIE_RST# 33

T106PAD T106PAD

SB_LOM_PCIE_RST# 42

T111PAD T111PAD

PCI_C_BE0# 28
PCI_C_BE1# 28
PCI_C_BE2# 28
PCI_C_BE3# 28

PCI_IRDY# 28
PCI_PAR 28

PCI_DEVSEL# 28
PCI_PERR# 28
PCI_PLOCK#
PCI_SERR# 28
PCI_STOP# 28
PCI_TRDY# 28
PCI_FRAME# 28

CLK_PCI_ICH 17
ICH_PME# 28,31

SB_WPAN_PCIE_RST# 33
SB_WLAN_PCIE_RST# 34
SB_NB_PCIE_RST# 6PCI_PIRQC#28

T126PAD T126PAD

4

DMI0RXN
DMI0RXP

DMI0TXN
DMI0TXP

DMI1RXN
DMI1RXP

DMI1TXN
DMI1TXP

DMI2RXN
DMI2RXP

DMI2TXN
DMI2TXP

DMI3RXN
DMI3RXP

DMI3TXN
DMI3TXP

DMI_CLKN

PCI-Express

PCI-Express

DMI_CLKP

DMI_ZCOMP

Direct Media Interface

Direct Media Interface

DMI_IRCOMP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P

SPI

SPI

USBP5N
USBP5P
USBP6N

USB

USB

USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P

4

5

V27
V26
U29
U28

Y27
Y26
W29
W28

AB27
AB26
AA29
AA28

AD27
AD26
AC29
AC28

T26
T25

AF29

DMI_COMP

AF28
AC5

AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

R458 24.9/FR458 24.9/F

PCI_GNT3#

A16 away override strap.

SB_NB_PCIE_RST#

5

6

DMI_MTX_IRX_N0 6
DMI_MTX_IRX_P0 6

DMI_MRX_ITX_N0 6
DMI_MRX_ITX_P0 6

DMI_MTX_IRX_N1 6
DMI_MTX_IRX_P1 6

DMI_MRX_ITX_N1 6
DMI_MRX_ITX_P1 6

DMI_MTX_IRX_N2 6
DMI_MTX_IRX_P2 6

DMI_MRX_ITX_N2 6
DMI_MRX_ITX_P2 6

DMI_MTX_IRX_N3 6
DMI_MTX_IRX_P3 6

DMI_MRX_ITX_N3 6
DMI_MRX_ITX_P3 6

CLK_PCIE_ICH# 17
CLK_PCIE_ICH 17

1 2

ICH_USBP0- 35
ICH_USBP0+ 35
ICH_USBP1- 35
ICH_USBP1+ 35
ICH_USBP2- 35
ICH_USBP2+ 35

T60PAD T60PAD

T57PAD T57PAD

ICH_USBP4- 34
ICH_USBP4+ 34
ICH_USBP5- 33
ICH_USBP5+ 33
ICH_USBP6- 33
ICH_USBP6+ 33
ICH_USBP7- 30
ICH_USBP7+ 30

T123PAD T123PAD

T124PAD T124PAD

T119PAD T119PAD

T118PAD T118PAD

T115PAD T115PAD

T113PAD T113PAD

ICH_USBP11- 41
ICH_USBP11+ 41

Reserved for

EMI.Place

resister and cap

close to ICH.

12

Low = A16 swap override enabled.
High = Default.

CLK_PCI_ICH

C609

C609
*8.2P_NC

*8.2P_NC

R505

R505

*1K_NC

*1K_NC

R520

R520
*10_NC

*10_NC

+1.5V_PCIE_ICH

Side pair Top / left
Side pair bottom / left
Side pair top/right(DB)
Side pair Bot right(DB)
Mini Card (WLAN)
Mini Card (WWAN)
Mini Card (WPAN)
Express Card

Biometric
Camera

16

16

6

Place within 500mils of ICH8

PCI Pullups

PCI_FRAME#
PCI_TRDY# PCI_PLOCK#
PCI_DEVSEL#
PCI_REQ1#

+3.3V_RUN

PCI_PIRQA#
PCI_REQ0#
ICH_IRQH_GPIO5
PCI_SERR#

+3.3V_RUN

BIOS should not enable the
internal GPIO pull up resistor.

Non-iAMT

C356

C356

1 2

1 2

1 2

0.047U

0.047U

10

10

PCI_RST#_G

C581

C581

1 2

0.047U

0.047U

10

10

PCI_PLTRST#

Title

Title

Title

ICH9-M (USB,DMI,PCIE,PCI)

ICH9-M (USB,DMI,PCIE,PCI)

ICH9-M (USB,DMI,PCIE,PCI)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

FM8B 3A

FM8B 3A

FM8B 3A

Date: Sheet of

Date: Sheet of

Date: Sheet of

7

RP44RP44

6
7
8
9

10

RP45RP45

6
7
8
9

10

SB_WPAN_PCIE_RST#
SB_WWAN_PCIE_RST#
SB_WLAN_PCIE_RST#
SB_LOM_PCIE_RST#
SB_NB_PCIE_RST#

+3.3V_SUS

2
1

+3.3V_SUS

2
1

7

Add Buffers as needed for
Loading and fanout concerns.

5

U25

U25

TC7SZ32FU(T5L,F,T)

TC7SZ32FU(T5L,F,T)

5

U22

U22

TC7SZ32FU(T5L,F,T)

TC7SZ32FU(T5L,F,T)

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

R512 20KR512 20K
R492 20KR492 20K
R502 20KR502 20K
R506 20KR506 20K
R336 20KR336 20K

4

4

PLTRST# 6,30,31,33,34,42

+3.3V_RUN

5
4

PCI_STOP#

3

PCI_PIRQD#

2

PCI_IRDY#

1

+3.3V_RUN

5
4

PCI_PIRQB#

3

PCI_PIRQC#

2

PCI_PERR#

1

PCI_RST# 28

8

12
12
12
12
12

12 58Thursday, October 09, 2008

12 58Thursday, October 09, 2008

12 58Thursday, October 09, 2008

8

1

2

3

4

5

6

7

8

+3.3V_SUS

RP43

RP43

1
3

2.2KX2

2.2KX2

A A

+3.3V_SUS

1
3

ICH_SMBCLK
ICH_SMBDATA

+3.3V_RUN

R321

R321

8.2K

8.2K

1 2

R320

B B

C C

+3.3V_RUN

+3.3V_RUN

D D

+3.3V_SUS

R320
*10_NC

*10_NC

1 2

Option to " Disable "
clkrun. Pulling it down
will keep the clks
running.

KB_LED_DET#37
PCIE_MCARD1_DET#34

MCH_ICH_SYNC#6

R482 10KR482 10K

R472 *2.2K_NCR472 *2.2K_NC
R481 100KR481 100K

1 2

R268 100KR268 100K

1 2

R324 100KR324 100K

1 2

R496 100KR496 100K

1 2

R475 100KR475 100K

1 2

R465 *10K_NCR465 *10K_NC
R500 10KR500 10K
R262 10KR262 10K

R474 10KR474 10K
R273 10KR273 10K
R290 100KR290 100K

1 2

2
4

RP42

RP42

2
4

*100KX2_NC

*100KX2_NC

R485 0R485 0
R487 0R487 0

CLKRUN#

12

12

12
12
12

12
12

1

Non-iAMT

ICH_SMBDATA
ICH_SMBCLK

ICH_SMLINK0
ICH_SMLINK1

1 2
1 2

PCIE_MCARD1_DET#

PLTRST_DELAY#

IMVP_PWRGD

USB_MCARD2_DET#

USB_MCARD3_DET#

PCIE_MCARD1_DET#

PCIE_MCARD2_DET#
PCIE_MCARD3_DET#

MCH_ICH_SYNC#_R
IRQ_SERIRQ
THERM_ALERT#

RSV_WOL_EN
SIO_EXT_SMI#
USB_MCARD1_DET#

ASF 2.0Non-iAMT

ICH_SMLINK0
ICH_SMLINK1

+3.3V_SUS

ICH_SMBCLK30,33,34
ICH_SMBDATA30,33,34

ITP_DBRESET#3
PM_BMBUSY#6

USB_MCARD1_DET#34

H_STP_PCI#17
H_STP_CPU#17

CLKRUN#28,31
PCIE_WAKE#30,33,34,42

IRQ_SERIRQ28,31

THERM_ALERT#39

IMVP_PWRGD31,44,51

USB_MCARD2_DET#33
USB_MCARD3_DET#33

SIO_EXT_WAKE#31
SIO_EXT_SMI#31

1 2

PCIE_MCARD2_DET#33
PCIE_MCARD3_DET#33

WLAN_RADIO_DIS#34

WPAN_RADIO_DIS_MINI#33

WWAN_RADIO_DIS#33

SIO_EXT_SCI#31

12

SATA_CLKREQ#17

PLTRST_DELAY#

R486 0R486 0
R325 4.7KR325 4.7K

2

R491 *10K_NCR491 *10K_NC
R490 10KR490 10K
R495 10KR495 10K
R480 1KR480 1K

T52 PADT52 PAD

T82 PADT82 PAD

T48 PADT48 PAD
T55 PADT55 PAD

ICH_RSVD11

T51 PADT51 PAD
T50 PADT50 PAD
T49 PADT49 PAD

T93 PADT93 PAD
T91 PADT91 PAD
T92 PADT92 PAD

T112 PADT112 PAD

T87 PADT87 PAD

SPKR40

+3.3V_RUN

12

12
12
12
12

R501

R501

*1K_NC

*1K_NC

USB_MCARD1_DET#

PCIE_MCARD2_DET#
PCIE_MCARD3_DET#

SPKR

No Reboot strap.

SPKR

Low = Default.
High = No Reboot.

3

Non-iAMT

RSV_ICH_CL_RST1#
ICH_RI#
SIO_EXT_SCI#
PCIE_WAKE#

ICH_SMBCLK
ICH_SMBDATA
RSV_ICH_CL_RST1#
ICH_SMLINK0
ICH_SMLINK1

ICH_RI#
RSV_LPCPD#

CLKRUN#
PCIE_WAKE#

IRQ_SERIRQ
THERM_ALERT#

IMVP_PWRGD

USB_MCARD2_DET#
USB_MCARD3_DET#

SIO_EXT_SMI#
SIO_EXT_SCI#

PLTRST_DELAY#

SPKR
MCH_ICH_SYNC#_R

TP9
TP10
TP11

U21C

U21C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#/GPIO15

E19

STP_CPU#/GPIO25

L4

CLKRUN#/GPIO32

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP8

AG19

TACH1/GPIO1

AH21

TACH2/GPIO6

AG21

TACH3/GPIO7

A21

GPIO8

C12

LANPHYPC/GPIO12

C21

ENGDET/GPIO13

AE18

TACH0/GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

QRT_STATE0/GPIO27

D19

QRT_STATE1/GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP9

AJ20

TP10

AJ21

TP11

ICH9M REV 1.0

ICH9M REV 1.0

SMbus address D2

These are for
backdrive issue.

ICH_SMBDATA30,33,34 MEM_SDATA 15

4

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

SMB

SMB

Clocks

Clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

SYS GPIO

SYS GPIO

Power MGTController Link

Power MGTController Link

GPIO

GPIO

MEM_LED/GPIO24

NETDETECT/GPIO14

MISC

MISC

+3.3V_RUN

3 1

+3.3V_RUN

3 1

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

PWROK

BATLOW #
PWRBTN#
LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

CL_RST0#
CL_RST1#

ALERT#/GPIO10

WOL_EN/GPIO9

2

Q37

Q37

2N7002W-7-F

2N7002W-7-F

2

Q36

Q36

2N7002W-7-F

2N7002W-7-F

Place these close to ICH9.

CLK_ICH_48M

+3.3V_RUN

R476

R476

8.2K

8.2K

AH23
AF19
AE21
AD20

H1
AF3

P1
C16

E16
G17

C10
G20
M2
B13
R3
D20
D22
R5
R6
B16
F24

B19
F22

C19
C25

A19
F21

D18
A16

C18
C11
C20

1 2

CLK_ICH_14M
CLK_ICH_48M

ICH_SUSCLK

ICH_PWRGD
DPRSLPVR

ICH_BATLOW#

RSV_ICH_LAN_RST#
ICH_RSMRST#

ICH_CL_PWROK

RSV_ICH_CL_CLK1

RSV_ICH_CL_DATA1
CL_VREF0

CL_VREF1

CL_RST1#
RSV_GPIO24

RSV_GPIO10
RSV_GPIO14
RSV_WOL_EN

R293 8.2KR293 8.2K

R493 8.2KR493 8.2K

CLK_ICH_14M 17
CLK_ICH_48M 17

T58PAD T58PAD

SIO_SLP_S3# 31

T95PAD T95PAD

SIO_SLP_S5# 31

ICH_PWRGD 6,44
DPRSLPVR 6,51

12

+3.3V_SUS

SIO_PWRBTN# 31

T81PAD T81PAD

ICH_RSMRST# 31
CLK_PWRGD 17
ICH_CL_PWROK 6,31

T97PAD T97PAD

CL_CLK0 6

T83PAD T83PAD

CL_DATA0 6

T88PAD T88PAD

ICH_CL_RST0# 6

T84PAD T84PAD

T96PAD T96PAD

T86PAD T86PAD

T107PAD T107PAD

T80PAD T80PAD

12

+3.3V_SUS

Non-iAMT

ICH_PWRGD
DPRSLPVR
ICH_RSMRST#
RSV_ICH_LAN_RST#
ICH_CL_PWROK

RSV_GPIO10

Non-iAMT

+3.3V_RUN

Non-iAMT

2

4

RP39

RP39

2.2KX2

2.2KX2

1

3

10

10

CL_VREF0

12

C548

C548

0.1U

0.1U

R527

R527
*10_NC

*10_NC

50

CLK_ICH_14M

R470 10KR470 10K

50

R322

R322
*10_NC

*10_NC

50

50

R484 10KR484 10K
R326 100KR326 100K

1 2

R479 10KR479 10K
R497 1MR497 1M

R483 10KR483 10K

DIS:ALW
UMA:SUS

R467

R467

R286

R286

3.24K/F

3.24K/F

*3.24K/F_NC

*3.24K/F_NC

1 2

1 2

CL_VREF1

12

12

C321

C321

R471

R471

*0.1U_NC

*0.1U_NC

453/F

453/F

10

10

1 2
12

C622

C622
*4.7P_NC

*4.7P_NC

1 2
12

C358

C358
*4.7P_NC

*4.7P_NC

12

12
12
12

12

+3.3V_SUS+3.3V_ALW

+3.3V_SUS

R285

R285
*3.24K/F_NC

*3.24K/F_NC

1 2

12

R280

R280
*453/F_NC

*453/F_NC

(19)

CL_VREF0/1 ~=0.405V

MEM_SCLK 15ICH_SMBCLK30,33,34

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

6

Date: Sheet of

COMPUTER

ICH9-M (PM,GPIO,SMB,CL)

ICH9-M (PM,GPIO,SMB,CL)

ICH9-M (PM,GPIO,SMB,CL)

FM8B 3A

FM8B 3A

FM8B 3A

7

13 58Thursday, October 09, 2008

13 58Thursday, October 09, 2008

13 58Thursday, October 09, 2008

8

1

U21E

U21E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

AC26

A A

B B

C C

D D

AC27

AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29

AE12
AE13
AE14
AE16
AE17

AE20
AE24

AF13
AF16
AF18
AF22
AH26
AF26
AF27

AG13
AG16
AG18
AG20
AG23

AG3
AG6

AG9
AH12
AH14
AH17
AH19

AH22
AH25
AH28

AJ12
AJ14
AJ17

AC3
AD1

AD4
AD5
AD6
AD7
AD9

AE2

AE3
AE4
AE6
AE9

AF5
AF7
AF9

AH2

AH5
AH8

AJ8
B11
B14
B17

B20
B23

C26
C27
E11
E14
E18

E21
E24

F16
F28
F29
G12
G14
G18
G21
G24
G26
G27

H23
H28
H29

B2

B5
B8

E2

E5
E8

G8
H2

VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]

ICH9M REV 1.0

ICH9M REV 1.0

1

VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

2

+5V_RUN

+3.3V_RUN

Non-iAMT

+5V_SUS

+3.3V_SUS

+1.5V_RUN

+1.5V_RUN

2

+RTC_CELL

R503 10R503 10

1 2

D26

D26

2 1

SDMK0340L-7-F

SDMK0340L-7-F

R318 10R318 10

1 2

D29

D29

2 1

SDMK0340L-7-F

SDMK0340L-7-F

L64

L64
BLM21PG331SN1D

BLM21PG331SN1D

0805

0805

646mA

12

+

+

C307

C307

220uF

220uF

2.5

2.5
7343

7343

12

R2890R289
0

+VCCSATPLL_L

L42

L42
10uH

10uH

805

805

10uH+-20%_100mA

+VCCSATPLL

12

C320

C320
1U

1U

10

10
603

603

12

Non-iAMT

+3.3V_RUN

+1.5V_PCIE_ICH

3

12

C314

C314

C311

C311

0.1U

0.1U

1U

1U

1 2

10

10

10

10

+ICH_V5REF_RUN

603

603

2mA

C590

C590

0.1U

0.1U

1 2

10

10

+ICH_V5REF_SUS

2mA

C354

C354

0.1U

0.1U

1 2

10

10

FB_330ohm+-25%_100mHz_

1.5A_0.09 ohm DC

C301

C301
22U

22U

10

10
1206

1206

12

C293

C293
22U

22U

10

10
1206

1206

+1.5V_PCIE_ICH

+1.5V_RUN

+1.5V_RUN

47mA

C319

C319

VCC1_5_A TOTAL 1.342A

10U

10U

6.3

6.3
603

603

+1.5V_RUN

C601

C601

0.1U

0.1U

1 2

10

10

T54

T54
T53

T53

C328

C328

0.1U

0.1U

1 2

10

10

12

C544

C544

4.7U

4.7U

6.3

6.3
0603

0603

3

1 2

C552

C552

2.2U

2.2U

1 2

10

10
805

805

11mA

+1.5V_RUN

PAD

PAD
PAD

PAD

C313

C313

0.1U

0.1U

10

10

+VCCSATPLL

12

C577

C577
1U

1U

10

10
603

603

12

C573

C573
1U

1U

10

10
603

603

C589

C589

0.1U

0.1U

1 2

10

10

TP_VCCSUSLAN1
TP_VCCSUSLAN2

19mA

ICH_GLANPLL

23mA

80mA

+3.3V_RUN

1mA

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29

W24
W25

AJ19

AC16
AD15
AD16
AE15

AF15
AG15
AH15

AJ15
AC11

AD11
AE11

AF11
AG10
AG11
AH10

AJ10

AC18
AC19

AC21

AC12
AC13
AC14

AE1

G25
H24
H25

M24
M25
N23
N24
N25

R24
R25
R26
R27

U24
U25

U23

AC9

G10

AA7
AB6
AB7
AC6
AC7

D28
D29

A23

A6

F25

J24

J25
K24
K25
L23
L24
L25

P24
P25

T24
T27
T28
T29

V24
V25

K23
Y24
Y25

G9

AJ5

A10
A11

A12
B12

A27

E26
E27

A26

4

U21F

U21F

VCCRTC
V5REF
V5REF_SUS
VCC1_5_B[01]

VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]

VCCSATAPLL
VCC1_5_A[01]

VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]

VCC1_5_A[09]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]

VCC1_5_A[17]
VCC1_5_A[18]

VCC1_5_A[19]
VCC1_5_A[20]
VCC1_5_A[21]

VCC1_5_A[22]
VCC1_5_A[23]

VCC1_5_A[24]
VCC1_5_A[25]

VCCUSBPLL
VCC1_5_A[26]

VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]

VCCLAN1_05[1]
VCCLAN1_05[2]

VCCLAN3_3[1]
VCCLAN3_3[2]

VCCGLANPLL
VCCGLAN1_5[1]

VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]

VCCGLAN3_3

ICH9M REV 1.0

ICH9M REV 1.0

4

CORE

CORE

VCCA3GP ATXARX USB CORE

VCCA3GP ATXARX USB CORE

VCCP_COREVCCPSUSVCCPUSB

VCCP_COREVCCPSUSVCCPUSB

PCI

PCI

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS1_5[1]
VCCSUS1_5[2]

VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]

VCCSUS3_3[05]

VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]

GLAN POWER

GLAN POWER

VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]

VCCDMIPLL
VCC_DMI[1]

VCC_DMI[2]

V_CPU_IO[1]
V_CPU_IO[2]

VCC3_3[01]
VCC3_3[02]
VCC3_3[07]
VCC3_3[03]

VCC3_3[04]
VCC3_3[05]
VCC3_3[06]

VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]

VCCHDA

VCCSUSHDA

VCCCL1_05

VCCCL1_5

VCCCL3_3[1]
VCCCL3_3[2]

5

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

R29
W23

Y23
AB23

AC23
AG29
AJ6
AC10
AD19

AF20
AG24
AC20

B9
F9
G3
G6
J2
J7
K7

AJ4
AJ3
AC8

F17

AD8
F18

A18
D16
D17
E22

AF1

VCCSUS 3_3 212mA

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

G22
G23

A24
B24

19mA

+1.5V_RUN

C566

C566

0.1U

0.1U

1 2

10

10

+1.5V_DMIPLL

23mA

+VCC_DMI_ICH

48mA

2mA

VCC3_3 308mA

C617

C617

0.1U

0.1U

1 2

10

10

C594

C594

0.1U

0.1U

1 2

10

10

+VCC_HDA
+VCCSUSHDA
TP_VCCSUS1.05_1

TP_VCCSUS1.05_2TP_VCCSUS1.05_2

TP_VCCSUS1.5_1
TP_VCCSUS1.5_2

11mA

C571 0.1U

C571 0.1U

WWAN Noise - ICH improvements

12

12

C564

C564
*0.1U_NC

*0.1U_NC

10

10

+VCCCL1_05
+VCCCL1_5

+3.3V_RUN

Non-iAMT

L65 1uH/300mA_8L65 1uH/300mA_8

5

1 2

1 2

1 2

1 2

12

C615

C615
*0.1U_NC

*0.1U_NC

10

10

12

+1.05V_VCCP

C585

C585

0.1U

0.1U

10

10

1 2

C549

C549

0.1U

0.1U

10

10

C556

C556

0.1U

0.1U

10

10

T109PAD T109PAD
T94PAD T94PAD

10

10

C592

C592

0.22U/10V

0.22U/10V

C545

C545
10U

10U

0805

0805
10

10

1uH+-20%_800mA

C302

C302

0.01U

0.01U

25

25

C598

C598

0.1U

0.1U

1 2

10

10

C593

C593

0.1U

0.1U

1 2

10

10

12

C340

C340

0.1U

0.1U

10

10

T110PAD T110PAD

12

12

C357

C357
*0.1U_NC

*0.1U_NC

10

10

C555

C555
*0.1U_NC

*0.1U_NC

10

10

1 2

ICH_GLANPLL

ICH_GLANPLL

12

C306

C306

2.2U

2.2U

0603

0603

6.3

6.3

6

+1.05V_VCCP +1.5V_RUN

C295

C295
10U

10U

1 2

6.3

6.3
0603

0603

12

C558

C558

4.7U

4.7U

0603

0603

6.3

6.3

+3.3V_RUN

L32

L32
1uH

1uH

+1.5V_DMIPLL_R

12

L66

L66
BLM21PG331SN1D

BLM21PG331SN1D

0805

0805

1 2

D24

D24

1

2

BAT54C T/R

BAT54C T/R

C553

C553

0.1U

0.1U

10

10

R456 10

R456 10

1 2

3

R229 1R229 1

+1.05V_VCCP

C578

C578

0.1U

0.1U

1 2

10

10

WWAN Noise - ICH improvements

12

C550

C550
*0.1U_NC

*0.1U_NC

10

10

+VCCSUSHDA

11mA

+VCCSUSHDA

11mA

+3.3V_SUS

C621

C621

1U/6.3V_4

1U/6.3V_4

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

C591

C591

0.22U/10V

0.22U/10V

12

6

+3.3V_RUN

R299 *0_NCR299 *0_NC

R300 0R300 0

C554

C554
*0.1U_NC

*0.1U_NC

10

10

C557

C557
*1U_NC

*1U_NC

10

10
603

603

12

12

12

C576

C576

0.1U

0.1U

10

10

12

12

+1.5V_RUN

+3.3V_SUS

C600

C600

0.1U

0.1U

10

10

C561

C561

0.1U

0.1U

10

10

7

0805

0805

+1.5V_RUN

12

+1.05V_VCCP

12

C565

C565

4.7U

4.7U

0603

0603

6.3

6.3

+3.3V_RUN

12

C595

C595
*0.1U_NC

*0.1U_NC

10

10

VOUT

+3.3V_SUS

12

+1.5V_SUS

12

BP

12

4

0.022U

0.022U

5

C528

C528
*0.1U_NC

*0.1U_NC

10

10

12

C605

C605
*0.1U_NC

*0.1U_NC

10

10

12

C619

C619

0.1U

0.1U

10

10

C852

C852

12

C587

C587
*0.1U_NC

*0.1U_NC

10

10

R526 *0_NCR526 *0_NC

R525 0R525 0

U35

U35

3

EN

2

GND

1

VIN

IC(5P) RT9193 (SOT23-5)EP

IC(5P) RT9193 (SOT23-5)EP

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

ICH9-M (POWER,GND)

ICH9-M (POWER,GND)

ICH9-M (POWER,GND)

FM8B 3A

FM8B 3A

FM8B 3A

7

8

+1.5V_SUS

C623

C623
1U/6.3V_4

1U/6.3V_4

14 58Thursday, October 09, 2008

14 58Thursday, October 09, 2008

14 58Thursday, October 09, 2008

8

1

DDR_A_D0
DDR_A_D1

DDR_A_D3
DDR_A_D2

DDR_A_D12
DDR_A_D8

DDR_A_D10
DDR_A_D11

DDR_A_D21
DDR_A_D17

DDR_A_D22
DDR_A_D23

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D30
DDR_A_D26

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS0
DDR_A_WE#

DDR_A_CAS#

M_ODT1
DDR_A_D36

DDR_A_D37
DDR_A_DQS#4

DDR_A_DQS4
DDR_A_D35

DDR_A_D38
DDR_A_D41

DDR_A_D40
DDR_A_DM5
DDR_A_D42

DDR_A_D46
DDR_A_D48

DDR_A_D53

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D54

DDR_A_D56
DDR_A_D61

DDR_A_DM7
DDR_A_D59

DDR_A_D62
MEM_SDATA

MEM_SCLK

+1.8V_SUS

A is required to route to Top
SoDIMM for AMTto function.
Ch.A SODIMM needs to be
populated for Intel AMT support.

DDR_A_DQS#0

A A

B B

DDR_CKE0_DIMMA6,16

DDR_A_BS27,16

DDR_A_BS07,16
DDR_A_WE#7,16

DDR_A_CAS#7,16
DDR_CS1_DIMMA#6,16

M_ODT16,16

C C

D D

MEM_SDATA13
MEM_SCLK13
+3.3V_RUN

Non-iAMT

DDR_A_DQS0

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_DQS#2
DDR_A_DQS2

SMbus address A0 SMbus address A4

1

2

V_DDR_MCH_REF

JDIM2

JDIM2

1

VREF

3

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

TYC_2-1734073-1

TYC_2-1734073-1

CLOCK 0,1

2

TOP

PC4800 DDR2 SDRAM

PC4800 DDR2 SDRAM

VSS46

DQ4
DQ5

VSS15

DM0

VSS5

DQ6
DQ7

VSS16

DQ12
DQ13

VSS17

DM1

VSS53

CK0

CK0#

VSS41

DQ14
DQ15

VSS54
VSS20

DQ20
DQ21

VSS6

NC3
DM2

VSS21

DQ22
DQ23

VSS24

DQ28
DQ29

VSS25

DQS#3

DQS3

VSS10

DQ30
DQ31

VSS8
CKE1
VDD8

VDD11

VDD4

VDD12

SO-DIMM (200P)

SO-DIMM (200P)

BA1

RAS#
VDD1

ODT0
VDD6

NC2

VSS12

DQ36
DQ37

VSS28

DM4

VSS42

DQ38
DQ39

VSS55

DQ44
DQ45

VSS43

DQS#5

DQS5

VSS56

DQ46
DQ47

VSS44

DQ52
DQ53

VSS57

CK1

CK1#

VSS45

DM6

VSS32

DQ54
DQ55

VSS35

DQ60
DQ61

VSS7

DQS#7

DQS7

VSS36

DQ62
DQ63

VSS13

SA0
SA1

3

+1.8V_SUS

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84

A15

86

A14

88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116

A13

118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_A_D4
DDR_A_D5

DDR_A_DM0
DDR_A_D7

DDR_A_D6
DDR_A_D13

DDR_A_D9
DDR_A_DM1

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D16

PM_EXTTS#0
DDR_A_DM2

DDR_A_D18
DDR_A_D19

DDR_A_D29
DDR_A_D28

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D31
DDR_A_D27

DDR_CKE1_DIMMA 6,16

DDR_A_MA14
DDR_A_MA11

DDR_A_MA7
DDR_A_MA6

DDR_A_MA4
DDR_A_MA2
DDR_A_MA0

DDR_A_BS1
DDR_A_RAS#

DDR_CS0_DIMMA# 6,16

M_ODT0

DDR_A_MA13

DDR_A_D33
DDR_A_D32

DDR_A_DM4
DDR_A_D34

DDR_A_D39
DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D43

DDR_A_D47
DDR_A_D52

DDR_A_D49

DDR_A_DM6
DDR_A_D51

DDR_A_D55
DDR_A_D60

DDR_A_D57
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D58

DDR_A_D63 DDR_B_D63

R59

R59

R58

R58

10K

10K

10K

10K

1 2

1 2

3

DDR_A_DM[0..7] 7
DDR_A_D[0..63] 7
DDR_A_DQS[0..7] 7
DDR_A_DQS#[0..7] 7
DDR_A_MA[0..14] 7,16

V_DDR_MCH_REF

12

C519

C519

0.1U

0.1U

10

10

M_CLK_DDR0 6
M_CLK_DDR#0 6

PM_EXTTS#0 6

DDR_A_BS1 7,16
DDR_A_RAS# 7,16

M_ODT0 6,16

+3.3V_RUN

12

C61

C61

2.2U

2.2U

0603

0603

6.3

6.3

M_CLK_DDR1 6
M_CLK_DDR#1 6

4

12

C515

C515

2.2U

2.2U

0603

0603

6.3

6.3

DDR_CKE3_DIMMB6,16

DDR_B_BS27,16

DDR_B_BS07,16
DDR_B_WE#7,16

DDR_B_CAS#7,16

DDR_CS3_DIMMB#6,16

Non-iAMT

12

C58

C58

0.1U

0.1U

10

10

Non-iAMT

+3.3V_RUN

4

5

+1.8V_SUS +1.8V_SUS

V_DDR_MCH_REF

DDR_B_D0
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D2
DDR_B_D7

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D17
DDR_B_D20

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D22
DDR_B_D19

DDR_B_D29
DDR_B_D28

DDR_B_DM3

DDR_B_D26
DDR_B_D27

DDR_B_BS2

DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10

DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

M_ODT36,16

M_ODT3
DDR_B_D32

DDR_B_D33
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D34

DDR_B_D35
DDR_B_D41

DDR_B_D40
DDR_B_DM5
DDR_B_D47

DDR_B_D42
DDR_B_D52

DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D54
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_DM7
DDR_B_D62

DDR_B_D59
MEM_SDATA

MEM_SCLK

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

JDIM1

JDIM1

1

VREF

3

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

TYC_1-1734075-1

TYC_1-1734075-1

BOT

PC4800 DDR2 SDRAM

PC4800 DDR2 SDRAM

VSS46

VSS15

DM0

VSS5

DQ6
DQ7

VSS16

DQ12
DQ13

VSS17

DM1

VSS53

CK0#

VSS41

DQ14
DQ15

VSS54
VSS20

DQ20
DQ21

VSS6

NC3
DM2

VSS21

DQ22
DQ23

VSS24

DQ28
DQ29

VSS25

DQS#3

DQS3

VSS10

DQ30
DQ31

VSS8
CKE1
VDD8

VDD11

VDD4

SO-DIMM (200P)

SO-DIMM (200P)

VDD12

RAS#
VDD1

ODT0
VDD6

NC2

VSS12

DQ36
DQ37

VSS28

DM4

VSS42

DQ38
DQ39

VSS55

DQ44
DQ45

VSS43

DQS#5

DQS5

VSS56

DQ46
DQ47

VSS44

DQ52
DQ53

VSS57

CK1#

VSS45

DM6

VSS32

DQ54
DQ55

VSS35

DQ60
DQ61

VSS7

DQS#7

DQS7

VSS36

DQ62
DQ63

VSS13

DQ4
DQ5

CK0

A15
A14

A11

BA1
S0#

A13

CK1

SA0
SA1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

CLOCK 2,3

CKE 2,3CKE 0,1

5

6

DDR_B_D4
DDR_B_D1

DDR_B_DM0
DDR_B_D6

DDR_B_D3
DDR_B_D12

DDR_B_D13
DDR_B_DM1

DDR_B_D14
DDR_B_D15

DDR_B_D16
DDR_B_D21

PM_EXTTS#1
DDR_B_DM2

DDR_B_D18
DDR_B_D23

DDR_B_D24
DDR_B_D25

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D31
DDR_B_D30

DDR_B_MA14
DDR_B_MA11

DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_BS1
DDR_B_RAS#

M_ODT2

DDR_B_MA13

DDR_B_D36
DDR_B_D37

DDR_B_DM4
DDR_B_D38

DDR_B_D39
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D43

DDR_B_D46
DDR_B_D48

DDR_B_D55

DDR_B_DM6
DDR_B_D53

DDR_B_D50
DDR_B_D61

DDR_B_D60
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_D58

R60

R60
10K

10K

1 2

6

R61 10KR61 10K

DDR_B_DM[0..7] 7
DDR_B_D[0..63] 7
DDR_B_DQS[0..7] 7
DDR_B_DQS#[0..7] 7
DDR_B_MA[0..14] 7,16

M_CLK_DDR3 6
M_CLK_DDR#3 6

PM_EXTTS#1 6

DDR_CKE4_DIMMB 6,16

DDR_B_BS1 7,16
DDR_B_RAS# 7,16

DDR_CS2_DIMMB# 6,16

M_ODT2 6,16

M_CLK_DDR4 6
M_CLK_DDR#4 6

Non-iAMT

+3.3V_RUN

12

7

V_DDR_MCH_REF

12

C255

C255

0.1U

0.1U

10

10

+1.8V_SUS

12

C137

C137

2.2U

2.2U

0603

0603

6.3

6.3

+1.8V_SUS

12

C256

C256

2.2U

2.2U

0603

0603

6.3

6.3

Place these Caps near So-Dimm1.

12

12

C474

C474

2.2U

2.2U

0603

0603

6.3

6.3

C150

C150

2.2U

2.2U

0603

0603

6.3

6.3

8

12

12

C132

C132

C458

C458

2.2U

2.2U

2.2U

2.2U

0603

0603

0603

0603

6.3

6.3

6.3

6.3

Place these Caps near So-Dimm2.

12

C437

C437

2.2U

2.2U

0603

0603

6.3

6.3

+1.8V_SUS

Place these Caps near So-Dimm1.

12

12

C468

C468

0.1U

0.1U

10

10

+1.8V_SUS

Place these Caps near So-Dimm2.

12

12

C470

C470

0.1U

0.1U

10

10

+3.3V_RUN

12

C64

C64

2.2U

2.2U

0603

0603

6.3

6.3

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

COMPUTER

DDR2 SO-DIMM (200P) X 2

DDR2 SO-DIMM (200P) X 2

DDR2 SO-DIMM (200P) X 2

FM8B 3A

FM8B 3A

FM8B 3A

7

C452

C452

2.2U

2.2U

0603

0603

6.3

6.3

12

C123

C123

0.1U

0.1U

10

10

12

C446

C446

0.1U

0.1U

10

10

Non-iAMT

12

C65

C65

0.1U

0.1U

10

10

C460

C460

2.2U

2.2U

0603

0603

6.3

6.3

C146

C146

0.1U

0.1U

10

10

C435

C435

0.1U

0.1U

10

10

12

12

12

12

12

12

C465

C465

2.2U

2.2U

0603

0603

6.3

6.3

C469

C469

0.1U

0.1U

10

10

C158

C158

0.1U

0.1U

10

10

C443

C443

2.2U

2.2U

0603

0603

6.3

6.3

+

+

C451

C451
*330U_NC

*330U_NC

7343

7343

6.3

6.3

15 58Thursday, October 09, 2008

15 58Thursday, October 09, 2008

15 58Thursday, October 09, 2008

8

1

2

3

4

5

6

7

8

+0.9V_DDR_VTT

A A

B B

C C

D D

1

Please these resistor
closely DIMMB,all
trace length<750 mil.

12

C127

C127

0.1U

0.1U

10

10

+0.9V_DDR_VTT

12

C111

C111

0.1U

0.1U

10

10

DDR_CS0_DIMMA#6,15
DDR_CS1_DIMMA#6,15
DDR_CKE0_DIMMA6,15
DDR_CKE1_DIMMA6,15

2

Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.

12

12

C155

C155

0.1U

0.1U

10

10

12

C113

C113

0.1U

0.1U

10

10

DDR_B_MA[0..14]7,15 DDR_A_MA[0..14] 7,15

DDR_A_RAS#7,15
DDR_A_BS17,15

M_ODT06,15

DDR_A_BS27,15

DDR_A_BS07,15

DDR_A_CAS#7,15
DDR_A_WE#7,15

M_ODT16,15

C201

C201

0.1U

0.1U

10

10

12

C117

C117

0.1U

0.1U

10

10

DDR_A_MA7
DDR_A_MA11

DDR_A_MA4
DDR_A_MA6

DDR_A_RAS#
DDR_A_BS1

DDR_A_MA13
M_ODT0

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9
DDR_A_MA8

DDR_A_MA3
DDR_A_MA5

DDR_A_MA10
DDR_A_BS0

DDR_A_CAS#
DDR_A_WE#

DDR_A_MA0
DDR_A_MA2

DDR_A_MA1

12

12

C200

C200

0.1U

0.1U

10

10

12

12

C119

C119

0.1U

0.1U

10

10

R90 56R90 56
R102 56R102 56
R85 56R85 56
R87 56R87 56
R118 56R118 56
R129 56R129 56
R124 56R124 56

3

C199

C199

0.1U

0.1U

10

10

C126

C126

0.1U

0.1U

10

10

RP22

RP22

2
4

56x2

56x2
RP21

RP21

2
4

56x2

56x2
RP4

RP4

2
4

56x2

56x2
RP3

RP3

2
4

56x2

56x2
RP20

RP20

2
4

56x2

56x2
RP18

RP18

2
4

56x2

56x2
RP16

RP16

2
4

56x2

56x2
RP8

RP8

2
4

56x2

56x2
RP7

RP7

2
4

56x2

56x2
RP11

RP11

2
4

56x2

56x2

1 2
1 2
1 2
1 2
1 2
1 2
1 2

12

C95

C95

0.1U

0.1U

10

10

12

C152

C152

0.1U

0.1U

10

10

1
3

1
3

1
3

1
3

1
3

1
3

1
3

1
3

1
3

1
3

TOP

12

C133

C133

0.1U

0.1U

10

10

BOT

12

C104

C104

0.1U

0.1U

10

10

+0.9V_DDR_VTT

4

12

12

12

C156

C156

C159

C159

0.1U

0.1U

0.1U

0.1U

10

10

10

10

12

C99

C99

C142

C142

0.1U

0.1U

0.1U

0.1U

10

10

10

10

RP19

RP19

1
3

56x2

56x2
RP15

RP15

1
3

56x2

56x2
RP9

RP9

1
3

56x2

56x2
RP5

RP5

1
3

56x2

56x2
RP13

RP13

1
3

56x2

56x2
RP17

RP17

1
3

56x2

56x2
RP14

RP14

1
3

56x2

56x2
RP6

RP6

1
3

56x2

56x2
RP10

RP10

1
3

56x2

56x2
RP12

RP12

1
3

56x2

56x2
R92 56R92 56
R114 56R114 56
R96 56R96 56
R89 56R89 56
R109 56R109 56
R117 56R117 56
R111 56R111 56

12

C176

C176

0.1U

0.1U

10

10

12

C103

C103

0.1U

0.1U

10

10

12

12

DDR_B_RAS# 7,15
DDR_B_BS1 7,15

M_ODT2 6,15

DDR_B_WE# 7,15
DDR_B_BS0 7,15

DDR_B_CAS# 7,15

M_ODT3 6,15

DDR_B_BS2 7,15
DDR_CS2_DIMMB# 6,15
DDR_CS3_DIMMB# 6,15
DDR_CKE3_DIMMB 6,15
DDR_CKE4_DIMMB 6,15

C171

C171

0.1U

0.1U

10

10

C93

C93

0.1U

0.1U

10

10

C157

C157

0.1U

0.1U

10

10

12

C140

C140

0.1U

0.1U

10

10

Please these resistor
closely DIMMA,all
trace length<750 mil.

12

C165

C165

0.1U

0.1U

10

10

12

C179

C179

0.1U

0.1U

10

10

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

6

Date: Sheet of

COMPUTER

DDR2 RES ARRAY

DDR2 RES ARRAY

DDR2 RES ARRAY

FM8B 3A

FM8B 3A

FM8B 3A

7

16 58Thursday, October 09, 2008

16 58Thursday, October 09, 2008

16 58Thursday, October 09, 2008

8

12

C88

C88

0.1U

0.1U

10

10

12

C109

C109

0.1U

0.1U

10

10

DDR_B_MA7

2

DDR_B_MA11

4

DDR_B_MA6

2

DDR_B_MA4

4

DDR_B_RAS#

2

DDR_B_BS1

4

M_ODT2

2

DDR_B_MA13

4

DDR_B_MA3

2

DDR_B_MA1

4

DDR_B_MA8

2

DDR_B_MA12

4

DDR_B_MA5

2

DDR_B_MA9

4

DDR_B_WE#

2

DDR_B_BS0

4

DDR_B_CAS#

2

DDR_B_MA10

4

DDR_B_MA0

2

DDR_B_MA2

4

12
12
12
12
12
12

DDR_B_MA14DDR_A_MA14

12

5

12

1

2

3

4

5

6

7

8

Add capacitor pads for improving WWAN.

C299 20P 50C299 20P 50
C292 *27P_NC 50C292 *27P_NC 50

1 2

C289 *27P_NC 50C289 *27P_NC 50

1 2

C290 *27P_NC 50C290 *27P_NC 50

1 2

C288 *27P_NC 50C288 *27P_NC 50

1 2

A A

Y2

Y2

14.318MHZ

14.318MHz

SATA_CLKREQ#13

CLK_3GPLLREQ#6

CLK_PCI_851231

1

14.318MHZ

C291

C291
33P

33P

1 2

50

50

CLK_LPC_DEBUG33
CLK_PCI_PCCARD28

CLK_PCI_ICH12
CLK_ICH_48M13
CPU_MCH_BSEL03,6

B B

C C

D D

CPU_MCH_BSEL13,6
CPU_MCH_BSEL23,6

CLK_ICH_14M13

CLK_PWRGD13

+3.3V_RUN

L40 BLM21PG600SN1D

L40 BLM21PG600SN1D

0805

0805

120 ohms@100Mhz

L39 BLM21PG600SN1D

L39 BLM21PG600SN1D

0805

0805

120 ohms@100Mhz

CLK_ICH_48M
CLK_ICH_14M
CLK_PCI_8512
CLK_PCI_PCCARD
CLK_PCI_ICH

CLK_XTAL_OUTCLK_XTAL_IN

21

C294

C294
33P

33P

1 2

50

50

SATA_CLKREQ#
CLK_3GPLLREQ#

CLK_LPC_DEBUG
CLK_PCI_PCCARD

CLK_PCI_ICH PCI_ICH
CLK_ICH_48M

L35

L35

BLM18AG601SN1D

BLM18AG601SN1D

L36

L36

BLM18AG601SN1D

BLM18AG601SN1D

CLK_ICH_14M

12

12

C304

C304

C308

C308

0.1U

0.1U

0.1U

0.1U

10

10

10

10

R455 2.2R455 2.2

1 2

R242 2.2R242 2.2

1 2

R244 2.2R244 2.2

1 2

R478 2.2R478 2.2

1 2

R250 475/FR250 475/F

1 2

R452 475/FR452 475/F

1 2

R236 22R236 22

1 2

R240 33R240 33
R239 33R239 33
R237 33R237 33
R243 33R243 33
R253 2.2KR253 2.2K

R454 0R454 0

1 2

R251 10KR251 10K
R245 33R245 33

+CK_VDD_MAIN

12

C318

C318

0.1U

0.1U

10

10

+CK_VDD_PCI

+CK_VDD_PLL3

+CK_VDD_48

12

C300

C300

0.1U

0.1U

10

10

+CK_VDD_SRC

2

12

C541

C541

0.1U

0.1U

10

10

+CK_VDD_PCI
+CK_VDD_PLL3

+CK_VDD_48 MCH_BCLK
+CK_VDD_SRC

+CK_VDD_MAIN

SATA_CLKREQ#_C

12
12
12
12

12
12

CLK_3GPLLREQ#_C
PCI_PCCARD
PCI_SIOCLK_PCI_8512
27M_SEL

FSA
FSB
FSC

CLK_XTAL_OUT
CLK_XTAL_IN

CLK_SDATA
CLK_SCLK

UMA without iAMT

12

12

12

C530

C530

0.1U

0.1U

10

10

12

C305

C305

0.1U

0.1U

10

10

12

C296

C296

4.7U

4.7U

0603

0603

6.3

6.3

12

C551

C551

0.1U

0.1U

10

10

C310

C310

0.1U

0.1U

10

10

C543

C543

0.1U

0.1U

10

10

12

C529

C529

0.1U

0.1U

10

10

12

C303

C303

0.1U

0.1U

10

10

3

U20

U20

9

VDD_PCI

4

VDD_REF

23

VDD_PLL3

16

VDD_48

46

VDD_SRC

62

VDD_CPU

19

VDD_IO

27

VDD_IO

33

VDD_IO

43

VDD_IO

52

VDD_IO

56

VDD_IO

15

GND

18

GND

22

GND

26

GND

30

GND

36

GND

49

GND

59

GND

1

GND

8

CR#_A/PCI-0

10

CR_B/PCI-1

11

TME/PCI-2

12

SRC5_EN/PCI-3

13

27M_SEL/PCI-4

14

ITP_EN/PCIF-5#

17

FSA/USB48

64

FSB/TEST_MODE

5

FSC/TEST_SEL/REF

55

RESET#

63

CK_PWRGD/PD#

2

XOUT

3

XIN

6

SDATA

7

SCLK

SLG8SP513V

SLG8SP513V

12

C547

C547
*10U_NC

*10U_NC

0603

0603

6.3

6.3

SMbus address D2

These are for
backdrive issue.

SMBDAT126,31,39

SMBCLK126,31,39

CK505

CK505

QFN64

QFN64

4

CPU-0

CPU-0#

CPU-1

CPU-1#

SRC-8/CPU_ITP

SRC-8#/CPU_ITP#

SRC-0/DOT96

SRC-0#/DOT96#

SRC-1/SE1

SRC-1#/SE2

SRC-2/SATA

SRC-2#/SATA#

CR#_C/SRC-3

CR#_D/SRC-3#

SRC-4

SRC-4#

PCI_STOP#/SRC-5

CPU_STOP#/SRC5-5#

CR#_F/SRC-7

CR#_E/SRC-7#

CR#_H/SRC-11

CR#_G/SRC-11#

+3.3V_RUN

2

3 1

Q35

Q35
2N7002W-7-F

2N7002W-7-F

+3.3V_RUN

2

3 1

Q34

Q34

2N7002W-7-F

2N7002W-7-F

SRC-6

SRC-6#

SRC-9

SRC-9#
SRC-10

SRC-10#

GND

CPU_BCLK

61

CPU_BCLK#

60
58

MCH_BCLK#

57

PCIE_MINI1

54

PCIE_MINI1#

53

DOT96_SSC

20

DOT96_SSC#

21

27M_SS

24

27M_NSS

25

PCIE_SATA

28

PCIE_SATA#

29

PCIE_MINI3

31

PCIE_MINI3#

32

MCH_3GPLL

34

MCH_3GPLL#

35
45

44

PCIE_EXPCARD

48

PCIE_EXPCARD#

47

MINI1CLK_REQ#_C MINI1CLK_REQ#

51
50

PCIE_MINI2

37

PCIE_MINI2#

38

PCIE_ICH

41

PCIE_ICH#

42

PCIE_LOM

40

PCIE_LOM#

39

65

R264 475/FR264 475/F

1 2

R266 475/FR266 475/F

1 2

+3.3V_RUN

PCI_ICH

Non-iAMT

2

4

RP26

RP26

2.2KX2

2.2KX2

1

3

CLK_SDATA

CLK_SCLK

5

R246 POP: For Internal pull-low.
R235 POP: For internal pull-high.

+3.3V_RUN

27M_SEL

1 2

1 2

1 2

1 2

R247

R247
*10K_NC

*10K_NC

R246

R246
*10K_NC

*10K_NC

R238

R238
*10K_NC

*10K_NC

R235

R235
10K

10K

6

CARD_CLK_REQ#CARD_CLK_REQ#_C

27M_SEL

27M_SEL
(PIN13)

0=UMA
1 = Disc.

GRFX down

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5

CLK_PCIE_MINI1 34
CLK_PCIE_MINI1# 34

MCH_DREFCLK 6

MCH_DREFCLK# 6

DREF_SSCLK 6
DREF_SSCLK# 6

CLK_PCIE_SATA 11
CLK_PCIE_SATA# 11

CLK_PCIE_MINI3 33
CLK_PCIE_MINI3# 33

CLK_MCH_3GPLL 6
CLK_MCH_3GPLL# 6

H_STP_PCI# 13
H_STP_CPU# 13

CLK_PCIE_EXPCARD 30
CLK_PCIE_EXPCARD# 30

MINI1CLK_REQ# 34
CARD_CLK_REQ# 30

CLK_PCIE_MINI2 33
CLK_PCIE_MINI2# 33

CLK_PCIE_ICH 12
CLK_PCIE_ICH# 12

CLK_PCIE_LOM 42
CLK_PCIE_LOM# 42

CLK_3GPLLREQ#
SATA_CLKREQ#
CARD_CLK_REQ#
MINI1CLK_REQ#
PCI_PCCARD

PCI_SIO

H_STP_PCI#
H_STP_CPU#

R276 10KR276 10K
R275 10KR275 10K

R453 10KR453 10K
R241 10KR241 10K
R267 10KR267 10K
R265 10KR265 10K
R249 *10K_NCR249 *10K_NC

R248 *10K_NCR248 *10K_NC

1 2

1 2

+3.3V_RUN

12
12

+3.3V_RUN

12
12
12
12

FSC FSB FSA CPU SRC PCI
1
0
0
0
0 0
1
1
1

1

100

10
1
1

0
1
1

133

1

166

0

200

0

266

0

333

0

400

1

RSVD

100
100
100
100
100
100
100
100

330
33
33
33
33
33
33
33

PIN20 PIN21 PIN24 PIN25

DOT96T

DOT96C

SRCT0 SRCC0

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

COMPUTER

CLOCK GENERATOR

CLOCK GENERATOR

CLOCK GENERATOR

FM8B 3A

FM8B 3A

FM8B 3A

7

96/
100M_T

27Mout

96/
100M_C

27MSSout

17 58Thursday, October 09, 2008

17 58Thursday, October 09, 2008

17 58Thursday, October 09, 2008

8

5

EXC24CG900U

HDMI_CLK-_L HDMI_CLK­HDMI_CLK+_L

D D

C C

HDMI_TX0+_L
HDMI_TX0-_L

HDMI_TX1-_L
HDMI_TX1+_L

HDMI_TX2-_L
HDMI_TX2+_L

EXC24CG900U

1 2

L4

L4

R27 *0_NCR27 *0_NC

1 2

R30 *0_NCR30 *0_NC

1 2

EXC24CG900U

EXC24CG900U

1 2

L9

L9

R38 *0_NCR38 *0_NC

1 2

R39 *0_NCR39 *0_NC

1 2

EXC24CG900U

EXC24CG900U

1 2

L5

L5

R31 *0_NCR31 *0_NC

1 2

R33 *0_NCR33 *0_NC

1 2

L8

L8

1 2

EXC24CG900U

EXC24CG900U

R35 *0_NCR35 *0_NC

1 2

R34 *0_NCR34 *0_NC

1 2

34

34

34

34

HDMI_CLK+

HDMI_TX0+
HDMI_TX0-

HDMI_TX1­HDMI_TX1+

HDMI_TX2­HDMI_TX2+

Reserve for EMI and close to HDMI CONN

4

R41

R41

*4.7K_NC

*4.7K_NC

HDMI_SCL

HDMI_SDA

HDMI_CLK+_L HDMI_CLK-_L
HDMI_TX0+_L HDMI_TX0-_L
HDMI_TX1+_L HDMI_TX1-_L
HDMI_TX2+_L HDMI_TX2-_L

12

12

R372 300R372 300
R376 300R376 300
R379 300R379 300
R381 300R381 300

3

+3.3V_RUN+3.3V_RUN

R32

R32
*4.7K_NC

*4.7K_NC

Q7

Q7

*2N7002W-7-F_NC

*2N7002W-7-F_NC

R28 0R28 0

*2N7002W-7-F_NC

*2N7002W-7-F_NC

R43 0R43 0

HDMI_CLK_C
HDMI_TX0_C
HDMI_TX1_C
HDMI_TX2_C

HDMI Connector

07-24 - 23
FOR EA TEST HDMI CHANGE

2

HDMI_SCL_R2

31

2

HDMI_SDA_R2

31

Q8

Q8

C410 0.1UC410 0.1U
C413 0.1UC413 0.1U
C422 0.1UC422 0.1U
C428 0.1UC428 0.1U

2

+5V_RUN

+5V_RUN

R42

R42

1.8K

1.8K

R101

R101
0

0

0603

0603

R16

R16

1.8K

1.8K

HDMI_TX2+
HDMI_TX2-

HDMI_TX1+
HDMI_TX1-

HDMI_TX0+
HDMI_TX0-

HDMI_CLK+
HDMI_CLK-

HDMI_SCL_R2
HDMI_SDA_R2

HDMI_DET

+HDMI_PWR

C387

C387
*0.1U_NC

*0.1U_NC

1

CN1

CN1

19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

LTS_ABA-HDM-018-K06

LTS_ABA-HDM-018-K06

12

C13

C13

0.1U

0.1U

10

10

SHELL1
D2+
D2 Shield
D2­D1+
D1 Shield
D1­D0+
D0 Shield
D0­CK+
CK Shield
CK­CE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET

SHELL2

20

21

+3.3V_RUN

12

L51

L51
BLM18PG181SN1

BLM18PG181SN1

+VCC_HDMI

B B

C406

C406

C407

C407

0.1U

0.1U

0.1U

0.1U

+3.3V_RUN

EQUALIZATION SETTING
PC1:PC0=0:0 8dB
PC1:PC0=0:1 4dB Recommanded
PC1:PC0=1:0 12dB
PC1:PC0=1:1 0dB

A A

SCLZ/SDAZ Low-level input/output Voltage
CFG1:CFG0=0:0 VIL:<0.4V VOL:0.6V (Default)
CGF1:CGF0=0:1 VIL:<0.36V VOL:0.55V
CGF1:CGF0=1:0 VIL:<0.44V VOL:0.65V
CGF1:CGF0=1:1 VIL:<0.36V VOL:0.6V

1 2

R390 2.2KR390 2.2K

1 2

R389 2.2KR389 2.2K

5

C426

C426

0.1U

0.1U

C98

C98

0.1U

0.1U

SDVO_CTRLCLK
SDVO_CTRLDATA

C86

C86

0.1U

0.1U

+3.3V_RUN

C440

C440

C439

C439

0.1U

0.1U

0.1U

0.1U

IN_CLK+6
IN_CLK-6

IN_D0+6
IN_D0-6

IN_D1+6
IN_D1-6

IN_D2+6

IN_D2-6
SDVO_CTRLCLK6
SDVO_CTRLDATA6

UMA_HDMI_HPD6

R361 4.7KR361 4.7K
R384 *4.7K_NCR384 *4.7K_NC
R387 *4.7K_NCR387 *4.7K_NC
R359 *4.7K_NCR359 *4.7K_NC
R358 *4.7K_NCR358 *4.7K_NC

R391 0R391 0

1 2

R388 *499/F_NCR388 *499/F_NC

C416

C416

0.1U

0.1U

DDC_EN
PC0
PC1
CFG0
CFG1

12

4

U27

U27

2

VCC

11

VCC

15

VCC

21

VCC

26

VCC

33

VCC

40
46

39
38

42
41

45
44

48
47

9
8
7

32

3

4
34
35

10
25

6

PI3VDP411LSZDE

PI3VDP411LSZDE

VCC
VCC

IN_D1+
IN_D1-

IN_D2+
IN_D2-

IN_D3+
IN_D3-

IN_D4+
IN_D4-

SCL
SDA
HPD

DDC_EN
PC0
PC1
DDCBUF_EN
CFG

RT_EN#
OE#
REXT

CONTROL

CONTROL

POWER

POWER

GND

GND

OUT_D1+

OUT_D1-

OUT_D2+

OUT_D2-

OUT_D3+

OUT_D3-

OUT_D4+

OUT_D4­SCL_SINK
SDA_SINK
HPD_SINK

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

EPAD

22
23

19
20

16
17

13
14

28
29
30

1
5
12
18
24
27
31
36
37
43
49

HDMI_CLK+_L
HDMI_CLK-_L

HDMI_TX0+_L
HDMI_TX0-_L

HDMI_TX1+_L
HDMI_TX1-_L

HDMI_TX2+_L
HDMI_TX2-_L

HDMI_SCL_R
HDMI_SDA_R

3

R365 0R365 0

1 2

R364 0R364 0

1 2

R363 1KR363 1K

0827 - CHANGE
FOR PIM Vender suggests
R386 : add 0 ohm short to Gnd
R388 : remove (open)

R362 *0_NCR362 *0_NC

1 2

R385 *0_NCR385 *0_NC

1 2

R386 0R386 0

1 2

R360 *0_NCR360 *0_NC

1 2

R357 *0_NCR357 *0_NC

1 2

HDMI_SCL
HDMI_SDA
HDMI_DETHDMI_DET_L

DDC_EN
PC0
PC1
CFG0
CFG1

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

COMPUTER

SiI 1362

SiI 1362

SiI 1362

FM8B 3A

FM8B 3A

FM8B 3A

18 58Thursday, October 09, 2008

18 58Thursday, October 09, 2008

18 58Thursday, October 09, 2008

1