QUANTA FM7B Schematics

1

2

3

4

5

6

7

8

FM7B Hepburn Intel UMA

POWER

PG 54

PG 15,16

PG 15,16

Cantiga

Audio
SPK conn

1

*FM7B M/B PCB*FM7B M/B PCB

SYSTEM
RESET CIRCUIT

BATT
CHARGER

RUN POWER SW

+3.3V_SUS/+5V_SUS
+5V/+3.3V/+1.8V

PG 35

AUDIO/AMP

92HD73C

667/800 MHZ DDR II

667/800 MHZ DDR II

SATA-ODD

PG 36

SATA-HDD

PG 36

PI2EQX3211BHE

PG 35

Camera + D-MIC

PG 40

Audio
Jacks x3

PG 41PG 40

USER
INTERFACE

PG 38

2

PG 44

PG 46

PG 53

SATA

SATA

SATA

IHDA
USB2.0

PG 41

KBC

ITE8512

SPI PS/2

FLASH
2Mbyts

PG 32 PG 37

Penryn

(478 Micro-FCPGA)

Cantiga

1329 uFCBGA

DMI interface

ICH9-M

676 BGA

LPC

18X8

PG 31

Touchpad

3

PG 3,4

1066 MHz FSB

PG 5,6,7,8,9,10

PG 11,12,13,14

CIR

TSOP36136TR

Keyboard

4

PG 37

PG 37

FAN & THERMAL

SMSC1423

CLOCK

SLG8SP513V
(QFN-64)

LVDS

SDVO

VGA

USB2.0 x 4
PCIEx1

PCIEx1
USB2.0

PCIEx2
USB2.0
PCIEx1
USB2.0
USB2.0

Biometric

PG 38

33MHz PCI

5

POWER

PG 39

+1.5V_RUN/+1.05V_VCCP

REGULATOR

PG 17

+1.8V_SUS/+1.25V_RUN
/+0.9V_DDR_VTT

PI3VDP411LSZDE

USB conn x 4

8-in-1 Card Reader

R5C833

A A

AC/BATT
CONNECTOR

DDR2-SODIMM1

B B

DDR2-SODIMM2

E-SATA Combo
with USB CONN

C C

D D

VER : D3B

PG 18

PG 35

6

PG 48

CPU VRREGULATOR

DC/DC

+3.3V_ALW/+5V_ALW/+15V_ALW

PG 49

HDMI

Panel Connector

HDMI CONN.

CRT CONN.

PG 26

PG 26

PG 27

LAN
BCM5784M

PG 42

RJ45/Magnetics

EXPRESS-CARD

R5538

MINI-CARD

WLAN

MINI-CARD

WWAN

MINI-CARD

WPAN

1394

1394 CONN.

Card Reader CONN.

Title

Title

Title

Schematic Block Diagram1

Schematic Block Diagram1

Schematic Block Diagram1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

FM7B 1A

FM7B 1A

FM7B 1A

Date: Sheet

Date: Sheet

Date: Sheet

PG 30

PG 34

PG 33

PG 33

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

7

PG 29

PG 30PG 28

PG 51

PG 52

160Monday, July 21, 2008

160Monday, July 21, 2008

160Monday, July 21, 2008

PG 43

of

of

of

8

1

2

3

4

5

6

7

8

Table of Contents Power States

PAGE DESCRIPTION

Schematic Block Diagram

1
2

Front Page

3-4

Merom

5-10

Crestline
ICH8M

A A

B B

C C

11-14

DDRII SO-DIMM(200P)

15-16

17

Clock Generator

18

HDMI

23

LCD Conn. & SSP

24

CRT Conn

25

SATA Conn

26-27

CARD READER/Conn & 1394

28

Express Card & Smart Card
Mini Card

29-30

31

SIO (ITE8512)

32

FLASH/RTC

33

USB

35

TP / KEYBOARD

36

SWITCH /LED

37

FAN & Thermal

Audio CODEC(ALC888)/Phone Jack

38-39

LOM / Switch

40-41

System Reset Circuit

44

Battery Selector & Charger

46

1.05VCCP / 1.5VRUJN

48
49

DDR2_1.8VSUS, 0.9V
CPU_ISL6266(2phase)

51

52

MAX8744 (+5.5V,+3,3V)
RUN Power Switch

53
54

DCIN,Batt
PAD& SCREW

55

EMI CAP

56
57

SMBUS BLOCK

Power Block Dianram

58

POWER PLANE

+PWR_SRC
+RTC_CELL
+3.3V_ALW
+5V_ALW
+15V_ALW
+3.3V_LAN
+5V_SUS
+3.3V_SUS
+1.8V_SUS
+0.9V_DDR_VTT
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+1.25V_RUN
+1.05V_VCCP
+VCC_CORE
+LCDVCC
+5V_MOD
+5V_HDD
+PBATT
+SBATT

10V~+19V

+3.0V~+3.3V

+3.3V
+5V
+15V
+3.3V
+5V
+3.3V
+1.8V
+0.9V
+5V
+3.3V
+1.8V
+1.5V
+1.25V
+1.05V

+0.7V~+1.77V

+3.3V
+5V

+5V
+10V~+17V
+10V~+17V

GND PLANE PAGE

8731AGND
AGND_0.9V
AGND_DC/DC
AGND_DC2
AGND_DDR
AGND_ISL6260

GND

46

49

52

48

49

51

ALL

4,26,32,34,46,48,49,51,52,56

11,14,31,32
3,31,32,34,36,37,38,44,46,49,52,53,54

35,36,46,48,49,52,53,54,56
26,36,37,52,53
42,43
14,38,51,53
3,11,12,13,14,26,30,37,38,43,48,49,51,53
6,8,9,15,48,49,53
16,49,53

14,18,27,36,37,38,39,40,41,53

14,18,27,36,37,38,39,40,41,53

18,38,53
4,9,14,30,33,34,48,53,56
6,9,14,49,53
3,4,5,6,8,9,11,14,48,56
4,51,56
26
36
36

DESCRIPTION

DESCRIPTION

MAIN POWER
RTC
8051 POWER
LCD/CHARGE POWER
LARGE POWER
LAN POWER
SLP_S5# CTRLD POWER
SLP_S5# CTRLD POWER
SODIMM POWER
SODIMM POWER
SLP_S3# CTRLD POWER
SLP_S3# CTRLD POWER
SDVO POWER
CALISTOGA/ICH8 POWER
CALISTOGA/ICH8 POWER
CPU/CALISTOGA/ICH8 POWER
CPU CORE POWER
LCD Power
Module Power
HDD Power
MAIN BATTERY
SECOND BATTERY

CONTROL
SIGNAL

ALWON
ALWON
+5V_ALW
AUX_ON
SUS_ON

3.3V_SUS_ON
DDR_ON

0.9V_DDR_VTT_ON
RUN_ON

3.3V_RUN_ON
RUN_ON

1.5V_RUN_ON

1.25V_RUN_ON

1.05V_RUN_ON
IMVP_VR_ON

LCDVCC_TST_EN
& ENVDD

MODC_EN#
HDDC_EN#
CHG_PBATT
CHG_SBATT

ACTIVE INVOLTAGE PAGE

S0~S5
S0~S5
S0~S5
S0~S5
S0~S5

D D

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

1

2

3

4

5

6

Date: Sheet

COMPUTER

Index & Power Status

Index & Power Status

Index & Power Status

FM6B 1A

FM6B 1A

FM6B 1A

7

of

of

of

260Monday, June 30, 2008

260Monday, June 30, 2008

260Monday, June 30, 2008

8

1

2

3

4

5

6

7

8

H_A#[3..16]5

A A

H_ADSTB#05
H_REQ#[0..4]5

H_A#[17..35]5

B B

H_ADSTB#15

H_A20M#11

H_FERR#11

H_IGNNE#11
H_STPCLK#11

H_INTR11
H_NMI11
H_SMI#11

C C

H_A#[3..16]

H_REQ#[0..4]

H_A#[17..35]

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

Populate ITP700Flex for bringup

+1.05V_VCCP

R21

R21

R24

R24

54.9/F

54.9/F

54.9/F

54.9/F

ITP_TDI
ITP_TMS
ITP_TCK
ITP_TDO
ITP_TRST#

H_RESET#

ITP_TCK

D D

C391

C391

*100P_NC

*100P_NC

1 2

50

50

R14 54.9/FR14 54.9/F

R15 54.9/FR15 54.9/F

1

R367 *0_NCR367 *0_NC

1 2

R368 *150/F_NCR368 *150/F_NC

1 2

Layout Note:
Place R8 close ITP.

CLK_ITP_BCLK#17
CLK_ITP_BCLK17

ITP_TCK

ITP_TRST#

U23A

U23A

J4

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

F6

TDI_1/RSV

D3

TDO_2/RSV

N5

BMP_1#[0]/RSV

M4

BMP_1#[1]/RSV

B2

BMP_1#[2]/RSV

AE8

BMP_1#[3]/VSS

D8

DCLKPH_1/VSS

F8

ACLKPH_1/VSS

D22

GTLREF_2/RSV

T2

THRMDA_1/RSV

V3

THRMDC_1/RSV

AA8

HFPLL_1/VSS

AC8

SPARE_1[4]/VSS

AA7

BR1#/VCC

Penryn Ball-out Rev 1a

Penryn Ball-out Rev 1a

R25

R25

54.9/F

54.9/F
JITP1

JITP1

1

TDI

2

TMS

5

TCK

7

TDO

3

TRST#

12

RESET#

11

FBO

8

BCLKN

9

BCLKP

10

GND0

14

GND1

16

GND2

18

GND3

20

GND4

22

GND5

2

ADDR GROUP 0 ADDR GROUP 1

ADDR GROUP 0 ADDR GROUP 1

BPRI#

DEFER#

DRDY#
DBSY#

CONTROL

CONTROL

IERR#

LOCK#

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HITM#

BPM[0]#

XDP/ITP SIGNALS

XDP/ITP SIGNALS

BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TRST#

THERMAL

THERMAL

PROCHOT#

THERMDA
THERMDC

ICH

ICH

THERMTRIP#

H CLK

H CLK

BCLK[0]
BCLK[1]

Quard Core Only

Quard Core Only

RSVD[06]

*ITP700Flex_NC

*ITP700Flex_NC

H1

ADS#

E2

BNR#

G5
H5

F21
E1

F1

BR0#

D20
B3

INIT#

H4
C1

F3
F4
G3
G2

G6

HIT#

E4
AD4

AD3
AD1
AC4
AC2
AC1
AC5

TCK

AA6

TDI

AB3

TDO

AB5

TMS

AB6
C20

DBR#

D21
A24
B25

C7

A22
A21

D2

Layout Note:
Place couple 0.1uF Decoupling
caps with in 0.1" ITP connector.

VTT0
VTT1

VTAP

DBR#
DBA#

BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#

NC0

NC1
GND_0
GND_1

R78 56R78 56

H_IERR#

1 2

R45 0 0603R45 0 0603

1 2

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_DBRESET#

R43 56R43 56

1 2

H_PROCHOT#
H_THERMDA
H_THERMDC

H_THERM

H_THERM

R8056R80

56

1 2

C450 *2200P_NC

C450 *2200P_NC

H_THERMDA H_THERMDC

27
28
26

25
24

23
21
19
17
15
13
4
6
29
30

1 2

50

50

+1.05V_VCCP +3.3V_SUS

C390 *0.1U_NC 10C390 *0.1U_NC 10

12

C393 *0.1U_NC 10C393 *0.1U_NC 10

12

Layout Note:
Place R74,R26,
R19, R23, R16
, R17 close to
CPU

3

R83 150R83 150

ITP_DBRESET#

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

H_ADS# 5
H_BNR# 5
H_BPRI# 5

H_DEFER# 5
H_DRDY# 5
H_DBSY# 5
H_BR0# 5

+1.05V_VCCP

H_INIT# 11
H_LOCK# 5

H_RESET#

H_RS#0 5
H_RS#1 5
H_RS#2 5
H_TRDY# 5

H_HIT# 5
H_HITM# 5

ITP_DBRESET# 13

4/23-38

+1.05V_VCCP

T5PAD T5PAD

H_THERMDA 39

H_THERMDC 39

+1.05V_VCCP

CLK_CPU_BCLK 17
CLK_CPU_BCLK# 17

T3PAD T3PAD

2/18-5

1 2

+1.05V_VCCP

R17

R17

*54.9/F_NC

*54.9/F_NC

H_D#[0..63]5

6/27-50

+1.05V_VCCP

Layout Note:
Place R44

12

close to

R44

R44
*51/F_NC

*51/F_NC

CPU.

H_RESET# 5

Layout Note:
Place voltage
divider within

0.5" of GTLREF
pin

+1.05V_VCCP

R386

R386
1K/F

1K/F

1 2
12

R387

R387
2K/F

2K/F

+1.05V_VCCP

+3.3V_ALW

H_DSTBN#05
H_DSTBP#05
H_DINV#05

H_D#[0..63]5

H_DSTBN#15
H_DSTBP#15
H_DINV#15

CPU_MCH_BSEL06,17
CPU_MCH_BSEL16,17
CPU_MCH_BSEL26,17

R53 *1K/F_NCR53 *1K/F_NC
R52 *1K/F_NCR52 *1K/F_NC

Voltage Level shift

R38

R38
*2.2K_NC

*2.2K_NC

2

H_PROCHOT#

H_THERM

Q47

Q47

MMST3904-7-F

MMST3904-7-F

Q11

Q11

+3.3V_RUN

2

1 2

31

*2N7002W-7-F_NC

*2N7002W-7-F_NC

R391

R391
10M

10M

2

12

C442

C442

0.1U

0.1U

1 3

10

10

CPU_PROCHOT#

31

Q41

Q41
2N7002W-7-F

2N7002W-7-F

ITP disable guidelines

Signal Resistor Value Connect To Resistor Placement

TDI

150 ohm +/- 5%
TMS
TRST#
TCK
TDO

39 ohm +/- 5%

680 ohm +/- 5%

27 ohm +/- 5%

Open

VTT
GND
GND
VTT

ITP_EN R268 Depop +3VRUN Close to CK410M Pin8

4

H_D#[0..63] H_D#[0..63]

H_D#[0..63]

12
12

T87PAD T87PAD
T85PAD T85PAD
T84PAD T84PAD
T86PAD T86PAD
T4PAD T4PAD

H_THERMTRIP# 6,52

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

V_CPU_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6
CPU_TEST7

U23B

U23B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

C3

TEST7

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

Penryn Ball-out Rev 1a

Penryn Ball-out Rev 1a

DATA GRP 0

DATA GRP 2

DATA GRP 0

DATA GRP 2

DSTBN[2]#
DSTBP[2]#

DINV[2]#

DATA GRP 1

DATA GRP 1

DATA GRP 3

DATA GRP 3

DSTBN[3]#
DSTBP[3]#

DINV[3]#
COMP[0]

MISC

MISC

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

Within 2.0" of the ITPVTT
Within 2.0" of the ITP
Within 2.0" of the ITP

Title

Title

Within 2.0" of the ITP
Within 2.0" of the ITP

5

6

Title

Merom Processor (HOST BUS)

Merom Processor (HOST BUS)

Merom Processor (HOST BUS)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

FM7B 1A

FM7B 1A

FM7B 1A

Date: Sheet

Date: Sheet

Date: Sheet

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

H_D#[0..63]
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

Note:
H_DPRTSTP need to daisy chain
from ICH9 to IMVP6 to CPU.

FSB

BCLK

533 0 0

133

667

166

800

200

H_D#[0..63] 5

H_DSTBN#2 5
H_DSTBP#2 5
H_DINV#2 5

H_D#[0..63] 5

H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#3 5

H_DPRSTP# 6,11,51
H_DPSLP# 11
H_DPWR# 5
H_PWRGOOD 11
H_CPUSLP# 5
H_PSI# 51

BSEL2 BSEL1 BSEL0

1

0

1

1

00

1

0002661066

COMP0
COMP1
COMP2
COMP3

R28

R28

R27

R29

R29

54.9/F

54.9/F

1 2

Comp0,2 connect with Zo=27.4ohm,Comp1,3
connect with Zo=55ohm, make those traces
length shorter than 0.5".Trace should be
at least 25 mils away from any other
toggling signal.

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

7

R27

R30

27.4/F

27.4/F

1 2

R30

54.9/F

54.9/F

27.4/F

27.4/F

1 2

1 2

of

of

of

360Wednesday, July 16, 2008

360Wednesday, July 16, 2008

360Wednesday, July 16, 2008

8

1

2

3

4

5

6

7

8

+VCC_CORE +VCC_CORE

+VCC_CORE

A A

+VCC_CORE

All use 10U 4V(+-20%,X6S,0805)Pb-Free.

C15

C15
10U

10U

0805

0805
4

4

C20

C20
10U

10U

0805

0805
4

4

12

C16

C16
*10U_NC

*10U_NC

0805

0805
4

4

12

C21

C21
*10U_NC

*10U_NC

0805

0805
4

4

12

12

C17

C17
10U

10U

0805

0805
4

4

C22

C22
10U

10U

0805

0805
4

4

12

12

12

12

C18

C18
10U

10U

0805

0805
4

4

C23

C23
10U

10U

0805

0805
4

4

12

C19

C19
10U

10U

0805

0805
4

4

12

C24

C24
10U

10U

0805

0805
4

4

8 inside cavity, north side, secondary layer.

+VCC_CORE

C48

C48
10U

10U

0805

0805
4

4

C427

C427
10U

10U

0805

0805
4

4

12

12

12

B B

+VCC_CORE

12

C51

C51
*10U_NC

*10U_NC

0805

0805
4

4

C426

C426
*10U_NC

*10U_NC

0805

0805
4

4

12

12

C46

C46
*10U_NC

*10U_NC

0805

0805
4

4

C50

C50
10U

10U

0805

0805
4

4

12

C418

C418
10U

10U

0805

0805
4

4

12

C429

C429
10U

10U

0805

0805
4

4

12

C37

C37
10U

10U

0805

0805
4

4

12

C430

C430
10U

10U

0805

0805
4

4

8 inside cavity, south side, secondary layer.

+VCC_CORE

C45

C45
10U

10U

0805

0805
4

4

12

C428

C428
10U

10U

0805

0805
4

4

12

C38

C38
10U

10U

0805

0805
4

4

12

C47

C47
10U

10U

0805

0805
4

4

12

C49

C49
10U

10U

0805

0805
4

4

12

C431

C431
*10U_NC

*10U_NC

0805

0805
4

4

12

6 inside cavity, north side, primary layer.

+VCC_CORE

C C

12

C413

C413
10U

10U

0805

0805
4

4

12

C414

C414
*10U_NC

*10U_NC

0805

0805
4

4

12

C415

C415
10U

10U

0805

0805
4

4

12

C417

C417
*10U_NC

*10U_NC

0805

0805
4

4

12

C416

C416
10U

10U

0805

0805
4

4

12

C52

C52
10U

10U

0805

0805
4

4

6 inside cavity, south side, primary layer.

+1.05V_VCCP

12

Layout out:
Place these inside socket cavity on North side secondary.

D D

C25

C25

0.1U

0.1U

10

10

12

C27

C27

0.1U

0.1U

10

10

12

C26

C26

0.1U

0.1U

10

10

12

C39

C39

0.1U

0.1U

10

10

12

C36

C36

0.1U

0.1U

10

10

12

C40

C40

0.1U

0.1U

10

10

+PWR_SRC

+

+

C409

C409
*100U_NC

*100U_NC

25

25

Layout Note:
Need to add 100uF cap on PWR_SRC for cap singing.
Place on PWR_SRC near +VCC_CORE.

U23C

U23C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

Penryn Ball-out Rev 1a

Penryn Ball-out Rev 1a

+

+

C424

C424
100U

100U

25

25

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCA[01]
VCCA[02]

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VCCSENSE

VSSSENSE

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

VCCSENSE

AF7

VSSSENSE

AE7

.

.

+

+

C412

C412
100U

100U

25

25

5/7

+1.05V_VCCP

+

+

C30

C30

220uF

220uF

VID0 51
VID1 51
VID2 51
VID3 51
VID4 51
VID5 51
VID6 51

VCCSENSE 51

VSSSENSE 51

+

+

C421

C421
*100U_NC

*100U_NC

25

25

+1.5V_RUN

12

Layout Note:
Place C468 near PIN
B26.

VCCSENSE
VSSSENSE

Route VCCSENSE and VSSSENSE
traces at 27.4ohms and
length matched to within 25
mil. Place PU and PD within
2 inch of CPU.

C444

C444

0.01U

0.01U

25

25

+VCC_CORE

12

12

12

R13

R13
100/F

100/F

R12

R12
100/F

100/F

C443

C443
10U

10U

0805

0805
4

4

U23D

U23D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]
VSS[081]P3VSS[162]

Penryn Ball-out Rev 1a

Penryn Ball-out Rev 1a

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]

VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]

VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]

VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5

AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6

AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4

AE11
AE14
AE16
AE19

.

.
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

1

2

3

4

5

6

Date: Sheet

COMPUTER

Merom Processor (POWER)

Merom Processor (POWER)

Merom Processor (POWER)

FM7B 1A

FM7B 1A

FM7B 1A

7

of

of

of

460Wednesday, July 16, 2008

460Wednesday, July 16, 2008

460Wednesday, July 16, 2008

8

1

2

3

4

5

6

7

8

U28A

AD14

AA13
AA11

AD11
AD10
AD13
AE12

AE14

AE11

AG2
AD6

M11

N12

P13

N10

Y10
Y12
Y14

AA8

AA9

AE9
AA2
AD8
AA3
AD3
AD7

AF3
AC1
AE3
AC3

AE8

C12
E11

A11
B11

F2

G8

F8
E6
G2
H6
H2

F6
D4
H3
M9

J1

J2

J6
P2

L2
R2
N9

L6
M5

J3
N2
R1
N5
N6

N8

L7
M3

Y3
Y6

Y7

W2

Y9

C5
E3

U28A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING
H_RCOMP

H_CPURST#
H_CPUSLP#

H_AVREF
H_DVREF

CANTIGA_1p0

CANTIGA_1p0

4

H_ADSTB#_0
H_ADSTB#_1

HOST

HOST

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

H_A#3

A14

H_A#4

C15

H_A#5

F16

H_A#6

H13

H_A#7

C18

H_A#8

M16

H_A#9

J13

H_A#10

P16

H_A#11

R16

H_A#12

N17

H_A#13

M13

H_A#14

E17

H_A#15

P17

H_A#16

F17

H_A#17

G20

H_A#18

B19

H_A#19

J16

H_A#20

E20

H_A#21

H16

H_A#22

J20

H_A#23

L17

H_A#24

A17

H_A#25

B17

H_A#26

L16

H_A#27

C21

H_A#28

J17

H_A#29

H20

H_A#30

B18

H_A#31

K17

H_A#32

B20

H_A#33

F21

H_A#34

K21

H_A#35

L20
H12

B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

J8
L3
Y13
Y1

L10
M7
AA5
AE6

L9
M8
AA6
AE5

B15
K13
F13
B13
B14

B6
F12
C8

5

H_D#[0..63]3

A A

+1.05V_VCCP

12

R98

R98
221/F

221/F

H_SWING

12

R99

R99
100/F

100/F

B B

R108

R108

24.9/F

24.9/F

Layout Note:

1 2

H_RCOMP trace should be
10-mil wide with 20-mil
spacing.

C C

D D

1

H_RCOMP

2

C69

C69

0.1U

0.1U

1 2

10

10

+1.05V_VCCP

R417

R417
1K/F

1K/F

1 2

12

R416

R416
2K/F

2K/F

H_D#[0..63]

H_SWING
H_RCOMP

H_RESET#3

H_CPUSLP#3

H_REF

12

C457

C457

0.1U

0.1U

10

10

Layout Note:
Place the 0.1 uF
decoupling capacitor
within 100 mils from
GMCH pins.

3

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_A#[3..35]

H_ADS# 3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR# 3
H_BPRI# 3
H_BR0# 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 17
CLK_MCH_BCLK# 17
H_DPWR# 3
H_DRDY# 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3

H_DINV#0 3
H_DINV#1 3
H_DINV#2 3
H_DINV#3 3

H_DSTBN#0 3
H_DSTBN#1 3
H_DSTBN#2 3
H_DSTBN#3 3

H_DSTBP#0 3
H_DSTBP#1 3
H_DSTBP#2 3
H_DSTBP#3 3

H_REQ#0 3
H_REQ#1 3
H_REQ#2 3
H_REQ#3 3
H_REQ#4 3

H_RS#0 3
H_RS#1 3
H_RS#2 3

6

H_A#[3..35] 3

+1.05V_VCCP +1.05V_VCCP +1.05V_VCCP +1.05V_VCCP

C109

C126

C126
*0.1U_NC

*0.1U_NC

1 2

10

10

+1.05V_VCCP +1.05V_VCCP +1.05V_VCCP

C119

C119
*0.1U_NC

*0.1U_NC

1 2

10

10

Layout Note:
C131 should be near AB1,AB2,AC2,Y3

C109
*0.1U_NC

*0.1U_NC

1 2

10

10

C124

C124
*0.1U_NC

*0.1U_NC

1 2

10

10

1 2

1 2

C130

C130
*0.1U_NC

*0.1U_NC

10

10

C98

C98
*0.1U_NC

*0.1U_NC

10

10

C113

C113
*0.1U_NC

*0.1U_NC

1 2

10

10

C90 should be near AD2,AE2,AG3,AE3

C113 should be near
AC5,AC6,AD7,AC7,AC9,AD9,AD11,AC11,AD12,AD13,AC14

C127 should be near E2,F3,H2,H3,G4,H5,G7,H7

C129 should be near
M6,L7,K9,M7,N8,N9,M10,M11,N12,P13

C149 should be near
H13,J13,L13,M14,L16,K16,J17,H17

C146 should be near
E13,G17,F16,C15,B14,C11,B11,A11,B12

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

COMPUTER

Crestline (HOST)

Crestline (HOST)

Crestline (HOST)

FM7B 1A

FM7B 1A

FM7B 1A

7

of

of

of

560Wednesday, July 16, 2008

560Wednesday, July 16, 2008

560Wednesday, July 16, 2008

8

5

U28B

+1.8V_SUS

R197

R197
1K/F

1K/F

12

C190

C190

2.2U

2.2U

0805

0805
10

10

12

C199

C199

2.2U

2.2U

0805

0805
10

10

56

PAD

PAD

PAD

PAD
PADT8PAD

PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD
PAD

PAD

PAD

PAD
PAD

PAD

THERMTRIP_MCH#

T21PAD T21PAD
T27

T27

12

T19PAD T19PAD
T15

T15
T8

12

T13

T13

T16

T16

T26

T26
T30

T30
T25

T25
T18

T18

12

T12

T12
T24

T24

12

12

R470

R470
R4690R469

R143 *0_NCR143 *0_NC

5

1 2
12

R208

R208

3.01K/F

3.01K/F

R210

R210
1K/F

1K/F

1 2

PM_EXTTS#0
PM_EXTTS#1

PM_EXTTS#0
PM_EXTTS#1

PLTRST#_R
THERMTRIP_MCH#

1 2

R147 0R147 0

*0_NC

*0_NC

1 2

SM_RCOMP_VOH

12

C185

C185

0.01U

0.01U

25

D D

C C

B B

A A

25

SM_RCOMP_VOL

12

C193

C193

0.01U

0.01U

25

25

+3.3V_RUN

R129 10KR129 10K

1 2

R130 10KR130 10K

1 2

+1.05V_VCCP

R13756R137

1 2

Layout Note:
Location of all MCH_CFG strap
resistors needs to be close to
minmize stub.

CPU_MCH_BSEL03,17
CPU_MCH_BSEL13,17
CPU_MCH_BSEL23,17

R106 *4.02K/F_NCR106 *4.02K/F_NC

R105 *4.02K/F_NCR105 *4.02K/F_NC

R119 *4.02K/F_NCR119 *4.02K/F_NC

+3.3V_RUN

R135 *4.02K/F_NCR135 *4.02K/F_NC
R136 *4.02K/F_NCR136 *4.02K/F_NC

PM_BMBUSY#13

H_DPRSTP#3,11,51
PM_EXTTS#015
PM_EXTTS#115
ICH_PWRGD13,44

DPRSLPVR13,51

SB_NB_PCIE_RST#12

PLTRST#12,30,31,33,34,42

H_THERMTRIP#3,52

M36
N36
R33
T33

AH9
AH10
AH12
AH13

K12

AL34
AK34
AN35

AM35

T24

B31

AJ6

AY21

A47
BG23

BF23

BH18

BF18

T25

R25

P25

CFG3

P20

CFG4

P24

CFG5

C25

CFG6

N24

CFG7

M24

CFG8

E21

CFG9

C23

CFG10

C24

CFG11

N21

CFG12

P21

CFG13

T21

CFG14

R20

CFG15

M20

CFG16

L21

CFG17

H21

CFG18

P29

CFG19

R28

CFG20

T28

R29

N33

P32

AT40
AT11

T20

R32

BG48

BF48
BD48
BC48
BH47
BG47
BE47
BH46

BF46
BG45
BH44
BH43

BH6

BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1

R466

R466

0

THERMTRIP_MCH#

U28B

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14

RSVD15
RSVD16

M1

RSVD17

RSVD20

RSVD21
RSVD22
RSVD23
RSVD24
RSVD25

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

PM_SYNC#

B7

PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24

F1

NC_25

CANTIGA_1p0

CANTIGA_1p0

100

100

PLTRST#_R

12

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

SA_CK#_0
SA_CK#_1
SB_CK#_0

SB_CK#_1
SA_CKE_0

SA_CKE_1

RSVD

RSVD

CFG

CFG

PM

PM

NC

NC

SB_CKE_0
SB_CKE_1

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_VREF

DDR CONTROL/COMPENSATION

DDR CONTROL/COMPENSATION

SM_PWROK

SM_REXT

SM_DRAMRST#
DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

CLK

CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0

DMI

DMI

DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

GFX_VR_EN

GRAPHICS VID

GRAPHICS VID

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

MEHDA

MEHDA

CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

MISC

MISC

HDA_BCLK
HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

TSATN

AP24
AT21
AV24
AU20

AR24
AR21
AU24
AV20

BC28
AY28
AY36
BB36

BA17
AY16
AV16
AR13

BD17
AY17
BF15
AY13

BG22
BH21

BF28
BH28

AV42
AR36
BF17
BC36

B38
A38
E41
F41

F43
E43

AE41
AE37
AE47
AH39

AE40
AE38
AE48
AH40

AE35
AE43
AE46
AH42

AD35
AE44
AF46
AH43

B33
B32
G33
F33
E33

C34

AH37
AH36
AN36
AJ35
AH34

N28
M28
G36
E36
K36
H36

B12

B28
B30
B29
C29
A28

4

SMRCOMPP
SMRCOMPN

SM_RCOMP_VOH
SM_RCOMP_VOL

MCH_CLVREF

4

M_CLK_DDR0 15
M_CLK_DDR1 15
M_CLK_DDR3 15
M_CLK_DDR4 15

M_CLK_DDR#0 15
M_CLK_DDR#1 15
M_CLK_DDR#3 15
M_CLK_DDR#4 15

DDR_CKE0_DIMMA 15,16
DDR_CKE1_DIMMA 15,16
DDR_CKE3_DIMMB 15,16
DDR_CKE4_DIMMB 15,16

DDR_CS0_DIMMA# 15,16
DDR_CS1_DIMMA# 15,16
DDR_CS2_DIMMB# 15,16
DDR_CS3_DIMMB# 15,16

M_ODT0 15,16
M_ODT1 15,16
M_ODT2 15,16
M_ODT3 15,16

V_DDR_MCH_REF_L

R187 0R187 0

1 2

R199 499/FR199 499/F

1 2

T33 PADT33 PAD

MCH_DREFCLK 17
MCH_DREFCLK# 17
DREF_SSCLK 17
DREF_SSCLK# 17

CLK_MCH_3GPLL 17
CLK_MCH_3GPLL# 17

DMI_MRX_ITX_N0 12
DMI_MRX_ITX_N1 12
DMI_MRX_ITX_N2 12
DMI_MRX_ITX_N3 12

DMI_MRX_ITX_P0 12
DMI_MRX_ITX_P1 12
DMI_MRX_ITX_P2 12
DMI_MRX_ITX_P3 12

DMI_MTX_IRX_N0 12
DMI_MTX_IRX_N1 12
DMI_MTX_IRX_N2 12
DMI_MTX_IRX_N3 12

DMI_MTX_IRX_P0 12
DMI_MTX_IRX_P1 12
DMI_MTX_IRX_P2 12
DMI_MTX_IRX_P3 12

T6 PADT6 PAD
T7 PADT7 PAD
T17 PADT17 PAD
T14 PADT14 PAD
T9

PADT9PAD

PAD

PAD

T10

T10

CL_CLK0 13
CL_DATA0 13
ICH_CL_PWROK 13,31

ICH_CL_RST0# 13

T22 PADT22 PAD
T23 PADT23 PAD

SDVO_CTRLCLK 18

SDVO_CTRLDATA 18
CLK_3GPLLREQ# 17
MCH_ICH_SYNC# 13

R415 56R415 56

12

ICH_AZ_HDMI_BITCLK 11
ICH_AZ_HDMI_RST# 11

ICH_AZ_HDMI_SDIN1 11

ICH_AZ_HDMI_SDOUT 11
ICH_AZ_HDMI_SYNC 11

+1.8V_SUS

+1.05V_VCCP

+3.3V_RUN

2/26-20

R207

R207
*1K/F_NC

*1K/F_NC

1 2

R206 0R206 0

1 2

R198

R198
*1K/F_NC

*1K/F_NC

1 2

SMRCOMPP
SMRCOMPN

Non-iAMT

+1.8V_SUS

R200

R200

80.6/F

80.6/F

R205

R205

80.6/F

80.6/F

MCH_CLVREF

C132

C132

0.1U

0.1U

1 2

10

10

R425 10K/F_4R425 10K/F_4
R89 10K/F_4R89 10K/F_4

L_IBG

R104

R104

2.4K/F

2.4K/F

1 2

UMA

V_DDR_MCH_REF

2/26-20

12

12

+1.05V_VCCP

R166

R166
1K/F

1K/F

1 2
12

R172

R172
499/F

499/F

3

U28C

U28C

BIA_PWM26
PANEL_BKEN31

LCD_DDCCLK26
LCD_DDCDAT26

ENVDD26

T11PAD T11PAD

LCD_ACLK-26
LCD_ACLK+26
LCD_BCLK-26
LCD_BCLK+26

LCD_A0-26
LCD_A1-26
LCD_A2-26

LCD_A0+26
LCD_A1+26
LCD_A2+26

LCD_B0-26
LCD_B1-26
LCD_B2-26

LCD_B0+26
LCD_B1+26
LCD_B2+26

R68 75/F_4R68 75/F_4
R67 75/F_4R67 75/F_4
R65 75/F_4R65 75/F_4

VGA_BLU27
VGA_GRN27
VGA_RED27

G_CLK_DDC227
G_DAT_DDC227

VGAHSYNC27
VGAVSYNC27

VGA_BLU
VGA_GRN
VGA_RED

R107 30/FR107 30/F

1 2

R102 1K/FR102 1K/F

1 2

R109 30/FR109 30/F

1 2

R111

R111

R101

R101

150/F

150/F

150/F

150/F

1 2

1 2

1 2

CFG5

CFG9

CFG16

CFG19

CFG20

SDVO_CRTL_DATA

3

L32

G32

L_CTRL_CLK

M32

L_CTRL_DATA

M33

LCD_DDCCLK

K33

LCD_DDCDAT

J33

M29

L_IBG

C44
B43
E37
E38
C41
C40
B37
A37

H47
E46
G40
A40

H48
D45
F40
B40

A41
H38
G37

J37

B42
G38
F37
K37

F25
H25
K25

H24

C31
E32

E28
G28

J28
G29
H32

J32

J29
E29

L29

VGA_BLU
VGA_GRN
VGA_RED

R117

R117

Layout Note:

150/F

150/F

Place 150 ohm
termination resistors
close to GMCH.

DMI X2 Select
PCI Express

Graphic Lane
FSB Dynamic

ODT
DMI Lane

Reversal

SDVO/PCIE
Concurrent
Operation

SDVO Present.

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK

L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA

L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

TVA_DAC
TVB_DAC
TVC_DAC

TV_RTN

TV_DCONSEL_0
TV_DCONSEL_1

CRT_BLUE
CRT_GREEN
CRT_RED
CRT_IRTN
CRT_DDC_CLK

CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

CANTIGA_1p0

CANTIGA_1p0

LVDS

LVDS

TV

TV

UMA

+3.3V_RUN

Low=DMIx2
High=DMIx4(Default)

Low= Reveise Lane
High=Normal operation

Low=Dynamic ODT Disable
High=Dynamic ODT Enable(default).

Low=Normal(default).
High=Lane Reversed

Low=Only SDVO or PCIEx1 is
operational (defaults)
High=SDVO and PCIEx1 are operating
simultaneously via PEG port

Low=No SDVO Device Present
(default)
High=SDVO Device Present

2

R145 49.9/FR145 49.9/F

VCC3G_PCIE_R

T37

PEG_COMPI

T36

PEG_COMPO

H44

PEG_RX#_0

J46

PEG_RX#_1

L44

PEG_RX#_2

L40

PEG_RX#_3

N41

PEG_RX#_4

P48

PEG_RX#_5

N44

PEG_RX#_6

T43

PEG_RX#_7

U43

PEG_RX#_8

Y43

PEG_RX#_9

Y48

PEG_RX#_10

Y36

PEG_RX#_11

AA43

PEG_RX#_12

AD37

PEG_RX#_13

AC47

PEG_RX#_14

AD39

PEG_RX#_15

H43

PEG_RX_0

J44

PEG_RX_1

L43

PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8

PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8

PEG_TX#_9
PEG_TX#_10
PEG_TX#_11

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

PEG_TX_0
PEG_TX_1
PEG_TX_2

VGA

VGA

PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8

PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

R121 2.2KR121 2.2K
R122 2.2KR122 2.2K

2

12
12

L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

UMA_HDMI_HPD18

LCD_DDCCLK
LCD_DDCDAT

PCIE_MRX_GTX_P3

PCIE_MTX_GRX_C_N0PCIE_MTX_GRX_C_N0
PCIE_MTX_GRX_C_N1PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_N2PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N3PCIE_MTX_GRX_C_N3

PCIE_MTX_GRX_C_P0PCIE_MTX_GRX_C_P0
PCIE_MTX_GRX_C_P1PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_C_P2PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_C_P3PCIE_MTX_GRX_C_P3

UMA

1

+VCC_PEG

12

C82 0.1U 10C82 0.1U 10

1 2

C482 0.1U 10C482 0.1U 10

1 2

C490 0.1U 10C490 0.1U 10

1 2

C95 0.1U 10C95 0.1U 10

1 2

C78 0.1U 10C78 0.1U 10

1 2

C478 0.1U 10C478 0.1U 10

1 2

C485 0.1U 10C485 0.1U 10

1 2

C89 0.1U 10C89 0.1U 10

1 2

+3.3V_RUN

R139

R139
20K/F

20K/F

UMA_HDMI_HP#

31

2

2N7002W-7-F

2N7002W-7-F
Q20

Q20

R142

R142
100K

100K

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

COMPUTER

Crestline (VGA,DMI)

Crestline (VGA,DMI)

Crestline (VGA,DMI)

FM7B 1A

FM7B 1A

FM7B 1A

R140 0R140 0

1 2

R141

R141

7.5K/F

7.5K/F

1

IN_D2- 18
IN_D1- 18
IN_D0- 18
IN_CLK- 18

IN_D2+ 18
IN_D1+ 18
IN_D0+ 18
IN_CLK+ 18

PCIE_MRX_GTX_P3

660Wednesday, July 16, 2008

660Wednesday, July 16, 2008

660Wednesday, July 16, 2008

of

of

of

1

2

3

4

5

6

7

8

DDR_A_D[0..63]15

A A

B B

C C

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AJ38
AJ41

AN38

AM38

AJ36

AJ40
AM44
AM42

AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36

AW36

BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12

BB9
BA9

AU10

AV9

BA11

BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5

AN10

AM11

AM5

AN12

AM13

AJ11

AJ12

AJ9
AJ8

U28D

U28D

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

CANTIGA_1p0

CANTIGA_1p0

DDR_A_BS0

BD21

SA_BS_0
SA_BS_1
SA_BS_2

SA_RAS#
SA_CAS#

SA_WE#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_MA_14

BG18
AT25

BB20
BD20
AY20

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

DDR_A_BS1
DDR_A_BS2

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

DDR_A_BS0 15,16
DDR_A_BS1 15,16
DDR_A_BS2 15,16

DDR_A_RAS# 15,16
DDR_A_CAS# 15,16

DDR_A_WE# 15,16

DDR_A_DM[0..7] 15

DDR_A_DQS[0..7] 15

DDR_A_DQS#[0..7] 15

DDR_A_MA[0..14] 15,16

DDR_B_D[0..63]15

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AK47
AH46
AP47
AP46

AJ46
AJ48

AM48

AP48
AU47
AU46

BA48

AY48

AT47

AR47

BA47

BC47

BC46

BC44

BG43

BF43

BE45

BC41

BF40

BF41

BG38

BF38

BH35

BG35

BH40

BG39

BG34

BH34

BH14

BG12

BH11

BG8
BH12
BF11

BG7

BC5

BC6

AY3

AY1

BA1

BD3

AV2

AU3

AR3

AN2

AY2

AV1

AP3

AR1

AH1

AM2

AM3

AH3

BF8

BF6
BF5

AL1
AL2
AJ1

AJ3

U28E

U28E

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

CANTIGA_1p0

CANTIGA_1p0

DDR_B_BS0

BC16

SB_BS_0
SB_BS_1
SB_BS_2

SB_RAS#
SB_CAS#

SB_WE#

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_MA_14

BB17
BB33

AU17
BG16
BF14

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

DDR_B_BS1
DDR_B_BS2

DDR_B_RAS#

DDR_B_CAS#
DDR_B_WE#

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

DDR_B_BS0 15,16
DDR_B_BS1 15,16
DDR_B_BS2 15,16

DDR_B_RAS# 15,16
DDR_B_CAS# 15,16
DDR_B_WE# 15,16

DDR_B_DM[0..7] 15

DDR_B_DQS[0..7] 15

DDR_B_DQS#[0..7] 15

DDR_B_MA[0..14] 15,16

D D

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

1

2

3

4

5

6

Date: Sheet

COMPUTER

Crestline (DDR2)

Crestline (DDR2)

Crestline (DDR2)

FM7B 1A

FM7B 1A

FM7B 1A

7

of

of

of

760Wednesday, July 16, 2008

760Wednesday, July 16, 2008

760Wednesday, July 16, 2008

8

5

U28G

AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32

AW32

AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29

AW29

AV29
AU29
AT29
AR29
AP29

BA36
BB24
BD16

BB21
AW16
AW13

AT13

AE25

AB25

AA25

AE24

AC24

AA24

AE23

AC23

AB23

AA23

AJ21
AG21
AE21
AC21
AA21

AH20
AF20
AE20
AC20
AB20
AA20

AM15

AL15
AE15

AJ15
AH15
AG15
AF15
AB15
AA15

AN14

AM14

AJ14
AH14

Y26

Y24

Y21

T17
T16

Y15
V15
U15

U14
T14

5

U28G

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35

VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42

VCC_AXG_SENSE
VSS_AXG_SENSE

CANTIGA_1p0

CANTIGA_1p0

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8

VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21

POWER

POWER

VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30

VCC SMVCC GFX

VCC SMVCC GFX

VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC SM LF

VCC SM LF

+1.8V_SUS

D D

C C

+1.05V_VCCP

B B

+1.05V_VCCP

R17410R174
10

1 2

A A

R17310R173
10

1 2

UMA: Places R721, R726 to 10 ohm.
Dis: Please R721, R726 to 0 ohm.

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

AV44
BA37
AM40
AV21
AY5
AM10
BB13

4

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

4

12

C105

C105

0.1U

0.1U

10

10

12

C184

C184

0.1U

0.1U

10

10

Layout Note:
370 mils from edge.

+VCC_AXG_NCTF

12

C137

C137

0.1U

0.1U

10

10

12

C157

C157

0.1U

0.1U

10

10

3

+1.05V_VCCP

5/7

+

+

Layout Note:
Inside GMCH cavity for VCC_AXG.

12

C121

C121
22U

22U

0805

0805
4

4

12

C162

C162
10U

10U

0603

0603

6.3

6.3

+1.8V_SUS

12

12

C181

C181

C171

C171

0.22U

0.22U

0.22U

0.22U

0603

0603

0603

0603

10

10

10

10

12

C106

C106
220U

220U

12

Layout Note:
Place C195 where LVDS
and DDR2 taps.

C479

C479
22U

22U

0805

0805
4

4

Layout Note:
Inside GMCH cavity.

12

C149

C149

C104

C104

0.47U

0.47U

1U

1U

0603

0603

0603

0603

10

10

10

10

12

C175

C175

0.1U

0.1U

10

10

12

C158

C158

0.47U

0.47U

0603

0603
10

10

3

12

+3.3V_RUN

+

+

C180

C180
1U

1U

0603

0603
10

10

R88 10R88 10

1 2

12

C112

C112

0.22U

0.22U

0603

0603
10

10

C72

C72
*330U_NC

*330U_NC

12

C174

C174
1U

1U

0603

0603
10

10

+

+

5/7

+

+

D8

+VCC_GMCH_L

12

C160

C160

0.22U

0.22U

0603

0603
10

10

C73

C73
*330U_NC

*330U_NC

Layout Note:
370 mils from edge.

C548

C548
220U

220U

2.5

2.5

D8

SDMK0340L-7-F

SDMK0340L-7-F

12

C94

C94

0.1U

0.1U

10

10

+1.05V_VCCP

12

C172

C172
22U

22U

0805

0805
4

4

Layout Note:
Place on the edge.

2

21

VCC_SM

12

C183

C183
22U

22U

0805

0805
4

4

2

1

U28F

U28F

AG34

VCC_1

AC34

VCC_2

AB34

VCC_3

AA34

VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7

AM33

VCC_8

AK33

VCC_9

AJ33

VCC_10

AG33

VCC_11

AF33

VCC_12

AE33

VCC_13

AC33

VCC_14

AA33

VCC_15

Y33

VCC_16

W33

VCC_17

V33

VCC_18

U33

VCC_19

AH28

VCC_20

AF28

VCC_21

AC28

VCC_22

AA28

VCC_23

AJ26

VCC_24

AG26

VCC_25

AE26

VCC_26

AC26

VCC_27

AH25

VCC_28

AG25

VCC_29

AF25

VCC_30

AG24

VCC_31

AJ23

VCC_32

AH23

VCC_33

AF23

VCC_34

T32

VCC_35

CANTIGA_1p0

CANTIGA_1p0

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

VCC CORE

VCC CORE

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5

POWER

POWER

VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8

VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31

VCC NCTF

VCC NCTF

VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Crestline (VCC,NCTF)

Crestline (VCC,NCTF)

Crestline (VCC,NCTF)

FM7B 1A

FM7B 1A

FM7B 1A

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

860Wednesday, July 16, 2008

860Wednesday, July 16, 2008

860Wednesday, July 16, 2008

1

+1.05V_VCCP

of

of

of

5

FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC

L41 BLM18PG181SN1D

+3.3V_RUN

D D

Non-iAMT

+1.05V_VCCP

L11 BLM11A05S

L11 BLM11A05S

L14 BLM11A05S

L14 BLM11A05S

12

C C

+1.05V_VCCP

B B

L41 BLM18PG181SN1D

0603

0603

R418 0R418 0

1 2

45mA MAx.

FB_120ohm+-25%_100mHz
_200mA_0.2ohm DC

0603

0603

0.5/F

0.5/F

+VCCA_HPLL

12

C493

C493
22U

22U

1206

1206
10

10

+VCCA_MPLL

L53

L53

0603

0603

0603

0603

R180

R180

1 2

C503

C503
22U

22U

1206

1206
10

10

FB_220ohm+-25%_100MHz
_2A_0.1ohm DC

+VCCA_CRTDAC

12

12

C120

C120

0.1U

0.1U

10

10

12

C150

C150

0.1U

0.1U

10

10

BLM21P221SGPT

BLM21P221SGPT

0805

0805

C459

C459

0.01U

0.01U

25

25

+VCCA_DAC_BG

C461

C461

0.1U

0.1U

10

10

+1.05V_VCCP

+1.05V_VCCP

+VCCA_PEG_PLL

12

R467

R467
1/F

1/F

0603

0603

12

C516

C516
10U

10U

0603

0603

6.3

6.3

12

C460

C460

0.1U

0.1U

10

10

C462

C462

0.01U

0.01U

25

25

L42 10uH

L42 10uH

0805

0805

L45 10uH

L45 10uH

0805

0805

0.1Caps should be
placed 200 mils
with in its pins.

R186 0

R186 0

12

C192

C192

+

+

*100U_NC

5/7

+1.5V_RUN

1 2
12

*100U_NC

7343

7343

6.3

6.3

L13

L13
1uH/300mA

1uH/300mA

R4110R411
0

+VCCHDA

C456

C456

0.1U

0.1U

10

10

2/18-7

+1.05V_VCCP

40mA MAx.

10uH+-20%_100mA

12

5/7

12

5/7

0603

0603

FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC

L40

+3.3V_RUN

+1.5V_RUN

A A

BLM18PG181SN1D

BLM18PG181SN1D

L40
BLM18PG181SN1D

BLM18PG181SN1D

0603

0603

R409 0R409 0

1 2

L39

L39

603

603

+VCC_TVDACA

C464

C464

0.01U

0.01U

25

25

12

C452

C452

0.1U

0.1U

10

10

12

C451

C451

0.1U

0.1U

10

10

5

+VCCD_TVDAC

C80

C80

0.01U

0.01U

25

25

+VCCD_QDAC

C81

C81

0.01U

0.01U

25

25

12

C463

C463

0.1U

0.1U

10

10

+1.05V_VCCP

FB_220ohm+-25%_100MHz
_2A_0.1ohm DC

+VCCA_DPLLA

12

C468

C468

+

+

220U

220U

7343

7343

2.5

2.5

+VCCA_DPLLB

12

C487

C487

+

+

220U

220U

7343

7343

2.5

2.5

1 2

12

12

C151

C151
22U

22U

0805

0805
4

4

4

C159

C159

4.7U

4.7U

0603

0603

6.3

6.3

+1.8V_SUS

L51

L51

4

12

C74

C74

0.1U

0.1U

10

10

12

C477

C477

0.1U

0.1U

10

10

12

C169

C169
22U

22U

0805

0805
4

4

12

C143

C143
1U

1U

0603

0603
10

10

BLM21P221SGPT

BLM21P221SGPT

0805

0805

+1.5V_RUN

12

12

12

C138 0.1U 10C138 0.1U 10

C509 0.1U 10C509 0.1U 10

1 2

R133 0R133 0

+VCCD_PEG_PLL

12

R459

R459
1/F

1/F

0603

0603

12

C508

C508
10U

10U

0603

0603

6.3

6.3

C471

C471
1000P 50

1000P 50

C510

C510

0.1U

0.1U

10

10

C168

C168
22U

22U

0805

0805
4

4

C164

C164
1U

1U

0603

0603
10

10

12
12

+VCCD_LVDS

12

C88

C88
1U

1U

0603

0603
10

10

+VCCA_CRTDAC

+VCCA_DAC_BG

+VCCA_DPLLA
+VCCA_DPLLB
+VCCA_HPLL
+VCCA_MPLL

+VCC_TX_LVDS

12

+VCCA_PEG_PLL

+VCCA_SM

12

12

+VCC_TVDACA

+VCCHDA

+VCCD_TVDAC
+VCCD_QDAC
+VCCA_MPLL
+VCCD_PEG_PLL

C173

C173
1U

1U

0603

0603
10

10

+VCCA_SM_CK

C170

C170

0.1U

0.1U

10

10

12

C86

C86
*10U_NC

*10U_NC

0603

0603

6.3

6.3

+VTTLF1
+VTTLF2
+VTTLF3

B27
A26

A25
B25

F47

L48
AD1
AE1

J48
J47

AD48

AA48

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25

AL25

AM24

AL24

AM23

AL23

B24

A24

A32

M25

L28
AF1

AA47

M38

L37

12

C122

C122

0.47U

0.47U

0603

0603
10

10

3

U28H

U28H

VCCA_CRT_DAC_1
VCCA_CRT_DAC_2

VCCA_DAC_BG
VSSA_DAC_BG

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

VCCA_LVDS
VSSA_LVDS

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9

VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_SM_CK_3
VCCA_SM_CK_4
VCCA_SM_CK_5
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8

VCCA_TV_DAC_1
VCCA_TV_DAC_2

VCC_HDA

VCCD_TVDAC
VCCD_QDAC
VCCD_HPLL
VCCD_PEG_PLL

VCCD_LVDS_1
VCCD_LVDS_2

CANTIGA_1p0

CANTIGA_1p0

12

C76

C76

0.47U

0.47U

0603

0603
10

10

3

CRTPLLA PEGA SM

CRTPLLA PEGA SM

A LVDS

A LVDS

POWER

POWER

A CK

A CK

TV

TV

HDA

HDA

D TV/CRT

D TV/CRT

LVDS

LVDS

12

C70

C70

0.47U

0.47U

0603

0603
10

10

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

AXF

AXF

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

SM CK

SM CK

VCC_TX_LVDS

HV

HV

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4

PEG

PEG

VCC_PEG_5

VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4

DMI

DMI

VTTLF

VTTLF

+3.3V_VCC_HV

R414 0R414 0

12

C465

C465

0.1U/10V

0.1U/10V

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14

VTT

VTT

VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

VCC_HV_1
VCC_HV_2
VCC_HV_3

VTTLF1
VTTLF2
VTTLF3

1 2

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

B22
B21
A21

BF21
BH20
BG20
BF20

K47
C35

B35
A35

V48
U48
V47
U47
U46

AH48
AF48
AH47
AG47

A8
L1
AB2

2

+VCC_AXF

+VCC_SM_CK

+VCC_TX_LVDS

+3.3V_VCC_HV

+VCC_RXR_DMI

+VTTLF1
+VTTLF2
+VTTLF3

+1.05V_VCCP

21

R41310R413
10

1 2

2

12

C144

C144

2.2U

2.2U

0603

0603

6.3

6.3

Close to VTT

5/7

5/29-51

D30

D30
SDM10K45-7-F

SDM10K45-7-F

+3.3V_RUN

1

+1.05V_VCCP

12

12

C156

C156

C110

C110

4.7U

4.7U

0.47U

0.47U

0603

0603

6.3

6.3

6.3

6.3

12

12

C123

C123

4.7U

4.7U

0603

0603

6.3

6.3

+

+

C474

C474
220U

220U

5/7

7343

7343

2.5

2.5

Place on the edge.

VCC_HV

D9

D9
*SDMK0340L-7-F_NC

*SDMK0340L-7-F_NC

1 2

L6 0L6 0

Reserved L81 pad for

12

12

12

12

+

+

12

12

inductor.

C66

C67

C67
1U

1U

0603

0603
10

10

C188

C188

0.1U

0.1U

10

10

C472

C472
1000P

1000P

50

50

C502

C502
220U

220U

7343

7343

2.5

2.5

C520

C520
10U

10U

0603

0603

6.3

6.3

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

C66
10U

10U

0603

0603

6.3

6.3

12

R211

R211
1/F

1/F

0603

0603

+VCC_SM_CK_L

12

C198

C198
10U

10U

0603

0603

6.3

6.3

12

C475

C475
*220U_NC

*220U_NC

+

+

7343

7343
4

4

+VCC_PEG

12

C496

C496
22U

22U

1206

1206
10

10

L55

L55
91nH/1.5A

91nH/1.5A

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Crestline (POWER)

Crestline (POWER)

Crestline (POWER)

FM7B 1A

FM7B 1A

FM7B 1A

L22
1uH/300MA

1uH/300MA

L9

L9

1uH/300MA

1uH/300MA

805

805

R438 0 1206R438 0 1206

1 2

12

C491

C491

4.7U

4.7U

0603

0603

6.3

6.3

12

+1.05V_VCCP

805L22

805

+1.05V_VCCP

+1.8V_SUS

+1.8V_SUS

+1.05V_VCCP

1

+1.05V_VCCP

+3.3V_RUN

960Wednesday, July 16, 2008

960Wednesday, July 16, 2008

960Wednesday, July 16, 2008

21

+VCC_HV_L

12

of

of

of

R92

R92
*10_NC

*10_NC

5

U28I

U28I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

D D

C C

B B

A A

5

AF47
AD47
AB47

BD46
BA46
AY46
AV46
AR46

AM46

BF44
AH44
AD44
AA44

M44

BC43
AV43
AU43

AM43

C43
BG42
AY42
AT42
AN42

AJ42

AE42

N42
BD41

AU41

AM41

AH41
AD41
AA41

U41

M41

G41
BG40

BB40
AV40
AN40

H40
AT39

AM39

AJ39

AE39

N39

BH38
BC38
BA38
AU38
AH38
AD38
AA38

U38

C38
BF37
BB37

AW37

AT37
AN37

AJ37

H37

C37
BG36
BD36
AK15
AU36

Y47
T47
N47
L47
G47

V46
R46
P46
H46
F46

Y44
U44
T44

F44

L42

Y41
T41

B41

E40

L39
B39

Y38
T38
F38

J43

J38

VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

CANTIGA_1p0

CANTIGA_1p0

VSS

VSS

4

4

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23

3

U28J

U28J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

R17
M17
H17
C17

BA16

AU16
AN16

N16

K16

G16

E16
BG15
AC15

W15

A15
BG14

AA14

C14
BG13
BC13

BA13

AN13

AJ13

AE13

N13

L13

G13

E13
BF12
AV12
AT12

AM12

AA12

J12

A12

BD11

BB11
AY11

AN11
AH11

Y11

N11
G11
C11

BG10

AV10
AT10

AJ10
AE10
AA10

M10
BF9
BC9
AN9

AM9

AD9

G9

B9
BH8
BB8
AV8
AT8

3

VSS_230
VSS_231
VSS_232
VSS_233

VSS_235
VSS_237

VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252

VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273

VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296

CANTIGA_1p0

CANTIGA_1p0

VSS

VSS

VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13

VSS NCTF

VSS NCTF

VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16

VSS SCB

VSS SCB

NC

NC

VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325

VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350

VSS_351
VSS_352
VSS_353
VSS_354

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9

VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5
VSS_SCB_6

NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42

2

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

U24
U28
U25
U29

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48
BH1
A48
C1
B2
A3

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Crestline (VSS)

Crestline (VSS)

Crestline (VSS)

FM7B 1A

FM7B 1A

FM7B 1A

1

of

of

of

10 60Wednesday, July 16, 2008

10 60Wednesday, July 16, 2008

10 60Wednesday, July 16, 2008

1

1

2

3

4

5

6

7

8

+RTC_CELL +RTC_CELL

12

R525

R525
332K/F

332K/F

ICH_INTVRMEN ICH_LAN100_SLP

12

R531

R531
*0_NC

*0_NC

ICH9M LAN100 SLP Strap

Low = Internal VR Disabled
High = Internal VR Enabled(Default)

U31A

U31A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GLAN_DOCK#/GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9M REV 1.0

ICH9M REV 1.0

RTCLAN / GLAN

RTCLAN / GLAN

IHDA

IHDA

SATA

SATA

(Internal VR for VccLAN1.05 and VccCL1.05)

Low = Internal VR Disabled
High = Internal VR Enabled(Default)

SIO_A20GATE

H_DPRSTP#
H_DPSLP#

H_FERR#_L

SIO_RCIN#

THERMTRIP#_ICH

SATA_TX5-_C
SATA_TX5+_C

SATABIAS

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ1#/GPIO23

LPCCPU

LPCCPU

A20GATE

DPRSTP#

CPUPWRGD

STPCLK#

THRMTRIP#

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATA_CLKN

SATA_CLKP

SATARBIAS#

SATARBIAS

ICH_LAN100_SLP

K5
K4
L6
K2

K3
J3

LDRQ0#

J1
N7

AJ27

A20M#

AJ25
AE23

DPSLP#

AJ26

FERR#

AD22
AF25

IGNNE#

AE22

INIT#

AG25

INTR

L3

RCIN#

AF23

NMI

AF24

SMI#

AH27
AG26
AG27

TP9

AH11
AJ11
AG12
AF12

AH9
AJ9
AE10
AF10

AH18
AJ18

AJ7
AH7

12

R524

R524
332K/F

332K/F

12

R530

R530
*0_NC

*0_NC

R577 56R577 56

R58524.9/F R58524.9/F

1 2

LPC_LAD0 31,33
LPC_LAD1 31,33
LPC_LAD2 31,33
LPC_LAD3 31,33

LPC_LFRAME# 31,33

T68PAD T68PAD
T103PAD T103PAD

SIO_A20GATE 31
H_A20M# 3

H_DPRSTP# 3,6,51
H_DPSLP# 3

H_FERR#

12

H_PWRGOOD 3
H_IGNNE# 3

H_INIT# 3
H_INTR 3

SIO_RCIN# 31

H_NMI 3
H_SMI# 3

H_STPCLK# 3

T82PAD T82PAD

T83PAD T83PAD
T81PAD T81PAD

SATA_RX5- 35
SATA_RX5+ 35

CLK_PCIE_SATA# 17
CLK_PCIE_SATA 17

Place within 500mils
of ICH9 ball

H_FERR# 3

E-SATA

H_DPRSTP#
H_DPSLP#
H_FERR#

SIO_A20GATE
SIO_RCIN#

THERMTRIP#_ICH

2/15-1

1 2

R579

R579
*56_NC

*56_NC

+1.05V_VCCP

R332

R332
*56_NC

*56_NC

1 2

R320

R320

8.2K

8.2K

1 2

+1.05V_VCCP

1 2

+3.3V_RUN

1 2

1 2

R57856R578
56

R309

R309
10K

10K

R33456R334
56

1 4
2 3

+RTC_CELL

12

R2891MR289
1M

R280 10MR280 10M

12

W1

W1

32.768KHZ

32.768KHZ

R523

R523

R269

R269

20K

20K

20K

20K

1 2

1 2

12

12

C596

C596

C267

C267

1U/10V

1U/10V

1U/10V

1U/10V

C368 0.01U/16VC368 0.01U/16V
C367 0.01U/16VC367 0.01U/16V

C364 0.01U/16VC364 0.01U/16V
C363 0.01U/16VC363 0.01U/16V

C382 0.01U/16VC382 0.01U/16V
C385 0.01U/16VC385 0.01U/16V

ICH_RTCX2ICH_RTCX1

ICH_RTCRST#
ICH_SRTCRST#
ICH_INTRUDER#

SATA_TX0-_C
SATA_TX0+_C

SATA_TX1-_C
SATA_TX1+_C

SATA_TX5-_C
SATA_TX5+_C

4/3-27

C271

C271
15P

15P

50V

50V

R355 33R355 33

1 2

R348 33R348 33

1 2

C373

C373
*27P/50V_NC

*27P/50V_NC

1 2

R357 33R357 33

1 2

R351 33R351 33

1 2

R354 33R354 33

1 2

R347 33R347 33

1 2

R349 33R349 33

1 2

R356 33R356 33

1 2

2/15-1

ACZ_BIT_CLK

ACZ_SYNC
ACZ_RST#
ACZ_SDOUT

Master HDD

Reserved for
Intel Nineveh
design.

SATA ODD

+3.3V_SUS

+1.5V_PCIE_ICH

ICH_AZ_CODEC_SDIN040
ICH_AZ_HDMI_SDIN16

+3.3V_SUS

SATA_ACT#38

T54 PADT54 PAD

T64 PADT64 PAD
T66 PADT66 PAD
T51 PADT51 PAD
T44 PADT44 PAD
T55 PADT55 PAD
T61 PADT61 PAD

R287 *10K_NCR287 *10K_NC

R291 24.9/FR291 24.9/F

1 2

PAD

PAD

T80

T80

PAD

PAD

T78

T78

R333 *10K_NCR333 *10K_NC
R330 *10K_NCR330 *10K_NC

SATA_RX0-36
SATA_RX0+36

SATA_RX1-36
SATA_RX1+36

ICH9M Internal VR Enable Strap
(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)

ICH_INTVRMEN

ICH_RTCX1
ICH_RTCX2

ICH_RTCRST#
ICH_SRTCRST#
ICH_INTRUDER#

ICH_INTVRMEN
ICH_LAN100_SLP

GLAN_CLK

LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

12

GLAN_COMP
ACZ_BIT_CLK

ACZ_SYNC
ACZ_RST#

ACZ_SDOUT

12
12

SATA_TX0-_C
SATA_TX0+_C

SATA_TX1-_C
SATA_TX1+_C

32.768KHZ

C270

C270

A A

15P

15P

50V

50V

B B

C C

ICH_AZ_HDMI_BITCLK6
ICH_AZ_CODEC_BITCLK40

ICH_AZ_HDMI_SYNC6
ICH_AZ_CODEC_SYNC40
ICH_AZ_HDMI_RST#6
ICH_AZ_CODEC_RST#31,40
ICH_AZ_HDMI_SDOUT6
ICH_AZ_CODEC_SDOUT40

Place all series terms close to ICH9 except for SDIN input
lines,which should be close to source.Placement of R603, R600,
R607 & R612 should equal distance to the T split trace point as
R604, R599, R606 & R608 respective. Basically,keep the same
distance from T for all series termination resistors.

SATA_TX0-36
SATA_TX0+36

SATA_TX1-36
SATA_TX1+36

SATA_TX5-35
SATA_TX5+35

+3.3V_RUN

R350

1 2

1 2

R350
*1K_NC

*1K_NC

R532

R532
*1K_NC

*1K_NC

ACZ_SDOUT

ICH_RSVD 13

6

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

COMPUTER

ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN)

ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN)

ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN)

FM7B 1A

FM7B 1A

FM7B 1A

7

of

of

of

11 60Wednesday, July 16, 2008

11 60Wednesday, July 16, 2008

11 60Wednesday, July 16, 2008

8

XOR Chain Entrance Strap

ICH RSVD

D D

1

2

3

HDA SDOUT

0
0
1
1

4

Description

0

RSVD

1

Enter XOR Chain

0

Normal Operation (Default)

1

Set PCIE port config bit 1

5

1

Place TX DC blocking caps close ICH8.

C315 0.1U 10C315 0.1U 10

PCIE_TX1-33
PCIE_TX1+33

PCIE_TX2-34
PCIE_TX2+34

PCIE_TX3-33

PCIE_TX6-/GLAN_TX-42
PCIE_TX6+/GLAN_TX+42

ICH_SPI_CS1#_R
PCI_GNT0#

R241

R241

1 2

PCIE_TX3+33

PCIE_TX4-30
PCIE_TX4+30

R302

R302
*1K_NC

*1K_NC

1 2

+3.3V_RUN

1 2

12

C231

C231
*0.1U_NC

*0.1U_NC

10

10

8

VDD

7

HOLD#

4

VSS

*W25X40VSSIG_NC

*W25X40VSSIG_NC

A A

B B

*10K/F_NC

*10K/F_NC

1 2

C323 0.1U 10C323 0.1U 10

1 2

C307 0.1U 10C307 0.1U 10

1 2

C305 0.1U 10C305 0.1U 10

1 2

C298 0.1U 10C298 0.1U 10

1 2

C289 0.1U 10C289 0.1U 10

1 2

C287 0.1U 10C287 0.1U 10

1 2

C284 0.1U 10C284 0.1U 10

1 2

C278 0.1U 10C278 0.1U 10

1 2

C276 0.1U 10C276 0.1U 10

1 2

R305

R305
*1K_NC

*1K_NC

PCI
SPI1001

1 2

U15

U15

R239 *22_NCR239 *22_NC

1

CE#

R253 *22_NCR253 *22_NC

6

SCK

R256 *22_NCR256 *22_NC

5

SI

R242 *22_NCR242 *22_NC

2

SO

SPI_WP#

3

WP#

WWAN Noise - ICH improvements

OC6#
OC4#
OC5#
OC7#
USB_OC8#
USB_OC2_3#
USB_OC0_1#
OC9#

C C

D D

C308 *0.1U_NC 10C308 *0.1U_NC 10
C620 *0.1U_NC 10C620 *0.1U_NC 10
C623 *0.1U_NC 10C623 *0.1U_NC 10
C618 *0.1U_NC 10C618 *0.1U_NC 10
C622 *0.1U_NC 10C622 *0.1U_NC 10
C292 *0.1U_NC 10C292 *0.1U_NC 10
C321 *0.1U_NC 10C321 *0.1U_NC 10
C326 *0.1U_NC 10C326 *0.1U_NC 10

PCI_AD[0..31]28

T50 PADT50 PAD

PCI_PIRQB#28

T38 PADT38 PAD

1

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

2

Boot BIOS Strap

GNT0# SPI_CS1#

No stuff

11LPC

No stuff
Stuff

SPI_CLK_R

C243

C243
*0.1U_NC

*0.1U_NC

10

10

SPI_CS#0_R
SPI_CLK_R
SPI_MOSI
SPI_MISO

U31B

U31B

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

Interrupt I/F

Interrupt I/F

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#
PIRQD#C4PIRQH#/GPIO5

ICH9M REV 1.0

ICH9M REV 1.0

2

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN3_C
PCIE_TXP3_C

PCIE_TXN4_C
PCIE_TXP4_C

GLAN_TXN_C
GLAN_TXP_C

No stuff
Stuff
No stuff

2/20-12

+3.3V_RUN

+3.3V_SUS

PCI

PCI

R252

R252
*10K/F_NC

*10K/F_NC

1 2

OC7#
OC6#

OC4#

OC10#
OC11#

REQ0#

GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2
PIRQF#/GPIO3

PIRQG#/GPIO4

3

PCIE_RX1-33
PCIE_RX1+33

MiniWWAN

PCIE_RX2-34
PCIE_RX2+34

MiniWLAN

PCIE_RX3-33
PCIE_RX3+33

MiniWPAN

PCIE_RX4-30
PCIE_RX4+30

Express Card

T102 PADT102 PAD
T101 PADT101 PAD
T60 PADT60 PAD
T56 PADT56 PAD

PCIE_RX6-/GLAN_RX-42
PCIE_RX6+/GLAN_RX+42

Giga Bit LOM

T48 PADT48 PAD
T49 PADT49 PAD

T53 PADT53 PAD

T58 PADT58 PAD

USB_OC0_1#35
USB_OC2_3#35

USB_OC8#

R553 22.6/FR553 22.6/F

1 2

Places within 500 mils
of the ICH9

RP33

RP33

6
7
8
9

10

10KX8

10KX8

R321 10KR321 10K
R323 10KR323 10K

PCI_REQ0#

F1

PCI_GNT0#

G4

PCI_REQ1#

B6

PCI_GNT1#

A7

SB_WWAN_PCIE_RST#

F13

PCI_GNT2#

F12

SB_LOM_PCIE_RST#

E6

PCI_GNT3#

F6
D8

B4
D6
A5

PCI_IRDY#

D3
E3

PCI_RST#_G

R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_PLOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PCI_PLTRST#

C14

CLK_PCI_ICH

D4
R2

SB_WPAN_PCIE_RST#

H4

SB_WLAN_PCIE_RST#

K6

SB_NB_PCIE_RST#

F2

ICH_IRQH_GPIO5

G2

12
12

3

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN3_C
PCIE_TXP3_C

PCIE_TXN4_C
PCIE_TXP4_C

GLAN_TXN_C
GLAN_TXP_C

SPI_CLK_R
SPI_CS#0_R
ICH_SPI_CS1#_R

SPI_MOSI
SPI_MISO

USB_OC0_1#
USB_OC2_3#
OC4#

OC5#
OC6#
OC7#
USB_OC8#
OC9#
OC10#
OC11#

USBRBIASSPI__HOLD#

+3.3V_SUS

5

OC9#

4

USB_OC2_3#OC5#

3

USB_OC0_1#

2

USB_OC8#

1

U31D

U31D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M REV 1.0

ICH9M REV 1.0

+3.3V_SUS

PCI_REQ0# 28
PCI_GNT0# 28

T34PAD T34PAD
T99PAD T99PAD

SB_WWAN_PCIE_RST# 33

T67PAD T67PAD

SB_LOM_PCIE_RST# 42

T65PAD T65PAD

PCI_C_BE0# 28
PCI_C_BE1# 28
PCI_C_BE2# 28
PCI_C_BE3# 28

PCI_IRDY# 28
PCI_PAR 28

PCI_DEVSEL# 28
PCI_PERR# 28
PCI_PLOCK#
PCI_SERR# 28
PCI_STOP# 28
PCI_TRDY# 28
PCI_FRAME# 28

CLK_PCI_ICH 17
ICH_PME# 28,31

SB_WPAN_PCIE_RST# 33
SB_WLAN_PCIE_RST# 34
SB_NB_PCIE_RST# 6PCI_PIRQC#28

T52PAD T52PAD

4

DMI0RXN
DMI0RXP
DMI0TXN

DMI0TXP

DMI1RXN
DMI1RXP
DMI1TXN

DMI1TXP

DMI2RXN
DMI2RXP
DMI2TXN

DMI2TXP

DMI3RXN
DMI3RXP
DMI3TXN

DMI3TXP

DMI_CLKN

PCI-Express

PCI-Express

DMI_CLKP

DMI_ZCOMP

Direct Media Interface

Direct Media Interface

DMI_IRCOMP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P

SPI

SPI

USBP5N
USBP5P
USBP6N

USB

USB

USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

4

5

V27
V26
U29
U28

Y27
Y26
W29
W28

AB27
AB26
AA29
AA28

AD27
AD26
AC29
AC28

T26
T25

AF29

DMI_COMP

AF28
AC5

AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

R552 24.9/FR552 24.9/F

PCI_GNT3#

A16 away override strap.

SB_NB_PCIE_RST#

5

Low = A16 swap override enabled.
High = Default.

DMI_MTX_IRX_N0 6
DMI_MTX_IRX_P0 6

DMI_MRX_ITX_N0 6
DMI_MRX_ITX_P0 6

DMI_MTX_IRX_N1 6
DMI_MTX_IRX_P1 6

DMI_MRX_ITX_N1 6
DMI_MRX_ITX_P1 6

DMI_MTX_IRX_N2 6
DMI_MTX_IRX_P2 6

DMI_MRX_ITX_N2 6
DMI_MRX_ITX_P2 6

DMI_MTX_IRX_N3 6
DMI_MTX_IRX_P3 6

DMI_MRX_ITX_N3 6
DMI_MRX_ITX_P3 6

CLK_PCIE_ICH# 17
CLK_PCIE_ICH 17

1 2

ICH_USBP0- 35
ICH_USBP0+ 35
ICH_USBP1- 35
ICH_USBP1+ 35
ICH_USBP2- 35
ICH_USBP2+ 35
ICH_USBP3- 35
ICH_USBP3+ 35
ICH_USBP4- 34
ICH_USBP4+ 34
ICH_USBP5- 33
ICH_USBP5+ 33
ICH_USBP6- 33
ICH_USBP6+ 33
ICH_USBP7- 30
ICH_USBP7+ 30

T73PAD T73PAD
T75PAD T75PAD
T74PAD T74PAD

T72PAD T72PAD

ICH_USBP10- 38
ICH_USBP10+ 38
ICH_USBP11- 41
ICH_USBP11+ 41

CLK_PCI_ICH

Reserved for

EMI.Place

resister and cap

close to ICH.

12

R304

R304

*1K_NC

*1K_NC

6

+1.5V_PCIE_ICH

Side pair Top / left
Side pair bottom / left
Side pair top/right(DB)
Side pair Bot right(DB)
Mini Card (WLAN)
Mini Card (WWAN)
Mini Card (WPAN)
Express Card

Biometric
Camera

R292

R292
*10_NC

*10_NC

1 2

C275

C275
*8.2P_NC

*8.2P_NC

1 2

16

16

6

7

Place within 500mils of ICH8

PCI Pullups

PCI_FRAME#
PCI_TRDY#
PCI_DEVSEL#
PCI_REQ1#

+3.3V_RUN

2/25-18

PCI_PIRQA#
PCI_REQ0#
ICH_IRQH_GPIO5
PCI_SERR#

+3.3V_RUN

SB_WPAN_PCIE_RST#
SB_WWAN_PCIE_RST#
SB_WLAN_PCIE_RST#
SB_LOM_PCIE_RST#
SB_NB_PCIE_RST#

BIOS should not enable the
internal GPIO pull up resistor.

Non-iAMT

PCI_RST#_G

PCI_PLTRST#

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

+3.3V_SUS

C344

C344

1 2

0.047U

0.047U

1 2

0.047U

0.047U

5

U19

U19

2

10

10

1

TC7SZ32FU(T5L,F,T)

TC7SZ32FU(T5L,F,T)

+3.3V_SUS

C250

C250

5

2

10

10

1

TC7SZ32FU(T5L,F,T)

TC7SZ32FU(T5L,F,T)

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

ICH9-M (USB,DMI,PCIE,PCI)

ICH9-M (USB,DMI,PCIE,PCI)

ICH9-M (USB,DMI,PCIE,PCI)

FM7B 1A

FM7B 1A

FM7B 1A

7

RP21RP21

6
7
8
9

10

RP27RP27

6
7
8
9

10

Add Buffers as needed for
Loading and fanout concerns.

4

U17

U17

4

+3.3V_RUN

5

PCI_PLOCK#

4

PCI_STOP#

3

PCI_PIRQD#

2

PCI_IRDY#

1

+3.3V_RUN

5
4

PCI_PIRQB#

3

PCI_PIRQC#

2

PCI_PERR#

1

R315 20KR315 20K
R307 20KR307 20K
R313 20KR313 20K
R288 20KR288 20K
R294 20KR294 20K

PCI_RST# 28

PLTRST# 6,30,31,33,34,42

8

12
12
12
12
12

of

of

of

12 60Wednesday, July 16, 2008

12 60Wednesday, July 16, 2008

12 60Wednesday, July 16, 2008

8

PCI_IRDY#

1

2

3

4

5

6

7

8

+3.3V_SUS

RP19

RP19

1
3

2.2KX2

2.2KX2

A A

+3.3V_SUS

1
3

ICH_SMBCLK
ICH_SMBDATA

+3.3V_RUN

R300

R300

8.2K

8.2K

1 2

R303

B B

C C

+3.3V_RUN

+3.3V_RUN

D D

+3.3V_SUS

R303

*10_NC

*10_NC

1 2

Option to " Disable "
clkrun. Pulling it down
will keep the clks
running.

KB_LED_DET#37
PCIE_MCARD1_DET#34

R331 10KR331 10K

R268 1.91K/FR268 1.91K/F

1 2

R344 100KR344 100K

1 2

R583 100KR583 100K

1 2

R257 100KR257 100K

1 2

R339 100KR339 100K

1 2

R255 100KR255 100K

1 2

R581 *10K_NCR581 *10K_NC
R316 10KR316 10K
R582 10KR582 10K

R278 10KR278 10K
R526 10KR526 10K
R528 100KR528 100K

1 2

2
4

RP20

RP20

2
4

*100KX2_NC

*100KX2_NC

R271 0R271 0
R272 0R272 0

CLKRUN#

12

7/17-63

12
12
12

12
12

1

Non-iAMT

ICH_SMBDATA
ICH_SMBCLK

ICH_SMLINK0
ICH_SMLINK1

1 2
1 2

2/25-17 6/11-44

R155 0R155 0

PCIE_MCARD1_DET#

PLTRST_DELAY#

IMVP_PWRGD

USB_MCARD2_DET#

USB_MCARD3_DET#

PCIE_MCARD1_DET#

PCIE_MCARD2_DET#
PCIE_MCARD3_DET#

MCH_ICH_SYNC#_R
IRQ_SERIRQ
THERM_ALERT#

RSV_WOL_EN
SIO_EXT_SMI#
USB_MCARD1_DET#

ASF 2.0Non-iAMT

ICH_SMLINK0
ICH_SMLINK1

1 2

+3.3V_SUS

ICH_SMBCLK30,33,34
ICH_SMBDATA30,33,34

ITP_DBRESET#3
PM_BMBUSY#6

USB_MCARD1_DET#34

H_STP_PCI#17
H_STP_CPU#17

CLKRUN#28,31
PCIE_WAKE#30,33,34,42

IRQ_SERIRQ28,31

THERM_ALERT#39

IMVP_PWRGD31,44,51

USB_MCARD2_DET#33
USB_MCARD3_DET#33

SIO_EXT_WAKE#31
SIO_EXT_SMI#31
SIO_EXT_SCI#31

R306 4.7KR306 4.7K

2

PCIE_MCARD2_DET#33
PCIE_MCARD3_DET#33

WLAN_RADIO_DIS#34

CAMERA_CBL_DET#41

PLTRST_DELAY#

WPAN_RADIO_DIS_MINI#33

WWAN_RADIO_DIS#33

12

SATA_CLKREQ#17

MCH_ICH_SYNC#6

R273 *10K_NCR273 *10K_NC
R293 10KR293 10K
R275 10KR275 10K
R299 1KR299 1K

T96 PADT96 PAD

T106 PADT106 PAD
T97 PADT97 PAD

ICH_RSVD11

T105 PADT105 PAD
T108 PADT108 PAD
T107 PADT107 PAD

T35 PADT35 PAD
T41 PADT41 PAD
T37 PADT37 PAD

T70 PADT70 PAD

T36 PADT36 PAD

SPKR40

+3.3V_RUN

12

12
12
12
12

R314

R314

*1K_NC

*1K_NC

USB_MCARD1_DET#

PCIE_MCARD2_DET#
PCIE_MCARD3_DET#

SPKR

No Reboot strap.

SPKR

Low = Default.
High = No Reboot.

3

Non-iAMT

RSV_ICH_CL_RST1#
ICH_RI#
SIO_EXT_SCI#
PCIE_WAKE#

ICH_SMBCLK
ICH_SMBDATA
RSV_ICH_CL_RST1#
ICH_SMLINK0
ICH_SMLINK1

ICH_RI#
RSV_LPCPD#

CLKRUN#
PCIE_WAKE#

IRQ_SERIRQ
THERM_ALERT#

IMVP_PWRGD

USB_MCARD2_DET#
USB_MCARD3_DET#

SIO_EXT_SMI#
SIO_EXT_SCI#

PLTRST_DELAY#

SPKR
MCH_ICH_SYNC#_R

TP9
TP10
TP11

U31C

U31C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#/GPIO15

E19

STP_CPU#/GPIO25

L4

CLKRUN#/GPIO32

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP8

AG19

TACH1/GPIO1

AH21

TACH2/GPIO6

AG21

TACH3/GPIO7

A21

GPIO8

C12

LANPHYPC/GPIO12

C21

ENGDET/GPIO13

AE18

TACH0/GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

QRT_STATE0/GPIO27

D19

QRT_STATE1/GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP9

AJ20

TP10

AJ21

TP11

ICH9M REV 1.0

ICH9M REV 1.0

SMbus address D2

These are for
backdrive issue.

ICH_SMBDATA30,33,34 MEM_SDATA 15

4

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

SMB

SMB

Clocks

Clocks

SYS GPIO

SYS GPIO

Power MGTController Link

Power MGTController Link

GPIO

GPIO

NETDETECT/GPIO14

MISC

MISC

+3.3V_RUN

3 1

+3.3V_RUN

3 1

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW#
PWRBTN#
LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

CL_RST0#
CL_RST1#

MEM_LED/GPIO24

ALERT#/GPIO10

WOL_EN/GPIO9

2

2

1

Q29

Q29

2N7002W-7-F

2N7002W-7-F

2

Q28

Q28

2N7002W-7-F

2N7002W-7-F

4

3

RP13

RP13

2.2KX2

2.2KX2

5

AH23
AF19
AE21
AD20

H1
AF3

P1
C16

E16
G17

C10
G20
M2
B13
R3
D20
D22
R5
R6
B16
F24

B19
F22

C19
C25

A19
F21

D18
A16

C18
C11
C20

+3.3V_RUN

R346

R346

8.2K

8.2K

1 2

CLK_ICH_14M
CLK_ICH_48M

ICH_SUSCLK

ICH_PWRGD
DPRSLPVR

ICH_BATLOW#

RSV_ICH_LAN_RST#
ICH_RSMRST#

ICH_CL_PWROK

RSV_ICH_CL_CLK1

RSV_ICH_CL_DATA1
CL_VREF0

CL_VREF1

CL_RST1#
RSV_GPIO24

RSV_GPIO10
RSV_GPIO14
RSV_WOL_EN

Non-iAMT

MEM_SCLK 15ICH_SMBCLK30,33,34

CLK_ICH_14M 17
CLK_ICH_48M 17

SIO_SLP_S3# 31
SIO_SLP_S5# 31

ICH_PWRGD 6,44
DPRSLPVR 6,51

R529 8.2KR529 8.2K

SIO_PWRBTN# 31

ICH_RSMRST# 31
CLK_PWRGD 17
ICH_CL_PWROK 6,31

CL_CLK0 6

CL_DATA0 6

ICH_CL_RST0# 6

R286 8.2KR286 8.2K

12

12

T104PAD T104PAD

T59PAD T59PAD

+3.3V_SUS

T46PAD T46PAD

T40PAD T40PAD

T57PAD T57PAD

T42PAD T42PAD

T62PAD T62PAD
T43PAD T43PAD

T47PAD T47PAD
T45PAD T45PAD
T39PAD T39PAD

+3.3V_SUS

6

Place these close to ICH8.

CLK_ICH_48M

R337

R337
*10_NC

*10_NC

1 2
12

50

50

R539

R539
*10_NC

*10_NC

1 2
12

50

50

R310 10KR310 10K
R542 100KR542 100K

R290 10KR290 10K
R322 1MR322 1M

R270 10KR270 10K

12

1 2

12
12
12

12

Non-iAMT

ICH_PWRGD
DPRSLPVR
ICH_RSMRST#
RSV_ICH_LAN_RST#
ICH_CL_PWROK

RSV_GPIO10

CLK_ICH_14M

R298 10KR298 10K

DIS:ALW
UMA:SUS

Non-iAMT

10

10

CL_VREF0/1 ~=0.405V

Title

Title

Title

ICH9-M (PM,GPIO,SMB,CL)

ICH9-M (PM,GPIO,SMB,CL)

ICH9-M (PM,GPIO,SMB,CL)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

FM7B 1A

FM7B 1A

FM7B 1A

Date: Sheet

Date: Sheet

Date: Sheet

7

+3.3V_RUN

R285

R285

3.24K/F

3.24K/F

1 2

CL_VREF0

C265

C265

0.1U

0.1U

12

12

R277

R277

C598

C598

453/F

453/F

*0.1U_NC

*0.1U_NC

10

10

12

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

R527

R527
*3.24K/F_NC

*3.24K/F_NC

1 2

CL_VREF1

C357

C357
*4.7P_NC

*4.7P_NC

C610

C610
*4.7P_NC

*4.7P_NC

+3.3V_SUS

+3.3V_SUS+3.3V_ALW

R534

R534
*3.24K/F_NC

*3.24K/F_NC

1 2

12

R533

R533
*453/F_NC

*453/F_NC

13 60Thursday, July 17, 2008

13 60Thursday, July 17, 2008

13 60Thursday, July 17, 2008

8

(19)

of

of

of

1

U31E

U31E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

A A

B B

C C

D D

AC26
AC27

AC3

AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29

AD4

AD5

AD6

AD7

AD9
AE12
AE13
AE14
AE16
AE17

AE2
AE20
AE24

AE3

AE4

AE6

AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27

AF5

AF7

AF9
AG13
AG16
AG18
AG20
AG23

AG3
AG6

AG9
AH12
AH14
AH17
AH19

AH2
AH22
AH25
AH28

AH5

AH8

AJ12
AJ14
AJ17

AJ8
B11
B14
B17

B20
B23

C26
C27
E11
E14
E18

E21
E24

F16
F28

F29
G12
G14
G18
G21
G24
G26
G27

H23

H28

H29

B2

B5
B8

E2

E5
E8

G8
H2

VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]

ICH9M REV 1.0

ICH9M REV 1.0

1

VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]

VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

2

+5V_RUN

+3.3V_RUN

Non-iAMT

+5V_SUS

+3.3V_SUS

+1.5V_RUN

+1.5V_RUN

2

+RTC_CELL

R284 10R284 10

1 2

D21

D21

2 1

SDMK0340L-7-F

SDMK0340L-7-F

R549 10R549 10

1 2

D34

D34

2 1

SDMK0340L-7-F

SDMK0340L-7-F

L29

L29
BLM21PG331SN1D

BLM21PG331SN1D

805

805

5/7

646mA

C654

C654

220uF

220uF

2.5

2.5

L65

L65
10uH

10uH

805

805

12

+

+

+VCCSATPLL_L

10uH+-20%_100mA

+VCCSATPLL

C665

C665
1U

1U

10

10
603

603

12

12

Non-iAMT

+3.3V_RUN

+1.5V_PCIE_ICH

3

12

C591

C591

C600

C600

1U

1U

0.1U

0.1U

1 2

10

10

10

10

+ICH_V5REF_RUN

603

603

2mA

C269

C269

0.1U

0.1U

1 2

10

10

+ICH_V5REF_SUS

2mA

C641

C641

0.1U

0.1U

1 2

10

10

FB_330ohm+-25%_100mHz_

1.5A_0.09 ohm DC

+1.5V_PCIE_ICH

12

C332

C332
22U

22U

10

10
1206

1206

C306

C306
22U

22U

10

10
1206

1206

+1.5V_RUN

+1.5V_RUN

47mA

C666

C666

VCC1_5_A TOTAL 1.342A

10U

10U

6.3

6.3
603

603

+1.5V_RUN

C374

C374

0.1U

0.1U

1 2

10

10

T98

T98
T100

T100

C266

C266

0.1U

0.1U

1 2

10

10

12

C346

C346

4.7U

4.7U

6.3

6.3
603

603

3

1 2

C325

C325

2.2U

2.2U

1 2

10

10
805

805

11mA

+1.5V_RUN

PAD

PAD
PAD

PAD

C595

C595

0.1U

0.1U

10

10

+VCCSATPLL

12

C349

C349
1U

1U

10

10
603

603

12

C348

C348
1U

1U

10

10
603

603

C288

C288

0.1U

0.1U

1 2

10

10

TP_VCCSUSLAN1
TP_VCCSUSLAN2

19mA

ICH_GLANPLL

23mA

80mA

+3.3V_RUN

1mA

4

AG15

AG10
AG11

4

AE1

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29

G25

M24
M25

W24
W25

AJ19

AC16
AD15
AD16
AE15
AF15

AH15

AJ15

AC11
AD11
AE11
AF11

AH10

AJ10

AC9

AC18
AC19

AC21

G10

AC12
AC13
AC14

AA7
AB6
AB7
AC6
AC7

A23

F25
H24

H25
J24
J25
K24
K25
L23
L24
L25

N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23

K23
Y24
Y25

AJ5

A10
A11

A12
B12

A27
D28

D29
E26
E27

A26

A6

G9

U31F

U31F

VCCRTC
V5REF
V5REF_SUS
VCC1_5_B[01]

VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]

VCCSATAPLL
VCC1_5_A[01]

VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]

VCC1_5_A[09]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]

VCC1_5_A[17]
VCC1_5_A[18]

VCC1_5_A[19]
VCC1_5_A[20]
VCC1_5_A[21]

VCC1_5_A[22]
VCC1_5_A[23]

VCC1_5_A[24]
VCC1_5_A[25]

VCCUSBPLL
VCC1_5_A[26]

VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]

VCCLAN1_05[1]
VCCLAN1_05[2]

VCCLAN3_3[1]
VCCLAN3_3[2]

VCCGLANPLL
VCCGLAN1_5[1]

VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]

VCCGLAN3_3

ICH9M REV 1.0

ICH9M REV 1.0

VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]

CORE

CORE

VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]

VCCA3GP ATXARX USB CORE

VCCA3GP ATXARX USB CORE

V_CPU_IO[1]
V_CPU_IO[2]

VCCP_COREVCCPSUSVCCPUSB

VCCP_COREVCCPSUSVCCPUSB

PCI

PCI

VCCSUSHDA

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS1_5[1]
VCCSUS1_5[2]

VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]

VCCSUS3_3[05]

VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]

VCCCL3_3[1]
VCCCL3_3[2]

GLAN POWER

GLAN POWER

5

VCCDMIPLL
VCC_DMI[1]

VCC_DMI[2]

VCC3_3[01]
VCC3_3[02]
VCC3_3[07]
VCC3_3[03]

VCC3_3[04]
VCC3_3[05]
VCC3_3[06]

VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]

VCCHDA

VCCCL1_05

VCCCL1_5

5

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

R29
W23

Y23
AB23

AC23
AG29
AJ6
AC10
AD19

AF20
AG24
AC20

B9
F9
G3
G6
J2
J7
K7

AJ4
AJ3
AC8

F17

AD8
F18

A18
D16
D17
E22

AF1

VCCSUS 3_3 212mA

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

G22
G23

A24
B24

19mA

+1.5V_RUN

C316

C316

0.1U

0.1U

1 2

10

10

+1.5V_DMIPLL

23mA

+VCC_DMI_ICH

48mA

2mA

VCC3_3 308mA

C291

C291

0.1U

0.1U

1 2

10

10

C304

C304

0.1U

0.1U

1 2

10

10

+VCC_HDA
+VCCSUSHDA
TP_VCCSUS1.05_1

TP_VCCSUS1.05_2TP_VCCSUS1.05_2

TP_VCCSUS1.5_1
TP_VCCSUS1.5_2

11mA

C285 0.1U

C285 0.1U

WWAN Noise - ICH improvements

12

12

C272

C272
*0.1U_NC

*0.1U_NC

10

10

+VCCCL1_05
+VCCCL1_5

+3.3V_RUN

Non-iAMT

L62 1uH/300mA_8L62 1uH/300mA_8

1 2

1 2

1 2

1 2

12

C337

C337
*0.1U_NC

*0.1U_NC

10

10

12

6

+1.05V_VCCP

C330

C330

0.1U

0.1U

10

10

1 2

C274

C274

0.1U

0.1U

10

10

C360

C360

0.1U

0.1U

10

10

T77PAD T77PAD
T63PAD T63PAD

10

10

C338

C338

0.22U/10V

0.22U/10V

C594

C594
10U

10U

0805

0805
10

10

6

1uH+-20%_800mA

C621

C621

0.01U

0.01U

25

25

C365

C365

0.1U

0.1U

1 2

10

10

C273

C273

0.1U

0.1U

1 2

10

10

12

C662

C662

0.1U

0.1U

10

10

T79PAD T79PAD

12

12

C645

C645
*0.1U_NC

*0.1U_NC

10

10

C290

C290
*0.1U_NC

*0.1U_NC

10

10

1 2

ICH_GLANPLLICH_GLANPLL

12

C599

C599

2.2U

2.2U

0603

0603

6.3

6.3

7

+1.05V_VCCP +1.5V_RUN

C625

C625
10U

10U

1 2

6.3

6.3
603

603

12

C341

C341

4.7U

4.7U

603

603

6.3

6.3

+3.3V_RUN

L63

L63
1uH

1uH

+1.5V_DMIPLL_R

12

L30

L30
BLM21PG331SN1D

BLM21PG331SN1D

805

805

1 2

D22

D22

1

2

BAT54C T/R

BAT54C T/R

C351

C351

0.1U

0.1U

10

10

R329

R329

3

1 2

10

10

805

805

R540 1R540 1

+1.05V_VCCP

C309

C309

0.1U

0.1U

1 2

10

10

12

WWAN Noise - ICH improvements

12

C366

C366
*0.1U_NC

*0.1U_NC

R591 *0_NCR591 *0_NC

R575 0R575 0

C335

C335

0.22U/10V

0.22U/10V

12

C283

C283
*0.1U_NC

*0.1U_NC

10

10

C301

C301
*1U_NC

*1U_NC

10

10
603

603

+3.3V_RUN

4/21-35

12

10

10

10

10

12

+1.5V_RUN

12

+VCCSUSHDA

11mA

2/18-4

+3.3V_SUS

4/21-35

+VCCSUSHDA

C277

C277

0.1U

0.1U

10

10

12

C328

C328

0.1U

0.1U

10

10

1U/6.3V_4

1U/6.3V_4

12

C286

C286

0.1U

0.1U

10

10

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

11mA

+3.3V_SUS

C361

C361

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

ICH9-M (POWER,GND)

ICH9-M (POWER,GND)

ICH9-M (POWER,GND)

FM7B 1A

FM7B 1A

FM7B 1A

7

+1.5V_RUN

12

+1.05V_VCCP

C329

C329

4.7U

4.7U

603

603

6.3

6.3

+3.3V_RUN

12

12

C354

C354
*0.1U_NC

*0.1U_NC

C282

C282
*0.1U_NC

*0.1U_NC

10

10

R341 *0_NCR341 *0_NC

R345 0R345 0

6/11-43

U21

U21

3

EN

BP

2

GND

1

VIN

VOUT

IC(5P) RT9193 (SOT23-5)EP

IC(5P) RT9193 (SOT23-5)EP

10

10

+3.3V_SUS

12

+1.5V_SUS

12

4

C852

C852

0.022U

0.022U

5

8

12

C293

C293
*0.1U_NC

*0.1U_NC

12

12

14 60Wednesday, July 16, 2008

14 60Wednesday, July 16, 2008

14 60Wednesday, July 16, 2008

8

C345

C345
*0.1U_NC

*0.1U_NC

10

10

C370

C370

0.1U

0.1U

10

10

+1.5V_SUS

of

of

of

C369

C369
1U/6.3V_4

1U/6.3V_4

1

A is required to route to Top
SoDIMM for AMTto function.
Ch.A SODIMM needs to be
populated for Intel AMT support.

DDR_A_DQS#0

A A

B B

DDR_CKE0_DIMMA6,16

DDR_A_BS27,16

DDR_A_BS07,16
DDR_A_WE#7,16

DDR_A_CAS#7,16
DDR_CS1_DIMMA#6,16

M_ODT16,16

C C

D D

MEM_SDATA13
MEM_SCLK13
+3.3V_RUN

Non-iAMT

DDR_A_DQS0

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_DQS#2
DDR_A_DQS2

SMbus address A0 SMbus address A4

1

+1.8V_SUS

DDR_A_D0
DDR_A_D1

DDR_A_D3
DDR_A_D2

DDR_A_D12
DDR_A_D8

DDR_A_D23
DDR_A_D24 DDR_A_D29

DDR_A_D25
DDR_A_DM3

DDR_A_D30 DDR_A_D31
DDR_A_D26

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1 DDR_A_MA0

DDR_A_MA10
DDR_A_BS0
DDR_A_WE#

DDR_A_CAS#

M_ODT1
DDR_A_D36 DDR_A_D33

DDR_A_D37
DDR_A_DQS#4

DDR_A_DQS4

DDR_A_D38
DDR_A_D41

DDR_A_D40
DDR_A_DM5
DDR_A_D42

DDR_A_D46
DDR_A_D48

DDR_A_D53

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D54

DDR_A_DM7
DDR_A_D59

DDR_A_D62 DDR_A_D58

MEM_SCLK

2

V_DDR_MCH_REF

JDIM1

JDIM1

1

VREF

3

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

CLOCK 0,1

2

3

+1.8V_SUS

TOP BOT

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

VDD8

84

A15

86

A14

88

VDD11

90

A11

92

A7

94

A6

96

VDD4

98

PC4800 DDR2 SDRAM

SO-DIMM (200P)

PC4800 DDR2 SDRAM

SO-DIMM (200P)

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0

200

SA1

DDR2_DIMM

DDR2_DIMM

DDR_A_D4
DDR_A_D5

DDR_A_DM0
DDR_A_D7

DDR_A_D6
DDR_A_D13

DDR_A_D9
DDR_A_DM1

DDR_A_D14DDR_A_D10
DDR_A_D15DDR_A_D11

DDR_A_D20DDR_A_D21
DDR_A_D16DDR_A_D17

PM_EXTTS#0 PM_EXTTS#1
DDR_A_DM2

DDR_A_D18DDR_A_D22
DDR_A_D19

DDR_A_D28
DDR_A_DQS#3

DDR_A_DQS3

DDR_A_D27

DDR_CKE1_DIMMA 6,16

DDR_A_MA14 DDR_B_MA14
DDR_A_MA11

DDR_A_MA7
DDR_A_MA6DDR_A_MA8

DDR_A_MA4
DDR_A_MA2

DDR_A_BS1
DDR_A_RAS#

DDR_CS0_DIMMA# 6,16

M_ODT0

DDR_A_MA13

DDR_A_D32
DDR_A_DM4
DDR_A_D34

DDR_A_D39DDR_A_D35
DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D43

DDR_A_D47
DDR_A_D52

DDR_A_D49

DDR_A_DM6
DDR_A_D51

DDR_A_D55
DDR_A_D60DDR_A_D56

DDR_A_D57DDR_A_D61
DDR_A_DQS#7

DDR_A_DQS7

DDR_A_D63

R266

R266

R261

R261

10K

10K

10K

10K

1 2

1 2

3

DDR_A_DM[0..7] 7
DDR_A_D[0..63] 7
DDR_A_DQS[0..7] 7
DDR_A_DQS#[0..7] 7
DDR_A_MA[0..14] 7,16

V_DDR_MCH_REF

12

C234

C234

0.1U

0.1U

10

10

M_CLK_DDR0 6
M_CLK_DDR#0 6

PM_EXTTS#0 6

DDR_A_BS1 7,16
DDR_A_RAS# 7,16

M_ODT0 6,16

+3.3V_RUN

12

C236

C236

2.2U

2.2U

0603

0603

6.3

6.3

M_CLK_DDR1 6
M_CLK_DDR#1 6

4

12

C232

C232

2.2U

2.2U

0603

0603

6.3

6.3

DDR_CKE3_DIMMB6,16

DDR_B_BS27,16

DDR_B_BS07,16
DDR_B_WE#7,16

DDR_B_CAS#7,16

DDR_CS3_DIMMB#6,16

Non-iAMT

12

C240

C240

0.1U

0.1U

10

10

Non-iAMT

+3.3V_RUN

4

5

+1.8V_SUS +1.8V_SUS

V_DDR_MCH_REF

JDIM2

JDIM2

1

VREF

3

DDR_B_D0
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D2
DDR_B_D7

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D17
DDR_B_D20

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D19 DDR_B_D23
DDR_B_D29 DDR_B_D24

DDR_B_D28
DDR_B_DM3

DDR_B_BS2

DDR_B_MA12

DDR_B_MA9

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10

DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

M_ODT36,16

M_ODT3
DDR_B_D32

DDR_B_D33
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D34

DDR_B_D35
DDR_B_D41

DDR_B_D40
DDR_B_DM5

DDR_B_D42
DDR_B_D52

DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D54
DDR_B_D51

DDR_B_D56
DDR_B_D57 DDR_B_D60

DDR_B_DM7
DDR_B_D62

DDR_B_D59
MEM_SDATAMEM_SDATA

MEM_SCLK

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

PC4800 DDR2_0

PC4800 DDR2_0

CLOCK 2,3

CKE 2,3CKE 0,1

5

6

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

VDD8

84

A15

86

A14

88

VDD11

90

A11

92

A7

94

A6

96

VDD4

98

PC4800 DDR2 SDRAM

SO-DIMM (200P)

PC4800 DDR2 SDRAM

SO-DIMM (200P)

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0

200

SA1

DDR_B_D4
DDR_B_D1

DDR_B_DM0
DDR_B_D6

DDR_B_D3
DDR_B_D12

DDR_B_D13
DDR_B_DM1

DDR_B_D14
DDR_B_D15

DDR_B_D16
DDR_B_D21

DDR_B_DM2
DDR_B_D18DDR_B_D22

DDR_B_D25
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D31DDR_B_D26

DDR_B_D30DDR_B_D27

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6DDR_B_MA8

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_BS1
DDR_B_RAS#

M_ODT2

DDR_B_MA13

DDR_B_D36
DDR_B_D37

DDR_B_DM4
DDR_B_D38

DDR_B_D39
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D43DDR_B_D47

DDR_B_D46
DDR_B_D48

DDR_B_D55

DDR_B_DM6
DDR_B_D53

DDR_B_D50
DDR_B_D61

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D58
DDR_B_D63

R308

R308
10K

10K

1 2

6

R301 10KR301 10K

DDR_CKE4_DIMMB 6,16

DDR_CS2_DIMMB# 6,16

12

7

DDR_B_DM[0..7] 7
DDR_B_D[0..63] 7
DDR_B_DQS[0..7] 7
DDR_B_DQS#[0..7] 7
DDR_B_MA[0..14] 7,16

V_DDR_MCH_REF

M_CLK_DDR3 6
M_CLK_DDR#3 6

PM_EXTTS#1 6

+1.8V_SUS

12

C295

C295

2.2U

2.2U

0603

0603

6.3

6.3

+1.8V_SUS

12

12

C592

C592

0.1U

0.1U

10

10

C590

C590

2.2U

2.2U

0603

0603

6.3

6.3

Place these Caps near So-Dimm1.

12

12

C297

C297

2.2U

2.2U

0603

0603

6.3

6.3

C294

C294

2.2U

2.2U

0603

0603

6.3

6.3

Place these Caps near So-Dimm2.

DDR_B_BS1 7,16
DDR_B_RAS# 7,16

M_ODT2 6,16

M_CLK_DDR4 6
M_CLK_DDR#4 6

12

C581

C581

2.2U

2.2U

0603

0603

6.3

6.3

+1.8V_SUS

Place these Caps near So-Dimm1.

12

C300

C300

0.1U

0.1U

10

10

+1.8V_SUS

Place these Caps near So-Dimm2.

12

C574

C574

0.1U

0.1U

10

10

+3.3V_RUN

12

C262

C262

2.2U

2.2U

0603

0603

6.3

6.3

12

C579

C579

2.2U

2.2U

0603

0603

6.3

6.3

12

C303

C303

0.1U

0.1U

10

10

12

C254

C254

0.1U

0.1U

10

10

Non-iAMT

12

C268

C268

0.1U

0.1U

10

10

12

C578

C578

2.2U

2.2U

0603

0603

6.3

6.3

12

C302

C302

0.1U

0.1U

10

10

12

C256

C256

0.1U

0.1U

10

10

Non-iAMT

+3.3V_RUN

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

DDR2 SO-DIMM (200P) X 2

DDR2 SO-DIMM (200P) X 2

DDR2 SO-DIMM (200P) X 2

FM7B 1A

FM7B 1A

FM7B 1A

7

8

12

12

C296

C296

C576

C576

2.2U

2.2U

2.2U

2.2U

0603

0603

0603

0603

6.3

6.3

6.3

6.3

12

12

12

12

C577

C577

2.2U

2.2U

0603

0603

6.3

6.3

C575

C575

0.1U

0.1U

10

10

C299

C299

0.1U

0.1U

10

10

C580

C580

2.2U

2.2U

0603

0603

6.3

6.3

+

+

C216

C216
*330U_NC

*330U_NC

7343

7343

6.3

6.3

of

of

of

15 60Monday, June 30, 2008

15 60Monday, June 30, 2008

15 60Monday, June 30, 2008

8

1

2

3

4

5

6

7

8

+0.9V_DDR_VTT

A A

B B

C C

D D

1

Please these resistor
closely DIMMB,all
trace length<750 mil.

12

C280

C280

0.1U

0.1U

10

10

+0.9V_DDR_VTT

12

C224

C224

0.1U

0.1U

10

10

DDR_CS0_DIMMA#6,15
DDR_CS1_DIMMA#6,15
DDR_CKE0_DIMMA6,15
DDR_CKE1_DIMMA6,15

2

Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.

12

12

C245

C245

0.1U

0.1U

10

10

12

C230

C230

0.1U

0.1U

10

10

DDR_B_MA[0..14]7,15 DDR_A_MA[0..14] 7,15

DDR_A_RAS#7,15
DDR_A_BS17,15

M_ODT06,15

DDR_A_BS27,15

DDR_A_BS07,15

DDR_A_WE#7,15

M_ODT16,15

12

C260

C260

C259

C259

0.1U

0.1U

0.1U

0.1U

10

10

10

10

12

12

C228

C228

C229

C229

0.1U

0.1U

0.1U

0.1U

10

10

10

10

DDR_A_MA7
DDR_A_MA11

DDR_A_MA4
DDR_A_MA6

DDR_A_BS1 DDR_B_BS1

DDR_A_MA13

DDR_A_BS2
DDR_A_MA12

DDR_A_MA8 DDR_B_MA12

DDR_A_MA3
DDR_A_MA5

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#

DDR_A_MA0
DDR_A_MA2 DDR_B_MA2

DDR_A_MA1

R248 56R248 56
R250 56R250 56
R262 56R262 56
R247 56R247 56
R249 56R249 56
R263 56R263 56
R264 56R264 56

3

12

C258

C258

0.1U

0.1U

10

10

12

C227

C227

0.1U

0.1U

10

10

2
4

2
4

2
4

2
4

2
4

2
4

2
4

2
4

2
4

2
4

1 2
1 2
1 2
1 2
1 2
1 2
1 2

RP14

RP14

56x2

56x2
RP18

RP18

56x2

56x2
RP16

RP16

56x2

56x2
RP17

RP17

56x2

56x2
RP11

RP11

56x2

56x2
RP10

RP10

56x2

56x2
RP12

RP12

56x2

56x2
RP8

RP8

56x2

56x2
RP9

RP9

56x2

56x2
RP15

RP15

56x2

56x2

12

C255

C255

0.1U

0.1U

10

10

12

C246

C246

0.1U

0.1U

10

10

1
3

1
3

1
3

1
3

1
3

1
3

1
3

1
3

1
3

1
3

TOP

12

C249

C249

0.1U

0.1U

10

10

BOT

12

C226

C226

0.1U

0.1U

10

10

+0.9V_DDR_VTT

4

12

12

C279

C279

C263

C263

0.1U

0.1U

0.1U

0.1U

10

10

10

10

12

12

C237

C237

C244

C244

0.1U

0.1U

0.1U

0.1U

10

10

10

10

RP28

RP28

1
3

56x2

56x2

RP29

RP29

1
3

56x2

56x2

RP31

RP31

1
3

56x2

56x2

RP32

RP32

1
3

56x2

56x2

RP24

RP24

1
3

56x2

56x2

RP22

RP22

1
3

56x2

56x2

RP23

RP23

1
3

56x2

56x2

RP25

RP25

1
3

56x2

56x2

RP26

RP26

1
3

56x2

56x2

RP30

RP30

1
3

56x2

56x2

R283 56R283 56
R279 56R279 56
R297 56R297 56
R282 56R282 56
R281 56R281 56
R295 56R295 56
R296 56R296 56

12

12

C248

C248

0.1U

0.1U

10

10

12

C225

C225

0.1U

0.1U

10

10

DDR_B_MA7

2

DDR_B_MA11

4

DDR_B_MA6

2

DDR_B_MA4

4

DDR_B_RAS#DDR_A_RAS#

2
4

M_ODT2

2

DDR_B_MA13M_ODT0

4

DDR_B_MA3

2

DDR_B_MA1

4

DDR_B_MA8DDR_A_MA9

2
4

DDR_B_MA5

2

DDR_B_MA9

4

DDR_B_WE#

2

DDR_B_BS0

4

DDR_B_CAS#DDR_A_CAS#

2

DDR_B_MA10

4

DDR_B_MA0

2
4

12
12
12
12
12
12

DDR_B_MA14DDR_A_MA14

12

5

C247

C247

0.1U

0.1U

10

10

12

C264

C264

0.1U

0.1U

10

10

12

C261

C261

0.1U

0.1U

10

10

12

C281

C281

0.1U

0.1U

10

10

DDR_B_RAS# 7,15
DDR_B_BS1 7,15

M_ODT2 6,15

DDR_B_WE# 7,15
DDR_B_BS0 7,15

DDR_B_CAS# 7,15DDR_A_CAS#7,15

M_ODT3 6,15

DDR_B_BS2 7,15
DDR_CS2_DIMMB# 6,15
DDR_CS3_DIMMB# 6,15
DDR_CKE3_DIMMB 6,15
DDR_CKE4_DIMMB 6,15

12

12

12

C252

C252

C253

C253

0.1U

0.1U

0.1U

0.1U

10

10

10

10

12

C239

C239

C257

C257

0.1U

0.1U

0.1U

0.1U

10

10

10

10

Please these resistor
closely DIMMA,all
trace length<750 mil.

6

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

COMPUTER

DDR2 RES ARRAY

DDR2 RES ARRAY

DDR2 RES ARRAY

FM7B 1A

FM7B 1A

FM7B 1A

7

of

of

of

16 60Monday, June 30, 2008

16 60Monday, June 30, 2008

16 60Monday, June 30, 2008

8

1

2

3

4

5

6

7

8

Add capacitor pads for improving WWAN.

C544 20P 50C544 20P 50
C530 *27P_NC 50C530 *27P_NC 50

1 2

C537 *27P_NC 50C537 *27P_NC 50

1 2

C182 *27P_NC 50C182 *27P_NC 50

1 2

C540 *27P_NC 50C540 *27P_NC 50

1 2

A A

Y2

Y2

14.318MHZ

14.318MHz

SATA_CLKREQ#13

CLK_3GPLLREQ#6

CLK_PCI_851231

1

14.318MHZ

C512

C512
33P

33P

1 2

50

50

CLK_LPC_DEBUG33
CLK_PCI_PCCARD28

CLK_PCI_ICH12
CLK_ICH_48M13
CPU_MCH_BSEL03,6

B B

C C

D D

CPU_MCH_BSEL13,6
CPU_MCH_BSEL23,6

CLK_ICH_14M13

CLK_PWRGD13

+3.3V_RUN

L56 BLM21PG600SN1D

L56 BLM21PG600SN1D

0805

0805

120 ohms@100Mhz

L57 BLM21PG600SN1D

L57 BLM21PG600SN1D

0805

0805

120 ohms@100Mhz

CLK_ICH_48M
CLK_ICH_14M
CLK_PCI_8512
CLK_PCI_PCCARD
CLK_PCI_ICH

CLK_XTAL_OUTCLK_XTAL_IN

21

C511

C511
33P

33P

1 2

50

50

SATA_CLKREQ#
CLK_3GPLLREQ#

CLK_LPC_DEBUG
CLK_PCI_PCCARD

CLK_PCI_ICH PCI_ICH
CLK_ICH_48M

L58

L58

BLM18AG601SN1D

BLM18AG601SN1D

L15

L15

BLM18AG601SN1D

BLM18AG601SN1D

CLK_ICH_14M

12

12

C547

C547

C545

C545

0.1U

0.1U

0.1U

0.1U

10

10

10

10

R465 2.2R465 2.2

1 2

R491 2.2R491 2.2

1 2

R488 2.2R488 2.2

1 2

R188 2.2R188 2.2

1 2

R476 475/FR476 475/F

1 2

R478 475/FR478 475/F

1 2

R193 22R193 22

1 2

R194 33R194 33
R481 33R481 33
R485 33R485 33
R489 33R489 33
R490 2.2KR490 2.2K

R177 0R177 0

1 2

R472 10KR472 10K
R474 33R474 33

+CK_VDD_MAIN

12

C538

C538

0.1U

0.1U

10

10

+CK_VDD_PCI

+CK_VDD_PLL3

+CK_VDD_48

12

C539

C539

0.1U

0.1U

10

10

+CK_VDD_SRC

2

12

C522

C522

0.1U

0.1U

10

10

+CK_VDD_PCI
+CK_VDD_PLL3

+CK_VDD_48
+CK_VDD_SRC

+CK_VDD_MAIN

SATA_CLKREQ#_C

12
12
12
12

12
12

CLK_3GPLLREQ#_C
PCI_PCCARD
PCI_SIOCLK_PCI_8512
27M_SEL

FSA

2/18-6

FSB
FSC

CLK_XTAL_OUT
CLK_XTAL_IN

CLK_SDATA
CLK_SCLK

UMA without iAMT

12

12

C504

C504

C505

C505

0.1U

0.1U

0.1U

0.1U

10

10

10

10

2/19-8

12

12

C518

C518

C166

C166

0.1U

0.1U

0.1U

0.1U

10

10

10

10

12

C546

C546

0.1U

0.1U

10

10

12

C542

C542

4.7U

4.7U

0603

0603

6.3

6.3

2/19-8

12

12

C514

C514

C155

C155

0.1U

0.1U

0.1U

0.1U

10

10

10

10

U29

U29

9

12

C189

C189
*10U_NC

*10U_NC

0603

0603

6.3

6.3

VDD_PCI

4

VDD_REF

23

VDD_PLL3

16

VDD_48

46

VDD_SRC

62

VDD_CPU

19

VDD_IO

27

VDD_IO

33

VDD_IO

43

VDD_IO

52

VDD_IO

56

VDD_IO

15

GND

18

GND

22

GND

26

GND

30

GND

36

GND

49

GND

59

GND

1

GND

8

CR#_A/PCI-0

10

CR_B/PCI-1

11

TME/PCI-2

12

SRC5_EN/PCI-3

13

27M_SEL/PCI-4

14

ITP_EN/PCIF-5#

17

FSA/USB48

64

FSB/TEST_MODE

5

FSC/TEST_SEL/REF

55

RESET#

63

CK_PWRGD/PD#

2

XOUT

3

XIN

6

SDATA

7

SCLK

SLG8SP513V

SLG8SP513V

CK505

CK505

QFN64

QFN64

CLK_ITP_BCLK#3
CLK_ITP_BCLK3

CPU_STOP#/SRC5-5#

CPU-0

CPU-0#

CPU-1

CPU-1#

SRC-8/CPU_ITP

SRC-8#/CPU_ITP#

SRC-0/DOT96

SRC-0#/DOT96#

SRC-1/SE1

SRC-1#/SE2

SRC-2/SATA

SRC-2#/SATA#

CR#_C/SRC-3

CR#_D/SRC-3#

SRC-4

SRC-4#

PCI_STOP#/SRC-5

SRC-6

SRC-6#

CR#_F/SRC-7

CR#_E/SRC-7#

SRC-9

SRC-9#
SRC-10

SRC-10#

CR#_H/SRC-11

CR#_G/SRC-11#

GND

2
4

+3.3V_RUN

RP6

RP6

*0x2_NC

*0x2_NC

SMbus address D2

These are for
backdrive issue.

2

SMBDAT126,31,39

SMBCLK126,31,39

3

4

3 1

Q22

Q22
2N7002W-7-F

2N7002W-7-F

+3.3V_RUN

2

3 1

Q23

Q23

2N7002W-7-F

2N7002W-7-F

CPU_BCLK

61

CPU_BCLK#

60

MCH_BCLK

58

MCH_BCLK#

57

PCIE_MINI1

54

PCIE_MINI1#

53

DOT96_SSC

20

DOT96_SSC#

21

27M_SS

24

27M_NSS

25

PCIE_SATA

28

PCIE_SATA#

29

PCIE_MINI3

31

PCIE_MINI3#

32

MCH_3GPLL

34

MCH_3GPLL#

35
45

44

PCIE_EXPCARD

48

PCIE_EXPCARD#

47

MINI1CLK_REQ#_C MINI1CLK_REQ#

51
50

PCIE_MINI2

37

PCIE_MINI2#

38

PCIE_ICH

41

PCIE_ICH#

42

PCIE_LOM

40

PCIE_LOM#

39

65

PCIE_MINI1#

1

PCIE_MINI1

3

4
2

4
2

4
2

3
1

3
1

2
4

2
4

2
4

4
2

R456 475/FR456 475/F

1 2

R455 475/FR455 475/F

1 2

2
4

2
4

4
2

PCI_ICH

Non-iAMT

2

4

RP7

RP7

2.2KX2

2.2KX2

1

3

CLK_SDATA

27M_SEL

CLK_SCLK

5

RP35

RP35

3

0x2

0x2

1

RP34

RP34

3

0x2

0x2

1

RP36

RP36

3

0x2

0x2

1

RP43

RP43

4

0x2

0x2

2

RP45

RP45

4

0x2

0x2

2

RP44

RP44

1

0x2

0x2

3

RP42

RP42

1

0x2

0x2

3

RP41

RP41

1

0x2

0x2

3

RP37

RP37

3

0x2

0x2

1

CARD_CLK_REQ#CARD_CLK_REQ#_C

RP40

RP40

1

0x2

0x2

3

RP38

RP38

1

0x2

0x2

3

RP39

RP39

3

0x2

0x2

1

+3.3V_RUN

R201

R201
*10K_NC

*10K_NC

1 2

R486

R486
*10K_NC

*10K_NC

1 2

R185 POP: For Internal pull-low.
R439 POP: For internal pull-high.

R483

R483
*10K_NC

*10K_NC

R484

R484
10K

10K

27M_SEL

27M_SEL
(PIN13)

0=UMA
1 = Disc.

GRFX down

+3.3V_RUN

1 2

1 2

6

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5

CLK_PCIE_MINI1 34
CLK_PCIE_MINI1# 34

DREF_SSCLK 6
DREF_SSCLK# 6

CLK_PCIE_SATA 11
CLK_PCIE_SATA# 11

CLK_PCIE_MINI3 33
CLK_PCIE_MINI3# 33

CLK_MCH_3GPLL 6
CLK_MCH_3GPLL# 6

H_STP_PCI# 13
H_STP_CPU# 13

CLK_PCIE_EXPCARD 30
CLK_PCIE_EXPCARD# 30

MINI1CLK_REQ# 34
CARD_CLK_REQ# 30

CLK_PCIE_MINI2 33
CLK_PCIE_MINI2# 33

CLK_PCIE_ICH 12
CLK_PCIE_ICH# 12

CLK_PCIE_LOM 42
CLK_PCIE_LOM# 42

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

MCH_DREFCLK 6

MCH_DREFCLK# 6

2/20-10

H_STP_PCI#
H_STP_CPU#

CLK_3GPLLREQ#
SATA_CLKREQ#
CARD_CLK_REQ#
MINI1CLK_REQ#
PCI_PCCARD

PCI_SIO

FSC FSB FSA CPU SRC PCI
1
0

1

0

1

0
00
1

0

1

1
1

1

PIN20 PIN21 PIN24 PIN25

DOT96T

DOT96C

SRCT0 SRCC0

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

CLOCK GENERATOR

CLOCK GENERATOR

CLOCK GENERATOR

FM7B 1A

FM7B 1A

FM7B 1A

7

R182 10KR182 10K
R184 10KR184 10K

R479 10KR479 10K
R477 10KR477 10K
R458 10KR458 10K
R449 10KR449 10K
R192 *10K_NCR192 *10K_NC

R482 *10K_NCR482 *10K_NC

1 2

100

1

133

10

166

1

200

0

266

0

333

0

400

0

RSVD

1

96/
100M_T

27Mout

1 2

100
100
100
100
100
100
100
100

96/
100M_C

27MSSout

12
12
12
12

17 60Monday, July 14, 2008

17 60Monday, July 14, 2008

17 60Monday, July 14, 2008

12
12

330
33
33
33
33
33
33
33

of

of

of

8

+3.3V_RUN

+3.3V_RUN

5

L33

HDMI_CLK-_L HDMI_CLK­HDMI_CLK+_L

D D

C C

HDMI_TX0+_L
HDMI_TX0-_L

HDMI_TX1-_L
HDMI_TX1+_L

HDMI_TX2-_L
HDMI_TX2+_L

L33

1 2

EXC24CG900U

EXC24CG900U

R378 *0_NCR378 *0_NC

1 2

R380 *0_NCR380 *0_NC

1 2

L32

L32

1 2

EXC24CG900U

EXC24CG900U

R370 *0_NCR370 *0_NC

1 2

R372 *0_NCR372 *0_NC

1 2

L34

L34

1 2

EXC24CG900U

EXC24CG900U

R382 *0_NCR382 *0_NC

1 2

R383 *0_NCR383 *0_NC

1 2

L35

L35

1 2

EXC24CG900U

EXC24CG900U

R384 *0_NCR384 *0_NC

1 2

R385 *0_NCR385 *0_NC

1 2

34

34

34

34

HDMI_CLK+

HDMI_TX0+
HDMI_TX0-

HDMI_TX1­HDMI_TX1+

HDMI_TX2­HDMI_TX2+

4

HDMI_TX1+
HDMI_TX1-

HDMI_CLK+
HDMI_CLK-

U2

U2

I/O1I/O

2

I/O3I/O

*SRV05-4_NC

*SRV05-4_NC

U1

U1

I/O1I/O

2

I/O3I/O

*SRV05-4_NC

*SRV05-4_NC

4/17-31

3

HDMI_TX2+

6

VP5VN

HDMI_TX2-

4

HDMI_TX0+

6

VP5VN

HDMI_TX0-

4

+5V_RUN

+5V_RUN

HDMI Connector

+3.3V_RUN+3.3V_RUN

12

12

R396

R396

R397

*4.7K_NC

*4.7K_NC

HDMI_SCL HDMI_DET

HDMI_SDA

R397
*4.7K_NC

*4.7K_NC

2

1

Q45 *FDV301N_NCQ45 *FDV301N_NC

R393 0R393 0

Q44 *FDV301N_NCQ44 *FDV301N_NC

3

1

R392 0R392 0

2/22-16
2/25-19
6/16-48

HDMI_SCL_R2

2

3

HDMI_SDA_R2

2

+5V_RUN

7/15-61

+5V_RUN

R606

R606
0

0

0805

0805

R374

R374

1.8K

1.8K

0603

0603

7/14-54

F1

F1

HDMI_TX2+
HDMI_TX2-

HDMI_TX1+
HDMI_TX1-

HDMI_TX0+
HDMI_TX0-

HDMI_CLK+
HDMI_CLK-

R375

R375

1.8K

1.8K

HDMI_SCL_R2
HDMI_SDA_R2

R598

R598

1 2

0

0

1 2

*SMD1812P110TS_NC

*SMD1812P110TS_NC

+HDMI_PWR

C53

C53
*0.1U_NC

*0.1U_NC

12

C683

C683

0.1U

0.1U

10

10

1

CN2

CN2

19

D2+

18

D2 Shield

17

D2-

16

D1+

15

D1 Shield

14

D1-

13

D0+

12

D0 Shield

11

D0-

10

CK+

9

CK Shield

8

CK-

7

CE Remote

6

NC

5

DDC CLK

4

DDC DATA

3

GND

2

+5V

1

HP DET

ABA-HDM-018-K01

ABA-HDM-018-K01

SHELL1
SHELL3

SHELL4
SHELL2

20
22

23
21

4/21-34

Reserve for EMI and close to HDMI CONN

+3.3V_RUN

12

L3

L3
BLM18PG181SN1

BLM18PG181SN1

+VCC_HDMI

B B

+3.3V_RUN

pin10 pin6 pin4

0 1 1 0 500 3.5 dB

A A

01101011500

110 0 400 6 dB

C63

C63

C62

C62

0.1U

0.1U

0.1U

0.1U

1 2

R73 2.2KR73 2.2K

1 2

R75 2.2KR75 2.2K

EQUALIZATION SETTING @1.25GHz(dB)
CFG1:CFG0=0:0 3dB
CFG1:CFG0=0:1 6dB Recommanded
CFG1:CFG0=1:0 9dB
CFG1:CFG0=1:1 12dB

pin3

PC1

PC0

C56

C56

0.1U

0.1U

Vswing
(mV)

400

C447

C447

0.1U

0.1U

SDVO_CTRLCLK
SDVO_CTRLDATA

Pre/De­emphasis

6 dB

3.5 dB

C64

C64

0.1U

0.1U

+3.3V_RUN

SDVO_CTRLCLK6
SDVO_CTRLDATA6

UMA_HDMI_HPD6

7/14-57

5

C446

C446

C57

C57

0.1U

0.1U

0.1U

0.1U

IN_CLK+6
IN_CLK-6

IN_D0+6
IN_D0-6

IN_D1+6
IN_D1-6

IN_D2+6
IN_D2-6

R79 4.7KR79 4.7K
R81 *4.7K_NCR81 *4.7K_NC
R408 *4.7K_NCR408 *4.7K_NC
R407 *4.7K_NCR407 *4.7K_NC
R84 *4.7K_NCR84 *4.7K_NC

R398 *0_NCR398 *0_NC

1 2

R404 499/FR404 499/F

2/22-15

6/12-47

C65

C65

0.1U

0.1U

DDC_EN
PC0
PC1
CFG0
CFG1

12

4

U6

U6

2

VCC

11

VCC

15

VCC

21

VCC

26

VCC

33

VCC

40
46

39
38

42
41

45
44

48
47

9
8
7

32

3

4
34
35

10
25

6

PI3VDP411LSZDE

PI3VDP411LSZDE

VCC
VCC

IN_D1+
IN_D1-

IN_D2+
IN_D2-

IN_D3+
IN_D3-

IN_D4+
IN_D4-

SCL
SDA
HPD

DDC_EN
PC0
PC1
DDCBUF_EN
CFG

RT_EN#
OE#
REXT

CONTROL

CONTROL

POWER

POWER

GND

GND

OUT_D1+

OUT_D1-

OUT_D2+

OUT_D2-

OUT_D3+

OUT_D3-

OUT_D4+

OUT_D4­SCL_SINK
SDA_SINK
HPD_SINK

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

EPAD

22
23

19
20

16
17

13
14

28
29
30

1
5
12
18
24
27
31
36
37
43
49

HDMI_SCL_R
HDMI_SDA_R

3

HDMI_CLK+_L

HDMI_CLK-_L

HDMI_TX0+_L
HDMI_TX0-_L

HDMI_TX1+_L
HDMI_TX1-_L

HDMI_TX2+_L
HDMI_TX2-_L

2/22-15
5/29-42

R71 0R71 0

1 2

R72 0R72 0

1 2

R74 1KR74 1K

R76 *0_NCR76 *0_NC

1 2

R77 *0_NCR77 *0_NC

1 2

R403 0R403 0

1 2

R410 *0_NCR410 *0_NC

1 2

R86 0R86 0

1 2

6/12-47

HDMI_SCL
HDMI_SDA
HDMI_DETHDMI_DET_L

7/14-56

DDC_EN
PC0
PC1
CFG0
CFG1

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

COMPUTER

SiI 1362

SiI 1362

SiI 1362

FM7B 1A

FM7B 1A

FM7B 1A

1

of

of

of

18 60Monday, July 21, 2008

18 60Monday, July 21, 2008

18 60Monday, July 21, 2008