Quanta FM5 CorsicaGilligan, Inspiron 1520, Inspiron 1720, Vostro 1400 Schematic

1

2

3

4

5

6

7

8

Corsica\Gilligan - DISCRETE

M08 M/B PCBM08 M/B PCB

A A

POWER

PG 43

PG 42

AC/BATT CONNECTOR

PG 41

SYSTEM RESET CIRCUIT

BATT CHARGER

RUN POWER SW

+3.3V_SUS/+5V_SUS/+3.3V_M +5V/+3.3V/+1.8V/+1.25_RUN

PG 38

PG 40 PG 44

PG 39

Merom

(478 Micro-FCPGA)

PG 3,4

(Symbol Rev.09)

667/800 MHz FSB

REGULATOR

+1.5V_RUN/+1.05V_VCCP

REGULATOR

+1.25V/+1.8V_SUS/+0.9V_DDR_VTT

VGA CONN.

VER : X02

CPU VR

DC/DC

+3.3V_ALW/+5V_ALW/+15V_ALW

LVDS

Panel Connector

CLOCK

CK505M+LP

PG 45

PG 17

B B

DDR2-SODIMM1

533/667 MHZ DDR II

PG 15,16

Crestline

1299 uFCBGA

PCIEx16

PG 5,6,7,8,9,10

DDR2-SODIMM2

PG 15,16

CD-ROM

533/667 MHZ DDR II

IDE

(Symbol Rev.09)

DMI interface

PG 23

SATA - HDD

SATA0

ICH8-M

PG 23

676 BGA

C C

PG 23

SATA - HDD

SATA1

IHDA

PG 11,12,13,14

PCI EXPRESS GFX

PG 18

BCM4401 (B0)

33MHz PCI

33MHz PCI PCIEx1 USB2.0 (P6) PCIEx1 USB2.0 (P9)

(Symbol Rev.09)

LAN

+3.3V_LAN

PG 35

TVOUT

VGA

USB2.0 (P5)

RJ45/Magnetics

PG 36

CARDBUS/1394

R5C833

PG 20,21,22

S-Video

PG 19

CRT CONN.

PG 19

Camera

PG 33

PCIEx2

AUDIO/AMP

MDC

CONN

(Symbol Rev.09)

PG 32

SPI

LPC

PG 26

D-Micro Audio

Jacks

PG 33

Dash BD

D D

KB

Touchpad

31GM2MB0004 41GM2SS0000

1

Media BD

CG 31FM5MB0011 41FM5SS0017

Tip Ring

TP/KB

&

Media/Dash BD

Conn

PG 31

2

BC

PS/2

MEC5025 128KB Flash TMKBC

128 Pins VTQFP

3

SIO

PG 28

SPI

FLASH

PG 30

ECE5011 Expander

BC

USB 2.0 Hub(4)

128 Pins VTQFP

4

SIO

PG 29

CIR

PG 31

USB2.0 (P7)

5

USB2.0 (P0,P2) USB2.0 (P3,P8)

FAN & THERMAL

EMC4001

PG 34

6

(EXT SIDE) (EXT BACK)

EXPRESS-CARD

R5538 PG 26

MINI-CARD x1

WWAN PG 25

MINI-CARD x2

WLAN PG 24

External USB

PG 27

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

COMPUTER

Schematic Block Diagram1

M-08 0.1

7

151Tuesday, March 06, 2007

of

8

1

Pg# Description

1

Schematic Block Diagram

2

Front Page

3-4

A A

B B

C C

D D

Merom

5-10

Crestline

11-14

ICH8M

15-16

DDRII SO-DIMM(200P)

17

Clock Generator

18-21

VGA

22

LCD Conn. & SSP

23

CRT Conn

24

SATA & IDE Conn

25

PCCARD/Conn & 1394

26

Express Card & Smart Card

27

Mini Card

28

MDC Conn.

29

SIO (MEC5004)

30

SIO (MEC5018)

31

SERIAL PORT & USB

32

Flash ROM

33

TP,BT & FIR

34

Switch,Keyboard & LED

35

FAN & Thermal

36-37

Audio CODEC(STAC9200)/Phone Jack

38-39

LOM (BCM5752)/Switch

40-41

Docking Conn/Q-Switch

42

System Reset Circuit

43-44

Battery Selector & Charger

45

DDR2_1.8VSUS, 0.9V

46

1.5VSUS,1.05V(VTT)

47

1.25V,1.05VM

48

CPU_MAX8786(3phase)

49

D/D Power

50

RUN Power Switch

51

VGA DC/DC

52

DCIN/Batt Conn.

53

PAD& SCREW

54

EMI CAP

1

2

INDEX

3

DNI LIST

3

4

5

6

Power & Ground

Label Description

DC_IN+ PBATT+ PBATT+ PWR_SRC RTC_PWR3_3V +VCC_CORE +15V_ALW LARGE POWER (15V) +3.3V_RUN +3.3V_SUS +3.3V_ALW +5V_RUN +5V_SUS +5V_HDD +5V_MOD +5V_ALW +VDDA +1.5V_RUN +1.05V_VCCP +1_8V_SUS +1.8V_RUN +0.9V_DDR_VTT +3.3V_LAN

GND AGND_ISL6260

AGND1 AGND2 8731AGND

4

ALL PAGES

5

Pg#

AC ADAPTER (19V) MAIN BATTERY + (10~17V) SECOND BATTERY + (10~17V) MAIN POWER (10~19V) RTC & +3.3V_RTC_LDO(3.3V) CPU CORE POWER (1.5V)

SLP_S3# CTRLD POWER SLP_S5# CTRLD POWER 8051 POWER (3.3V) SLP_S3# CTRLD POWER SLP_S5# CTRLD POWER HDD POWER (5V) MODULE POWER (5V) LCD/CHARGE POWER (5V) AUDIO ANALOG POWER (5V) CALISTOGA/ICH7 POWER CPU/CALISTOGA/ICH7 POWER SODIMM POWER SDVO POWER SODIMM POWER LAN POWER

DIGITAL GROUND CPU GND DC/DC POWER GNDAGND_TPS51120 VTT POWER GND VTT POWER GND CHARGER GND

6

7

8

Control Signal

RUNPWROK SUS_ON RUN_ON SUS_ENABLE ALWON/THERM_STP# RUN_ON SUS_ON +5V_RUN HDDC_EN

AUDIO_AVDD_ON RUN_ON RUN_ON SUSPWROK_5V RUN_ON RUN_ON AUX_EN

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

Index, DNI, Power & Ground

M-08 0.1

7

of

251Monday, March 05, 2007

of

251Monday, March 05, 2007

of

251Monday, March 05, 2007

8

1

2

3

4

5

6

7

8

H_A#[3..16]<5>

A A

H_ADSTB#0<5> H_REQ#[0..4]<5>

H_A#[17..35]<5>

B B

H_ADSTB#1<5>

H_A20M#<11>

H_FERR#<11>

H_IGNNE#<11> H_STPCLK#<11>

H_INTR<11> H_NMI<11> H_SMI#<11>

C C

H_A#[3..16]

H_REQ#[0..4]

H_A#[17..35]

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

Populate ITP700Flex for bringup

+1.05V_VCCP

12

R352

R352 51/F

51/F

ITP_TDI ITP_TMS ITP_TCK ITP_TDO ITP_TRST#

H_RESET# ITP_DBRESET#

ITP_TCK

D D

Layout Note: Place R8 close ITP.

CLK_CPU_ITP#<17> CLK_CPU_ITP<17>

R350 27/FR350 27/F

12

R406 649/FR406 649/F

12

1

ITP_TCK

ITP_TRST#

R408

R35451R354

39/F

51

R353 0R353 0

1 2

R351 22.6/FR351 22.6/F

1 2

J4 L5 L4

K5

M3

N2

J1 N3 P5 P2

L2 P4 P1 R1

M1

K3 H2 K2

J3

L1 Y2

U5 R3

W6

U4 Y5 U1 R4 T5 T3

W2 W5

Y4 U2 V4

W3 AA4 AB2 AA3

V1 A6

A5 C4

D5 C6 B4 A3

M4

N5 T2 V3 B2 C3 D2

D22

D3 F6

12

R409

R409 150

150

1 2 5 7 3

12

11

8 9

10 14 16 18 20 22

U15A

A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]#

ADDR GROUP 0

A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#

REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#

A[17]# A[18]# A[19]#

ADDR GROUP 1

A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]#

THERMAL

A[33]# A[34]#

PROCHOT#

A[35]# ADSTB[1]#

A20M#

ICH

FERR#

THERMTRIP#

IGNNE# STPCLK#

LINT0 LINT1 SMI#

RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08]

RESERVED

RSVD[09] RSVD[10]

Merom Ball-out Rev 1a

For Support XDP:

1. ITP_BPM#5 need PU 51ohms to +1.05V_VCCP.

2. Change R4 & R361 to 51 ohms.

3. Changed R6 & R346 to 51 ohms.

4. Depopulate R2 and changed R8 to 1K/F.

JITP1

TDI TMS TCK TDO TRST#

RESET#

FBO BCLKN

BCLKP

GND0 GND1 GND2 GND3 GND4 GND5

2

H1

ADS#

E2

BNR#

G5

BPRI#

H5

DEFER#

F21

DRDY#

E1

DBSY#

F1

BR0#

D20

IERR#

B3

INIT#

H4

LOCK#

CONTROL

C1

RESET#

F3

RS[0]#

F4

RS[1]#

G3

RS[2]#

G2

TRDY#

G6

HIT#

E4

HITM#

AD4

BPM[0]#

AD3

BPM[1]#

AD1

BPM[2]#

AC4

BPM[3]#

AC2

PRDY#

AC1

PREQ#

AC5

TCK

AA6

TDI

AB3

TDO

AB5

TMS

AB6

TRST#

XDP/ITP SIGNALS

C20

DBR#

D21 A24

THERMDA

B25

THERMDC

C7

H CLK

A22

BCLK[0]

A21

BCLK[1]

Layout Note: Place couple 0.1uF Decoupling caps with in 0.1" ITP connector.

VTT0 VTT1

VTAP

DBR# DBA#

BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#

NC0

NC1 GND_0 GND_1

ITP700Flex_NC

R346 56R346 56

H_IERR#

1 2

H_RESET#

ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5 ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_DBRESET#

R344 56R344 56

CPU_PROCHOT# H_THERMDA H_THERMDC

H_THERMTRIP#

R330 56R330 56

1 2

H_THERMDA H_THERMDC

+1.05V_VCCP +3.3V_ALW

27 28 26

25 24

ITP_BPM#0

23

ITP_BPM#1

21

ITP_BPM#2

19

ITP_BPM#3

17

ITP_BPM#4

15

ITP_BPM#5

13 4 6 29 30

3

H_ADS# <5> H_BNR# <5> H_BPRI# <5>

H_DEFER# <5> H_DRDY# <5> H_DBSY# <5> H_BR0# <5>

+1.05V_VCCP

H_INIT# <11> H_LOCK# <5> H_RESET# <5>

H_RS#0 <5> H_RS#1 <5> H_RS#2 <5> H_TRDY# <5>

H_HIT# <5> H_HITM# <5>

ITP_DBRESET# <13,29>

12

+1.05V_VCCP

R340 0_NCR340 0_NC

1 2

H_THERMDA <34>

H_THERMDC <34>

H_THERMTRIP# <34>

+1.05V_VCCP

CLK_CPU_BCLK <17> CLK_CPU_BCLK# <17>

C163

1 2

2200P/50V_NC

C476 0.1U/10VC476 0.1U/10V

12

C472 0.1U/10VC472 0.1U/10V

12

R412 150R412 150

+1.05V_VCCP

1 2

R403 51_NCR403 51_NC

Reserved for support XDP debug.

EC_CPU_PROCHOT# <28>

+3.3V_SUS

R4140_NCR4140_NC

R4160R4160

1 2

12

H_D#[0..63]<5>

H_DSTBN#0<5> H_DSTBP#0<5> H_DINV#0<5>

H_D#[0..63]<5>

Layout Note: Place voltage divider within

0.5" of GTLREF pin

+1.05V_VCCP

R402

R402 1K/F

1K/F

1 2

R404

R404 2K/F

2K/F

1 2

R331 1K/F_NCR331 1K/F_NC

1 2

R106 1K/F_NCR106 1K/F_NC

1 2

C520 0.1U/10V_NCC520 0.1U/10V_NC R332 0_NCR332 0_NC

1 2

Place C close to the CPU_TEST4 pin. Make sure CPU_TEST4 routing is reference to GND and away from other noisy signal.

12

H_DSTBN#1<5> H_DSTBP#1<5> H_DINV#1<5>

CPU_MCH_BSEL0<6,17> CPU_MCH_BSEL1<6,17> CPU_MCH_BSEL2<6,17>

CPU_TEST1 CPU_TEST2 CPU_TEST4 CPU_TEST6

ITP700 layout guidelines

Signal Resistor Value Connect To Resistor Placement

TDI

150 ohm ± 5%

TMS

39 ohm ± 1% 500 to 680

TRST#

ohm ± 5%

27 ohm ± 1%

TCK

TDO

51 ohm ± 5% Place the pull-up near ITP

22.6 ohm ± 1% series resistor

RESET# VCCP

and pullup 51 ohm ± 1%.

4

VCCP VCCP

GND

VCCP

H_D#[0..63]

H_D#0

E22

H_D#1

F24

H_D#2

E26

H_D#3

G22

H_D#4

F23

H_D#5

G25

H_D#6

E25

H_D#7

E23

H_D#8

K24

H_D#9

G24

H_D#10

J24

H_D#11

J23

H_D#12

H22

H_D#13

F26

H_D#14

K22

H_D#15

H23

J26 H26 H25

H_D#16

N22

H_D#17

K25

H_D#18

P26

H_D#19

R23

H_D#20

L23

H_D#21

M24

H_D#22

L22

H_D#23

M23

H_D#24

P25

H_D#25

P23

H_D#26

P22

H_D#27

T24

H_D#28

R24

H_D#29

L25

H_D#30

T25

H_D#31

N25

L26 M26

V_CPU_GTLREF CPU_TEST1 CPU_TEST2 CPU_TEST3 CPU_TEST4 CPU_TEST5 CPU_TEST6

PAD

PAD PAD

PAD

For the purpose of testability, route these signals through a ground referenced Z0 = 55ohm trace that ends in a via that is near a GND via and is accessible through an oscilloscope connection.

FSB

N24

AD26

C23 D25 C24

AF26

AF1 A26

B22 B23 C21

T17

T17 T97

T97

BCLK 533 0 0 1133 667

166

800

200

Place the pull-up near CPU Within 200ps of ITP connector

Place the pull-down near CPU Connect to TCK pin of CPU and then

connect it to FBO pin of ITP connector in daisy chain. Place the pull-down near TCK0 pin of ITP connector

Connect to CPURST# pin of GMCH through the series resistor placed within 200ps of ITP connector. Place the pull-up after the series resistor from ITP connector.

5

6

U15B

D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]#

DATA GRP 0 DATA GRP 1

D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#

D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

BSEL[0] BSEL[1] BSEL[2]

Merom Ball-out Rev 1a

CPU_TEST3 CPU_TEST5

DATA GRP 2DATA GRP 3

DSTBN[2]# DSTBP[2]#

DSTBN[3]# DSTBP[3]#

MISC

PWRGOOD

DINV[2]#

DINV[3]# COMP[0]

COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

BSEL2 BSEL1 BSEL0

0

1 1

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]#

D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]#

SLP#

PSI#

1

AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

COMP0 COMP1 COMP2 COMP3

H_D#[0..63]

Note: H_DPRTSTP need to daisy chain from ICH8 to IMVP6 to CPU.

COMP0 COMP1 COMP2 COMP3

H_D#[0..63]

H_D#32

Y22

00

Comp0,2 connect with Zo=27.4ohm,Comp1,3 connect with Zo=55ohm, make those traces length shorter than 0.5".Trace should be at least 25 mils away from any other toggling signal.

DELL CONFIDENTIAL/PROPRIETARY

Title

Merom Processor (HOST BUS)

Size Document Number Rev

M-08 0.1

Date: Sheet

7

R398

54.9/F

1 2

H_D#[0..63] <5>

H_DSTBN#2 <5> H_DSTBP#2 <5> H_DINV#2 <5>

H_D#[0..63] <5>

H_DSTBN#3 <5> H_DSTBP#3 <5> H_DINV#3 <5>

H_DPRSTP# <6,11,45> H_DPSLP# <11> H_DPWR# <5> H_PWRGOOD <11> H_CPUSLP# <5> H_PSI# <45>

R392

R400

54.9/F

27.4/F

1 2

of

351Monday, March 05, 2007

8

R388

27.4/F

1

2

3

4

5

6

7

8

+VCC_CORE +VCC_CORE

+VCC_CORE

A A

+VCC_CORE

All use 10U 4V(+-20%,X6S,0805)Pb-Free.

12

C492

C492 10U/4V

10U/4V

C508

C508 10U/4V

10U/4V

12

C203

C203 10U/4V

10U/4V

C507

C507 10U/4V

10U/4V

12

C204

C204 10U/4V

10U/4V

C207

C207 10U/4V

10U/4V

12

C205

C205 10U/4V

10U/4V

C208

C208 10U/4V

10U/4V

12

C206

C206 10U/4V

10U/4V

C462

C462 10U/4V

10U/4V

8 inside cavity, north side, secondary layer.

+VCC_CORE

C503

C503 10U/4V

10U/4V

C448

C448 10U/4V

10U/4V

12

B B

+VCC_CORE

12

C502

C502 10U/4V

10U/4V

C447

C447 10U/4V

10U/4V

12

C506

C506 10U/4V

10U/4V

C501

C501 10U/4V

10U/4V

12

C505

C505 10U/4V

10U/4V

C442

C442 10U/4V

10U/4V

12

C504

C504 10U/4V

10U/4V

C449

C449 10U/4V

10U/4V

8 inside cavity, south side, secondary layer.

+VCC_CORE

12

C491

C491 10U/4V

10U/4V

12

C458

C458 10U/4V

10U/4V

12

C443

C443 10U/4V

10U/4V

12

C444

C444 10U/4V

10U/4V

12

C445

C445 10U/4V

10U/4V

12

C446

C446 10U/4V

10U/4V

6 inside cavity, north side, primary layer.

+VCC_CORE

C184

C184 10U/4V

10U/4V

12

C C

12

C185

C185 10U/4V

10U/4V

12

C186

C186 10U/4V

10U/4V

12

C187

C187 10U/4V

10U/4V

12

C188

C188 10U/4V

10U/4V

12

C189

C189 10U/4V

10U/4V

6 inside cavity, south side, primary layer.

+1.05V_VCCP

C490

0.1U/10V

12

Layout out: Place these inside socket cavity on North side secondary.

D D

C461

0.1U/10V

12

C489

0.1U/10V

12

C460

0.1U/10V

12

C488

0.1U/10V

12

C459

0.1U/10V

+PWR_SRC

12

C250

+

100U/25V

Layout Note: Need to add 100uF cap on PWR_SRC for cap singing. Place on PWR_SRC near +VCC_CORE.

U15C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

Merom Ball-out Rev 1a

12

+

C53

C53 100U/25V

100U/25V

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

.

12

C98

+

100U/25V_NC

VCCSENSE

VSSSENSE

+1.05V_VCCP

12

+

VID0 <45> VID1 <45> VID2 <45> VID3 <45> VID4 <45> VID5 <45> VID6 <45>

VCCSENSE <45>

VSSSENSE <45>

12

C249

+

100U/25V

C487

C487 220U/4V

220U/4V

12

C430

0.01U/25V

Layout Note:

Place C105 near PIN

B26.

+VCC_CORE

VCCSENSE

60

VSSSENSE

Route VCCSENSE and VSSSENSE traces at 27.4ohms and length matched to within 25 mil. Place PU and PD within 2 inch of CPU.

+1.5V_RUN

12

R413

R413 100/F

100/F

12

R410

R410 100/F

100/F

C440

C440 10U/4V

10U/4V

U15D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

Merom Ball-out Rev 1a

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

VSS[163]

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

.

DELL CONFIDENTIAL/PROPRIETARY

Title

Merom Processor (POWER)

Size Document Number Rev

M-08 0.1

Date: Sheet

1

2

3

4

5

6

Date: Sheet

7

of

451Monday, March 05, 2007

8

1

2

3

4

5

6

7

8

U19A

M10 N12

W10

AD12

AE3 AD9 AC9

AC7 AC14 AD11 AC11

AB2

AD7

AB1

AC6

AE2

AC5

AG3

AH8

AJ14

AE9 AE11 AH12

AH5

AE7

AE5

AH2 AH13

E2 G2 G7 M6 H7 H3 G4

F3 N8 H2

N9 H5

P13

K9 M2

Y8

V4 M3

J1 N5 N3

W6 W9

N2

Y7 Y9 P4

W3

N1

Y3

AJ9

AJ5 AJ6 AJ7

AJ2 AJ3

B3

C2

W1 W2

B6 E5

B9 A9

U19A

H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

H_SWING H_RCOMP

H_SCOMP H_SCOMP#

H_CPURST# H_CPUSLP#

H_AVREF H_DVREF

CRESTLINE_1p0

H_ADSTB#_0 H_ADSTB#_1

HOST

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

AJ0QP210T00

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0 H_RS#_1 H_RS#_2

J13 B11 C11 M11 C15 F16 L13 G17 C14 K16 B13 L16 J17 B14 K19 P15 R17 B16 H20 L19 D17 M17 N16 J19 B18 E19 B17 B15 E17 C18 A19 B19 N19

G12 H17 G20 C8 E8 F12 D6 C10 AM5 AM7 H8 K7 E4 C6 G10 B7

K5 L2 AD13 AE13

M7 K3 AD2 AH11

L7 K2 AC2 AJ10

M14 E13 A11 H13 B12

E12 D7 D8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_D#[0..63]<3>

A A

+1.05V_VCCP

12

R360

R360 221/F

221/F

H_SWING

12

R368

R368 100/F

100/F

B B

+1.05V_VCCP

12

R401

54.9/F

12

R361

24.9/F

Layout Note: H_RCOMP trace should be 10-mil wide with 20-mil

C C

spacing.

12

R399

54.9/F

1 2

H_SCOMP H_SCOMP#

H_RCOMP

C465

0.1U/10V

+1.05V_VCCP

R357

R357 1K/F

1K/F

1 2

12

R362

R362 2K/F

2K/F

H_D#[0..63]

H_RESET#<3>

H_CPUSLP#<3>

12

C456

0.1U/10V

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

H_SCOMP H_SCOMP#

H_REF

H_A#[3..35]

H_ADS# <3> H_ADSTB#0 <3> H_ADSTB#1 <3> H_BNR# <3> H_BPRI# <3> H_BR0# <3> H_DEFER# <3> H_DBSY# <3> CLK_MCH_BCLK <17> CLK_MCH_BCLK# <17> H_DPWR# <3> H_DRDY# <3> H_HIT# <3> H_HITM# <3> H_LOCK# <3> H_TRDY# <3>

H_DINV#0 <3> H_DINV#1 <3> H_DINV#2 <3> H_DINV#3 <3>

H_DSTBN#0 <3> H_DSTBN#1 <3> H_DSTBN#2 <3> H_DSTBN#3 <3>

H_DSTBP#0 <3> H_DSTBP#1 <3> H_DSTBP#2 <3> H_DSTBP#3 <3>

H_REQ#0 <3> H_REQ#1 <3> H_REQ#2 <3> H_REQ#3 <3> H_REQ#4 <3>

H_RS#0 <3> H_RS#1 <3> H_RS#2 <3>

H_A#[3..35] <3>

Layout Note: Place the 0.1 uF

D D

1

2

decoupling capacitor within 100 mils from GMCH pins.

3

DELL CONFIDENTIAL/PROPRIETARY

Title

Crestline (HOST)

Size Document Number Rev

M-08 0.1

Date: Sheet

4

5

6

Date: Sheet

7

of

551Tuesday, March 06, 2007

8

1

+1.8V_SUS

12

R421

R421 1K/F

SM_RCOMP_VOH

12

A A

SM_RCOMP_VOL

12

Santa Rosa Platform MOW WW15 For 4Gb DRAM support, change Pin-BJ29 to DDR_A_MA14, change Pin-BE24 to DDR_B_MA14.

+3.3V_RUN

B B

+1.05V_VCCP

Layout Note: Location of all MCH_CFG strap resistors needs to be close to minmize stub.

CPU_MCH_BSEL0<3,17> CPU_MCH_BSEL1<3,17> CPU_MCH_BSEL2<3,17>

C C

+3.3V_RUN

THERMTRIP_MCH#<34>

D D

12

C564

0.01U/25V

C563

0.01U/25V

R375 10KR375 10K R383 10KR383 10K

PM_BMBUSY#<13>

H_DPRSTP#<3,11,45> PM_EXTTS#0<15> PM_EXTTS#1<15> ICH_PWRGD<13,38>

DPRSLPVR<13,45>

C559

2.2U/10V

12

C560

2.2U/10V

DDR_A_MA14<15,16> DDR_B_MA14<15,16>

1 2 1 2

R395 56R395 56

1 2

T80

PAD

T26

PAD

R377 4.02K/F_NCR377 4.02K/F_NC

T94

PAD

T84

PAD

T85

PAD

R366 4.02K/F_NCR366 4.02K/F_NC

T95

PAD

T89

PAD

T90

PAD

T79

PAD

T82

PAD

T88

PAD

R391 4.02K/F_NCR391 4.02K/F_NC

T92

PAD

T91

PAD

R381 4.02K/F_NCR381 4.02K/F_NC R382 4.02K/F_NCR382 4.02K/F_NC

PAD

PAD PAD

PAD

1

1K/F

12

R425

3.01K/F

12

R426

R426 1K/F

1K/F

DDR_A_MA14 DDR_B_MA14

PM_EXTTS#0 PM_EXTTS#1

THERMTRIP_MCH#

12

12 12

PM_EXTTS#0 PM_EXTTS#1

PLTRST#_R THERMTRIP_MCH#

1 2

R363 0R363 0

TP_NC1

T37

TP_NC2

T38

TP_NC3

T42

TP_NC4

T44

TP_NC5

T43

TP_NC6

T41

TP_NC7

T40

TP_NC8

T36

TP_NC9

T35

TP_NC10

T30

TP_NC11

T25

TP_NC12

T29

TP_NC13

T27

TP_NC14

T24

TP_NC15

T23

TP_NC16

T39

CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20

U19B

P36 P37 R35

N35 AR12 AR13

AM12

AN13

J12

AR37

AM36

AL36

AM37

D20

H10

B51

BJ20 BK22 BF19 BH20 BK18

BJ18 BF23 BG23 BC23 BD24

BJ29 BE24 BH39

AW20

BK20

C48 D47 B44 C44 A35 B37 B36 B34 C34

P27 N27 N24 C21 C23 F23 N23 G23

J20 C20 R24

L23

J23 E23 E20 K23 M20 M24

L32 N33

L35

G41

L39

L36

J36

AW49

AV20

N20 G36

BJ51 BK51 BK50

BL50

BL49

BL3 BL2 BK1 BJ1

E1

A5 C51 B50 A50 A49 BK2

CRESTLINE_1p0

2

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14

RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 RSVD28 RSVD29 RSVD30 RSVD31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36 RSVD37 RSVD38 RSVD39 RSVD40 RSVD41 RSVD42 RSVD43 RSVD44 RSVD45

CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20

PM_BM_BUSY# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR

NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16

2

DDR MUXINGCLKDMI

CFGRSVD

PM

GRAPHICS VIDME

NC

MISC

3

SM_CK_0 SM_CK_1 SM_CK_3 SM_CK_4

SM_CK#_0 SM_CK#_1 SM_CK#_3 SM_CK#_4

SM_CKE_0 SM_CKE_1 SM_CKE_3 SM_CKE_4

SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3

SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF_0 SM_VREF_1

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

CL_VREF

SDVO_CTRL_CLK

SDVO_CTRL_DATA

CLK_REQ#

ICH_SYNC#

TEST_1 TEST_2

3

AV29 BB23 BA25 AV23

AW30 BA23 AW25 AW23

BE29 AY32 BD39 BG37

BG20 BK16 BG16 BE13

BH18 BJ15 BJ14 BE16

BL15 BK14

BK31 BL31

AR49 AW4

B42 C42 H48 H47

K44 K45

AN47 AJ38 AN42 AN46

AM47 AJ39 AN41 AN45

AJ46 AJ41 AM40 AM44

AJ47 AJ42 AM39 AM43

E35 A39 C38 B39 E36

AM49 AK50 AT43 AN49 AM50

H35 K36 G39 G40

A37 R32

M_CLK_DDR0 <15> M_CLK_DDR1 <15> M_CLK_DDR2 <15> M_CLK_DDR3 <15>

M_CLK_DDR#0 <15> M_CLK_DDR#1 <15> M_CLK_DDR#2 <15> M_CLK_DDR#3 <15>

DDR_CKE0_DIMMA <15,16> DDR_CKE1_DIMMA <15,16> DDR_CKE2_DIMMB <15,16> DDR_CKE3_DIMMB <15,16>

DDR_CS0_DIMMA# <15,16> DDR_CS1_DIMMA# <15,16> DDR_CS2_DIMMB# <15,16> DDR_CS3_DIMMB# <15,16>

M_ODT0 <15,16> M_ODT1 <15,16> M_ODT2 <15,16> M_ODT3 <15,16>

SMRCOMPP SMRCOMPN

SM_RCOMP_VOH SM_RCOMP_VOL

V_DDR_MCH_REF

CLK_MCH_3GPLL <17> CLK_MCH_3GPLL# <17>

DMI_MRX_ITX_N0 <12> DMI_MRX_ITX_N1 <12> DMI_MRX_ITX_N2 <12> DMI_MRX_ITX_N3 <12>

DMI_MRX_ITX_P0 <12> DMI_MRX_ITX_P1 <12> DMI_MRX_ITX_P2 <12> DMI_MRX_ITX_P3 <12>

DMI_MTX_IRX_N0 <12> DMI_MTX_IRX_N1 <12> DMI_MTX_IRX_N2 <12> DMI_MTX_IRX_N3 <12>

DMI_MTX_IRX_P0 <12> DMI_MTX_IRX_P1 <12> DMI_MTX_IRX_P2 <12> DMI_MTX_IRX_P3 <12>

T83

PAD

T19

PAD

T20

PAD

T22

PAD

T21

PAD

CL_CLK0 <13> CL_DATA0 <13> ICH_CL_PWROK <13,28>

ICH_CL_RST0# <13>

MCH_CLVREF

CLK_3GPLLREQ# <17> MCH_ICH_SYNC# <13>

R396

R396 20K

20K

1 2

R3560R356 0

4

Non-iAMT

4

+1.8V_SUS

R424

R424 20/F

20/F

SMRCOMPP SMRCOMPN

R422

R422 20/F

20/F

+1.25V_RUN

MCH_CLVREF

C522

0.1U/10V

1 2

CFG5

CFG9

CFG16

CFG19

CFG20

SDVO_CRTL_DATA

PLTRST#_R

12

R405

R405 1K/F

1K/F

12

R407

R407 392/F

392/F

12

100

100 R415

R415

12

5

U19C

J40

L_BKLT_CTRL

H39

L_BKLT_EN

E39

L_CTRL_CLK

E40

L_CTRL_DATA

C37

L_DDC_CLK

D35

L_DDC_DATA

K40

L_VDD_EN

L41

LVDS_IBG

L43

LVDS_VBG

N41

LVDS_VREFH

N40

LVDS_VREFL

D46

LVDSA_CLK#

C45

LVDSA_CLK

D44

LVDSB_CLK#

E42

LVDSB_CLK

G51

LVDSA_DATA#_0

E51

LVDSA_DATA#_1

F49

LVDSA_DATA#_2

G50

LVDSA_DATA_0

E50

LVDSA_DATA_1

F48

LVDSA_DATA_2

G44

LVDSB_DATA#_0

B47

LVDSB_DATA#_1

B45

LVDSB_DATA#_2

E44

LVDSB_DATA_0

A47

LVDSB_DATA_1

A45

LVDSB_DATA_2

E27

TVA_DAC

G27

TVB_DAC

K27

TVC_DAC

F27

TVA_RTN

J27

TVB_RTN

L27

TVC_RTN

M35

TV_DCONSEL_0

P33

TV_DCONSEL_1

H32

CRT_BLUE

G32

CRT_BLUE#

K29

CRT_GREEN

J29

CRT_GREEN#

F29

CRT_RED

E29

CRT_RED#

K33

CRT_DDC_CLK

G35

CRT_DDC_DATA

F33

CRT_HSYNC

C32

CRT_TVO_IREF

E33

CRT_VSYNC

CRESTLINE_1p0

DMI X2 Select PCI Express

Graphic Lane FSB Dynamic

ODT DMI Lane

Reversal

SDVO/PCIE Concurrent Operation

SDVO Present.

R160 0_0402R160 0_0402

1 2

R161 0_0402_NCR161 0_0402_NC

1 2

5

6

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9

PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9

N43 M43

J51 L51 N47 T45 T50 U40 Y44 Y40 AB51 W49 AD44 AD40 AG46 AH49 AG45 AG41

J50 L50 M47 U44 T49 T41 W45 W41 AB50 Y48 AC45 AC41 AH47 AG49 AH45 AG42

N45 U39 U47 N51 R50 T42 Y43 W46 W38 AD39 AC46 AC49 AC42 AH39 AE49 AH44

M45 T38 T46 N50 R51 U43 W42 Y47 Y39 AC38 AD47 AC50 AD43 AG39 AE50 AH43

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8

LVDS

TV VGA

Low=DMIx2 High=DMIx4(Default)

Low= Reveise Lane High=Normal operation

Low=Dynamic ODT Disable High=Dynamic ODT Enable(default).

Low=Normal(default). High=Lane Reversed

Low=Only SDVO or PCIEx1 is operational (defaults) High=SDVO and PCIEx1 are operating simultaneously via PEG port

Low=No SDVO Device Present (default) High=SDVO Device Present

PLTRST# <12,28>

SB_NB_PCIE_RST# <12>

PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_10

PEG_RX_11

PEG_RX_12

PEG_RX_13

PEG_RX_14

PEG_RX_15

PEG_TX#_0

PEG_TX#_1

PEG_TX#_2

PEG_TX#_3

PEG_TX#_4

PEG_TX#_5

PEG_TX#_6

PEG_TX#_7

PEG_TX#_8

PEG_TX#_9

PEG_TX#_10 PEG_TX#_11

PCI-EXPRESS GRAPHICS

PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_10

PEG_TX_11

PEG_TX_12

PEG_TX_13

PEG_TX_14

PEG_TX_15

6

7

+VCC_PEG

VCC3G_PCIE_R

PCIE_MRX_GTX_N0 PCIE_MRX_GTX_N1 PCIE_MRX_GTX_N2 PCIE_MRX_GTX_N3 PCIE_MRX_GTX_N4 PCIE_MRX_GTX_N5 PCIE_MRX_GTX_N6 PCIE_MRX_GTX_N7 PCIE_MRX_GTX_N8 PCIE_MRX_GTX_N9 PCIE_MRX_GTX_N10 PCIE_MRX_GTX_N11 PCIE_MRX_GTX_N12 PCIE_MRX_GTX_N13 PCIE_MRX_GTX_N14 PCIE_MRX_GTX_N15

PCIE_MRX_GTX_P0 PCIE_MRX_GTX_P1 PCIE_MRX_GTX_P2 PCIE_MRX_GTX_P3 PCIE_MRX_GTX_P4 PCIE_MRX_GTX_P5 PCIE_MRX_GTX_P6 PCIE_MRX_GTX_P7 PCIE_MRX_GTX_P8 PCIE_MRX_GTX_P9 PCIE_MRX_GTX_P10 PCIE_MRX_GTX_P11 PCIE_MRX_GTX_P12 PCIE_MRX_GTX_P13 PCIE_MRX_GTX_P14 PCIE_MRX_GTX_P15

PCIE_MTX_GRX_N0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_N15

PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_P15

DELL CONFIDENTIAL/PROPRIETARY

Title

Crestline (VGA,DMI)

Size Document Number Rev

M-08 0.1

Date: Sheet

R389 24.9/FR389 24.9/F

1 2

PCIE_MRX_GTX_N[0..15] <18>

PCIE_MRX_GTX_P[0..15] <18>

PCIE_MTX_GRX_N[0..15] <18>

PCIE_MTX_GRX_P[0..15] <18>

7

8

of

651Tuesday, March 06, 2007

8

1

2

3

4

5

6

7

8

DDR_A_D[0..63]<15>

A A

B B

C C

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AR43

AW44

BA45 AY46 AR41 AR45 AT42

AW47

BB45 BF48 BG47

BJ45 BB47 BG50 BH49 BE45

AW43

BE44 BG42 BE40 BF44 BH45 BG40 BF40 AR40

AW40

AT39

AW36 AW41

AY41 AV38 AT38 AV13 AT13

AW11

AV11 AU15 AT11 BA13 BA11 BE10 BD10

BD8 AY9

BG10

AW9

BD7 BB9 BB5 AY7 AT5 AT7 AY6 BB7 AR5 AR8 AR9 AN3 AM8

AN10

AT9 AN9 AM9

AN11

U19D

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

CRESTLINE_1p0

DDR_A_BS0

BB19

SA_BS_0 SA_BS_1

SA_BS_2 SA_CAS# SA_DM_0

SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13

SA_RAS#

SA_RCVEN#

DDR SYSTEM MEMORY A

SA_WE#

BK19 BF29

BL17 AT45

BD44 BD42 AW38 AW13 BG8 AY5 AN6

AT46 BE48 BB43 BC37 BB16 BH6 BB2 AP3 AT47 BD47 BC41 BA37 BA16 BH7 BC1 AP2

BJ19 BD20 BK27 BH28 BL24 BK28 BJ27 BJ25 BL28 BA28 BC19 BE28 BG30 BJ16

BE18 AY20

BA19

DDR_A_BS1 DDR_A_BS2

DDR_A_CAS# DDR_A_DM0

DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13

DDR_A_RAS#

DDR_A_WE#

DDR_A_BS0 <15,16> DDR_A_BS1 <15,16> DDR_A_BS2 <15,16>

DDR_A_CAS# <15,16> DDR_A_DM[0..7] <15>

DDR_A_DQS[0..7] <15>

DDR_A_DQS#[0..7] <15>

DDR_A_MA[0..13] <15,16>

DDR_A_RAS# <15,16>

T102 PADT102 PAD

DDR_A_WE# <15,16>

DDR_B_D[0..63]<15>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AP49

AR51 AW50 AW51

AN51

AN50

AV50

AV49

BA50

BB50

BA49

BE50

BA51

AY49

BF50

BF49

BJ50 BJ44 BJ43

BL43 BK47 BK49 BK43 BK42

BJ41

BL41

BJ37

BJ36 BK41

BJ40

BL35 BK37 BK13 BE11 BK11 BC11 BC13 BE12 BC12 BG12

BJ10

BK10

BH5 BG1 BC2 BK3 BE4 BD3

BA3 BB3 AR1 AT3 AY2 AY3 AU2 AT2

BL9 BK5 BL5 BK9

BJ8 BJ6 BF4

BJ2

U19E

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

CRESTLINE_1p0

DDR_B_BS0

AY17

SB_BS_0 SB_BS_1

SB_BS_2 SB_CAS# SB_DM_0

SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13

SB_RAS#

SB_RCVEN#

SB_WE#

DDR SYSTEM MEMORY B

BG18 BG36

BE17 AR50

BD49 BK45 BL39 BH12 BJ7 BF3 AW2

AT50 BD50 BK46 BK39 BJ12 BL7 BE2 AV2 AU50 BC50 BL45 BK38 BK12 BK7 BF2 AV3

BC18 BG28 BG25 AW17 BF25 BE25 BA29 BC28 AY28 BD37 BG17 BE37 BA39 BG13

AV16 AY18

BC17

DDR_B_BS1 DDR_B_BS2

DDR_B_CAS# DDR_B_DM0

DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13

DDR_B_RAS#

DDR_B_WE#

DDR_B_BS0 <15,16> DDR_B_BS1 <15,16> DDR_B_BS2 <15,16>

DDR_B_CAS# <15,16> DDR_B_DM[0..7] <15>

DDR_B_DQS[0..7] <15>

DDR_B_DQS#[0..7] <15>

DDR_B_MA[0..13] <15,16>

DDR_B_RAS# <15,16>

T103 PADT103 PAD

DDR_B_WE# <15,16>

D D

DELL CONFIDENTIAL/PROPRIETARY

Title

Crestline (DDR2)

Size Document Number Rev

M-08 0.1

Date: Sheet

1

2

3

4

5

6

Date: Sheet

7

of

751Monday, March 05, 2007

8

5

U19G

AT35 AT34 AH28 AC32 AC31 AK32

AJ31

AJ28 AH32 AH31 AH29 AF32

AU32 AU33 AU35 AV33

AW33 AW35

AY35 BA32 BA33 BA35 BB33 BC32 BC33 BC35 BD32 BD35 BE32 BE33 BE35 BF33 BF34 BG32 BG33 BG35 BH32 BH34 BH35

BJ32

BJ33

BJ34 BK32 BK33 BK34 BK35

BL33 AU30

W13 W14

AA20 AA23 AA26 AA28 AB21 AB24 AB29 AC20 AC21 AC23 AC24 AC26 AC28 AC29 AD20 AD23 AD24 AD28 AF21 AF26 AA31 AH20 AH21 AH23 AH24 AH26 AD31

AJ20 AN14

R30

R20 T14

Y12

5

U19G

VCC_1 VCC_2 VCC_3 VCC_5 VCC_4 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12

VCC_13

VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35 VCC_SM_36

VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34

CRESTLINE_1p0

VCC CORE

POWER

VCC SMVCC GFX

VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52 VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55

VCC GFX NCTF

VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60 VCC_AXG_NCTF_61 VCC_AXG_NCTF_62 VCC_AXG_NCTF_63 VCC_AXG_NCTF_64 VCC_AXG_NCTF_65 VCC_AXG_NCTF_66 VCC_AXG_NCTF_67 VCC_AXG_NCTF_68 VCC_AXG_NCTF_69 VCC_AXG_NCTF_70 VCC_AXG_NCTF_71 VCC_AXG_NCTF_72 VCC_AXG_NCTF_73 VCC_AXG_NCTF_74 VCC_AXG_NCTF_75 VCC_AXG_NCTF_76 VCC_AXG_NCTF_77 VCC_AXG_NCTF_78 VCC_AXG_NCTF_79 VCC_AXG_NCTF_80 VCC_AXG_NCTF_81 VCC_AXG_NCTF_82 VCC_AXG_NCTF_83

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

VCC SM LF

+VCC_GMCH

D D

+VCC_SM

C C

B B

A A

T17 T18 T19 T21 T22 T23 T25 U15 U16 U17 U19 U20 U21 U23 U26 V16 V17 V19 V20 V21 V23 V24 Y15 Y16 Y17 Y19 Y20 Y21 Y23 Y24 Y26 Y28 Y29 AA16 AA17 AB16 AB19 AC16 AC17 AC19 AD15 AD16 AD17 AF16 AF19 AH15 AH16 AH17 AH19 AJ16 AJ17 AJ19 AK16 AK19 AL16 AL17 AL19 AL20 AL21 AL23 AM15 AM16 AM19 AM20 AM21 AM23 AP15 AP16 AP17 AP19 AP20 AP21 AP23 AP24 AR20 AR21 AR23 AR24 AR26 V26 V28 V29 Y31

AW45 BC39 BE39 BD17 BD4 AW8 AT6

4

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

4

12

C531

0.1U/10V

+1.05V_VCCP

Layout Note: 370 mils from edge.

12

C537

C549

0.1U/10V

0.22U/10V

12

C547

0.22U/10V

12

+

C202

C202 220U/2.5V

220U/2.5V

3

12

C192

C192 22U/4V

22U/4V

Layout Note: Inside GMCH cavity.

+1.05V_VCCP

Non-iAMT

12

C557

0.47U/10V

3

+3.3V_RUN

R341 10R341 10

1 2

12

C512

0.22U/10V

12

Layout Note: Place close to GMCH edge.

12

C536

C536 1U/10V

1U/10V

+VCC_GMCH_L

+VCC_GMCH

12

C513

0.22U/10V

Layout Note: Inside GMCH cavity.

+VCC_AXM

12

C523

0.1U/10V

12

C239

C239 22U/4V

22U/4V

C534

C534 1U/10V

1U/10V

D29

SDMK0340L-7-F

12

C517

0.1U/10V

12

C521

0.1U/10V

C527

0.22U/10V

C526

0.1U/10V

12

C529

0.22U/10V

+1.8V_SUS

12

Layout Note: Place C901 where LVDS and DDR2 taps.

C530

0.1U/10V

2

U19F

21

2

AB33

VCC_NCTF_1

AB36

VCC_NCTF_2

AB37

VCC_NCTF_3

AC33

VCC_NCTF_4

AC35

VCC_NCTF_5

AC36

VCC_NCTF_6

AD35

VCC_NCTF_7

AD36

VCC_NCTF_8

AF33

VCC_NCTF_9

AF36

VCC_NCTF_10

AH33

VCC_NCTF_11

AH35

VCC_NCTF_12

AH36

VCC_NCTF_13

AH37

VCC_NCTF_14

AJ33

VCC_NCTF_15

AJ35

VCC_NCTF_16

AK33

VCC_NCTF_17

AK35

VCC_NCTF_18

AK36

VCC_NCTF_19

AK37

VCC_NCTF_20

AD33

VCC_NCTF_21

AJ36

VCC_NCTF_22

AM35

VCC_NCTF_23

AL33

VCC_NCTF_24

AL35

VCC_NCTF_25

AA33

VCC_NCTF_26

AA35

VCC_NCTF_27

AA36

VCC_NCTF_28

AP35

VCC_NCTF_29

AP36

VCC_NCTF_30

AR35

VCC_NCTF_31

AR36

VCC_NCTF_32

Y32

VCC_NCTF_33

Y33

VCC_NCTF_34

Y35

VCC_NCTF_35

Y36

VCC_NCTF_36

Y37

VCC_NCTF_37

T30

VCC_NCTF_38

T34

VCC_NCTF_39

T35

VCC_NCTF_40

U29

VCC_NCTF_41

U31

VCC_NCTF_42

U32

VCC_NCTF_43

U33

VCC_NCTF_44

U35

VCC_NCTF_45

U36

VCC_NCTF_46

V32

VCC_NCTF_47

V33

VCC_NCTF_48

V36

VCC_NCTF_49

V37

VCC_NCTF_50

AL24

VCC_AXM_NCTF_1

AL26

VCC_AXM_NCTF_2

AL28

VCC_AXM_NCTF_3

AM26

VCC_AXM_NCTF_4

AM28

VCC_AXM_NCTF_5

AM29

VCC_AXM_NCTF_6

AM31

VCC_AXM_NCTF_7

AM32

VCC_AXM_NCTF_8

AM33

VCC_AXM_NCTF_9

AP29

VCC_AXM_NCTF_10

AP31

VCC_AXM_NCTF_11

AP32

VCC_AXM_NCTF_12

AP33

VCC_AXM_NCTF_13

AL29

VCC_AXM_NCTF_14

AL31

VCC_AXM_NCTF_15

AL32

VCC_AXM_NCTF_16

AR31

VCC_AXM_NCTF_17

AR32

VCC_AXM_NCTF_18

AR33

VCC_AXM_NCTF_19

CRESTLINE_1p0

12

+

C572

C572 330U/6.3V

330U/6.3V

DELL CONFIDENTIAL/PROPRIETARY

Title

Crestline (VCC,NCTF)

Size Document Number Rev

M-08 0.1

Date: Sheet

VCC NCTF

POWER

VCC AXM NCTF

+VCC_SM

12

C253

C253 22U/4V

22U/4V

Layout Note: Place on the edge.

1

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16

VSS NCTF

VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21

VSS_SCB1 VSS_SCB2 VSS_SCB3 VSS_SCB4 VSS_SCB5 VSS_SCB6

VSS SCBVCC AXM

VCC_AXM_1 VCC_AXM_2 VCC_AXM_3 VCC_AXM_4 VCC_AXM_5 VCC_AXM_6 VCC_AXM_7

12

C254

C254 22U/4V

22U/4V

1

T27 T37 U24 U28 V31 V35 AA19 AB17 AB35 AD19 AD37 AF17 AF35 AK17 AM17 AM24 AP26 AP28 AR15 AR19 AR28

A3 B2 C1 BL1 BL51 A51

AT33 AT31 AK29 AK24 AK23 AJ26 AJ23

+VCC_AXM

851Monday, March 05, 2007

of

5

D D

Non-iAMT

+1.25V_RUN

+VCCA_MPLL_L

12

C C

+1.25V_RUN

B B

45mA MAx.

FB_120ohm+-25%_100mHz _200mA_0.2ohm DC

L36

L36 BLM11A121S

BLM11A121S

L37

L37 BLM11A121S

BLM11A121S R411

R411

0.5/F/0603

1 2

C242

C242 22U/10V

22U/10V

FB_220ohm+-25%_100MHz _2A_0.1ohm DC

+VCCA_HPLL

12

C241

C241 22U/10V

22U/10V

+VCCA_MPLL

12

L35

1 2

BLM21PG221SN1D

12

C519

0.1U/10V

12

C528

0.1U/10V

+1.25V_RUN

Non-iAMT

+VCCA_PEG_PLL

12

R394

R394 1/F/0603

1/F/0603

12

C494

C494 10U/6.3V

10U/6.3V

1 2

12

C509

0.1U/10V

PJP18PJP18

1 2

12

C246

+

100U/6.3V

12

C548

C548 22U/4V

22U/4V

+1.5V_RUN

PJP16PJP16

C525

4.7U/6.3V

1 2

12

C538

C538 1U/10V

1U/10V

12

C450

C450 10U/6.3V

10U/6.3V

4

+3.3V_RUN

12

C532

C532 22U/4V

22U/4V

12

C539

C539 1U/10V

1U/10V

12

C483

0.1U/10V

+1.25V_RUN

Non-iAMT

12

C466

0.1U/10V

12

+VCCA_SM

C541

C541 22U/4V

22U/4V

C555

0.1U/10V

C451

0.022U/16V

12

C457

0.1U/10V

+VCCA_HPLL +VCCA_MPLL

+VCCA_PEG_PLL

12

C524

C524 1U/10V

1U/10V

+VCCA_SM_CK

+VCCA_PEG_PLL

12

C500

0.1U/10V

H49

AM2

U51

AW18

AV19 AU19 AU18 AU17

AT22 AT21 AT19 AT18 AT17 AR17 AR16

BC29 BB29

C25 C27

M32

N28 AN2 U48

H42

J32

A33 B33

A30 B32

B49

AL2

A41 B41

K50 K49

B25 B27

B28 A28

L29

J41

3

U19H

VCCSYNC VCCA_CRT_DAC_1

VCCA_CRT_DAC_2

VCCA_DAC_BG VSSA_DAC_BG

VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL

VCCA_LVDS VSSA_LVDS

VCCA_PEG_BG VSSA_PEG_BG

VCCA_PEG_PLL

VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5

VCCA_SM_7 VCCA_SM_8 VCCA_SM_9 VCCA_SM_10 VCCA_SM_11 VCCA_SM_NCTF_1 VCCA_SM_NCTF_2

VCCA_SM_CK_1 VCCA_SM_CK_2

VCCA_TVA_DAC_1 VCCA_TVA_DAC_2 VCCA_TVB_DAC_1 VCCA_TVB_DAC_2 VCCA_TVC_DAC_1 VCCA_TVC_DAC_2

VCCD_CRT VCCD_TVDAC

VCCD_QDAC VCCD_HPLL VCCD_PEG_PLL VCCD_LVDS_1

VCCD_LVDS_2

+VTTLF1 +VTTLF2 +VTTLF3

CRTPLLA PEGA SMTV

POWER

A CK A LVDS

D TV/CRTLVDS

12

C516

0.47U/10V

12

C473

0.47U/10V

AXD

DMI

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14

VTT

VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22

VCC_AXD_1 VCC_AXD_2 VCC_AXD_3 VCC_AXD_4 VCC_AXD_5 VCC_AXD_6

VCC_AXD_NCTF

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

AXF

VCC_DMI

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

VCC_TX_LVDS

VCC_HV_1 VCC_HV_2

HV

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5

PEG

VCC_RXR_DMI_1 VCC_RXR_DMI_2

VTTLF1 VTTLF2 VTTLF3

VTTLF

CRESTLINE_1p0

12

C454

0.47U/10V

U13 U12 U11 U9 U8 U7 U5 U3 U2 U1 T13 T11 T10 T9 T7 T6 T5 T3 T2 R3 R2 R1

AT23 AU28 AU24 AT29 AT25 AT30

AR29

B23 B21 A21

AJ50

BK24 BK23 BJ24 BJ23

A43

C40 B40

AD51 W50 W51 V49 V50

AH50 AH51

A7 F2 AH1

2

C497

2.2U/6.3V

12

C493

4.7U/10V

12

Place on the edge.

12

C496

0.47U/6.3V

12

C499

4.7U/10V

Place on the edge.

+VCC_AXD_L +VCC_AXD_R

12

C533

C533 1U/10V

1U/10V

+VCC_AXF

+VCC_SM_CK

+3.3V_RUN

12

C463

0.1U/10V

+VCC_RXR_DMI

+VTTLF1 +VTTLF2 +VTTLF3

1 2

12

C251

C251 22U/10V

22U/10V

Place caps close to VCC_AXD.

+VCC_PEG

12

+

C216

C216 220U/4V

220U/4V

12

+

C233

C233 220U/4V

220U/4V

+VCC_SM_CK

12

C252

C252 22U/10V

22U/10V

+1.05V_VCCP

12

+

C235

C235 220U/4V

220U/4V

Non-iAMT

+1.25V_RUN

L39 0L39 0

Reserved L81 pad for inductor.

+1.25V_RUN

12

C518

0.1U/10V

L25

12

91nH/1.5A

91uH+-20%_1.5A

12

C514

C514 10U/6.3V

10U/6.3V

L27

L27 91nH/1.5A

91nH/1.5A

91uH+-20%_1.5A

12

C515

C515 10U/6.3V

10U/6.3V

12

C550

0.1U/10V

+1.05V_VCCP

12

L38

L38 1uH/300mA

1uH/300mA

12

1uH+-20%_300mA

R423

R423 1/F/0603

1/F/0603

+VCC_SM_CK_L

12

C552

C552 10U/6.3V

10U/6.3V

PJP17PJP17

12

1

VCC_HV

D30

D30 CH751H-40HPT_NC

CH751H-40HPT_NC

12

Place caps close to VCC_AXF

+1.05V_VCCP

+VCC_AXF

12

C452

C452 1U/10V

1U/10V

+1.05V_VCCP

21

+VCC_HV_L

12

+3.3V_RUN

+1.25V_RUN

12

+1.8V_SUS

R342

R342 10_NC

10_NC

C453

C453 10U/6.3V

10U/6.3V

A A

DELL CONFIDENTIAL/PROPRIETARY

Title

Crestline (POWER)

Size Document Number Rev

M-08 0.1

Date: Sheet

5

4

3

2

Date: Sheet

1

of

951Monday, March 05, 2007

5

U19I

A13

VSS_1

A15

VSS_2

A17

VSS_3

A24

VSS_4

AA21

VSS_5

AA24

VSS_6

AA29

VSS_7

D D

C C

B B

A A

5

AB20 AB23 AB26 AB28 AB31 AC10 AC13

AC3 AC39 AC43 AC47

AD1 AD21 AD26 AD29

AD3 AD41 AD45 AD49

AD5 AD50

AD8 AE10 AE14

AE6 AF20 AF23 AF24 AF31

AG2 AG38 AG43 AG47 AG50

AH3 AH40 AH41

AH7

AH9

AJ11 AJ13 AJ21 AJ24 AJ29 AJ32 AJ43 AJ45

AJ49 AK20 AK21 AK26 AK28 AK31 AK51

AM11 AM13

AM3

AM4 AM41 AM45

AN1 AN38 AN39 AN43

AN5

AN7

AP4 AP48 AP50 AR11

AR2 AR39 AR44 AR47

AR7 AT10 AT14 AT41 AT49

AU1 AU23 AU29

AU3 AU36 AU49 AU51 AV39 AV48

AW1 AW12 AW16

AL1

VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99

CRESTLINE_1p0

VSS

4

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198

AW24 AW29 AW32 AW5 AW7 AY10 AY24 AY37 AY42 AY43 AY45 AY47 AY50 B10 B20 B24 B29 B30 B35 B38 B43 B46 B5 B8 BA1 BA17 BA18 BA2 BA24 BB12 BB25 BB40 BB44 BB49 BB8 BC16 BC24 BC25 BC36 BC40 BC51 BD13 BD2 BD28 BD45 BD48 BD5 BE1 BE19 BE23 BE30 BE42 BE51 BE8 BF12 BF16 BF36 BG19 BG2 BG24 BG29 BG39 BG48 BG5 BG51 BH17 BH30 BH44 BH46 BH8 BJ11 BJ13 BJ38 BJ4 BJ42 BJ46 BK15 BK17 BK25 BK29 BK36 BK40 BK44 BK6 BK8 BL11 BL13 BL19 BL22 BL37 BL47 C12 C16 C19 C28 C29 C33 C36 C41

3

U19J

C46

VSS_199

C50

VSS_200

C7

VSS_201

D13

VSS_202

D24

VSS_203

D3

VSS_204

D32

VSS_205

D39

VSS_206

D45

VSS_207

D49

VSS_208

E10

VSS_209

E16

VSS_210

E24

VSS_211

E28

VSS_212

E32

VSS_213

E47

VSS_214

F19

VSS_215

F36

VSS_216

F4

VSS_217

F40

VSS_218

F50

VSS_219

G1

VSS_220

G13

VSS_221

G16

VSS_222

G19

VSS_223

G24

VSS_224

G28

VSS_225

G29

VSS_226

G33

VSS_227

G42

VSS_228

G45

VSS_229

G48

VSS_230

G8

VSS_231

H24

VSS_232

H28

VSS_233

H4

VSS_234

H45

VSS_235

J11

VSS_236

J16

VSS_237

J2

VSS_238

J24

VSS_239

J28

VSS_240

J33

VSS_241

J35

VSS_242

J39

VSS_243

K12

VSS_245

K47

VSS_246

K8

VSS_247

L1

VSS_248

L17

VSS_249

L20

VSS_250

L24

VSS_251

L28

VSS_252

L3

VSS_253

L33

VSS_254

L49

VSS_255

M28

VSS_256

M42

VSS_257

M46

VSS_258

M49

VSS_259

M5

VSS_260

M50

VSS_261

M9

VSS_262

N11

VSS_263

N14

VSS_264

N17

VSS_265

N29

VSS_266

N32

VSS_267

N36

VSS_268

N39

VSS_269

N44

VSS_270

N49

VSS_271

N7

VSS_272

P19

VSS_273

P2

VSS_274

P23

VSS_275

P3

VSS_276

P50

VSS_277

R49

VSS_278

T39

VSS_279

T43

VSS_280

T47

VSS_281

U41

VSS_282

U45

VSS_283

U50

VSS_284

V2

VSS_285

V3

VSS_286

CRESTLINE_1p0

3

VSS

VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305

VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313

2

W11 W39 W43 W47 W5 W7 Y13 Y2 Y41 Y45 Y49 Y5 Y50 Y11 P29 T29 T31 T33 R28

AA32 AB32 AD32 AF28 AF29 AT27 AV25 H50

DELL CONFIDENTIAL/PROPRIETARY

Title

Crestline (VSS)

Size Document Number Rev

M-08 0.1

Date: Sheet

2

Date: Sheet

1

of

10 51Monday, March 05, 2007

1

2

3

4

5

6

7

8

+RTC_CELL +RTC_CELL

12

R272

R272 332K/F

332K/F

ICH_INTVRMEN ICH_LAN100_SLP

12

R265

R265 0_NC

0_NC

ICH8M LAN100 SLP Strap

Low = Internal VR Disabled High = Internal VR Enabled(Default)

U8A

AG25

RTCX1

AF24

RTCX2

AF23

RTCRST#

AD22

INTRUDER#

AF25

INTVRMEN

AD21

LAN100_SLP

B24

GLAN_CLK

D22

LAN_RSTSYNC

C21

LAN_RXD0

B21

LAN_RXD1

C22

LAN_RXD2

D21

LAN_TXD0

E20

LAN_TXD1

C20

LAN_TXD2

AH21

GLAN_DOCK#/GPIO13

D25

GLAN_COMPI

C25

GLAN_COMPO

AJ16

HDA_BIT_CLK

AJ15

HDA_SYNC

AE14

HDA_RST#

AJ17

HDA_SDIN0

AH17

HDA_SDIN1

AH15

HDA_SDIN2

AD13

HDA_SDIN3

AE13

HDA_SDOUT

AE10

HDA_DOCK_EN#/GPIO33

AG14

HDA_DOCK_RST#/GPIO34

AF10

SATALED#

AF6

SATA0RXN

AF5

SATA0RXP

AH5

SATA0TXN

AH6

SATA0TXP

AG3

SATA1RXN

AG4

SATA1RXP

AJ4

SATA1TXN

AJ3

SATA1TXP

AF2

SATA2RXN

AF1

SATA2RXP

AE4

SATA2TXN

AE3

SATA2TXP

AB7

SATA_CLKN

AC6

SATA_CLKP

AG1

SATARBIAS#

AG2

SATARBIAS

ICH8M REV 1.0

R235

R235 1K_NC

1K_NC

1 2

R22

R22 1K_NC

1K_NC

ACZ_SDOUT

ICH_RSVD <13>

RTC

CPUPWRGD/GPIO49

LAN / GLAN

IHDA

SATA

5

(Internal VR for VccLAN1.05 and VccCL1.05)

ICH_LAN100_SLP

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LPC

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

IGNNE#

INIT#

INTR

CPU

RCIN#

NMI

SMI#

STPCLK#

THRMTRIP#

TP8 DD0

DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8

DD9 DD10 DD11 DD12 DD13 DD14 DD15

IDE

DA0

DA1

DA2

DCS1# DCS3#

DIOR#

DIOW#

DDACK#

IDEIRQ

IORDY

DDREQ

AJ0QN230T00

+3.3V_RUN

R244 100KR244 100K R495 100KR495 100K

E5 F5 G8 F6

C4 G9

E6 AF13

AG26 AF26

AE26 AD24 AG29 AF27 AE24

AC20 AH14

AD23 AG28

AA24 AE27 AA23 V1

U2 V3 T1 V4 T5 AB2 T6 T3 R2 T4 V6 V5 U1 V2 U6

AA4 AA1 AB3

Y6 Y5

W4 W3 Y2 Y3 Y1 W5

12

R283

R283 332K/F

332K/F

12

R282

R282 0_NC

0_NC

Low = Internal VR Disabled High = Internal VR Enabled(Default)

LPC_LDRQ0# LPC_LDRQ1#

SIO_A20GATE

H_DPRSTP# H_DPSLP#

H_FERR#

SIO_RCIN#

THERMTRIP#_ICH

IDE_DD0 IDE_DD1 IDE_DD2 IDE_DD3 IDE_DD4 IDE_DD5 IDE_DD6 IDE_DD7 IDE_DD8

IDE_DD9 IDE_DD10 IDE_DD11 IDE_DD12 IDE_DD13 IDE_DD14 IDE_DD15

IDE_DA0 IDE_DA1 IDE_DA2

IDE_DCS1# IDE_DCS3#

12 12

IDE_DD[0..15]

RTC_BAT_DET# SPEAKER_DET#

6

+1.05V_VCCP

LPC_LAD0 <28> LPC_LAD1 <28> LPC_LAD2 <28> LPC_LAD3 <28>

LPC_LFRAME# <28>

T68PAD T68PAD T63PAD T63PAD

SIO_A20GATE <28> H_A20M# <3>

H_DPRSTP# <3,6,45> H_DPSLP# <3>

H_FERR# <3> H_PWRGOOD <3> H_IGNNE# <3>

H_INIT# <3> H_INTR <3>

SIO_RCIN# <28>

H_NMI <3> H_SMI# <3>

H_STPCLK# <3>

T61PAD T61PAD

IDE_DD[0..15] <23>

IDE_DA0 <23> IDE_DA1 <23> IDE_DA2 <23>

IDE_DCS1# <23> IDE_DCS3# <23>

IDE_DIOR# <23> IDE_DIOW# <23> IDE_DDACK# <23> IDE_IRQ <23> IDE_DIORDY <23> IDE_DDREQ <23>

DELL CONFIDENTIAL/PROPRIETARY

Title

ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)

Size Document Number Rev

M-08 0.1

Date: Sheet

7

H_DPRSTP# H_DPSLP# H_FERR#

SIO_A20GATE SIO_RCIN#

THERMTRIP#_ICH

1 2

R257

R257 56_NC

56_NC

R264

R264 56_NC

56_NC

1 2

R256

R256 10K

10K

1 2

+1.05V_VCCP

11 51Tuesday, March 06, 2007

8

1 2

+3.3V_RUN

1 2

of

R27656R276 56

R248

R248 10K

10K

R26856R268 56

LED_MASK#<29,37>

1

R259 10MR259 10M

W1

1 4 2 3

32.768KHZ

+RTC_CELL

12

R2691MR269 1M

12

R251 0R251 0

1 2

C361 3900P/25VC361 3900P/25V C360 3900P/25VC360 3900P/25V

C362 3900P/25VC362 3900P/25V C363 3900P/25VC363 3900P/25V

3 1

2N7002W-7-F

R278 0_NCR278 0_NC

1 2

R238

R238 20K

20K

1 2

ICH_RTCRST# ICH_INTRUDER#

12

C359

C359 1U/10V

1U/10V

C46

C46 27P/50V_NC

27P/50V_NC

1 2

12 12

+3.3V_RUN

2

Q29

ICH_RTCX2ICH_RTCX1

12

R23 33R23 33

1 2

R24 10R24 10

1 2

C47

C47 27P/50V_NC

27P/50V_NC

1 2

R228 33R228 33

1 2

R229 33R229 33

1 2

R230 33R230 33

1 2

R231 33R231 33

1 2

R236 33R236 33

1 2

R237 33R237 33

1 2

SATA_TX0-_C SATA_TX0+_C

SATA_TX2-_C SATA_TX2+_C

R263

R263 10K

10K

SATA_ACT#_R

2

C369

C369 15P/50V

15P/50V

23

ACZ_BIT_CLK

ACZ_SYNC

ACZ_RST#

ACZ_SDOUT

9/20 Move from SATA port 1

Place within 500mils of ICH8 ball

XOR Chain Entrance Strap

ICH RSVD

HDA SDOUT

0 0 1 1

+1.5V_PCIE_ICH

ICH_AZ_CODEC_SDIN0<32> ICH_AZ_MDC_SDIN1<26>

SPEAKER_DET#<32> RTC_BAT_DET#<30>

SATA_RX0-<23> SATA_RX0+<23>

SATA_RX2-<23> SATA_RX2+<23>

CLK_PCIE_SATA#<17> CLK_PCIE_SATA<17>

Description

RSVD

0 1

Enter XOR Chain

0

Normal Operation (Default)

1

Set PCIE port config bit 1

3

Reserved for Intel Nineveh design.

T76 PADT76 PAD

T73 PADT73 PAD T75 PADT75 PAD T16 PADT16 PAD T70 PADT70 PAD T72 PADT72 PAD T74 PADT74 PAD

T5 PADT5 PAD

R306 24.9/FR306 24.9/F

1 2

T8 PADT8 PAD T48 PADT48 PAD

R250 24.9/FR250 24.9/F

ICH8M Internal VR Enable Strap (Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)

ICH_INTVRMEN

ICH_RTCX1 ICH_RTCX2

ICH_RTCRST# ICH_INTRUDER# ICH_INTVRMEN

ICH_LAN100_SLP GLAN_CLK LAN_RSTSYNC LAN_RXD0

LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2

GLAN_COMP ACZ_BIT_CLK

ACZ_SYNC ACZ_RST#

ACZ_SDOUT SPEAKER_DET#

RTC_BAT_DET# SATA_ACT#_R

SATA_TX0-_C SATA_TX0+_C

SATA_TX2-_C SATA_TX2+_C

SATABIAS

12

+3.3V_RUN

4

32.768KHZ

12

C378

A A

B B

C C

D D

C378 15P/50V

15P/50V

ICH_AZ_MDC_BITCLK<26> ICH_AZ_CODEC_BITCLK<32>

ICH_AZ_MDC_SYNC<26> ICH_AZ_CODEC_SYNC<32> ICH_AZ_MDC_RST#<26> ICH_AZ_CODEC_RST#<32> ICH_AZ_MDC_SDOUT<26> ICH_AZ_CODEC_SDOUT<32>

Place all series terms close to ICH8 except for SDIN input lines,which should be close to source.Placement of R23, R228, R230 & R236 should equal distance to the T split trace point as R24, R229, R231 & R237 respective. Basically,keep the same distance from T for all series termination resistors.

SATA_TX0-<23>

SATA_TX0+<23>

SATA_TX2-<23>

SATA_TX2+<23>

Distance between the ICH-8 M and cap on the "P" signal should be identical distance between the ICH-6 M and cap on the "N" signal for same pair.

This circuit is only needed if the platform has the SNIFFER.

SATA_ACT#<37>

1

Place TX DC blocking caps close ICH8.

OC7# OC9# OC5# OC6#

4

C90 0.1U/10VC90 0.1U/10V C97 0.1U/10VC97 0.1U/10V

C101 0.1U/10VC101 0.1U/10V C106 0.1U/10VC106 0.1U/10V

C114 0.1U/10VC114 0.1U/10V C116 0.1U/10VC116 0.1U/10V

C127 0.1U/10VC127 0.1U/10V C120 0.1U/10VC120 0.1U/10V

RP27

6 7 8 9

10

10P8R-10K

U11

7SH08_NC

PCIE_TX1-<25> PCIE_TX1+<25>

PCIE_TX2-<24> PCIE_TX2+<24>

PCIE_TX3-<24>

A A

PCIE_TX3+<24>

PCIE_TX4-<26> PCIE_TX4+<26>

Non-iAMT

+3.3V_SUS

Layout Note: Place R313,R311 and R327 within 500 mils from ICH.

B B

SPI_CS0#<30>

R328 15_NCR328 15_NC

1 2

R93 0R93 0

1 2

WWAN Noise - ICH improvements 18

OC4# OC5# OC6# OC7# OC9# USB_OC8# USB_OC0_1# USB_OC2_3#

C C

D D

C876 0.1U/10VC876 0.1U/10V

1 2

C871 0.1U/10VC871 0.1U/10V

1 2

C872 0.1U/10VC872 0.1U/10V

1 2

C873 0.1U/10VC873 0.1U/10V

1 2

C878 0.1U/10VC878 0.1U/10V

1 2

C874 0.1U/10VC874 0.1U/10V

1 2

C875 0.1U/10VC875 0.1U/10V

1 2

C877 0.1U/10VC877 0.1U/10V

1 2

PCI_AD[0..31]<20,35>

PCI_PIRQB#<35> PCI_PIRQC#<20> PCI_PIRQD#<20>

PCI_PIRQB: for LOM PCI_PIRQC: for Media Card PCI_PIRQD: for 1394

1

PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31

1 2 1 2

+3.3V_ALW

5

2 1

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

2

+3.3V_SUS

5

USB_OC0_1#

4

USB_OC2_3#

3

OC4#

2

USB_OC8#

1

ICH_EC_SPI_CLK<28>

ICH_EC_SPI_DO<28>

ICH_EC_SPI_DIN<28>

R32715R327 15

1 2

SIO_SPI_CS# <28>

U8B

D20

AD0

E19

AD1

D19

AD2

A20

AD3

D17

AD4

A21

AD5

A19

AD6

C19

AD7

A18

AD8

B16

AD9

A12

AD10

E16

AD11

A14

AD12

G16

AD13

A15

AD14

B6

AD15

C11

AD16

A9

AD17

D11

AD18

B12

AD19

C12

AD20

D10

AD21

C7

AD22

F13

AD23

E11

AD24

E13

AD25

E12

AD26

D8

AD27

A6

AD28

E8

AD29

D6

AD30

A3

AD31

Interrupt I/F

F9

PIRQA#

B5

PIRQB#

C5

PIRQC#

A10

PIRQD#

ICH8M REV 1.0

2

PCIE_TXN1_C PCIE_TXP1_C

PCIE_TXN2_C PCIE_TXP2_C

PCIE_TXN3_C PCIE_TXP3_C

PCIE_TXN4_C PCIE_TXP4_C

ICH_SPI_CS#

ICH_SPI_CS1#_R PCI_GNT0#

PCI

R313 15R313 15

R311 15R311 15

USB_OC0_1#<27> USB_OC2_3#<27>

R3041KR304 1K

1 2

REQ0#

GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

3

PCIE_RX1-<25> PCIE_RX1+<25>

WWAN

PCIE_RX2-<24> PCIE_RX2+<24>

WLAN

PCIE_RX3-<24> PCIE_RX3+<24>

WPAN

PCIE_RX4-<26> PCIE_RX4+<26>

Express Card

1 2

USB_OC8#<27>

R292

R292 1K_NC

1K_NC

1 2

A4 D7 E18 C18 B19 F18 A11 C10

C17 E15 F16 E17

C8 D9 G6 D16 A7 B7 F10 C16 C9 A17

AG24 B10 G7

F8 G11 F12 B3

3

PCIE_TXN1_C PCIE_TXP1_C

PCIE_TXN2_C PCIE_TXP2_C

PCIE_TXN3_C PCIE_TXP3_C

PCIE_TXN4_C PCIE_TXP4_C

ICH_EC_SPI_CLK_R ICH_SPI_CS# ICH_SPI_CS1#_R

ICH_EC_SPI_DO_R

USB_OC0_1# USB_OC2_3#

OC4# OC5# OC6# OC7#

USB_OC8#

OC9#

Boot BIOS Strap

11LPC PCI SPI1001

PCI_REQ0# PCI_GNT0# PCI_REQ1# PCI_GNT1# SB_WWAN_PCIE_RST#

SB_LOM_PCIE_RST#

PCI_IRDY# PCI_RST#_G

PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME#

PCI_PLTRST# CLK_PCI_ICH

SB_MCARD3_PCIE_RST# SB_WLAN_PCIE_RST# SB_NB_PCIE_RST# PCIE_MCARD2_DET#

4

U8D

P27

PERN1

P26

PERP1

N29

PETN1

N28

PETP1

M27

PERN2

M26

PERP2

L29

PETN2

L28

PETP2

K27

PERN3

K26

PERP3

J29

PETN3

J28

PETP3

H27

PERN4

H26

PERP4

G29

PETN4

G28

PETP4

F27

PERN5

F26

PERP5

E29

PETN5

E28

PETP5

D27

PERN6/GLAN_RXN

D26

PERP6/GLAN_RXP

C29

PETN6/GLAN_TXN

C28

PETP6/GLAN_TXP

C23

SPI_CLK

B23

SPI_CS0#

E22

SPI_CS1#

D23

SPI_MOSI

F21

SPI_MISO

AJ19

OC0#

AG16

OC1#/GPIO40

AG15

OC2#/GPIO41

AE15

OC3#/GPIO42

AF15

OC4#/GPIO43

AG17

OC5#/GPIO29

AD12

OC6#/GPIO30

AJ18

OC7#/GPIO31

AD14

OC8#

AH18

OC9#

ICH8M REV 1.0

GNT0# SPI_CS1#

No stuff

Stuff

No stuff

PCI_REQ0# <35> PCI_GNT0# <35> PCI_REQ1# <20> PCI_GNT1# <20> SB_WWAN_PCIE_RST# <25>

SB_LOM_PCIE_RST#

PCI_C_BE0# <20,35> PCI_C_BE1# <20,35> PCI_C_BE2# <20,35> PCI_C_BE3# <20,35>

PCI_IRDY# <20,35> PCI_PAR <20,35>

PCI_DEVSEL# <20,35> PCI_PERR# <20,35> PCI_PLOCK# PCI_SERR# <20,35> PCI_STOP# <20,35> PCI_TRDY# <20,35> PCI_FRAME# <20,35>

CLK_PCI_ICH <17> ICH_PME# <29>

SB_MCARD3_PCIE_RST# <24> SB_WLAN_PCIE_RST# <24> SB_NB_PCIE_RST# <6> PCIE_MCARD2_DET# <25>

35

4

5

V27

DMI0RXN

V26

DMI0RXP

U29

DMI0TXN

U28

DMI0TXP

Y27

DMI1RXN

Y26

DMI1RXP

W29

DMI1TXN

W28

DMI1TXP

AB26

DMI2RXN

AB25

DMI2RXP

AA29

DMI2TXN

AA28

DMI2TXP

AD27

DMI3RXN

AD26

DMI3RXP

AC29

DMI3TXN

AC28

DMI3TXP

T26

DMI_CLKN

PCI-Express

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

SPI

USB

USBRBIAS#

1394/MediaCard

T25

DMI_CLKP

Y23

DMI_COMP

Y24 G3

USBP0N

G2

USBP0P

H5

USBP1N

H4

USBP1P

H2

USBP2N

H1

USBP2P

J3

USBP3N

J2

USBP3P

K5

USBP4N

K4

USBP4P

K2

USBP5N

K1

USBP5P

L3

USBP6N

L2

USBP6P

M5

USBP7N

M4

USBP7P

M2

USBP8N

M1

USBP8P

N3

USBP9N

N2

USBP9P

F2

USBRBIAS

F3

USBRBIAS

Short F2 and F3 at the package and keep length to less than 500mils. Trace Impedance should be 60ohms +/- 15%.

REQ0

REQ1

GNT0

GNT1

1 2

LOM

SB_NB_PCIE_RST#

A16 away override strap.

SB_NB_PCIE_RST#

SB_MCARD3_PCIE_RST# SB_WWAN_PCIE_RST# SB_WLAN_PCIE_RST# SB_LOM_PCIE_RST# SB_NB_PCIE_RST#

BIOS should not enable the internal GPIO pull up resistor.

Low = A16 swap override enabled. High = Default.

R291 20K_NCR291 20K_NC R314 20KR314 20K R300 20K_NCR300 20K_NC R324 20KR324 20K R302 20K_NCR302 20K_NC

12 12 12 12 12

5

DMI_MTX_IRX_N0 <6> DMI_MTX_IRX_P0 <6>

DMI_MRX_ITX_N0 <6> DMI_MRX_ITX_P0 <6>

DMI_MTX_IRX_N1 <6> DMI_MTX_IRX_P1 <6>

DMI_MRX_ITX_N1 <6> DMI_MRX_ITX_P1 <6>

DMI_MTX_IRX_N2 <6> DMI_MTX_IRX_P2 <6>

DMI_MRX_ITX_N2 <6> DMI_MRX_ITX_P2 <6>

DMI_MTX_IRX_N3 <6> DMI_MTX_IRX_P3 <6>

DMI_MRX_ITX_N3 <6> DMI_MRX_ITX_P3 <6>

CLK_PCIE_ICH# <17> CLK_PCIE_ICH <17>

R281 24.9/FR281 24.9/F

12

ICH_USBP0- <27> ICH_USBP0+ <27> ICH_USBP1- <27> ICH_USBP1+ <27> ICH_USBP2- <27> ICH_USBP2+ <27> ICH_USBP3- <27> ICH_USBP3+ <27> ICH_USBP4- <24> ICH_USBP4+ <24> ICH_USBP5- <33> ICH_USBP5+ <33> ICH_USBP6- <26> ICH_USBP6+ <26> ICH_USBP7- <37> ICH_USBP7+ <37> ICH_USBP8- <27> ICH_USBP8+ <27> ICH_USBP9- <25> ICH_USBP9+ <25>

PIRQB PIRQC

PIRQD

R307

R307 1K_NC

1K_NC

6

+1.5V_PCIE_ICH

Place within 500mils of ICH8

USB[1B] USB[1A] USB[2B] USB[2A] 3rd MINI CARD CAMERA Express Card BT USB[3A] WWAN USB

R301

22.6/F

1 2

CLK_PCI_ICH

R31010R310

10

1 2

C417

9P/50V

1 2

Reserved for EMI. Place resister and cap close to ICH.

6

7

PCI Pullups

+3.3V_RUN

PCI_SERR# SB_WLAN_PCIE_RST# PCI_TRDY#

+3.3V_RUN

SB_MCARD3_PCIE_RST#

PCI_PERR# PCI_IRDY# PCI_PIRQA# PCI_PLOCK# PCI_REQ0# PCI_PIRQB#

Non-iAMT

PCI_RST#_G

PCI_PLTRST#

Title

Size Document Number Rev

Date: Sheet

+3.3V_SUS

C84

1 2

0.047U/10V

2 1

+3.3V_SUS

C357

1 2

0.047U/10V

2 1

+3.3V_SUS

C355

1 2

0.047U/10V

2 1

DELL CONFIDENTIAL/PROPRIETARY

ICH8-M (USB,DMI,PCIE,PCI)

M-08 0.1

7

RP35

6 7 8 9

10

10P8R-8.2K

10P8R-8.2K RP34

RP34

6 7 8 9

10

10P8R-8.2K

10P8R-8.2K RP31

RP31

6 7 8 9

10

10P8R-8.2K

Add Buffers as needed for Loading and fanout concerns.

5

U10

7SH32

5

U28

7SH32

5

U27

7SH32

4

5 4 3 2 1

PCI_RST# <20,35>

PLTRST# <6,28>

PLTRST1# <24,25,26>

8

+3.3V_RUN

PCI_STOP# PCI_FRAME# PCI_REQ1#

+3.3V_RUN

PCI_PIRQD# SB_NB_PCIE_RST#

PCI_DEVSEL#

+3.3V_RUN

PCI_PIRQC#

35

of

12 51Tuesday, March 06, 2007

8

1

2

3

4

5

6

7

8

GG request

ICH_SMBDATA AMT_SMBDAT ICH_SMBCLK

A A

B B

R518 0_NCR518 0_NC R519 0_NCR519 0_NC

+3.3V_SUS

1 3

+3.3V_RUN

1 2 12

Option to " Disable " clkrun. Pulling it down will keep the clks running.

RP28

4P2R-2.2K

R234

8.2K

CLKRUN#

R233

R233 10_NC

10_NC

12 12

Non-iAMT

ICH_SMBDATA

2

ICH_SMBCLK

4

AMT_SMBCLK

36

USB_MCARD1_DET#<24>

USB_MCARD1_DET#

15

C C

R258 100K_NCR258 100K_NC

CCD_VDD_ON

12

MCH_ICH_SYNC#<6>

26

53

+3.3V_SUS

R243 10KR243 10K R510 10KR510 10K

+3.3V_RUN

R84 2.2K_NCR84 2.2K_NC

+3.3V_RUN

D D

R277 10KR277 10K R245 10K_NCR245 10K_NC R266 10KR266 10K R274 10KR274 10K R540 100KR540 100K

1 2

12 12

12

12 12 12 12

SIO_EXT_SMI# LOM_SMB_ALERT#

IMVP_PWRGD

RSV_THRM# MCH_ICH_SYNC#_R IRQ_SERIRQ RSVD_GPIO6 WPAN_RADIO_DIS_MINI#

9/20 Delete R258

1

+3.3V_SUS

R247 10K_NCR247 10K_NC R273 10KR273 10K R271 10KR271 10K R255 10KR255 10K R252 10KR252 10K R261 1KR261 1K

ICH_SMBCLK<24,25,26> ICH_SMBDATA<24,25,26> ICH_CL_RST1#

T60 PADT60 PAD T53 PADT53 PAD

T69 PADT69 PAD

ITP_DBRESET#<3,29> PM_BMBUSY#<6>

15

LOM_SMB_ALERT#<28>

H_STP_PCI#<17> H_STP_CPU#<17>

CLKRUN#<20,28,35> ICH_PCIE_WAKE#<29>

IRQ_SERIRQ<20,28>

IMVP_PWRGD<28,38,45>

SIO_EXT_WAKE#<29> SIO_EXT_SMI#<28>

14

SIO_EXT_SCI#<28>

PCIE_MCARD1_DET#<24>

35

USB_MCARD2_DET#<25> USB_MCARD3_DET#<24>

IDE_RST_MOD#<23>

30

SATA_CLKREQ#<17>

WPAN_RADIO_DIS_MINI#<24>

26

PLTRST_DELAY#<18> CCD_VDD_ON<33>

SPKR<32>

R241 0R241 0

ICH_RSVD<11>

T56 PADT56 PAD

T12 PADT12 PAD

T10 PADT10 PAD

T81 PADT81 PAD

+3.3V_RUN

15

SPKR

30

2

9

12 12 12 12 12 12

R547 4.7KR547 4.7K

1 2

CCD_VDD_ON

12

R267

R267 1K_NC

1K_NC

1 2

SPKR

No Reboot strap.

Low = Default. High = No Reboot.

+3.3V_RUN

R25

8.2K

1 2

USB_IDE#

3

Non-iAMT

ICH_CL_RST1# AMT_SMBCLK AMT_SMBDAT ICH_RI# SIO_EXT_SCI# ICH_PCIE_WAKE#

ICH_SMBCLK ICH_SMBDATA ICH_CL_RST1# AMT_SMBCLK AMT_SMBDAT

ICH_RI# RSVD_LPCPD#

LOM_SMB_ALERT#

CLKRUN# ICH_PCIE_WAKE#

IRQ_SERIRQ RSV_THRM#

IMVP_PWRGD

USB_IDE# RSVD_GPIO6 SIO_EXT_WAKE# SIO_EXT_SMI#

PCIE_MCARD1_DET#

USB_MCARD2_DET# USB_MCARD3_DET#

PLTRST_DELAY#

SPKR MCH_ICH_SYNC#_R

10/1 TDC request

U8C

AJ26

SMBCLK

AD19

SMBDATA

AG21

LINKALERT#

AC17

SMLINK0

AE19

SMLINK1

AF17

RI#

F4

SUS_STAT#/LPCPD#

AD15

SYS_RESET#

AG12

BMBUSY#/GPIO0

AG22

SMBALERT#/GPIO11

AE20

STP_PCI#/GPIO15

AG18

STP_CPU#/GPIO25

AH11

CLKRUN#/GPIO32

AE17

WAKE#

AF12

SERIRQ

AC13

THRM#

AJ20

VRMPWRGD

AJ22

TP7

AJ8

TACH1/GPIO1

AJ9

TACH2/GPIO6

AH9

TACH3/GPIO7

AE16

GPIO8

AC19

GPIO12

AG8

TACH0/GPIO17

AH12

GPIO18

AE11

GPIO20

AG10

SCLOCK/GPIO22

AH25

QRT_STATE0/GPIO27

AD16

QRT_STATE1/GPIO28

AG13

SATACLKREQ#/GPIO35

AF9

SLOAD/GPIO38

AJ11

SDATAOUT0/GPIO39

AD10

SDATAOUT1/GPIO48

AD9

SPKR

AJ13

MCH_SYNC#

AJ21

TP3

ICH8M REV 1.0

SMbus address D2

These are for backdrive issue.

ICH_SMBDATA<24,25,26> MEM_SDATA <15>

4

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA2GP/GPIO36 SATA3GP/GPIO37

SATA

GPIO

SATA

GPIO

SMB

Clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

SYS

GPIO

SYS

GPIO

PWRBTN# LAN_RST#

Power MGTController Link

CK_PWRGD

CLPWROK

CL_DATA0

GPIO

MISC

CL_DATA1 CL_VREF0

CL_VREF1

MEM_LED/GPIO24 ME_EC_ALERT/GPIO10 EC_ME_ALERT/GPIO14

WOL_EN/GPIO9

+3.3V_RUN

2

Q8

3 1

2N7002W-7-F

+3.3V_RUN

2

Q6

3 1

2N7002W-7-F

CLK14

CLK48 SUSCLK SLP_S3#

SLP_S4# SLP_S5#

PWROK

BATLOW#

RSMRST#

SLP_M#

CL_CLK0 CL_CLK1

CL_RST#

2

1

4

RP16

RP16 4P2R-2.2K

4P2R-2.2K

3

5

AJ12 AJ10 AF11 AG11

CLK_ICH_14M

AG9

CLK_ICH_48M

G5

ICH_SUSCLK

D3 AG23

AF21 AD18

SIO_S4_STATE#

AH27

ICH_PWRGD

AE23

DPRSLPVR

AJ14

ICH_BATLOW#

AE21 C2

ICH_LAN_RST#

AH20

ICH_RSMRST#ICH_RSMRST#

AG27 E1

ICH_CL_PWROK

E3

RSV_SIO_SLP_M#

AJ25 F23

RSV_ICH_CL_CLK1

AE18 F22

RSV_ICH_CL_DATA1

AF19 D24

AH23 AJ23

PCIE_MCARD3_DET#

AJ27

ME_EC_ALERT

AJ24 AF22

WOL_EN

AG19

Non-iAMT

+3.3V_RUN

1 2

CL_VREF0 CL_VREF1

MEM_SCLK <15>ICH_SMBCLK<24,25,26>

R262

8.2K

CLK_ICH_14M <17> CLK_ICH_48M <17>

T71PAD T71PAD

SIO_SLP_S3# <28>

T52PAD T52PAD

SIO_SLP_S5# <28>

T49PAD T49PAD

ICH_PWRGD <6,38> DPRSLPVR <6,45>

R270 8.2KR270 8.2K

12

SIO_PWRBTN# <28> ICH_LAN_RST# ICH_RSMRST# <28> CLK_PWRGD <17> ICH_CL_PWROK <6,28>

CL_CLK0 <6>

CL_DATA0 <6>

ICH_CL_RST0# <6> PCIE_MCARD3_DET# <24>

R227 8.2KR227 8.2K

12

+3.3V_SUS

T9PAD T9PAD

T58PAD T58PAD

T4PAD T4PAD

T50PAD T50PAD

T11PAD T11PAD T6PAD T6PAD

10/1 TDC request

T55PAD T55PAD

9

+3.3V_SUS

6

Non-iAMT

DELL CONFIDENTIAL/PROPRIETARY

Title

ICH8-M (PM,GPIO,SMB,CL)

Size Document Number Rev

M-08 0.1

Date: Sheet

Place these close to ICH7.

CLK_ICH_48M

CLK_ICH_14M

ICH_PWRGD DPRSLPVR WOL_EN ICH_RSMRST# ICH_LAN_RST# ICH_CL_PWROK

PLTRST_DELAY#SIO_EXT_SCI#

R260 10KR260 10K R232 100KR232 100K R249 100KR249 100K R21 10KR21 10K R246 1MR246 1M R305 1MR305 1M

R511 10KR511 10K

9/26 Add PD 10K

Non-iAMT

7

+3.3V_RUN +3.3V_ALW

R296

3.24K/F

1 2

CL_VREF0 CL_VREF1

C416

0.1U/10V

12

R299

R299 453/F

453/F

12

1 2 1 2

12

C365

0.1U/10V_NC

12

R297

R297 10_NC

10_NC

12

C412

4.7P/50V_NC

12

R254

R254 10_NC

10_NC

12

C377

4.7P/50V_NC

12

12 12 12

12

13 51Tuesday, March 06, 2007

8

R240

3.24K/F_NC

1 2

12

R239

R239 453/F_NC

453/F_NC

of

1

+RTC_CELL

R91 100_0402R91 100_0402

+5V_RUN

+3.3V_RUN

A A

Non-iAMT

+5V_SUS

+3.3V_SUS

B B

C C

Non-iAMT

Place C929 close to A24.

+1.5V_RUN

1 2

2 1

SDMK0340L-7-F

R56 10R56 10

1 2

2 1

SDMK0340L-7-F

+1.5V_RUN

12

L31

L31 BLM21PG331SN1D

BLM21PG331SN1D

12

+

C63

C63 220U/4V

220U/4V

+1.5V_RUN

12

R290R29 0

+VCCSATPLL_L

12

L11

L11 10uH/100MA

10uH/100MA

10uH+-20%_100mA

+VCCSATPLL

12

C368

C368 1U/10V

1U/10V

D9

D7

12

C374

C374 1U/10V

1U/10V

+ICH_V5REF_RUN

C144

0.1U/10V

1 2

+ICH_V5REF_SUS

C104

0.1U/10V

1 2

FB_330ohm+-25%_100mHz_

1.5A_0.09 ohm DC

12

C404

C404 22U/10V

22U/10V

C57

C57 10U/6.3V

10U/6.3V

12

C382

C382 22U/10V

22U/10V

+1.5V_RUN

Non-iAMT

+VCCGLANPLL

D D

C119

0.1U/10V

1 2

1

+3.3V_RUN

+1.5V_PCIE_ICH

C384

0.1U/10V

1 2

+1.5V_PCIE_ICH

1 2

+1.5V_RUN

C414

0.1U/10V

1 2

T67 PADT67 PAD T66 PADT66 PAD

C413

0.1U/10V

2

C406

2.2U/10V

1 2

12

C146

4.7U/6.3V

2

C380

0.1U/10V

1 2

+VCCSATPLL

12

C386

C386 1U/10V

1U/10V

12

C389

C389 1U/10V

1U/10V

C398

0.1U/10V

1 2

TP_VCCSUSLAN1 TP_VCCSUSLAN2

+VCCGLANPLL

+3.3V_RUN

AD25

AA25 AA26 AA27 AB27 AB28 AB29

G24 H23 H24

K24 K25

M24 M25 N23 N24 N25 P24 P25 R24 R25 R26 R27

U24 U25 V23 V24 V25

W25

Y25

AE7 AF7 AG7 AH7

AC1 AC2 AC3 AC4 AC5

AC10

AC9 AA5

AA6 G12

G17

AC7 AD7

W23

G18

G20 A24 A26

A27 B26 B27 B28

B25

A16

D28 D29 E25 E26 E27 F24 F25

J23 J24

L23 L24 L25

T23 T24 T27 T28 T29

AJ6

AJ7

F17

F19

T7

G4

H7

D1

F1 L6

L7 M6 M7

U8F

VCCRTC V5REF[1]

V5REF[2] V5REF_SUS VCC1_5_B[01]

VCC1_5_B[02] VCC1_5_B[03] VCC1_5_B[04] VCC1_5_B[05] VCC1_5_B[06] VCC1_5_B[07] VCC1_5_B[08] VCC1_5_B[09] VCC1_5_B[10] VCC1_5_B[11] VCC1_5_B[12] VCC1_5_B[13] VCC1_5_B[14] VCC1_5_B[15] VCC1_5_B[16] VCC1_5_B[17] VCC1_5_B[18] VCC1_5_B[19] VCC1_5_B[20] VCC1_5_B[21] VCC1_5_B[22] VCC1_5_B[23] VCC1_5_B[24] VCC1_5_B[25] VCC1_5_B[26] VCC1_5_B[27] VCC1_5_B[28] VCC1_5_B[29] VCC1_5_B[30] VCC1_5_B[31] VCC1_5_B[32] VCC1_5_B[33] VCC1_5_B[34] VCC1_5_B[35] VCC1_5_B[36] VCC1_5_B[37] VCC1_5_B[38] VCC1_5_B[39] VCC1_5_B[40] VCC1_5_B[41] VCC1_5_B[42] VCC1_5_B[43] VCC1_5_B[44] VCC1_5_B[45] VCC1_5_B[46]

VCCSATAPLL VCC1_5_A[01]

VCC1_5_A[02] VCC1_5_A[03] VCC1_5_A[04] VCC1_5_A[05]

VCC1_5_A[06] VCC1_5_A[07] VCC1_5_A[08] VCC1_5_A[09] VCC1_5_A[10]

VCC1_5_A[11] VCC1_5_A[12]

VCC1_5_A[13] VCC1_5_A[14]

VCC1_5_A[15] VCC1_5_A[16] VCC1_5_A[17]

VCC1_5_A[18] VCC1_5_A[19]

VCCUSBPLL VCC1_5_A[20]

VCC1_5_A[21] VCC1_5_A[22] VCC1_5_A[23] VCC1_5_A[24]

VCC1_5_A[25] VCCLAN1_05[1]

VCCLAN1_05[2] VCCLAN3_3[1]

VCCLAN3_3[2] VCCGLANPLL VCCGLAN1_5[1]

VCCGLAN1_5[2] VCCGLAN1_5[3] VCCGLAN1_5[4] VCCGLAN1_5[5]

VCCGLAN3_3

ICH8M REV 1.0

3

VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16]

CORE

VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26] VCC1_05[27] VCC1_05[28]

VCCA3GP ATXARX

VCCDMIPLL VCC_DMI[1]

VCC_DMI[2]

V_CPU_IO[1] V_CPU_IO[2]

VCC3_3[01] VCC3_3[02] VCC3_3[03]

VCC3_3[04] VCC3_3[05] VCC3_3[06]

VCCP_COREVCCPSUSVCCPUSB

VCC3_3[07] VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11]

IDE

VCC3_3[12] VCC3_3[13]

VCC3_3[14] VCC3_3[15] VCC3_3[16] VCC3_3[17] VCC3_3[18] VCC3_3[19] VCC3_3[20]

PCI

VCC3_3[21] VCC3_3[22] VCC3_3[23] VCC3_3[24]

VCCHDA

VCCSUSHDA

VCCSUS1_05[1] VCCSUS1_05[2]

VCCSUS1_5[1]

VCCSUS1_5[2] VCCSUS3_3[01] VCCSUS3_3[02]

VCCSUS3_3[03] VCCSUS3_3[04] VCCSUS3_3[05]

USB CORE

VCCSUS3_3[06] VCCSUS3_3[07]

VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19]

GLAN POWER

VCCCL1_05

VCCCL1_5

VCCCL3_3[1] VCCCL3_3[2]

3

A13 B13 C13 C14 D14 E14 F14 G14 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

R29 AE28

AE29 AC23

AC24 AF29 AD2 AC8

AD8 AE8 AF8

AA3 U7 V7 W1 W6 W7 Y7

A8 B15 B18 B4 B9 C15 D13 D5 E10 E7 F11

AC12 AD11 J6

AF20 AC16 J7 C3 AC18

AC21 AC22 AG20 AH28

P6 P7 C1 N7 P1 P2 P3 P4 P5 R1 R3 R5 R6

G22 A22 F20

G21

4

C407

0.1U/10V

1 2

+1.5V_DMIPLL

0.01U/25V

+VCC_DMI

+V_CPU_IO

C415

0.1U/10V

1 2

TP_VCCSUS1.05_1 TP_VCCSUS1.05_2

TP_VCCSUS1.5_1 TP_VCCSUS1.5_2 +VCCSUS3_3[0~6]

+VCCSUS3_3[7~19]

12

C866

0.1U/10V

TP_VCCCL1.05 +VCCCL1_5

+3.3V_RUN

Non-iAMT

4

C402

0.1U/10V

1 2

C95

1 2

C375

0.1U/10V

1 2

C390

0.1U/10V

1 2

C411

0.1U/10V

1 2

C418

0.1U/10V

1 2

Non-iAMT

12

C748

0.1U/10V

5

+1.05V_VCCP

+1.05V_VCCP +1.5V_RUN

D25

1

2

BAT54C

1uH+-20%_800mA

L18

L18 1uH_800MA

C91

10U/6.3V

T62PAD T62PAD T7PAD T7PAD

T59PAD T59PAD T64PAD T64PAD

12

C59

C59 22U/10V

22U/10V

C381

0.1U/10V

1 2

C397

0.1U/10V

1 2

1uH_800MA

1 2

+1.25V_RUN

+3.3V_RUN

C376

0.1U/10V

+1.5V_DMIPLL_R

12

+3.3V_RUN+3.3V_SUS

C401

0.1U/10V

1 2

Non-iAMT

12

C128

0.022U/16V

18WWAN Noise - ICH improvements

12

T65PAD T65PAD

C864

0.1U/10V

C865

0.1U/10V

C419

0.1U/10V_NC

1 2

5

12

C422

C422 1U/10V_NC

1U/10V_NC

6

R288

3

1 2

10/0805

+1.5V_RUN

R52

12

0_0603

+1.05V_VCCP

+V_CPU_IO

12

C409

0.1U/10V

WWAN Noise - ICH improvements

12

C867

0.1U/10V

12

C387

0.022U/16V

12

C405

0.1U/10V

12

C868

0.1U/10V

+3.3V_SUS

12

C392

0.1U/10V

6

12

C869

0.1U/10V

+3.3V_RUN

7

U8E

A23

VSS[001]

A5

VSS[002]

AA2

VSS[003]

AA7

VSS[004]

A25

VSS[005]

AB1

VSS[006]

AB24

VSS[007]

AC11

VSS[008]

AC14

VSS[009]

AC25

VSS[010]

AC26

VSS[011]

AC27

VSS[012]

AD17

VSS[013]

AD20

VSS[014]

AD28

VSS[015]

AD29

VSS[016]

AD3

VSS[017]

AD4

VSS[018]

AD6

VSS[019]

AE1

VSS[020]

AE12

VSS[021]

AE2

VSS[022]

AE22

VSS[023]

AD1

VSS[024]

AE25

VSS[025]

AE5

VSS[026]

AE6

VSS[027]

AE9

VSS[028]

AF14

VSS[029]

AF16

VSS[030]

AF18

VSS[031]

AF3

VSS[032]

AF4

VSS[033]

AG5

VSS[034]

AG6

VSS[035]

AH10

VSS[036]

AH13

VSS[037]

AH16

VSS[038]

AH19

VSS[039]

AH2

VSS[040]

AF28

VSS[041]

AH22

VSS[042]

AH24

VSS[043]

AH26

VSS[044]

AH3

VSS[045]

12

C394

4.7U/10V

18

12

C870

0.1U/10V

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet

AH4

VSS[046]

AH8

VSS[047]

AJ5

VSS[048]

B11

VSS[049]

B14

VSS[050]

B17

VSS[051]

B2

VSS[052]

B20

VSS[053]

B22

VSS[054]

B8

VSS[055]

C24

VSS[056]

C26

VSS[057]

C27

VSS[058]

C6

VSS[059]

D12

VSS[060]

D15

VSS[061]

D18

VSS[062]

D2

VSS[063]

D4

VSS[064]

E21

VSS[065]

E24

VSS[066]

E4

VSS[067]

E9

VSS[068]

F15

VSS[069]

E23

VSS[070]

F28

VSS[071]

F29

VSS[072]

F7

VSS[073]

G1

VSS[074]

E2

VSS[075]

G10

VSS[076]

G13

VSS[077]

G19

VSS[078]

G23

VSS[079]

G25

VSS[080]

G26

VSS[081]

G27

VSS[082]

H25

VSS[083]

H28

VSS[084]

H29

VSS[085]

H3

VSS[086]

H6

VSS[087]

J1

VSS[088]

J25

VSS[089]

J26

VSS[090]

J27

VSS[091]

J4

VSS[092]

J5

VSS[093]

K23

VSS[094]

K28

VSS[095]

K29

VSS[096]

K3

VSS[097]

K6

VSS[098]

ICH8M REV 1.0

ICH8-M (POWER,GND)

M-08 0.1

7

VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184]

VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]

K7 L1 L13 L15 L26 L27 L4 L5 M12 M13 M14 M15 M16 M17 M23 M28 M29 M3 N1 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 N4 N5 N6 P12 P13 P14 P15 P16 P17 P23 P28 P29 R11 R12 R13 R14 R15 R16 R17 R18 R28 R4 T12 T13 T14 T15 T16 T17 T2 U12 U13 U14 U15 U16 U17 U23 U26 U27 U3 U5 V13 V15 V28 V29 W2 W26 W27 Y28 Y29 Y4 AB4 AB23 AB5 AB6 AD5 U4 W24

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

14 51Tuesday, March 06, 2007

8

of

8

1

DDR_A_D4 DDR_A_D5

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D12

DDR_A_D15 DDR_A_D14

DDR_A_D17 DDR_A_D16

DDR_A_D23 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_A_BS2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1

DDR_A_MA10 DDR_A_BS0 DDR_A_WE#

DDR_A_CAS#

M_ODT1 DDR_A_D32

DDR_A_D33 DDR_A_DQS#4

DDR_A_DQS4 DDR_A_D35

DDR_A_D38 DDR_A_D44

DDR_A_D45 DDR_A_DM5 DDR_A_D42

DDR_A_D46 DDR_A_D48

DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D54 DDR_A_D51

DDR_A_D56 DDR_A_D60

DDR_A_DM7 DDR_A_D59

DDR_A_D63

MEM_SCLK

+1.8V_SUS

A is required to route to Top SoDIMM for AMTto function. Ch.A SODIMM needs to be populated for Intel AMT support.

DDR_A_DQS#0

A A

B B

DDR_CKE0_DIMMA<6,16>

DDR_A_BS2<7,16>

DDR_A_BS0<7,16> DDR_A_WE#<7,16>

DDR_A_CAS#<7,16> DDR_CS1_DIMMA#<6,16>

M_ODT1<6,16>

C C

D D

MEM_SDATA<13> MEM_SCLK<13> +3.3V_RUN

Non-iAMT

DDR_A_DQS0

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_DQS#2 DDR_A_DQS2

SMbus address A0 SMbus address A4

1

2

V_DDR_MCH_REF

JDIM1

1

VREF

3

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

FOX_AS0A426-N2RN-7F

CLOCK 0,1

2

3

+1.8V_SUS

TOP BOT

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

SO-DIMM (200P)

VDD8

PC4800 DDR2 SDRAM

84

A15

86

A14

88

VDD11

90

A11

92

A7

94

A6

96

VDD4

98

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0

200

SA1

DDR_A_D1 DDR_A_D0

DDR_A_DM0 DDR_A_D6

DDR_A_D7 DDR_A_D13

DDR_A_D9 DDR_A_DM1

DDR_A_D10 DDR_A_D11

DDR_A_D20 DDR_A_D21

PM_EXTTS#0 DDR_A_DM2

DDR_A_D22 DDR_A_D18

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA <6,16>

DDR_A_MA14 DDR_A_MA11

DDR_A_MA7 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2 DDR_A_MA0

DDR_A_BS1 DDR_A_RAS#

M_ODT0

DDR_A_MA13

DDR_A_D36 DDR_A_D37

DDR_A_DM4 DDR_A_D34

DDR_A_D39 DDR_A_D40

DDR_A_D41 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D43

DDR_A_D47 DDR_A_D52

DDR_A_D53

DDR_A_DM6 DDR_A_D50

DDR_A_D55 DDR_A_D61

DDR_A_D57 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D58

DDR_A_D62

R170

R169

10K

1 2

3

DDR_A_DM[0..7] <7> DDR_A_D[0..63] <7> DDR_A_DQS[0..7] <7> DDR_A_DQS#[0..7] <7> DDR_A_MA[0..14] <6,7,16>

V_DDR_MCH_REF

12

C277

0.1U/10V

M_CLK_DDR0 <6> M_CLK_DDR#0 <6>

PM_EXTTS#0 <6>

DDR_A_BS1 <7,16> DDR_A_RAS# <7,16> DDR_CS0_DIMMA# <6,16>

M_ODT0 <6,16>

+3.3V_RUN

12

C580

2.2U/6.3V

M_CLK_DDR1 <6> M_CLK_DDR#1 <6>

4

12

C276

2.2U/6.3V

DDR_CKE2_DIMMB<6,16>

DDR_B_BS2<7,16>

DDR_B_BS0<7,16> DDR_B_WE#<7,16>

DDR_B_CAS#<7,16>

DDR_CS3_DIMMB#<6,16>

Non-iAMT

12

C579

0.1U/10V

Non-iAMT

+3.3V_RUN

4

5

+1.8V_SUS +1.8V_SUS

V_DDR_MCH_REF

JDIM2

1

VREF

3

DDR_B_D1 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D2 DDR_B_D3

DDR_B_D9 DDR_B_D8

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D15 DDR_B_D11

DDR_B_D16 DDR_B_D21

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D25 DDR_B_D24

DDR_B_DM3

DDR_B_D30 DDR_B_D31

DDR_B_BS2

DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10

DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

M_ODT3<6,16>

M_ODT3 DDR_B_D32

DDR_B_D36 DDR_B_DQS#4

DDR_B_DQS4 DDR_B_D34

DDR_B_D39 DDR_B_D41

DDR_B_D40 DDR_B_DM5 DDR_B_D47

DDR_B_D42 DDR_B_D55

DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D51 DDR_B_D53

DDR_B_D61 DDR_B_D60

DDR_B_DM7 DDR_B_D59

DDR_B_D62 MEM_SDATAMEM_SDATA

MEM_SCLK

VSS47

5

DQ0

7

DQ1

9

VSS37

11

DQS#0

13

DQS0

15

VSS48

17

DQ2

19

DQ3

21

VSS38

23

DQ8

25

DQ9

27

VSS49

29

DQS#1

31

DQS1

33

VSS39

35

DQ10

37

DQ11

39

VSS50

41

VSS18

43

DQ16

45

DQ17

47

VSS1

49

DQS#2

51

DQS2

53

VSS19

55

DQ18

57

DQ19

59

VSS22

61

DQ24

63

DQ25

65

VSS23

67

DM3

69

NC4

71

VSS9

73

DQ26

75

DQ27

77

VSS4

79

CKE0

81

VDD7

83

NC1

85

A16_BA2

87

VDD9

89

A12

91

A9

93

A8

95

VDD5

97

A5

99

A3

101

A1

103

VDD10

105

A10/AP

107

BA0

109

WE#

111

VDD2

113

CAS#

115

S1#

117

VDD3

119

ODT1

121

VSS11

123

DQ32

125

DQ33

127

VSS26

129

DQS#4

131

DQS4

133

VSS2

135

DQ34

137

DQ35

139

VSS27

141

DQ40

143

DQ41

145

VSS29

147

DM5

149

VSS51

151

DQ42

153

DQ43

155

VSS40

157

DQ48

159

DQ49

161

VSS52

163

NCTEST

165

VSS30

167

DQS#6

169

DQS6

171

VSS31

173

DQ50

175

DQ51

177

VSS33

179

DQ56

181

DQ57

183

VSS3

185

DM7

187

VSS34

189

DQ58

191

DQ59

193

VSS14

195

SDA

197

SCL

199

VDD(SPD)

FOX_ AS0A426-N2SN-7F

CLOCK 2,3

CKE 2,3CKE 0,1

5

6

2

VSS46

4

DQ4

6

DQ5

8

VSS15

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

SO-DIMM (200P)

VDD8

PC4800 DDR2 SDRAM

84

A15

86

A14

88

VDD11

90

A11

92

A7

94

A6

96

VDD4

98

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0

200

SA1

DDR_B_D0 DDR_B_D4

DDR_B_DM0 DDR_B_D6

DDR_B_D7 DDR_B_D13

DDR_B_D12 DDR_B_DM1

DDR_B_D10 DDR_B_D14

DDR_B_D20 DDR_B_D17

PM_EXTTS#1 DDR_B_DM2

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D26 DDR_B_D27

DDR_CKE3_DIMMB <6,16>

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB# <6,16>

M_ODT2

DDR_B_MA13

DDR_B_D37 DDR_B_D33

DDR_B_DM4 DDR_B_D38

DDR_B_D35

DDR_B_D45 DDR_B_D44

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D43 DDR_B_D46

DDR_B_D52 DDR_B_D48

DDR_B_DM6 DDR_B_D50

DDR_B_D54 DDR_B_D57

DDR_B_D56 DDR_B_DQS#7

DDR_B_DQS7 DDR_B_D58

DDR_B_D63

R449 10KR449 10K

R448

R448 10K

10K

1 2

6

12

7

DDR_B_DM[0..7] <7> DDR_B_D[0..63] <7> DDR_B_DQS[0..7] <7> DDR_B_DQS#[0..7] <7> DDR_B_MA[0..14] <6,7,16>

V_DDR_MCH_REF

12

C275

C274

0.1U/10V

C275

2.2U/6.3V

Place these Caps near So-Dimm1.

12

C269

2.2U/6.3V

C279

2.2U/6.3V

M_CLK_DDR2 <6> M_CLK_DDR#2 <6>

PM_EXTTS#1 <6>

+1.8V_SUS

12

C270

2.2U/6.3V

+1.8V_SUS

12

Place these Caps near So-Dimm2.

12

DDR_B_BS1 <7,16> DDR_B_RAS# <7,16>

M_ODT2 <6,16>

M_CLK_DDR3 <6> M_CLK_DDR#3 <6>

12

C588

2.2U/6.3V

+1.8V_SUS

Place these Caps near So-Dimm1.

12

C272

0.1U/10V

+1.8V_SUS

Place these Caps near So-Dimm2.

12

C574

0.1U/10V

+3.3V_RUN

12

C264

2.2U/6.3V

C575

2.2U/6.3V

12

C278

0.1U/10V

12

C584

0.1U/10V

Non-iAMT

12

C268

0.1U/10V

12

C586

2.2U/6.3V

12

C271

0.1U/10V

12

C578

0.1U/10V

Non-iAMT

+3.3V_RUN

DELL CONFIDENTIAL/PROPRIETARY

Title

DDR2 SO-DIMM (200P) X 2

Size Document Number Rev

M-08 0.1

Date: Sheet

7

12

C280

2.2U/6.3V

12

C587

2.2U/6.3V

12

C273

0.1U/10V

12

C577

0.1U/10V

8

12

C281

2.2U/6.3V

12

C576

2.2U/6.3V

of

15 51Monday, March 05, 2007

8

1

2

3

4

5

6

7

8

C283

0.1U/10V

C582

0.1U/10V

RP26

2 4

4P2R-S-56

RP25

2 4

4P2R-S-56

RP23

2 4

4P2R-S-56

RP22

2 4

4P2R-S-56

RP21

2 4

4P2R-S-56

RP20

2 4

4P2R-S-56

RP19

2 4

4P2R-S-56

RP38

2 4

4P2R-S-56

RP17

2 4

4P2R-S-56

RP24

2 4

4P2R-S-56

1 2 1 2 1 2 1 2 1 2 1 2 1 2

TOP

12

C282

0.1U/10V

BOT

12

C284

0.1U/10V

1 3

12

C257

0.1U/10V

12

C583

0.1U/10V

+0.9V_DDR_VTT

12

C260

C266

0.1U/10V

12

C596

C597

0.1U/10V

RP41

1 3

4P2R-S-56

RP40

1 3

4P2R-S-56

RP37

1 3

4P2R-S-56

RP18

1 3

4P2R-S-56

RP44

1 3

4P2R-S-56

RP46

1 3

4P2R-S-56

RP45

1 3

4P2R-S-56

RP43

1 3

4P2R-S-56

RP42

1 3

4P2R-S-56

RP39

1 3

4P2R-S-56

R450 56R450 56 R451 56R451 56 R446 56R446 56 R459 56R459 56 R452 56R452 56 R167 56R167 56 R447 56R447 56

C263

0.1U/10V

C591

0.1U/10V

DDR_B_MA7 DDR_B_MA11

DDR_B_MA4 DDR_B_MA6

DDR_B_RAS#DDR_A_RAS#

DDR_A_MA10 DDR_A_BS0

DDR_B_MA3 DDR_B_MA1

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA10 DDR_B_BS0

DDR_B_WE#

DDR_B_CAS#

DDR_B_MA0 DDR_B_MA2

12

C286

0.1U/10V

12

C593

0.1U/10V

12

DDR_B_RAS# <7,15> DDR_B_BS1 <7,15>

DDR_A_BS0 <7,15>

DDR_B_BS0 <7,15>

DDR_B_WE# <7,15> DDR_B_CAS# <7,15>

M_ODT3 <6,15>

DDR_B_BS2 <7,15> DDR_CS2_DIMMB# <6,15> DDR_CS3_DIMMB# <6,15> DDR_CKE2_DIMMB <6,15> DDR_CKE3_DIMMB <6,15>

C259

C261

0.1U/10V

12

C595

C594

0.1U/10V

Please these resistor closely DIMMB,all trace length<750 mil.

12

C258

0.1U/10V

12

C262

0.1U/10V

12

2 4

12 12 12 12 12 12 12

+0.9V_DDR_VTT

A A

B B

C C

D D

Please these resistor closely DIMMA,all trace length<750 mil.

12

C287

0.1U/10V

+0.9V_DDR_VTT

12

C581

0.1U/10V

Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.

12

DDR_A_MA[0..14]<6,7,15> DDR_B_MA[0..14] <6,7,15>

DDR_A_RAS#<7,15> DDR_A_BS1<7,15>

M_ODT0<6,15>

DDR_A_BS2<7,15>

M_ODT2<6,15>

DDR_A_WE#<7,15> DDR_A_CAS#<7,15>

DDR_CS0_DIMMA#<6,15>

DDR_CS1_DIMMA#<6,15> DDR_CKE0_DIMMA<6,15> DDR_CKE1_DIMMA<6,15>

C267

0.1U/10V

C585

0.1U/10V

M_ODT1<6,15>

C265

0.1U/10V

12

C592

0.1U/10V

DDR_A_MA7 DDR_A_MA11

DDR_A_MA4 DDR_A_MA6

DDR_A_BS1 DDR_B_BS1

DDR_A_MA13 M_ODT0

DDR_A_BS2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3

DDR_B_MA13 M_ODT2

DDR_A_WE# DDR_A_CAS#

DDR_A_MA0 DDR_A_MA2

DDR_A_MA1

DDR_A_MA14 DDR_B_MA14

12

C285

0.1U/10V

12

C288

0.1U/10V

R164 56R164 56 R165 56R165 56 R173 56R173 56 R168 56R168 56 R166 56R166 56 R174 56R174 56 R171 56R171 56

DELL CONFIDENTIAL/PROPRIETARY

Title

DDR2 RES ARRAY

Size Document Number Rev

M-08 0.1

Date: Sheet

1

2

3

4

5

6

Date: Sheet

7

of

16 51Monday, March 05, 2007

8

1

Non-iAMT

+3.3V_RUN +3.3V_RUN

R39

A A

B B

C C

D D

R39 10K_NC

10K_NC

1 2

R47

R47 10K_NC

10K_NC

1 2

+3.3V_RUN

Enable ITP

10K

10K R43

R43

1 2

PCI_ICH

+3.3V_RUN

120 ohms@100Mhz

1

0=UMA 1 = Disc. GRFX down

Non-iAMT

L12

1 2

BLM21PG600SN1D

L19

1 2

BLM21PG600SN1D

1 2

R73

R73 10K

10K

PCI_LOMFSA

R74

R74 10K_NC

10K_NC

CPU_MCH_BSEL0<3,6>

CLK_ICH_14M<13>

BK1005LL330 CX5LL330000

12

C64

0.1U/10V

2

59

12

R37 2.2R37 2.2

1 2

12

C110

0.1U/10V

R53 2.2R53 2.2

1 2

R54 1R54 1

1 2

2

+3.3V_RUN

R61 10KR61 10K

CLK_ICH_48M<13> CPU_MCH_BSEL1<3,6>

CPU_MCH_BSEL2<3,6>

L65 BLM18SG260L65 BLM18SG260

CLK_PCI_5025<28> CLK_PCI_PCCARD<20> CLK_PCI_LOM<35>

CLK_PCI_ICH<12> CLK_PWRGD<13>

+CK_VDD_MAIN

12

C60

C65

0.1U/10V

+CK_VDD_A

+CK_VDD_MAIN2

12

C111

0.1U/10V

+CK_VDD_48

12

C99

0.047U/10V

+CK_VDD_REF

3

Non-iAMT

1 2

L64 0_0603L64 0_0603

1 2

PCI_PCCARD

C87 4.7P/50V_NCC87 4.7P/50V_NC

1 2

C121 4.7P/50V_NCC121 4.7P/50V_NC

1 2

C122 4.7P/50V_NCC122 4.7P/50V_NC

1 2

C123 6P/50VC123 6P/50V

1 2

C124 6P/50VC124 6P/50V

1 2

C81 4.7P/50VC81 4.7P/50V

1 2

Discrete without iAMT

12

C85

0.1U/10V

12

C113

C113 10U/6.3V

10U/6.3V

12

C93

4.7U/6.3V

12

C100

0.047U/10V

C75

0.1U/10V

C77

0.047U/10V

12

3

34

R49 33R49 33

1 2

R44 2.2K_0402R44 2.2K_0402 R58 2.2K_0402R58 2.2K_0402

1 2

R57 15R57 15

R60 51R60 51 R62 22R62 22 R63 43R63 43

R48 33R48 33

12

C61

C61 10U/6.3V

10U/6.3V

C72

4.7U/6.3V

4

12 12

12

SMbus address D2

These are for backdrive issue.

4

+CK_VDD_MAIN2

+CK_VDD_MAIN +CK_VDD_48 +CK_VDD_REF CLK_XTAL_IN

CLK_XTAL_OUT FSA

FSB FSC

CLKREF

PCI_SIO

PCI_PCCARD PCI_LOM

PCI_ICH

CLK_SCLK CLK_SDATA

CKG_SMBDAT<28>

CKG_SMBCLK<28>

5

Y2

1 2

12

C109

C109 27P/50V

27P/50V

U9

1 49 54 65

30 36

12 40 18 20

19 41

45 23

22 27

32 33 34

43 44

37 39 16

17

15 31 35 21

4 42 68

+3.3V_ALW

14.318MHZ

VDD_SRC_01 VDD_SRC_02 VDD_SRC_03 VDD_SRC_04

VDD_PCI_01 VDD_PCI_02

VDD_CPU VDD_48 VDD_REF XIN

XOUT 48M/FSA

FSB/TEST_MODE REF0/FSC_TEST_SEL

REF1 PCI1

PCI2/TME PCI3 PCI4/FCTSEL1

DOT96T/27M_NSS DOT96C/27M_SS

PCIF0/ITP_SEL VTT_PWRDG#/PD(CKPWRGD/PD#) SCLK

SDATA

VSS_01 VSS_02 VSS_03 VSS_04 VSS_05 VSS_06 VSS_07

1 2

R289

2.2K

3 1

2N7002W-7-F

2N7002W-7-F R287 0_NCR287 0_NC

1 2

R280

2.2K

3 1

2N7002W-7-F

2N7002W-7-F R285 0_NCR285 0_NC

1 2

CK505

+3.3V_RUN

2

Q30

+3.3V_RUN

2

Q28

5

1 2

12

2

4

1

3

R55 0R55 0

RP30

RP30 4P2R-2.2K

4P2R-2.2K

CLK_SDATA

CLK_SCLK

C108

C108 27P/50V

27P/50V

CPUT2_ITP/SRCT_10

CPUC2_ITP/SRCC_10

SRCT_1/SATAT SRCC_1/SATAC

SRCT_0/LCD100MT

SRCC_0/LCD100MC

Non-iAMT

CLK_XTAL_OUTCLK_XTAL_IN

14.318MHz

VDDA VSSA

PCI_STP#

CPU_STP#

CPUT1_MCH CPUC1_MCH

CPUT0 CPUC0

PGMODE

SRCT_9 SRCC_9

CLKREQ9#

SRCT_8 SRCC_8

CLKREQ8#

SRCT_7 SRCC_7

CLKREQ7#

SRCT_6 SRCC_6

CLKREQ6#

SRCT_5 SRCC_5

CLKREQ5#

SRCT_4 SRCC_4

CLKREQ4#

SRCT_3 SRCC_3

CLKREQ3#

SRCT_2 SRCC_2

CLKREQ2#

CLKREQ1#

CY28547BLFXC

6

7 8

25 24

11 10

14 13

6 5

9 3

2 72 70 69 71 66 67 38 63 64 62 60 61 29 58 59 57 55 56 28 52 53 26 50 51 46

47 48

6

+CK_VDD_A

MCH_BCLK MCH_BCLK#

CPU_BCLK CPU_BCLK#

CPU_ITP CPU_ITP#

PGMODE PCIE_EXPCARD

PCIE_EXPCARD# PCIE_VGA

PCIE_VGA# PCIE_ICH

PCIE_ICH# MCH_3GPLL

MCH_3GPLL# PCIE_MINI2

PCIE_MINI2# MINI2CLK_REQ#

PCIE_MINI1 PCIE_MINI1# MINI1CLK_REQ# PCIE_MINI3 PCIE_MINI3# MINI3CLK_REQ# PCIE_SATA PCIE_SATA#

4 2

R41 10K_NCR41 10K_NC

1 2 4

2 4

2 2

4 2

4

R32 475/FR32 475/F

2 4

PCI_LOM = FCTSEL1

FCTSEL1 (PIN34)

0=UMA 1 = Disc.

GRFX down

DOT96T

27Mout

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet

7

CLK_3GPLLREQ# SATA_CLKREQ# CARD_CLK_REQ# MINI1CLK_REQ# MINI2CLK_REQ# MINI3CLK_REQ#

PGMODE

8

1 2

+3.3V_RUN

12 12 12 12 12 12

R28 10KR28 10K R38 10KR38 10K R31 10KR31 10K R71 10KR71 10K R72 10KR72 10K R59 10KR59 10K

R42 10K_NCR42 10K_NC

Populate for Napa platforms only.

H_STP_PCI# <13>

23

3 1

23

1 3

1 3 12 1 3

1 3

RP12

RP12 4P2R-S-22

4P2R-S-22 RP13

RP13 4P2R-S-22

4P2R-S-22 RP10

RP10 4P2R-S-22

4P2R-S-22

RP8

RP8 4P2R-S-33

4P2R-S-33 RP3

RP3 4P2R-S-33

4P2R-S-33 RP4

RP4 4P2R-S-0

4P2R-S-0 RP5

RP5 4P2R-S-33

4P2R-S-33 RP6

RP6 4P2R-S-33

4P2R-S-33

RP7

RP7 4P2R-S-33

4P2R-S-33 4P2R-S-0

4P2R-S-0 RP9

RP9 RP11

RP11 4P2R-S-33

4P2R-S-33

H_STP_CPU# <13>

CLK_MCH_BCLK <5> CLK_MCH_BCLK# <5>

CLK_CPU_BCLK <3> CLK_CPU_BCLK# <3>

CLK_CPU_ITP <3> CLK_CPU_ITP# <3>

+3.3V_RUN

CLK_PCIE_EXPCARD <26> CLK_PCIE_EXPCARD# <26>

CARD_CLK_REQ# <26> CLK_PCIE_VGA <18> CLK_PCIE_VGA# <18>

CLK_PCIE_ICH <12> CLK_PCIE_ICH# <12>

CLK_MCH_3GPLL <6> CLK_MCH_3GPLL# <6>

CLK_3GPLLREQ# <6> CLK_PCIE_MINI2 <24>

R543 0R543 0

R186 0R186 0

R544

CLK_PCIE_MINI2# <24>

1 2

CLK_PCIE_MINI1 <24> CLK_PCIE_MINI1# <24>

1 2

CLK_PCIE_MINI3 <25> CLK_PCIE_MINI3# <25>

1 2

0_0402

CLK_PCIE_SATA <11> CLK_PCIE_SATA# <11>

SATA_CLKREQ# <13>

Non-iAMT

Discrete

MINI2CLK_REQ#_R <24>

MINI1CLK_REQ#_R <24>

MINI3CLK_REQ#_R <25>

FSC FSB FSA CPU SRC PCI 1 0 0 0 00 1 1 1

1

100

10

133

1

1 1

0 1 1

166

0

200

0

266

0

333

0

400

1

RSVD

100 100 100 100 100 100 100 100

330 33 33 33 33 33 33 33

PIN43 PIN44 PIN47 PIN48

DOT96C

27MSSout

CLOCK GENERATOR

M-08 0.1

7

96/ 100M_T

SRCT0 SRCC0

96/ 100M_C

17 51Wednesday, March 07, 2007

8

of

E

4 4

PCIE_MTX_GRX_P0 PCIE_MTX_GRX_N0

PCIE_MTX_GRX_P1

PCIE_MTX_GRX_N[0..15]<6>

3 3

PCIE_MTX_GRX_P[0..15]<6>

2 2

1 1

PCIE_MTX_GRX_N0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_N15

PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_P6

PCIE_MTX_GRX_P8 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_P13 PCIE_MRX_GTX_P11 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_P15

+1.8V_RUN

For Discrete: Populate C178,C181

E

PCIE_MTX_GRX_N1 PCIE_MTX_GRX_P2

PCIE_MTX_GRX_N2 PCIE_MTX_GRX_P3 PCIE_MTX_C_GRX_P3

PCIE_MTX_GRX_N3 PCIE_MTX_GRX_P4

PCIE_MTX_GRX_N4 PCIE_MTX_GRX_P5

PCIE_MTX_GRX_N5 PCIE_MTX_GRX_P6

PCIE_MTX_GRX_N6 PCIE_MTX_GRX_P7

PCIE_MTX_GRX_N7 PCIE_MTX_GRX_P8

PCIE_MTX_GRX_N8 PCIE_MTX_GRX_P9

PCIE_MTX_GRX_N9 PCIE_MTX_GRX_P10

PCIE_MTX_GRX_N10 PCIE_MTX_GRX_P11 PCIE_MTX_C_GRX_P11

PCIE_MTX_GRX_N11 PCIE_MTX_GRX_P12

PCIE_MTX_GRX_N12 PCIE_MTX_GRX_P13

PCIE_MTX_GRX_N13 PCIE_MTX_GRX_P14

PCIE_MTX_GRX_N14 PCIE_MTX_GRX_P15 PCIE_MTX_C_GRX_P15

PCIE_MTX_GRX_N15

12

C429

.1U/10V/0402

12

C428

.1U/10V/0402

D

+3.3V_RUN

12

C372

.047U/10V/0402

12

C66 .1U/10V/0402C66 .1U/10V/0402

12

C70 .1U/10V/0402C70 .1U/10V/0402

12

C76 .1U/10V/0402C76 .1U/10V/0402

12

C80 .1U/10V/0402C80 .1U/10V/0402

12

C88 .1U/10V/0402C88 .1U/10V/0402

12

C89 .1U/10V/0402C89 .1U/10V/0402

12

C102 .1U/10V/0402C102 .1U/10V/0402

12

C105 .1U/10V/0402C105 .1U/10V/0402

12

C115 .1U/10V/0402C115 .1U/10V/0402

12

C118 .1U/10V/0402C118 .1U/10V/0402

12

C126 .1U/10V/0402C126 .1U/10V/0402

12

C130 .1U/10V/0402C130 .1U/10V/0402

12

C132 .1U/10V/0402C132 .1U/10V/0402

12

C135 .1U/10V/0402C135 .1U/10V/0402

12

C136 .1U/10V/0402C136 .1U/10V/0402

12

C148 .1U/10V/0402C148 .1U/10V/0402

D

C69 .1U/10V/0402C69 .1U/10V/0402

C74 .1U/10V/0402C74 .1U/10V/0402

C79 .1U/10V/0402C79 .1U/10V/0402

C83 .1U/10V/0402C83 .1U/10V/0402

C94 .1U/10V/0402C94 .1U/10V/0402

C96 .1U/10V/0402C96 .1U/10V/0402

C107 .1U/10V/0402C107 .1U/10V/0402

C112 .1U/10V/0402C112 .1U/10V/0402

C117 .1U/10V/0402C117 .1U/10V/0402

C125 .1U/10V/0402C125 .1U/10V/0402

C129 .1U/10V/0402C129 .1U/10V/0402

C131 .1U/10V/0402C131 .1U/10V/0402

C134 .1U/10V/0402C134 .1U/10V/0402

C138 .1U/10V/0402C138 .1U/10V/0402

C139 .1U/10V/0402C139 .1U/10V/0402

C156 .1U/10V/0402C156 .1U/10V/0402

+3.3V_SUS

+15V_ALW

RUNPWROK<28,29,38,45>

+2.5V_RUN

C

YPRPB_DET: SIGNAL FROM SVIDEO CONNECTOR, TO SWICH TO COMPONENT OUT.

JVDO1

1 3

12

.047U/10V/0402

12

C371

C373

.047U/10V/0402

PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P4

PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5 PCIE_MRX_GTX_N7

PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P6

PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P7

PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P8

PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P9

PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P10

PCIE_MTX_C_GRX_N10 PCIE_MRX_GTX_P4

PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P12

PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P13

PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P14

PCIE_MTX_C_GRX_N14

PCIE_MTX_C_GRX_N15

5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99

101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199

HONDA_LPF-SC200SMYGA+

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

C

Delete R236,R247 pre ref schematic.

PCIE_MRX_GTX_P0 PCIE_MRX_GTX_N0

PCIE_MRX_GTX_P1 PCIE_MRX_GTX_N1

PCIE_MRX_GTX_P2 PCIE_MRX_GTX_N2

PCIE_MRX_GTX_P3 PCIE_MRX_GTX_N3

PCIE_MRX_GTX_P4 PCIE_MRX_GTX_N4

PCIE_MRX_GTX_P5 PCIE_MRX_GTX_N5

PCIE_MRX_GTX_P6 PCIE_MRX_GTX_N6

PCIE_MRX_GTX_P7 PCIE_MRX_GTX_N7

PCIE_MRX_GTX_P8 PCIE_MRX_GTX_N8

PCIE_MRX_GTX_P9 PCIE_MRX_GTX_N9

PCIE_MRX_GTX_P10 PCIE_MRX_GTX_N10

PCIE_MRX_GTX_N11 PCIE_MRX_GTX_P12

PCIE_MRX_GTX_N12 PCIE_MRX_GTX_P13

PCIE_MRX_GTX_N13 PCIE_MRX_GTX_P14

PCIE_MRX_GTX_N14 PCIE_MRX_GTX_P15

PCIE_MRX_GTX_N15

12

C166

.1U/50V/0402

CFX_PWR_LIMIT

12

C169

.1U/50V/0402

4

1 2

R109 0_NCR109 0_NC

7SH08_NC

YPRPB_DET# <19>

+5V_ALW

LCD_SMBCLK <28> LCD_SMBDAT <28>

TV_Y <19> TV_CVBS <19> TV_C <19> VSYNC <19>

HSYNC <19> VGA_BLU <19> VGA_GRN <19> VGA_RED <19> G_CLK_DDC2 <19>

G_DAT_DDC2 <19>

LCD_TST <29>

PLTRST_DELAY# <13> CLK_PCIE_VGA <17>

CLK_PCIE_VGA# <17>

PCIE_MRX_GTX_N0 PCIE_MRX_GTX_N1 PCIE_MRX_GTX_N2 PCIE_MRX_GTX_N3 PCIE_MRX_GTX_N4 PCIE_MRX_GTX_N5 PCIE_MRX_GTX_N6

PCIE_MRX_GTX_N8 PCIE_MRX_GTX_N9 PCIE_MRX_GTX_N10 PCIE_MRX_GTX_N11 PCIE_MRX_GTX_N12 PCIE_MRX_GTX_N13 PCIE_MRX_GTX_N14 PCIE_MRX_GTX_N15

PCIE_MRX_GTX_P0 PCIE_MRX_GTX_P1 PCIE_MRX_GTX_P2 PCIE_MRX_GTX_P3PCIE_MTX_GRX_P7

PCIE_MRX_GTX_P5 PCIE_MRX_GTX_P6 PCIE_MRX_GTX_P7 PCIE_MRX_GTX_P8 PCIE_MRX_GTX_P9 PCIE_MRX_GTX_P10 PCIE_MRX_GTX_P11 PCIE_MRX_GTX_P12 PCIE_MRX_GTX_P13 PCIE_MRX_GTX_P14 PCIE_MRX_GTX_P15

+3.3V_RUN

THERMATRIP_VGA# <34>

+5V_RUN

PANEL_BKEN <29>

12

+3.3V_RUN

U13

C175

.1U/50V/0402

2 1

3 5

12

B

SMBUS Address 58 for Inverter. SMBUS Address 98 for Temp.sensor.

PCIE_MRX_GTX_N[0..15] <6>

PCIE_MRX_GTX_P[0..15] <6>

GFX_PWRGD <38>

LCDVCC_TST_EN <28>

+G_PWR_SRC

C425

C177

10U/25V/1206

1 2

SIO_GFX_PWR <34> ACAV_IN <28,34,40>

B

10U/25V/1206

.1U/50V/0402

A

+PWR_SRC

80 mil

12

C160

R94

.1U/50V/0603

100K_0402

1 2

INV_PWR_SRC_ON

12

R103

R103 100K_0402

100K_0402

INV_PWR_SRC_ON_R

31

2

Q11

Q11 2N7002W-7-F

2N7002W-7-F

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

VGA CARD Connector

FM1 0.1

+G_PWR_SRC

4

Q9

Q9 SI3457BDV-T1-E3

SI3457BDV-T1-E3

3

RUN_ON <28,38,39>

A

80 mil

6 5 2 1

of

18 51Monday, March 05, 2007

A

Setting R,G,B treac impedance to 50 ohm.

VGA_RED<18>

AUD_SPDIF_OUT<32>

+5V_RUN

C408

0.1U/10V

VGA_GRN<18>

VGA_BLU<18>

12

C336

C336 .1U/10V/0402

.1U/10V/0402

D27 SDM10K45-7-FD27 SDM10K45-7-F

2 1

5

2 4

74AHCT1G125GW

5

2 4

74AHCT1G125GW

12

R210 0_0603_NCR210 0_0603_NC

A

R45

R45 150/F

150/F

1 2

1

U29

1

U30

+5V_RUN

53

2 4

74AHCT1G125GW

1 2

R35

R35 150/F

150/F

1 2

R290 1KR290 1K

VGAHSYNC_R

Place near U29 , U30 < 200 mil

VGAVSYNC_R

1

U4

12

R33

C86

150/F

22P/50V_NC

1 2

12

R286 10R286 10

1 2

R293 10R293 10

1 2

TV_C<18>

TV_Y<18>

TV_CVBS<18>

R212

12

10K

SP_DIF SP_DIFB SP_DIF_D

1 2

R214 220_0603R214 220_0603

4 4

3 3

VSYNC<18>

2 2

1 1

12

C68

C68 22P/50V_NC

22P/50V_NC

CRT_VCC

1 2

B

C400

0.01U/25V

B

L13

1 2

BLM11B750SB

BLM11B750SB L14

L14

1 2

BLM11B750SB

BLM11B750SB L16

L16

1 2

BLM11B750SB

12

C62

C62 22P/50V_NC

22P/50V_NC

G_DAT_DDC2<18>

G_CLK_DDC2<18>HSYNC<18>

Place All of those Inductors Caps close to JTV <200 mils

C5 22P_NCC5 22P_NC

L4

12

R6

R6 150/F_0402

150/F_0402

12

R7

R7 150/F_0402

150/F_0402

12

R5

R5 150/F_0402

150/F_0402

C337 .01U/25V/0402C337 .01U/25V/0402

L4 BLM18BD151SN1D

BLM18BD151SN1D

12

C10

C10 6P/50V/0402

6P/50V/0402

C7 22P_NCC7 22P_NC

L5

L5 BLM18BD151SN1D

BLM18BD151SN1D

12

C11

C11 6P/50V/0402

6P/50V/0402

C3 22P_NCC3 22P_NC

L3

L3 BLM18BD151SN1D

BLM18BD151SN1D

12

C9

C9 6P/50V/0402

6P/50V/0402

12

1 2

SP_DIFC

12

C82

C82 10P/50V_NC

10P/50V_NC

12

C6

C6 6P/50V/0402

6P/50V/0402

12

C8

C8 6P/50V/0402

6P/50V/0402

12

C4

C4 6P/50V/0402

6P/50V/0402

12

R211

R211 110_0603

110_0603

C

CRT_VCC

SVIDEO_C SVIDEO_CVBS

SVIDEO_Y

1 2

R213 0_0805R213 0_0805

Add R213 pre ref schematic.

C

1

3

RP29

RP29 4P2R-2.2K

4P2R-2.2K

2

4

12

C395

C395 10P/50V_NC

10P/50V_NC

12

C103

C103 10P/50V_NC

10P/50V_NC

12

C73

C73 10P/50V_NC

10P/50V_NC

12

C399

C399 10P/50V_NC

10P/50V_NC

12

C71

10P/50V_NC

RED M_SEN#_R

T14PAD T14PAD

GREEN

BLUE

12

C67

C67 10P/50V_NC

10P/50V_NC

M_ID2#

T15PAD T15PAD

L15

1 2

BLM11A121S

BLM11A121S L17

L17

1 2

BLM11A121S

Place near JVGA1 connector < 200 mil

JVGA_HS

JVGA_VS

12

C78

C78 10P/50V

10P/50V

JTV1

3 6 7 5 2 4 1

FOX_MH1177L-BG6N-7FL

11/1 Update FP

12

C342

C342 300P_NC

300P_NC

SP_DIF_E

1 2

R216 0_0805R216 0_0805

Populate R218 & De-populate R216

R215

when component VIDEO is enable.

0_NC

1 2

D

12

C92

C92 10P/50V

10P/50V

+3.3V_RUN

12

R218

R218 47K_0603

47K_0603

D

E

+5V_RUN

21

D22

D22 SDM10K45-7-F

SDM10K45-7-F

12

R279

R279 0/1206

0/1206

JVGA1

6

CRT_VCC_R

11

1 7

12

2 8

13

3 9

14

4 10 15

5

FOX_DZ11A91-NB211-9F

Update it per ref schematic.

YPRPB_DET# <18>

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

CRT&TV CONN

M-08 0.1

Place D23,D24,D26 close to JVGA1 <200 mils

+3.3V_RUN

D23

+3.3V_RUN

D24

+3.3V_RUN

D26

+3.3V_RUN

1

2

D20

D20 DA204U_NC

DA204U_NC

+3.3V_RUN

D21

1

2

DA204U_NC

+3.3V_RUN

1

2

D19

D19 DA204U_NC

DA204U_NC

E

1

2

1

2

1

2

3

DA204U_NC

SVIDEO_C

SVIDEO_Y

SVIDEO_CVBS

19 51Monday, March 05, 2007

3

of

RED

GREEN

BLUE

+3.3V_R5C832

A

B

+3.3V_R5C832

C

D

E

1 1

C455

C455 10U/10V/0805

10U/10V/0805

2 2

GBRST# should be asserted only when system power supply is on.

C149

PCI Bus

C149 10U/10V/0805

10U/10V/0805

C471

C471 .01U/25V/0402

.01U/25V/0402

C152

C152 .01U/25V/0402

.01U/25V/0402

C468

C468 .1U/10V/0402

.1U/10V/0402

PCI_AD[31..0]<12,35>

PowerOnReset for VccCore

PCI Bus

PCI_PAR<12,35>

PCI_C_BE3#<12,35>

3 3

PCI_C_BE2#<12,35> PCI_C_BE1#<12,35> PCI_C_BE0#<12,35>

PCI_REQ1#<12>

PCI_GNT1#<12>

PCI_FRAME#<12,35>

PCI_IRDY#<12,35> PCI_TRDY#<12,35> PCI_DEVSEL#<12,35>

PCI_STOP#<12,35> PCI_PERR#<12,35>

PCI_SERR#<12,35>

PCI_RST#<12,35>

CLK_PCI_PCCARD<17>

SYS_PME#<29,35>

CoreLogic CLOCKRUN#

The ICH schematics need to include a pull-up resistor to implement CLKRUN#, and the ICH schematics must have a pull-down, or constantly drive thesignal low, in order to disable CLKRUN#.

4 4

A

C154

C154 .01U/25V/0402

.01U/25V/0402

C464

C464 .01U/25V/0402

.01U/25V/0402

CLKRUN#<13,28,35>

C155

C155 .01U/25V/0402

.01U/25V/0402

C153

C153 .01U/25V/0402

.01U/25V/0402

+3.3V_R5C832

12

R136

R136 100K_0402

100K_0402

C219

C219 1U/10V/0603

1U/10V/0603

PCI_AD17

C438

C438 .01U/25V/0402

.01U/25V/0402

Place the power caps close to the relation pins.

C433

C433 .01U/25V/0402

.01U/25V/0402

1 2

R87 100_0402R87 100_0402

R135 0_NCR135 0_NC

C162

C162 .01U/25V/0402

.01U/25V/0402

C173

C173 .47U/10V/0603

.47U/10V/0603

12

CLK_PCI_PCCARD

B

C477

C477 .47U/10V/0603

.47U/10V/0603

PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0

12

C167

C167 12P

12P

R10233R102 33

U12B

10

VCC_PCI1

20

VCC_PCI2

27

VCC_PCI3

32

VCC_PCI4

41

VCC_PCI5

128

VCC_PCI6

61

VCC_RIN

16

VCC_ROUT1

34

VCC_ROUT2

64

VCC_ROUT3

114

VCC_ROUT4

120

VCC_ROUT5

125

AD31

126

AD30

127

AD29

1

AD28

2

AD27

3

AD26

5

AD25

6

AD24

9

AD23

11

AD22

12

AD21

14

AD20

15

AD19

17

AD18

18

AD17

19

AD16

36

AD15

37

AD14

38

AD13

39

AD12

40

AD11

42

AD10

43

AD9

44

AD8

46

AD7

47

AD6

48

AD5

49

AD4

50

AD3

51

AD2

52

AD1

53

AD0

33

PAR

7

C/BE3#

21

C/BE2#

35

C/BE1#

45

C/BE0#

8

IDSEL

124

REQ#

123

GNT#

23

FRAME#

24

IRDY#

25

TRDY#

26

DEVSEL#

29

STOP#

30

PERR#

31

SERR#

71

GBRST#

119

PCIRST#

121

PCICLK

70

PME#

117

CLKRUN#

R5C833T_V00

Refer to DELL M07 schematic X06

HWSPND#

PCI / OTHER

UDIO0/SRIRQ#

AJ5C8320H00

VCC_3V

VCC_MD

GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9

GND10

AGND1 AGND2 AGND3 AGND4 AGND5

MSEN XDEN

UDIO5

UDIO3 UDIO4

UDIO2 UDIO1

INTA# INTB#

TEST

+3.3V_R5C832

67

86

4 13 22 28 54 62 63 68 118 122

99 102 103 107 111

69

58 55

57

65 59

56 60 72

115 116

66

C

Place the power caps close to the relation pins.

C480

C480 .01U/25V/0402

.01U/25V/0402

+3.3V_R5C832

R134

Route to GPIOG6 (pin 94) on the

10K_0402

SIO companion chip ECE5011, with the signal named CB_HWSPND#

T33 PADT33 PAD

R133

R133 100K_0402

100K_0402

1 2

C220

C220 10U/10V/0805

10U/10V/0805

IRQ_SERIRQ <13,28>

PCI Bus

PCI_PIRQD# <12> PCI_PIRQC# <12>

+3.3V_R5C832

R367

R367 10K_0402

10K_0402

1394 Interrupt Media card Interrupt

D

+3.3V_R5C832

12

R365

R365 100K_0402

100K_0402

+3.3V_RUN

1 2

R142 0_0805R142 0_0805

+3.3V_R5C832

Memory Stick Enable

XD Card Enable

Serial ROM disable

SD Card Enable MMC Card Enable

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

CRT&TV CONN

M-08 0.1

E

of

20 51Monday, March 05, 2007

A

B

C

D

E

80 mils

+3.3V_RUN_PHY

1 1

GUARD GND

C214 22P/50V/0402C214 22P/50V/0402

C215 22P/50V/0402C215 22P/50V/0402

Populate C197 for R5C832 chip

2 2

Place these caps as close to the U26 as possible.

3 3

1394_XI

Y4

24.576MHz

1394_XO

1 2

R132 0_0402R132 0_0402

C197 .01U/25V/0402_NCC197 .01U/25V/0402_NC

R124 10K/F_0402R124 10K/F_0402

C191 .01U/25V/0402C191 .01U/25V/0402

RICOH_FILO

RICOH_REXT

RICOH_VREF

94

XI

95

XO

96

FIL0

IEEE1394/SD

R5C833T_V00

IEEE1394/SD

101

REXT

100

VREF

97

RSV

AVCC_PHY1 AVCC_PHY2 AVCC_PHY3 AVCC_PHY4

TPBIAS0

TPBN0 TPBP0

TPAN0 TPAP0

MDIO17 MDIO16 MDIO15 MDIO14 MDIO13 MDIO12 MDIO11 MDIO10

MDIO05 MDIO08 MDIO19 MDIO18 MDIO02

MDIO03 MDIO00

MDIO01

MDIO09

MDIO04 MDIO06

MDIO07

U12A

98 106 110 112

113

56.2/F_0603

104 105

108 109

C168

C168 10U/10V/0805

10U/10V/0805

Place these caps as close to the U26 as possible.

AS CLOSE AS POSSIBLE TO R5C832

TPBIAS0

R110

56.2/F_0603

R115

56.2/F_0603

R117

C178

C178 .1U/10V/0402

.1U/10V/0402

R121

56.2/F_0603

Circuit area : As small as possible.

XD_DATA7

87

XD_DATA6

92

XD_DATA5

89

XD_DATA4

91

SD/XD/MS_DATA3

90

SD/XD/MS_DATA2

93 81

SD/XD/MS_DATA0

82

75

SD/XD/MS_CMD

88 83 85 78

SD_WP#(XDR/B#)

77

SD_CD#

80

79

84

76 74

73

MS_INS#

SD_CD# <22>

MS_INS# <22>

T34 PADT34 PAD

C176

C176 .01U/25V/0402

.01U/25V/0402

C180 .33U/16V/0603C180 .33U/16V/0603

C181 .01U/25V/0402C181 .01U/25V/0402

TPB0N TPB0P

TPA0N TPA0P

C183 270P/25V/0402C183 270P/25V/0402

R122 5.11K/F_0402R122 5.11K/F_0402

XD_DATA7 <22> XD_DATA6 <22> XD_DATA5 <22> XD_DATA4 <22> SD/XD/MS_DATA3 <22> SD/XD/MS_DATA2 <22> SD/XD/MS_DATA1 <22> SD/XD/MS_DATA0 <22>

XD_WP# <22> SD/XD/MS_CMD <22> XD_ALE <22> XD_CLE <22> XD_CE# <22>

SD_WP#(XDR/B#) <22> 2 1

D11 1SS355D11 1SS355

2 1

D10 1SS355D10 1SS355

SD/XD/MS_CLK <22>

MC_PWR_CTRL_0 <22>

close to the Chip

L22

L22 BLM18PG181SN1D

BLM18PG181SN1D

modify

C196

C196 1000P/50V/0402

1000P/50V/0402

+3.3V_R5C832

*TPA0P/TPA0N,TPB0P/TPB0N pair trace : As close as possible. *TPA0P/TPA0N,TPB0P/TPB0N pair trace : Same length electrically. *Termination resistor for TPA+/- TPB+/- : As close as possible to its cable driver (device pin out).

L24

L24 DLW21HN121SQ2_NC

DLW21HN121SQ2_NC

3 4

34

+3.3V_R5C832

R146

10K_NC

1 2

XD_CDSW# <22>

TPB0N

TPA0N TPA0P

34

12

R119 0_0805R119 0_0805 R114 0_0805R114 0_0805 R79 0_0805R79 0_0805 R86 0_0805R86 0_0805

3 4

34

12

L20

L20 DLW21HN121SQ2_NC

DLW21HN121SQ2_NC

12

AS CLOSE AS POSSIBLE TO 1394 CONNECTOR.

TPB0TPB0+TPB0P TPA0-SD/XD/MS_DATA1 TPA0+

11/1 Update FP

CON2

CON2 UV31413-WSU0D-7F

UV31413-WSU0D-7F

1

2

3

4

5566778

8

4 4

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

A

B

C

D

Date: Sheet

COMPUTER

CRT&TV CONN

M-08 0.1

E

of

21 51Monday, March 05, 2007

A

B

C

D

E

+3.3V_RUN_CARD

1 1

49

SD_WP#(XDR/B#)<21>

SD_CD# SD_WP#

XD_DATA7 XD_DATA6 XD_DATA5 SD/XD/MS_DATA1 XD_DATA4 SD/XD/MS_DATA0 SD/XD/MS_DATA3 SD/XD/MS_DATA2

SD/XD/MS_DATA1 SD/XD/MS_CMD

SD/XD/MS_DATA1 SD/XD/MS_DATA0 SD/XD/MS_DATA0

XD_CDSW#<21>

XD_DATA7<21> XD_DATA6<21> XD_DATA5<21>

XD_DATA4<21> SD/XD/MS_DATA3<21> SD/XD/MS_DATA2<21> SD/XD/MS_DATA1<21> SD/XD/MS_DATA0<21> SD/XD/MS_CMD<21>

XD_WP#<21>

XD_ALE<21>

XD_CLE<21>

XD_CE#<21> SD/XD/MS_CLK<21>

12

R149 0_0402R149 0_0402

C243

2.2U/6.3V/0603

8 IN1 CARD READER

SD_CD#<21>

2 2

3 3

CON6

1

SD(CD2/WP2/GND)

2

SD(CD1)

3

SD(WP1)

4

XD-18(VCC)

5

XD-17(D7)

6

XD-16(D6)

7

XD-15(D5)

8

SD-8(DAT1)

9

XD-14(D4)

10

SD-7(DAT0)

11

XD-13(D3)

12

XD-12(D2)

13

SD-6(GND/VSS2)

14

MS-1(VSS)

15

XD-11(D1)

16

MS-2(BS)

17

SD-5(CLK)

18

MS-3(VCC/DATA1)

19

XD-10(D0)

20

MS-4(SDIO/DATA0)

21

SD-4(VCC/VDD)

TAI-SOL144-2400000900

MS-5(DATA2)

XD-9(GND)

MS-6(INS)

SD-3(VSS1)

MS-7(DATA3)

XD-8(-WP)

MS-8(SCLK)

SD-2(CMD) MS-9(VCC)

XD-7(WE)

MS-10(VSS)

SD-1(DAT3)

XD-6(ALE)

SD-9(DAT2)

XD-5(CLE)

XD-4(CE) XD-3(RE)

XD-2(R/-B)

XD-1(CD)

XD-0(GND)

22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

MC_PWR_CTRL_0<21>

+3.3V_RUN_CARD

R131 0_0402R131 0_0402

+3.3V_R5C832

SD/XD/MS_DATA2

SD/XD/MS_DATA3

XD_WP#

SD/XD/MS_CLK

12

SD/XD/MS_CMD SD/XD/MS_CMD

SD/XD/MS_DATA3

XD_ALE

SD/XD/MS_DATA2

XD_CLE XD_CE#

SD/XD/MS_CLKSD/XD/MS_CLK

SD_WP#(XDR/B#)

XD_CDSW#

U16

IN5OUT

3

NC EN4GND

TPS2051BDBV

C198

C198 .1U/10V/0402

.1U/10V/0402

AAT4250 will be tested by 2'nd source after proto2 build.

MS_INS# <21>

1

2

+3.3V_RUN_CARD

C199

C199 1U/10V/0603

1U/10V/0603

+3.3V_RUN_CARD

C229

C229 .01U/25V/0402

.01U/25V/0402

C225

C225 .01U/25V/0402

.01U/25V/0402

C511

C511 .01U/25V/0402

.01U/25V/0402

R397

R397 150K_0402

150K_0402

SD Protect

R558 0_0402_NCR558 0_0402_NC

49

SD_WP#(XDR/B#)

XD_CDSW#

4 4

A

Q77

Q77 2N7002W-7-F

2N7002W-7-F

3 1

B

SD_WP#

2

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

C

D

Date: Sheet

COMPUTER

CRT&TV CONN

M-08 0.1

E

of

22 51Monday, March 05, 2007

1

SATA 1 & 2 Connector. ODD Connector.

SATA_TX0+<11> SATA_TX0-<11>

A A

Corsica

DFHS22FR012

Place close to connector side

Locate caps C626, C627, C628, C629 near HDD Conn. Length match SATA_C_RX0- & SATA_C_RX0+ within 0 mils.

B B

SATA_RX0-<11> SATA_RX0+<11>

SATA_RX2-<11> SATA_RX2+<11>

C627 3900P/25VC627 3900P/25V C626 3900P/25VC626 3900P/25V

C629 3900P/25VC629 3900P/25V C628 3900P/25VC628 3900P/25V

+3.3V_RUN

12 12

2

CON4

23

GND1

24

RXP

25

RXN

26

SATA_RX0-_C SATA_RX0+_C SATA_RX2+_C

+5V_HDD

GND2

27

TXN

28

TXP

29

GND3

30

3.3V_0

31

3.3V_1

32

3.3V_2

33

GND4

34

GND5

35

GND6

36

5V_0

37

5V_1

38

5V_2

39

GND7

40

RSVD

41

GND8

42

12V_0

43

12V_1

44

12V_2

QT600806-400S-9F

10/20 Update FP

Only for Corsica

SATA_RX0-_C SATA_RX0+_C

SATA_RX2-_C SATA_RX2+_C

12

C888

C888 .1U/10V/0402

.1U/10V/0402

Only for Corsica

12

C892

C892 10U/10V/0805_NC

10U/10V/0805_NC

3

GND1

RXP

RXN

GND2

TXN TXP

GND3

3.3V_0

3.3V_1

3.3V_2 GND4 GND5 GND6

5V_0 5V_1

5V_2 GND7 RSVD GND8

12V_0 12V_1 12V_2

C889

C889 1U/10V/0603

1U/10V/0603

C893

C893 1U/10V/0603_NC

1U/10V/0603_NC

1 2 3 4 5 6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

R5540R554

+5V_HDD

12

C890

C890 .1U/10V/0402

.1U/10V/0402

+3.3V_RUN

12

C894

C894 .1U/10V/0402_NC

.1U/10V/0402_NC

SATA_RX2-_C

+3.3V_RUN

+5V_HDD

12

Low : Gilligan

( with 2nd HDD )

0

High : Corsica

4

SATA_TX2+ <11> SATA_TX2- <11>

PLATFORM_BID <29>

12

C891

C891 1000P/50V/0402

1000P/50V/0402

12

C895

C895 1000P/50V/0402_NC

1000P/50V/0402_NC

+3.3V_RUN

IDE_RST_MOD#<13>

+3.3V_RUN

0506: ref CL1301 P52

R191 8.2KR191 8.2K

+5V_MOD

5

IDE_RST_MOD#

12

R486

4.7K_0402

12

R483 510/F_0402_NCR483 510/F_0402_NC

+5V_MOD

R482 470_NCR482 470_NC

Pin.47 Cable select H=Slave,L=Master

IDE_DD[0..15]<11>

IDE_DDREQ<11> IDE_DIOW#<11> IDE_DIOR#<11> IDE_DIORDY<11> IDE_DDACK#<11> IDE_IRQ<11> IDE_DA1<11> IDE_DA0<11> IDE_DCS1#<11> IDE_DA2<11> IDE_DCS3#<11>

6

CON5

R50056R500

56

1 2

IDE_DD7 IDE_DD6 IDE_DD5 IDE_DD4 IDE_DD3 IDE_DD2 IDE_DD1 IDE_DD0

IDE_DIOW# IDE_DIORDY IDE_DDACK#_R IDE_IRQ IDE_DA1 IDE_DA0 IDE_DCS1# IDE_LED#

12

R481

R481 470_0402

470_0402

1 2

IDE_DD[0..15] IDE_DDREQ

IDE_DIOW# IDE_DIOR# IDE_DIORDY IDE_DDACK# IDE_IRQ IDE_DA1 IDE_DA0 IDE_DCS1# IDE_DA2 IDE_DCS3#

CON5

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49

tyco_1909380-1

12

2 4 6

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50

515152

52

C296

C296 10U/10V/0805

10U/10V/0805

7

+5V_MOD+5V_MOD

IDE_DD8 IDE_DD9 IDE_DD10 IDE_DD11 IDE_DD12 IDE_DD13 IDE_DD14 IDE_DD15 IDE_DDREQ IDE_DIOR#

IDE_DA2 IDE_DCS3#

+5V_MOD

12

C295

C294

C294 1U/10V/0603

1U/10V/0603

C295 .1U/10V/0402

.1U/10V/0402

Place closed to MOD connector

IDE_DDACK#

12

R488 22_0402R488 22_0402

12

R484 100K_0402_NCR484 100K_0402_NC

12

C297

C297 1000P/50V/0402

1000P/50V/0402

8

12

C298

C298 .1U/10V/0402

.1U/10V/0402

+5V_MOD

SATA PWR

3

HDD_EN_5V

34

Q51A

Q51A 2N7002DW

2N7002DW

+5V_HDD+5V_ALW

4

12

C609

C609 10U/10V

10U/10V

12

C608

0.1U/25V

12

3

Q52

Q52 SI3456BDV

SI3456BDV

R478

R478 100K

100K

6 5 2 1

12

5

17

2

C C

+3.3V_ALW2 +3.3V_ALW2

17

PR194

100K_0402

12

R476

R476 100K_NC

100K_NC

+15V_ALW+5V_ALW2

17

61

HDDC_EN<29>

D D

2

Q51B

Q51B 2N7002DW

R514

R514 100K

100K

2N7002DW

12

1

+5V_HDD +5V_RUN

1 2

R485 0_0805_NCR485 0_0805_NC

R479

R479 100K

100K

SATA drive vendors will use only 5V supply from the system and will derive

3.3V on the drive. If drive power goals are not achieved, drive vendors will use both 5V and 3.3V supplies from the system. Initial power saving using 3.3V from system is less than 5%.

Power Estimate: SATA drive power consumption estimate at MobileMark is 1.1W. An additional 150mW can be saved using Intel's IMST driver.

4

ODD PWR

100K_0402_NC

MODC_EN<29>

5

PR195

12

17

R515

R515 100K_NC

100K_NC

+5V_ALW2

2

12

17

12

R490

R490 100K_NC

100K_NC

61

Q55B

Q55B 2N7002DW_NC

2N7002DW_NC

+15V_ALW

12

C618

C618 1U/16V_NC

1U/16V_NC

6

8 7 6 5

R494 100K_NCR494 100K_NC

12

17

5

+5V_MOD +5V_RUN

Q56

Q56 SI4800BDY_NC

SI4800BDY_NC

4

34

+5V_MOD+5V_ALW

3 2 1

Q55A

Q55A 2N7002DW_NC

2N7002DW_NC

12

Title

SATA (HDD&CD_ROM)

Size Document Number Rev

M-08 0.1

Date: Sheet

12

C613

C613 10U/10V_NC

10U/10V_NC

C612

0.1U/25V_NC

7

C610

0.01U/25V_NC

QUANTA

QUANTA COMPUTER

COMPUTER

1 2

R489 0_0805R489 0_0805

12

R517

R517 100K_NC

100K_NC

of

23 51Monday, March 05, 2007

of

23 51Monday, March 05, 2007

of

23 51Monday, March 05, 2007

8

1

+3.3V_RUN

R155 100KR155 100K R145 100KR145 100K

A A

MINI1CLK_REQ#_R<17>

29

MINI1CLK_REQ#_R

12

C649

C649 220P/50V/0402

220P/50V/0402

12 12

29

PCIE_MCARD1_DET# USB_MCARD1_DET#

PCIE_WAKE#<25,26,29> COEX2_WLAN_ACTIVE<37>

COEX1_BT_ACTIVE<37>

CLK_PCIE_MINI1#<17> CLK_PCIE_MINI1<17>

HOST_DEBUG_RX<28>

PCIE_MCARD1_DET#<13>

8051_TX<28>

PCIE_RX2-<12> PCIE_RX2+<12>

PCIE_TX2-<12> PCIE_TX2+<12>

PCI-Express TX and RX direct to connector

T101 PADT101 PAD

1 2

29

T100 PADT100 PAD T96 PADT96 PAD

PCIE_MCARD3_DET#

12

USB_MCARD3_DET#

12

COEX1_BT_ACTIVE_MINI<37>

PCIE_MCARD3_DET#<13>

CLK_PCIE_MINI2#<17> CLK_PCIE_MINI2<17>

Non-iAMT

JMINI Pin

B B

C C

DEBUG PINS

Debug Pin Name

16

HOST_DEBUG_TX

17

HOST_DEBUG_RX

19

8051_TX

42

8051_RX

+3.3V_WLAN +3.3V_RUN

R118 0_0805R118 0_0805

+3.3V_SUS

R100 100KR100 100K R104 100KR104 100K

COEX2_WLAN_ACTIVE<37>

MINI2CLK_REQ#_R<17>

COEX2_WLAN_ACTIVE

12

R88

R88 100K_NC

100K_NC

12

C157

C157 33P/50V_NC

33P/50V_NC

PCI-Express TX and RX direct to connector

MINI2CLK_REQ#_R

12

C880

C880 220P/50V/0402

D D

220P/50V/0402

1

29

EC Pin

70 71 82 81

PCIE_WAKE#<25,26,29>

2

R157 0R157 0

1 2

R158 0R158 0

1 2

MINI1CLK_REQ#_R

40

R275 0R275 0

1 2

R549 0R549 0

1 2

PCIE_MCARD1_DET#

RSV_ICH_CL_DATA1 RSV_ICH_CL_RST1#

+3.3V_WLAN

PCIE_RX3-<12> PCIE_RX3+<12>

PCIE_TX3-<12> PCIE_TX3+<12>

PCIE_MCARD3_DET#

2

3

MiniCard WLAN connector

J5

12

C482

0.1U/10V

1

WAKE#

3

RESERVED_1

5

RESERVED_2

7

CLKREQ#

9

GND1

11

REFCLK-

13

REFCLK+

15

GND2

17

UIM_C8

19

UIM_C4

21

GND4

23

PERn0

25

PERp0

27

GND6

29

GND7

31

PETn0

33

PETp0

35

GND9

37

RESERVED_3

39

RESERVED_4

41

RESERVED_5

43

RESERVED_6

45

RESERVED_7

47

RESERVED_8

49

RESERVED_9

51

RESERVED_10

MOLEX_67910-6700

12

C479

0.047U/10V

12

C486

0.1U/10V

UIM_RESET

W_DISABLE#

LED_WWAN#

LED_WLAN#

LED_WPAN#

12

C495

0.047U/10V

3.3V_1 GND0

1.5V_1

UIM_PWR

UIM_DATA

UIM_CLK UIM_VPP

GND3

PERST#

3.3VAUX1 GND5

1.5V_2

SMB_CLK

SMB_DATA

GND8

USB_D-

USB_D+

GND10

1.5V_3 GND11

3.3V_2

Place caps close to connector.

MiniCard WPAN connector

+3.3V_RUN

J3

1

3

WAKE#

3

RESERVED_1

5

RESERVED_2

7

CLKREQ#

9

GND1

11

REFCLK-

13

REFCLK+

15

GND2

17

UIM_C8

19

UIM_C4

21

GND4

23

PERn0

25

PERp0

27

GND6

29

GND7

31

PETn0

33

PETp0

35

GND9

37

RESERVED_3

39

RESERVED_4

41

RESERVED_5

43

RESERVED_6

45

RESERVED_7

47

RESERVED_8

49

RESERVED_9

51

RESERVED_10

MOLEX_67910-6700

R96 0R96 0

1 2

R95 0R95 0

1 2

MINI2CLK_REQ#_R

C481

4.7U/10V

1 2

+3.3V_WLAN+3.3V_WLAN

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

UIM_PWR

UIM_DATA

UIM_CLK

UIM_RESET

UIM_VPP

W_DISABLE#

3.3VAUX1

SMB_CLK

SMB_DATA

LED_WWAN#

LED_WLAN#

LED_WPAN#

PERST#

USB_D+

4

+1.5V_RUN

R551 0R551 0

12

+

C240

330U/6.3V/ESR25_NC

2

3.3V_1

4

GND0

6

1.5V_1

8 10 12 14 16

18

GND3

20 22 24 26

GND5

28

1.5V_2

30 32 34

GND8

36

USB_D-

38 40

GND10

42 44 46 48

1.5V_3

50

GND11

52

3.3V_2

4

40

R550 0R550 0

1 2

R380 0_0402R380 0_0402

1 2

R387 0_0402_NCR387 0_0402_NC

1 2

WLAN_SMBCLK WLAN_SMBDATA

USB_MCARD1_DET#

1 2

R520 0_0402_NCR520 0_0402_NC

40

+1.5V_RUN

12

C232

0.047U/10V

+1.5V_RUN

+3.3V_RUN

HOST_DEBUG_TX <28>

PLTRST1# <12,25,26>

WLAN_RADIO_OFF#

+3.3V_WLAN

USBP4_DUSBP4_D+ USB_MCARD3_DET#

R552 0R552 0

USBP4_DUSBP4_D+

SB_WLAN_PCIE_RST# <12>

T108PAD T108PAD T109PAD T109PAD

USB_MCARD1_DET# <13> 8051_RX <28> LED_WLAN_OUT# <37> LED_WPAN# <37>

12

C224

0.047U/10V

R98 0_0402R98 0_0402

1 2

R99 0_0402_NCR99 0_0402_NC

1 2

+3.3V_RUN

1 2

5

J8

J8 MOLEX_48099-6701

MOLEX_48099-6701

+3.3V_WLAN

12

C234

0.1U/10V_NC

J7

J7 MOLEX_48099-6701

MOLEX_48099-6701

PLTRST1# <12,25,26>

SB_MCARD3_PCIE_RST# <12>

ICH_SMBCLK <13,25,26>

ICH_SMBDATA <13,25,26>

LED_WPAN#

Change USBP7 to USBP4

1 2

DLW21SN900SQ2B_NC

1 2

5

AUX_EN_WOWL<28>

10/22 GG request

WPAN_RADIO_DIS_MINI# <13>

12

C164

C164 100P/50V_NC

100P/50V_NC

USB_MCARD3_DET# <13>

LED_WPAN# <37>

L32

R326 0R326 0

R325 0R325 0

16

34

6

22

RP51

RP51 4P2R-2.2K

4P2R-2.2K

WLAN_SMBCLK

WLAN_SMBDATA

Suport for WoW

WLAN_RADIO_OFF#RSV_ICH_CL_CLK1

12

R113

R113 100K_NC

100K_NC

61

2

Q12B

Q12B 2N7002DW_NC

2N7002DW_NC

Place caps close to connector.

ICH_USBP4- <12> ICH_USBP4+ <12>

Layout Note: R222 and R223 close to choke as possible to minimize stubs.

6

+1.5V_RUN

+3.3V_RUN

Title

Size Document Number Rev

Date: Sheet

12

C159

0.047U/10V

12

2

4

1

3

R111

R111 200K_NC

200K_NC

7

+3.3V_WLAN

R242 0_NCR242 0_NC

+3.3V_WLAN

R516 0_NCR516 0_NC

2 1

D12

D12 SDMK0340L-7-F

SDMK0340L-7-F

R152

R152 0_NC

0_NC

+PWR_SRC +3.3V_WLAN+3.3V_ALW+PWR_SRC

5

12

C150

0.047U/10V

Q75

2

2N7002W-7-F_NC

31

12

Q74

2

2N7002W-7-F_NC

31

12

Prevent backdrive when WoW is enabled.

12

R112

R112 100K_NC

100K_NC

WLAN_ENABLE

34

Q12A

2N7002DW_NC

+3.3V_RUN

12

C424

0.1U/10V_NC

WLAN_RADIO_DIS# <29>

R107

12

470K_0402_NC

8

ICH_SMBCLK <13,25,26>

ICH_SMBDATA <13,25,26>

Q10

Q10 SI3456DV_NC

SI3456DV_NC

6 5 2 1

3

C174

C174 4700P/50V/0603_NC

4700P/50V/0603_NC

12

41

12

C170

0.1U/10V

MINI-PCI

M-08 0.1

7

12

C171

0.047U/10V

QUANTA

QUANTA COMPUTER

COMPUTER

C158

0.1U/10V

12

C151

0.047U/10V

1 2

24 51Monday, March 05, 2007

8

4

C161

4.7U/10V

of

1

A A

2

3

4

5

6

7

8

+3.3V_RUN

R150 100KR150 100K R153 100KR153 100K

B B

PCI-Express TX and RX direct to connector

MINI3CLK_REQ#_R

12

29

C881

C881 220P/50V/0402

C C

220P/50V/0402

12 12

MINI3CLK_REQ#_R<17>

PCIE_MCARD2_DET# USB_MCARD2_DET#

PCIE_WAKE#<24,26,29>

CLK_PCIE_MINI3#<17> CLK_PCIE_MINI3<17>

PCIE_MCARD2_DET#<12>

T98 PADT98 PAD T99 PADT99 PAD

PCIE_RX1-<12> PCIE_RX1+<12>

PCIE_TX1-<12> PCIE_TX1+<12>

MINI3CLK_REQ#_R

PCIE_MCARD2_DET#

MiniCard WWAN connector

+3.3V_RUN

J4

1

WAKE#

3

RESERVED_1

5

RESERVED_2

7

CLKREQ#

9

GND1

11

REFCLK-

13

REFCLK+

15

GND2

17

UIM_C8

19

UIM_C4

21

GND4

23

PERn0

25

PERp0

27

GND6

29

GND7

31

PETn0

33

PETp0

35

GND9

37

RESERVED_3

39

RESERVED_4

41

RESERVED_5

43

RESERVED_6

45

RESERVED_7

47

RESERVED_8

49

RESERVED_9

51

RESERVED_10

MLX_67910-0002

UIM_RESET

W_DISABLE#

SMB_DATA

LED_WWAN#

LED_WLAN#

LED_WPAN#

3.3V_1 GND0

1.5V_1

UIM_PWR

UIM_DATA

UIM_CLK UIM_VPP

GND3

PERST#

3.3VAUX1 GND5

1.5V_2

SMB_CLK

GND8

USB_D-

USB_D+

GND10

1.5V_3

GND11

3.3V_2

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

+3.3V_RUN

+1.5V_RUN

UIM_PWR UIM_DATA UIM_CLK UIM_RESET UIM_VPP

ICH_USBP9_DICH_USBP9_D+ USB_MCARD2_DET#

C484

1 2

100P/50V_NC

R138 0_0402R138 0_0402

1 2

R141 0_0402_NCR141 0_0402_NC

1 2

+3.3V_RUN

J15

J15 MOLEX_48099-4000

MOLEX_48099-4000

Place C484 close to J4

PLTRST1# <12,24,26> WWAN_RADIO_DIS# <29>

SB_WWAN_PCIE_RST# <12>

ICH_SMBCLK <13,24,26>

ICH_SMBDATA <13,24,26>

USB_MCARD2_DET# <13>

T32PAD T32PAD

12

C211

0.047U/10V/0402

12

C230

C230 33P/50V/0402

33P/50V/0402

+1.5V_RUN

+3.3V_RUN

12

C226

0.047U/10V/0402

12

C221

C221 33P/50V/0402

33P/50V/0402

+3.3V_RUN

12

C227

C227 33P/50V/0402

33P/50V/0402

Place caps close to connector.

41

12

C222

0.1U/10V/0402_NC

12

C231

0.047U/10V/0402

12

+

C238

C238 330U/6.3V/ESR25

330U/6.3V/ESR25

27

12

+

C217

C217 330U/6.3V/ESR25

330U/6.3V/ESR25

10/4 EMI agree to change P/N

Place C383, C367 close to JSIM1

ESD1

JSIM1

UIM_PWR UIM_RESET UIM_VPP UIM_CLK

12

C383

C383 100P/50V_NC

100P/50V_NC

JSIM1

5

VCC

3

RST

1

CLK

SUY_254020MA006H555ZL

9/27 Change PN

GND

DATA

VPP

6 4 2

UIM_DATA

12

C367

C367 100P/50V_NC

100P/50V_NC

UIM_RESET UIM_CLK

C478

C478 33P/50V/0402

33P/50V/0402

1 2

C485

C485 33P/50V/0402

33P/50V/0402

1 2

Note: Place caps on UIMlines close to WWAN connector

ESD1

1

2

3

SRV05-4.TCT

C475

C475 33P/50V/0402

33P/50V/0402

1 2

UIM_PWR

C228

C228 1U/10V/0603

1U/10V/0603

1 2

ICH_USBP9_DICH_USBP9_D+

L26

1 2

R140 0_0402R140 0_0402

1 2

R139 0_0402R139 0_0402

1 2

34

DLW21SN900SQ2B_NC

ICH_USBP9- <12> ICH_USBP9+ <12>

Layout Note: R139 and R140 close to choke as possible to minimize stubs.

UIM_VPP

6

UIM_PWR

5

UIM_DATA

4

12

100P/50V_NC

C510

C498

C498 33P/50V/0402

33P/50V/0402

1 2

Update FP

Place as close as possible to WWAN connector

D D

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

1

2

3

4

5

6

Date: Sheet

COMPUTER

WWAN

VC-08B 0.1

7

of

25 51Monday, March 05, 2007

of

25 51Monday, March 05, 2007

of

25 51Monday, March 05, 2007

8

1

2

3

4

5

6

7

8

EXPRESS+MDC

CON3

1

A A

B B

ICH_USBP6-<12>

ICH_USBP6+<12>

ICH_SMBCLK<13,24,25> ICH_SMBDATA<13,24,25>

+1.5V_CARD

PCIE_WAKE#<24,25,29>

+3.3V_CARDAUX

+3.3V_CARD

CARD_CLK_REQ#<17>

EXPRCRD_PWREN#<29> CLK_PCIE_EXPCARD#<17> CLK_PCIE_EXPCARD<17>

PCIE_RX4-<12> PCIE_RX4+<12>

PCIE_TX4-<12> PCIE_TX4+<12>

ICH_USBP6ICH_USBP6+ CPUSB#

CARD_RESET#

GND0

2

USB-

3

USB+

4

CPUSB#

5

RSV0

6

RSV1

7

SMBCLK

8

SMBDATA

9

+1.5VCARD0

10

+1.5VCARD1

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3VCARD0

15

+3.3VCARD1

16

CLKREQ#

17

CPPE#

18

REFCLF-

19

REFCLK+

20

GND1

21

GND2

22

PERn0

23

PERp0

24

GND3

25

PETn0

26

PETp0

27

GND4

Fox_QT100406-5101-9F

IAC_SDATAOUT

IAC_SDATAIN

IAC_PESET#

IAC_BITCLK

MDC I/F

Express card I/F

RSV2 RSV3

+3.3VMDC

GND5 GND6

IAC_SYNC

GND7 GND8

GND9

28 29 30 31 32 33 34 35 36 37 38 39 40

Update PN

+3.3V_SUS

ICH_AZ_MDC_RST1#

ICH_AZ_MDC_SDOUT <11>

ICH_AZ_MDC_SYNC <11>

ICH_AZ_MDC_SDIN1 <11>

ICH_AZ_MDC_BITCLK <11>

+1.5V_RUN +3.3V_RUN +3.3V_SUS

+3.3V_SUS

EXPRCRD_STDBY#<29>

PLTRST1#<12,24,25>

12

C604

0.1U/10V

+1.5V_CARD Max. 650mA, Average 500mA. +3V_CARD Max. 1300mA, Average 1000mA.

U33

17

R477 100KR477 100K

R475 0_NCR475 0_NC

1 2

12

C605

0.1U/10V

AUXIN

2

3.3VIN_0

3.3VIN_143.3VOUT_1

12

1.5VIN_0

14

1.5VIN_1

12

ExpressSwitch

20

SHDN#

1

STBY#

6

SYSRST#

16

NC

7

GND0

+3.3V_SUS +3.3V_CARDAUX+3.3V_RUN+1.5V_RUN +3.3V_CARD +1.5V_CARD

12

C607

0.1U/10V

AUXOUT

3.3VOUT_0

1.5VOUT_0

1.5VOUT_1

PERST#

CPPE#

CPUSB#

RCLKEN

R5538D001-TR-F

+3.3V_CARDAUX +3.3V_CARD +1.5V_CARD

15 3 5 11 13

CARD_RESET#

8

EXPRCRD_PWREN#

10

CPUSB#

9 19

OC#

18

12

C606

0.1U/10V

R480 100KR480 100K R474 100KR474 100K

12

C603

0.1U/10V

12 12

+3.3V_SUS

12

C602

0.1U/10V

Please the cap near pin 12 & 14(1.5VIN).

R184 0R184 0

1 2

Q23

Q23 BSS138_NL_NC

R188

R188 10K_NC

10K_NC

1 2

3

BSS138_NL_NC

1

2

R185

R185 100K_NC

100K_NC

1 2

3

ICH_AZ_MDC_RST1#

4

C C

D D

1

ICH_AZ_MDC_RST#<11>

MDC_RST_DIS#<34>

NOTE : MDC DISABLE If platform requires MDC disable,populate this circuit. If MDC disable isn't required, connect ICH_AZ_MDC_RST# directly to JMDC connector.

+5V_SUS

2

Please the cap near pin 2 & 4 (3.3VIN).

5

Please the cap near pin 17 (AUXIN).

6

Please the cap near pin 15 (AUXOUT).

Title

Size Document Number Rev

Date: Sheet

Please the cap near pin 3 & 5 (3.3VOUT).

QUANTA

QUANTA COMPUTER

COMPUTER

ExpressCard/SmartCard

M-08 0.1

7

Please the cap near pin 11 & 13(1.5VOUT).

of

26 51Monday, March 05, 2007

of

26 51Monday, March 05, 2007

of

26 51Monday, March 05, 2007

8

A

1 1

B

C

D

E

USB_OCP 0/1

USB_SIDE_EN#<29>

+5V_ALW

12

C12

C12 .1U/10V/0402

.1U/10V/0402

1 2

FS1

FS1 455/5A_NC

455/5A_NC

1 2

12

C17

C17 10U/10V_NC

10U/10V_NC

U26

2

IN

3

EN1#

4

EN2#

TPS2062DR

GND

OUT1

OC1#

OUT2

OC2#

1

7 8

6 5

12

C344

C344 .1U/25V/0603

.1U/25V/0603

USB_SIDE_PWR

USB_OC0_1# <12>

ICH_USBP1-<12> ICH_USBP1+<12>

ICH_USBP0+<12> ICH_USBP0-<12>

PJP1PJP1

Each channel is 1A

2 2

USB_OCP 2/3

+5V_ALW

USB_BACK_EN#<29>

12

3 3

ESD Protect

4 4

PJP13PJP13

1 2

FS2

FS2 455/5A_NC

455/5A_NC

1 2

12

C341

C343

C343 .1U/10V/0402

.1U/10V/0402

C341 10U/10V_NC

10U/10V_NC

Place ESD diodes as close as USB connector.

ICH_USB_P1ICH_USB_P1+

Place ESD diodes as close as USB connector.

ICH_USB_P3ICH_USB_P3+

U25

2

IN

3

EN1#

4

EN2#

TPS2062DR

Each channel is 1A

U3

ICH_USB_P0-

6

I/O1I/O

2

VP5VN

ICH_USB_P0+

4

I/O3I/O

SRV05-4U3SRV05-4

U1

ICH_USB_P2-

6

I/O1I/O

2

VP5VN

ICH_USB_P2+

4

I/O3I/O

SRV05-4U1SRV05-4

GND

OUT1

OC1#

OUT2

OC2#

1

7 8

6 5

USB_SIDE_PWR

USB_BACK_PWR

12

C345

C345 .1U/25V/0603

.1U/25V/0603

USB_BACK_PWR

USB_OC2_3# <12>

ICH_USBP3-<12> ICH_USBP3+<12>

ICH_USBP2+<12> ICH_USBP2-<12>

L6

1 2

R9 0R9 0

1 2

R8 0R8 0

1 2

L8

1 2

R14 0R14 0

1 2

R15 0R15 0

1 2

L1

1 2

R1 0R1 0

1 2

R3 0R3 0

1 2

L2

1 2

R4 0R4 0

1 2

R2 0R2 0

1 2

34

DLW21SN900SQ2B_NC

ICH_USB_P1ICH_USB_P1+

ICH_USB_P0+ ICH_USB_P0-

ICH_USB_P3ICH_USB_P3+

ICH_USB_P2+ ICH_USB_P2-

USB_SIDE_PWR

USB_BACK_PWR

12

+

C32

C32 150U/6.3V/ESR45

150U/6.3V/ESR45

12

+

C352

C352 150U_NC

150U_NC

12

+

C1

C1 150U/6.3V/ESR45

150U/6.3V/ESR45

12

+

C338

C338 150U_NC

150U_NC

USB_BACK2_EN#<29>

USB_OC8#<12>

ICH_USBP8+<12> ICH_USBP8-<12>

12

C31

C31 .1U/10V/0402

.1U/10V/0402

12

C349

C349 .1U/10V/0402

.1U/10V/0402

12

C339

C339 .1U/10V/0402

.1U/10V/0402

12

C340

C340 .1U/10V/0402

.1U/10V/0402

USB_BACK2_EN# USB_OC8#

ICH_USBP8+ ICH_USBP8-

ICH_USB_P1ICH_USB_P1+

ICH_USB_P0ICH_USB_P0+

ICH_USB_P3ICH_USB_P3+

ICH_USB_P2ICH_USB_P2+

+5V_ALW

USB8 for back port

JUSB3

JUSB3 UB1112C-TB212-7F

UB1112C-TB212-7F

1

A_VCC

2

A_DATA-

3

A_DATA+ A_GND4SHIELD1

5

B_VCC

6

B_DATA-

7

B_DATA+

8

B_GND

Right Side

JUSB1

JUSB1 UB1112C-TB213-7F

UB1112C-TB213-7F

1

A_VCC

2

A_DATA-

3

A_DATA+ A_GND4SHIELD1

5

B_VCC

6

B_DATA-

7

B_DATA+

8

B_GND

Rear Side

Gilligan Only

JUSB2

8 7 6 5 4 3 2 1

MLX_ 53398-0871

9 10

SHIELD2

11

SHIELD3

12

SHIELD4

9 10

SHIELD2

11

SHIELD3

12

SHIELD4

53398-0819-8P-R

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

A

B

C

D

Date: Sheet

COMPUTER

USB & Flash

FM1 0.1

E

of

27 51Monday, March 05, 2007

1

+3.3V_ALW +3.3V_ALW

R126 100KR126 100K

1 2

R417 100K_NCR417 100K_NC

1 2

2.7K/F

2.7K/F 100K

100K

2.7K/F

2.7K/F 100K_NC

100K_NC

0

RP32

RP32 8P4R-4.7K

8P4R-4.7K

5 6

7 8

CLK_KBD DAT_KBD CLK_DOCK DAT_DOCK

SUS_ON

12

DDR_ON

12

RUN_ON

12

AUX_EN_WOWL

12

ATI_Intel

12

R358

R358 R379

R379 R355

R355 R343

R343 R5070R507

A A

+5V_RUN

1 2

3 4

10

B B

+3.3V_ALW

12

C437

C437 10U/6.3V

10U/6.3V

12

C421

0.1U/10V

12

C145

0.1U/10V

BC_DAT BC_A_DAT

LCD_CBL_DET_L<33>

21 21

+3.3V_ALW

12

R371

R371 100K_0402_NC

100K_0402_NC

12

C470

0.1U/10V_NC

CLK_PCI_5025

12

C426

C426 3P/50V

3P/50V

12

C469

0.1U/10V

Place these caps close to MEC5025.

Net & Part

3.3V_M_PWRGD ICH_RSMRST#

C C

M_ON SIO_SLP_M#

1.05V_1.25V_M_PWRGD R238

LOM_SUPER_IDDQ

LOM_LOW_PWR#

LOM_CABLE_DETECT

AMT Intel

Pin15 of 5025 Pin23 of 5025 Pin24 of 5025 Pin25 of 5025 Pin37 of 5025 Pin24 of 5025

NC

32KHz Clock.

MEC5025_XTAL2

R3640R364

D D

1 2

12

0

C467

C467 22P/50V

22P/50V

W2

MEC5025_XTAL1

14 23

32.768KHZ

1

2

R390 10K_NCR390 10K_NC R370 100KR370 100K

1 2

R322 100KR322 100K

1 2

R321 100KR321 100K

1 2

NoniAMT

SIO_S4_STATE#

ALW_PWRGD_3V_5V

R33333R333 33

Place close to pin 58.

12

C434

0.1U/10V

Non-AMT Broadcom

NC NC NC NC NC NC

Refer to UMA ref pg 32.

12

C436

C436 22P/50V

22P/50V

2

3

SIO_SPI_CS#

12

TP_DET# INVERTER_CBL_DET#

LCD_CBL_DET_L LCD_CBL_DETLCD_CBL_DET

AUX_LCD_CBL_DET#

R83 100KR83 100K

1 2

R82 200KR82 200K

CKG_SMBDAT<17> CKG_SMBCLK<17>

46

AUD_AMP_MUTE#<32>

1.8V_SUS_PWRGD<42>

EC_CPU_PROCHOT#<3>

T106 PADT106 PAD

ICH_CL_PWROK<6,13>

T86 PADT86 PAD

ICH_RSMRST#<13>

T87 PADT87 PAD T93 PADT93 PAD

DDR_ON<42>

TP_DET#<31>

ALW_PWRGD_3V_5V<44>

SIO_SLP_S3#<13>

13

SIO_SLP_S5#<13>

3.3V_RUN_ON<39>

SUS_ON<38,39> RUN_ON<18,38,39>

NoniAMT

10

+3.3V_ALW

External Work Around Circuit.

ALWON

T78 PADT78 PAD

BC_A_INT#<31> BC_A_DAT<31> BC_A_CLK<31>

SIO_A20GATE<11>

SNIFFER_GREEN#<33>

CLK_TP_SIO<31> DAT_TP_SIO<31>

CLK_PCI_5025<17> LPC_LFRAME#<11>

LPC_LAD0<11> LPC_LAD1<11> LPC_LAD2<11> LPC_LAD3<11>

IRQ_SERIRQ<13,20>

ICH_EC_SPI_CLK<12>

ICH_EC_SPI_DIN<12>

ICH_EC_SPI_DO<12>

EC_FLASH_SPI_CLK<30> EC_FLASH_SPI_DIN<30> EC_FLASH_SPI_DO<30>

SIO_PWRBTN#<13>

SNIFFER_YELLOW#<33>

BC_CLK<29>

BC_DAT<29>

BC_INT#<29>

R347 10KR347 10K

1 2

C474 4.7U/10VC474 4.7U/10V

1 2

D28

D28 CH501H_NC

CH501H_NC

21

1 2

AC_OFF<41>

8051_RX<24> 8051_TX<24>

PLTRST#<6,12>

CLKRUN#<13,20,35>

L23

L23 BLM11A121S

BLM11A121S L34

L34 BLM11A121S

BLM11A121S

L33

L33 BLM11A121S

BLM11A121S

12

R308

R308 10K_NC

10K_NC

R386 10KR386 10K

ATI_Intel

R538 0_NCR538 0_NC

1 2

EC_CPU_PROCHOT#

ICH_RSMRST# RSV_M_ON RSV_SIO_SLP_M# DDR_ON

ALW_PWRGD_3V_5V

SUS_ON RUN_ON

RSV_1.05V_1.25V_M_PWRGD

SNIFFER_GREEN#

CLK_KBD DAT_KBD CLK_DOCK DAT_DOCK 8051_RX 8051_TX

CLK_PCI_5025

SNIFFER_YELLOW#

MEC5025_XTAL1 MEC5025_XTAL2 MEC5025_XOSEL

VR_CAP

12

MEC_AGND

12

MEC_VCC_PLL

12

C427

0.1U/10V

+3.3V_ALW

12

R309

R303

10K_NC

100K_NC

13

Q33

2

MMBT3906_NL_NC

3

AUX_ON

R295 100K_NCR295 100K_NC

1 2

4

11

39

DOCK_SMB_ALERT#

12

USIO2

MEC5025 EC-08

12

KSO17/GPIOA1/AB1H_DATA

13

KSO16/GPIOA0/AB1H_CLK

14

GPIO5/KSO15

15

GPIO4/KSO14

16

KSO13/GPIO18

17

KSO12/OUT8

18

KSO11/GPIOC7

19

KSO10/GPIOC6

20

KSO9/GPIOC5

23

KSO8/GPIOC4

24

KSO7/GPIO3

25

KSO6/GPIO2

27

KSO5/GPIO1

28

KSO4/GPIO0

29

KSO3/GPIOC3

30

KSO2/GPIOC2

31

KSO1/GPIOC1

32

KSO0/GPIOC0

33

KSI7/GPIO19

34

KSI6/GPIO17

35

KSI5/GPIO10

36

KSI4/GPIO9

37

KSI3/GPIO8

38

KSI2/GPIO7/BC_A_INT#

39

KSI1/GPIO6/BC_A_DAT

40

KSI0/SGPIO30/BC_A_CLK

92

SGPIO34/A20M

50

OUT5/KBRST

75

GPIO94/IMCLK

76

GPIO95/IMDAT

77

KCLK

78

KDAT

79

GPIOA6/EMCLK

80

GPIOA7/EMDAT

81

GPIO20/PS2CLK/8051RX

82

GPIO21/PS2DAT/8051TX

57

LRESET#

58

PCICLK

59

LFRAME#

60

LAD0

PCI POWER/LPC BUS

61 62 63 64 56

102 105 107

103 106 108

109 110

87 86 85

122 124 123

22 125 104

101

For MEC5025 Rev.C: C685=22uF and populate workaround circuit. For MEC5025 Rev.D: C685=4.7uF and depopulate workaround circuit.

C423

4.7U/6.3V_NC

12

2

PCI POWER/LPC BUS

LAD1

(9)

LAD2 LAD3 CLKRUN# SER_IRQ

HSTCLK HSTDATAIN HSTDATAOUT

FLCLK FLDATAIN FLDATAOUT

GPIO80 GPIO81

BC_CLK BC_DAT BC_INT#

XTAL1 XTAL2 XOSEL

VR_CAP AGND VCC_PLL

VSS_PLL

R294 0_NCR294 0_NC

1 2

31

Q31

Q31 2N7002W-7-F_NC

2N7002W-7-F_NC

4

MEC5025 EC-08 128 PIN VTQFP

128 PIN VTQFP

KEYBOARD/MOUSE

KEYBOARD/MOUSE (26)

(26)

(10)

HOST/8051 SPI

HOST/8051 SPI (8)

(8)

BC

BC (3)

(3)

CLOCK

CLOCK (3)

(3)

VR_CAP

POWER PLANES

POWER PLANES (6)

(6)

POWER SWITCH

POWER SWITCH (6)

(6)

ACCESS BUS

ACCESS BUS (4)

(4)

MISCELLANEOUS

MISCELLANEOUS (8)

(8)

POWER PLANES

POWER PLANES (9)

(9)

MLX_53398-0571_NC

5

POWER_ SW_IN2#/GPIO23 POWER_ SW_IN1#/GPIO22

POWER_ SW_IN0#

BGPO0/GPIOA5

AB1B_CLK/GPIOA4

AB1B_DATA/GPIOA2

GPIO11/AB2_DATA

GPIO12/AB2_CLK

GPIO13/AB1G_DATA

GPIO14/AB1G_CLK

GPIO87/AB1C_DATA

GPIO86/AB1C_CLK

GPIO85/AB1D_DATA

GPIO84/AB1D_CLK

GPIO93/AB1F_DATA

GPIO92/AB1F_CLK

GPIO91/AB1E_DATA

GPIO90/AB1E_CLK

GPIO82/FAN_TACH3 GPIO16/FAN_TACH2 GPIO15/FAN_TACH1

GPIO

GPIO (36)

(36)

SGPIO45/MSDATA/SPDOUT2

SYSOPT0/SGPIO32/LPC_TX SYSOPT1/SGPIO33/LPC_RX

OUT11/PWM1 OUT10/PWM0

nEC_SCI/SPDIN2

SGPIO44/MSCLK/SPCLK2

SGPIO46/SPDIN1

SGPIO47/SPDOUT1

SGPIO31/TIN1/SPCLK1

SGPIO36 (SFPI_EN)

GPIO96/TOUT1

GPIOA3/WINDMON

GPIO83/32KHZ_OUT

nRESET_OUT/OUT6

MEC5025

LQFP128-16X16-4-JM6

LQFP128-16X16-4-JM6 Rev 0.01 (11/09/05)

Rev 0.01 (11/09/05)

+3.3V_ALW

JDEBUG1

5 4 3 2 1

5

Place cap close to pin

121.

MEC5025_VCC0

121

VCC0

21

VCC1

44

VCC1

65

VCC1

83

VCC1

116

VCC1

ALWON

120

ALWON

119

INSTANT_ON_SW#

126

MAIN_PWR_SW#

127 128

ACAV_IN

AB1A_CLK

AB1A_DATA

OUT2/PWM3 OUT9/PWM2

SGPIO40 SGPIO41 SGPIO42 SGPIO43

SGPIO35 SGPIO37

OUT7/nSMI

nPWR_LED

nBAT_LED

nFWP

PWRGD

TEST_PIN

VSS VSS VSS VSS VSS

1 2

R316 0_NCR316 0_NC

1 2

Not Stuff 0 ohm when doing Flash recovery.

SNIFFER_RTC_GPO

118

LCD_SMBCLK

8

LCD_SMBDAT

7

DOCK_SMBCLK

6

DOCK_SMBDAT

5 93

94

AMT_SMBDAT

95

AMT_SMBCLK

96

PBAT_SMBDAT

111

PBAT_SMBCLK

112

SBAT_DH_SMBDAT

9

SBAT_DH_SMBCLK

10 97 98

THRM_SMBDAT

99

THRM_SMBCLK

100 43

R348

42

2.2K_NC

41

R338 0R338 0

48

1 2

AUX_EN_WOWL

47

3.3V_SUS_ON

46 45

SIO_EXT_SCI#

66

PS_ID

55 54

BEEP

69

1.25V_GFX_PCIE_ON

68

DEBUG_ENABLE#

67 70

71

R317 1MR317 1M

LCD_CBL_DET

91

INVERTER_CBL_DET#

90

AUX_LCD_CBL_DET#

89

SIO_SPI_CS#

4

R369 100KR369 100K

1

SFPI_EN

2

DOCK_SMB_ALERT#

3 52 11

115 114

FWP#

84

0.9V_DDR_VTT_PWRGD

73 117 49 53

MEC_TEST_PIN

72

113 88 74 51 26

Debug Serial Port Flash Recovery Port.

R801MR80

R315

1M

10K

1 2

DEBUG_ENABLE#

6

+3.3V_ALW

1 2

R81

R81 10K

10K

1 2

8051_RX 8051_TX

6

+RTC_CELL

R345 0R345 0

12

C432

0.1U/10V

ALWON <44> SNIFFER_PWR_SW# <33>

ACAV_IN <18,34,40>

T18

PAD

12

1 2

R337 0_NCR337 0_NC

11

Populate

12

for flash corruption

R3180R318 0

issue.

7

+RTC_CELL

12

POWER_ SW_IN0#<31,34>

LCD_SMBCLK <18> LCD_SMBDAT <18>

INSTANT_POWER_SW#<31>

1.8V_RUN_ON <39> LCDVCC_TST_EN <18>

PBAT_SMBDAT <40,41> PBAT_SMBCLK <40,41>

1.5V_RUN_ON <43>

1.25V_RUN_ON <42> THRM_SMBDAT <34> THRM_SMBCLK <34>

IMVP_PWRGD <13,38,45>

+3.3V_RUN

FAN1_TACH <34> IMVP_VR_ON <45>

AUX_EN_WOWL <24>

3.3V_SUS_ON <39>

BREATH_LED# <37> SIO_EXT_SCI# <13>

PS_ID <41> SIO_RCIN# <11> BEEP <32>

HOST_DEBUG_TX <24> HOST_DEBUG_RX <24>

+3.3V_ALW

INVERTER_CBL_DET# <33> AUX_LCD_CBL_DET# <33> SIO_SPI_CS# <12>

+3.3V_ALW

LOM_SMB_ALERT# <13>

0.9V_DDR_VTT_ON <42>

SIO_EXT_SMI# <13>

BAT2_LED# <37> BAT1_LED# <37>

PAD

T120

EC_32KHZ <29> RUNPWROK <18,29,38,45> RESET_OUT# <38>

T77

PAD

+3.3V_ALW

2

4

RP36

4P2R-4.7K

1

THRM_SMBCLK THRM_SMBDAT

Title

Size Document Number Rev

Date: Sheet

3

DELL CONFIDENTIAL/PROPRIETARY

Ultra I/O Controller MEC5025

M-08 0.1

7

R156

R156 10K_0402

10K_0402

R147

R147 10K_0402

10K_0402

DOCK_SMBCLK

DOCK_SMBDAT

LCD_SMBCLK

LCD_SMBDAT

PBAT_SMBDAT

PBAT_SMBCLK

SBAT_DH_SMBDAT

SBAT_DH_SMBCLK

1 = Enabled. 0 = Disabled

Flash Recovery.

Low = Write Protected.

Flash Write Protect bottom 4K of internal bootblock flash.

12

R143

R143 100K_0402

100K_0402

12

C237

C237 1U/10V/0603

1U/10V/0603

+RTC_CELL

12

R144

R144 100K_0402

100K_0402

INSTANT_ON_SW#

12

C236

C236 1U/10V/0603

1U/10V/0603

R374 8.2K_NCR374 8.2K_NC

R393 8.2K_NCR393 8.2K_NC

R329 2.2KR329 2.2K

R339 2.2KR339 2.2K

R384 2.2KR384 2.2K

R372 2.2KR372 2.2K

SFPI_EN

FWP#

8

MAIN_PWR_SW#

+5V_ALW

12

+3.3V_ALW

R3738.2K R3738.2K

12

R3858.2K R3858.2K

12

+3.3V_ALW

12

R376

R376 1K_NC

1K_NC

12

R3781KR378 1K

+3.3V_ALW

12

R319

R319 100K

100K

12

R320

R320 100K_NC

100K_NC

of

28 51Monday, March 05, 2007

8

A

B

C

D

E

Update to 5021

Depopulate R529, R530, R531, R532, R533, R534, R535, R536, R92, R97, C142, C133, C137, C141, C179, C165, C172, L21 Populate R537, C879.

USIO1

RP15

PCIE_WAKE#

8P4R-10K

EOL

RP14

8P4R-10K

1 2

1 2 1 2

1 2

R65

R65 10K

10K

1 2

R68

10K_0402_NC

1 2

Board Revision 0 1 011 1 0

12

SYS_PME#

34 56 78

SBAT_PRES#

12

PWRUSB_OC#

34 56

DBAY_MODPRES#

78

12

IMVP6_PROCHOT# DOCK_SMB_PME#

12

+3.3V_ALW

R66

R66 10K_0402

10K_0402

1 2

R67

R67 10K_NC

10K_NC

1 2

SST (X00) Pre-PT (X01) PT (X02) ST (X03) QT (A00)

PLATFORM_BID MODPRES#

DOCKED PANEL_BKEN

BID0 BID1 CHIPSET_ID1 VGA_IDENTIFY

PBAT_PRES#<41>

SYS_PME#<20,35>

PCIE_WAKE#<24,25,26>

USB_BACK_EN#<27>

USB_SIDE_EN#<27>

USB_BACK2_EN#<27>

NB_MUTE#<32>

11

ADAPT_OC<40>

ADAPT_TRIP_SEL<40>

ITP_DBRESET#<3,13>

PS_ID_DISABLE#<41>

PANEL_BKEN<18>

M_LED_BK#<37>

39

ATF_INT#<34>

LOM_LOW_PWR#<35>

50

5V_3V_1.8V_1.25V_RUN_PWRGD<38>

LED_MASK#<11,37>

PLATFORM_BID<23>

SIO_EXT_WAKE#<13>

ICH_PME#<12>

ICH_PCIE_WAKE#<13>

WLAN_RADIO_DIS#<24>

WIRELESS_ON/OFF#<33>

BT_RADIO_DIS_DC#<37>

EXPRCRD_PWREN#<26>

EXPRCRD_STDBY#<26>

IMVP6_PROCHOT#<45>

LCD_TST<18>

WWAN_RADIO_DIS#<25>

BC_INT#<28>

BC_DAT<28> BC_CLK<28>

RUNPWROK<18,28,38,45>

EC_32KHz<28>

T51 PADT51 PAD

50

T31PAD T31PAD

SBAT_PRES#

CHG_PBATT CHG_SBATT PBAT_DSCHG

SYS_PME# PCIE_WAKE#

PWRUSB_OC#

HP_NB_SENSE DOCK_HP_MUTE# SPDIF_SHDN

DOCK_SMB_PME# DOCKED

QBUFEN# DOCK_PWR_EN

ITP_DBRESET#

PANEL_BKEN

SW_LED SUB_SHDN_ON_BATT TOUCH_PAD_LED# LOW_LIGHT CAM_IMG_CAPTURE MIC_SWITCH LID_CL_PRES#

BID0 BID1 CHIPSET_ID1 VGA_IDENTIFY

Rsvd_LOM_IDDQ Rsvd_LOM_TPM_EN#

SC_DET#

PLATFORM_BID

IMVP6_PROCHOT#

LOM_CABLE_DETECT

R569

RUNPWROK_R

12

0_NC

IRMODE

1 1

2 2

3 3

+3.3V_ALW

R487 100KR487 100K

+3.3V_ALW

R76

R76 10K

10K

1 2

R77

R77 10K_0402_NC

10K_0402_NC

1 2

VGA BID2 BID1 BID0

0

1 1

0 0 0

1

0

1 100 1 RAMP-2 (A01)

R116 100KR116 100K

R349 100KR349 100K R359 100KR359 100K

+3.3V_RUN +5V_ALW

R69

R69 10K_0402_NC

10K_0402_NC

1 2

R70

R70 10K

10K

1 2

0 0

1 0

R120 100K_0402R120 100K_0402

R548 10KR548 10K

Reset BID

RUNPWROK_R

Update P/N

R5680R568 0

1 2

57

97 98

99 100 101 102 103 104

65

66

82

81

80

79

78

77

76

75

67

68

69

70

71

73

74

1 2 3 4

5 84 83

6

118 117 116 115 112 111 110 109

88 89 90 91 92 93 94 95

24 25 26 27 32 33

105 106

107

58 59 60

7 35 96 46

USIO1

GPIOA[0] GPIOA[1] GPIOA[2] GPIOA[3] GPIOA[4] GPIOA[5] GPIOA[6] GPIOA[7]

GPIOB[0] GPIOB[1] GPIOB[2] GPIOB[3] GPIOB[4] GPIOB[5] GPIOB[6] GPIOB[7]

GPIOC[0] GPIOC[1] GPIOC[2] GPIOC[3] GPIOC[4] GPIOC[5] GPIOC[6] GPIOC[7]

GPIOD[0] GPIOE[0]

GPIOE[1] GPIOE[2] GPIOE[3] GPIOE[4] GPIOE[5] GPIOE[6] GPIOE[7]

GPIOF[0] GPIOF[1] GPIOF[2] GPIOF[3] GPIOF[4] GPIOF[5] GPIOF[6] GPIOF[7]

GPIOG[0] GPIOG[1] GPIOG[2] GPIOG[3] GPIOG[4] GPIOG[5] GPIOG[6] GPIOG[7]

GPIOH[0] GPIOH[1] GPIOH[4] GPIOH[5] GPIOH[6] GPIOH[7]

OUT65 GPIOH[2]

GPIOH[3] BC_INT#

BC_DAT BC_CLK

PWRGD TEST_PIN 32KHz_IN NC

ECE5021-NU

ECE5021

ECE5021 128 Pin

128 Pin VTQFP

VTQFP

GPIOs

SIO Reset

BC

MISCELLANEOUS

USB

VDDA18PLL(CAP)/GPIOI[5] VDDA33PLL(CAP)/GPIOI[6]

CIRCC

POWER

VSS

GPIOD[3]/VBUS_DET

GPIOD[4]/OCS1_N GPIOD[5]/OCS2_N GPIOD[6]/OCS3_N GPIOD[7]/OCS4_N

VCC1_6/GPIOI[1]

VDD18(CAP)/GPIOI[2]

XTAL2/GPIOI[3]

XTAL1/CLKIN/GPIOI[4]

ATEST(VCC1)/GPIOI[7]

RBIAS/GPIOIJ[0]

VSS_25/GPIOIJ[1] USBDP0/GPIOIJ[2] USBDN0/GPIOIJ[3]

VSS_0/GPIOIJ[4] USBDN1/GPIOIJ[5] USBDP1/GPIOIJ[6]

VDDA33_1/GPIOIJ[7]

USBDP2/GPIOIK[0]

USBDN2/GPIOIK[1] USBDN3/GPIOIK[2]

USBDP3/GPIOIK[3]

VDDA33_2/GPIOIK[4]

USBDP4/GPIOIK[5]

USBDN4/GPIOIK[6]

VSS_2/GPIOK[7]

GPIOD[1]/CIRTX

GPIOD[2]/CIRRX

CIRTX

CIRRX

VDDA33_0/VCC1_0

VCC1_0/VCC1_1

VCC1_1/VCC1_2

VCC1_2/VCC1_3

VCC1_3/VCC1_4

VCC1_4/VCC1_5

VCC1_5/VCC1_6

CAP_LDO

VSS_1 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24

63

MODPRES#

28

DBAY_MODPRES#

29 30 31

R539 0_NCR539 0_NC

119

1 2

R529 0_NCR529 0_NC

120

1 2

ECE5011_CTAL2

122

ECE5011_CTAL1

123

R530 0_NCR530 0_NC

124

1 2

R531 0_NCR531 0_NC

125

1 2

R97 10K_0402_NCR97 10K_0402_NC

126

1 2

R92 12K/F_0402_NCR92 12K/F_0402_NC

127

R532 0_NCR532 0_NC

128 9 10

R533 0_NCR533 0_NC

11 12 13

R534 0_NCR534 0_NC

14

15 16 18 19

R535 0_NCR535 0_NC

20 21 22

R536 0_NCR536 0_NC

23

61 62 113 114

8

R537 0R537 0

34 42 43 57 85 108

86 17

36 37 38 39 40 41 44 45 47 48 49 50 51 52 53 54 55 56 64 72 87 121

1 2

LID_CL_SIO#

VDDA33

1 2

12

C439

C439 .1U/10V/0402

.1U/10V/0402

12

C435

4.7U/10V/0805

17

HDDC_EN <23> MODC_EN <23>

VDD18

VDDA18PLL VDDA33

T110 PADT110 PAD T111 PADT111 PAD

T112 PADT112 PAD T113 PADT113 PAD

VDDA33

T114 PADT114 PAD T115 PADT115 PAD T116 PADT116 PAD T117 PADT117 PAD

VDDA33

T118 PADT118 PAD T119 PADT119 PAD

1.05V_RUN_ON <43> CIRRX <31>

C879 .1U/10V/0402C879 .1U/10V/0402

12

C143

C143 .1U/10V/0402

.1U/10V/0402

+3.3V_ALW

R78 1K_0402R78 1K_0402

1 2

+3.3V_ALW

Route R167 to USIO2 very short

Place C879 close to USIO2.8

12

C209

C209 .1U/10V/0402

.1U/10V/0402

LID_CL_SIO# LID_CL#

C210

C210 .1U/10V/0402

.1U/10V/0402

+3.3V_ALW

VDDA33

12

C179

.1U/10V/0402_NC

+3.3V_ALW

C213

C213 .1U/10V/0402

.1U/10V/0402

1 2

VDD18 VDDA18PLL

12

R129

R129 100K_0402

100K_0402

12

C218

0.047U/10V

ECE5011_CTAL1

ECE5011_CTAL2

12

C137

4.7U/10V/0805_NC

R130 10R130 10

1 2

12

C165

.1U/10V/0402_NC

R85

R85 1M_NC

1M_NC

12

C172

.1U/10V/0402_NC

12

C141

C141 .1U_NC

.1U_NC

LID_CL# <31>

C147 33P_NCC147 33P_NC

Y3

Y3 24MHz_NC

24MHz_NC

C140 33P_NCC140 33P_NC

L21

1 2

BLM11A20_NC

C182

C182 10U/10V/0805

10U/10V/0805

1 2

12

C142

.1U/10V/0402_NC

+3.3V_ALW

C133

4.7U/10V/0805_NC

1 2

4 4

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

A

B

C

D

Date: Sheet

COMPUTER

SIO (GPIO/BC/USB/CIRR)

FM1 0.1

E

of

29 51Monday, March 05, 2007

A

B

C

D

E

RTC BATTERY16Mbit (2M Byte), SPI

+RTC_CELL

C42

C42 1U/25V

1U/25V

1 2

TH3

H-E354X354D126p2-4

4 2

1

35

10/4 EMI request change to NPTH 11/28 EMI request change back to PTH

TH9

H-TC315BC236D102p2-4

+3.3V_RTC_LDO

D2 SDMK0340L-7-FD2 SDMK0340L-7-F

21

D1 SDMK0340L-7-FD1 SDMK0340L-7-F

+RTC_1 +RTC

21

R20 1KR20 1K

TH20

H-C276D98p2-4

35

4 2

H-TC315BC236D102p2-4

1

H-TC315BC236D102p2-4

12

C50

2.2U/6.3V

RTC_BAT_DET#<11>

1 2

1

TH10

U6

3

OUT

4

5/3# GND2SHDN

H-C276D98p2-4

4 2

1

IN

MAX1615_NC

RTC_BAT_DET#

SATA BTB Conn. Nut -- Only for GilliganGfx

TH19

35

H-TC315BC236D102p2-4

+PWR_SRC

1

12

C43

5

1

TH14

C43 1U/25V

1U/25V

J2

1 2 3

MOLEX_53261-0371

TH18

TH18 H-C276D126p2-4

H-C276D126p2-4

35

4 2

1

RTC-BATTERY_NCRTC-BATTERY_NC

1

H-TC315BC236D102p2-4

TH15

H-C276D126p2-4

4 2

TH21

35

55

12

+3.3V_SUS

C896

C896 22P/50V_NC

22P/50V_NC

1

12

R105

R105 10K

10K

U14

1

CE#

6

SCK

5

SI

2

SO

3

WP#

SST25VF016B

2M : AKE28FP0K0722P : CH02206JB08

TH22

H-E354X354D126p2-4

35

4 2

TH12

H-TC354BE354X354D126p2-4

35

4 2

TH16

H-TC236BE354X354D126p2-3

12

8

VDD

7

HOLD#

4

VSS

1

10/18 EMI request

1

R125

R125 10K

10K

H-E276X315D126p2-4

4 2

H-TC354BE354X354D126p2-4

4 2

H-TC217BC256D126p2-4

12

TH11

35

C201

0.1U/10V

TH5

35

TH13

1

CPU

1

Layout Note: Place R471 within 500 mils from SPI flash. Place R498 & R534 within 500 mils of the MEC5025.

4 4

SPI_CS0#<12> EC_FLASH_SPI_CLK<28> EC_FLASH_SPI_DO<28> EC_FLASH_SPI_DIN<28>

R127 15R127 15

1 2

R128 15R128 15

1 2

R101 15R101 15

1 2

Non-iAMT

TH1

H-E354X354D126p2-4

1

3 3

1

H-E354X354D126p2-4

35

4 2

TH17

H-TC354BE354X354D126p2-4

35

4 2

TH2

H-TC217BC236D126p2-4

1

TH4

H-TC256BE354X354D126P2-4

35

4 2

TH23

H-TC354BE354X354D126p2-4

35

4 2

TH6

H-TC354BE354X354D126p2-4

4 2

C635

.1U/10V/0402_NC

C40

.1U/25V/0603_NC

GND

1

B

3

C636

.1U/10V/0402_NC

+5V_ALW +5V_ALW

+PWR_SRC

C370

.1U/25V/0603_NC

+3.3V_RUN

PV6

PV8

PAD79x130

PV6

PAD79x130

GND

1

35

4 2

+3.3V_RUN

C637

.1U/10V/0402_NC

+PWR_SRC +PWR_SRC

C58

.1U/25V/0603_NC

+3.3V_RUN

PV1

PAD79x130

GND

1

GND

1

+PWR_SRC +PWR_SRC

C638

.1U/25V/0603_NC

+5V_ALW

.1U/25V/0603_NC

+3.3V_RUN +3.3V_RUN

PV5

PAD79x130

+5V_ALW

+PWR_SRC +1.05V_VCCP

C396

PV10

PAD79x130

GND

1

GND

1

C

35

2 2

+PWR_SRC

+DC_IN_SS +DC_IN_SS

1 1

PV12

PAD195X130

C631

.1U/25V/0603_NC

C356

.1U/25V/0603_NC

PV13

PAD195X130

GND

1

4 2

+PWR_SRC +3.3V_RUN

C632

.1U/25V/0603_NC

+5V_ALW +5V_ALW

+PWR_SRC

+DC_IN_SS

GND

1

.1U/25V/0603_NC

C358

PV14

PAD195X130

GND

1

A

+PWR_SRC

+DC_IN_SS

PV16

PAD195X130

+PWR_SRC +3.3V_RUN

C634

.1U/10V/0402_NC

+3.3V_RUN+PWR_SRC

C52

.1U/25V/0603_NC

PV15

PAD195X130

GND

1

4 2

.1U/25V/0603_NC

.1U/10V/0402_NC

+5V_ALW+DC_IN_SS

GND

1

35

C630

+5V_ALW +5V_ALW

+3.3V_RUN

C353

+5V_ALW +5V_ALW

PV9

PAD79x130

GND

1

C633

.1U/10V/0402_NC

C49

.1U/10V/0402_NC

PV7

PAD79x130

GND

1

+3.3V_RUN +3.3V_RUN

+PWR_SRC

PV2

PAD79x130

4 2

C639

.1U/25V/0603_NC

C391

.1U/25V/0603_NC

PV11

PAD79x130

35

+1.25V_RUN

+5V_ALW

+3.3V_RUN

GND

1

C642

.1U/10V/0402_NC

C420

.1U/10V/0402_NC

PV3

PAD79x130

GND

1

4 2

+PWR_SRC

.1U/25V/0603_NC

+1.5V_RUN

+1.05V_VCCP

.1U/10V/0402_NC

+3.3V_RUN

PV19

PAD195X130

GND

1

C388

C410

35

PV17

PAD195X130

GND

1

D

TH24

TH24 h-R36X107DR16X87PB

h-R36X107DR16X87PB

1

TH25

TH25 h-R36X107DR16X87PB

h-R36X107DR16X87PB

1

PV18

PAD195X130

GND

1

35

4 2

DSUB

TH8

TH8 h-tc217bc256d126p2-4

h-tc217bc256d126p2-4

1

35

4 2

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

COMPUTER

FLASH, RTC & KC

M-08 0.1

35

4 2

TH7

TH7 h-tc217bc256d126p2-4

h-tc217bc256d126p2-4

1

4 2

E

35

of

30 51Monday, March 05, 2007

1

A A

B B

2

+3.3V_ALW

1

3

RP33

RP33 4P2R-4.7K

4P2R-4.7K

2

4

DAT_TP_SIO<28> CLK_TP_SIO<28>

C247

C247 10P/50V/0402

10P/50V/0402

1 2

3

C248

C248 10P/50V/0402

10P/50V/0402

1 2

L28 BLM11A601SL28 BLM11A601S

1 2

L29 BLM11A601SL29 BLM11A601S

C245

C245 10P/50V/0402

10P/50V/0402

1 2

4

TP

POWER_ SW_IN0#<28,34>

INSTANT_POWER_SW#<28>

C244

C244 10P/50V/0402

10P/50V/0402

1 2

5

6

7

8

44

+5V_ALW

+3.3V_ALW

JTP1

TP_DET#<28>

M_LED_BK<37>

BC_A_DAT<28> BC_A_CLK<28>

BC_A_INT#<28>

LID_CL#<29>

M_LED_BK POWER_ SW_IN0# INSTANT_POWER_SW#

JTP1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

FOX_HS6115E-M

(Code : 4-1-1)

C C

CIR

+3.3V_ALW

JCIR1

4

3

2

1

MLX_53398-0471

D D

1

2

3

4

12

C335

0.1U/10V/0402

5

CIRRX <29>

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

6

Date: Sheet

COMPUTER

TOUCH PAD, BULE TOOTH & FIR

M-08 0.1

7

of

31 51Monday, March 05, 2007

of

31 51Monday, March 05, 2007

of

31 51Monday, March 05, 2007

8

1

Package 1206 for THD+N performance for Vista Logo requirements.

AUD_HP_OUT_L AUD_HP_OUT_R

A A

For MAX9789A,depop R505,pop R506.

AUDIO_AVDD_ON AUD_AMP_MUTE#

B B

NB_MUTE#<29>

10/18 Change 2.2u if necessary

R5050R505 0

1 2

+5V_SPK_AMP

AUD_SPK_ENABLE#

AUD_EAPD#

2

Q25

Q25 2N7002W-7-F

2N7002W-7-F

2

Q24

Q24 2N7002W-7-F

2N7002W-7-F

C306 .033U/25V/X7R/1206C306 .033U/25V/X7R/1206 C307 .033U/25V/X7R/1206C307 .033U/25V/X7R/1206

C326 1uF/25V/X7R/1206C326 1uF/25V/X7R/1206 C329 1uF/25V/X7R/1206C329 1uF/25V/X7R/1206

+5V_SPK_AMP

12

R506

R506 100K_NC

100K_NC

R208

R209

100K

1 2

31

1 2 1 2

12 12

31

NB_MUTE# AUD_HP_NB_SENSE

+5V_SPK_AMP

2

12

C330

C330 47P/50V_NC

47P/50V_NC

12

R496

R496 100K_NC

100K_NC

R197

R197 100K

100K

1 2

12

C625

0.1U/10V

12

C327

C327 47P/50V_NC

47P/50V_NC

+5V_SPK_AMP

U34

U34 NC7SZ08P5X_NL

NC7SZ08P5X_NL

2 1

3 5

12

R499

R499 100K

100K

AUD_AMP_GAIN1 AUD_AMP_GAIN2

R199

R199 100K_NC

100K_NC

1 2

3

12

C312

C312 47P/50V_NC

47P/50V_NC

12

C311

C311 47P/50V_NC

47P/50V_NC

AUD_AMP_MUTE#<28>

C334 1U/10VC334 1U/10V

1 2

32

12

10/18 De-pop if not necessary

AUD_HP_NB_SENSE_R

4

R545 0R545 0

C328

C328 1U/10V

1U/10V

C318

C318 10U/10V

10U/10V

CODEC_GPIO_PIN_4

1 2

+5V_SPK_AMP

2 1

3 5

GAIN1 GAIN2 GAIN

0 0 6dB 0 1 10dB 1 0 15.6dB

SPKR_LIN+

LIN-AUD_LINE_OUT_L

SPKR_RIN+

RIN-AUD_LINE_OUT_R HP_OUT_L

HP_OUT_R

AUD_SPK_ENABLE# AMP_HP_EN AUD_AMP_MUTE# AUD_AMP_GAIN1 AUD_AMP_GAIN2

C616 1U/16VC616 1U/16V

1 2

12

U36

U36 NC7SZ08P5X_NL_NC

NC7SZ08P5X_NL_NC

AMP_HP_EN

4

5

INTERNAL SPEAKER AMP

U23

3

SPKR_INL

2

SPKR_INR

27

HP_INL

26

HP_INR

24

BIAS

23

SPKR_EN#

22

HP_EN

25

MUTE#

31

GAIN1

32

GAIN2

17

HPVDD

9

CPVDD

10

C1P

12

C1N

11

CPGND

14

PVSS

13

C324

C324 1U/16V

1U/16V

CPVSS

TPA6040A4

REGEN

For MAX9789A,depop C614,pop R497.

TPA6040A4

TPA6040A4 QFN 32PIN

QFN 32PIN

REG_EN

AUDIO_AVDD_ON

12

R504

R504 0_NC

0_NC

12

C619

0.033U/16V

SET

C614

0.033U/16V

1 2

OUTL+ OUTL-

OUTR+

OUTR-

REGEN

PVDD_8

PVDD_18

GND_28

PGND_5

PGND_21

C1425/C331 value need to match with C326/C290. This value be chosen in PT phase.

For MAX9789A,depop C619,pop R504.

R498

2.2K_NC

R497

R497 0_NC

0_NC

1 2

AUD_SPK_L1

6

AUD_SPK_L2

7

AUD_SPK_R1

20

AUD_SPK_R2

19 16

HPL

15

HPR

REGEN

4

SET

1

SET

29

VOUT

VDD

30

VDD

8 18

28 5 21

AUDIO_AVDD_ON <34>

12

+VDDA

6

Update PN

AUD_HP_JACK_L <33> AUD_HP_JACK_R <33>

SPKR_LINSPKR_RIN-

+VDDA

+5V_SPK_AMP +5V_SPK_AMP

+5V_SPK_AMP +5V_RUN

100P/50V_NC

12

C315

C310

10U/10V

1U/10V

FB_60ohm+-25%_100MHz _3A_0.05ohm DC

R560

AUD_SPK_L1 AUD_SPK_L2 AUD_SPK_R1 AUD_SPK_R2

C620

L35 FB_600ohm+-25%_100MHz _200mA_0.6ohm DC

VDD

12

C316

C316 1U/10V

1U/10V

L30

L30 BLM21PG600SN1D

BLM21PG600SN1D

Layout Note: Place close to pin 8.

SPEAKER_DET#<11>

12

R561

0_0603

C621

100P/50V_NC

1 2

12

C615

C615 1U/10V

1U/10V

12

1 2

R501 0_0805R501 0_0805 R207 0_0603R207 0_0603 R189 0_0603R189 0_0603 R198 0_0603R198 0_0603 R202 0_0603R202 0_0603

7

52

12

R562

0_0603

C622

100P/50V_NC

1 2

+5V_SPK_AMP

12

C319

0.1U/10V

Layout Note: Place close U22.

+5V_SPK_AMP

12

12 12 12 12

0_0603

100P/50V_NC

1 2

C332

C332 1U/10V

1U/10V

12

8

SPEAKER_DET#

12

R563

0_0603

C623

1 2

+VDDA

12

C617

C617 1U/10V

1U/10V

Layout Note: Place close U22.

Layout Note: Place close to pin 18.

12

C333

C331

0.1U/10V

10U/10V

EMI Request

JSPK1

1

2

3

4

5

12

5

6

MLX_ 53398-0671

12

C323

C323 1U/10V

1U/10V

1 1 21.6dB

+VDDA+VDDA

R493

ICH_AZ_CODEC_BITCLK

R193

R193 47_NC

47_NC

Close to pin 6.

1 2

C C

C305

0.1U/10V_NC

1 2

ICH_AZ_CODEC_SDOUT

R195

R195 47_NC

47_NC

Close to pin 5.

1 2

C308

0.1U/10V_NC

1 2

AUD_DMIC_CLK

D D

C647

4.7P/50V_NC

1 2

AUD_DMIC_IN0

C648

4.7P/50V_NC

1 2

49

1

ICH_AZ_CODEC_BITCLK<11>

ICH_AZ_CODEC_SDIN0<11>

ICH_AZ_CODEC_SDOUT<11>

ICH_AZ_CODEC_SYNC<11>

ICH_AZ_CODEC_RST#<11>

AUD_DMIC_CLK<33> AUD_DMIC_IN0<33>

AUD_DMIC_CLK AUD_DMIC_IN0

R192 33R192 33

ICH_AZ_CODEC_SDOUT

R555 0R555 0

R5560R556

For tuning.

+3.3V_RUN

12

C317

10U/10V_NC

C325

4.7U/10V_NC

1 2

12

C301

0.1U/10V

AUD_SPDIF_OUT<19>

C321

0.1U/10V_NC

1 2

12

C313

C313 1U/10V

1U/10V

1 2

12

C643

C643 1000P/50V

1000P/50V

R2030R203 0

+3.3V_RUN

37

+VDDA

Depop R203 & pop C321 & C325 for AD1984.

12

C302

0.1U/16V

12

C303

C303 1U/10V

1U/10V

12

C322

C322 10U/10V_NC

10U/10V_NC

2

0

CODEC_GPIO_PIN_4

R204 0R204 0

R253

R253 100K

100K

1 2

12

C309

0.1U/10V

12

49

12 12

12

SDIN

AUD_EAPD# SPDIF_OUT

3

AZALIA (HD) CODEC

U22

6 8

5 10 11

46

2

4

47 48

43 44 45

1

9 40

3 25

38

7 26

42

10/18 Check package

HDA_BITCLK HDA_SDI_CODEC HDA_SDO HDA_SYNC HDA_RST#

DMIC_CLK DMIC0/VOL_UP/GPIO1 DMIC1/VOL_DN/GPIO2

SPDIF_IN/EAPD#/GPIO0 SPDIF_OUT

NC_43 NC_44 NC_45

DVDD_CORE_1 DVDD_CORE_9 DVDD_CORE_40 DVDD_IO

AVDD_25 AVDD_38

DVSS AVSS_26

AVSS_42

STAC9205

STAC9205 LQFP 48PIN

LQFP 48PIN

GPIO4/VREFOUT_E

GPIO3/VREFOUT_F

4

R201

R201 100K

SENSE_A SENSE_B

PORT_A_L

PORT_A_R

VREFOUT_A

PORT_B_L

PORT_B_R

VREFOUT_B

PORT_C_L PORT_C_R

VREFOUT_C

PORT_D_L PORT_D_R

PORT_E_L

PORT_E_R

PORT_F_L

PORT_F_R

CD_L

CD_GND

CD_R

PC_BEEP

MONO_OUT

VREFFILT

CAP2

STAC9205

13 34

39 41 37

21 22 28

23 24 29

35 36

14 15 31

16 17 30

18 19 20

12 32

27 33

AUD_SENSE_AICH_AZ_CODEC_BITCLK AUD_SENSE_B

AUD_HP_OUT_L AUD_HP_OUT_R

AUD_MIC_IN_L AUD_MIC_IN_R

AUD_LINE_OUT_L AUD_LINE_OUT_R

DOCK_HP_MUTE#

AUD_SPDIF_SHDN

AUD_PC_BEEP

AC97VREFI CAP2

12

C314

C314 10U/10V

10U/10V

100K

1 2

AUD_EXT_MIC_L <33> AUD_EXT_MIC_R <33>

AUD_VREFOUT_B <33>

+VDDA

12

R196

10K

+VDDA

12

C304

C304 10U/10V

10U/10V

12

1 2 12

C304 must be 1U & Pop C320 & R200 for AD1984.

5

R194

R194 10K

10K

10_NC

10_NC R200

R200

C320

0.1U/10V_NC

Layout Note: Close to U22 Pin 13.

AUD_HP_NB_SENSE<33>

C299

0.1U/10V

6

AUD_SENSE_A

12

R492

R491

39.2K/F

AUD_HP_NB_SENSE

BEEP2AUD_PC_BEEP BEEP1

12

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet

2

Q53

Q53 2N7002W-7-F

2N7002W-7-F

R187

R187 20K

20K

1 2

12

R190

R190 10K

10K

Azelia CODEC(STAC9205))

M-08 0.1

7

R492 20K/F

20K/F

31

4

2

Q54

Q54 2N7002W-7-F

2N7002W-7-F

+VDDA

1 2

12

C611

C611 1000P/50V

1000P/50V

AUD_MIC_SWITCH <33>

Close to U22

C300

0.1U/16V

12

53

1 2

U21

U21 74LVC1G86GW

74LVC1G86GW

32 51Monday, March 05, 2007

R493

5.1K/F

8

BEEP <28> SPKR <13>

of

1

2

3

4

5

6

7

8

Digital Microphone & Camera

R34 0_0603_NCR34 0_0603_NC

+5V_RUN

A A

CCD_VDD_ON<13>

B B

1 2

C C

12

C385

C385 1U/10V/0603

1U/10V/0603

AUD_DMIC_CLK_R

C650

0.1U/10V_NC

AUD_DMIC_IN0

C651

0.1U/10V_NC

ICH_USBP5-<12>

ICH_USBP5+<12>

12

R557

C403

100K

1U/10V/0603

2

49

Q27

Q27 SI2301BDS

SI2301BDS

1

2

3

47K

1

DLW21SN900SQ2B_NC

12

3

R284

R284 10K_0402

10K_0402

Q26

Q26 DTC144EUA

DTC144EUA

L10

1 2

R27 0R27 0

1 2

R26 0R26 0

1 2

48

34

+5V_CCD

12

C393

C393 10U/10V/0805

10U/10V/0805

+3.3V_RUN

Place close to Camera connector.

AUX_LCD_CBL_DET#<28>

AUD_DMIC_IN0<32>

INVERTER_CBL_DET#<28>

LCD_CBL_DET_L<28>

ICH_USB_P5ICH_USB_P5+

Place close to Camera connector.

L9

L9 BLM11A05

BLM11A05

+5V_CCD +3V_DMIC ICH_USB_P5+ ICH_USB_P5AUD_DMIC_CLK_R AUD_DMIC_IN0

+3V_DMIC

12

C48

C48 10U/10V/0805

10U/10V/0805

JCAMERA1

1 2 3 4 5 6 7 8 9 10 11 12

MLX_53398-1271

(Code : 4-1-2)

+3.3V_RUN +3.3V_RUN

12

R502

R502 100K

100K

AUD_HP_NB_SENSE<32>

AUD_HP_JACK_R<32> AUD_EXT_MIC_R <32> AUD_HP_JACK_L<32>

C56

C54

C54 .01U/25V/0402

.01U/25V/0402

+3.3V_RUN

C51

C51 10U/10V/0805

10U/10V/0805

C56 .1U/10V/0402

.1U/10V/0402

C45

C45 .1U/10V/0402

.1U/10V/0402

53

R564 0_0603R564 0_0603

SNIFFER G_R

R566 0_0603R566 0_0603

SNIFFER Y_R

+5V_RUN

C55

C55 .1U/10V/0402

.1U/10V/0402

C44

C44 .1U/10V/0402

.1U/10V/0402

Update PN

STEREO MIC LINE IN

12 12

HEADPHONE LINE OUT

C379

C379 150U/6.3V/ESR45

150U/6.3V/ESR45

JAUDIO1

1

11

2

12

3

13

4

14

5

15

6

16

7

17

8

18

9

19

10

20

FOX_HT1310F

SNIFFER2 SNIFFER1

R565 0_0603R565 0_0603 R567 0_0603R567 0_0603

53

10/19 Update FP

WIRELESS_ON/OFF#<29>

SNIFFER_PWR_SW#<28>

12

R503

R503 100K

100K

12 12

To Sniffer

AUD_MIC_SWITCH <32>

AUD_EXT_MIC_L <32> AUD_VREFOUT_B <32>

HT1310X-20P-RUV

+3.3V_RUN

12

R509

R509 100K

100K R508 10KR508 10K

12

C624

C624 1U/10V

1U/10V

+RTC_CELL

12

R335

R335 100K

100K R334 10KR334 10K

12

C431

C431 1U/10V

1U/10V

12

SNIFFER1

SNIFFER2

PAID

JCAMERA1

PIN9 GND

INVERTER_CBL_DET#

Inverter Camera

PIN15

SGPIO41

PIN20

LCD_CBL_DET_L

D D

JCAMERA1

Inverter LVDS

(Code : 4-1-4)

PIN1

PIN11

(Code : 4-1-3)

Sniffer LED

R2060R206

1 2

0

+3.3V_RUN

5

U24

1

OE#

AUD_DMIC_CLK<32>

AUD_DMIC_CLK AUD_DMIC_CLK_R

12

R205

R205 10K_NC

10K_NC

VCC

2

OUT4IN

3

GND

SN74LVC1G125DBVR_NC

+3.3V_SUS +3.3V_SUS

13

Q58

Q58 DDTA114YUA-7-F

DDTA114YUA-7-F

47K

2

10K

SNIFFER Y_R SNIFFER G_R

10

13

Q57

Q57 DDTA114YUA-7-F

DDTA114YUA-7-F

47K

2

10K

SNIFFER_GREEN# <28>SNIFFER_YELLOW# <28>

PIN10 PIN17

DELL CONFIDENTIAL/PROPRIETARY

SGPIO40

PIN7

1

PIN3

2

+5V_ALW

3

4

5

6

DELL CONFIDENTIAL/PROPRIETARY

Title

AUDIO CONN

Size Document Number Rev

M-08 0.1

Date: Sheet

7

of

33 51Monday, March 05, 2007

8

1

+3.3V_RUN

R163

R163 10K

10K

1 2

R1620R162

12

C255

C255 22U/10V

22U/10V

R420

49.9/F

R445 2.2KR445 2.2K

1 2

R444 2.2KR444 2.2K

1 2

1

0

1 2

FAN1_VOUT

FAN1_VOUT_FB

+3VSUS_THRM

A A

D13

D13 CHN202UPT_NC

CHN202UPT_NC

3

2

1

12

C553

C553 2200P/50V

2200P/50V

REM_DIODE5_P

Put C553 close to Guardian. Put C573 close to Diode

B B

C C

D D

Place under DIMM ( BOT )

+3.3V_SUS

+1.05V_VCCP

1 2

C569 needs to be placed near Guardian IC.

H_THERMTRIP#<3>

C570 needs to be placed near Guardian IC.

THERMTRIP_MCH#<6>

FAN1_TACH <28>

JFAN1

1 2 3

MLX_53398-0371

13

Q38

2

MMST3904

12

C551

0.1U/10V

+3.3V_SUS

THERM_B1

2

+3.3V_SUS

THERM_B2

2

10/18 Check POP or Non-pop

12

R437

8.2K

THERMATRIP1#

Q37

Q37 MMST3904

MMST3904

1 3

12

R438

8.2K

THERMATRIP2#

Q36

Q36 MMST3904

MMST3904

1 3

2

12

C573

C573 2200P/50V_NC

2200P/50V_NC

+RTC_CELL

12

C571

0.1U/10V

12

2

C569

0.1U/10V

C570

0.1U/10V

3

REM_DIODE1_N

12

C545

C545 2200P/50V

2200P/50V

REM_DIODE1_P

Put C545 close to Guardian. Put C194 close to Diode

Place under CPU

Put C546 close to Guardian.

H_THERMDA<3>

C546

C546 470P/50V

470P/50V

1 2

H_THERMDC<3>

SUSPWROK<38> ICH_PWRGD#<38>

+3.3V_SUS

C568 needs to be placed near Guardian IC.

R429 10K_NCR429 10K_NC R431 10K_NCR431 10K_NC

MDC_RST_DIS#<26> SIO_GFX_PWR<18>

AUDIO_AVDD_ON<32>

+3.3V_RUN

47

THERMATRIP_VGA#<18>

+3.3V_SUS

R418 332K/FR418 332K/F

1 2

12

C535

0.1U_10V

12

3

THERM_VEST

R419

R419 118K/F

118K/F

13

2

12

R441

8.2K

12

C544

C544 2200P_50V

2200P_50V

4

Q14

Q14 MMST3904

MMST3904

THRM_SMBDAT<28> THRM_SMBCLK<28>

R436 1KR436 1K R433 1KR433 1K

R434 1KR434 1K

12 12

12

C194

C194 2200P/50V_NC

2200P/50V_NC

+RTC_CELL 1 2

1 2

+3.3V_SUS

12

R442

8.2K

12

R443

2.2K

THERM_B3

8.2K

Q35

Q35 MMST3904

MMST3904

2

1 3

Note: VSET = (Tp-70)/21, where Tp = 70 to 101 degrees C. Tp set at 88 degrees C. Guardian temp tolerance = +-3 degrees C.

4

REM_DIODE1_P REM_DIODE1_N

H_THERMDA H_THERMDC

+3VSUS_THRM

THERM_PWRGO +3V_PWROK#

THERMATRIP1# THERMATRIP2# THERMATRIP3#

THERM_VEST

FAN1_VOUT

T104 PADT104 PAD

5V_CAL_SIO1#

5V_CAL_SIO2#

THERMATRIP3#

1/2

5

REM_DIODE3_N

12

C543

C543 2200P/50V

2200P/50V

REM_DIODE3_P

Put C543 close to Guardian. Put C256 close to Diode

2

Place under DIMM ( TOP )

U31

11

SMDATA

12

SMBCLK

EMC 4001

DP1

QFN PIN48

DN1 DP2

DN2

3V_SUS RTC_PWR3V VSUS_PWRGD

3V_PWROK#

THERMTRIP1# THERMTRIP2# THERMTRIP3#

VSET XEN VSS

FAN_OUT_1 FAN_OUT_2

FAN_DAC1 GPIO1

GPIO2 GPIO3 GPIO4 GPIO5 GPIO6/FAN_DAC2

EMC4001

LDO_SHDN#/ADDR

Placement should be near the WWAN minicard connector just under the inserted minicard.

VCP2

+3.3V_RUN

12

C567

0.1U/10V

12

C561

0.1U/10V

5

12

38 37

41 40

35 21 23

16

17 18 19

42 26 34

7

8 39 10

13 14 15 22 36

C568

0.1U/10V

13

Q17

Q17 MMST3904

MMST3904

VCP1 VCP2

ATF_INT#

POWER_SW#

ACAVAIL_CLR

THERMTRIP_SIO

SYS_SHDN#

LDO_POK LDO_SET LDO_OUT

LDO_OUT

LDO_IN LDO_IN

VDD_3V

VDD_5V_1 VDD_5V_2

Thermistor P/N:

R323

TH11-3H103FT

2.2K/F

2.2K/F R312 10K/F_0603R312 10K/F_0603

1 2

0603 package.

C540

1 2

2200P/50V

12

C562

C562 10U/10V

10U/10V

12

C556

C556 10U/10V

10U/10V

6

12

C256

C256 2200P/50V_NC

2200P/50V_NC

43

VCP2

46

REM_DIODE3_P

45

DP3

REM_DIODE3_N

44

DN3

REM_DIODE4_PREM_DIODE5_N

48

DP4

REM_DIODE4_N

47

DN4

REM_DIODE5_P

2

DP5

REM_DIODE5_N

1

DN5

20 3 4 25 24

LDO_SHDN#_ADDR

27 33

THERM_LDO_SET

28 32

31 30

29

9 5

6

Layout Note: Place those capacitors close to EMC4001.

+2.5V_RUN+5V_RUN

THERM_LDO_IN

31

12

C558

0.1U/10V_NC

+2.5V_RUN

+3.3V_RUN

+5V_RUN

+3.3V_SUS+5V_SUS

1 2

2

Q32

Q32 2N7002W-7-F

2N7002W-7-F

6

R432 7.5K/FR432 7.5K/F

20

R298

R298 10K

10K

5V_CAL_SIO1#

12

C554

C554 10U/4V_NC

10U/4V_NC

7

REM_DIODE4_N

12

C542

C542 2200P/50V

2200P/50V

REM_DIODE4_P

Put C542 close to Guardian. Put C441 close to Diode

13

Q34

2

MMST3904

12

C441

C441 2200P/50V_NC

2200P/50V_NC

Place under Minicard ( BOT )

PWR_MON <45>

+3.3V_SUS+RTC_CELL +3.3V_ALW

R435

R435 10K_NC

10K_NC

1 2

12

Title

Size Document Number Rev

Date: Sheet

R440

R439

10K

1 2

+3.3V_SUS

2.5V_RUN_PWRGD <38>

Voltage margining circuit for LDO output.For Vmargin stuff R592 and R113=30K. R113=1K for production.

DELL CONFIDENTIAL/PROPRIETARY

FAN & THERMAL

M-08 0.1

THERM_LDO_IN

12

C566

0.1U/10V

7

ATF_INT# <29>

POWER_ SW_IN0# <28,31> ACAV_IN <18,28,40>

THERMTRIP_SIO

THERM_STP# <44>

THERM_LDO_SET

R428 0/1210R428 0/1210

1 2

12

C565

C565 1U/10V

1U/10V

0603 package.

This Value of R428 can be 0.27 or 0 ohm and the package is 1210.

8

+2.5V_RUN

12

+3.3V_RUN

of

34 51Monday, March 05, 2007

8

R427

31.6K/F_NC

R4301KR430 1K

A

+3.3V_LAN +1.8V_LOM

38

38 38

38

1 1

C646

1000P/50V/0402

C35

4.7U/10V/0805

C36

4.7U/10V/0805

12

C18

C18 47P/50V/0402

47P/50V/0402

Refer to M07_LOM4401_X06 schematic.

2 2

3 3

CLK_PCI_LOM<17>

R1733R17

Place R17, C33 close to U62.118

4 4

33

12

C33

C33 6P/50V

6P/50V

Refer to M07_LOM4401_X06 schematic. R489 and R490 removed from schematic because of Bios can configure the state of CLKRUN# signal.

A

12

C39

.1U/10V/0402

CLKRUN#<13,20,28>

12

C30

C30 47P/50V/0402

47P/50V/0402

12

C28

.1U/10V/0402

PCI_AD[31..0]<12,20>

PCI_C_BE3#<12,20> PCI_C_BE2#<12,20> PCI_C_BE1#<12,20> PCI_C_BE0#<12,20>

PCI_FRAME#<12,20>

PCI_IRDY#<12,20> PCI_TRDY#<12,20>

PCI_DEVSEL#<12,20>

PCI_STOP#<12,20> PCI_PERR#<12,20> PCI_SERR#<12,20>

PCI_PAR<12,20>

PCI_PIRQB#<12>

PCI_RST#<12,20>

PCI_GNT0#<12> PCI_REQ0#<12>

SYS_PME#<20,29>

PCI_AD16

1 2

R19 100_0402R19 100_0402

B

C38

1000P/50V/0402

Close to power pins

0.1U*13 pcs

PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0

PCI_IDSEL

Y1

25MHzY125MHz

12

C19

C19 27P/50V/0402

27P/50V/0402

B

12

C14

.1U/10V/0402

XOXI

12

.1U/10V/0402

122 123 124 126 127 128

116 117

118 119 121 113

12

R10

R10 800_0402

800_0402

12

C20

C20 27P/50V/0402

27P/50V/0402

C15

U5

PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26

1

PCI_AD25

3

PCI_AD24

6

PCI_AD23

8

PCI_AD22

9

PCI_AD21

10

PCI_AD20

11

PCI_AD19

14

PCI_AD18

15

PCI_AD17

16

PCI_AD16

33

PCI_AD15

34

PCI_AD14

36

PCI_AD13

37

PCI_AD12

38

PCI_AD11

39

PCI_AD10

41

PCI_AD9

42

PCI_AD8

45

PCI_AD7

48

PCI_AD6

49

PCI_AD5

50

PCI_AD4

51

PCI_AD3

53

PCI_AD2

54

PCI_AD1

55

PCI_AD0

4

PCI_CBE_L3

18

PCI_CBE_L2

32

PCI_CBE_L1

43

PCI_CBE_L0

20

PCI_FRAME_L

21

PCI_IRDY_L

23

PCI_TRDY_L

26

PCI_DEVSEL_L

27

PCI_STOP_L

28

PCI_PERR_L

29

PCI_SERR_L

31

PCI_PAR PCI_INT_L

PCI_RST_L PCI_CLK PCI_GNT_L PCI_REQ_L PCI_PME_L

5

PCI_IDSEL

22

PCI_CLKRUN_L

67

XTAL_IN

66

XTAL_OUT

BCM4401KQLG

Refer to M07_LOM4401_X06 schematic.

C16

C16 47P/50V/0402

47P/50V/0402

114

56

VESD

VESD25VESD

12

C645

47P/50V/0402

+3.3V_LAN

115

125

VDDIO_PCI

VDDIO_PCI19VDDIO_PCI30VDDIO_PCI40VDDIO_PCI52VDDIO_PCI

12

C

12

C41

C350

.1U/10V/0402

C350

.1U/10V/0402

Place C1284 close to pin65

94

65

VDDIO

VDDIO79VDDIO

XTAL_AVDD

VSS

VSS84VSS2VSS24VSS74VSS13VSS47VSS

97

REGULATOR_AVDD96REGULATOR_AVDD

VSS

35

120

REGULATOR_VOUT191REGULATOR_VOUT2

C

7

VSS12VSS46VSS

111

106

100

C351

C351 1000P/50V/0402

1000P/50V/0402

+1.8V_LOM

92

112

VDDCORE

XTAL_AVSS

68

44

VDDCORE17VDDCORE

EPHY_BIAS_AVDD

EPHY_TESTMODE

GPIO2/VAUXAVAIL

BOOTROM_SCL

BOOTROM_SDA

EPHY_AGND

EPHY_BIAS_AVSS

EPHY_PLLGND

58

70

63

+3.3V_LAN

12

C21

C21 1000P/50V/0402

1000P/50V/0402

12

C25

C25 47P/50V/0402

47P/50V/0402

EMI requirement on 0812

ACT_LED# COL_LED#

EPHY_AVDD

EPHY_VREF

RDAC

EPHY_TDP

EPHY_TDN EPHY_RDP EPHY_RDN

VSS

GPIO1 GPIO0

SPROM_CS

SPROM_DIN

EXT_POR_L

JTAG_TDP

JTAG_TCK

JTAG_TDI

JTAG_TMS

75 76 77 78

69 57 64

71 72 88

62 61 59 60

104

NC

105 103

NC

108

NC

102

NC

109

NC

110

NC

107

NC

87 86 85

90 93

98 95 101 99

89 83

80 82 73 81

R220 1.27K/F_0402R220 1.27K/F_0402

LINK_LED10#

LINK_LED100#

EPHY_PLLVDD

SPROM_CLK

SPROM_DOUT

JTAG_TRST_L

BCM4401 B0

D

38 38

12

C354

C354 47P/50V/0402

47P/50V/0402

+3.3V_LAN

R223

R221

10K_NC

1 2

T2T2

+3.3V_LAN_BIAS_AVDD +1.8V_LOM_EPHY_AVDD +1.8V_LOM_PLLVDD

Place R942 close to U62

R217 1K_0402R217 1K_0402

T45T45 T46T46

SPROM_CS SPROM_CLK SPROM_DOUT SPROM_DIN

T47T47 T54T54 T57T57

12

R222

R222 10K_NC

10K_NC

1 2

+3.3V_LAN

12

T3T3 T1T1

Note: EXT_POR_L has a internl pull up.

12

C34

C34 47P/50V/0402

47P/50V/0402

These three pin LINK_LED10#, LINK_LED100#, ACT_LED are open-drain type.

12

C23

C23 47P/50V/0402

47P/50V/0402

12

R13

49.9/F_0402

Delete R630&R631 per 4401 ref schematic

LOM_LOW_PWR# <29>

D

12

C37

C37 47P/50V/0402

47P/50V/0402

LINK_LED10# <36> LINK_LED100# <36> ACTLED# <36>

L7

L7 BK2125LM152

BK2125LM152

12

C22

2.2U/6.3V/0603

Place L7, C22, C23 close to pin64.

12

R16

49.9/F_0402

12

C348

C348 .1U/10V/0402

.1U/10V/0402

E

12

C27

C26

C26 .1U/10V/0402

.1U/10V/0402

C27 47P/50V/0402

47P/50V/0402

Place R219, C640, C347 close to pin69

12

C640

C640 47P/50V/0402

47P/50V/0402

12

R12

49.9/F_0402

U2

1

CS

VCC

2

SK

NC

3

DI

ORG

4

DO

GND

M93C46-WDW6TP

Note: The BCM4401 has weak internal pulldown resistors on the following signals: SPROM_CS, SPROM_CLK, SPROM_DOUT, SPROM_DIN.

Title

Size Document Number Rev

Date: Sheet

C13

4.7U/10V/0805

Refer to M07_LOM4401_X06 schematic. '+3VLAN should be sourced from +3VSUS instead of +3VSRC since WOL is not supported on C/G.

1 2

R219

R219 BK2125LM152

BK2125LM152

12

C347

C347 .1U/10V/0402

.1U/10V/0402

+1.8V_LOM

C644

8 7 6

.1U/10V/0402

5

12

C29

C29 .1U/10V/0402

.1U/10V/0402

12

R11

49.9/F_0402

12

C24

C24 .1U/10V/0402

.1U/10V/0402

12

C2

QUANTA

QUANTA COMPUTER

COMPUTER

LAN (BCM4401)

FM1 0.1

1 2

R18 0_0805R18 0_0805

+3.3V_LAN

38

12

C346

C346 .1U/10V/0402

.1U/10V/0402

+1.8V_LOM

1 2

L66

L66 BK2125LM152

BK2125LM152

Place L66, C29, C644 close to pin57.

LOM_TX+ <36> LOM_TX- <36> LOM_RX+ <36> LOM_RX- <36>

Resistors must be rated at least 1/16W. Place termination resistors close to the ASIC.

+3.3V_LAN

12

C641

C641 47P/50V/0402

47P/50V/0402

Note: BCM4401 requires 16-bit R/W data width

E

+3.3V_LAN+3.3V_SUS

of

35 51Monday, March 05, 2007

A

4 4

LOM_TX+<35> LOM_TX-<35>

3 3

LOM_RX+<35> LOM_RX-<35>

Removed EMI bead(L40-43) and ESD protect IC(U33)

B

LINK_LED10#<35>

LINK_LED100#<35>

+3.3V_LAN

Place close to CON1.6.

L67

L67 BK2125LM152

BK2125LM152

C364

C364 .1U/10V/0402

.1U/10V/0402

38

Place close to CON1.6 & CON1.12.

C366

C366 47P/50V/0402

47P/50V/0402

12

R226 150_0402R226 150_0402

12

R225 150_0402R225 150_0402

CON1

CON1 TYCO_1368458-1

TYCO_1368458-1

17

GREEN

15

ORANGE

16

COMMON

11

TRD1+/TX

12

TRCT1/TX

10

TRD1-/TX

4

TRD2+/RX

6

TRCT2/RX

5

TRD2-/RX

14

LED2_YP

13

LED2_YN

1

2

3

7

8

9

C

G

O

Y

MGND18MGND

19

D

E

ACTLED#<35>

2 2

1 1

A

B

1 2

R224 150_0402R224 150_0402

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

C

D

Date: Sheet

COMPUTER

LAN Jack

FM1 0.1

E

of

36 51Monday, March 05, 2007

A

B

C

D

E

+3.3V_ALW +5V_SUS

12

+5V_SUS

R528

R527

100K

10K

24

1 2

2

1 1

BREATH_LED#<28> SATA_ACT#<11>

31

Q63

Q63 2N7002W-7-F

2N7002W-7-F

Battery status.

+3.3V_ALW

13

Q3

Q3 DDTA114YUA-7-F

DDTA114YUA-7-F

47K

2

10K

2 2

BAT1_LED# <28>

BAT1_LED

BT

24

LED_WPAN#<24>

3 3

LED_WPAN#

R523

R523 100K

100K

24

3

47K

2

47K

1

12

2

R524

R524 100K

100K

LED_MASK#<11,29>

BAT1_LED_R#

Q67

Q67 DTC144EUA

DTC144EUA

1

Q60

Q60 SI2301BDS

SI2301BDS

3

12

2 4

53

U7

7SH04U77SH04

BREATH_PWRLED

10/31 PSL issue

D5

19-22UYOSUBC

9/20 Change FP

2

BT_MASK

2

Q62

2N7002W-7-F

13

24

31

54

BLUE

RBAT1_LED

BT_ACTIVE#

Q61

Q61 2N7002W-7-F

2N7002W-7-F

R525

R525 0_NC

0_NC

1 2

R30 330R30 330

1 2

54

BT_ACTIVE

R521

R521 100K_NC

100K_NC

BAT2_LED#<28>

100K_NC

2

12

R50330 R50330

R51220 R51220

R522

12

+5V_RUN+3.3V_RUN

RBREATH_PWR_LED

Q4

DDTA114YUA-7-F

2

+5V_ALW

BAT2_LEDRBAT2_LED

12

31

2N7002W-7-F

2N7002W-7-F Q59

Q59

19-21/BHC-YL1M1RY/3T

2 1

BEBL0031Z11

LED19-21VGC-TR8

+3.3V_ALW

13

47K

10K

2

10K

R75

R75 330

330

54

D8

D3

D3 19-21/BHC-YL1M1RY/3T

19-21/BHC-YL1M1RY/3T

+5V_RUN

13

47K

Q7

Q7 DTA114YUA

DTA114YUA

BT_LED

12

BT_LED_R

21

HDD activity LED.Power & Suspend.

WLAN

LED_WLAN_OUT#<24>

Media BD

M_LED_BK#<29>

R546

4.7K_0402_NC

M_LED_BK#

12

R46

R46 100K_NC

100K_NC

R40 0R40 0

R542

R542 10K_0402

10K_0402

+3.3V_RUN

1 2

12

2

31

12

2

10K

+3.3V_WLAN

12

2

Q76

Q76 2N7002W-7-F

2N7002W-7-F

+5V_RUN

47K

R553

R553 47K_0402

47K_0402

10K

24

Q1

13

DDTA114YUA-7-F

R36 220R36 220

HDD_LED RHDD_LED

1 2

+3.3V_RUN

12

R5410R541 0

13

2

MMBT3906_NL

+5V_RUN

13

47K

Q16

Q16 DTA114YUA

DTA114YUA

M_LED_BK_L

R159 0_0805R159 0_0805

D4

19-21/BHC-YL1M1RY/3T

2 1

+5V_RUN

R64

54

330

1 2 21

24

D6

D6 19-21/BHC-YL1M1RY/3T

19-21/BHC-YL1M1RY/3T

Q5

3

Q65

Q65 DTC144EUA

47K

2

DTC144EUA

47K

1

24

M_LED_BK <31>

This circuit is only needed if the platform has the SNIFFER.

R336 10KR336 10K

1 2

12/26

+3.3V_RUN

4 4

BT_RADIO_DIS_DC#<29>

PAD

T28

USBP7_D+

12

A

C190

0.1U/10V

C195

C195 100P/50V

100P/50V

Bluetooth

J1

1

GND

3

3.3V(Logic)

5

Radio Enable/Disable#

7

RSVD

9

USB+

Activity LED

COEX2 COEX1

USB-

GND

TYC_1566995-1

2 4 6 8 10

B

R108

R108 10K

10K

1 2

COEX1_BT_ACTIVE_DC USBP7_D-

12

R123

C193

10K

33P/50V

1 2

19

Q13

MMBT3906_NL_NC

COEX2_WLAN_ACTIVE <24>

13

BT_ACTIVE

LED_MASK#

2

C

19

LED_MASK# <11,29>

USBP7_D+ USBP7_D-

COEX1_BT_ACTIVE_MINI<24>

L40

1 2

R512 0R512 0

1 2

R513 0R513 0

1 2

34

DLW21SN900SQ2B_NC

COEX1_BT_ACTIVE_DC COEX1_BT_ACTIVE_MINI

16

Layout Note: R512 and R513 close to choke as possible to minimize stubs.

D

ICH_USBP7+ <12> ICH_USBP7- <12>

R526 0_NCR526 0_NC

R559 0_NCR559 0_NC

+3.3V_RUN

5

2 1

7SH32

12

25

U35

4

12

COEX1_BT_ACTIVECOEX1_BT_ACTIVE

COEX1_BT_ACTIVE <24>

51

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

SWITCH & LED

FM1 0.1

E

of

37 51Monday, March 05, 2007

1

2

3

4

5

6

7

8

Non-iAMT

1.25V_RUN_PWRGD<42>

1.5V_RUN_PWRGD<43>

1.05V_RUN_PWRGD<43>

2.5V_RUN_PWRGD<34>

R473

R473 200K

200K

R469

R469 200K_NC

200K_NC

R454

R454 200K

200K

GFX_PWRGD<18>

R471 10KR471 10K

1 2

12

C600

C600 2200P/50V

2200P/50V

R468 10K_NCR468 10K_NC

1 2

12

C599

C599 2200P/50V_NC

2200P/50V_NC

R453 10KR453 10K

1 2

12

C589

C589 2200P/50V

2200P/50V

13

2

+1.8V_SUS+1.8V_RUN

13

2

13

2

A A

+5V_RUN +5V_ALW

D33

D33 SDMK0340L-7-F

SDMK0340L-7-F

2 1

12

C601

0.1U/10V

D32

D32 SDMK0340L-7-F_NC

SDMK0340L-7-F_NC

2 1

12

C598

0.1U/10V_NC

+3.3V_RUN +3.3V_ALW

B B

12

C590

0.1U/10V

D31

D31 SDMK0340L-7-F

SDMK0340L-7-F

2 1

12

R460 0R460 0

R462 0R462 0 R461 0R461 0 R467 0_NCR467 0_NC R463 0_NCR463 0_NC

9/20 Depop R463

Q49

Q49 MMBT3906_NL

MMBT3906_NL R472 4.7KR472 4.7K

1 2

Q45

Q45 MMBT3906_NL_NC

MMBT3906_NL_NC R466 4.7K_NCR466 4.7K_NC

1 2

Q43

Q43 MMBT3906_NL

MMBT3906_NL R464 4.7KR464 4.7K

1 2

1 2 1 2 1 2 1 2

Q50

Q50 MMST3904

MMST3904

2

1 3

Q47

Q47 MMST3904_NC

MMST3904_NC

2

9/20 Depop Q47

1 3

Q46

Q46 MMST3904

MMST3904

2

1 3

+3.3V_RUN +3.3V_SUS

R154

2.2K_NC

1 2

IMVP_PWRGD<13,28,45>

RESET_OUT#<28>

12 13

Keep Away from high speed buses

+3.3V_SUS +3.3V_ALW+3.3V_ALW +3.3V_ALW

12

R137

R137 20K

20K

12

C223

0.01U/25V

5V_3V_1.8V_1.25V_RUN_PWRGD <29>

C212 0.1U/10VC212 0.1U/10V

1 2

5

U18A

1 6

NC7WZ14P6X_NL

U17D

74AHC08PW

11

5

U18B

3 4

NC7WZ14P6X_NL

12

R148

R148 100K

100K

R151 0R151 0

1 2

ICH_PWRGD# <34>

ICH_PWRGD <6,13>

C200 0.1U/10VC200 0.1U/10V

1 2

14

U17A

1 2

74AHC08PW

U17C

10

9

74AHC08PW

3

U17B

4 5

74AHC08PW

8

6

RUNPWROK <18,28,29,45>

SUSPWROK <34>

31

Q15

2

2N7002W-7-F

RUN_ON<18,28,39>

SUS_ON<28,39>

13

C C

+3.3V_SUS

D17

D17 SDMK0340L-7-F

SDMK0340L-7-F

2 1

12

C291

0.1U/10V

+5V_SUS +5V_ALW

D14

D14 SDMK0340L-7-F

SDMK0340L-7-F

2 1

12

C289

D D

C289

0.1U/10V

1

R183 10KR183 10K

1 2

12

C292

R182

2200P/50V

200K

R178 10KR178 10K

1 2

12

C290

R179

2200P/50V

200K

2

13

Q22

Q22 MMBT3906_NL

MMBT3906_NL

12

R181

R181 200K

200K

13

Q21

Q21 MMBT3906_NL

MMBT3906_NL

2 1

12

R177

R177 200K

200K

2

D16

D16 SDMK0340L-7-F

SDMK0340L-7-F

2 1

D15

D15 SDMK0340L-7-F

SDMK0340L-7-F

12

R180

R180 200K

200K

+3.3V_ALW+3.3V_ALW

C293

0.1U/10V

1 2

5

U20

2 4

3

NC7SZ14P5X_NL

3

12

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

4

5

6

Date: Sheet

COMPUTER

System Reset Circuit

M-08 0.1

7

of

38 51Monday, March 05, 2007

of

38 51Monday, March 05, 2007

of

38 51Monday, March 05, 2007

8

1

2

3

4

5

+3.3V_ALW2

A A

RUN_ON<18,28,38>

B B

1.8V_RUN_ON<28> SUS_ON<28,38>

C C

3.3V_RUN_ON<28>

12

PR189

PR189 100K_0402

100K_0402

+5V_ALW2

12

61

2

+3.3V_ALW2

12

PR190

PR190 100K_0402_NC

100K_0402_NC

+3.3V_ALW2

12

PR191

PR191 100K_0402

100K_0402

PR184

PR184 100K_0402_NC

100K_0402_NC

RUN_ON_5V#

PQ40B

PQ40B 2N7002DW

2N7002DW

+5V_ALW2

2

+5V_ALW2

2

5

12

PR55

PR55 100K_0402_NC

100K_0402_NC

61

PQ14B

PQ14B 2N7002DW_NC

2N7002DW_NC

12

PR56

PR56 100K_0402_NC

100K_0402_NC

61

PQ16B

PQ16B 2N7002DW

2N7002DW

12

PR183

PR183 100K_0402

100K_0402

RUN_ENABLE

34

PQ40A

PQ40A 2N7002DW

2N7002DW

5

12

PC180

PC180 4700P/50V/0603

4700P/50V/0603

12

PR53

PR53 100K_0402_NC

100K_0402_NC

34

PQ14A

PQ14A 2N7002DW_NC

2N7002DW_NC

12

PR59

PR59 100K_0402

100K_0402

34

PQ16A

PQ16A 2N7002DW

2N7002DW

+5V_ALW

PD5

PD5 CH751H-40HPT_NC

CH751H-40HPT_NC

21

PR54

PR54 0_0402_NC

0_0402_NC

1 2

+3.3V_ALW

PD6

PD6 CH751H-40HPT_NC

CH751H-40HPT_NC

21

PR58

PR58 0_0402

0_0402

1 2

PQ39

PQ39 SI4800BDY-T1-E3

SI4800BDY-T1-E3

8 7 6 5

PQ13

PQ13 SI4800BDY_NC

SI4800BDY_NC

8 7 6 5

PQ15

PQ15 PHK12NQ03LT

PHK12NQ03LT

8 7 6 5

+5V_RUN+15V_ALW

3 2 1

12

PC179

PC179 10U/25V/1206

4

3 2 1

4

3 2 1

4

10U/25V/1206

+1.8V_RUN+1.8V_SUS+15V_ALW

12

PC56

PC56 10U/6.3V/0603_NC

10U/6.3V/0603_NC

12

PC55

PC55 .047U/25V

.047U/25V

+3.3V_RUN+15V_ALW

12

PC57

PC57 10U/6.3V/1206

10U/6.3V/1206

12

PC58

PC58 6800P/50V/0402

6800P/50V/0402

Inrush curreunt : 5.4 A

30

PR182

PR182 20K_0402

20K_0402

1 2

PR52

PR52 20K_0402_NC

20K_0402_NC

1 2

PR57

PR57 20K_0402

20K_0402

1 2

+3.3V_ALW2

12

3.3V_SUS_ON<28>

+3.3V_ALW2

PR193

PR193 100K_0402

100K_0402

2

12

PR192

PR192 100K_0402

100K_0402

2

12

PR61

PR61 100K_0402_NC

100K_0402_NC

SUS_ON_3.3V#

61

12

PR88

PR88 100K_0402_NC

100K_0402_NC

SUS_ON_5V#

61

Reserve discharge path

SUS_ON_5V#

+15V_ALW+5V_ALW2

12

PR63

PR63 100K_0402

100K_0402

SUS_3.3V_ENABLE

34

5

PQ18A

PQ18A 2N7002DW

PQ18B

PQ18B 2N7002DW

2N7002DW

PQ26B

PQ26B 2N7002DW

2N7002DW

2

Q18

2N7002W-7-F_NC

2N7002DW

+15V_ALW+5V_ALW2

12

PR87

PR87 100K_0402

100K_0402

SUS_5V_ENABLE

34

5

PQ26A

PQ26A 2N7002DW

2N7002DW

+1.8V_SUS +5V_SUS +3.3V_SUS

12

R172

R172 30/F_0402_NC

30/F_0402_NC

31

2N7002W-7-F_NC

+3.3V_ALW +3.3V_SUS

12

PC63

PC63 4700P/50V/0603

4700P/50V/0603

+5V_ALW +5V_SUS

12

PC92

PC92 4700P/50V/0603

4700P/50V/0603

12

R176

R176 1K_0402_NC

1K_0402_NC

31

2

Q20

PQ17

PQ17 SI4800BDY-T1-E3

SI4800BDY-T1-E3

8 7 6 5

4

12

PR62

PR62 100K_0402_NC

100K_0402_NC

PQ27

SI4800BDY-T1-E3

8 7 6 5

4

12

PR86

PR86 100K_0402_NC

100K_0402_NC

2N7002W-7-F_NC

3 2 1

12

PC62

PC62 10U/6.3V/1206

10U/6.3V/1206

3 2 1

12

PC91

PC91 10U/6.3V/1206

10U/6.3V/1206

12

R175

R175 1K_0402_NC

1K_0402_NC

31

2

Q19

1 2

PR60

PR60 20K_0402

20K_0402

PR85

PR85 20K_0402

20K_0402

Reserve discharge path

+1.5V_RUN+1.8V_RUN+3.3V_RUN+5V_RUN +0.9V_DDR_VTT

Q41

12

R457

R457 10_0402_NC

10_0402_NC

31

2

2N7002W-7-F_NC

Q44

12

R470

R470 1K_0402_NC

1K_0402_NC

31

2

2N7002W-7-F_NC

12

R456

R456 1K_0402_NC

1K_0402_NC

31

2

Q40

2

2N7002W-7-F_NC

Q39

12

R455

R455 1K_0402_NC

1K_0402_NC

31

2

12

R458

R458 1K_0402_NC

1K_0402_NC

RUN_ON_5V#

2N7002W-7-F_NC

D D

2N7002W-7-F_NC

Q42

31

2

2N7002W-7-F_NC

1

2

Q48

2N7002W-7-F_NC

+1.25V_RUN

12

R465

R465 1K_0402_NC

1K_0402_NC

31

3

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

4

Date: Sheet

COMPUTER

RUN POWER SW

M-08 0.1

5

of

39 51Monday, March 05, 2007

of

39 51Monday, March 05, 2007

of

39 51Monday, March 05, 2007

A

+DC_IN_SS

1 1

+DC_IN_SS

2

PQ5

2N7002W-7-F

31

B

PQ2

PQ2 SI4835BDY-T1-E3

SI4835BDY-T1-E3

8 7 6 5

PR40

1 2

10K_0402

4

1 2 3

PR36

PR36 100K_0402

100K_0402

C

+PWR_SRC

PC29

2200P/50V0402

CHGR_IN

12

PC30

.1U/50V/0603

PR33

PR33 .01/F_2512

.01/F_2512

1 2

3

4

12

CSSP

FL5

FBMH3225HM202NT

1 2

D

Id=9.6A@Vgs=10V

PQ32

PQ32 SI4835BDY-T1-E3

SI4835BDY-T1-E3

1 2 3

4

+DC_IN_SS

12

PR117

PR117 470K_0402

470K_0402

8 7 6 5

E

+DC_IN_SS

12

.01U/25V/0402

IINP

PR38

PR35

PR39

B

PC131

1 2

12

PC110

PC110 1U/25V/0805

1U/25V/0805

8731_ACIN

1 2

PC137 .1U/50V/0603PC137 .1U/50V/0603

GNDA_CHG

12

PC127

.01U/25V/0402

12

PC25

12

.01U/25V/0402

12

GNDA_CHG

22

DCIN

2

ACIN

13

ACOK

11

VDD

MAX8731AETI+

10

SCL

9

SDA

14

BATSEL

8

IINP

6

CCV

5

CCI

4

CCS

3

REF

8731REF

12

PC126

1U/10V/0603

SEE TABLE 1

1 2

12

PC22

1 2

100P/50V/0402

PC52

.01U/25V/0402

For GPRS immunity place as close to the IC as possible

PR123

365K/F_0402

365K/F_0402 PR122

LDO

12

2 2

ACAV_IN<18,28,34>

15.8K/F_0402

PR51

PR50

PR50 10K/F_0402

10K/F_0402

12

PBAT_SMBCLK<28,41>

SMBUS Address 12

PR144

8.45K_0402

3 3

ADAPT_TRIP_SEL<29>

4 4

A

1 2

PR122

49.9K/F_0402

PC114 .01U/25V/0402PC114 .01U/25V/0402

+3.3V_ALW

PBAT_SMBDAT<28,41>

PC139

12

.1U/10V/0402

12

SEE TABLE 1

1 2

PR34 33.2K/F_0402PR34 33.2K/F_0402

PR1880_0402PR1880_0402

12

PR133

PR133 10K_0402

10K_0402

1 2 12

PC45

51.1K/F_0402

SEE TABLE 1

17.8K/F_0402

SEE TABLE 1

348/F_0402

SEE TABLE 1

1

GND

12H

DAC

7 12

PC133

.1U/10V/0402

GNDA_CHG

PR41

PR41 1M/F_0402

1M/F_0402

CSSN

27

28

CSSP

BST

LDO VCC

DHI

DLO

PGND

Adress :

CSIP CSIN

FBSA FBSB

GND

12

PU7

+5V_ALW

8

3 2

4

PC51

1 2

100P/50V/0402

CSSN

25

21 26 24 23

LX

20 19 18 17

15 16

PR143 0_0603PR143 0_0603

12

PU4A

PU4A LM393DR2G

LM393DR2G

1

PR119 0_0603PR119 0_0603

LDO

BST

DHI

LX

DLO

PR137

100_0402

PC50

PC53

100P/50V/0402

.01U/25V/0402

1 2

.1U/10V/0402_NC

SDM10K45

PC43 1U/10V/0603PC43 1U/10V/0603

12

PR120

PR120 33/F_0603

33/F_0603

12

PC115 1U/10V/0603PC115 1U/10V/0603

PR121

+VCHGR

12

1 2

+5V_ALW

12

100K_0402

12

PC44

C

LDO

PD10

RDS(ON)=20m ohm

PC108

PC108 220P/50V/0402

220P/50V/0402

+3.3V_ALW

PR49

2

21

PC100

12

.1U/50V/0603

PC109

PC109 3300P/50V/0402

3300P/50V/0402

1 2

1_0603

PQ4

SI4810BDY-T1-E3

CSIP

CSIN

12

PR45

100K_0402

3

PQ6

PQ6 2N7002W-7-F

2N7002W-7-F

1

2200P/50V0402

RDS(ON)=30m ohm

876

PQ3

4

PQ3 SI4800BDY-T1-E3

SI4800BDY-T1-E3

5.8UH 30% 5.5A 24m(SIL104R-5R8PF)

2

351 876

2

351

12

PR43

1K_0402_NC

12

PC28

PL1

12

PR110

3.8_0805_NC

PC101

1000P/50V/0402_NC

1 2

ADAPT_OC <29>

12

PC31

.1U/50V/0603

CHG_CS

12

10U/25V/1206

PR32

PR32 .01/F_2512

.01/F_2512

1 2

PC102

3

4

PC32

PC32 10U/25V/1206

10U/25V/1206

12

PC89

10U/25V/1206/X5R

PC196

3300P/50V/0603

12

PC8

PC195

1000P/50V/0402

.1U/50V/0603

12

TRIP CURRENT

(A) 65 90 130 150 200 9.75 19.1K 28K 301 36.5K 230

Note 1: PR34 is popluated if ADAPT_TRIP_SEL is used to program for the next lower adapter.

ADAPT_TRIP_SET is floating for the higher adaptor, grounded for the lower adaptor.

Note 2: 24.9K at PR34 allows the 65W adaptor seetting to switch down to 45W.

Note 3: PR33 must be 5mOhms instead of 10mOhms for the 230W adaptor.

D

3.17

4.43

6.43

7.43

11.28

(see note3)

Title

CHARGER

Size Document Number Rev

FM5 0.1

Date: Sheet

Max Charging current setting

4.7A

+5V_ALW

21

PD11

PD11 SDM10K45_NC

SDM10K45_NC

12

PR104

PR104 1K_0402_NC

+VCHGR_1

12

PC20

10U/25V/1206/X5R

1K_0402_NC

FL6

HI1206T161R-10

1 2

12

PC17

12

PC187

10U/25V/1206/X5R

2200P/50V0402

10/4 EMI request

TABLE 1

105 348 100 432

40 51Monday, March 05, 2007

**PR34ADAPTER(W)

33.2K

27.4K

88.7K

PR35

PR38 PR39

57.6K

51.1K

32.4K

30.9K

13K

17.8K

20.5K

24.9K

32.4K 6.49K 115 N/A

QUANTA

QUANTA COMPUTER

COMPUTER

E

+VCHGR <41>

N/A

of

A

+3.3V_ALW

PD4

PD4 DA204U_NC

PC7 2200P/50V0402PC7 2200P/50V0402

1 2

1 1

Adress : 16H

2 2

PC11 .1U/50V/0603PC11 .1U/50V/0603

1 2

JABT1

BATT1+

BATT2+ SMB_CLK SMB_DAT

BATT_PRES#

SYSPRES#

BAT_ALERT

BATT1BATT2-

SUY_200185MR009S509ZL

DA204U_NC

RP2

1 3

RP2 4P2R-100

4P2R-100

RP1

RP1 4P2R-100

4P2R-100

1 2 3 4 5 6 7 8 9

2

1

2 4

1

3

PD3

2

DA204U_NC

B

PD2

2

1

DA204U_NC

3

2

1

PD1

PD1 DA204U_NC

DA204U_NC

3

+VCHGR <40>

SMBUS Address 16

PBAT_SMBCLK <28,40> PBAT_SMBDAT <28,40>

+3.3V_ALW

12

C

PR8

PR8 10K_0402

10K_0402

PBAT_PRES# <29> PBAT_ALARM#

DOCK_PSID

D18

SSM24PT_NC

2 1

12

PR90

PR90 100K/F_0402

100K/F_0402

12

PR89

PR89 15K/F_0402

15K/F_0402

PQ28

PQ28 2N7002W-7-F

2N7002W-7-F

3 1

2

1 3

PQ29

PQ29 MMST3904-7-F

MMST3904-7-F

D

PR91

1 2

100_0402

+5V_ALW

1 2

+5V_ALW

2

1

3

+5V_ALW

PR93

PR93 10K_0402

10K_0402

1 2

PR94 100_0402_NCPR94 100_0402_NC

PD9

PD9 DA204U

DA204U

1

E

+3.3V_ALW

12

PR92

2.2K_0402

PS_ID <28>

2

PD8

PD8 DA204U

DA204U

3

PS_ID_DISABLE# <29>

PL11

1 2

BLM11B102S

3 3

4 4

JDCIN1

FOXCONN_JPD113D-509-TR

98765

1 2 3

4

VZ0603M260AGT_NC

Change Value per GG updated

EMI requirement on 0812

BLM41PG600SN1L

A

BLM41PG600SN1L

1 2 1 2

BLM41PG600SN1L

12

RV1

VZ0603M260AGT_NC

+DCIN_JACK

-DCIN_JACK

RV2

DOCK_PSID

PQ1

12

PR95

PR95 240K_0402

240K_0402

PR1

PR1 47K_0402

47K_0402

1 2

PQ1 SI4835BDY-T1-E3

SI4835BDY-T1-E3

1 2 3

4

8 7 6 5

+DC_IN_SS

12

PC4

PC4 .1U/50V/0603

.1U/50V/0603

12

PR2

PR2 10K/F_0603

10K/F_0603

C

12

PC5

PC5 .1U/50V/0603

.1U/50V/0603

12

PC2

PC2 .1U/50V/0603

.1U/50V/0603

12

PC3

+

10U/25V/1206

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

COMPUTER

DCIN,BATT CONNECTOR

FM5 0.1

E

of

41 51Monday, March 05, 2007

PC95

1 2

.47U/25V/0805

+DC_IN

FL2

12

PC1

FL1

AC_OFF<28>

PC1 .1U/50V/0603

.1U/50V/0603

3216

5

4

PQ30

PQ30 IMD2A_NC

IMD2A_NC

B

5

4

3

2

1

+PWR_SRC

D D

PJP21

POWER_JP

1 2

1.8 Volt +/- 5%;f=400kHz Thermal Design current: 5.61A Maximum current: 8.015A OCP: 12.36A

+1.8V_SUS

12

PJP8

PJP8 POWER_JP

POWER_JP

C C

+

PC66

330U/2.5V/ESR15

B B

+1.8V_SUSP

+

12

PJP7

PJP7 POWER_JP

POWER_JP

PC64

12

PC164

PR168

.1U/25V/0603

27.4K/F_0603

330U/6.3V/ESR25_NC

+DC_PWR_SRC

12

PC170

PC167

+

10U/25V/1206

PQ19

FDS8878

PL8

1.0UH_SIL104_11A/6mohm

12

PR169

17.4K/F_0603

12

PQ20

FDS6680AS

Rdson=12.5mOhm

12

PC181

PC181 4700P/50V/0603

4700P/50V/0603

PC76

1 2

.1U/50V/0603

9

PC77

12

876

351

876

351

2

2200P/50V/0402

4

PC182

PC182 .1U/25V/0603_NC

.1U/25V/0603_NC

1 2

PR73 309K/F_0402PR73 309K/F_0402

1 2

DDR_ON<28>

1.8V_DH

1.8V_LX

PC173

.1U/25V/0603

1.8V_DL

1 2

+5V_ALW

12

.1U/50V/0603

PR177

PR177 1_0603

1_0603

PR67

10_0603

PC176

PC176 1U/10V/0603

1U/10V/0603

PC165

2

9 10 11 12 13 14 15 16 37 36

12

PR64

PR64 0_0805

0_0805

1 2

PR1610_0402_NC PR1610_0402_NC

12

PC188

.1U/50V/0603

BYP OUT1 FB1 ILIM1 POK1 EN1 UGATE1 PHASE1 PAD PAD

35

+5V_VCC3

12

SJ5

112

Jump20X10

8

7

LDO

LDOREFIN

MAX8778ETJ+

BOOT117LGATE118PVCC19SECFB20GND21PGND22LGATE223BOOT2

PAD33PAD34PAD

12

PC72

PC72 1U/10V/0603

1U/10V/0603

12

6

VIN

PR65

PR65 0_0805

0_0805

+5V_VCC3

4

5

VREF3

EN_LDO

PU9

12

1 2

3

TON2VCC

PR66

PR66 0_0402_NC

0_0402_NC

PR159

0_0402

PR158

PR158 0_0402_NC

0_0402_NC

1 2

1

REF

REFIN2

ILIM2

OUT2

SKIP#

POK2

EN2

UGATE2

PHASE2

24

.1U/25V/0603

.1U/25V/0603 PR179

PR179

1 2

1_0603

32 31 30 29 28 27 26 25

PC175

12

PC166

PC166 .1U/25V/0603

.1U/25V/0603

16.9K_0603

PR163

PR163 100K/F_0402

100K/F_0402

1 2

12

PR162

PR1860_0402PR1860_0402

1 2

+3.3V_ALW

1 2

+3.3V_ALW

PR172

PR172 100K/F_0402

100K/F_0402

1 2

PR160

PR160 10K_0603

10K_0603

1 2

PR174

PR174 100K/0603_NC

100K/0603_NC

1.25V_RUN_ON <28>

PR170

PR170 100K_0402_NC

100K_0402_NC

1.25V_DH

4

1.25V_DL1.25V_DL

2

12

PC189

PC189 4700P/50V/0603_NC

4700P/50V/0603_NC

PC183

PC183 .1U/25V/0603_NC

.1U/25V/0603_NC

1 2

5

6

D1D1

PQ23B

PQ23B FDS8984

FDS8984

G1

S1

3

7

8

D1D1

G1

PQ23A

S1

FDS8984

Rdson=30mOhm

1

1.25V_RUN_PWRGD <38>

1.8V_SUS_PWRGD <28>

12

PC171

PC168

+

10U/25V/1206

+

10U/25V/1206_NC

PC70

1 2

.1U/50V/0603

PC71

12

1.25V +/- 5%;f=300kHz Thermal Design Current: 0.924A Maximum Current: 1.32A OCP: 1.67A

PL9

6.8uH_SIQ74-6R8_2.1A/45mohm

Power Sequencing, Vcore Regulator Power Sequencing

+1.25V_RUN_P1.25V_LX

Del PC66

2200P/50V/0402

+

PC65

150U/2V/ESR18

+1.25V_RUN

1 2

12

PC67

+

PJP10

PJP10 POWER_JP

POWER_JP

10U/25V/1206_NC

0.9V +/- 5% Design current 1.05 A

+1.8V_SUSP +0.9V_P

0.9V_DDR_VTT_ON<28>

DDR_ON<28>

A A

1 2

PJP20

POWER_JP

10U/4V_NC

+5V_ALW

PC163

5

U32

10

IN

2

VLDOIN

1

VDDQSNS

7

S3 (STBY)

9

S5 (OFF)

12

TPS51100

PC162

0.1U/25V

1 2

PAD

11

VTT

VTTSNS

VTTREF

PGND AGND

V_DDR_MCH_REF

3

5

6

4 8

PC160

10U/4V/0603

12

PC159

.1U/25V/0603

PC161

1 2

10U/4V/0603

4

1 2

PJP19

1 2

POWER_JP

+0.9V_DDR_VTT

Peak Current 1.5 A

3

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

COMPUTER

1.25V,1.05V,1.8V,0.9V

FM5 0.1

1

of

42 51Monday, March 05, 2007

of

42 51Monday, March 05, 2007

of

42 51Monday, March 05, 2007

5

4

3

2

1

+1.5V_RUN /+1.05V_VCCP /+3.3V_ALW /+3.3_RTC_LDO

+PWR_SRC

D D

PJP3

PJP3 POWER_JP

POWER_JP

1 2

12

+

PC141

PC141 10U/25V/1206

10U/25V/1206

12

PC54

.1U/50V/0603

12

PC49

PC49 2200P/50V/0402

2200P/50V/0402

1.5V +/- 5% ; f=200kHz Thermal Design Current: 2.3A Maximum Current: 3.3A OCP: 4.15A

+1.5V_RUN

5

6

D1 D1

PQ11B

PJP6

C C

B B

A A

PJP6

POWER_JP

1 2

+1.5V_RUN_P 1.5V_LX

PR127

0_0402_NC

12

+

PC147

PC154

10U/6.3V/1206

150U/2V/ESR18

Layout Notes: Place C7 very near U1-pin19 and PU1-pin20. Place C8 very near U1-pin3. Place R19 very near U1-pin21. Minimize loop including Q4, L2, C11, C12 and R19. Minimize loop including Q2, L3, C17, C18, C19 and R19. Route GNDA_DC2 using at least 25 mil trace width. Minimize GNDA_DC2 trace length. Place C15 near U1-pin7. Place C20 near U1-pin5. Place R7 near U1-pin11. Place R12 near U1-pin31. Place R3, C10 near U1-pins 24 and 25. Place R2, C9 near U1-pins 16 and 17. Route +1.05V_BOOT, +1.05V_BOOST, +1.5V_BOOT, +1.5V_BOOST using 25mil trace width and minimize lengths. Connect large copper fill areas to PQ1, PQ2, PQ3 and Q4 signals for thermal improvement. Minimize length of +1.5V_RUN_PL and +1.05V_VCCP_PL. Place C1, C2, C3, C22 very near Q3-pins 5, 6, 7, 8. Place C4, C5, C6, C23 very near Q1-pins 5, 6, 7, 8. Route +DC2_PWR_SRC using 50 mil trace width and minimize length. Route OUT1 and OUT2 away from inductor and switch-node. Sense Vout directly at output bulk cap.

PC142

PC142 .1U/25V/0603

.1U/25V/0603

1 2

5

0_0402_NC

PR128

0_0402_NC

5.2UH_SIL104R_5.5A/22mohm

1 2

PQ11B

FDS8984

12

PL6

PQ11A

FDS8984

Rdson=30mOhm

S1

3

7

D1 D1

S1

1

G1

8

G1

1.5V_DH

4

1.5V_DL

2

12

PC190

PC190 4700P/50V/0603_NC

4700P/50V/0603_NC

4

PR129

PR129 0_0402

0_0402

1 2

PR131

249K_0402

PC121

0.1U/50V/0603_NC

1 2

POK1 EN1

PC132

PC132 .1U/25V/0603

.1U/25V/0603

1 2

PR141

PR141 1_0603

1_0603

1 2

+5V_VCC2 +5V_ALW

12

.1U/50V/0603

PR111

PR111 10_0603

10_0603

1 2

PC112

PC112 1U/10V/0805

1U/10V/0805

+DC2_PWR_SRC

PC106

9

BYP

10

OUT1

11

FB1

12

ILIM1

13

POK1

14

EN1

15

UGATE1

16

PHASE1

37

PAD

36

PAD

35

PR136 0_0402PR136 0_0402

EN1

PR139 0_0402PR139 0_0402

EN2

12

PR42

PR42 0_0805

0_0805

1 2

8

7

LDO

LDOREFIN

MAX8778

no QCI P/N

BOOT117LGATE118PVCC19SECFB20GND21PGND22LGATE223BOOT2

PAD33PAD34PAD

12

PC136

1U/10V/0603

1 2

3

12

6

VIN

PR44

PR44 0_0805

0_0805

4

5

VREF3

PU8

+5V_VCC2

PR113

PR113 0_0402

0_0402

1 2

1

3

TON2VCC

EN_LDO

24

2

Jump20X10

REF

+3.3V_RTC_LDO

PR125

93.1K/F_0402_NC

1 2

REF

1 2

PR118

PR118 0_NC

0_NC

32

REFIN2

31

ILIM2

30

OUT2

29

SKIP#

28

POK2

27

EN2

26

UGATE2

25

PHASE2

PR142

PR142 1_0603

1_0603

1 2

SJ2

112

1.5V_RUN_ON <28>

1.05V_RUN_ON <29>

PR124

PR124 0_0402

0_0402

PR126

105K_0402_NC

1 2

12

PR130 309K/FPR130 309K/F

1 2

PR154

12

POK2

0_0402

EN2

12

PC135

PC135 .1U/25V/0603

.1U/25V/0603

Note:PC105 use

0.1uFfor Intersil, Use 1uF for MAX8778

12

PC105

PC105 1U/10V/0603

1U/10V/0603

PC118

PC118 .1U/25V/0603

.1U/25V/0603

PC130

0.1U/25V_NC

1 2

2

12

+

PC146

10U/25V/1206

+

PC145

10U/25V/1206

PC144

.1U/50V/0603

12

1.05V +/- 5%; f=300kHz Dis. Thermal Design Current: 6.9A Dis. Maximum Current: 9.8A Dis. OCP: 12.36A

876

1.05V_DH

4

1.05V_LX

1.05V_DL

4

Notes:

2. For Inspirion +3.3V_ALWP becomes +3.3V_SUSP.

3. For Inspirion +5V_ALW2 becomes +5V_ALW

1 2

POK2 POK1

PQ12

FDS8878

PL5

2

PR132

PR132 178K_0402

178K_0402

PL5

351

1.0UH_SIL104_11A/6mohm

876

9

PQ10

FDS6680AS

Rdson=12.5mOhm

351

+3.3V_SUS

PR140

PR140 178K_0402

178K_0402

1 2

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

12

1.05V_RUN_PWRGD <38>

1.5V_RUN_PWRGD <38>

QUANTA

QUANTA COMPUTER

COMPUTER

1.5V,1.05V

FM5 1A

PJP4

POWER_JP

+1.05V_VCCP_P

PC158

1 2

.1U/25V/0603

12

PC143

2200P/50V/0402

12

+

PC156

330U/2.5V/ESR15

1

+1.05V_VCCP

PJP5

POWER_JP

+

PC155

330U/2.5V/ESR40_NC

43 51Monday, March 05, 2007

of

12

PC157

10U/6.3V/1206

5

4

3

2

1

DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+15V_ALW

Ton:OUT1/OUT2 Switching Frequency

Place these CAPs close to FETs

PJP11

D D

+PWR_SRC

5 Volt +/- 5%

PJP11

POWER_JP

1 2

PC172

12

+

10U/25V/1206

PC174

12

+

10U/25V/1206

PC177

12

+

10U/25V/1206

PC178

12

+

10U/25V/1206_NC

Design Current: 7.43 A

+DC1_PWR_SRC

PC82

1 2

.1U/50V/0603

PC85

12

2200P/50V/0402

PR180

PR180 0_0805

0_0805

PC84

Maximum current:10.6A OCP: 12.96A

+5V_ALW

12

PJP12

PJP12 POWER_JP

PC93

330U/6.3V/ESR25

POWER_JP

+5V_ALWP

+

PC94

1 2

ALWON<28>

THERM_STP#<34>

PR80

PR80 0_0402_NC

0_0402_NC

.1U/50V/0603

PR84

PR84 0_0402

0_0402

PL10

2.2uH_SIQH125A-13A/5.5mOhm

1 2

Rdson=12.5mOhm

1 2

+15V_ALW

PR76

PR76 1K/F_0402

1K/F_0402

PR75

PR75 0_0402

0_0402

FDS6680AS

12

C C

PR185

PR185 240_0805_NC

240_0805_NC

1 2

B B

A A

PQ25

FDS8878

PQ24

2

876

351

876

9

351

SJ3

112

Jump20X10

2

12

PR77

PR77 200K_0402

200K_0402

4

+5V_LX

4

+5V_DH

+5V_DL

+15V_ALWP

PC75

.1U/50V/0603

.1U/50V/0603_NC

+5V_ALWP

1 2

324K/F_0402

.1U/50V/0603

1 2

.1U/50V/0603

PC169

.1U/50V/0603

PC88

PR81

1 2

No Install PR79 for ISL6236 Install PR79=0Ohm for MAX8778

PR181

PR181 0_0805

0_0805

1 2

+3.3V_ALW2

PR79

0_0402_NC

1 2

PC90

1 2

PD13

1

3

2

BAT54S-7-F

.1U/50V/0603

PD12

1

3

2

BAT54S-7-F

1 2

PR175

PR175 200K/F_0402

200K/F_0402

+5V_ALW2

12

PC81

4.7U/10V/1206

12

PC186

PC186 1U/10V/0603

1U/10V/0603

1 2

8

4

6

7

5

3

VIN

LDO

VREF3

9

BYP

10

OUT1

11

FB1

12

ILIM1

POK1 POK2

13

POK1

14

EN1

15

UGATE1

16

PHASE1

37

PAD

36

PAD

35

PR83

PR83 1_0603

1_0603

PC87

PC87 .1U/50V/0603

.1U/50V/0603

12

PC86

1 2

EN_LDO

LDOREFIN

PU6

MAX8778ETJ+

MAX8778

BOOT117LGATE118PVCC19SECFB20GND21PGND22LGATE223BOOT2

PAD33PAD34PAD

2

+5V_ALW2

PD7

PD7 SDM10K45

SDM10K45

2 1

12

PR178

PR178 39K/F_0402

39K/F_0402

REFIN2: DYNAMIC 0 to 2V REFIN2 = RTC: 1.05V Fixed REFIN2 = VCC: 3.3V Fixed

No Install for ISL6236 Install 10 ohm for MAX8778

PR176

PR176 10_0603

10_0603

12

PR173

PC80

0_0402_NC

PC78

PC78 .1U/10V/0402

.1U/10V/0402

1 2

PR171

PR171 0_0402_NC

0_0402_NC

1

REF

TON2VCC

REFIN2

ILIM2 OUT2 SKIP# POK2

EN2 UGATE2 PHASE2

PR70

24

1_0603

1 2

SJ4

112

Jump20X10

+5V_VCC1

12

32 31 30 29 28 27 26 25

12

1U/10V/0603

PR71

PR71 309K/F_0402

309K/F_0402

1 2

PC74

PC74 .1U/50V/0603

.1U/50V/0603

1 2

12

0_0402

0_0402 PR187

PR187

1 2

PR72

PR72 0_0402_NC

0_0402_NC

PR68

PR68 0_0402_NC

0_0402_NC

+3.3V_DH

PC73

1 2

.1U/50V/0603_NC

Place these CAPs close to FETs

PR167

PR167 0_0402

0_0402

1 2

4

+3.3V_LX

+3.3V_DL

4

PC83

1 2

.1U/50V/0603

876

FDS8878

2

351

876

9

Rdson=12.5mOhm

2

351

+3.3V_ALWP +3.3V_ALWP

POK2

POK1

LDO = 5V (LDOREFIN = GND) or LDOREFIN RANGE: 0.3V to 2V LDO = 2x LDOREFIN

VDD 200kHz/300kHz OPEN (REF): 400kHz/300kHz GND: 400kHz/500kHz

3.3 Volt +/- 5%

PC79

Design Current:7.18A

12

Maximum current:10.25A OCP: 12.36A

2200P/50V/0402

PQ22

PL7

1.5uH_SIL1055RC-12.5A/7.6mOhm

1 2

PQ21

FDS6680AS

12

PR82

PR166

100K_0402

100K_0402_NC

PR165

PR165 0_0402

0_0402

1 2

FBMH4532HM681

FL10

1 2

+3.3V_ALWP

PC68

PR164

PR164 0_0603

0_0603

1 2

.1U/50V/0603

PR69

PR69 0_0603_NC

0_0603_NC

1 2

ALW_PWRGD_3V_5V <28>

.1U/50V/0603

+3.3V_ALW

1 2

+

FBMH4532HM681

FL11

FL12

1 2

PC69

PC69 330U/6.3V/ESR25

330U/6.3V/ESR25

FBMH4532HM681

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

COMPUTER

3VALW,5V,3V, power on

FM5 1A

1

of

44 51Monday, March 05, 2007

of

44 51Monday, March 05, 2007

of

44 51Monday, March 05, 2007

A

>

+5V_ALW

1 1

IMVP6_PROCHOT#<29>

470P/50V/0402

PC13

2200P/50V/0402_NC

2 2

PWR_MON<34>

PC14

1U/10V/0603_NC

RUNPWROK9,38 IMVP_VR_ON<28>

VCCSENSE<4>

VSSSENSE<4>

3 3

12

4 4

10_0603

1 2

PR106

PR106 332/F_0402_NC

332/F_0402_NC

1 2

PC96

1500P/50V/0402_NC

PR3

PR3 0_0402

0_0402

1 2

PR6

PR5 10_0603PR5 10_0603

680P/50V/0402_NC

.01U/25V/0402

1 2

12

PC6

12

PR14

PR14 10K_0402_NC

10K_0402_NC

PR20

1 2

0_0402_NC

12

PC16

PC16 1000P/50V/0402

1000P/50V/0402

PC18

PC18 1000P/50V/0402

1000P/50V/0402

12

1 2

PC97

1 2

PR97

82.5K/F_0402_NC

12

PC10

PR13

PR13 143K/F_0402

143K/F_0402

PR4

PR4 0_0402_NC

0_0402_NC

DPRSLPVR<6,13>

PR18

1 2

0_0402

PR19

1 2

0_0402

1 2

12

VID0<4> VID1<4>

VID2<4> VID3<4> VID4<4> VID5<4> VID6<4>

H_DPRSTP#<3,6,11>

H_PSI#<3>

PR102

2.2K/F_0402_NC

1 2

PR116

PR116 10_0603

10_0603

1 2

PC33

12

1U/10V/0805

PR12

0_0402

PR11

100K_0402_NC

T13

PAD

12

PR16

PR16 10K_0603

10K_0603

B=3435

PR101

6.49K/F_0603

1 2

PR9 71.5K/F_0402PR9 71.5K/F_0402

PR99

PR99 1K/F_0402

1K/F_0402

PC12

PC12 1000P/50V/0402_NC

1000P/50V/0402_NC

PR115

PR115 0_0603

0_0603

1 2

12

CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6

PR29

PR17

0_0402

CLK_ENABLE#

4.99K/F_0402

4.99K/F_0402 PR103

PR103

1 2

12

.01U/25V/0402_NC

12

PR114

PR114 13K/F_0402

13K/F_0402

12

499/F_0402

12

B

PC27

19

VSS

4

VR_TT#

(VRHOT#)

3

RBIAS

5

NTC

(THRM)

6

SOFT

28

VID0

29

VID1

30

VID2

31

VID3

32

VID4

33

VID5

34

VID6

37

DPRSTP#

36

DPRSLPVR

1

PSI#

2

PWR_MON

38

CLK_EN#

35

VR_ON

12

VSEN

13

RTN

11

VDIFF

10

FB

(TIME)

9

COMP

8

VW

(TRC)

PAD41PAD42PAD43PAD44PAD45PAD46PAD47PAD48PAD49PAD

+CPU_PWR_SRC

1 2

12

PU1

18

20

VDD

(GND)

(VCC)

(OSC)

(CCV)

(PGD_IN)

(SHDN#)

(FBS)

(GNDS)

(VPS)

MAX8786GTL+

(REF)

PR109

PR109 10_0603_NC

10_0603_NC

Intersil Note: PIN 39 is +3.3V_RUN. I would like to suggest this change to +3.3V_ALW. It will be the same as +5V_ALW sequence which is for ISL6260C and drivers

+3.3V_RUN

12

PR23

1.91K/F_0603

IMVP_PWRGD <13,28,38>

39

40

VIN

3V3

(NC)

(V3P3)

PGOOD

(IMVPOK)

FCCM

24

FCCM

(DRSKP#)

(CSN1)

50

PWM1

ISEN1

(CSP1)

PWM2

ISEN2

(CSP2)

PWM3

ISEN3

(CSP3)

OCSET

(ILIMPK)

VSUM

(PWR)

(CSN3)

DROOP

14

CSN3

12

PC184

PC184 .1U/16V/0603

.1U/16V/0603

VO

DFB

15

CSN2

12

PR24

PR24 0_0402_NC

0_0402_NC

(CSN2)

MAX8786_PWM1

27

23

MAX8786_PWM2

26

22

MAX8786_ PWM3

25

21

7

17

12

PC19 .33U/16V/0603_NCPC19 .33U/16V/0603_NC

16

12

PR27

PR27 0_0402_NC

0_0402_NC

PC9

PC9 330P/50V/0603_NC

330P/50V/0603_NC

12

C

12

PC15 .012U/50V/0603_NCPC15 .012U/50V/0603_NC

VO

12

PC185

PC185 .1U/16V/0603

.1U/16V/0603

PR10

PR10 226K/F_0402

226K/F_0402

PR100

11.5K/F_0402_NC

1 2

12

PC21 .033U/16V/0402_NCPC21 .033U/16V/0402_NC

12

PC98

PC98 .1U/16V/0603

.1U/16V/0603

D

+5V_ALW

12

PC103

PC103 1U/10V/0805

1U/10V/0805

FCCM

12

PC34

PC34 1U/10V/0805

1U/10V/0805

12

PC104

PC104 1U/10V/0805

1U/10V/0805

+5V_ALW

FCCM

PWR_MON <34>

+5V_ALW

FCCM

CSP1

CSP2

CSP3

12

1 2

VSUM

PR1074.53K/F_0402_NC PR1074.53K/F_0402_NC

2.43K/F_0402_NC

1 2

PR25

6.8K_0402_NC

1 2

Intersil Note: PR155 change to 13.7K for 60A OCP. We heard Santa Rosa CPU might have ~50A peak current with 10uS duration

PR112

17.8K/F_0402

PR26

PR26 15K/F_0402_NC

15K/F_0402_NC

17.8K/F_0402

1 2

PC99

PC99 .1U/10V/0402

.1U/10V/0402

1 2

22.1K/F_0402

PR15

1 2

PR105

1 2

5 2

6 3

9

5 2

6 3

9

5 2

6 3

9

(VDD)

(SKIP#)

VCC PWM

FCCM GND

PAD

(VDD)

(SKIP#)

PU3

BOOT

VCC PWM

UGTE

FCCM

PHSE

GND

LGTE

PAD

MAX8791GTA+

PU2

BOOT

VCC

(VDD)

PWM

UGTE

FCCM

PHSE

GND

LGTE

PAD

MAX8791GTA+

PU5

BOOT UGTE PHSE LGTE

MAX8791GTA+

E

PQ35

PQ35 FDS6298

FDS6298

PR21

PR21 0_0603

0_0603

1 2

12

PC23

.22U/10V/0603

1

UG1

8

PH1

7

LG1

4

PQ9

PQ9 SI7336ADP

SI7336ADP

PQ34

UG2 PH2 LG2

12

PC24

PC24 .22U/10V/0603

.22U/10V/0603

12

PC26

PC26 .22U/10V/0603

.22U/10V/0603

PQ34 FDS6298

FDS6298

PQ8

PQ8 SI7336ADP

SI7336ADP

PQ33

PQ33 FDS6298

FDS6298

PQ7

PQ7 SI7336ADP

SI7336ADP

1 8 7 4

PR28

PR28 0_0603

0_0603

1 2

PR37

PR37 0_0603

0_0603

1 2

UG3 PH3 LG3

F

876

9

4

2

351

876

9

2

351

876

9

4

2

351

876

9

4

2

351

RDS(ON)=4m ohm

876

9

4

2

351

876

9

4

2

351

PR135

2.2/F/1206_NC

1 2

12

PC138

1.5nF/50V/0603_NC

12

PC48

1.5nF/50V/0603_NC

12

PR47

2.2/F/1206_NC

PR134

2.2/F/1206_NC

1 2 12

PC134

1.5nF/50V/0603_NC

12

PC46

1.5nF/50V/0603_NC

12

PR46

2.2/F/1206_NC

PR138

2.2/F/1206_NC

1 2

12

PC140

1.5nF/50V/0603_NC

12

PC47

1.5nF/50V/0603_NC

12

PR48

2.2/F/1206_NC

G

+CPU_PWR_SRC

PC41

PC113

PC107

12

.1U/50V/0603

1 2

10U/25V/1206

2200P/50V0402

PL4

0.45U_ETQP4LR45XFC_25A_20%

2 1

4

PR149

2.2K/F_0603

1 2

12

PR146

7.68K/F_0805_NC

VSUM VO

RDS(ON)=12.5m ohm

PC119

PC116

12

.1U/50V/0603

2200P/50V0402

PL3

0.45U_ETQP4LR45XFC_25A_20%

2 1

4

PR148

2.2K/F_0603

1 2

12

PR145

7.68K/F_0805_NC

VSUM

12

PC120

PC117

.1U/50V/0603

2200P/50V0402

PL2

0.45U_ETQP4LR45XFC_25A_20%

2 1

3

4

2.2K/F_0603

2.2K/F_0603 PR150

PR150

1 2

12

PR147

7.68K/F_0805_NC

VSUM

CSN3

PC42

1 2

10U/25V/1206

3

PC111

PC111 .22U/10V/0603

.22U/10V/0603

1 2

PC123

1 2

10U/25V/1206

3

PC36

PC36 .22U/10V/0603

.22U/10V/0603

1 2

CSN2

PC124

1 2

10U/25V/1206

PC35

.22U/10V/0603

1 2

PR98

PR98 0_0402

0_0402

PR108

1 2

PR30

PR30 0_0402

0_0402

1 2

12

1 2

12

PC129

10U/25V/1206

1 2 12

PC122

10U/25V/1206

1 2

1

2

VO

PC40

10U/25V/1206

PR153

PR153 0_0402

0_0402

1 2

12

PR22

PR22 1_0402_NC

1_0402_NC

VO

1 2

PR152

PR152 0_0402

0_0402

1 2

PR151

PR151 0_0402

0_0402

PR31

PR31 1_0402_NC

1_0402_NC

1 2

12

PC128

12

10U/25V/1206

12

PC152

.1U/16V/0603

PC37

10U/25V/1206

12

PC153

.1U/16V/0603

PC39

10U/25V/1206

PC151

.1U/16V/0603

PC192

.1U/50V/0603

1 2

PC125

1 2

12

+

12

PC59

+

PC38

10U/25V/1206

12

+

10U/25V/1206

PC61

1 2

12

220U/2V/ESR7

PC60

220U/2V/ESR7

220U/2V/ESR7_NC

H

FL3

FBMH3225HM202NT

FL4

FBMH3225HM202NT

PC191

2200P/50V0402

+VCC_CORE

12

PC149

+

220U/2V/ESR7

+CPU_PWR_SRC

PC194

12

.1U/50V/0603

12

PC148

+

220U/2V/ESR7

+CPU_PWR_SRC

PC198

12

.1U/50V/0603

+VCC_CORE

12

PC150

+

220U/2V/ESR7_NC

+PWR_SRC

PC193

2200P/50V0402

+VCC_CORE

PC197

2200P/50V0402

PHASE 3 populate

Title

Size Document Number Rev

Date: Sheet of

A

B

C

D

E

F

Date: Sheet of

G

QUANTA

QUANTA COMPUTER

COMPUTER

CPU POWER

FM5 1A

45 51Tuesday, March 06, 2007

H

5

POWER STATES

Signal

State

SLP S3#

SLP S4#

SLP S5#

S4 STATE#

SLP M#

4

ALWAYS PLANE

M PLANE

SUS PLANE

RUN PLANE

3

CLOCKS

2

USB PORT#

1

DESTINATION

S0 (Full ON) / M0

D D

S3 (Suspend to RAM) / M1

S4 (Suspend to DISK) / M1 ON ON ON ONOFF

S5 (SOFT OFF) / M1 ON ON ON ONOFFLOW HIGH LOW HIGHLOW

HIGH HIGH

HIGH

LOW HIGH HIGH HIGH ON ON ON ONOFF

LOW HIGH HIGH HIGHLOW

HIGH

ON

ON ON ON

ON

ICH8-M

S3 (Suspend to RAM) / M-OFF

S4 (Suspend to DISK) / M-OFF HIGH

S5 (SOFT OFF) / M-OFF

LOW HIGH HIGH HIGH LOW ON ONOFF OFF OFF

LOW LOW LOW LOW ON OFF OFF OFF OFF

LOW LOW LOW LOW LOW ON OFF OFF OFF OFF

0 1 2 3 4 5 6 7

Right Top Right Bottom Side TOP Side Bottom Ext. USB TOP DIgital Camera Express Card WPAN/Bluetooth

PM TABLE

C C

State

S0

S3

S5 S4/AC

B B

S5 S4/AC don't exist

+3.3V_ALW +1.8V_SUS +3.3V_RTC_LDO

power

+3.3V_WLAN

plane

+5V_ALW +15V_ALW

ON

OFF

+0.9V_DDR_VTT +1.8V_LOM +3.3V_LAN +3.3V_SUS +5V_SUS

ON ON

ON

OFF

+1.05V_VCCP

+1.25V_RUN

+1.5V_CARD

+1.5V_RUN

+3.3V_CARD

+3.3V_CARDAUX

+3.3V_R5C832

+3.3V_RUN

+3.3V_RUN_CARD +2.5V_RUN +5V_MOD +5V_RUN +5V_SPK_AMP +CPU_PWR_SRC +VCC_CORE +VDDA

OFFON

OFF

+DC_IN +DC_IN_SS +PWR_SRC +RTC_CELL

ON

ECE 5011

PCI EXPRESS

Lane 1 Lane 2

8 9 1 2 3 4

DESTINATION MINI CARD-1 WWAN MINI CARD-2 WLAN

Ext. USB Bottom WWAN None None None None

Lane 3

PCI TABLE

PCI DEVICE IDSEL

REQ#/GNT#

PIRQ

Lane 4 Lane 5 Lane 6

BCM4401B

R5C833

A A

AD17 REQ#1 / GNT#1

5

REQ#0 / GNT#0AD16 PIRQB

PIRQC: Card reader PIEQD: 1394

4

3

MINI CARD-3 WPAN Express Card None None

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

QUANTA

QUANTA COMPUTER

COMPUTER

Schematic Block Diagram1

C & G UMA 1A

1

of

46 51Monday, March 05, 2007

of

46 51Monday, March 05, 2007

of

46 51Monday, March 05, 2007

1

A A

ICH8-M

AJ26

ICH_SMBCLK

AD19

ICH_SMBDATA

2

Express Card

3

WLAN WWAN

30 32

30 3278

4

WPAN

30 32

5

+3.3V_SUS

+3.3V_RUN

2N7002

2.2K2.2K G

G

DS

SD

6

+3.3V_RUN

7

8

197

DIMM 0

2.2K2.2K

MEM_SCLK

MEM_SDATA

195

197

195

DIMM 1

0A0h

0A4h

AC17

AE19

+3.3V_SUS

10K10K

AMT_SMBDAT

AMT_SMBCLK

+3.3V_ALW

+3.3V_RUN

2N7002

B B

13

12

CKG_SMBCLK

CKG_SMBDAT

G

SD

G

D

S

2.2K2.2K

CLK_SCLK

CLK_SDATA

16

17

CLK GEN

0D2h

+3.3V_ALW

4.7K 4.7K

100

THRM_SMBCLK

99

THRM_SMBDAT

C C

+3.3V_ALW

12 11

GUARDIAN

05Eh

SIO MEC5025

8

LCD_SMBCLK

7

LCD_SMBDAT

8.2K

+3.3V_ALW

8.2K

S39 S40

Inverter

A9H:Contrast AAH:Backlight

+5V_ALW

D D

8.2K 8.2K

8

PBAT_SMBCLK

7

PBAT_SMBDAT

100

1

2

3

4

10 9

3 4

CHARGER

Primary BATTERY

5

012h

016h

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

6

Date: Sheet of

COMPUTER

Schematic Block Diagram1

C & G UMA 1A

7

47 51Monday, March 05, 2007

of

8

5

4

3

2

1

Model

C/G

DISCRETE

D D

Item Page ECN NumberDate Rev. Issue Description Solution Description

1 7/13/200639-45 2

11 9/20/2006 2nd SATA HDD can't recognize Move 2nd SATA from port 1 to port 2

3 4

38 Disconnect GFX_PWRGD to system ( Delete R463 )9/20/2006 Gfx card timing error

538

9/20/2006 Gfx card timing error Disconnect +1.8V_RUN detect circuit to system ( Delete Q47 )

Item Id

Update PWR schematics Move PLTRST_DELAY# from EC to ICH8S3 resume fail9/20/200613,29

Update PWR schematics9/21/200639-456

7 23 9/21/2006 Add +1.8V_RUN for SATA buffer test (CON4.20-21-22-42-43-44)

8

37 10/2/2006

9 13 10/2/2006

10 28,33

28,29

C C

11 10/11/2006 Move DOCK_SMB_PME from MEC5025 SGPIO37 to ECE5018/5011

12 Add ATI_Intel to MEC5025 pin 14 and tie to GND.This connection

10/11/2006

10/11/200628,38

Update WLAN LED implementation.With the current implementation, there is a possibility for backdrive from the WLAN LED control signal to +3.3V_RUN while in S3 / S4 / S5. With the voltage rail being +3.3V_WLAN, there is a high probability that the LED will be illuminated while in S3 / S4 / S5.

Intel has advised that the pull-up on LINKALERT# be depopulated and that the pull-up on GPIO14 be 8.2k. Please update.

In order to leverage the M07 implementation, the sniffer LED circuit needs to be modified. The MEC5025 pins are being changed from active high to active low.

GPIOC0.Move DOCK_SMB_ALERT# from ECE5018/5011 GPIOC0 to MEC5025 SGPIO37

should be labeled ATI_Intel.

Please change the WLAN LED implementation to advice from Dell.

Depop R247 & change R227 from 10K ohm to 8.2K ohm

Change back VC08 design, rename SNIFFER_YELLOW to SNIFFER_YELLOW#, SNIFFER_GREEN to SNIFFER_GREEN# and remove R507 and R510.

DOCK_SMB_PME# should be pulled up to +3.3V_ALW DOCK_SMB_ALERT# should be pulled up to +5V_ALW

Remove 3.3V_LAN_PWRGD circuit from page 38 Delete 3.3V_LAN_PWRGD from MEC5025 pin 14 Add a connection from the MEC5025 pin 14 and tie to GND.

Move ALW_PWRGD_3V_5V from MEC5025 pin 18 to pin 2913 28 10/11/2006

14 13 10/11/2006

1315 10/11/2006

1) Move SIO_EXT_SCI# from ICH pin AG22 to ICH pin AC19

2) Delete R242 ( delete DOCKED# signal )

Reserve LOM_SMBALERT# (ICH8 AG22) & PU resister Change WPAN USB port from USBP7 to USBP416 24 10/16/2006

17 To resolve this issue, please use the HDDC_EN and MODC_EN circuits that are

B B

10/18/200623,29

18 12,14 10/18/2006

37

19

34

20

28

21

A A

10/23/2006

Modify HDDC_EN and MODC_EN Circuits to Resolve Glitch Issue. unintentionally for a brief moment.With the current Dawson design, it has been shown that the +15V_ALW rail comes up before the +3V_ALW rail on the original HDDC_EN and MODC_EN circuits. This can cause a momentary glitch at the gate of the power FET, which may cause the FET to turn on unintentionally for a brief moment.

WWAN Noise - ICH improvements. Add one .1 uF cap on each USB OC (over current) trace near the ICH. Add four .1uF caps in parellel to C813 close to the ICH pins. Add four .1uF caps in parellel to C825 close to the ICH pins.

attached below. These new circuits resemble closely our other load switch circuits, but require an additional FET and changes the sense of the HDDC_EN and MODC_EN signals to active high. Please note the use of +5V_ALW2 on these circuits. The +5V_ALW2 voltage comes directly from the LDO output on the 3V/5V switcher in your M08 design.

Add C871~C878 for USB OC. Add C867~C870 in parellel to C825. Add C748,C864~C866 in parellel to C813.

Use LED_MASK# to control BT LED to prevent leakage Add R336 & change Q13 to BJT

Feedback from SMSC has indicated that the pull-up rail on 5V_CAL_SIO1# needs to change from +5V_SUS to +3.3V_SUS.This is necessary because the GPIO on the EMC4001 is 3V tolerant, not 5V.

Due to the power on defaults of the MEC5025, the pull-downs on the KSI lines of the MEC5025 need to be stronger, to avoid pulses from powering on certain power rails. Please do the following:

1. Change pull-down on SUS_ON to 2.7k

2. Change pull-down on RUN_ON to 2.7k

Pullup is at reference designator R298. Change pull-up rail on 5V_CAL_SIO1# to +3.3V_SUS.

Change R355,R358 to 2.7K

22 10/23/200624

Add SMBus isolation circuitry for WLAN.Add isolation circuitry for SMBus on WLAN.

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

QUANTA

QUANTA COMPUTER

COMPUTER

Change List

JM7B 1A

JM7B 1A Monday, March 05, 2007

Monday, March 05, 2007

1

of

149

5

4

3

2

1

Model

C/G

DISCRETE

Item Page ECN NumberDate Rev. Issue Description Solution Description

23 10/26/200617

24 37 10/26/2006 Change LED control method

Item Id

Chipset side spec. Differetial CLK raise/fall slew rate is 2.5~8 V/ns, only express card and mini card is 0.6~4V/ns. BITCLK rise/fall slew rate in 1-3 V/ns &

Change serial resistors ( PR4,PR5,PR10,PR12,PR13 ) to meet the CLK SPEC

25 37 10/26/2006 Add OR gate for BT_ACTIVE

D D

10/26/200626 13

M08 GPIO A14 update. Original EC5011 pin66 CCD_VDD_ON move to IC8 pinAD10 GPIO48 and add 100K ohm pull down.

Move CCD_VDD_ON from EC5011 pin66to IC8 pin AD10 GPIO48 and add 100K ohm pull down.

27 25 10/26/2006 For Comm team suggestion ( GG list ), pop C217 for WWAN 28 39 - 45 10/31/2006 PWR team updat schemtics - 10/23

C C

B B

A A

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

COMPUTER

Change List

JM7B 1A

JM7B 1A Monday, March 05, 2007

Monday, March 05, 2007

1

of

150

6

5

4

3

2

1

Model

C/G

F F

DISCRETE

Item Page Date Rev. Issue Description

29

39 11/1/2006 For +3.3V_RUN inrush current, it may over OCP ( 12.36 A ) Change PC58 from 470 pF to 6800 pF

30 31 32

11/3/2006

32

11/3/2006

32

ECN Number Item Id

For EMI request, add RC circuit for Mini card clk request24 - 25 11/1/2006 Add R543, C880, R186, C649, R544, C181

For AP - THN+D fail, change C306, 307 to 0.033uF/16V/X7R/1206 & C326, C329 to 1uF/16V/X7R/1206

'PO' noise in resume from S3,S4,S5

Change C306, 307 to 0.033uF/16V/X7R/1206 & C326, C329 to 1uF/16V/X7R/1207

Reserved the AUD_AMP_MUTE# for 'PO' noise 33 39 - 45 11/09/2006 PWR team updat schemtics - 11/08 34 17 11/09/2006 Change R44 to 2.2K per Intel recommend value. 35

12 - 13 11/21/2006

13

E E

36 11/21/2006

37 32 11/22/2006 add 100kohm resistor (R253) between pin 40 and +3.3V_RUN and a 1000pF cap

35 - 36 11/28/2006

38

Due to Intel-ICH8 uses GPIO20 pin AE11 as an Internal Strapping at power up GPIO18 is default as an output at power up, it will drive 1Hz output at

power up. Per Intel this GPIO could not be connected to GND

There is potential back drive from the codec DVdd back to the AVdd supply due to an internal ESD diode

GG list -- COMM team request

Move PCIE_MCARD2_DET# from GPIO20 to ICH8 GPIO5/PIRQH# pin B3.

Add 4.7K series - R547 resistor to separate it

(C643 below) from Pin 40 to ground

1.Change capacitor for U5 pin 79, 94,106 (VDDIO) (C18, C16, C25) to 47pF.

2.Change those three capacitors (C27, C37,C34) to 47pF

3.Add C644 - 47pF capacitor by the pin 57 of U5

4.Change L7 to 0805 package -BK2125LM152. & C23 to 47 pF

5.Add Ferrite Bead BK1608LM152 on 1.8V to EPHY_AVDD pin 57

39 28-29 11/28/2006

D D

40

24 12/01/2006 GG list -- Seperate debug port with MINI-PCI if not necessary Add 4 0ohm resistors for these pins

41 24 - 25

12/01/2006 GG list -- Delete decoupling cap Delete C222 & C424

Move DOCK_SMB_PME from MEC5025 SGPIO37 to ECE5018/5011 GPIOC0.Move DOCK_SMB_ALERT# from ECE5018/5011 GPIOC0 to MEC5025 SGPIO37

DOCK_SMB_PME# should be pulled up to +5V_ALW DOCK_SMB_ALERT# should be pulled up to +3.3V_ALW

42 39 - 45 12/04/2006 PWR team updat schemtics - 12/04

43 32

12/08/2006

GG List -- Change audio AMP to TI solution 1.Change codec to TPA9040A4

2.Pop R505, C619 & C614; depop R506, R504 & R497

C C

12/13/200644 31 GG List -- Change power source for LED of dash board Change JTP1.9 from +3.3V_RUN to +5V_ALW 45 39 - 45 12/19/2006 PWR team updat schemtics - 12/19 46 28 GG List -- Remove EC5025 pin15 GPIO4 AUD_AMP_MUTE# circuit. NC R538

12/25/2006

12/25/200647 34 GG List -- Add THERMATRIP_VGA# function Pop R441,442,443 and Q35, C568 for THERMATRIP_VGA# trip. 48 33 12/28/2006 Modify CCD power control soft start function Change C403 , R284 connect method

B B

QUANTA

A A

Title

Size Document Number Rev

Date: Sheet of

6

5

4

3

Date: Sheet

2

QUANTA COMPUTER

COMPUTER

EMI & Screw hole

C & G UMA 2A

of

50 51Monday, March 05, 2007

1

6

5

4

3

2

1

Model

C/G

F F

DISCRETE

Item Page Date Rev. Issue Description

49 22 1/11/2006

50

29 1/11/2006

51

37

1/24/2007

52

1/24/200732

33 1/24/2007

53

E E

54

37 2/5/2007 Blue LED brightness is too high Change R30,R50,R75,R64 & R36 from 220 ohm to 330 ohm

55

30 2/12/2007 Prevent SPI CLK overshoot/undershoot issue Add C896 for RC circuit but not pop it

ECN Number Item Id

XD card detect function error Base on A16 GPIO : Change net name from BID2 to CHIPSET_ID1 Add 0ohm_NC(R571) resistor pad connected from Coex1_BT_Active_MINI to

Coex1_BT_Active

Audio solution for pass EMI 225MHz and 451MHz radiation emission test. Added R560, R561, R562 and R563 on AUD_SPK_L1, AUD_SPK_L2, AUD_SPK_R1,

Audio solution for pass EMI 225MHz and 451MHz radiation emission test.

AUD_SPK_R2 trace

Added R564, R565, R566 and R567 on AUD_LINE_OUT,AUD_HP_OUT

GG List -- CCD_ON pull down R258 100K NC.1/24/200713

56 39 - 45 2/12/2007 PWR team updat schemtics - 2/12

57 29 2/12/2007 GG List -- CIR function intermidiate issue ECE5021 pin7 PWRGD need to pull-down to GND with 0 ohm - Add R568 PD resistor

& R569 series resistor ( NC )

58 44 3/1/2007 PWR team updat schemtics - 3/1

D D

59 17 3/2/2007 Per TDC COMM team request - Change L65 to Fine tune 14M CLK - Change R57 from 33 to 15 ohm & L65 to BLM18SG260

0460 3/2/2007 Per reliability issue - Move C98 to C249 De-pop C98 & pop C249

C C

B B

QUANTA

A A

Title

Size Document Number Rev

Date: Sheet of

6

5

4

3

Date: Sheet

2

QUANTA COMPUTER

COMPUTER

EMI & Screw hole

C & G UMA 2A

of

51 51Wednesday, March 07, 2007

1