5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
48
Change List
Chang e expla natio n
FJ delet e R4 58, c hange SUSC# cont rol fo r uns table when mous e_on is H igh S USC# is LOW
HW chang e CN 12 fo otprin t to 5 0501 -00801 -001- 8p-l
HW chang e CN 21 fo otprin t to 50 501-01 50n- 001-15p-l
HW chang e CN 9 FP to 50501- 0120n -001-12p-l
Item Stage Page O wner
01 A->A + 36
ESD c hange L3~L 6 PN to CY450 0Q2Z0 0, F/ P to qfn 2-3_3 x3_3- 2_77 for ME hight l imit
HW chang e L1 5 PN to C X5PX1 81000 , F/P to f1x 0_5-0 _8 for DGS STD part
35,37
35,36
ESD change U3 7,U38 ,U40 PN t o BC 10650 6000 , F/P to esd1 0-4_1 x2-8-1 1p fo r STD part , res erve E C622~ 624
,and DEL U14,U 36
EE chang e L1 2,L13 PN t o CX 121T0 3000, F/P to RC04 02 for STD part
EE chang e L2 2 PN to C X08T6 00000 , F/P to RC0 603 f or STD part
EE chang e L2 7 to 0oh m_6 f or AM D CRB no requ est
EE Chang e co nnect ion ar ound D26 f or sol ve wh en "5 V_HDM I" to G ND sh ort, D26 w ill b reak at firs t
EE chang e D2 5 PN to B CRB50 0VZ29 , F/P to DSM for STD pa rt
PWR c hange PC7 F/P to C C0603
EE reser ve R 575,R 576 fo r GRE EN CL K & X' TAL o ption PWR
conne ct AU 1.49 t o GND for bett er di sssip ate heat
EE stuff PR1 65(CP U cont rol), unst uff PR 69(EC cont rol), for C PU co ntol VR-E N pow er seq uency EE
stuff PR21 0(DDR _PG c ontrol ), un staff PR20 9(S0_ ON_1) ,for contol DDR_ VTERM power sequ ency
EE unstu ff C 312 o nly re serve for WW15 4 /10 I ntel VCCDS W3 G3 c an't boot issue .
SMT change C5 47 F/ P to EC AP6_3 X6_1- 7_2 f or sol ve SM T so lder open e asily is sue
EE chang e L1 6,L18 ,L19 F /P to R C0402 for CVA68 02JN17
EE reser ve S 0_ON_ 3 for contr ol 5V _S0 to meet intel DGS p ower sequen cy
EE chang e PW R/B L ED con trole d by P WRLED 0#
EE reser ve ( R577, R578) 1.5V_ S0 fo r VCCH DA by intel :If t he ci rcuit is designed
and c onfig ured for H D Au dio V CCHDA shoul d be co nnect ed to 3 .3V or 1 .5V
EE reser ve A udio Codec DVDD- IO to 1. 5V_S 0 (AR 22), defaul t stu ff AR 27 (3V _S0)
EE reser ve S 0_ON_ 1(PR24 4) to c ontrol 1.0 5V_S0
EE reser ve S 0_ON_ 2(PR24 5,PR2 46,PR 247) to cont rol 1 .5V_S0
EE reser ve G PU_ON _EC(R5 79) to contro l GPU _ON dire ctly
EE chang e CN 20 F/ P to 50 501-0 0801 -001-8p-l
EE chang e F5 P/ N to DK300 WFU0 07, F /P to f3_18 x1_52- 2_665
EE chang e D3 4 P/N to BCBA T54CZ 01, F/ P to so t323_ 213-2_1-1_3-b at54s w-7- f and delet e D36 for D GS EE
chang e WLA N LED powe r sour ce to 5 V_S5 by F J SPE C
EE Delet e D/ C# to AC _PRES ENT t hrough R243 , wil l cau se D/ C# lo ck un know s tate.
EE chang e PR 234 t o 8. 8K(CS 38872F B18) to m odify the OCP of 3V_S0
02 A-> A+ 32
03 A-> A+ 34
04 A-> A+ 36
05 A-> A+ 29
06 A->A + 23
07 A ->A+ 38 PWR cha nge P J1 F/ P to bat-btd-08 cabd ab-8p-l for DFAD08M R071
08 A->A +
12,17 ,29 ESD change D3,D 4,D5, D6,D8 ,D16, D27,D 28,D3 5 PN to BC5123 01Z02 , F/P to d-1 x0_6- 0_6h for D GS STD part
09 A ->A+ 37 EE ex change EC signa l: GP U_ON_ EC & FAN 1_PWM for FAN D AC control
10 A->A +
28,32 ,34 EMI exchan ge LP 1~LP8 PN to C X12B9 00000 , F/P to choke -dlw2 1s-4p for S TD part
11 A-> A+ 32
12 A-> A+ 23
13 A-> A+ 27
14 A-> A+ 21
15 A-> A+ 26
16 A-> A+ 26
17 A-> A+ 38
18 A-> A+ 12
19 A-> A+ 39
20 A-> A+ 10
21 A-> A+ 31
22 A-> A+ 43
23 A-> A+ 41
24 A-> A+ 16
25 A-> A+ 32
26 A-> A+ 26
27 A-> A+ 27
28 A-> A+ 34
29 A-> A+ 16
30 A-> A+ 31
31 A-> A+ 40
32 A-> A+ 41
33 A-> A+ 20
34 A-> A+ 31
35 A-> A+ 32
36 A-> A+ 10
37 A-> A+ 33
38 A-> A+ 34
EE chang e PW R/B L ED pow er so urce to 5V_S 3 by FJ SPEC
PWR c hange PR23 8 to 84.5K
39 A-> A+ 39
40 A-> A+ 21
EE add T opaz PS_3 bits strap tabl e
EE Chang e L1 0,L23 PN t o CX 8PG12 1009 for R DC ST D p arts
leaka ge fr om EC.
EE
delet e GPU _PROCH OT# c ontro l fro m EC and add G PIO as TP90, stuff C159 , R85 to avoid 3V_G PU
1 A+- >B 21,3 7
name to GPU_A C_BATT .Rese rve R 580 P U to 3V_ S0 fo r GPU _AC_B ATT.
2 A+- >B 16 EE c hange +VCC _DSW net n ame t o 3V _S5 f or sam e net.
B sta ge
delet e R95 , add Q33 on GPU_A C_BAT T to av oid 3 V_GPU leaka ge fr om EC . Chan ge GP U_AC_ BATT# net
EE un-stu ff PC4 7, PR 93, S tuff P R92(0 .95V_ GPU c ontro l by GP U_ON) for GPU p ower sequen cy. EE
DEL n et al ias B IF_VD DC. DEL V MEMIO powe r symb ol fo r sam e net n ame.
41 A-> A+ 23
42 A-> A+ 45
43 A-> A+ 23
44 A-> A+ 21
EE unstu ff R 95,R8 5,R90, C159 for 3 V_GPU leaka ge fr om EC
EE unstu ff P R229, PR231, stuff PR23 2,PR22 8 for 3V_S 0 hav e lea kage level while AC is inse rted
45 A->A + 39
un-stuf f PR2 46,PR2 22, 1 .5V_S 0 con trole d by S0 _ON_2
EE
Stuff PR24 4, un- stuff PR20 1, 1. 05V_S 0 con trole d by S0_ ON_1; stuf f PR245,P R247,
A+->B 40, 423
un-stuf f PR2 46,PR2 22, 1 .5V_S 0 con trole d by S0 _ON_2
EE
Stuff PR24 4, un- stuff PR20 1, 1. 05V_S 0 con trole d by S0_ ON_1; stuf f PR245,P R247,
45A+->B 40,43
A+->B 31,37
PWR Add AU3,A R28,A R29,A C40, AC41,A C42 f or Au dio co dec s equen ce. EC add L DO en able pin A UD_1. 5_ON.
PWR A dd PR 583,P R582 for S3 _ON/S 0_ON_ 2 PD fo r pul se issue.
EE un-stu ff R1, R4,C1 ,U2, stuff R5 for LVDS B OM fo r H/W C/D.
A+->B 42
A+->B 28
6
7
8
A+->B 10,11,29 EE
un-stuf f Y3,Y 5,R35 9,R50 3,C456 ,C45 7,C52 0,C52 2; cha nge R6 2 t o RC0 402 u nstaf f & ad d R581 f or
9,10, 11,
20,21 ,23,
28,29 ,30,
33,35 ,36,
37
green CLK s oluti on.
chang e 0 ohm to shrot pad for S MT ru le: R 120; R489,R355 ,R439; R438, R190, R420, R358, R484,R 451,
12,13 ,16, R4 44,R 481,R 482;R 527,R1 88,R5 22,R4 97,R20 3,R53 1,R19 9,R52 5,R22 3;R44 9,R43 6,R141, R132, R178 ,R173 ,R410 ;
R332, R330, R105, R104; R342;L 2,L1; R17,R 16,R1 1,R12 ,R60; R573; R136,F 3;R56 7,R56 8;R383 ;L17 ,R426, L14,
R425, R404, R334, R361, R119.
A+->B
17,18 ,19,EER337, R196, R172,R 508,R 140,R 116,R 248,R 182,R 499;R 253;R5 51;R5 48,R54 2;R38 1;R32 8,R98 ,R353 ,R360 ,R349 ,
9
ME chang e CN 4 to 10p in (D FWF10 MR004) for STD part
ME chang e CN 2 to DFF C08FR 031, F/P to 505 01-00 801-0 01-8p-l
10 A+-> B 29
11 A+-> B 34
ME chang e CN 3 to DFF C06FR 050, F/P to 8819 4-064 1-6p-l
50696-0300m -001- 30p-l
ME
chang e CN6 to DFFC 30FR0 93, F/ P to 50 696-0 300m- 001-30p-l, ch ange CN8 to D FFC30 FR093 , F/P to
12 A+-> B 34
13
A+->B 35
14 A+-> B 21
15 A+-> B 37
EE chang e C2 03,C2 08 to 10p for X'tal
EE chang e R3 43,R3 52 to 4.7 K for EC some time c an no t det ect G PU thermal
16 A+-> B 43
17 A+-> B 31
EE Stuff PC1 25 fo r USB3 .0 ca n't r econiz e dev ice issue
EE un-stu ff AR2 9,AC4 0,AU3 ,AC42, stuf f AR3 0 for audi o cod ec 1. 5V pow er ch ange to 1.5V_S0
EE un-stu ff R34 6, Q1 7, st uff Q1 7 for GPU S3,S4 will wake up.18 A+->B 21
TP54
EE
un-stuff PR24 2, ad d PR58 4, de l PR 243, change 5V_S 0 con trol by S0_O N_1 , c hange EC S0_O N_3 to
19 A+->B 37,4 2
20 A+->B 36
EE chang e C5 11 to 12 p for X'tal
EE chang e 1. 5V_S0 contr oled by S 0_ON_ 3: AD D PR5 85, PR586
21 A+->B 37,4 2
22 A+->B 43
EE stuff PC1 19, P C122 f or US B3.0 TSSC
EE Del EC EC_Bo ard I D, ch ange to TP90 for u nuse pin.
23 A+-> B 37
24 A+-> B 10
EE stuff Q25 and add R5 82 fo r EC cle ar C MOS.
EE chang e R4 51,R4 44,R48 1,R41 8,R43 0,R483 to 33oh m for SPI signa l waveform.
25 A+-> B 11
26 A+-> B 38
PWR c hange PJ2 pin d efine for FJ in comm on us e
PWR change CN 20 t o 10 pin & add sleev e, ri ng2 p in fo r MIC cross talk iss ue
27 A+-> B 31
28 A+-> B 35
EE rever se C N8(lo w SKU) KB CON f or ME c hange locat ion f orm B OT to T OP
EE chang e HD MI le vel sh ifter to PS84 07A f or 4 Kx2K eye di agram fail
29 A+-> B 28
30 A+-> B 37
EE ADD H igh SKU,L OW SKU BOAR D ID for MMB
PWR P R206 chang e to 6 .49K
31 A+->B 40
32 A+->B 28,3 2
EE chang e US B LP1 ,LP6,L P7,LP 8,LP2 to 0 oh m for C/D
EE add 2 2uF( C621) for 1 .5V_G PU ri pple, add 4 70uF* 2(C62 2,C62 3) fo r VGA _CORE r ipple .
33 A+-> B 23
34 A+-> B 08
BIOS cahng e to GP IO46 r eserv e GPI O49 as SMI e vent contro l pin for more c ustom er re ques t func tion.
PWR c ahnge PR15 5 to 200 K ohm for VGA_CO RE offset .
35 A+-> B 44
36 A+-> B 28
EE cahng e LC D con n powe r & si gnal p in de fine to avoi d RTD 2132 damage d.
EE chang e R2 13, R 274 to 1K & R 480, R465 to 499 ohm f or NFC fast mode .
37 A+-> B 11
38 A+-> B 11
EE DEL Y 3,C4 56,C4 57,R35 9,R36 7,R36 8 and ADD T 54 fo r VCC _CORE layo ut sp acing.
PWR R evers e CN2 0 pin defin e for ty po.
39 A+-> B 31
40 A+-> B 26
EE chang e EC 16,EC 17,EC1 8,C23 7,C24 2,C256 to 5p for V SIS f ine-t uned.
PWR change PR 167 to 105K (CS410 53F91 9) fo r Imon adjust ment
41 A+-> B 43
42 A+-> B 34
EE chang e CN 3 FP to 50506- 00641 -v01-6p-l
EE follo w PD G:cha nge C4 44,C4 48,C4 45,C45 2 22F , uns tuff C4 43,C4 46,C44 9,C45 4
43 A+-> B 16
44 A+-> B 36
ME chang e H1 6 FP to H-FH8-2
ME chang e CN 5 to DFH D10MS 119 a nd rev erse pin defi ne.
45 A+-> B 35
46 A+-> B 41
PWR Change PL 18 to CV- 10M0M Z02 f or Sta ndard part
PWR change CN 20 fo r SCH & BRD pind efine not mactch.
47 A+->B 42
chang e H16 FP back to H-TC 256BC1 85D14 6P2, H26 to H -FH8 -2, H 3 to H-TC 181BI C102D 102P2 ,
H14 to H-FH8 -3, H 29 to H-O 181X17 3D102 X94P2 ,H32 to H-TC 315BC 394D12 6P2, H31 to
H-TC 197BC2 56D15 0P2, H33 to H -C394 D126P 2, H3 4 to H- C394D1 26P2, for layou t
ME
H4,H8 ,H15,H 20 to H- C315D 126P2 , H9 to H-TC31 5BC2 36D126 P2, H1 0 to H-TC315BC 217D1 10P2,
48 A+->B 36
ME chang e H1 8 FP to H -FH8- 4, H 21 to H- FH8-6, H2 7 to H-FH8-5 , H3 0 to H-FH8- 749 A+->B 36
chang e PR9 8,PR21 3,PR2 05,PR 200, PR239, PR210 ,PR22 5,PR18 5,6P, R63,P R64,P R66,P R165, PR71,P R74,P R132
R267, R502, R500, R310, R68 to s hort PA D
39,40 ,41
29
50 A+->B
42,43 ,45
EE/PW R
PR31,P R196,P R192, PR84, PR92, PR35,P R145,P R144, PR143 ,PR1 41,PR4 3,R532 ,R533 ,R534 ,R535 ,R267, R269
46,44 ,32
PWR c hange PC50 , PC5 1 to 0.1uF/ 0402
PWR unstuff A R13,A R14,A C23, AC24,A C25,A C32,A C39 fo r aud io nois e.
51 A+-> B 39
52 A+-> B 31
ME chang e PW R CON N(CN3) to DFFC0 6FR10 6 , Hig h SKU KB CON (CN6) to D FFC3 0FR091
EE Del TP 83,TP8 4,TP8 5,TP8 6,TP87 ,TP88
53 A+->B 34,3 5
54 A+->B 34
EE chang e to sh ort p ad: AR17,AR1 8,AR 19,AR2 7,R28 9,R28 8,R30, R32
EE chang e HU 1 to PS8 201A & R 221 t o 3.3 K ohm for C/D
55 A+-> B 31
56 A+-> B 28
PWR c hange AQ1, AQ5 F /P to sot 323_21 3-2_ 1-1_3 -1_1h
ME Del H17
57 A+-> B 31
58 A+-> B 36
ME chang e H9 F/ P to H-TC 315BC 276D1 26P2, H10 to H-TC3 35BC21 7D11 0P2
PWR change PU 11 to T PS512 25CRU KR(AL 05122 5001) for MMB
59 A+-> B 36
60 A+-> B 39
EMI r eserv e EC6 25-EC 630 fo r EMI
EE chang e C6 09 to 10 uF fo r ven der sugges t.
61 A+-> B 38
62 A+-> B 30
63 A+-> B 29
64 A+-> B 38
EE Unstu ff C 421 & C42 7 for vend er su ggest
PWR D el EC 14 fo r ME r eques t
ME chang e H3 1 F/P to h-tc 217bc 256d15 0p2
ME change H31 F /P to h- tc197bc256d150p2
65 A+-> B 36
66 A+-> B 36
EE chang e R3 71 & R4 01 to 2 .2K fo r ver der sugges t.67 A+->B 26
to VR_EN tim ing.
EE
stuff R454 ,R435, U30,C 487,C 499; un-st uff R 453,Q 23,C49 5; ch ange R448 to 10k ohm f or VCCST _PWRG D
68 A+-> B 13
69 A+-> B 11
EE chang e R4 74,R4 63 to 33 ohm, R451 ,R444, R481 t o 0 ohm for S PI si gnal quilty.
C stage
1
2
EE unsta ff R 582 f or PDT C144E U alr eady h ave i ntern al PD.
ME Chang e CN 3 to DFF C06FR 050 f or ASS Y. li ne re quest ME cha nge c onnect or type.
B->C 10
B->C 34
EE chang e R2 85,R2 78,R28 2,R28 0,R28 6,R287 to 150 ohm, R281, R279 to 220 o hm for LED brig htnes s. EE
chang e F5 to DK260 TPU00 3, F/ P to f1 812 fo r STD parts.
B->C 33
B->C 32
3
4
ME chang e CN 8 to DFF C30FR 091, F/P to 5 0541- 0300n -001-30p-l fo r ASS Y. li ne reques t.
EE swap U27 AMP_M UTE# & CLR_C MOS (p in 10 8 & 2) fo r G3 boo t to S0 will have a plus e to clear C MOS.
B->C 35
B->C 37
5
6
EE chang e CN 3 F/P to 5050 6-006 41-v01 -6p-l for DGS.
EE chang e EC 16,EC 17,EC1 8,C23 7,C24 2,C256 to 2pF for VISI.
B->C 34
B->C 26
7
8
EE chang e R4 49,R4 36 to 0oh m and un-st uff, R454, R435 to short PAD for r educin g 0oh m.
EE chang e R3 37 to 0 oh m fro m sho rt pa d for follo w int el CR B add 0ohm .
9 B-> C 13
10 B-> C 16
11 B-> C 37
EE chang e D2 4 dir ection for ME c an't unloc k i ssue
EE chang e JL CD1 F /P to 515 19-040 01-001-40p-L for DGS change
12 B->C 28
Chang e expla natio n
for r eserv e EC co ntrol GPU p ower seq uence :
PR92 chang e to 0o hm un- stuff , PR9 3 cha nge to 0ohm stuf f.
PR196 chan ge to 0 ohm st uff. reser ve PR5 87 fo r GP U_RST #_EC c ontro l. ad d dis -cha rge SC H for opti on.
PR31 chang e to 0o hm and rese rve P R588 f or GP U_AC _BATT contr ol 1.5V _GPU.
PR35 chang e to 0o hm stu ff, V GA_CO RE res erve cont rol 0 .95_EN chan ge to GP U_AC_ BATT.
Item Stage Page Owner
13 B->C 44,4 5,46 EE
14 B->C 32
15 B->C 36
EE reser ve P R593 P U to 3V_GP U.16 B->C 45
EE stuff U37 ,U38, U40 fo r USB 3 ESD solu tion
ESD change H2 0 F/P to H-C 315IC 285D1 26P2f or ESD requ est.
chang e H31 F/P t o H-TC236 BC185 D146P 2, H1 1,H19 to H-TC 217BC 185D14 6P2 , H31 to
ME
H-TC2 56BC1 97D150 P2 fo r ME change
17 B->C 36
18 B->C 36
ME chang e H1 3 F/P to H-TC 217BC 185D14 6P2 f or ME ch ange .
ME chang e H2 0 F/P to H-C3 15IC2 50D126 P2 fo r ME chang e.
19 B->C 36
20 B->C 34,3 5,36 EE chan ge R3 80,R37 9,R29 0,R29 1,R441 ,R442 to sh ort pa d, un- stuff LP3 ,LP4, LP5 f or C/D.
21 B->C 28
22 B->C 38
EE chang e HU 1 to PS8 407A and R 221 to 4 .99Ko hm for HDMI EA ite m 7-10
EMI R eserv e EC3 8, EC 39(10u /25V) on CS_IN
23 B->C 16 EE Chan ge t he ca p's v alue of C265, C273,C 257,C 251,C 451,C 455 f rom 4 .7U/6 .3V_4 to 47U/4V _6
And d el C2 90, C 252, C450 f or me et In tel DG sugges tion
EE cahng e F1 to DK200 UFU00 2 for PDC sugge st DGS.
PWR change AR 12,AR 25 to 0 ohm, AL6,A L7 to 47 ohm f or po p noise.
24 B->C 28
25 B->C 31
MP1 stage
01 C->D 10 EE R506 cha nge s hort PAD fr om 0 o hm for cost down
02 C->D 11 EE R432 cha nge s hort PAD fr om 0 o hm for cost down
EE R578 chan ge sh ort PA D fro m 0 ohm for cost down03 C->D 16
04 C->D 34 EE R466 cha nge s hort PAD fr om 0 o hm for cost down
05 C->D 42 PWR PR194/P R195/P R584 /PR24 1/PR5 86/PR5 85 ch ange short PAD f rom 0 o hm fo r cost down
06 C->D 41 PWR PR216 c hange shor t PAD from 0 ohm for c ost down
07 C->D 39 PWR PR221/P R232/P R227 /PR22 8 cha nge sh ort P AD fr om 0 ohm for c ost down
08 C->D 31 ADO AR1/AR2 /AR3/A R4/A R30 c hange short PAD from 0 ohm for c ost down
09 C->D 38 PWR PR117/P R7 cha nge short PAD from 0 ohm f or cos t down
10 C->D 40 PWR PR203/P R244 c hange shor t PAD from 0 ohm f or co st down
11 C->D 46 PWR PR591/P R196 c hange shor t PAD from 0 ohm f or co st down
12 C->D 45 PWR PR29/PR 31/PR9 3 cha nge s hort PAD f rom 0 ohm fo r cos t down
PWR PR40/PR14 0/PR3 5/PR1 60/P R56/PR 55/PR 61 ch ange s hort PAD f rom 0 ohm f or co st down
ME CN9 c hang e PN to D FFC12 FR117 & DFF C12FS 000 , a nd F/ P to 505 01-01 201-001 -12p-l fo r ME request.
13 C->D 44
14 C->D 36
ME CN2,C N12 chang e PN to DF FC08FR 093 & DFFC08 FR055 ,F/P to 50501 -008 0n-001-8p-l for ME r eques t.
ME CN20 chan ge PN to D FFC10 FR123, F/P to 51619- 0100n -001- 10p- l for ME requ est.
15 C->D 32, 34
16 C->D 31
ME CN21 chan ge PN to D FFC15 FR010 & DFFC 15FR01 3, F/ P to 505 01-0 1541- 001-1 5p-l f or ME req uest.
ME H11,H 19 c hange PN t o FBAJ200 3010 f or AS SY r eques t.
17 C->D 34
18 C->D 36
ME CN3 c hang e PN to D FFC06 FR177 & DFF C06FR 172,F /P to 505 06-006 0n-v01-6p- l for ME reque st
ME CN22 add 2nd s ource PN DFFC 06FR17 9 for ME req uest
19 C->D 34
20 C->D 35
ME CN5 c hang e to DFH D10MS 236 & DF HD10M S235 f or ME r equest
ME CN4 c hang e to DFH D10MS 237 & DF HD10M S238, F/P t o 50 273-0 1001- 001-1 0p-l for ME request
21 C->D 35
22 C->D 36
EE PU8 d el p in24. 25 for layo ut sy mbol c hange EE
CN1 D FHD11 MR028 EOL, chang e to DFHD1 1FR16 3
23 C->D 40
24 C->D 30
EE CN17 chan ge to DF HS12F S032, F/P to 5 0169- 01241 -002-12p-ldh for S MT ad d Mylar25 C->D 35
Siiizzzeee DocuuumentttNuuumber
ChangeHiiistttory
Reeevvv 222A
Daaattteee::: Wednesdddaaayyy,,, Noovvvemberr 1119, 201444 Sheet444888 oooff 444888
Quanta Computer Inc.
PROJECT : FH9