Quanta EW6 DA0EW6MB6F1, Satellite Pro L20, Satellite Pro L25 Schematic
1
2
3
4
5
6
7
8
CPU CORE
+3VPCU
A A
+3V_S5/+3VSUS
Page:26
+3V
+5VSUS/+5V
+12V
Page:24
+1.8VSUS/+1.8V
+1.2V
SMDDR_VTERM
Page:27
B B
+1.8V_S5
+1.5V
VTT
Page:23
BATTERY CHARGER
Page:25
Power State Table
Power
Name
VCC_CORE
C C
+3VPCU
+3V_S5
+3VSUS
+3V
+5VSUS
+5V
+12V
+1.2V
VTT
Control
Signal
VRON
N/A
S5_ON
SUSON
MAINON
SUSON
MAINON
MAINON
MAINON
MAINON
VCC_CORE
+3VPCU
+3V_S5
+3VSUS
+3V
+5VSUS
+5V
+12V
+1.8VSUS
+1.8V
+1.2V
SMDDR_VTERM
+1.8V_S5
+1.5V
VTT
Power
State
S0
ALWAYS
S0-S5
S0-S3
S0
S0-S3
S0
S0
S0
S0
CLOCK GEN
ICS951413CGLFT
Page:4
DDR-II SODIMM1
Page: 13
DDR-II SODIMM2
Page: 13
Manufacturing Option
SATA HDD
Page: 16
PATA HDD
Page: 16
IDE-ODD
Page: 16
AUDIO CODEC
CONEXANT
20468-31
Page: 18
AMP
MAX9750
Page: 19
CONEXANT
MODEM
20493-21
Page: 18
CELERON-M/PENTIUM-M
DDR-II
SATA
ATA 66/100
ATA 66/100
AC97
EW6
INTEL Mobile_479 CPU
Page:2, 3
HOST BUS 400MHZ
NB
ATi
RC410MB/RC410MD
Page: 5, 6 , 7, 8
2X PCIE
SB
ATi SB400
Page: 9, 10, 11, 12
LPC 33MHZ
KBC
NS
PC97551
Page: 21
RGB
LVDS
S-VIDEO
PCI BUS 33MHZ
USB 2.0
REALTEK
RTL8100CL
TI PCMCIA
PCI1510A
AD17
REQ3# / GNT3#
INTE#
Page: 17
MINI-PCI
Wireless LAN
AD20
REQ1# / GNT1#
INTB# , INTC#
Page: 14
Page: 22
BOTHHAND
TRANSFORMER
NS0013
CRT
Page: 15
LVDS
Page: 15
TV-OUT
Page: 15
Page: 14
TYPE II
SLOT
Page: 17
RJ45
Page: 14
SYSTEM
USB PORT *3
Page: 20
USB2,3,5
Size Document Number Rev
Date: Sheet of
BLOCK DIAGRAM
7
PROJECT : EW6
Quanta Computer Inc.
1 29Monday, June 27, 2005
8
1A
1
MAINON
S5_ON
SUSON
MAINON
MAINON
S0
S0-S5
S0-S3
S0
S0
2
MIC IN
Page: 18
SPEAKER
Page: 19
LINE OUT
Page: 19
3
RJ11
Page: 14
Touchpad
4
Keyboard
Page: 22Page: 22
FLASH
Page: 21
5
FAN
Page: 22
6
SMDDR_VTERM
+1.8V_S5
D D
+1.8VSUS
+1.8V
+1.5V
A
HA#[3..31]{5}
4 4
HADSTB0#{5}
HADSTB1#{5}
HREQ#0{5}
HREQ#1{5}
HREQ#2{5}
3 3
2 2
1 1
HREQ#3{5}
HREQ#4{5}
HLOCK#{5}
DEFER#{5}
HTRDY#{5}
FERR#{9}
IGNNE#{9}
CPUPWRGD{9}
STPCLK#{9}
CPUSLP#{9}
DPSLP#{9}
HA#[3..31]
ADS#{5}
H_IERR#
BPRI#{5}
BNR#{5}
HIT#{5}
HITM#{5}
RS#0{5}
RS#1{5}
RS#2{5}
A20M#{9}
SMI#{9}
T34
T35
T36
T37
INTR{9}
NMI{9}
HBREQ0#
BPM0#
BPM1#
BPM2#
BPM3#
CPUPWRGD
TCK
TDO
TDI
TMS
TRST#
HCLK_ITP
HCLK_ITP#
PREQ#
PRDY#
DBR#
CPUSLP#
DPSLP#
THERMDA
THERMDC
THERMTRIP#
CPU_PROCHOT#
U18A
HA#3
P4
A3#
HA#4
U4
A4#
HA#5
V3
A5#
HA#6
R3
A6#
HA#7
V2
A7#
HA#8
W1
A8#
HA#9
T4
A9#
HA#10
W2
A10#
HA#11
Y4
A11#
HA#12
Y1
A12#
HA#13
U1
A13#
HA#14
AA3
A14#
HA#15
Y3
A15#
HA#16
AA2
A16#
HA#17
AF4
A17#
HA#18
AC4
A18#
HA#19
AC7
A19#
HA#20 HD#17
AC3
A20#
HA#21
AD3
A21#
HA#22
AE4
A22#
HA#23
AD2
A23#
HA#24
AB4
A24#
HA#25
AC6
A25#
HA#26
AD5
A26#
HA#27
AE2
A27#
HA#28
AD6
A28#
HA#29
AF3
A29#
HA#30
AE1
A30#
HA#31
AF1
A31#
U3
ADSTB0#
AE5
ADSTB1#
R2
REQ0#
P3
REQ1#
T2
REQ2#
P1
REQ3#
T1
REQ4#
N2
ADS#
A4
IERR#
N4
BREQ0#
J3
BPRI#
L1
BNR#
J2
LOCK#
K3
HIT#
K4
HITM#
L4
DEFER#
C8
BPM0#
B8
BPM1#
A9
BPM2#
C9
BPM3#
M3
TRDY#
H1
RS0#
K1
RS1#
L2
RS2#
C2
A20M#
D3
FERR#
A3
IGNNE#
E4
PWRGOOD
B4
SMI#
A13
TCK
A12
TDO
C12
TDI
C11
TMS
B13
TRST#
A16
ITP_CLK0
A15
ITP_CLK1
B10
PREQ#
A10
PRDY#
A7
DBR#
D1
LINT0
D4
LINT1
C6
STPCLK#
A6
SLP#
B7
DPSLP#
B18
THERMDA
A18
THERMDC
C17
THERMTRIP#
B17
PROCHOT#
Banias_Processor
Banias
REQUEST
PHASE
SIGNALS
ERROR
SIGNALS
ARBITRATION
PHASE
SIGNALS
SNOOP PHASE
SIGNALS
RESPONSE
PHASE
SIGNALS
PC
COMPATIBILITY
SIGNALS
DIAGNOSTIC
& TEST
SIGNALS
EXECUTION
CONTROL
SIGNALS
THERMAL DIODE
1 OF 3
DATA
PHASE
SIGNALS
B
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
DBI0#
DBI1#
DBI2#
DBI3#
DBSY#
DRDY#
BCLK1
BCLK0
INIT#
RESET#
DPWR#
A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
C23
C22
K24
L24
W25
W24
AE24
AE25
D25
J26
T24
AD20
M2
H2
B14
B15
B5
B11
C19
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
CPURST#
HD#[0..63]
HD#[0..63] {5}
HDSTBN0# {5}
HDSTBP0# {5}
HDSTBN1# {5}
HDSTBP1# {5}
HDSTBN2# {5}
HDSTBP2# {5}
HDSTBN3# {5}
HDSTBP3# {5}
HDBI0# {5}
HDBI1# {5}
HDBI2# {5}
HDBI3# {5}
DBSY# {5}
DRDY# {5}
HCLK_CPU# {4}
HCLK_CPU {4}
CPUINIT# {9}
CPURST# {5}
DPWR# {5}
C
H/W MONITOR
+3V
R62 47
THERMDC
10 mil trace /
10 mil space
THERMDA
R250
CPU_PROCHOT#
THERMTRIP#
330-4
VTT
R77 330-4
R252
33/F-4
2
1 3
15 MIL
3V_THM
C109
.1U-4
C128
2200P-4
R68
1K
2
Q9
MMBT3904
1 3
2
Q11
MMBT3904
C162
1U
+3V
1 3
U8
1
3
2
4 5
ADM1032AR
R70
330-4
PROCHOT#
Q10
MMBT3904
D
+3V
R65
R67
10K-4
10K-4
VCC
DXN
DXP
-OVT GND
6
-ALT
KBSMDAT
7
SMDATA
1632RESET# {24} 1632RESET# {24}
8
SMCLK
PROCHOT# {10}
KBSMCLK
R63
10K-4
THER_OVT#
THER_OVT#
+3V
R64
10K-4
DBR#
CPUPWRGD
TDI
TMS
TDO
CPURST#
H_IERR#
HBREQ0#
THERMTRIP#
CPU_PROCHOT#
FERR#
DPSLP#
CPUSLP#
BPM0#
BPM1#
BPM2#
BPM3#
TCK
TRST#
R542 0-6
+3V
Q7
2
CH2507S
1
+3V
Q8
2
CH2507S
1
PWROK{6,10,21}
Addition Thermal shunt down 6/21 Sagem
MBDATA
3
MBCLK
3
R272 150-4
R106 330-4
R256 150-4
R266 39/F-4
R257 *54.9/F-4
R263 220-4
R288 56-4
R111 220-4
R253 56-4
R251 56-4
R107 56-4
R285 220-4
R286 220-4
R271 54.9/F-4
R270 54.9/F-4
R267 54.9/F-4
R258 54.9/F-4
R254 27.4/F-4
R255 680-4
R541
330-4
2
1 3
E
Q33
PMBS3904
MBDATA {21,25}
MBCLK {21,25}
+3V
VTT
CPU
A
Size Document Number Rev
CPU ( HOST BUS )-1
B
C
D
Date: Sheet of
PROJECT : EW6
Quanta Computer Inc.
E
2 29Monday, June 27, 2005
3A
A
R240 27.4/F-4
R116 27.4/F-4
R242 54.9/F-4
R115 54.9/F-4
4 4
VCC_CORE
VTT
C358
1000P-4
C235
1000P-4
C360
1000P-4
C236
1000P-4
C359
1000P-4
COMP0
COMP2
18 MIL
COMP0 ~ 4 max length 500 MIL
COMP1 GTLREF0
COMP3
PLACE one 10U & one 0.01U for each VCCA pin
C75
C81
10U-8
C156
.1U-4
C383
10U-8
C154
.01U-4
10U-8
3 3
C191
C196
.1U-4
.1U-4
10U/6.3V/X5R(CC0805) *30
2 2
C201
10U-8
C147
10U-8
C89
10U-8
1 1
C103
10U-8
C126
10U-8
C78
10U-8
C165
10U-8
C200
10U-8
C188
10U-8
C186
10U-8
C159
10U-8
C193
10U-8
C202
10U-8
C187
10U-8
C179
10U-8
C168
10U-8
C195
10U-8
C166
10U-8
C203
10U-8
C178
10U-8
C197
10U-8
C237
10U-8
C155
.01U-4
C153
10U-8
C194
10U-8
C180
10U-8
B
C79
.01U-4
C205
.01U-4
C382
.01U-4
C204
10U-8
C158
10U-8
C198
10U-8
C167
10U-8
CPU_VCCA
C95
.01U-4
C189
10U-8
VCC_CORE
VCC_CORE
VCC_CORE
C232
.01U-4
VTT
C371
150U/6.3V-7343
C177
10U-8
C118
10U-8
C139
10U-8
R52 1K/F
VTT
A0 : STUFF
A1 : NC
R112 0-8
+1.8V
R113 *0-8
+1.5V
at least 40 MIL shape
1.5V FOR DOTHAN ONLY
C
R53
2K/F
CPU_VCCA
COMP0
COMP1
COMP2
COMP3
0.5" max
5 MIL
R105
*1K-4
VCC_CORE
TEST1
TEST2
R241
*1K-4
P25
P26
AB2
AB1
AD26
E26
AC1
AC26
D18
D20
D22
E17
E19
E21
G21
H22
K22
V22
W21
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
G1
C5
F23
N1
B1
F26
D6
D8
E5
E7
E9
F6
F8
F18
F20
F22
G5
H6
J5
J21
U5
V6
W5
Y6
U18B
COMP0
COMP1
COMP2
COMP3
GTLREF0
GTLREF1
GTLREF2
GTLREF3
TEST1
TEST2
VCCA3
VCCA2
VCCA1
VCCA0
VCC00
VCC01
VCC02
VCC03
VCC04
VCC05
VCC06
VCC07
VCC08
VCC09
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
Banias_Processor
Banias
2 OF 3
POWER,
GROUND,
RESERVED
SIGNALS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
D
CPU_VID0{26}
CPU_VID1{26}
CPU_VID2{26}
CPU_VID3{26}
CPU_VID4{26}
CPU_VID5{26}
R264 *54.9/F-4
R268 *54.9/F-4
HBSEL1{4}
HBSEL0{4}
E
U18C
VTT
D10
VCCP0
D12
VCCP1
D14
VCCP2
D16
VCCP3
E11
VCCP4
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21
P23
W4
E2
F2
F3
G3
G4
H4
Z0501
AE7
Z0502
AF6
Z0503
Z0504
Z0506
Z0508
B2
AF7
C14
C3
C16
E1
R6
R22
R25
T3
T5
T21
T23
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
Banias_Processor
T51
T38
T45
T52
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
POWER, GROUND AND NC
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
VCCP25
VCCP26
VID0
VID1
VID2
VID3
VID4
VID5
VCCSENSE
VSSSENSE
NC0
NC1
NC2
NC3
TEST3
PSI
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Banias
3 OF 3
VID
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSVSS
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24W22
CPU
Size Document Number Rev
CPU ( POWER )-2
A
B
C
D
Date: Sheet of
PROJECT : EW6
Quanta Computer Inc.
E
3 29Monday, June 27, 2005
1A
5
4
3
2
1
+3V
L48 SBK160808T-301Y-S
D D
C C
ALINK_RST#{5,9,16,20}
STP_CPU#{9,26}
Reserved
1
CLK_VDD
C427
22U/16V-1206
+3V
R176
*4.7K
32
Q12
*CH2507S
R179 0
C309
.1U-4
C317
C315
.1U-4
C312
.1U-4
C304
.1U-4
.1U-4
1- PLACE ALL THE SERIES TERMINATION
RESISTORS AS CLOSE AS U300 AS POSSIBLE
2- ROUTE ALL CPUCLK/#, NBCLK/# AND
ITPCLK/# AS DIFFERENT PAIR RULE
3- PUT DECOUPLING CAPS CLOSE TO U300
POWER PIN
Parallel Resonance Crystal
C424 22P
C425 22P
Y6
14.31818MHz
CLK_EN#{26}
SCLK{10,13}
SDATA{10,13}
21
C303
.1U-4
Ioh = 5 * Iref
(2.32mA)
Voh = 0.71V @ 60 ohm
SBK160808T-301Y-S
L49
C308
.1U-4
CLK_VDD_USB
R351
1M
R352 0
CLK_EN#
EXT_CPU_STP#
CLK_VDD_USB
C428
.1U-4
CLK_VDD
R184
475/F
U22
45
VDDCPU
35
VDD_SRC
32
VDD_SRC1
21
VDD_SRC2
14
VDD_SRC3
3
VDD_48
51
VDD_PCI
56
VDD_REF
44
VSS_CPU
36
VSS_SRC
31
VSS_SRC1
26
VSS_SRC2
20
VSS_SRC3
15
VSS_SRC4
5
VSS_48
49
VSS_PCI
55
VSS_REF
1
XIN
2
XOUT
6
VTTPWRGD#/PD
48
CPU_STP#
7
SCLK
8
SDATA
37
IREF
ICS951413CGLFT
VDDA
VSSA
CPUT0
CPUC0
CPUT1
CPUC1
CPUT2
CPUC2
SRCT0
SRCC0
SRCST0
SRCSC0
SRCST1
SRCSC1
SRCT1
SRCC1
SRCT2
SRCC2
SRCT3
SRCC3
SRCT4
SRCC4
SRCT5
SRCC5
CLKREQ0
CLKREQ1
PCIF0/CK410#
USB_48
FSC
REF1/FSB
REF0/FSA
REF2
39
38
47
46
43
42
41
40
34
33
30
29
27
28
24
25
22
23
18
19
16
17
12
13
10
11
50
4
9
53
54
52
CLK_VDDA
ITPCLK_R
ITPCLK#_R
CPUCLK_R
CPUCLK#_R
NBCLK_R
NBCLK#_R
ALINKCLK_R
ALINKCLK#_R
SBSRCCLK_R
SBSRCCLK#_R
USBCLK_R
C311
C310
.1U-4
22U/16V-1206
R365 33-4
R369 33-4
R373 33-4
R378 33-4
R382 33-4
R387 33-4
R392 33-4
R405 33-4
R409 33-4
R416 33-4
R419 33-4
R422 33-4
R408 33-4
R412 33-4
R390 33-4
R403 33-4
R381 33-4
R385 33-4
R372 33-4
R377 33-4
R364 33-4
R368 33-4
R360 33
R359 33
+3V
L27 SBK160808T-301Y-S
R366 49.9/F-4
R370 49.9/F-4
R374 49.9/F-4
R379 49.9/F-4
R383 49.9/F-4
R388 49.9/F-4
R393 49.9/F-4
R406 49.9/F-4
R410 49.9/F-4
R417 49.9/F-4
R418 49.9/F-4
R421 49.9/F-4
R407 49.9/F-4
R411 49.9/F-4
R389 49.9/F-4
R402 49.9/F-4
R380 49.9/F-4
R384 49.9/F-4
R371 49.9/F-4
R376 49.9/F-4
R363 49.9/F-4
R367 49.9/F-4
CLK_VDD
NBCLK# {7}
NBCLK {7}
HCLK_CPU# {2}
HCLK_CPU {2}
ALINKCLK {6}
ALINKCLK# {6}
SBSRCCLK {9}
SBSRCCLK# {9}
USBCLK {10}
FSA
0
1
0
1
0
1
0
1
CY28RS400 and ICS951411
are fully pin compatible and
can be interchanged without
any hardware modification.
CPU
MHz
266.66
133.33
200.00
166.66
333.33
100.00
400.00
Rsvd
3
FSB
FSA
OSC14M_R
R177 4.7K
R354 4.7K
R175 4.7K
R174 33-4
R357 33-4
Size Document Number Rev
EXTERNAL CLKGEN
2
Date: Sheet of
BSEL0FSC
BSEL1
SB_OSCIN {7,10}
OSC14M {7}
PROJECT : EW6
Quanta Computer Inc.
4 29Monday, June 27, 2005
1
1B
VTT
B B
HBSEL1{3}
HBSEL0{3}
A A
R361 0
R180 0
R358
1K
R355
*0
R181
1K
R178
*0
BSEL1
BSEL0
HBSEL1 HBSEL0
0 0
0 1
BSEL1 {6}
BSEL0 {6}
133 MHz
100 MHz
CK410 FREQUENCY SELECT TABLE(MHZ)
FSC
FSB
BSEL0
BSEL1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
CLK
5
4
5
4
3
2
1
MA[17..0]{13}
D D
M_DM[7..0]{13}
M_RAS#{13}
M_CAS#{13}
M_WE#{13}
M_DQS[7..0]{13}
C C
M_DQS#[7..0]{13}
B B
MA[17..0]
M_DM[7..0]
M_DQS[7..0]
M_DQS#[7..0]
M_CLKOUT0#{13}
M_CLKOUT0{13}
M_CLKOUT1#{13}
M_CLKOUT1{13}
M_CLKOUT3#{13}
M_CLKOUT3{13}
M_CLKOUT4#{13}
M_CLKOUT4{13}
M_CKE0{13}
M_CKE1{13}
M_CKE2{13}
M_CKE3{13}
M_CS#0{13}
M_CS#1{13}
M_CS#2{13}
M_CS#3{13}
M_ODT0{13}
M_ODT1{13}
M_ODT2{13}
M_ODT3{13}
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
MA16
MA17
M_DM0
M_DM1
M_DM2
M_DM3
M_DM4
M_DM5
M_DM6
M_DM7
M_DQS0
M_DQS1
M_DQS2
M_DQS3
M_DQS4
M_DQS5
M_DQS6
M_DQS7
M_DQS#0
M_DQS#1
M_DQS#2
M_DQS#3
M_DQS#4
M_DQS#5
M_DQS#6
M_DQS#7
U17C
AK27
MEM_A0
AJ27
AH26
AJ26
AH25
AJ25
AH24
AH23
AJ24
AJ23
AH27
AH22
AJ22
AF28
AJ21
AG27
AJ28
AH21
AJ17
AG15
AE20
AF25
Y27
AB28
R26
R28
AJ29
AG28
AH30
AJ18
AE14
AF22
AE25
W27
AB29
P25
R29
AH17
AF15
AE22
AF26
W26
AB30
R25
R30
AC26
AC25
AF16
AE16
V29
V30
AC24
AC23
AG17
AF17
W29
W28
AH20
AJ20 AE29
AE24
AE21
AH29
AG29
AH28
AF29
AG30
AE28
AC30
Y30
PART 3 OF 6
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_A15
MEM_A16
MEM_A17
MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7
MEMB_RAS#
MEMB_CAS#
MEMB_WE#
MEM_DQS0P
MEM_DQS1P
MEM_DQS2P
MEM_DQS3P
MEM_DQS4P
MEM_DQS5P
MEM_DQS6P
MEM_DQS7P
MEM_DQS0N
MEM_DQS1N
MEM_DQS2N
MEM_DQS3N
MEM_DQS4N
MEM_DQS5N
MEM_DQS6N
MEM_DQS7N
MEM_CK0N
MEM_CK0P
MEM_CK1N
MEM_CK1P
MEM_CK2N
MEM_CK2P
MEM_CK3N
MEM_CK3P
MEM_CK4N
MEM_CK4P
MEM_CK5N
MEM_CK5P
MEM_CKE0
MEM_CKE1 MEM_COMPN
MEM_CKE2
MEM_CKE3
MEM_CS0#
MEM_CS1#
MEM_CS2#
MEM_CS3#
MEM_ODT0
MEM_ODT1
MEM_RSRV2
MEM_RSRV3
MEM_B I/F
MEM_COMPP
MEM_VMODE
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63
MEM_CAP2
MEM_CAP1
MEM_VREF
MPVDD
MPVSS
AJ16
AH16
AJ19
AH19
AH15
AK16
AH18
AK19
AF13
AF14
AE19
AF19
AE13
AG13
AF18
AE17
AF20
AF21
AG23
AF24
AG19
AG20
AG22
AF23
AD25
AG25
AE27
AD27
AE23
AD24
AE26
AD26
AA25
Y26
W24
U25
AA26
Y25
V26
W25
AC28
AC29
AA29
Y29
AD30
AD29
AA30
Y28
U27
T27
N26
M27
U26
T26
P27
P26
U29
T29
P29
N29
U28
T28
P28
N27
AJ15
N30
AJ14
AB27
AD28
AB26
AA27
MDQ0
MDQ1
MDQ2
MDQ3
MDQ4
MDQ5
MDQ6
MDQ7
MDQ8
MDQ9
MDQ10
MDQ11
MDQ12
MDQ13
MDQ14
MDQ15
MDQ16
MDQ17
MDQ18
MDQ19
MDQ20
MDQ21
MDQ22
MDQ23
MDQ24
MDQ25
MDQ26
MDQ27
MDQ28
MDQ29
MDQ30
MDQ31
MDQ32
MDQ33
MDQ34
MDQ35
MDQ36
MDQ37
MDQ38
MDQ39
MDQ40
MDQ41
MDQ42
MDQ43
MDQ44
MDQ45
MDQ46
MDQ47
MDQ48
MDQ49
MDQ50
MDQ51
MDQ52
MDQ53
MDQ54
MDQ55
MDQ56
MDQ57
MDQ58
MDQ59
MDQ60
MDQ61
MDQ62
MDQ63
MEM_COMPN
MEM_COMPP
RC410MB
MPVSS need to connect to GND plane
+1.8VSUS
A A
immediately through
a dedicated VIA
C368
R261
.1U
1K/F
C173
R83
.1U
1K/F
MEM_VREF
CLG
5
4
R259 61.9
R249 61.9
C370 .47U
C364 .47U
R260 1K
L40
SBK160808T-301Y-S
C369
1U
MDQ[63..0]
ALINK_RST#{4,9,16,20}
+1.8VSUS
+1.8VSUS
+1.8V
MDQ[63..0] {13}
SUS_STAT#{10}
VTT
R69
49.9/F-4
R79
100/F
Place close to NB,
Use 10/10 width/space
+1.8VSUS
C531
.1U-4
D3 SW1010C
21
D2 SW1010C
21
C163
1U
C532
.1U-4
3
+1.8VSUS
VTT
+1.8V
NB_GTLREF
C533
.1U-4
HREQ#[0..4]{2}
HADSTB0#{2}
HADSTB1#{2}
ADS#{2}
BNR#{2}
BPRI#{2}
DEFER#{2}
DRDY#{2}
DBSY#{2}
DPWR#{2}
HLOCK#{2}
HTRDY#{2}
HITM#{2}
HIT#{2}
R58
27K
RS#[2..0]{2}
CPURST#{2}
NB_PWRGD{7,21}
R54 49.9/F-4
R55 24.9/F
L16
SBK160808T-301Y-S
Place close to NB
CPVSS need to connect to GND plane
immediately through
a dedicated VIA
C534
.1U-4
+1.8V
CPU_COMP_P
CPU_COMP_N
CPVDD
C142 1U
C157 220P
C535
.1U-4
R43
1.8K
C536
.1U-4
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
T4
T1
T3
T2
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
RS#0
RS#1
RS#2
C537
.1U-4
G28
H26
G27
G30
G29
G26
H28
J28
H25
K28
H29
J29
K24
K25
F29
G25
F26
F28
E29
H27
M28
K29
K30
J26
L28
L29
M30
K27
M29
K26
N28
L26
N25
L25
N24
L27
F25
F24
E23
E25
G24
F23
G22
E27
F22
E24
D26
E26
G23
D23
D25
C11
E11
AH14
A3
E3
B11
D11
H21
H20
H22
AH13
AJ13
C4
2
U17A
CPU_A3#
CPU_A4#
CPU_A5#
CPU_A6#
CPU_A7#
CPU_A8#
CPU_A9#
CPU_A10#
CPU_A11#
CPU_A12#
CPU_A13#
CPU_A14#
CPU_A15#
CPU_A16#
CPU_REQ0#
CPU_REQ1#
CPU_REQ2#
CPU_REQ3#
CPU_REQ4#
CPU_ADSTB0#
CPU_A17#
CPU_A18#
CPU_A19#
CPU_A20#
CPU_A21#
CPU_A22#
CPU_A23#
CPU_A24#
CPU_A25#
CPU_A26#
CPU_A27#
CPU_A28#
CPU_A29#
CPU_A30#
CPU_A31#
CPU_ADSTB1#
CPU_ADS#
CPU_BNR#
CPU_BPRI#
CPU_DEFER#
CPU_DRDY#
CPU_DBSY#
CPU_DPWR#
CPU_LOCK#
CPU_TRDY#
CPU_HITM#
CPU_HIT#
CPU_RS0#
CPU_RS1#
CPU_RS2#
RESERVED0
CPU_CPURST#
RESERVED1
SUS_STAT#
SYSRESET#
POWERGOOD
CPU_COMP_P
CPU_COMP_N
CPVDD
CPVSS
CPU_VREF
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
RC410MB
C538
.1U-4
PART 1 OF 6
CPU_DSTB0N#
CPU_DSTB0P#
ADDR. GROUP 1 ADDR. GROUP 0CONTROLMISC.
CPU_DSTB1N#
CPU_DSTB1P#
CPU_DSTB2N#
CPU_DSTB2P#
AGTL+ I/F
CPU_DSTB3N#
CPU_DSTB3P#
Size Document Number Rev
Date: Sheet of
E28
CPU_D0#
D28
CPU_D1#
D29
CPU_D2#
C29
CPU_D3#
D30
CPU_D4#
C30
CPU_D5#
B29
CPU_D6#
C28
CPU_D7#
C26
CPU_D8#
B25
CPU_D9#
B27
CPU_D10#
C25
CPU_D11#
A27
CPU_D12#
DATA GROUP 0DATA GROUP 1DATA GROUP 2DATA GROUP 3
C24
CPU_D13#
A24
CPU_D14#
B26
CPU_D15#
C27
CPU_DBI0#
A28
B28
C19
CPU_D16#
C23
CPU_D17#
C20
CPU_D18#
C22
CPU_D19#
B22
CPU_D20#
B23
CPU_D21#
C21
CPU_D22#
B24
CPU_D23#
E21
CPU_D24#
B21
CPU_D25#
B20
CPU_D26#
G19
CPU_D27#
F21
CPU_D28#
B19
CPU_D29#
E20
CPU_D30#
D21
CPU_D31#
A21
CPU_DBI1#
D22
E22
C18
CPU_D32#
F19
CPU_D33#
E19
CPU_D34#
A18
CPU_D35#
D19
CPU_D36#
B18
CPU_D37#
C17
CPU_D38#
B17
CPU_D39#
E17
CPU_D40#
B16
CPU_D41#
C15
CPU_D42#
A15
CPU_D43#
B15
CPU_D44#
F16
CPU_D45#
G18
CPU_D46#
F18
CPU_D47#
C16
CPU_DBI2#
D18
E18
E16
CPU_D48#
D16
CPU_D49#
C14
CPU_D50#
B14
CPU_D51#
E15
CPU_D52#
D15
CPU_D53#
C13
CPU_D54#
E14
CPU_D55#
F13
CPU_D56#
B13
CPU_D57#
A12
CPU_D58#
C12
CPU_D59#
E12
CPU_D60#
D13
CPU_D61#
D12
CPU_D62#
B12
CPU_D63#
E13
CPU_DBI3#
F15
G15
Quanta Computer Inc.
RC400MB-AGTL+ I/F
HD#[0..63]
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HDBI0# {2}
HDSTBN0# {2}
HDSTBP0# {2}
HDBI1# {2}
HDSTBN1# {2}
HDSTBP1# {2}
HDBI2# {2}
HDSTBN2# {2}
HDSTBP2# {2}
HDBI3# {2}
HDSTBN3# {2}
HDSTBP3# {2}
PROJECT : EW6
1
HD#[0..63] {2}HA#[3..31]{2}
5 29Monday, June 27, 2005
1A
5
4
3
2
1
CLG
R34
4.7K
R40
*4.7K
1 3
R30 4.7K
R39 *4.7K
R27
*4.7K
+3V
R32
4.7K
R44 *4.7K
R47 4.7K
2
Q5
MMBT3904
2
1 3
VTT+3V
2
Q3
*MMBT3904
Q4
MMBT3904
R523 1K
D D
BMREQ#{9}
R33
HSYNC{7,15}
C C
VSYNC{7,15}
B B
SCL_STRAP{7}
*4.7K
R31
4.7K
Q6
MMBT3904
VTT
2
R25
*4.7K
13
+3V
Change on 4/6
R238
4.7K
13
+3V
BSEL1 {4}
BSEL0 {4}
DAC_SCL: CPU VCC
DEFAULT:0
0: MOBILE CPU
1: DESKTOP CPU
PWROK {2,10,21}
BSEL1 BSEL0
0 0
0 1
133 MHz
100 MHz
BMREQ#&HSYNC&VSYNC: FSB CLK SPEED
DEFAULT: 101
101: 100 MHZ RC410MB
100: 133 MHZ RC410MD
A_RX0P{9}
A_RX0N{9}
A_RX1P{9}
A_RX1N{9}
ALINKCLK{4}
ALINKCLK#{4}
BMREQ#{9}
R42 0
R38 0
T32
T33
AA5
AA4
AB4
AB3
AC6
AC5
AD5
AD4
AF8
AG8
AG6
AG7
AK7
AJ7
AG4
AH4
AG9
AG10
AE9
AF10
U17B
J5
J4
K4
L4
L6
L5
M5
M4
N4
P4
P6
P5
R5
R4
T4
T3
U6
U5
V5
V4
W4
W3
Y6
Y5
K2
L2
M2
M1
H2
RC410MB
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_CLKP
SB_CLKN
GFX_CLKP
GFX_CLKN
BMREQ#
PART 2 OF 6
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
PCE_TXSET
PCE_ISET
PCE_PCAL
PCE_NCAL
N1
N2
P2
R2
R1
T1
T2
U2
V2
V1
W1
W2
Y2
AA2
AA1
AB1
AB2
AC2
AD2
AD1
AE1
AE2
AF2
AG2
AG1
AH1
AH2
AJ2
AJ3
AJ4
AK4
AJ5
AJ8
AJ9
AE6
AF6
AJ6
AK6
AE4
AF4
AJ10
AJ11
AK9
AK10
AK13
AJ12
AH12
AG12
A_TX0P_C
A_TX0N_C
A_TX1P_C
A_TX1N_C
PCE_TXSET
PCE_ISET
PCE_PCAL
PCE_NCAL
C354 .1U-4
C357 .1U-4
C349 .1U-4
C352 .1U-4
R246 10K
R244 8.25K
R56 150
R57 82.5
+1.2V_NB
A_TX0P {9}
A_TX0N {9}
A_TX1P {9}
A_TX1N {9}
A A
STRP_DATA{7}
5
R28 4.7K
+3V
4
STRP_DATA:Debug strap
DEFAULT:1
0: MEMORY CHANNEL STRAPING
1: E2PROM STRAPING
Size Document Number Rev
RC400MB-PCIE LINK I/F
Date: Sheet of
3
2
PROJECT : EW6
Quanta Computer Inc.
2A
6 29Monday, June 27, 2005
1
5
L14
L37
10U-8
10U-8
C351
C90
C362
10U-8
AVDDQ
PLVDD
AVDD_NB
C355
1U
C80
1U
RSET resistor need 10mils
trace with at least 10mils
spacing.
Also need to connect GND
at AVSSQ HF cap.
+1.8V
SBK160808T-301Y-S
D D
+1.8V
SBK160808T-301Y-S
C C
PUT AVDD_NB, AVDDDI, AVDDQ,
PLVDD DECOUPLING CAPS ON THE
BOTTOM SIDE, CLOSE TO BALLS
B B
AVDDQ
4
(1.8V)
C361
.1U
+3V
PLVDD
SB_OSCIN{4,10}
L38
SBK160808T-301Y-S
+1.8V
C60
.1U
.1U
VSYNC{6,15}
HSYNC{6,15}
VGA_RED{15}
VGA_GRN{15}
VGA_BLU{15}
OSC14M{4}
NBCLK{4}
NBCLK#{4}
PHL_CLK{15}
PHL_DATA{15}
AVDD_NB
C363
.1U
R248 715
R35
R29 10K
*22-4
NB_VDDR
1%
3
C345
.1U
G5
G4
C9
C10
D8
C8
B8
B9
H10
H9
H3
B3
C3
B10
F10
E10
D10
G1
K1
G2
D2
C1
J2
J1
F1
C346
1U
U17D
VDDR3_1
VDDR3_2
AVDD
AVSSN
AVDDDI
AVSSDI
AVDDQ
AVSSQ
PLLVDD
PLLVSS
TMDS_HPD
DDC_DATA
DACVSYNC
DACHSYNC
RSET
RED
GREEN
BLUE
OSCIN
CPU_CLKP
CPU_CLKN
TVCLKIN
OSCOUT
I2C_CLK
I2C_DATA
L35
SBK160808T-301Y-S
PART 4 OF 6
CRT
CLK. GEN.
+3V
SVID
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
LPVDD
LPVSS
LVDDR18A_1
LVDDR18A_2
LVSSR_1
LVSSR_2
LVSSR_3
LVDDR18D
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
TXCLK_UP
TXCLK_UN
TXCLK_LP
TXCLK_LN
COMP
DACSCL
DACSDA
STRP_DATA
C
Y
B4
A4
B5
C6
B6
A6
B7
A7
E5
F5
D5
C5
E6
D6
E7
E8
J8
J7
H8
H7
G9
G8
G7
C7
E2
G3
F2
F8
F7
F6
G6
D9
F9
E9
B2
C2
D1
2
LVDS_BLON
TXUOUT0- {15}
TXUOUT0+ {15}
TXUOUT1- {15}
TXUOUT1+ {15}
TXUOUT2- {15}
TXUOUT2+ {15}
TXLOUT0- {15}
TXLOUT0+ {15}
TXLOUT1- {15}
TXLOUT1+ {15}
TXLOUT2- {15}
TXLOUT2+ {15}
C56
C59
.1U
.1U
LCD_POWER_ON {15}
TXUCLKOUT+ {15}
TXUCLKOUT- {15}
TXLCLKOUT+ {15}
TXLCLKOUT- {15}
TV_C/R {15}
TV_Y/G {15}
STRP_DATA {6}
DAC_SCL is totem-pole output
NB_LPVDD
C66
.1UC97
NB_LVDDR18A
R36 0
R41 0
R45 4.7K
+3V
1
C72
1U
C58
1U
C57
1U
SCL_STRAP {6}
DDCCLK {15}
DDCDAT {15}
+1.8V
L15
SBK160808T-301Y-S
L12
SBK160808T-301Y-S
RC410MB
+3V
U5
SN74LVC1G08DCKR
53
A A
NB_PWRGD{5,21}
LVDS_BLON
CLG
5
4
3
1
4
2
BLON {15}
Size Document Number Rev
RC400MB-VIDEO & CLKGEN
Date: Sheet of
2
PROJECT : EW6
Quanta Computer Inc.
1B
7 29Monday, June 27, 2005
1
5
4
3
2
1
CLG
D D
U17F
W5
VSSA#U5
W6
AB5
AB6
V8
V7
AA8
AA7
AD7
AD8
R8
N8
R7
N7
AF7
AE8
AG5
T6
T5
N6
N5
AH5
K5
AH3
C C
B B
AH8
AH7
AH6
AD3
AC3
AA3
Y3
V3
U3
R3
P3
M3
L3
AF5
AF3
AF9
AH9
AH10
AC20
J23
A29
W30
W23
AA28
AJ30
AC12
AC15
K8
AD12
AD15
AD18
AC17
AE30
AD14
AC11
AF12
AF27
AC18
AG14
F4
AG18
AG21
AK25
V27
AJ1
AD20
AK12
AK15
AK18
AK2
AH11
J3
AC27 AK29
PART 6 OF 6
VSSA#U6
VSSA#Y5
VSSA#Y6
VSSA#P8
VSSA#P7
VSSA#U8
VSSA#U7
VSSA#Y7
VSSA#Y8
VSSA#L8
VSSA#K7
VSSA#AD7
VSSA#A2
VSSA#AF5
VSSA#AC6
VSSA#AC5
VSSA#P6
VSSA#P5
VSSA#L6
VSSA#L5
VSSA#H6
VSSA#H5
VSSA#P4
VSSA#AE3
VSSA#AD3
VSSA#AC3
VSSA#AA3
VSSA#Y3
VSSA#V3
VSSA#U3
VSSA#R3
VSSA#P3
VSSA#M3
VSSA#L3
VSSA#J3
VSSA#H3
VSSA#F3
GND
VSSA#N3
VSSA#AG3
VSSA#AE9
VSSA#AH7
VSS#A15
VSS#A24
VSS#A29
VSS#AA23
VSS#AA24
VSS#AA30
VSS#AB27
VSS#AC12
VSS#AC16
VSS#AC8
VSS#AD12
VSS#AD16
VSS#AD19
VSS#AD23
VSS#AD30
VSS#AD8
VSS#AD9
VSS#AE12
VSS#AE27
VSS#AC19
VSS#AG12
VSS#AF7
VSS#AG18
VSS#AG21
VSS#AG9
VSS#AH28
VSS#AJ1
VSS#AK10
VSS#AK13
VSS#AK16
VSS#AK19
VSS#AK2
VSS#AH11
VSS#AJ11
VSS#AK25 VSS#AK29
VSS#M15
VSS#G14
VSS#G18
VSS#G27
VSS#G3
VSS#H13
VSS#H14
VSS#H18
VSS#H23
VSS#H4
VSS#J23
VSS#J24
VSS#J30
VSS#K27
VSS#V30
VSS#U19
VSS#M16
VSS#AD11
VSS#M30
VSS#N15
VSS#N16
VSS#N23
VSS#N27
VSS#G5
VSS#P15
VSS#P16
VSS#P23
VSS#P24
VSS#R12
VSS#R13
VSS#R14
VSS#R15
VSS#R16
VSS#R17
VSS#R18
VSS#R19
VSS#R23
VSS#R24
VSS#R30
VSS#T12
VSS#T13
VSS#T14
VSS#T15
VSS#T16
VSS#T17
VSS#T18
VSS#T19
VSS#T27
VSS#U15
VSS#U16
VSS#V15
VSS#V16
VSS#W16
VSS#W27
VSS#V12
VSS#W13
VSS#V14
VSS#W15
VSS#Y23
VSS#Y24
VSS#C19
VSS#C17
VSS#AH26
VSS#AH25
VSS#AG25
VSS#F30
VSS#F25
VSS#D27
VSS#D25
VSS#D23
VSS#D20
VSS#D17
VSS#C3
VSS#C28
VSS#B30
VSS#B1
VSS#AK22
M14
AC14
AG16
A22
A2
D27
AG26
H18
A16
A9
AD17
J24
R27
D24
T30
U19
M16
AD11
H15
N15
N19
D3
A25
F3
R15
P16
G10
M24
M12
R13
P12
P14
U13
R17
V18
R19
R23
R24
J30
T12
N13
T14
P18
T16
U17
T18
W19
J27
U15
N17
M18
V16
W17
M26
V12
W13
V14
W15
U23
U24
A13
V28
AG24
AA24
AA23
F30
K23
D20
A19
D17
D14
F27
D4
M23
B30
B1
AK22
Change on rev:C. 5/16
+1.2V
Power sequence requirement
+3V
+1.8V
+1.8V
L51
FBJ3216HS800
2 1
2 1
D24 SW1010C
L39 TI201209G121
L36 TI201209G121
+
C41
470U/2.5V-7343
D23 SW1010C
C69
1U
21
D22
SW1010C
C67
1U
C348
1U
C88
.1U-4
C48
.1U-4
C113
.1U-4
C50
.1U-4
C135
1U
C54
1U
C85
.1U-4
C63
.1U-4
.1U-4
C98
.1U-4
+1.2V_NB
C71
1U
C73
1U
+1.2V_NB
C86
.1U-4
C87
.1U-4
C65
.1U-4
C100
.1U-4
C134
1U
C74
1U
C51
.1U-4
C62
.1U-4
C114
.1U-4C61
C99
.1U-4
VDD18
VDDA18
W12
W14
W16
W18
AB22
AB9
AB8
AE11
AC9
AD10
AC10
AG11
AF11
AC7
AB7
U16
M13
M15
M17
R16
V15
N12
T15
N14
N16
N18
M19
R12
P13
P15
P17
P19
U12
T13
U14
T17
U18
T19
V13
R14
V17
R18
V19
J22
J9
Y8
U8
Y7
U7
H5
H4
P8
P7
L7
L8
J6
U17E
VDD_CORE#M12
VDD_CORE#M13
VDD_CORE#M14
VDD_CORE#M17
VDD_CORE#M18
VDD_CORE#M19
VDD_CORE#N12
VDD_CORE#N13
VDD_CORE#N14
VDD_CORE#N17
VDD_CORE#N18
VDD_CORE#N19
VDD_CORE#P12
VDD_CORE#P13
VDD_CORE#P14
VDD_CORE#P17
VDD_CORE#P19
VDD_CORE#U12
VDD_CORE#U13
VDD_CORE#U14
VDD_CORE#U17
VDD_CORE#U18
VDD_CORE#U19
VDD_CORE#V13
VDD_CORE#V14
VDD_CORE#V17
VDD_CORE#V18
VDD_CORE#V19
VDD_CORE#W12
VDD_CORE#W14
VDD_CORE#W17
VDD_CORE#W18
VDD_18
VDD_18#AF26
VDD_18#AF9
VDD_18#J26
VDDA_18#U8
VDDA_18#AD8
VDDA_18#W6
VDDA_18#AA8
VDDA_18#AA7
VDDA_18#AE7
VDDA_18#AD7
VDDA_18#AC8
VDDA_18#AC7
VDDA_18#AG6
VDDA_18#AF6
VDDA_12#K6
VDDA_12#K4
VDDA_12#F6
VDDA_12#F5
VDDA_12#B3
VDDA_12#A3
VDDA_12#B4
VDDA_12#M8
VDDA_12#W5
RC410MB
PART 5 OF 6
CORE POWER
POWER
PCIE
IF
PCIE POWER
VDD_MEM#AB30
VDD_MEM#AJ21
VDD_MEM#AK21
VDD_MEM#AC13
VDD_MEM#AC14
VDD_MEM#AC15
VDD_MEM#AC18
VDD_MEM#AC21
VDD_MEM#AD10
VDD_MEM#AD13
VDD_MEM#AD15
VDD_MEM#AD18
VDD_MEM#AD21
VDD_MEM#AE15
VDD_MEM#AE18
VDD_MEM#AE21
VDD_MEM#AG27
VDD_MEM#AJ30
VDD_MEM#AK18
VDD_MEM#AK24
VDD_MEM#AK9
VDD_MEM#W23
VDD_CPU#H17
VDD_CPU#H19
VDD_CPU#K23
VDD_CPU#L23
VDD_CPU#L24
VDD_CPU#M23
VDD_CPU#M24
VDD_CPU#T23
VDD_CPU#U23
VDD_CPU#U24
VDD_CPU#V23
MEM
POWER
VDD_CPU#V24
VDD_CPU#G16
VDD_CPU#G15
VDD_CPU#F22
VDD_CPU#F19
VDD_CPU#F16
VDD_CPU#F15
VDD_CPU#E15
VDD_CPU#A16
VDD_CPU#H16
VDD_CPU#H15
VDD_CPU#G22
VDD_CPU#G21
CPU IF
POWER
VDD_CPU#G19
VDDA_12#N8
VDDA_12#C3
VDDA_12#R7
VDDA_12#R8
VDDA_12#U7
VDDA_12#B2
VDDA_12#K8
VDDA_12#L7
VDDA_12#L8
Y24
AC21
AD21
AC13
AD23
AC16
AD19
AD22
V23
AD13
AD16
AC19
AB24
AK24
T24
AK28
AB23
Y23
AK21
T23
V24
AC22
H11
H13
G20
L23
L24
P23
N23
H17
G17
H14
F17
G14
A10
H16
H23
H12
F12
G12
F11
P24
H19
G11
H24
G16
G13
AC8
K6
M8
T8
T7
M7
W8
W7
AD9
+1.2V_NB
RC410MB
+1.8VSUS
Reserve for C-build. (6/20)
C555
100U/10V-7343
VTT
+1.2V
L52
FBJ3216HS800
+
C42
470U/2.5V-7343
C53
1U
C52
1U
C68
1U
C115
.1U-4
C138
*100U/10V-7343
C150
.1U-4
C148
.1U-4
C365
22U/16V-1206
C107
.1U-4
C70
.1U-4
C123
1U
C121
1U
C49
1U
C104
.1U-4
C172
C136
.1U-4
.1U-4
C137
C94
.1U-4
.1U-4
C117
.1U-4
C144
.1U-4
C77
.1U-4
C106
.1U-4
C130
.1U-4
C96
.1U-4
C84
.1U-4
C116
.1U-4
C124
.1U-4
C82
.1U-4
C76
.1U-4
C120
.1U-4
Change on rev:C. 5/16
C55
C64
1U
1U
C122
1U
C101
.1U-4
C43
+
150U/4V-3528
C105
.1U-4
C127
.1U-4
A A
Size Document Number Rev
RC400MB-POWER
5
4
3
2
Date: Sheet of
PROJECT : EW6
Quanta Computer Inc.
8 29Monday, June 27, 2005
1
3A
5
CLG
ALINK_RST#{4,5,16,20}
ATi Recommend
D D
PCIE Power
C C
+1.8V
L43 TI201209G121
B B
RTC
3VRTC
A A
C324
.1U-4
Vendor: NSK
Part Number: NXG 32.768KAE12FUD 16 PPM.
Y4 32.768KHZ
C390
22U/16V-1206
R196
1K-4
Q14
2
2 3
R338 20M-4
C420
18P-4
+1.8V
L42 SBK160808T-301Y-S
C286
.1U-4
+3VPCU
RTC_N02
RTC_N01
RTC_N03
1
2
CN23
RTC CONN
5
R348
20M-4
MMBT3904
1 3
41
C385
22U/16V-1206
C277
.1U-4
D25
RB751
2 1
2 1
D26
RB751
R192 3K
1
2
C407
18P-4
*7SH08
4
R85 0
32K_X1
32K_X232K_X232K_X232K_X2
C271
.1U-4
C467
1U
R191
4.7K/F
R190
15K/F
U9
+3V_S5
C263
.1U-4
C468
.1U-4
+5VSUS
5
2
1
C384
1U
VCCRTC
C207 .1U-4
C256
.1U-4
C254
.1U-4
JP1
Clear PAD
1 2
R425
100/F
SBSRCCLK{4}
SBSRCCLK#{4}
A_RX0P{6}
A_RX0N{6}
A_RX1P{6}
A_RX1N{6}
A_TX0P{6}
A_TX0N{6}
A_TX1P{6}
A_TX1N{6}
PCIE_VDDR
C265
.1U-4
4
R86 8.2K-4
R324
*1K-4
PCIE_CALRP
PCIE_CALRN
PCIE_CALI
PCIE_PVDD
VTT
A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
STP_CPU#
DPSLP#
INTA#
INTB#
INTC#
INTD#
INTE#
INTF#
INTG#
INTH#
32K_X1
32K_X2
C396 .01U-4
C394 .01U-4
C399 .01U-4
T58
T54
T60
T61
T59
T55
T57
T9
C266
.1U-4
C398 .01U-4
R320 150/F
R311 150/F
R316 4.12K/F C388 *33P-4
PCIE_VDDR
PCIE_VDDR
C255
C274
.1U-4
.1U-4
STP_CPU#{4,26}
DPSLP#{2}
INTE#{17}
INTF#{14}
INTG#{20}
INTH#{20}
CPUPWRGD{2}
INTR{2}
NMI{2}
CPUINIT#{2}
SMI#{2}
CPUSLP#{2}
IGNNE#{2}
A20M#{2}
FERR#{2}
STPCLK#{2}
T11
DPRSLPVR{26}
BMREQ#{6}
T16
4
U20A
AH8
A_RST#
L27
PCIE_RCLKP
M27
PCIE_RCLKN
M30
PCIE_TX0P
N30
PCIE_TX0N
K30
PCIE_TX1P
L30
PCIE_TX1N
H30
PCIE_TX2P
J30
PCIE_TX2N
F30
PCIE_TX3P
G30
PCIE_TX3N
M29
PCIE_RX0P
N29
PCIE_RX0N
M28
PCIE_RX1P
N28
PCIE_RX1N
J29
PCIE_RX2P
K29
PCIE_RX2N
J28
PCIE_RX3P
K28
PCIE_RX3N
G27
PCIE_CALRP
H27
PCIE_CALRN
G28
PCIE_CALI
R30
PCIE_PVDD
F26
PCIE_VDDR_1
R29
PCIE_VDDR_2
G26
PCIE_VDDR_3
P26
PCIE_VDDR_4
K26
PCIE_VDDR_5
L26
PCIE_VDDR_6
P28
PCIE_VDDR_7
N26
PCIE_VDDR_8
P27
PCIE_VDDR_9
H28
PCIE_VSS_1
F29
PCIE_VSS_2
H29
PCIE_VSS_3
H26
PCIE_VSS_4
F27
PCIE_VSS_5
G29
PCIE_VSS_6
L29
PCIE_VSS_7
J26
PCIE_VSS_8
L28
PCIE_VSS_9
J27
PCIE_VSS_10
N27
PCIE_VSS_11
M26
PCIE_VSS_12
K27
PCIE_VSS_13
P29
PCIE_VSS_14
P30
PCIE_VSS_15
AJ8
CPU_STP#/DPSLP_3V#
AK7
DPSLP_OD#/GPIO37
AG5
INTA#
AH5
INTB#
AJ5
INTC#
AH6
INTD#
AJ6
INTE#/GPIO33
AK6
INTF#/GPIO34
AG7
INTG#/GPIO35
AH7
INTH#/GPIO36
B2
X1
B1
X2
C29
CPU_PG/LDT_PG
A28
INTR/LINT0
C28
NMI/LINT1
B29
INIT#
D29
SMI#
E4
SLP#/LDT_STP#
B30
IGNNE#
F28
A20M#
E28
FERR#
E29
STPCLK#/ALLOW_LDTSTP
D25
SSMUXSEL/GPIO0
E27
DPRSLPVR
D27
BMREQ#
D28
LDT_RST#
SB400
+3V
C539
.1U-4
3
SB400 SB
Part 1 of 4
PCI CLKS
PCI EXPRESS INTERFACE
PCI INTERFACE
REQ3#/PDMA_REQ0#
REQ4#/PLL_BP33/PDMA_REQ1#
GNT3#/PLL_BP66/PDMA_GNT0#
GNT4#/PLL_BP50/PDMA_GNT1#
LPCRTC
CPU XTAL
RTC_IRQ#/ACPWR_STRAP
C540
C541
.1U-4
.1U-4
3
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCICLK8
PCICLK9
PCICLK_FB
PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
CBE3#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ5#/GPIO13
REQ6#/GPIO31
GNT0#
GNT1#
GNT2#
GNT5#/GPIO14
GNT6#/GPIO32
CLKRUN#
LOCK#
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#
SERIRQ
RTCCLK
VBAT
RTC_GND
C542
C543
.1U-4
.1U-4
L4
L3
L2
L1
M4
M3
M2
M1
N4
N3
N2
AJ7
W3
Y2
W4
Y3
V1
Y4
V2
W2
AA4
V4
AA3
U1
AA2
U2
AA1
U3
T4
AC1
R2
AD4
R3
AD3
R4
AD2
P2
AE3
P3
AE2
P4
AF2
N1
AF1
V3
AB4
AC2
AE4
T3
AC4
AC3
T2
U4
T1
AB2
AB3
AF4
AF3
AG2
AG3
AH1
AH2
AH3
AJ2
AK2
AJ3
AK3
AG4
AH4
AJ4
AG1
AB1
AG25
AH25
AJ25
AH24
AG24
AH26
AG26
AK27
C2
F3
A2
A1
PCI_MINI
PCI_591
PCI_PCM
PCI_SIO
PCI_CLK6
PCI_LAN
PCI_CLK8
PCICLK9
PCI_CLK9_FB
PCIRST#_C
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
REQ5#
LCDID1
GNT0#
GNT1#
GNT2#
GNT3#
GNT4#
LCDID0
LCDID2
CLKRUN#
PCI_LOCK#
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#0
LDRQ#1
SERIRQ
C544
.1U-4
R305 33-4
R306 33-4
R301 33-4
R123 33-4
R125 22-4
R304 33-4
R299 22-4
R300 22-4
C410
1U
C545
.1U-4
AD[0..31]
C372
*82P-4
CBE0# {14,17,20}
CBE1# {14,17,20}
CBE2# {14,17,20}
CBE3# {14,17,20}
FRAME# {14,17,20}
DEVSEL# {14,17,20}
IRDY# {14,17,20}
TRDY# {14,17,20}
PAR {14,17,20}
STOP# {14,17,20}
PERR# {14,17,20}
SERR# {14,17,20}
REQ0# {14}
REQ1# {20}
REQ3# {17}
LCDID1 {15}
GNT0# {14}
GNT1# {20}
GNT3# {17}
LCDID0 {15}
LCDID2 {15}
CLKRUN# {14,17,20,21}
VCCRTC
C546
.1U-4
2
Change for EMI. 06/24
Add PCLK_SIO for debug card. 06/16
T8
T7
PCLK_MINI
PCLK_591
PCLK_PCM
PCLK_SIO
PCICLK6
PCLK_LAN
PCICLK8
Change on B version.
AD[0..31] {12,14,17,20}
PCIRST#_C
R262
8.2K-4
Add for debug. 06/16 (C state)
LAD0/FWH0 {20,21}
LAD1/FWH1 {20,21}
LAD2/FWH2 {20,21}
LAD3/FWH3 {20,21}
LFRAME#/FWH4 {20,21}
LDRQ#0 {20}
SERIRQ {17,20,21}
RTC_CLK {12}
AUTO_ON# {12}
2
3V
U19
5
2
1
R265 0
PCLK_MINI {12,20}
PCLK_591 {12,21}
PCLK_PCM {12,17}
PCLK_SIO {12,20}
PCICLK6 {12}
PCLK_LAN {12,14}
PCICLK8 {12}
C375 *.1U-4
*7SH08
PCIRST#
PCIRST#
4
Size Document Number Rev
Custom
Date: Sheet of
Item 52 REV.A2
BIOS 1A15_T0 adjust PCI drive
strength will cause Error code
hang up 81h,Must move C387.But
before 1A14 BIOS use C387 is
ok
PCIRST# {14,17,20,21}
C374
82P-4
PERR#
FRAME#
TRDY#
STOP#
REQ3#
REQ0#
REQ2#
REQ1#
GNT0#
GNT1#
GNT2#
GNT3#
PAR
DEVSEL#
IRDY#
Reserved For EMI
PCLK_MINI
PCLK_591
PCLK_PCM
PCLK_SIO
PCICLK6
PCLK_LAN
PCICLK8
PCI_LOCK#
INTA#
INTB#
INTC#
INTD#
INTE#
INTF#
INTG#
INTH#
CLKRUN#
SERR#
GNT4#
REQ4#
LAD3
LAD2
LAD1
LAD0
REQ5#
SERIRQ
LDRQ#0
LDRQ#1
LFRAME#
PROJECT : EW6
Quanta Computer Inc.
SB400 PCIE/PCI/CPU/LPC I/F
1
C387 *100P-4
C395 *33P-4
C397 *33P-4
C391 *33P-4
C392 *33P-4
C393 *33P-4
C386 *33P-4
R298 8.2K-4
R277 8.2K-4
R279 8.2K-4
R278 8.2K-4
R275 8.2K-4
R276 8.2K-4
R87 8.2K-4
R91 8.2K-4
R89 8.2K-4
R293 8.2K-4
RN3 8.2KX4-4
RN1 8.2KX4-4
RN6 8.2KX4-4
RN2 8.2KX4-4
R291 8.2K-4
R289 8.2K-4
R283 100K-4
R280 100K-4
R281 100K-4
R282 100K-4
R287 8.2K-4
RN5 8.2KX4-4
1
1
2
3
4
5
6
78
1
2
3
4
5
6
78
1
2
3
4
5
6
78
1
2
3
4
5
6
78
1
2
3
4
5
6
78
9 29Monday, June 27, 2005
+3V
+3V
3A
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