QUANTA ED2L Schematics

1

HADSTB0#7
HADSTB1#7

HBREQ0#7

FERR#12

IGNNE#12

T91 *PAD
T93 *PAD

INTR12
NMI12
STPCLK#12

CPUSLP#7,12

DPSLP#12

DPRSTP#12

1 2

HA#[3..31]

HREQ#07
HREQ#17
HREQ#27
HREQ#37
HREQ#47

ADS#7

BPRI#7

BNR#7

HLOCK#7

HIT#7

HITM#7

DEFER#7

HTRDY#7

RS#07
RS#17
RS#27

A20M#12

SMI#12

R3120_4

HA#[3..31]7

A A

B B

C C

CPUPWRGD12

SYS_RESET#13

G1: NC for Dothan and
DPRSTP# for Yonah

D D

+VCCP

THERMTRIP#8,12

R311 56_4

1

2

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

IERR#

BPM0#
BPM1#
BPM2#
BPM3#

A20M#
FERR#
IGNNE#
CPUPWRGD
SMI#

TCK
TDO
TDI
TMS
TRST#

PREQ#
PRDY#
DBR#

STPCLK#
CPUSLP#
DPSLP#

THERMDA
THERMDC

THERMTRIP1#

CPU_PROCHOT#

2

AA3
AA2

AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1

AE5

A13
A12
C12
C11
B13
A16
A15
B10
A10

B18
A18

C17
B17

P4
U4
V3
R3
V2

W1

T4

W2

Y4
Y1
U1

Y3

U3

R2
P3
T2
P1
T1

N2

A4
N4

J3

L1

J2

K3
K4
L4

C8
B8
A9
C9
M3
H1
K1
L2

C2
D3
A3
E4
B4

A7
D1

D4
C6
A6
B7
G1

CT_0505: Change footprint to
BGA479M-SOCKET from
L100505 from MPGA479M

U31A

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#

ADSTB0#
ADSTB1#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

ADS#

IERR#
BREQ0#

BPRI#
BNR#
LOCK#

HIT#
HITM#
DEFER#

BPM0#
BPM1#
BPM2#
BPM3#
TRDY#
RS0#
RS1#
RS2#

A20M#
FERR#
IGNNE#
PWRGOOD
SMI#

TCK
TDO
TDI
TMS
TRST#
ITP_CLK0
ITP_CLK1
PREQ#
PRDY#
DBR#

LINT0
LINT1
STPCLK#
SLP#
DPSLP#
DPRSTP#

THERMDA
THERMDC

THERMTRIP#
PROCHOT#

Dothan Processor

REQUEST
PHASE
SIGNALS

ERROR
SIGNALS

ARBITRATION
PHASE
SIGNALS

SNOOP PHASE
SIGNALS

RESPONSE
PHASE
SIGNALS

PC
COMPATIBILITY
SIGNALS

DIAGNOSTIC
& TEST
SIGNALS

EXECUTION
CONTROL
SIGNALS

THERMAL DIODE

3

Dothan

1 OF 3

3

DATA
PHASE
SIGNALS

D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#

DINV0#
DINV1#
DINV2#
DINV3#

DBSY#
DRDY#

BCLK1
BCLK0

INIT#

RESET#

DPWR#

4

HD#[0..63]

HD#0

A19

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#

A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26

C23
C22
K24
L24
W25
W24
AE24
AE25

D25
J26
T24
AD20

M2
H2

B14
B15

B5
B11
C19

CPUINIT#
CPURST#

4

HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HDSTBN0# 7
HDSTBP0# 7
HDSTBN1# 7
HDSTBP1# 7
HDSTBN2# 7
HDSTBP2# 7
HDSTBN3# 7
HDSTBP3# 7

HDBI0# 7
HDBI1# 7
HDBI2# 7
HDBI3# 7

DBSY# 7
DRDY# 7

HCLK_CPU# 17
HCLK_CPU 17

+3VRUN

CPUINIT# 12
CPURST# 7
DPWR# 7

HD#[0..63] 7

THERMDC

THERMDA

5

R68 47

10 mil trace /
10 mil space

5

15 MIL

3V_THM

C83
.1U/10V_4

C86
2200P

Signal
TDI
TMS
TRST#
TCK
TDO

FERR#

IERR#

CPUPWRGD

TCK
TRST#

6

+3VRUN

R69

10K-0402

U18

1

VCC

SMDATA

3

DXN

2

DXP

4 5

-OVT GND

MAX6657

SMCLK

-ALT

KBSMDAT

7

KBSMCLK

8
6

ITP disable guidelines

Resistor Value
150 ohm +/- 5%

680 ohm +/- 5% GND
27 ohm +/- 5%

Open

Note: Populate R58, R62 when ITP
connector is populated.

R60 56_4

1 2

R319 56_4

1 2

R58 200/F

1 2

R315 27.4/F

1 2
1 2

R62 680

6

Connect To

VTT
VTT

GND
VTT

+VCCP +3VSUS

R317

54.9/F

TDI
TMS

TDO
CPURST#

Size Document Number Rev

Date: Sheet

7

+3VRUN

Q14

2

2N7002

1

+3VRUN+3VRUN

R66

+3VRUN

R310
10K-0402

10K-0402

+3VRUN

1

2

1 2

R72
10K-0402

Q13
2N7002

Resistor Placement
Within 2.0" of the CPU
Within 2.0" of the CPU39 ohm +/- 5%
Within 2.0" of the CPU
Within 2.0" of the CPU
Within 2.0" of the CPU

12

R318
150/F_4

DBR#

+VCCP +VCCP

12

12

R56

R316

39.2/F

54.9/F

PROJECT : ED2L

Quanta Computer Inc.

Dothan (HOST)

7

3

3

R710

12

MBDATA

MBCLK

8

MBDATA 32,37

MBCLK 32,37

THRM# 13
MAX6657_AL# 32

MAX6657_OV# 27,34

12

R57
150/F_4

538Wednesday, March 23, 2005

of

8

E3A

1

2

3

4

5

6

7

8

R50 *0_NC

R46
*0_NC

1 2

SELPSB2_CLK
SELPSB1_CLK

+VCCP

BSEL0
BSEL1

U31C

W23

D10

VCCP0

D12

VCCP1

D14

VCCP2

D16

VCCP3

E11

VCCP4

E13

VCCP5

E15

VCCP6

F10

VCCP7

F12

VCCP8

F14

VCCP9

F16

VCCP10

K6

VCCP11

L5

VCCP12

L21

VCCP13

M6

VCCP14

M22

VCCP15

N5

VCCP16

N21

VCCP17

P6

VCCP18

P22

VCCP19

R5

VCCP20

R21

VCCP21

T6

VCCP22

T22

VCCP23

U21

VCCP24

P23

VCCQ0

W4

VCCQ1

E2

VID0

F2

VID1

F3

VID2

G3

VID3

G4

VID4

H4

VID5

AE7

VCCSENSE

AF6

VSSSENSE

C16

BSEL0

C14

BSEL1

E1

12

PSI

R6

VSS100

R22

VSS101

R25

VSS102

T3

VSS103

T5

VSS104

T21

VSS105

T23

VSS106

T26

VSS107

U2

VSS108

U6

VSS109

U22

VSS110

U24

VSS111

V1

VSS112

V4

VSS113

V5

VSS114

V21

VSS115

V25

VSS116

W3

VSS117

W6

VSS118

Dothan Processor

Size Document Number Rev

Date: Sheet

Dothan

3 OF 3

POWER, GROUND AND NC

VID

PROJECT : ED2L

Quanta Computer Inc.

Dothan (Power)

7

VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191VSS119

W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24W22

638Wednesday, March 23, 2005

8

E3A

of

Place voltage

+VCCP

divider within

0.5" of GTLREF

COMP0
COMP1
COMP2
COMP3

A A

Place pulldown resistors within

0.5" of COMP pins

18mils Trace Width of COMP0,2
5mils Trace Width of COMP1,3

B B

C C

12

C37

10U_6.3V_8

12

C407

10U_6.3V_8

12

C419

10U_6.3V_8

C34

10U_6.3V_8

1 2

12

C59

10U_6.3V_8

12

C415

10U_6.3V_8

12

C63

10U_6.3V_8

C61

10U_6.3V_8

1 2

R27

27.4/F

1 2

VHCORE

12

C405

10U_6.3V_8

VHCORE

12

C406

10U_6.3V_8

12

C62

10U_6.3V_8

VHCORE

C423

10U_6.3V_8

1 2

R307

54.9/F

1 2

R19

27.4/F

1 2

12

C412

10U_6.3V_8

12

C404

10U_6.3V_8

12

C414

10U_6.3V_8

C424

10U_6.3V_8

1 2

R22

54.9/F

1 2

12

C418

10U_6.3V_8

12

C32

10U_6.3V_8

12

C411

10U_6.3V_8

C425

10U_6.3V_8

1 2

12

.01U/16V_4

12

C64

10U_6.3V_8

12

C36

10U_6.3V_8

C35

10U_6.3V_8

1 2

1K/F-0402

C71

12

C409

10U_6.3V_8

12

C421

10U_6.3V_8

C417

10U_6.3V_8

1 2

pin

R15

Trace as Wider as
possible.

1 2

R16
2K/F

1 2

CPU_VCCA

12

C75

10U_6.3V_8

+1_5VRUN

VHCORE

12

C426

10U_6.3V_8

VHCORE

12

C60

10U_6.3V_8

VHCOREVHCORE

C410

10U_6.3V_8

1 2

T85
T92
T96

12

C420

10U_6.3V_8

12

C416

10U_6.3V_8

C33

10U_6.3V_8

1 2

R55 0_4

Removed +1_8VRUN

12

C408

10U_6.3V_8

12

C413

10U_6.3V_8

C422

10U_6.3V_8

1 2

T94
T89

T97
T95

T84
T83
T90

COMP0
COMP1
COMP2
COMP3

GTLREF0

TEST1
TEST2

CPU_VCCA

VHCORE

Total caps = 1670 uF > 1430 uF (Intel Recommendation)
ESR = 9m ohm/4 // 5m ohm/35 ---> = 0.1343m ohm

+VCCP

12

12

12

C427
150U/6.3V_7

+

D D

CC7343

12

C51

C44

.1U/10V_4

.1U/10V_4

1

12

C73

C76

.1U/10V_4

.1U/10V_4

C, mF---------ESR, mW-----------ESL, nH
1 x 150 mF-----42 mW (typ) / 2--------2.5 nH / 12
10 x 0.1 mF----16 mW (typ) / 10-------0.6 nH / 10

2

12

C46
.1U/10V_4

+VCCP

12

C27
.1U/10V_4

12

C52
.1U/10V_4

12

C30
.1U/10V_4

3

12

C45
.1U/10V_4

12

C74
.1U/10V_4

VHCORE

4

AD26

AC26

W21

AA11
AA13
AA15
AA17
AA19
AA21

AB10
AB12
AB14
AB16
AB18
AB20
AB22

AC11
AC13
AC15
AC17
AC19

AD10
AD12
AD14
AD16
AD18

AE11
AE13
AE15
AE17
AE19

AF10
AF12
AF14
AF16
AF18

P25
P26
AB2
AB1

AF7
AC1
E26

D18
D20
D22

E17
E19
E21

G21
H22

K22

V22

Y22
AA5
AA7
AA9

AB6
AB8

AC9

AD8

AE9

AF8

C5

F23

B2
C3

N1
B1

F26

D6
D8

E5
E7
E9

F6

F8
F18
F20
F22

G5

H6

J5

J21

U5

V6

W5

Y6

U31B

COMP0
COMP1
COMP2
COMP3

GTLREF0

TEST1
TEST2

NC1
RSVD2

RSVD3
RSVD4
RSVD5

VCCA3
VCCA2
VCCA1
VCCA0

VCC00
VCC01
VCC02
VCC03
VCC04
VCC05
VCC06
VCC07
VCC08
VCC09
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71

Dothan Processor

Dothan

2 OF 3

POWER,
GROUND,
RESERVED
SIGNALS

VSS00
VSS01
VSS02
VSS03
VSS04
VSS05
VSS06
VSS07
VSS08
VSS09
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99

5

A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4

CPU_VID033
CPU_VID133
CPU_VID233
CPU_VID333
CPU_VID433
CPU_VID533

DothanA DothanB

R313 NC Install

SELPSB2_CLK
SELPSB1_CLK

R313 0_4
R314 0_4

PSI

No using for MAX1907

STP_CPU#13,17,33

SELPSB2_CLK8,17
SELPSB1_CLK8,17

T81 *PAD
T82 *PAD

1 2
1 2

6

1

2

3

4

5

6

7

8

HXRCOMP

12

R107
100/F

R144
100/F

+VCCP

12

+VCCP

12

12

12

+VCCP

12

+VCCP

12

12

R98

24.9/F

R95

54.9/F

R102
221/F

R152

24.9/F

R133

54.9/F

R143
221/F

A A

B B

C C

HXSCOMP

HXSWING

.1U/10V_4

1 2

HYRCOMP

HYSCOMP

HYSWING

.1U/10V_4

1 2

10mil Trace
Length and
Width

20mil Trace
Length and
Width

C130

10mil Trace
Length and
Width

20mil Trace
Length and
Width

C173

HD#[0..63]5

HD#[0..63]

HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

U33A

E4

HD0#

E1

HD1#

F4

HD2#

H7

HD3#

E2

HD4#

F1

HD5#

E3

HD6#

D3

HD7#

K7

HD8#

F2

HD9#

J7

HD10#

J8

HD11#

H6

HD12#

F3

HD13#

K8

HD14#

H5

HD15#

H1

HD16#

H2

HD17#

K5

HD18#

K6

HD19#

J4

HD20#

G3

HD21#

H3

HD22#

J1

HD23#

L5

HD24#

K4

HD25#

J5

HD26#

P7

HD27#

L7

HD28#

J3

HD29#

P5

HD30#

L3

HD31#

U7

HD32#

V6

HD33#

R6

HD34#

R5

HD35#

P3

HD36#

T8

HD37#

R7

HD38#

R8

HD39#

U8

HD40#

R4

HD41#

T4

HD42#

T5

HD43#

R1

HD44#

T3

HD45#

V8

HD46#

U6

HD47#

W6

HD48#

U3

HD49#

V5

HD50#

W8

HD51#

W7

HD52#

U2

HD53#

U1

HD54#

Y5

HD55#

Y2

HD56#

V4

HD57#

Y7

HD58#

W1

HD59#

W3

HD60#

Y3

HD61#

Y6

HD62#

W2

HD63#

C1

HXRCOMP

C2

HXSCOMP

D1

HXSWING

T1

HYRCOMP

L1

HYSCOMP

P1

HYSWING

ALVISO

CT_0505: Change footprint to
mbga1257-intel-alviso from MBGA-1257

HADSTB0#
HADSTB1#

HCPURST#

HOST

HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#

HEDRDY#

HPCREQ#

HCPUSLP#

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#

HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HADS#

HVREF
HBNR#

HBPRI#

BREQ0#

HCLKINN
HCLKINP

HDBSY#

HDEFER#

HDINV#0
HDINV#1
HDINV#2
HDINV#3

HDPWR#

HDRDY#

HHIT#

HHITM#

HLOCK#
HREQ0#

HREQ1#
HREQ2#
HREQ3#
HREQ4#

HRS0#
HRS1#
HRS2#

HTRDY#

G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13

F8
B9
E13
J11
A5
D5
E7
H10

AB1
AB2

C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
G8
B5

HA#[3..31]
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HCPUSLP#_GMCH

HA#[3..31] 5

ADS# 5
HADSTB0# 5
HADSTB1# 5

BNR# 5
BPRI# 5
HBREQ0# 5
CPURST# 5

HCLK_MCH# 17
HCLK_MCH 17

DBSY# 5
DEFER# 5
HDBI0# 5
HDBI1# 5
HDBI2# 5
HDBI3# 5

DPWR# 5

DRDY# 5
HDSTBN0# 5
HDSTBN1# 5
HDSTBN2# 5
HDSTBN3# 5
HDSTBP0# 5
HDSTBP1# 5
HDSTBP2# 5
HDSTBP3# 5

HIT# 5
HITM# 5
HLOCK# 5

HREQ#0 5
HREQ#1 5
HREQ#2 5
HREQ#3 5
HREQ#4 5
RS#0 5
RS#1 5
RS#2 5

HTRDY# 5

Do not install R89 for Dothan-A
and install for Dothan-B

T7
*PAD

T105
*PAD

R89

1 2

0_4

HVREF

12

C160
.1U/10V_4

Concern about HVREF Trace
Length & Width

CT_0513: Install R89 0 ohm.

CPUSLP# 5,12

+VCCP

1 2

12

R129
100/F

R128
200/F

close to
Alviso
100mil

D D

Size Document Number Rev

Alviso (HOST)

1

2

3

4

5

6

Date: Sheet

PROJECT : ED2L

Quanta Computer Inc.

7

738Wednesday, March 23, 2005

8

E3A

of

1

DMI_TXN013
DMI_TXN113
DMI_TXN213

R173
*40.2/F

12

CLK_SDRAM0#15
CLK_SDRAM1#15

CLK_SDRAM3#15
CLK_SDRAM4#15

R169
*40.2/F

DMI_TXN313

DMI_TXP013
DMI_TXP113
DMI_TXP213
DMI_TXP313

DMI_RXN013
DMI_RXN113
DMI_RXN213
DMI_RXN313

DMI_RXP013
DMI_RXP113
DMI_RXP213
DMI_RXP313

CLK_SDRAM015
CLK_SDRAM115

CLK_SDRAM315
CLK_SDRAM415

CKE015,16
CKE115,16
CKE215,16
CKE315,16

SM_CS0#15,16
SM_CS1#15,16
SM_CS2#15,16
SM_CS3#15,16

T42

T34

T40

T36

CLK_SDRAM2

CLK_SDRAM5

CLK_SDRAM2#

CLK_SDRAM5#

CKE0
CKE1
CKE2
CKE3

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

M_OCDCOMP0
M_OCDCOMP1

T116
T44
T43
T45

M_RCOMPN
M_RCOMPP

SMDDR_VREF_R

SMXSLEW
SMYSLEW

A A

B B

12

C C

Route as short
as possible.

2

U33C

AA31

DMIRXN0

AB35

DMIRXN1

AC31

DMIRXN2

AD35

DMIRXN3

Y31

DMIRXP0

AA35

DMIRXP1

AB31

DMIRXP2

AC35

DMIRXP3

AA33

DMITXN0

AB37

DMITXN1

AC33

DMITXN2

AD37

DMITXN3

AA37
AB33
AC37

AM33
AE11

AJ34
AC10
AN33
AE10

AJ33
AD10
AP21

AM21
AH21
AK21

AN16
AM14
AH15
AG16

AF22

AF16
AP14

AL15
AM11
AN10

AK10
AK11

AF37

AD1
AE27
AE28

AF9

AF10

Y33

AL1

AF6

AK1

AF5

DMITXP0
DMITXP1
DMITXP2
DMITXP3

SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5

SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

SM_OCDCOMP0
SM_OCDCOMP1

SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT

ALVISO

DMIDDR MUXING

It's point to point,
55ohm trace, keep as

CFG/RSVDPMLCKNC

BM_BUSY#

THRMTRIP#

DREF_CLKN

DREF_CLKP
DREF_SSCLKN
DREF_SSCLKP

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

EXT_TS0#
EXT_TS1#

PWROK

RSTIN#

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

NC9
NC10
NC11

3

+VCCP

12

R126
10K-0402

CFG0

G16

SELPSB1_CLK

H13

SELPSB2_CLK

G14

CFG3

F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25

J23
J21
H22
F5
AD30
AE29

A24
A23
C37
D37

AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37

CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

PM_EXTTS#0
PM_EXTTS#1

PLTRST#_R
DOT96#

DOT96
DREFSSCLK#
DREFSSCLK

TP_NC1
TP_NC2
TP_NC3
TP_NC4
TP_NC5
TP_NC6
TP_NC7
TP_NC8
TP_NC9
TP_NC10
TP_NC11SMDDR_VREF_R1

T18
T20
T26
T12
T13
T31
T5
T19
T2
T17
T25
T3
T33
T32
T29
T21
T22
T14

1 2

R168 100/F

4

CFG6

Low=DDR2
High=DDR1

SELPSB1_CLK 6,17
SELPSB2_CLK 6,17

Reserved
for AV

PM_BMBUSY# 13

THERMTRIP# 5,12
IMVP_PWRGD 13,33
PLTRST# 12,13,20,31,32

DOT96# 17
DOT96 17
DREFSSCLK# 17
DREFSSCLK 17

T113

*PAD

T111

*PAD

T117

*PAD

T115

*PAD

T114

*PAD

T112

*PAD

T109

*PAD

T107

*PAD

T110

*PAD

T106

*PAD

T108

*PAD

12

Item131

R106
*2.21K/F_NC

TV_Y/G24
TV_C/R24

INT_DDCCLK19
INT_DDCDAT19
INT_VGA_BLU31

INT_VGA_GRN31
INT_VGA_RED31

INT_VSYNC19
INT_HSYNC19

CFG5

Low=DMIx2
High=DMIx4

CLK_MCH_3GPLL#17
CLK_MCH_3GPLL17

4.99K/F
R110

R122 225/F_4

INT_BLON18

INT_DISP_ON18

I_EDIDCLK18
I_EDIDDATA18

INT_TXLCLKOUT-18
INT_TXLCLKOUT+18

INT_TXLOUT0-18
INT_TXLOUT1-18
INT_TXLOUT2-18

INT_TXLOUT0+18
INT_TXLOUT1+18
INT_TXLOUT2+18

5

12

R109
*2.21K/F_NC

T27
T28

T104

12

R99
150/F_4

1 2

R103 150/F_4

1 2

R96 150/F_4

1 2

R94 150/F_4

R81 39
R80 39

REFSET

INT_BLON
INT_DISP_ON

R97 1.5K/F
T1

T23
T24

T6
T16
T30

T11
T15
T4

INT_TV_COMP
INT_TV_Y/G
INT_TV_C/R
TV_REFSET

12

R93
150/F_4

INT_VGA_BLU
INT_VGA_GRN
INT_VGA_RED

12
12

INT_TXLCLKOUT­INT_TXLCLKOUT+

INT_TXLOUT0­INT_TXLOUT1­INT_TXLOUT2-

INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+

6

SDVOCTRL_DATA default is no SDOV

T10
T8

T9

AB29
AC29

H24
H25

A15
C16
A17

B15
B16
B17

E24
E23
E21
D21
C20
B20
A19
B19
H21
G21

E25
C23

C22

C33
C31

B30
B29
C25
C24

B34
B33
B32

A34
A33
B31

C29
D28
C27

C28
D27
C26

J18

J20

F25

F23
F22
F26

F28
F27

U33F

SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP

TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC

DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET

LBKLT_CTRL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

LACLKN
LACLKP
LBCLKN
LBCLKP

LADATAN0
LADATAN1
LADATAN2

LADATAP0
LADATAP1
LADATAP2

LBDATAN0
LBDATAN1
LBDATAN2

LBDATAP0
LBDATAP1
LBDATAP2

ALVISO

7

MISC

TV VGA LVDS

EXP_COMPI

EXP_ICOMPO

EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP0

EXP_RXP1

EXP_RXP2

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN0

EXP_TXN1

EXP_TXN2

EXP_TXN3

EXP_TXN4

EXP_TXN5

EXP_TXN6

EXP_TXN7

PCI-EXPRESS GRAPHICS

EXP_TXN8

EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP0

EXP_TXP1

EXP_TXP2

EXP_TXP3

EXP_TXP4

EXP_TXP5

EXP_TXP6

EXP_TXP7

EXP_TXP8

EXP_TXP9

EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

VCC3G_PCIE_R

D36
D34

E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34

D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34

E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36

D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36

8

VCC3G_PCIE

R104

1 2

24.9/F

short as possible. close
Alviso.

+2_5VSUS

12

R189

80.6/F

M_RCOMPN
M_RCOMPP

12

D D

R183

80.6/F

1

SMDDR_VREF_R

SMDDR_VREF_R1

2

1 2

R181 10K/F

1 2

C222 .1U/16V_6

1 2

R335 10K/F

1 2

C434 .1U/16V_6

1 2

R176 10K/F

1 2

C212 .1U/16V_6

1 2

R331 10K/F

1 2

C432 .1U/16V_6

+2_5VRUN+2_5VSUS

R83 10K-0402

1 2

R82 10K-0402

1 2

System memory
throttling
using

+2_5VSUS

3

4

5

PM_EXTTS#0

PM_EXTTS#1

Size Document Number Rev

Alviso (VGA, DMI)

6

Date: Sheet

PROJECT : ED2L

Quanta Computer Inc.

7

838Wednesday, March 23, 2005

8

E3A

of

1

2

3

4

5

6

7

8

MD[0..63]
SM_DQS[0..7]
SDM[0..7]

RN73

A A

4P2R-S-10
RN89

4P2R-S-10

RN74
4P2R-S-10
RN90
4P2R-S-10

RN75
4P2R-S-10
RN91
4P2R-S-10

RN92
4P2R-S-10

RN76
4P2R-S-10

RN71
4P2R-S-10
RN87
4P2R-S-10

B B

RN88
4P2R-S-10

RN72
4P2R-S-10

RN65
4P2R-S-10

RN81
4P2R-S-10

RN66
4P2R-S-10

RN82
4P2R-S-10

RN67
4P2R-S-10
RN83
4P2R-S-10

RN68
4P2R-S-10

RN84
4P2R-S-10

C C

RN69
4P2R-S-10
RN85
4P2R-S-10

RN86
4P2R-S-10

RN70
4P2R-S-10

RN77
4P2R-S-10
RN93
4P2R-S-10

RN78
4P2R-S-10
RN94
4P2R-S-10

RN95
4P2R-S-10

RN79
4P2R-S-10

D D

RN80
4P2R-S-10
RN96
4P2R-S-10

MD31 R_MD31
MD26 R_MD26
MD30
MD27

MD25 R_MD25
MD24 R_MD24
MD28 R_MD28
MD29 R_MD29

MD18 R_MD18
MD22 R_MD22
MD23

MD21
MD20
MD16
MD17

MD35 R_MD35
MD34 R_MD34
MD39 R_MD39
MD38 R_MD38

MD36
MD37
MD33
MD32

MD59
MD58
MD62
MD63

MD56
MD60
MD61
MD57

MD51 R_MD51
MD50 R_MD50
MD55 R_MD55
MD54 R_MD54

MD48
MD49

MD52

MD47 R_MD47
MD46 R_MD46
MD42 R_MD42
MD43 R_MD43

MD44
MD45
MD40
MD41

MD14 R_MD14

MD13
MD9

MD12 R_MD12

MD6
MD3
MD2
MD7

MD5 R_MD5

1

2

1

4

3
3
1

1
3
1
3

1
3
1
3

3
1
3
1

1
3
1
3

3
1
1
3

3
1
3
1

3
1
1
3

1
3
1
3

3
1
3
1

1
3
1
3

3
1
3
1

1
3
1
3

1
3
1
3

3
1
1
3

1
3
1
3

R_MD30

4

R_MD27

2

2
4
2
4

R_MD19MD19

2
4
2

R_MD23

4

R_MD21

4

R_MD20

2

R_MD16

4

R_MD17

2

2
4
2
4

R_MD36

4

R_MD37

2

R_MD33

2

R_MD32

4

R_MD59

4

R_MD58

2

R_MD62

4

R_MD63

2

R_MD56

4

R_MD60

2

R_MD61

2

R_MD57

4

2
4
2
4

R_MD48

4

R_MD53MD53

2

R_MD49

4

R_MD52

2

2
4
2
4

R_MD44

4

R_MD45

2

R_MD40

4

R_MD41

2

R_MD10MD10

2

R_MD11MD11

4

R_MD15MD15

2
4

R_MD13

2

R_MD8MD8

4

R_MD9

2
4

R_MD6

4

R_MD3

2

R_MD2

2

R_MD7

4

R_MD1MD1

2

R_MD0MD0

4

R_MD4MD4

2
4

2

R_MD0
R_MD1
R_MD2
R_MD3
R_MD4
R_MD5
R_MD6
R_MD7
R_MD8
R_MD9
R_MD10
R_MD11
R_MD12
R_MD13
R_MD14
R_MD15
R_MD16
R_MD17
R_MD18
R_MD19
R_MD20
R_MD21
R_MD22
R_MD23
R_MD24
R_MD25
R_MD26
R_MD27
R_MD28
R_MD29
R_MD30
R_MD31
R_MD32
R_MD33
R_MD34
R_MD35
R_MD36
R_MD37
R_MD38
R_MD39
R_MD40
R_MD41
R_MD42
R_MD43
R_MD44
R_MD45
R_MD46
R_MD47
R_MD48
R_MD49
R_MD50
R_MD51
R_MD52
R_MD53
R_MD54
R_MD55
R_MD56
R_MD57
R_MD58
R_MD59
R_MD60
R_MD61
R_MD62
R_MD63

R_SDM0

1 2

R356 10_4

R_SDM1

1 2

R355 10_4

1 2

R354 10_4

1 2

R353 10_4

1 2

R352 10_4

1 2

R351 10_4

R_SDM6 R_SM_DQS6

1 2

R350 10_4

R_SDM7

1 2

R349 10_4

U33B

AG35

SADQ0

AH35

SADQ1

AL35

SADQ2

AL37

SADQ3

AH36

SADQ4

AJ35

SADQ5

AK37

SADQ6

AL34

SADQ7

AM36

SADQ8

AN35

SADQ9

AP32

SADQ10

AM31

SADQ11

AM34

SADQ12

AM35

SADQ13

AL32

SADQ14

AM32

SADQ15

AN31

SADQ16

AP31

SADQ17

AN28

SADQ18

AP28

SADQ19

AL30

SADQ20

AM30

SADQ21

AM28

SADQ22

AL28

SADQ23

AP27

SADQ24

AM27

SADQ25

AM23

SADQ26

AM22

SADQ27

AL23

SADQ28

AM24

SADQ29

AN22

SADQ30

AP22

SADQ31

AM9

SADQ32

AL9

SADQ33

AL6

SADQ34

AP7

SADQ35

AP11

SADQ36

AP10

SADQ37

AL7

SADQ38

AM7

SADQ39

AN5

SADQ40

AN6

SADQ41

AN3

SADQ42

AP3

SADQ43

AP6

SADQ44

AM6

SADQ45

AL4

SADQ46

AM3

SADQ47

AK2

SADQ48

AK3

SADQ49

AG2

SADQ50

AG1

SADQ51

AL3

SADQ52

AM2

SADQ53

AH3

SADQ54

AG3

SADQ55

AF3

SADQ56

AE3

SADQ57

AD6

SADQ58

AC4

SADQ59

AF2

SADQ60

AF1

SADQ61

AD4

SADQ62

AD5

SADQ63

ALVISO

SDM0 SM_DQS0
SDM1 SM_DQS1

SDM6 SM_DQS6
SDM7 R_SM_DQS7

3

MD[0..63] 15,16
SM_DQS[0..7] 15,16
SDM[0..7] 15,16

SA_BS0#
SA_BS1#
SA_BS2#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8

SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

DDR SYSTEM MEMORY A

SA_CAS#
SA_RAS#

SA_RCVENIN#

SA_RCVENOUT#

SA_WE#

R_SM_DQS0
R_SM_DQS1
R_SM_DQS2R_SDM2
R_SM_DQS3R_SDM3
R_SM_DQS4R_SDM4
R_SM_DQS5R_SDM5 SDM5

M_A_BA0

AK15

M_A_BA1

AK16
AL21

R_SDM0

AJ37

R_SDM1

AP35

R_SDM2

AL29

R_SDM3

AP24

R_SDM4

AP9

R_SDM5

AP4

R_SDM6

AJ2

R_SDM7

AD3

R_SM_DQS0

AK36

R_SM_DQS1

AP33

R_SM_DQS2

AN29

R_SM_DQS3

AP23

R_SM_DQS4

AM8

R_SM_DQS5

AM4

R_SM_DQS6

AJ1

R_SM_DQS7

AE5
AK35

AP34
AN30
AN23
AN8
AM5
AH1
AE4

M_A_MA0

AL17

M_A_MA1

AP17

M_A_MA2

AP18

M_A_MA3

AM17

M_A_MA4

AN18

M_A_MA5

AM18

M_A_MA6

AL19

M_A_MA7

AP20

M_A_MA8

AM19

M_A_MA9

AL20

M_A_MA10

AM16

M_A_MA11

AN20

M_A_MA12

AM20

M_A_MA13

AM15

M_A_SCASA#

AN15

M_A_SRASA#

AP16

SA_RCVENIN#

AF29

SA_RCVENOUT#

AF28

M_A_BMWEA#

AP15

1 2

R347 10_4

1 2

R346 10_4

1 2

R345 10_4

1 2

R344 10_4

1 2

R343 10_4

1 2

R342 10_4

1 2

R341 10_4

1 2

R340 10_4

4

SM_DQS2SDM2
SM_DQS3SDM3
SM_DQS4SDM4
SM_DQS5

SM_DQS7

M_A_BA0 15,16
M_A_BA1 15,16

M_A_MA[0..13] 15,16

M_A_SCASA# 15,16
M_A_SRASA# 15,16

T41
T38

M_A_BMWEA# 15,16

AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31

AJ31

AK30

AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23

AJ22
AK22
AH24
AH23
AG22

AJ21
AG10

AG9
AG8

AH8
AH11
AH10

AK9

AK6

AH5

AK8

AK4

AG5

AG4

AD8

AD9

AH4

AG6

AE8

AD7

AC5

AB8

AB6

AA8

AC8

AC7

AA4

AA5

U33G

SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37

AJ9

SBDQ38
SBDQ39

AJ7

SBDQ40
SBDQ41

AJ4

SBDQ42
SBDQ43
SBDQ44

AJ8

SBDQ45

AJ5

SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

SB_BS0#
SB_BS1#
SB_BS2#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8

SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

DDR SYSTEM MEMORY B

SB_CAS#
SB_RAS#

SB_RCVENIN#

SB_RCVENOUT#

SB_WE#

AJ15
AG17
AG21

AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7

AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4

AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5

AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15

AH14
AK14
AF15
AF14
AH16

M_B_BA0
M_B_BA1

M_B_MA0
M_B_MA1
M_B_MA2
M_B_MA3
M_B_MA4
M_B_MA5
M_B_MA6
M_B_MA7
M_B_MA8
M_B_MA9
M_B_MA10
M_B_MA11
M_B_MA12
M_B_MA13

M_B_SCASA#
M_B_SRASA#

SB_RCVENIN#
SB_RCVENOUT#
M_B_BMWEA#

M_B_BA0 15,16
M_B_BA1 15,16

M_B_MA[0..13] 15,16

M_B_SCASA# 15,16

M_B_SRASA# 15,16

T39
T37

M_B_BMWEA# 15,16

ALVISO

Size Document Number Rev

Alviso (DDR)

5

6

Date: Sheet

7

PROJECT : ED2L

Quanta Computer Inc.

938Wednesday, March 23, 2005

8

E3A

of

5

+VCCP

12

12

C162

C185

.1U/10V_4

.1U/10V_4

D D

+1_5VRUN

L23

12

BLM11A121S

C C

B B

+2_5VRUN

+VCCP

+2_5VRUN

A A

L22
BLM11A121S

L44
BLM11A121S

L45
BLM11A121S

D15

2 1

RB751V

+VCCP

12

C163

2.2U/6.3V

R77

10_4

5

12

12

12

12

C182

4.7U/10V_8

12

C125
.1U/10V_4

12

C123
.1U/10V_4

12

C195
.1U/10V_4

12

C196
.1U/10V_4

12

12

12

C189
.1U/10V_4

12

+

12

+

12

+

12

+

C90
.1U/10V_4

Item131

12

12

VCCA_DPLLA

C110
470U_2.5V

VCCA_DPLLB

C101
470U_2.5V

VCCA_HPLL

C204
470U_2.5V

VCCA_MPLL

C190
470U_2.5V

VCCA_CRTDAC

12

C91
.022U/16V_4

C126
.1U/10V_4

C186
10U_6.3V_8

12

12

C169
10U_6.3V_8

12

+

C564
150U_4V_1.9H

C114 .47U/10V_6

1 2

C120 .47U/10V_6

1 2

C431 .22U/6.3V_6

1 2

C153 .22U/6.3V_6

1 2

4

C164
10U_6.3V_8

VCCA_CRTDAC_R

+VCCP

VCCP_GMCH_CAP1

VCCP_GMCH_CAP2
VCCP_GMCH_CAP3

VCCP_GMCH_CAP4

4

W20

W18

W11

W10

R29
N29
M29

U28
R28
N28

M28

H28
G28

U27
R27
N27

M27

H27
H26

U20

U19

AC2
AC1

C35
AA1
AA2

G19
H20

U11
R11
N11

M11

U10
R10
N10

M10

T29

K29
J29
V28

T28
P28

L28
K28
J28

V27
T27
P27

L27
K27
J27

K26
K25

J25
K24
K23
K22
K21

T20
K20
V19

K19
V18

T18
K18
K17

B23

F19
E19

K13
J13
K12

V11
T11
P11

L11
K11

V10
T10
P10

K10
J10

Y9

W9

U9
R9
P9
N9

M9

L9
J9
N8

M8

N7

M7

N6

M6

A6
N5

M5

N4

M4

N3

M3

N2

M2

B2
V1

N1
M1
G1

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48

VCCH_MPLL1
VCCH_MPLL0
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC

VCC_SYNC
VTT0

VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51

U33H
ALVISO

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCD_TVDAC

VCCDQ_TVDAC

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

POWER

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2

VCCA_TVBG

VSSA_TVBG

VCCA_LVDS

VCCHV0
VCCHV1
VCCHV2

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8

VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64

VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3

VCC3G0

VCC3G1

VCC3G2

VCC3G3

VCC3G4

VCC3G5

VCC3G6

VCCA_3GBG
VSSA_3GBG

3

3

F17
E17
D18
C18
F18
E18

H18
G18

D19
H17

B26
B25
A25

A35
B22

B21
A21

AM37
AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9
AP8
AM1
AE1

B28
A28
A27

AF20
AP19
AF19
AF18

AE37
W37
U37
R37
N37
L37
J37

Y29
Y28
Y27

F37
G37

VCC_TVDACA_R
VCC_TVDACB_R
VCC_TVDACC_R

VCC_TVBG_R
VSS_TVBG

VCCD_TVDAC_R
VCCQ_TVDAC_R

V1.8_DDR_CAP6
V1.8_DDR_CAP3
V1.8_DDR_CAP4

VCC_DDRDLL

VCC3G_PCIE

VCCA_3GPLL

VCCA_3GBG
VSSA_3GBG

12

C202
.1U/10V_4

12

C154

.01U/16V_4

12

C121
.1U/10V_4

V1.8_DDR_CAP1

V1.8_DDR_CAP2

V1.8_DDR_CAP5

Note: All VCCSM
pins shorted
internally.

12

C201
10U_6.3V_8

Note: All VCCSM
pins shorted
internally.

C228 .1U/10V_4

1 2

C226 .1U/10V_4

1 2

C208 .1U/10V_4

1 2

12

C203
10U_6.3V_8

12

C122
.1U/10V_4

12

C112
10U_6.3V_8

C227 .1U/10V_4

1 2

C223 .1U/10V_4

1 2

C229 .1U/10V_4

1 2

+2_5VSUS

12

C146
.1U/10V_4

+1_5VRUN

+2_5VRUN

+2_5VRUN

12

C230
10U_6.3V_8

12

+2_5VRUN

C117

4.7U/10V_8

2

VCC_TVDACA_R

VCC_TVDACB_R

VCC_TVDACC_R

VCC_TVBG_R

VSS_TVBG

VCCD_TVDAC_R

VCCQ_TVDAC_R

Item131

12

+

C557
330U_4V_2.8H

2

1

12

C106
.1U/10V_4

12

C118
.1U/10V_4

12

C109
.1U/10V_4

12

C96
.1U/10V_4

12

12

+

C165
220U_4V_L

L20
BLM18PG181SN1

L16
BLM18PG181SN1

L15
BLM18PG181SN1

L19
BLM18PG181SN1

+2_5VRUN

1

R90 0_4

1 2

R92 0_4

1 2

R91 0_4

1 2

R86 0_4

1 2

R79 0_4

1 2

R85 0_4

1 2

12

+

C558
330U_4V_2.8H

VCC_DDRDLL

VCC3G_PCIE

VCCA_3GPLL

12

C191
.1U/10V_4

VCCA_3GBG

VSSA_3GBG

Size Document Number Rev

Date: Sheet

VCC_TVDACA

12

C107

.022U/16V_4

VCC_TVDACB

12

C119

.022U/16V_4

VCC_TVDACC

12

C108

.022U/16V_4

VCC_TVBG

12

C97

.022U/16V_4

VCCD_TVDAC

12

12

C95

C94
.1U/10V_4

.022U/16V_4

12

C93
.1U/10V_4

C231
100U/10V

C187
10U_6.3V_8

R165

1 2

0.5/F
C205
10U_6.3V_8

C124
.1U/10V_4

L18
BLM18PG181SN1

12

C209
.1U/10V_4

VCC3G_PCIE

12

C148
10U_6.3V_8

VCCA_3GPLL_R

VCCQ_TVDAC

12

C92

.022U/16V_4

12

+

12

12

12

PROJECT : ED2L

Quanta Computer Inc.

Alviso (Power)

12

12

12

12

R76 10_4

D14
RB751V

2 1

L32

12

BLM18PG181SN1

L25

12

BLM18PG181SN1

L28

12

BLM18PG181SN1

10 38Wednesday, March 23, 2005

+3VRUN

+3VRUN

+3VRUN

+3VRUN

12

+1_5VRUN

+1_5VRUN

+1_5VRUN

of

+3VRUN

+1_5VRUN

E3A

5

AJ3

AC3

AB3

AA3C3A3

AN2

AL2

AH2

AE2

AD2V2T2P2L2

B27

J26

G26

E26

A26

AN24

AL24J2G2D2Y1

B36

D D

VSSALVDS

B24

C C

VSS270

VSS271

VSS134

VSS135

F24

D24

VSS268

VSS269

VSS132

VSS133

AG24

J24

VSS266

VSS267

VSS130

VSS131

E27

AJ24

VSS265

VSS129

G27

VSS263

VSS264

VSS127

VSS128

W27

VSS262

VSS126

AB27

AA27

VSS260

VSS261

VSS124

VSS125

AF27

VSS259

VSS123

AJ27

AG27

VSS258

VSS122

AL27

VSS256

VSS257

VSS120

VSS121

E28

AN27

VSS254

VSS255

VSS118

VSS119

AA28

W28

VSS252

VSS253

VSS116

VSS117

AC28

AB28

VSS251

VSS115

A29

VSS249

VSS250

VSS113

VSS114

D29

VSS248

VSS112

F29

E29

VSS246

VSS247

VSS110

VSS111

H29

G29

VSS244

VSS245

VSS108

VSS109

L29

P29

VSS242

VSS243

VSS106

VSS107

V29

U29

AF4Y4U4P4L4H4C4

VSS240

VSS241

VSS104

VSS105

AA29

W29

AN4

VSS238

VSS239

VSS102

VSS103

AD29

4

VSS237

VSS101

AJ29

AG29

AL5W5E5

VSS235

VSS236

VSS99

VSS100

C30

AM29

VSS233

VSS234

VSS97

VSS98

AA30

Y30

VSS231

VSS232

VSS95

VSS96

AB30

VSS230

VSS94

AE30

AC30

AC6

AA6T6P6L6J6B6AP5

VSS228

VSS229

VSS92

VSS93

D31

AP30

AJ6

AE6

VSS226

VSS227

VSS90

VSS91

F31

E31

VSS224

VSS225

VSS88

VSS89

H31

G31

AG7

AA7V7G7

VSS222

VSS223

VSS86

VSS87

K31

J31

AK7

VSS220

VSS221

VSS84

VSS85

L31

VSS219

VSS83

N31

M31

VSS217

VSS218

VSS81

VSS82

P31

VSS216

U33E
ALVISO

VSS80

T31

R31

VSS214

VSS215

VSS78

VSS79

U31

VSS213

VSS77

W31

V31

VSS211

VSS212

VSS

VSS75

VSS76

AG31

AD31

VSS209

VSS210

VSS73

VSS74

A32

AL31

AC9

AA9V9T9K9H9A9AL8Y8P8L8E8C8AN7

VSS207

VSS208

VSS71

VSS72

Y32

C32

3

AH9

AE9

VSS205

VSS206

VSS69

VSS70

AB32

AA32

D10

AN9

VSS203

VSS204

VSS67

VSS68

AD32

AC32

L10

VSS201

VSS202

VSS65

VSS66

AJ32

AA10

Y10

VSS200

VSS64

D33

AN32

H11

F11

VSS198

VSS199

VSS62

VSS63

F33

E33

AA11

Y11

VSS196

VSS197

VSS60

VSS61

H33

G33

AG11

AF11

VSS194

VSS195

VSS58

VSS59

K33

J33

AL11

AJ11

VSS192

VSS193

VSS56

VSS57

M33

L33

B12

AN11

VSS190

VSS191

VSS54

VSS55

P33

N33

J12

D12

VSS188

VSS189

VSS52

VSS53

T33

R33

A14

VSS186

VSS187

VSS50

VSS51

U33

F14

B14

VSS185

VSS49

W33

V33

K14

J14

VSS183

VSS184

VSS47

VSS48

AF33

AD33

AJ14

AG14

VSS181

VSS182

VSS45

VSS46

C34

AL33

AN14

AL14

VSS179

VSS180

VSS43

VSS44

AB34

AA34

K15

C15

VSS177

VSS178

VSS41

VSS42

AD34

AC34

D16

A16

VSS175

VSS176

VSS39

VSS40

AN34

AH34

2

H16

VSS173

VSS174

VSS37

VSS38

B35

AL16

K16

VSS172

VSS36

E35

D35

+VCCP

G17

C17

VSS170

VSS171

VSS34

VSS35

G35

F35

AF17

VSS168

VSS169

VSS32

VSS33

H35

AN17

AJ17

VSS167

VSS31

K35

J35

B18

A18

VSS165

VSS166

VSS29

VSS30

M35

L35

AL18

U18

VSS163

VSS164

VSS27

VSS28

P35

N35

H19

C19

VSS161

VSS162

VSS25

VSS26

T35

R35

J19

VSS159

VSS160

VSS23

VSS24

U35

W19

T19

VSS158

VSS22

W35

V35

AG19

VSS156

VSS157

VSS20

VSS21

Y35

A20

AN19

VSS155

VSS19

C36

AE35

E20

D20

VSS153

VSS154

VSS17

VSS18

AB36

AA36

G20

F20

VSS151

VSS152

VSS15

VSS16

AD36

AC36

AK20

V20

VSS149

VSS150

VSS13

VSS14

AF36

AE36

C21

VSS147

VSS148

VSS11

VSS12

AJ36

AF21

F21

VSS146

VSS10

AN36

AL36

A22

AN21

VSS144

VSS145

VSS8

VSS9

H37

E37

1

E22

D22

VSS142

VSS143

VSS6

VSS7

M37

K37

AH22

J22

VSS140

VSS141

VSS4

VSS5

T37

P37

H23

AL22

VSS138

VSS139

VSS2

VSS3

Y37

V37

AF23

VSS136

VSS137

VSS0

VSS1

AG37

W13

V13

U13

T13

R13

P13

N13

M13

L13

W12

V12

U12

T12

R12

P12

N12

M12

L12

AB26

AA26

Y26

AB25

AA25

Y25

AB24

AA24

Y24

AB23

AA23

Y23

AB22

AA22

Y22

AB21

AA21

Y21

R21

AB20

AA20

AB19

AA19

AB18

AA18

AB17

AA17

Y17

R17

AB16

AA16

Y16

W16

V16

U16

T16

R16

P16

N16

M16

L16

AB15

AA15

Y15

W15

V15

U15

T15

R15

P15

N15

M15

L15

AB14

AA14

Y14

W14

V14

U14

T14

R14

P14

N14

M14

L14

AA13

Y13

AA12

Y12

VTT_NCTF0

VTT_NCTF1

VTT_NCTF2

VTT_NCTF3

VTT_NCTF4

VTT_NCTF5

VTT_NCTF6

VTT_NCTF7

VTT_NCTF8

VSS_NCTF9

VSS_NCTF10

VSS_NCTF11

VSS_NCTF12

VSS_NCTF13

VSS_NCTF14

VSS_NCTF15

VSS_NCTF16

VSS_NCTF17

VSS_NCTF18

VSS_NCTF19

VSS_NCTF20

VSS_NCTF21

VSS_NCTF22

VSS_NCTF23

VSS_NCTF24

VSS_NCTF25

VSS_NCTF26

VSS_NCTF27

VSS_NCTF28

VSS_NCTF29

VSS_NCTF30

VSS_NCTF31

VSS_NCTF32

VSS_NCTF33

VSS_NCTF34

VSS_NCTF35

VSS_NCTF36

VSS_NCTF37

VSS_NCTF38

VSS_NCTF39

VSS_NCTF40

VSS_NCTF41

VSS_NCTF42

VSS_NCTF43

VSS_NCTF44

VSS_NCTF45

VSS_NCTF46

VSS_NCTF47

VSS_NCTF48

VSS_NCTF49

VSS_NCTF50

VSS_NCTF51

VSS_NCTF52

VSS_NCTF53

VSS_NCTF54

VSS_NCTF55

VSS_NCTF56

VSS_NCTF57

VSS_NCTF58

VSS_NCTF59

VSS_NCTF60

VSS_NCTF61

VSS_NCTF62

VSS_NCTF63

VSS_NCTF64

VSS_NCTF65

VSS_NCTF66

VSS_NCTF67

VSS_NCTF68

U33D

NCTF

VCC_NCTF42

VCC_NCTF43

VCC_NCTF44

VCC_NCTF45

N22

M22

L22

W21

ALVISO

VCC_NCTF38

VCC_NCTF39

VCC_NCTF40

VCC_NCTF41

U22

T22

R22

P22

VCC_NCTF34

VCC_NCTF35

VCC_NCTF36

VCC_NCTF37

M23

L23

W22

V22

VCC_NCTF30

VCC_NCTF31

VCC_NCTF32

VCC_NCTF33

T23

R23

P23

N23

VCC_NCTF26

VCC_NCTF27

VCC_NCTF28

VCC_NCTF29

L24

W23

V23

U23

VCC_NCTF22

VCC_NCTF23

VCC_NCTF24

VCC_NCTF25

R24

P24

N24

M24

VCC_NCTF18

VCC_NCTF19

VCC_NCTF20

VCC_NCTF21

W24

V24

U24

T24

VCC_NCTF14

VCC_NCTF15

VCC_NCTF16

VCC_NCTF17

P25

N25

M25

L25

VCC_NCTF10

VCC_NCTF11

VCC_NCTF12

VCC_NCTF13

V25

U25

T25

R25

W25

B B

VCC_NCTF46

VCC_NCTF47

VCC_NCTF48

VCC_NCTF49

VCC_NCTF50

VCC_NCTF51

VCC_NCTF52

VCC_NCTF53

VCC_NCTF54

VCC_NCTF55

VCC_NCTF56

VCC_NCTF57

VCC_NCTF58

VCC_NCTF59

VCC_NCTF60

VCC_NCTF61

VCC_NCTF62

VCC_NCTF63

VCC_NCTF64

VCC_NCTF65

VCC_NCTF66

VCC_NCTF67

VCC_NCTF68

VCC_NCTF69

VCC_NCTF70

VCC_NCTF71

VCC_NCTF72

VCC_NCTF73

VCC_NCTF74

VCC_NCTF75

VCC_NCTF76

VCC_NCTF77

VCC_NCTF78

V21

U21

T21

P21

N21

M21

L21

Y20

R20

P20

N20

M20

L20

Y19

R19

P19

N19

M19

L19

Y18

R18

P18

N18

M18

L18

W17

V17

U17

T17

P17

N17

M17

L17

VCC_NCTF6

VCC_NCTF7

VCC_NCTF8

VCC_NCTF9

N26

M26

L26

VTT_NCTF16

VTT_NCTF17

VCC_NCTF3

VCC_NCTF4

VCC_NCTF5

U26

T26

R26

P26

VSS_NCTF0

VSS_NCTF1

VSS_NCTF2

VSS_NCTF3

VSS_NCTF4

VSS_NCTF5

VSS_NCTF6

VSS_NCTF7

VSS_NCTF8

VTT_NCTF12

VTT_NCTF13

VTT_NCTF14

VTT_NCTF15

VCC_NCTF0

VCC_NCTF1

VCC_NCTF2

AB12

W26

V26

+VCCP

VTT_NCTF9

VTT_NCTF10

VTT_NCTF11

VCCSM_NCTF26

VCCSM_NCTF27

VCCSM_NCTF28

VCCSM_NCTF29

VCCSM_NCTF30

VCCSM_NCTF31

AD13

AC13

AB13

AD12

AC12

VCCSM_NCTF21

VCCSM_NCTF22

VCCSM_NCTF23

VCCSM_NCTF24

VCCSM_NCTF25

AC16

AD15

AC15

AD14

AC14

VCCSM_NCTF16

VCCSM_NCTF17

VCCSM_NCTF18

VCCSM_NCTF19

VCCSM_NCTF20

AD18

AC18

AD17

AC17

AD16

VCCSM_NCTF11

VCCSM_NCTF12

VCCSM_NCTF13

VCCSM_NCTF14

VCCSM_NCTF15

AC21

AD20

AC20

AD19

AC19

VCCSM_NCTF6

VCCSM_NCTF7

VCCSM_NCTF8

VCCSM_NCTF9

VCCSM_NCTF10

AD23

AC23

AD22

AC22

AD21

VCCSM_NCTF1

VCCSM_NCTF2

VCCSM_NCTF3

VCCSM_NCTF4

VCCSM_NCTF5

AC26

AD25

AC25

AD24

AC24

+2_5VSUS

VCCSM_NCTF0

AD26

DDRI is 2.5V, DDRII is 1.8V.

A A

Size Document Number Rev

Alviso (VSS, NCTF0

5

4

3

2

Date: Sheet

PROJECT : ED2L

Quanta Computer Inc.

11 38Wednesday, March 23, 2005

1

E3A

of

1

VCCRTC

R221

1 2

182K/F
R211
1M

A A

12

C253
.1U/10V_4

12

RTC

D20

R_3VRTC

1 3

+3VSUS

2 1

2 1

Q34
PMBS3904

2

12

BT1
BATCON

R240
*33_4

1 2

C282
*18P

1 2

*RB500V_NC

D21

RB500V

RTC_N01

+3VALW

R298

1K-0603

B B

RTC_N02

3.1V

C398
.1U/10V_4

AD[0..31]21,24,25

PME#21,24,25,31
PCLK_ICH17

C C

PLTRST#8,13,20,31,32

Try to remove
7SH32, if
possible.

D D

1

RTC_RST#

JP5
*SHORT PAD

3.8V

+3VRUN

4

2

NMI5
A20M#5

FERR#5

IGNNE#5
INTR5

CPUINIT#5

RCIN#32

GATEA2032

C397

C396

.1U/10V_4

1U/10V_6

R296

3K_6

R297

4.7K_6

R295
15K/F

R228 10K-0402

1 2

PCIRST#21,24,25

CLKRUN#24,25,31,32

R204 10K-0402

+3VSUS

C439

5

U34

2
1

7SH32

PDD[0..15]20

PDCS1#20
PDCS3#20
PDA020
PDA120
PDA220
PDIOR#20
PDIOW#20
PIORDY20
IRQ1420
PDDREQ20
PDDACK#20

2

SM_INTRUDER#

FERR#

RCIN#
GATEA20

VCCRTC

+5VALW

12

.047U/10V_4

C233

C232

PLTRST#_1

3

CLK_32KX1

12

15P

14

23

CLK_32KX2

12

15P

R199 56_4

1 2

12

PDD[0..15]

3

32.768KHZ
W1

R205
10M_4

1 2

R_FERR#

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCIRST#
PLTRST#_1

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

PDCS1#
PDCS3#
PDA0
PDA1
PDA2
PDIOR#
PDIOW#
PIORDY
IRQ14
PDDREQ
PDDACK#

AA2
AA3

AA5

AF25
AF23

AF24
AG26
AG24

AF27
AD23

AF22

AF19

AD14

AF15

AF14
AD12
AE14
AC11
AD11
AB11
AE13

AF13
AB12
AB13
AC13
AE15
AG15
AD13

AD16
AE17
AC16
AB17
AC17
AE16
AC14

AF16
AB16
AB14
AB15

Y1
Y2

E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4

J5
K2
K5
D4
L6

G3

H4
H2
H5
B3

M6

B2
K6
K3
A5
L1
K4

P6

G6

R2
R5

4

U35A

RTCX1
RTCX2

RTCRST#
INTRUDER#

INTVRMEN

NMI
A20M#
FERR#
IGNNE#
INTR
INIT#
RCIN#
A20GATE

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PME#
PCICLK
PCIRST#
PLTRST#
CLKRUN#/GPIO32

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

DCS1#
DCS3#
DA0
DA1
DA2
DIOR#
DIOW#
IORDY
IDEIRQ
DDREQ
DDACK#

ICH6-M

4

RTC

CPU

PCI

IDE

LAD0
LAD1/FB1
LAD2/FB2
LAD3/FB3

LDRQ0#

LDRQ1#/GPI41

LPC

LFRAME#

CPUPWRGD/GPO49

INIT3_3V#

THRMTRIP#

SMI#
STPCLK#
CPUSLP#

DPSLP#/TP[2]

DPRSLP#/TP[4]

C/BE0#
C/BE1#
C/BE2#
C/BE3#

FRAME#

IRDY#

TRDY#

DEVSEL#

STOP#

PAR
SERR#
PERR#

PLOCK#

REQ0#
REQ1#
REQ2#
REQ3#

REQ4#/GPI40

REQ5#/GPI1
REQ6#/GPI0

GNT0#
GNT1#
GNT2#

GNT3#
GNT4#/GPO48
GNT5#/GPO17
GNT6#/GPO16

PIRQA#
PIRQB#
PIRQC#

PIRQD#
PIRQE#/GPI2
PIRQF#/GPI3

PIRQG#/GPI4
PIRQH#/GPI5

SATALED#

SATA0_RXN
SATA0_RXP
SATA0_TXN

SATA0_TXP

SATA2_RXN
SATA2_RXP
SATA2_TXN

SATA

SATA2_TXP

SATA_CLKN
SATA_CLKP

SATARBIAS#

SATARBIAS

ACZ_BIT_CLK

ACZ_SYNC

ACZ_RST#

ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2

ACZ_SDO

AC-97/

AZALIA

5

LAD0/FWH0

P2

LAD1/FWH1

N3

LAD2/FWH2

N5

LAD3/FWH3

N4

LPC_DRQ0#

N6

LPC_DRQ1#

P4

LFRAME#/FWH4

P3

CPUPWRGD

AG25
AE22

THERMTRIP#_ICH

AE23
AG27
AE26

R_CPUSLP#

AE27
AD27
AE24

C/BE0#

J6

C/BE1#

H6

C/BE2#

G4

C/BE3#

G2

FRAME#

J3

IRDY#

A3

TRDY#

J2

DEVSEL#

C3

STOP#

J1

PAR

E1

SERR#

G5

PERR#

E3

PLOCK#

C5

REQ0#

L5

REQ1#

B5

REQ2#

M5

REQ3#

B8

REQ4#

F7

REQ5#

E8

REQ6#

B7

GNT0#

C1

GNT1#

B6

GNT2#

F1
C8
E7
F6
D8

PIRQA#

N2

PIRQB#

L2

PIRQC#

M1

PIRQD#

L3

ICH_GPIO2

D9
C7
C6
M3

SATA_LED#

AC19

SATA_RXN0_C

AE3

SATA_RXP0_C

AD3

SATA_TXN0_C

AG2

SATA_TXP0_C

AF2
AD7

AC7
AF6
AG6

AC2
AC1

AG11

SATABIAS

AF11

Place within 500mils
of ICH6 ball

C10
B9
A10

F11

T60

F10

T135

B10
C9

5

LAD0/FWH0 31,32
LAD1/FWH1 31,32
LAD2/FWH2 31,32
LAD3/FWH3 31,32
LPC_DRQ0# 31

LFRAME#/FWH4 31,32

R201 56_4

R208 *0_NC

1 2

R200 0_4

1 2

T70
T76
T61
T65

2 1

D18 *BAS316

CLK_PCIE_SATA# 17
CLK_PCIE_SATA 17

R207 24.9/F

1 2

R276 39_4
R275 39_4
R277 39_4

R274 39_4

C383

*10P_4_NC

CPUPWRGD 5

12

6

DPRSTP#

R197 56_4

C/BE0# 21,24,25
C/BE1# 21,24,25
C/BE2# 21,24,25
C/BE3# 21,24,25

FRAME# 21,24,25
IRDY# 21,24,25
TRDY# 21,24,25
DEVSEL# 21,24,25
STOP# 21,24,25
PAR 21,24,25
SERR# 21,24,25
PERR# 21,24,25
PLOCK# 21

REQ0# 25
REQ1# 21
REQ2# 24

GNT0# 25
GNT1# 21
GNT2# 24

PIRQA# 21,25
PIRQB# 24
PIRQC# 21
PIRQD# 21,24

M_SEN# 19,31,32

SATA_RXN0_C 20
SATA_RXP0_C 20

C380
*10P_4_NC

1 2

6

+VCCP

< 2"

1 2

AC_BITCLK 28
AC_SYNC 28
AC_RESET# 28

AC_SDOUT 28

7

RCIN#

SERIRQ13,21,24,31,32

R198
75/F_4

AC_SDIN0 28

Size Document Number Rev

Date: Sheet

SERIRQ IRDY#
GATEA20
IRQ14

+3VRUN

PIRQD#
STOP#
PIRQA#
PIRQC#

+3VRUN

THERMTRIP# 5,8
SMI# 5
STPCLK# 5
CPUSLP# 5,7
DPSLP# 5
DPRSTP# 5

+VCCP

REQ5#
SERR#
REQ4#
REQ0#

+3VRUN

REQ0 : LAN
REQ1 : 1394/CARDBUS

REQ2 : MINI PCI

GNT0 : LAN
GNT1 : 1394/CARDBUS

GNT2 : MINI PCI

MB_ID0
MB_ID1
MB_ID2

2

SATA_TXN0_C

SATA_TXP0_C

Distance between the ICH-6 M and
cap on the "P" signal should be
identical distance between the
ICH-6 M and cap on the "N" signal
for same pair.

Quanta Computer Inc.

ICH6-M (CPU, PCI, IDE, SATA, AC97)

7

PCI Pullups

RP13

6
7
8
9

10

8.2KX8
RP11

6
7
8
9

10

8.2KX8

R309 R308

Dothan A

Installed Installed

Dothan B

Yonah Installed NC

RP12

6
7
8
9

10

8.2KX8

R273

*100K_4_NC

*100K_4_NC

R272
1K-0402

Board ID

+3VRUN

13

HDD LED

47K

Q30

10K

C437 *3900P

1 2

C438 *3900P

1 2

*DTA114YUA

PROJECT : ED2L

5
4
3
2
1

5
4
3
2
1

NC NC

R280

HDDLED# 20,24

SATA_RXN0 20

SATA_RXP0 20

12 38Wednesday, March 23, 2005

8

+3VRUN

+3VRUN

5
4
3
2
1

R279
1K-0402

8

REQ3#
DEVSEL#
PERR#

PIRQB#
REQ2#
TRDY#
FRAME#

+3VRUN

+3VRUN

of

PLOCK#
REQ6#
REQ1#
ICH_GPIO2

R237

*100K_4_NC

R236
1K-0402

E3A

1

2

3

4

5

6

7

8

A A

CLK48_USB

R269
*68_4

C362
*2.2P_4

CLK_PCIE_ICH#17
CLK_PCIE_ICH17

B B

PCLK_SMB17
PDAT_SMB17

LIDICH#18

THRM#5

ICH_PWROK32

DPRSLPVR33

DNBSWON#32
RSMRST#32

IMVP_PWRGD8,33

PM_BMBUSY#8

PR_INSERT#31,32

ICH_GPO1920

LPCPD#21,31

PCSPK28
KBSMI#31,32

SWI#32

RST_HDD#20

SCI#32

SWI#

PR_DOCK#

KBSMI#
THRM#

+3VSUS

14M_ICH17

C C

+3VSUS

+3VRUN

+3VSUS

D D

+3VRUN

R257

33_4

1 2

C336
10P_4

1 2

R299 10K-0402

R209 8.2K

1 2

R225 10K-0402

R203 8.2K

1 2

R210 10K-0402

ICH_PWROK

1 2

RSMRST#

1 2

R219 10K-0402

1

2

LIDICH#

ICH_RI#
THRM#
ICH_PWROK
DPRSLPVR
BATLOW#
DNBSWON#
RSMRST#
IMVP_PWRGD
PM_BMBUSY#
LPCPD#

PCSPK
PR_INSERT#
KBSMI#
SWI#
SCI#

DMI_RXN08
DMI_RXP08

DMI_TXN08
DMI_TXP08

DMI_RXN18
DMI_RXP18

DMI_TXN18
DMI_TXP18

USBP0+24

USBP2+31

USBOC2#31

USBP4+24

USBOC4#24

CLK48_USB17

R21810K-0402

USBP0-24

USBP2-31

USBP4-24

SW1010C

T71 *PAD

T132*PAD
T72 *PAD
T63 *PAD

OC0#

OC2#

OC4# OC5#

OC6#
CLK48_USB

T62 *PAD
T64 *PAD
T128*PAD
T129*PAD

T58 *PAD
T57 *PAD
T125*PAD
T127*PAD

T49 *PAD

D2

PR_DOCK#

21

T80 *PAD
T50 *PAD

+3VSUS

RP10

7 8
5 6
3 4
1 2

8P4R-10K

3

U35B

D21

USBP0P

C21

USBP0N

C27

OC0#

C19

USBP2P

D19

USBP2N

B26

OC2#

D17

USBP4P

E17

USBP4N

C23

OC4#/GPI9

D15

USBP6P

C15

USBP6N

C25

OC6#/GPI14

A27

CLK48

T25

DMI0_RXN

T24

DMI0_RXP

R27

DMI0_TXN

R26

DMI0_TXP

V25

DMI1_RXN

V24

DMI1_RXP

U27

DMI1_TXN

U26

DMI1_TXP

AD25

DMI_CLKN

AC25

DMI_CLKP

H25

HSIN0

H24

HSIP0

G27

HSON0

G26

HSOP0

K25

HSIN1

K24

HSIP1

J27

HSON1

J26

HSOP1

Y4

SMBCLK

W5

SMBDATA

W6

SMBALERT#/GPI11

T2

RI#

AC20

THRM#

AA1

PWROK

AE20

DPRSLPVR/TP1

V2

BATLOW#/TP0

U1

PWRBTN#

Y3

RSMRST#

AF21

VRMPWRGD

AD19

BM_BUSY#/GPIO6

W3 AD22

SUS_STAT#/LPCPD# STP_CPU#/GPO20

V6

SUSCLK

E10

CLK14

F8

SPKR

AE19

GPI7

R1

GPI8

M2

GPI12

R6

GPI13

AB21

GPO19

AD20

GPO21

AD21

GPO23

V3

GPIO24

D12

EE_CS

B12

EE_SHCLK

D11

EE_DOUT

F13

EE_DIN

AC5

RSVD1

AD5

RSVD2

AF4

RSVD3

AG4

RSVD4

AC9

RSVD5

ICH6-M

SCI#

LIDICH#

PDAT_SMB
SMB_LINK_ALERT#

USB

DMI

PCI-EXPRESS

SM&SMI

PM

MISC&GPIO

LAN

RESERVED

+3VSUS

7 8
5 6
3 4
1 2

8P4R-10K

4

DMI_ZCOMP

DMI_IRCOMP

LINKALERET#

SYS_RESET#

MCH_SYNC#

STP_PCI#/GPO18

SATA0GP/GPIO26

SATA1GP/GPIO29
SATA2GP/GPIO30
SATA3GP/GPIO31

LAN_RSTSYNC

RP9

USBP1P
USBP1N

OC1#
USBP3P
USBP3N

OC3#
USBP5P
USBP5N

OC5#/GPI10

USBP7P
USBP7N

OC7#/GPI15

USBRBIAS

USBRBIAS#

DMI2_RXN
DMI2_RXP
DMI2_TXN
DMI2_TXP

DMI3_RXN
DMI3_RXP
DMI3_TXN
DMI3_TXP

HSIN2

HSIP2
HSON2
HSOP2

HSIN3

HSIP3
HSON3
HSOP3

SMLINK0
SMLINK1

SLP_S3#
SLP_S4#
SLP_S5#

LAN_RST#

WAKE#

SERIRQ
GPIO25
GPIO27

GPIO28

GPIO33
GPIO34

LAN_RXD0
LAN_RXD1
LAN_RXD2

LAN_TXD0
LAN_TXD1
LAN_TXD2

LAN_CLK

RSVD6
RSVD7
RSVD8
RSVD9

BATLOW#
ICH_RI#
PCLK_SMB
R_SYS_RESET#

B20
A20
B27
B18
A18
C26
A16
B16
D23
B14
A14
C24
B22
A22

Y25
Y24
W27
W26

AB24
AB23
AA27
AA26

F24
F23

M25
M24
L27
L26

P24
P23
N27
N26

W4
U6
Y5

T4
T5
T6
V5
U2
U5
AG21

AC21
AB20
P5

AF17
R3
T3
AE18
AF18
AG18

AF20
AC18

E12
E11
C13
C12
C11
E13

F12
B11

AD9
AF8
AG8
U3

OC1#

OC3#

OC7#

DMI_COMP

T122*PAD
T56*PAD
T123*PAD
T124*PAD

T55*PAD
T53*PAD
T118*PAD
T120*PAD

SMLINK0
SMLINK1
SMB_LINK_ALERT#

R_SYS_RESET#
ICH_PCIE_WAKE#
MCH_SYNC#

T121*PAD

T46*PAD
T48*PAD

T67*PAD
T59*PAD
T138*PAD
T137*PAD
T136*PAD
T133*PAD

T66*PAD
T134*PAD

5

USBP1+ 24
USBP1- 24

USBOC1# 24USBOC0#24

BT_USBP3+ 24

BT_USBP3- 24

CCD_USBP5+ 24

CCD_USBP5- 24

Place within 500mils of ICH-6

USBRBIAS

DMI_RXN2 8

DMI_RXP2 8

DMI_TXN2 8

DMI_TXP2 8
DMI_RXN3 8

DMI_RXP3 8

DMI_TXN3 8

DMI_TXP3 8

R245 24.9/F

R260 22.6/F

12

12

+1_5VRUN

01/05

+3VSUS

Place within 500mils of ICH-6

SUSB# 32

T54
R229 0_4

1 2

12

R206
33_4

6

SUSC# 32
PLTRST# 8,12,20,31,32

SYS_RESET# 5

STP_PCI# 17
STP_CPU# 6,17,33
SERIRQ 12,21,24,31,32

LCDID1 18
LCDID0 18

OC6#
OC7#
OC4#
OC5#

RP14

6
7
8
9

10

10KX8

ICH_PCIE_WAKE#

SMLINK0

SMLINK1

MCH_SYNC#

Size Document Number Rev

ICH6-M (USB, DMI, LPC)

Date: Sheet

7

5
4
3
2
1

R226 680

1 2

R222 10K-0402

1 2

R223 10K-0402

1 2

R202 10K-0402

1 2

SYS_RESET# should be
high faster than
ICH_PWROK.

PROJECT : ED2L

Quanta Computer Inc.

OC0#
OC3#
OC1#
OC2#

+3VSUS

+3VRUN

+3VSUS

13 38Wednesday, March 23, 2005

of

8

E3A

1

L36 BLM41P600SPG

+5VSUS

+5VRUN

+3VRUN

+5VALW

+5VSUS

+3VSUS

1 2

C241

10U_6.3V_8

1 2

+3VRUN

C237
.1U/10V_4

1 2

+3VRUN

+3VSUS

+3VSUS

1 2

R212

1R

+1_5VRUN

1

220U_4V_L

R278 *10_NC

1 2

R271 100/F

1 2

D19

2 1

RB751V

R241 *10_NC

1 2

R242 10_4

1 2

D17

2 1

RB751V

VCCDMIPLL_R

+3VRUN

C238
.1U/10V_4

1 2

C234
.1U/10V_4

1 2

C254

.1U/10V_4

1 2

+1_5VRUN

A A

B B

+1_5VRUN

C C

D D

C279

12

+

+1_5VRUN

+1_5VRUN

L34 BLM11A121S

.1U/10V_4

1 2

C240

.1U/10V_4

1 2

C337

.1U/10V_4

1 2

C343

.1U/10V_4

1 2

+1_5V_PCIE

C244

.1U/10V_4

C344
.1U/10V_4

1 2

C323
.1U/10V_4

1 2

C319

2

C320
.1U/10V_4

1 2

1 2

.1U/10V_4

V5REF

12

C357

1U/10V_6

CT_0229: Adding
1u cap to meet
CRB.1501

V5REF_SUS

12

C316

1U/10V_6

+1_5V_SATA_RX

C280
.1U/10V_4

1 2

+1_5V_SATA_TX

12

C242

.01U/16V_4

1 2

VCCDMIPLL

2

1 2

C307

C248
.1U/10V_4

1 2

U35C

AA22

VCC1_5_1

AA23

VCC1_5_2

AA24

VCC1_5_3

AA25

VCC1_5_4

AB25

VCC1_5_5

AB26

VCC1_5_6

AB27

VCC1_5_7

F25

VCC1_5_8

F26

VCC1_5_9

F27

VCC1_5_10

G22

VCC1_5_11

G23

VCC1_5_12

G24

VCC1_5_13

G25

VCC1_5_14

H21

VCC1_5_15

H22

VCC1_5_16

J21

VCC1_5_17

J22

VCC1_5_18

K21

VCC1_5_19

K22

VCC1_5_20

L21

VCC1_5_21

L22

VCC1_5_22

M21

VCC1_5_23

M22

VCC1_5_24

N21

VCC1_5_25

N22

VCC1_5_26

N23

VCC1_5_27

N24

VCC1_5_28

N25

VCC1_5_29

P21

VCC1_5_30

P25

VCC1_5_31

P26

VCC1_5_32

P27

VCC1_5_33

R21

VCC1_5_34

R22

VCC1_5_35

T21

VCC1_5_36

T22

VCC1_5_37

U21

VCC1_5_38

U22

VCC1_5_39

V21

VCC1_5_40

V22

VCC1_5_41

W21

VCC1_5_42

W22

VCC1_5_43

Y21

VCC1_5_44

Y22

VCC1_5_45

AA6

VCC1_5_46

AB4

VCC1_5_47

AB5

VCC1_5_48

AB6

VCC1_5_49

AC4

VCC1_5_50

AD4

VCC1_5_51

AE4

VCC1_5_52

AE5

VCC1_5_53

AF5

VCC1_5_54

AG5

VCC1_5_55

AA7

VCC1_5_56

AA8

VCC1_5_57

AA9

VCC1_5_58

AB8

VCC1_5_59

AC8

VCC1_5_60

AD8

VCC1_5_61

AE8

VCC1_5_62

AE9

VCC1_5_63

AF9

VCC1_5_64

AG9

VCC1_5_65

AC27

VCCDMIPLL

E26

VCC3_3_1

AE1

VCCSATAPLL

AG10

VCC3_3_22

A13

VCCLAN3_3/VCCSUS3_3_1

F14

VCCLAN3_3/VCCSUS3_3_2

G13

VCCLAN3_3/VCCSUS3_3_3

G14

VCCLAN3_3/VCCSUS3_3_4

A11

VCCSUS3_3_1

U4

VCCSUS3_3_2

V1

VCCSUS3_3_3

V7

VCCSUS3_3_4

W2

VCCSUS3_3_5

Y7

VCCSUS3_3_6

A17

VCCSUS3_3_7

B17

VCCSUS3_3_8

C17

VCCSUS3_3_9

F18

VCCSUS3_3_10

G17

VCCSUS3_3_11

G18

VCCSUS3_3_12

ICH6-M

CT_0505: Change footprint to
mbga609-intel-ich6 from
MBGA609-ICH6

3

VCC

VCCLAN1_5/VCCSUS1_5_1
VCCLAN1_5/VCCSUS1_5_2

3

VCC1_5_79
VCC1_5_80
VCC1_5_81
VCC1_5_82
VCC1_5_83
VCC1_5_84
VCC1_5_85
VCC1_5_86
VCC1_5_87
VCC1_5_88
VCC1_5_89
VCC1_5_90
VCC1_5_91
VCC1_5_92
VCC1_5_93
VCC1_5_94
VCC1_5_95
VCC1_5_96
VCC1_5_97
VCC1_5_98

VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCC3_3_8

VCC3_3_9
VCC3_3_10
VCC3_3_11

VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
VCC3_3_19
VCC3_3_20
VCC3_3_21

VCCSUS1_5_1
VCCSUS1_5_2

VCCSUS1_5_3

VCC1_5_67
VCC1_5_68

VCC1_5_69
VCC1_5_70
VCC1_5_71
VCC1_5_72
VCC1_5_73
VCC1_5_74
VCC1_5_75
VCC1_5_76
VCC1_5_77
VCC1_5_78

VCC2_5_2

VCC2_5_4

V5REF1

V5REF2
V5REF_SUS
VCCUSBPLL

VCCSUS3_3_20

VCCRTC

V_CPU_IO1
V_CPU_IO2
V_CPU_IO3

VCCSUS3_3_13
VCCSUS3_3_14
VCCSUS3_3_15
VCCSUS3_3_16
VCCSUS3_3_17
VCCSUS3_3_18
VCCSUS3_3_19

AA19
AA20
AA21
L11
L12
L14
L16
L17
M11
M17
P11
P17
T11
T17
U11
U12
U14
U16
U17
F9

A6
B1
E4
H1
H7
J7
L4
L7
M7
P1

AA12
AA14
AA15
AA17
AC15
AD17
AG13
AG16
AG19
AA10

G19
R7

U7
G8
D24

D25
D26
D27
E20
E21
E22
E23
E24
F20
G20

P7
AB18

A8
AA18

F21
A25

A24
AB3

G10
G11

AB22
AD26
AG23

C16
D16
E16
F15
F16
G15
G16

4

C322
.1U/10V_4

1 2

C247
.1U/10V_4

1 2

C281
.1U/10V_4

1 2

+1_5VRUN

V5REF
V5REF_SUS

VCCRTC

+1_5VRUN

4

C321
.1U/10V_4

1 2

+3_3V_PCI

C314
.1U/10V_4

1 2

+3_3V_ICH

C341
.1U/10V_4

1 2

C277
.1U/10V_4

1 2

C274
.1U/10V_4

1 2

C272
.1U/10V_4

1 2

C275
.1U/10V_4

1 2

C239
.1U/10V_4

1 2

C318

.1U/10V_4

1 2

C235

.1U/10V_4

1 2

C317
.1U/10V_4

1 2

+3VRUN

+3VRUN

C269
.1U/10V_4

1 2

C252
.1U/10V_4

1 2

C276

.1U/10V_4

1 2

+3VSUS

5

.01U/16V_4

1 2

+VCCP

5

C257

+1_5VSUS

+1_5VSUS

+1_5VRUN

+2_5VRUN

C340

.01U/16V_4

1 2

VCCRTC

+1_5VRUN

+1_5VRUN

C243

.1U/10V_4

1 2

6

U35D

A1

VSS001

A12

VSS002

A15

VSS003

A19

VSS004

A21

VSS005

A23

VSS006

A26

VSS007

A4

VSS008

A7

VSS009

A9

VSS010

AA11

VSS011

AA13

VSS012

AA16

VSS013

AA4

VSS014

AB1

VSS015

AB10

VSS016

AB19

VSS017

AB2

VSS018

AB7

VSS019

AB9

VSS020

AC10

VSS021

AC12

VSS022

AC22

VSS023

AC23

VSS024

AC24

VSS025

AC26

VSS026

AC3

VSS027

AC6

VSS028

AD1

VSS029

AD10

VSS030

AD15

VSS031

AD18

VSS032

AD2

VSS033

AD24

VSS034

AD6

VSS035

AE10

VSS036

AE11

VSS037

AE12

VSS038

AE2

VSS039

AE21

VSS040

AE25

VSS041

AE6

VSS042

AE7

VSS043

AF1

VSS044

AF10

VSS045

AF12

VSS046

AF26

VSS047

AF3

VSS048

AF7

VSS049

AG1

VSS050

AG12

VSS051

AG14

VSS052

AG17

VSS053

AG20

VSS054

AG22

VSS055

AG3

VSS056

AG7

VSS057

B13

VSS058

B15

VSS059

B19

VSS060

B21

VSS061

B23

VSS062

B24

VSS063

B25

VSS064

C14

VSS065

C18

VSS066

C20

VSS067

C22

VSS068

C4

VSS069

D1

VSS070

D10

VSS071

D13

VSS072

D14

VSS073

D18

VSS074

D20

VSS075

D22

VSS076

D7

VSS077

E14

VSS078

E15

VSS079

E18

VSS080

E19

VSS081

E25

VSS082

F17

VSS083

F19

VSS084

F22

VSS085

F4

VSS086

Size Document Number Rev

6

Date: Sheet

7

VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110

GND

ICH6-M

VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172

PROJECT : ED2L

Quanta Computer Inc.

ICH6-M (Power & GND)

7

G1
G12
G21
G7
G9
H23
H26
H27
J23
J24
J25
J4
K1
K23
K26
K27
K7
L13
L15
L23
L24
L25
M12
M13
M14
M15
M16
M23
M26
M27
M4
N1
N11
N12
N13
N14
N15
N16
N17
N7
P12
P13
P14
P15
P16
P22
R11
R12
R13
R14
R15
R16
R17
R23
R24
R25
R4
T1
T12
T13
T14
T15
T16
T23
T26
T27
T7
U13
U15
U23
U24
U25
V23
V26
V27
V4
W1
W23
W24
W25
W7
Y23
Y26
Y27
Y6
E27

8

14 38Wednesday, March 23, 2005

8

E3A

of

1

+2_5VSUS +2_5VSUS

+1_25VSUS

1

R231

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

MD1
MD0 MD4 MD0

A A

CLK_SDRAM08

CLK_SDRAM0#8

B B

+2_5VSUS +2_5VSUS

R247 200_6
R248 200_6

C C

D D

+3VRUN +3VRUN

SM_DQS0
MD7

MD2
MD8 MD9

SM_DQS1
MD11 MD14

MD10 MD15

CLK_SDRAM0
CLK_SDRAM0#

MD16
MD17

SM_DQS2
MD19

MD18 MD22
MD24 MD28

MD25
SM_DQS3

MD26 MD30
MD31 MD27

CKE1 CKE3 CKE2
M_A_MA12 M_A_MA11

M_A_MA9 M_B_MA9 M_B_MA8
M_A_MA7
M_A_MA3

M_A_MA10
M_A_BA0

M_A_BMWEA#

SM_CS0#
M_A_MA13

MD33
MD32

SM_DQS4
MD34 MD38

MD35
MD40

MD41
SM_DQS5

MD46 MD43
MD47

MD53
MD48 MD52

SM_DQS6
MD50 MD54

MD51
MD56

MD60
SM_DQS7

MD59
MD58

SMBDT
SMBCK

*10K_4_NC

C304
.1U/10V_4

1

2

+1_25VSUS +1_25VSUS+1_25VSUS

SODIMM0 SODIMM1

CN24

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0
VSS

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2
VDD
CKE1
DU
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE
S0
DU(A13)
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD(SPD)
VDD(ID)

QTC_DDR_SODIMM_H9.2

CLOCK 0,1,2 CLOCK 3,4,5

VREF

VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

DQ12

VDD

DQ13

DM1

VSS
DQ14
DQ15

VDD

VDD

VSS

VSS
DQ20

DQ21

VDD

DM2
DQ22

VSS
DQ23
DQ28

VDD
DQ29

DM3

VSS
DQ30
DQ31

VDD

VSS

DM8

VDD

DU/RESET

VSS

VSS

VDD

VDD
CKE0

DU/BA2

VSS

VDD

RAS

CAS

VSS
DQ36
DQ37

VDD

DM4
DQ38

VSS
DQ39
DQ44

VDD
DQ45

DM5

VSS
DQ46
DQ47

VDD

VSS
DQ52
DQ53

VDD

DM6
DQ54

VSS
DQ55
DQ60

VDD

PC2100 DDR SDRAM SO-DIMM

(200P)

DQ61

DM7

VSS
DQ62
DQ63

VDD

2

CB4
CB5

CB6
CB7

A11

BA1

CK1
CK1

SA0
SA1
SA2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116
118
120
122

S1

124

DU

126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DU

MD5

SDM0
MD6

MD3

MD12MD13
SDM1

MD20
MD21

SDM2

MD29
SDM3

CKE0

M_A_MA8
M_A_MA6

M_A_MA4M_A_MA5
M_A_MA2
M_A_MA0 M_B_MA1

M_A_BA1
M_A_SRASA#
M_A_SCASA#
SM_CS1#

MD37
MD36

SDM4

MD39
MD45

MD44
SDM5

MD42
CLK_SDRAM1#

CLK_SDRAM1
MD49

SDM6

MD55
MD61

MD57
SDM7

MD62
MD63

SMbus address A0

3

CLK_SDRAM38

CLK_SDRAM3#8

CLK_SDRAM1# 8

3

R234 200_6
R232 200_6

CGDAT_SMB17
CGCLK_SMB17

MD1

SM_DQS0
MD7

MD2
MD8

MD13
SM_DQS1

MD11
MD10

CLK_SDRAM3
CLK_SDRAM3#

MD16
MD17

SM_DQS2
MD19

MD18
MD24

MD25
SM_DQS3

MD26
MD31

M_B_MA12

M_B_MA7
M_B_MA3

M_B_MA10
M_B_BA0
M_B_BMWEA#

M_B_MA13

MD33
MD32

SM_DQS4
MD34

MD35
MD40

MD41
SM_DQS5

MD46
MD47

MD53
MD48

SM_DQS6
MD50

MD51
MD56

MD60
SM_DQS7

MD59
MD58

SMBDT
SMBCK

C327
.1U/10V_4

4

+2_5VSUS +2_5VSUS

CN23

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

R230

*10K_4_NC

85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

DU/RESET

DU
VSS
CK2
CK2
VDD
CKE1
DU
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE
S0
DU(A13)
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD

PC2100 DDR SDRAM SO-DIMM

DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD(SPD)
VDD(ID)

QTC_DDR_SODIMM_H9.2

CKE 2,3CKE 0,1

4

VREF

DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQ30
DQ31

CKE0

DU/BA2

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQ46
DQ47

DQ52
DQ53

DQ54
DQ55

DQ60

(200P)

DQ61

DQ62
DQ63

VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

VDD
DM1

VSS

VDD
VDD
VSS
VSS

VDD
DM2

VSS

VDD
DM3

VSS

VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7

VSS
VSS
VDD
VDD

VSS

VDD
BA1
RAS
CAS

VSS

VDD
DM4

VSS

VDD
DM5

VSS

VDD
CK1
CK1
VSS

VDD
DM6

VSS

VDD
DM7

VSS

VDD
SA0
SA1
SA2

5

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100

A11

102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116
118
120
122

S1

124

DU

126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DU

MD5
MD4

SDM0
MD6

MD3
MD9

MD12
SDM1

MD14
MD15

MD20
MD21

SDM2
MD23MD23

MD22
MD28

MD29
SDM3

MD30
MD27

M_B_MA11

M_B_MA6
M_B_MA4M_B_MA5
M_B_MA2
M_B_MA0M_A_MA1

M_B_BA1
M_B_SRASA#
M_B_SCASA#
SM_CS3#SM_CS2#

MD37
MD36

SDM4
MD38

MD39
MD45

MD44
SDM5

MD43
MD42

CLK_SDRAM4#
CLK_SDRAM4

MD49
MD52

SDM6
MD54

MD55
MD61

MD57
SDM7

MD62
MD63

+3VRUN

CLK_SDRAM4# 8
CLK_SDRAM4 8CLK_SDRAM1 8

SMbus address A1

5

+2_5VSUS

C283
.1U/10V_4

+2_5VSUS

C309
.1U/10V_4

+2_5VSUS

C377
.1U/10V_4

+2_5VSUS

C329
.1U/10V_4

+2_5VSUS

C312
.1U/10V_4

+1_25VSUS

C365
.1U/10V_4

6

6

C370
.1U/10V_4

C293
.1U/10V_4

C286
.1U/10V_4

C374
.1U/10V_4

C367
.1U/10V_4

C332
.1U/10V_4

C266
.1U/10V_4

C287
.1U/10V_4

C371
.1U/10V_4

C373
.1U/10V_4

C271
.1U/10V_4

C306
.1U/10V_4

7

C265

C256
.1U/10V_4

C366
.1U/10V_4

C382
.1U/10V_4

C311
.1U/10V_4

C305
.1U/10V_4

+2_5VSUS

C267
.1U/10V_4

C375

C289

.1U/10V_4

.1U/10V_4

C288

C292

.1U/10V_4

.1U/10V_4

C284

C310

.1U/10V_4

.1U/10V_4

C372

C313

.1U/10V_4

.1U/10V_4

C260

C259

.1U/10V_4

.1U/10V_4

12

C470
150U/6.3V_7

M_A_MA[0..13]
M_A_BA0
M_A_BA1
M_A_SRASA#
M_A_SCASA#
M_A_BMWEA#

M_B_MA[0..13]
M_B_BA0
M_B_BA1
M_B_SRASA#
M_B_SCASA#
M_B_BMWEA#

MD[0..63]
SM_DQS[0..7]
SDM[0..7]

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

CKE0
CKE1
CKE2
CKE3

Size Document Number Rev

Date: Sheet

C388

+

150U/4V

<Type>
CC3528

Quanta Computer Inc.

DDR SO-DIMM 200P

7

C268

.1U/10V_4

.1U/10V_4

C285

C376

.1U/10V_4

.1U/10V_4

C262

C369

.1U/10V_4

.1U/10V_4

C308

C333

.1U/10V_4

.1U/10V_4

C261

C258

.1U/10V_4

.1U/10V_4

M_A_MA[0..13] 9,16
M_A_BA0 9,16
M_A_BA1 9,16
M_A_SRASA# 9,16
M_A_SCASA# 9,16
M_A_BMWEA# 9,16

M_B_MA[0..13] 9,16
M_B_BA0 9,16
M_B_BA1 9,16
M_B_SRASA# 9,16
M_B_SCASA# 9,16
M_B_BMWEA# 9,16

MD[0..63] 9,16
SM_DQS[0..7] 9,16
SDM[0..7] 9,16

SM_CS0# 8,16

SM_CS1# 8,16

SM_CS2# 8,16

SM_CS3# 8,16

CKE0 8,16
CKE1 8,16
CKE2 8,16
CKE3 8,16

PROJECT : ED2L

8

C378
.1U/10V_4

C364
.1U/10V_4

C368
.1U/10V_4

C270
.1U/10V_4

C291
.1U/10V_4

15 38Wednesday, March 23, 2005

8

C379
.1U/10V_4

C290
.1U/10V_4

C330
.1U/10V_4

C264
.1U/10V_4

E3A

of