1
2
3
4
5
6
7
8
PCB STACK UP
CW4 BLOCK DIAGRAM
01
LAYER 1 : TOP
LAYER 2 : SGND1
A A
LAYER 3 : IN1
LAYER 4 : IN2
LAYER 5 : VCC
CPU
Merom
478P (uPGA)/35W
PAGE 3,4
LAYER 6 : IN3
LAYER 7 : SGND2
CPU THERMAL
SENSOR
PAGE 3
CLK_CPU_BCLK,CLK_CPU_BCLK#
CLK_MCH_BCLK,CLK_MCH_BCLK#
DREFCLK,DREFCLK#
DREFSSCLK,DREFSSCLK#
14.318MHz
CLOCK GEN
ICS9LPRS365AGLFT
64pinsTSSOP
PAGE 2
LAYER 8 : BOT
NVDIA NB8M
820p FCBGA
PAGE 14,15,16,17
DDRII-S O D I M M 1
DDRII 533,667 MHz
PCI-Express 16X
N O RTH BRIDGE
PAG 13,14
B B
DDRII-S O D I M M 2
DDRII 533,667 MHz
PAG 13,14
Crestline
PAGE
5,6,7,8,9,10,11
DMI LINK
TV_OUT
CRT_OUT
LVDS(1 Chann e l )
CRT/S-VIDEO
Panel Connector
PAGE 22
PAGE 23
NBSRCCLK, NBSRCCLK#
USB2.0
SYSTEM CHARGER(MAX 8724)
PAGE 41
SYSTEM POWER ISL6236
PAGE 42
C C
DDR II SM DDR_ V T E R M
1.8V/1.8VSU S( MA X8632ET I +)
SATA - HDD
PAGE 29
PATA-
CD-ROM
PAGE 29
SATA
PATA
(66/100/133)
PAGE 46
+1.05V / + 1 . 5 V ( ISL 6269A )
PAGE 44, 45
S O U T H BRIDGE
ICH- 8 M
PAG 21,22,23,24
LPC
Two-element
microphone
PAGE 27
VGACORE(1.0V)MAX1993ETG
PAGE 45
CPU CORE MAX8770
PAGE 44
D D
Keyboard/ Touch Pad
PAGE 33
CIR
G-SENSOR
PAGE 36
PAGE 25
ITE KBC
ITE 8512
PAGE 35
Audio Jacks
(Phone/SPDIF/
MIC)
PAGE 27
Bluetooth X1 USB2.0 I/O P o r t s
PAGE 32
X3
PCI BU S / 3 3 M H z
PCI-E
Az a lia
Realtek
ALC 268
PAGE 26
AUDIO
Amplifier
MDC DAA
SI3080
PAGE 28 PAGE 27
PAGE 29
Mini P C I - E
Card
PCI-E Mi ni
Card
( W L A N/WAN)
Camera
PAG 32
X1
LA N
Broadcom
PCI E - L A N
BCM5787/5906
(10/100/GagaLAN)
WLAN Card x1
WWAN Card x1
Express Card x1
Express
Card
(NEW C A RD )
PAGE 34 PAGE 30,31 PAGE 32
RJ45
PAGE 31
PCI ROUTING
TABLE
IDSEL
AD25 RICOH832 REQ0# / GNT0#
INTERUPT
INTE#,INTF#
RICOH
RICOH 832
PAGE 24,25
IEEE1394
CONN
DEVICE
Memory
CardReader
PAGE 25 PAGE 24
X-Bus
FAN
Flash
PAGE 35 PAGE 33
1
2
3
4
Jack to
Speaker
5
MODEM RJ 11
PAGE 31 PAGE 27
6
PROJECT : CW4
Size Document Number Rev
Date: Sheet
Quanta Computer Inc.
BLOCK DIAGRAM
7
14 4 Friday, November 03, 2006
of
8
1A Custom
5
Board Stack up Description
PCB Layers
4
3
2
1
02
Voltage Rails
Layer 1
Layer 2
D D
Layer 3
Layer 4
Layer 5
Layer 6
Layer 7
Layer 8
TOP
GND
IN1
IN2
SVCC
IN3
GND
BOTTOM
Power On Sequencing Timing Diagram
VID
Tboot
Tsft_star_v c c
Vboot
Tboot-vid- t r
Tcpu_up
Vid
VRON
VCC_COR E
C C
CPU_UP
Voltage Rails
VCC_CORE
+1.5V
+1.05V
5V_S5/3V_S5/1.5V_S5
5VSUS/3VSUS/1.8VSUS X X SUSON
SMDDR_VTERM/+2.5V/+3V/+5V/+12V X MAINON
+VCC_GFX_CORE/+1.2V_GFX_PCIE X MAINON
LANVCC
3VP C U
5VP C U
ON S0~S2
ON S3
ON S4
ON S5
X
X
X
X
X
X
X
XX
XXX
X
X
X
X
X
X
Control signal
VRON
MAINON X
MAINON
S5_ON
LAN_ON
VL
VL
Vccp
Vccp_UP
Vccgmch
GMCHPWR G D
CLK_ENA BLE#
IMVP4_P WRGD
Tvccp_up
Tgmch_pwrg d
Tcpu_pwrg d
ACIN
5VPCU/3VP C U
NBSWON#
DNBSWON#
ACIN POWER ON TIMING
To ICH7
REQ# / GNT#
IDSEL# Interrupts PCI DEVICE
INT E#/F# REQ0# / GNT0# AD25 RICOH832
YONAH Power-up Timing Specifications
RESET#
Td
B B
BCLK
Tc
Te
PWRGOOD
Tf
Vcc,boot
VCC
Ta
Tb
VID[5:0]
S5_ON
RSMRST#
SUSB#,SUSC #
SUSON
MAINON
VSUS,VCC
VRON
+1.5V/+1.05V
VCC_CORE
CLK_EN#
PWROK
PLTRST#\PCIRST#
99ms < t 214
To ICH7
From ICH 7
From 9755 1
From 9755 1
From 9755 1
To clock generator
To GMCH/other PCI device
A A
VCCP
Ta=VCC and VCCP asseration to VID[5:0] vaild
Tb=VID[5:0] stable to VCC vaild
Tc=BCLK stable to PWRGOOD assertion
Td=PWRGOOD to RESET# de-assertion time
Te=Vcc,boot vaild to PWRGOOD assertion time
5
Size Document Number Rev
4
3
2
Date: Sheet
PROJECT : CW4
Quanta Computer Inc.
SYSTEM INFORMATION
24 4 Friday, November 03, 2006
1
of
1A Custom
1
+3V
L36
1 2
HI0805R800R-00
A A
L35
1 2
HI0805R800R-00
L34
1 2
HI0805R800R-00
+3V
B B
C C
D D
R215
10K/04
1 2
PCLK_MINI_LPC
R218
*4.7K/04
0=overclocki n g
of CPU a n d
SRC Al l o w e d
1 = over c l o c k i n g
of CPU and SRC
not Allowe d
+3V
R208
10K/04
1 2
FCTSEL1
R205
*10K/04
1 2
0=UMA
1 = External VGA
Disable ITP
10K/04
R216
1 2
ITP_EN
1 2
12
C396
22U/10V/12
1 2
C377
22U/10V/12
C350
22U/10V/12
PDAT_SMB 21,33
PCLK_ S M B 21,33
1 2
12
GCLK_SEL = FCTSEL1
FCTSEL1
( P IN 13)
0= U M A
1 = E xternal
VGA
CPU Clock select
+1.05V
+1.05V
+1.05V
1
2
C346
.1U/10V/04
1 2
C375
.1U/10V/04
C361
.1U/10V/04
1 2
C364
.1U/10V/04
VDDCPU
12
C338
.1U/10V/04
+3V
Q20
2
3
2N7002E/CH2507SPT
+3V
Q19
2
3
2N7002E/CH2507SPT
1 2
C378
.1U/10V/04
12
C368
.1U/10V/04
R241
1 2
C372
.1U/10V/04
12
C348
.1U/10V/04
R242
10K
10K
CGDAT_ S M B
1
CGCLK_SMB
1
PIN 1 4
DOT96C
DOT96T SRCT1/LCDT_100
SRCC0
SRCT0
CPU_BSEL0 4
CPU_BSEL1 4 MCH_BSEL1 7
CPU_BSEL2 4 MCH_BSEL2 7
2
SRCT1/LCDT_100
R194 0/04
R197 *56/04
R198 1K/04
R230 0/04
R231 *0/04
R226 1K/04
R240 0/04
R238 *0/04
R237 1K/04
+CK_VDD_MAIN
1 2
C389
.1U/10V/04
12
C359
.1U/10V/04
CK_PWG 21
PIN 1 7
27Mo u t - NSS
3
+CK_VDD_MAIN2
12
C363
.1U/10V/04
CGCLK_SMB 14,35
CGDAT _ S M B 14,35
CLK_BSEL0
CLK_BSEL1
CLK_BSEL2
3
CLK_BSEL1
PIN 1 8 PIN 1 3
27M out- S S
R196 0/04
R224 0/04
R234 0/04
+CK_VDD_MAIN
VDDCPU
+CK_VDD_MAIN2
R223
CGCLK_SMB
CGDAT_ S M B
4
CG_XIN
CG_XOUT
0
4
1 2
FSB
CG_XIN
C391
27P/50V/04
16
61
39
55
20
26
45
36
49
48
60
59
56
57
64
63
15
19
11
52
58
23
29
42
Y2
1 2
14.318MHZ
U7
VDDPLL3
9
VDD48
2
VDDPCI
VDDREF
VDDSRC
VDDCPU
VDDPLL3I/O
VDDSRCI/O
VDDSRCI/O
VDDSRCI/O
VDDCPU_IO
NC
X1
X2
CK_PWRGD/PD#
FSLB/TEST_MODE
SCLK
SDATA
GND
GND
GND48
GNDCPU
8
GNDPCI
GNDREF
GNDSRC
GNDSRC
GNDSRC
ICS9LPRS365BGLFT/SLG8SP512T
CK505
FSC FSB
MCH_BSEL0 7
13 3 0
0
0
0
00
1
1
1
5
CG_XOUT
1 2
C392
27P/50V/04
CPUT2_ITP/SRCT8
CPUT2_ITP/SRCC8 VDD96I/O
27MHz_Nonss/SRCCLK1/SE1
27Mhz_ss/SRCCLC1/SE2
SRCCLKT2/SATACL
SRCCLKC2/SATACL
SRCCLKT11/CR#_H
SRCCLKC11/CR#_G
PCICLK4/27_SELECT
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
DOTT_96/SRCT0
DOTC_96/SRCC0
SRCCLKT3/CR#_C
SRCCLKC3/CR#_D
SRCCLKT4
SRCCLKC4
PCI_STOP#
CPU_STOP#
SRCCLKT6
SRCCLKC6
SRCCLKT7/CR#_F
SRCCLKC7/CR#_E
SRCCLKT9
SRCCLKC9
SRCCLKT10
SRCCLKC10
PCICLK0/CR#_A
PCICLK1/CR#_B
PCICLK2/TME
PCICLK3
PCI_F5/ITP_EN
USB_48MHZ/FSLA
FSLC/TST_SL/REF
6
CLK_3GPLLREQ#
NEW-CARD_CLK_REQ#
PCIE_LANREQ#
RHCLK_CPU
54
RHCLK_CPU#
53
RHCLK_MCH
51
RHCLK_MCH#
50
CPU_ITP
47
CPU_ITP#
46 12
R_DOT96
13
R_DOT96#
14
R_DREFSSCLK
17
R_DREFSSCLK#
18
RSRC_SATA
21
RSRC_SATA#
22
R_CLK_PCIE_VGA
24
R_CLK_PCIE_VGA#
25
RSRC1_LAN
27
RSRC1_LAN#
28
PM_STPP C I #
38
PM_STP CPU#
37
RSRC_ICH
41
RSRC_ICH#
40
CLK_PCIE_MINI_
44
CLK_PCIE_MINI_#
43
RSRC_MCH
30
RSRC_MCH#
31
CLK_PCIE_NEW
34
CLK_PCIE_NEW#
35
NEW-CARD_CLK_REQ#_R
33
CLK_3GPLLREQ#_R
32
R_PCLK_8512
1
3
PCLK_MINI_LPC
4
PCI_ICH
5
FCTSEL1
6
ITP_EN
7
10
62
internal have
already build-in
33ohm damping
resistor
RP49 4P2R-S-0
RP47 4P2R-S-0
RP45 *4P2R-S-0
RP48 *4P2R-S-0
RP46 *4P2R-S-0
RP43 4P2R-S-0
RP41 *4P2R-S-0
RP39 4P2R-S-0
RP40 4P2R-S-0
RP42 4P2R-S-0
RP37 4P2R-S-0
RP38 4P2R-S-0
FSA
FSC
FSA CPU SRC PCI
11 0 0
1 0
1
1
1
0
0
03 3
0
1
0
1
1
5
133
166
200
266
333
400
RSVD
100
100
100
100
100
100
100
100
33
33
33
33
33
33
6
7
R171 10K/04
R167 10K/04
R232 10K/04
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
4
3
2
1
4
3
2
1
2
1
4
3
2
1
4
3
R168 475/F/03
R164 475/F/03
R239 33/04
R236 475/F/03
R219 33/04
T71
R233 33/04
R206 33/04
R204 33/04
R200 4.7K/04
R225 4.7K/04
R228 33/04
C395 *33P/50V/04
C394 *33P/50V/04
C369 *33P/50V/04
C384 *33P/50V/04
C367 *33P/50V/04
C390 *33P/50V/04
1 2
1 2
1 2
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
CLK_CPU_ITP
CLK_CPU_ITP#
DREFCLK 7
DREFCLK# 7
DREFSSCLK 7
DREFSSCLK# 7
CLK_PCIE_SATA 19
CLK_PCIE_SATA# 19
CLK_PCIE_VGA 15
CLK_PCIE_VGA# 15
CLK_PCIE_LAN 31
CLK_PCIE_LAN# 31
PM_STP P C I # 21
PM_STP CPU# 2 1
CLK_PCIE_ICH 20
CLK_PCIE_ICH# 20
CLK_PCIE_MINI 35
CLK_PCIE_MINI# 35
CLK_PCIE_3GPLL 7
CLK_PCIE_3GPLL# 7
CLK_PCIE_NEW_C 33
NEW-CARD_CLK_REQ#
CLK_3GPLLREQ#
CLK_PCIE_NEW_C# 33
PCLK_LPC_8512 36
PCLK_LPC_DEBUG 35
PCI_CLK_5C832 25
PCLK_ICH 20
CLK_BSEL0
CLK_BSEL2
+3V
T68
T69
CLKUSB_48 21
14M_ICH 21
PCLK_LPC_8512
PCI_CLK_5C832
PCLK_ICH
PCLK_LPC_DEBUG
CLKUSB_48
14M_ICH
8
NEW-CARD_CLK_REQ# 33
CLK_3GPLLREQ# 7
PCIE_LANREQ# 31
for EMI
PROJECT : CW4
Size Document Number Rev
Date: Sheet
Quanta Computer Inc.
CLOCK GENERATOR
7
34 4 Friday, November 03, 2006
8
03
1A Custom
of
1
2
3
4
5
6
7
8
H_THERMDA
H_THERMDC
44 4 Friday, November 03, 2006
04
10/20mils
of
8
1A Custom
H_D#[0..63]
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#[0..63]
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
COMP0
R465 27.4/F/04
COMP1
R461 54.9/F/04
COMP2
R469 27.4/F/04
COMP3
R471 54.9/F/04
1
VCC
2
DXP
3
DXN
5
GND
1 2
1 2
1 2
1 2
C513
.1U/10V/04
C512
2200P/50V/06
PROJECT : CW4
Quanta Computer Inc.
Merom (HOST BUS)
H_D#[0..63] 6
H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6
H_D#[0..63] 6
H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
H_DPRSTP# 7,19,40
H_DPSLP# 19
H_DPWR# 6
H_PWRGD 19
H_CPUSLP# 6
PM_PSI# 40
1 2
1 2
1 2
5
H_D#[0..63]
H_D#[0..63]
T2 2 *PAD
1 2
T1 *PAD
Q35
3
2N7002E/CH2507SPT
Q34
3
2N7002E/CH2507SPT
1 2
R452 *0/06
Q32
3
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
V_CPU_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6
+3 V
2
+3V
2
+3V
2
*2N7002E
1
1
1
AA4
AB2
AA3
D22
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
K3
H2
K2
J3
L1
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
V1
A6
A5
C4
D5
C6
B4
A3
M4
N5
T2
V3
B2
C3
D2
D3
F6
U22A
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RSVD[10]
Merom CPU
DEFER#
ADDR GROUP
0
CONTROLXD P/ I T P SI GN A L S
RESET#
BPM[0]#
ADDR GROUP
1
BPM[1]#
BPM[2]#
BPM[3]#
THERMAL
PROCHOT#
THERMDA
THERMDC
ICH
THERMTRIP#
H CLK
BCLK[0]
BCLK[1]
R ESER VED
ADS#
BNR#
BPRI#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
PRDY#
PREQ#
TCK
TDO
TMS
TRST#
DBR#
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
C1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
TDI
AB3
AB5
AB6
C20
D21
A24
B25
C7
A22
A21
T13 *PAD
R23 56/04
H_IERR#
1 2
H_RESET#
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM# 4
ITP_BPM# 5
ITP_TCK
ITP_TDI
ITP_TDO
IT P_T M S
ITP_T R S T #
ITP_DBRESET#
R26 75/04
CPU_PROCHOT# CPU_PROCHOT#
H_THERMDA
H_THERMDC
PM_THRMTRIP#
R488
1 2
1 2
56/04
H_ADS# 6
H_BNR# 6
H_BPRI# 6
H_DEFER# 6
H_DRDY# 6
H_DBSY# 6
H_BR0# 6
+1.05V
H_INIT# 19
H_LOCK# 6
H_RESET# 6
H_RS#0 6
H_RS#1 6
H_RS#2 6
H_TRDY# 6
H_HIT# 6
H_HITM# 6
T6 *PAD
T4 *PAD
T2 *PAD
T 7 *PAD
T 5 *PAD
T 3 *PAD
SYS_RST# 21
+1.05V
CPU_PROCHOT# 38
PM_THRMTRIP# 7,19
+1.05V
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
Layout Note:
Place voltage
divider within
0.5" of GTLREF
pin
+1.05V
R12
1K/F/04
1 2
R10
2K/F/04
1 2
H_D#[0..63] 6
H_DSTBN#0 6
H_DSTBP#0 6
H_DINV#0 6
H_D#[0..63] 6
H_DSTBN#1 6
H_DSTBP#1 6
H_DINV#1 6
R35 *1K/F/04
R28 *1K/F/04
C7 *0.1U/10V/04
R74 *0/04
CPU_BSEL0 3
CPU_BSEL1 3
CPU_BSEL2 3
H_A#[3..16] 6
A A
H_ADSTB#0 6
H_REQ#[0..4] 6
H_A#[17..35] 6
B B
H_ADSTB#1 6
H_A20M# 19
H_FERR# 19
H_IGNNE# 19
H_STPCLK# 19
H_INTR 19
H_NMI 19
H_SMI# 19
C C
H_A#[3..16]
H_REQ#[0..4]
H_A#[17..35]
T2 0 *PAD
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
Populat e ITP 700Flex for bringup
+1.05V
ITP_DBRESET#
1 2
R467
39/F/04
T23
1 2
*PAD
R472
150/04
R463 27/F/04
R466 649/F/04
ITP_TDI
IT
P_TMS
ITP_TDO
H_RESET#
1 2
R489
51/F/04
1 2
R470
51/04
ITP disable guidelines
Resistor Value
Signal Resistor Placement
D D
TDI
150 ohm +/- 5%
TMS
39 ohm +/- 1%
TRST#
500-680ohm +/- 5%
27 ohm +/- 1%
TCK
TDO
150 ohm +/- 5%
1
Connect To
Within 2.0" of the ITP VTT
Within 2.0" of the ITP
VTT
Within 2.0" of the ITP
GND
GND Within 2.0" of the ITP
Within 2.0" of the ITP
VTT
2
R80
1 2
1 2
+3V
1 2
*150/04
ITP_TCK
ITP_TRST#
CPU_PROCHOT#
PM_THRMTRIP#
3
Q1
5VSUS
*PDTC144EU
+1.05V
Q33
1 3
*MMBT3904
2
R451
*1K/F/04
1 2
2
R2
*330
1 3
SYS_SHDN#
4
VR_TT# 40
MBCLK 36
THRM_CLK 16
THRM_DATA 16
MBDATA 36
THERM_ALERT# 21,41
SYS_SHDN# 40,41
SYS_SHDN#
E22
E26
G22
G25
E25
E23
K24
G24
H22
K22
H23
H26
H25
N22
K25
P26
R23
M24
M23
P25
P23
P22
T24
R24
T25
N25
M26
N24
AD26
C23
D25
C24
AF26
AF1
A26
B22
B23
C21
6
F24
F23
J24
J23
F26
J26
L23
L22
L25
L26
R453
10K/04
U22B
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
BSEL[0]
BSEL[1]
BSEL[2]
Merom CPU
R456
10K/04
Y22
D[32]#
AB24
D[33]#
V24
D[34]#
V26
D[35]#
V23
D[36]#
T22
D[37]#
U25
D[38]#
U23
D[39]#
Y25
D[40]#
W22
D[41]#
Y23
D[42]#
W24
D[43]#
W25
D[44]#
AA23
D[45]#
AA24
D[46]#
AB25
D[47]#
Y26
DSTBN[2]#
AA26
DSTBP[2]#
U22
DINV[2]#
AE24
D[48]#
AD24
D[49]#
AA21
D[50]#
AB22
D[51]#
AB21
D[52]#
AC26
D[53]#
AD20
D[54]#
AE22
D[55]#
AF23
D[56]#
AC25
D[57]#
AE21
D[58]#
AD21
D[59]#
AC22
D[60]#
AD23
D[61]#
AF22
D[62]#
AC23
D[63]#
AE25
DSTBN[3]#
AF24
DSTBP[3]#
AC20
DINV[3]#
R26
COMP[0]
U26
COMP[1]
AA1
COMP[2]
Y1
COMP[3]
E5
DPRSTP#
B5
DPSLP#
D24
DPWR#
D6
PWRGOOD
D7
SLP#
AE6
PSI#
25mils
U19
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
MAX6657/GMT-781
ADDRESS: 98H
Size Document Number Rev
Date: Sheet
7
+3V
DATA GRP 0 DATA GRP 1
MISC
R454
200/F/06
LM86VCC
R455
*10K/04
DATA GRP 2DATA GRP 3
1
VCC_CORE
A A
VCC_CORE
C26
10U/4V/X6S_8
C18
10U/4V/X6S_8
C524
10U/4V/X6S_8
C17
10U/4V/X6S_8
8 inside cavity, north side, secondary layer.
VCC_CORE
C13
VCC_CORE
10U/4V/ X 6 S _ 8
C71
10U/4V/ X 6 S _ 8
B B
C12
10U/4V/ X 6 S _ 8
C70
10U/4V/ X 6 S _ 8
8 inside cavity, south side, secondary layer.
VCC_CORE
C25
C C
10U/4V/ X 6 S _ 8
C53
10U/4V/ X 6 S _ 8
6 inside cavity, north side, primary layer.
VCC_CORE
C536
10U/4V/ X 6 S _ 8
C537
10U/4V/ X 6 S _ 8
6 inside cavity, south side, primary layer.
+1.05V
D D
1 2
C29
.1U/10V/04
Layout out:
Place these inside socket cavity on North side secondary.
1
1 2
C52
.1U/10V/04
2
C525
10U/4V/X6S_8
C528
10U/4V/X6S_8
C16
10U/4V/ X 6 S _ 8
C11
10U/4V/ X 6 S _ 8
C66
10U/4V/ X 6 S _ 8
C538
10U/4V/ X 6 S _ 8
1 2
C28
.1U/10V/04
2
C526
10U/4V/X6S_8
C529
10U/4V/X6S_8
C15
10U/4V/X6 S _ 8
C73
10U/4V/X6 S _ 8
C67
10U/4V/X6 S _ 8
C539
10U/4V/X6 S _ 8
1 2
C51
.1U/10V/04
C68
10U/4V/X6 S _ 8
C540
10U/4V/X6 S _ 8
1 2
C27
.1U/10V/04
3
C527
10U/4V/X6S_8
C54
10U/4V/X6S_8
C14
10U/4V/ X 6 S _ 8
C72
10U/4V/ X 6 S _ 8
C69
10U/4V/ X 6 S _ 8
C541
10U/4V/ X 6 S _ 8
1 2
C50
.1U/10V/04
3
4
VCC_CORE VCC_CORE
C10
C12
C13
C15
C17
C18
D10
D12
D14
D15
D17
D18
E10
E12
E13
E15
E17
E18
E20
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
A10
A12
A13
A15
A17
A18
A20
B10
B12
B14
B15
B17
B18
B20
A7
A9
B7
B9
C9
D9
E7
E9
F7
F9
4
U22C
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
Merom CPU
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA[01]
VCCA[02]
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
.
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
C26
AD6
AF5
AE5
AF4
AE3
AF3
AE2
AF7
AE7
5
TP_VCCSENS E
T P _VSSSENSE
5
ICCODE:
for Merom processors
recommended design
target is 44A
ICCP:
1before vccore stable
peak current is 4.5A
2.after vccore stable
+1.05 V
continue current is
2.5A
1 2
+
C534
330U/2.5V
ICCA 130mA
CPU_VID0 4 0
CPU_VID1 4 0
CPU_VID2 4 0
CPU_VID3 4 0
CPU_VID4 4 0
CPU_VID5 4 0
CPU_VID6 4 0
VCC_CORE
R5
100/F
R6
100/F
6
1 2
C547
.01U/25V/04
TP_VCCSEN S E 40
T P _VSSSENSE 4 0
6
7
+1.5 V
1 2
C544
10U/4V/08
U22D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
P3 A25
VSS[081] VSS[162]
Merom CPU
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[163]
.
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF25
PROJECT : CW4
Quanta Computer Inc.
Size Document Number Rev
Date: Sheet
7
Merom (POWER/NC)
8
54 4 Friday, November 03, 2006
8
05
1A Custom
of
1
Digitally signed by fdsf
DN: cn=fdsf, o=fsdfsd,
ou=ffsdf,
email=fdfsd@fsdff,
c=US
Date: 2010.02.13
10:50:26 +07'00'
A A
+1.05V
1 2
R14
221/F/04
H_SWING
12
R15
100/F/04
B B
+1.05V
impedance 55 o h m
1 2
1 2
R13
24.9/F/04
1 2
Layout Not e :
R460
54.9/F/04
H_RCOMP
R459
54.9/F/04
H_SCOMP
H_SCOMP#
H_RCOMP trace sho uld be
C C
10-mil wide with 20-mil
spacing .
C22
.1U/10V/04
1 2
2
H_D#[0..63] 4
+1.05V
1 2
1 2
R19
1K/F/04
R22
2K/F/04
1 2
C44
.1U/10V/04
H_D#[0..63]
H_RESET# 4
H_CPUSLP# 4
3
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
T19 *PAD
H_REF
M10
N12
P13
W10
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
AC6
AE2
AC5
AG3
AJ9
AH8
AJ14
AE9
AE11
AH12
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
AH13
E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
N9
H5
K9
M2
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
Y3
B3
C2
W1
W2
B6
E5
B9
A9
4
U23A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF
CRESTLINE_1p0
5
H_ADSTB#_0
H_ADSTB#_1
HOST
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_ADS#
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
K5
L2
AD13
AE13
M7
K3
AD2
AH11
L7
K2
AC2
AJ10
M14
E13
A11
H13
B12
E12
D7
D8
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
6
H_A#[3..35]
7
H_A#[3..35] 4
8
06
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BR0# 4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3
H_DPWR# 4
H_DRDY# 4
H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4
H_DINV#0 4
H_DINV#1 4
H_DINV#2 4
H_DINV#3 4
H_DSTBN#0 4
H_DSTBN#1 4
H_DSTBN#2 4
H_DSTBN#3 4
H_DSTBP#0 4
H_DSTBP#1 4
H_DSTBP#2 4
H_DSTBP#3 4
H_REQ#0 4
H_REQ#1 4
H_REQ#2 4
H_REQ#3 4
H_REQ#4 4
H_RS#0 4
H_RS#1 4
H_RS#2 4
D D
1
2
Layout Note:
Place the 0.1 uF
decoupling capacitor
within 100 mils from
GMCH pins.
3
PROJECT : CW4
Quanta Computer Inc.
S ize Docume nt Nu mber Rev
4
5
Date: Sheet
6
Crestline_A (HOST)
7
64 4 Friday, November 03, 2006
of
1A Custom
8
1
A A
WW22 update
--- MA14 needs
to be routed if
customers are
planning on
using 2Gb
technology and
width=8 (by 8)
DIMMs
SA_MA14 13,14
SB_MA14 13,14
T177 *PAD
T 3 6 *PAD
Layout Note:
B B
DELAY_VR_PWRGOOD 21,40
C C
PM_THRMTRIP # 4,19
+3V
R98 10K/04
R96 10K/04
SM_RCOMP_VOH
1 2
D D
C106
.01U/25V/04
SM_RCOMP_VOL
1 2
C105
.01U/25V/04
Location of all MCH_CFG str a p
resistors needs to be close t o
minmize stub.
MCH_CFG_5 12
MCH_CFG_8 12
MCH_CFG_9 12
MCH_CFG_12 12
MCH_CFG_13 12
MCH_CFG_16 12
MCH_CFG_19 12
MCH_CFG_20 12
1 2
C116
2.2U/10V/08
1 2
C141
2.2U/10V/08
1
R95 0
R78 0/04
R36 100/04
R32 *0/04
R66 0/04
PM_EXTTS#0
PM_EXTTS#1
+1.8VSUS_GMCH
1 2
R61
1K/F/04
1 2
R55
3.01K/F/04
1 2
R73
1K/F/04
PM_BMBUSY# 21
H_DPRSTP# 4,19,40
PM_EX TTS # 0 14
PM_EX TTS # 1 21
PLT_RST-R# 20
DPRSLPVR 21,40
1 2
1 2
MCH_BSEL0 3
MCH_BSEL1 3
MCH_BSEL2 3
T1 8 *PAD
T1 6 3
*PAD
T1 7
*PAD
T9
*PAD
T2 1
*PAD
*PAD
T1 0
T1 2
*PAD
T1 1
*PAD
T1 6
*PAD
T2 4 *PAD
PM_THRMTRIP#_GMCH
PM_DPRSLPVR_GMCH
T1 7 5 *PAD
T1 7 3 *PAD
T1 7 6 *PAD
T1 7 1 *PAD
T1 6 8 *PAD
T1 6 1 *PAD
T1 6 0 *PAD
T1 5 7 *PAD R103 4.7K/04
T1 5 6 *PAD
T1 5 8 *PAD
T162 *PAD
T174 *PAD
T172 *PAD
T170 *PAD
T169 *PAD
T155 *PAD
MCH_CLVREF
C160
.1U/10V/04
1 2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
PM_BMBUSY#_R
ICH_DPRSTP#_R
PLTRST_MCH #
TP_NC1
TP_NC2
TP_NC3
TP_NC4
TP_NC5
TP_NC6
TP_NC7
TP_NC8
TP_NC9
TP_NC10
TP_NC11
TP_NC12
TP_NC13
TP_NC14
TP_NC15
TP_NC16
+1.25V
1 2
R500
1K/F/04
1 2
R498
392/F/04
2
U23B
P36
RSVD1
P37
RSVD2
R35
RSVD3
N35
RSVD4
AR12
RSVD5
AR13
RSVD6
AM12
RSVD7
AN13
RSVD8
J12
RSVD9
AR37
RSVD10
AM36
RSVD11
AL36
RSVD12
AM37
RSVD13
D20
RSVD14
H10
RSVD20
B51
RSVD21
BJ20
RSVD22
BK22
RSVD23
BF19
RSVD24
BH20
RSVD25
BK18
RSVD26
BJ18
RSVD27
BF23
RSVD28
BG23
RSVD29
BC23
RSVD30
BD24
RSVD31
BJ29
SA-MA14
BE24
SB_MA14
BH39
RSVD34
AW20
RSVD35
BK20
RSVD36
C48
LVDSA_DATA#_3
D47
LVDSA_DATA_3
B44
RSVD39
C44
RSVD40
A35
RSVD41
B37
RSVD42
B36
RSVD43
B34
RSVD44
C34
RSVD45
P27
CFG_0
N27
CFG_1
N24
CFG_2
C21
CFG_3
C23
CFG_4
F23
CFG_5
N23
CFG_6
G23
CFG_7
J20
CFG_8
C20
CFG_9
R24
CFG_10
L23
CFG_11
J23
CFG_12
E23
CFG_13
E20
CFG_14
K23
CFG_15
M20
CFG_16
M24
CFG_17
L32
CFG_18
N33
CFG_19
L35
CFG_20
G41
PM_BM_BUSY#
L39
PM_DPRSTP#
L36
PM_EXT_TS#_0
J36
PM_EXT_TS#_1
AW49
PWROK
AV20
RSTIN#
N20
THERMTRIP#
G36
DPRSLPVR
BJ51
NC_1
BK51
NC_2
BK50
NC_3
BL50
NC_4
BL49
NC_5
BL3
NC_6
BL2
NC_7
BK1
NC_8
BJ1
NC_9
E1
NC_10
A5
NC_11
C51
NC_12
B50
NC_13
A50
NC_14
A49
NC_15
BK2 R32
NC_16
CRESTLINE_1p0
R24
20/F/04
SMRCOMPP
SMRCOMPN
R21
20/F/04
2
CFG RSVD
PM
NC
+1.8VSUS_GMCH
1 2
1 2
SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4
SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP
DDR MUXINGCLK DMI
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF_0
SM_VREF_1
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VR_EN
GRAPHICS VID ME
CL_PWROK
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
MISC
3
SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4
PEG_CLK
CL_CLK
CL_DATA
CL_RST#
CL_VREF
TEST_1
TEST_2
3
AV29
BB23
BA25
AV23
AW30
BA23
AW25
AW23
BE29
AY32
BD39
BG37
BG20
BK16
BG16
BE13
BH18
BJ15
BJ14
BE16
SMRCOMPP
BL15
SMRCOMPN
BK14
SM_RCOMP_VOH
BK31
SM_RCOMP_VOL
BL31
SMDDR_VREF_MCH
AR49
AW4
B42
C42
H48
H47
K44
K45
DMI_T X N 0
AN47
DMI_T X N 1
AJ38
DMI_T X N 2
AN42
DMI_T X N 3
AN46
D M I_T XP0
AM47
D M I_T XP1
AJ39
D M I_T XP2
AN41
D M I_T XP3
AN45
DMI_RXN0
AJ46
DMI_RXN1
AJ41
DMI_RXN2
AM40
DMI_RXN3
AM44
DMI_RXP0
AJ47
DMI_RXP1
AJ42
DMI_RXP2
AM39
DMI_RXP3
AM43
DFGT_VID_0
E35
DFGT_VID_1
A39
DFGT_VID_2
C38
DFGT_VID_3
B39
DFGT_VR_EN
E36
AM49
AK50
AT43
AN49
AM50
MCH_CLVREF
H35
K36
G39
G40
A37
M_A_CLK0 14
M_A_CLK1 14
M_B_CLK0 14
M_B_CLK1 14
M_A_CLK0# 14
M_A_CLK1# 14
M_B_CLK0# 14
M_B_CLK1# 14
M_A_CKE0 13,14
M_A_CKE1 13,14
M_B_CKE0 13,14
M_B_CKE1 13,14
M_A_CS#0 13,14
M_A_CS#1 13,14
M_B_CS#0 13,14
M_B_CS#1 13,14
M_A_ODT0 13,14
M_A_ODT1 13,14
M_B_ODT0 13,14
M_B_ODT1 13,14
R101 *10K/F/06
R9 *10K/F/06
DREFCLK 3
DREFCLK# 3
DREFSSCLK 3
DREFSSCLK# 3
CLK_PCIE_3GPLL 3
CLK_PCIE_3GPLL# 3
CL_CLK0 21
CL_DATA0 21
ECPWROK 16,21,36
CL_RST#0 21
T2 5
SDVO_CTRL_DATA 12
CLK_3GPLLREQ# 3
MCH_ICH_SYNC# 21
R493
R50
0/04
20K/04
1 2
1 2
1 2
C150 470P/50V/X7R/04
C19 .1U/10V/04
C10 .1U/10V/04
R8 0/04
+1.8VSUS_GMCH
DMI_TXN[3:0] 20
DMI_TXP[3:0] 20
DMI_RXN[3:0] 20
DMI_RXP[3:0] 20
T2 6
T1 6 6
T1 6 5
T1 6 7
T1 6 4
4
4
LCD_CTL 16,24
LCD_BLON 16,24
EDIDCLK 16,24
EDIDDATA 16,24
DISP_ON 16,24
SMDDR_VREF
DDCCLK 23
DDCDATA 23
HSYNC_COM 16,23
VSYNC_COM 16,23
5
LVDS_IBG
U23C
J40
L_BKLT_CTRL
H39
L_BKLT_EN
E39
L_CTRL_CLK
E40
L_CTRL_DATA
C37
L_DDC_CLK
D35
L_DDC_DATA
K40
L_VDD_EN
L41
LVDS_IBG
L43
LVDS_VBG
N41
LVDS_VREFH
N40
LVDS_VREFL
D46
LVDSA_CLK#
C45
LVDSA_CLK
D44
LVDSB_CLK#
E42
LVDSB_CLK
G51
LVDSA_DATA#_0
E51
LVDSA_DATA#_1
F49
LVDSA_DATA#_2
G50
LVDSA_DATA_0
E50
LVDSA_DATA_1
F48
LVDSA_DATA_2
G44
LVDSB_DATA#_0
B47
LVDSB_DATA#_1
B45
LVDSB_DATA#_2
E44
LVDSB_DATA_0
A47
LVDSB_DATA_1
A45
LVDSB_DATA_2
E27
TVA_DAC
G27
TVB_DAC
K27
TVC_DAC
F27
TVA_RTN
J27
TVB_RTN
L27
TVC_RTN
M35
TV_DCONSEL_0
P33
TV_DCONSEL_1
H32
CRT_BLUE
G32
CRT_BLUE#
K29
CRT_GREEN
J29
CRT_GREEN#
F29
CRT_RED
E29
CRT_RED#
K33
CRT_DDC_CLK
G35
CRT_DDC_DATA
F33
CRT_HSYNC
C32
CRT_TVO_IREF
E33
CRT_VSYNC
CRESTLINE_1p0
R104 4.7K/04
R87 4.7K/04
R94 4.7K/04
R92 0/04
R84 0/04
R53 0/04
R54 0/04
R56 0/04
R46 0/04
R47 0/04
R82 *0/04
R166 *0/04
+3V
CRT_B 16,23
CRT_G 16,23
CRT_R 16,23
R102 *10K/04
R105 *10K/04
R81 *0/04
R64 *0/04
R83 *0/04
R79 *2.4K/04
LA_CLK#
LA_CLK
T27 *PAD
LB_CLK#
T29 *PAD
LB_CLK
LA_DATAN0
LA_DATAN1
LA_DATAN2
LA_DATAP0
LA_DATAP1
LA_DATAP2
LB_DATAN0
T30 *PAD
LB_DATAN1
T34 *PAD
LB_DATAN2
T33 *PAD
LB_DATAP0
T32 *PAD
LB_DATAP1
T35 *PAD
LB_DATAP2
T31 *PAD
R44 0/04
R42 0/04
R43 0/04
R70 0/04
R57 0/04
R482 *0/04
R478 *0/04
R477 *0/04
R97 *0/04
R77 *0/04
R72 *39/04
R48 0/04
R60 *39/04
CRT Discrete / UMA
---------------------------
R48 NC 0
R49 NC 0
R2618 NC 39
R2627 0 1.3K/F
R2623 NC 39
CRT_BLUE1
CRT_GREEN1
CRT_RED1
Resistor Discret UMA
====================
R64 0 NC
R60 0 NC
R64 0 NC
R60 0 NC
R74 0 150
R77 0 150
R65 0 150
EDIDCLK_L
EDIDDATA_L
T28
*PAD
TV_CO M P 1
TV_Y/G1
TV_C/R1
TV_DCONSEL_0
TV_DCONSEL_1
DDCCLK_R
DDCDATA_R
HSYNC11
CRTIREF
VSYNC11
DREFSSCLK
DREFSSCLK#
<FAE>
If no use DREFCLK PD and
DREFCLK# PU
IV&EV Dis/Enable setting
DREFCLK
DREFCLK#
<design guide>
If no use
DREFCLK PD and
DREFCLK# PU
6
LVDS
TV VGA
+1.25V
+1.25V
DDCCLK_R
DDCDATA_R
HSYNC11
VSYNC11
CRT_BLUE1
CRT_GREEN1
CRT_RED1
PEG_COMPI
PEG_COMPO
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PCI-EXPRESS GRAPHICS
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
VCC3G_PCIE_R
N43
M43
J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41
J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42
C_PEG_T X N 0
N45
C_PEG_T X N 1
U39
C_PEG_T X N 2
U47
C_PEG_T X N 3
N51
C_PEG_T X N 4
R50
C_PEG_T X N 5
T42
C_PEG_T X N 6
Y43
C_PEG_T X N 7
W46
C_PEG_T X N 8
W38
C_PEG_T X N 9
AD39
C_PEG_TX N1 0
AC46
C_PEG_TX N1 1
AC49
C_PEG_TX N1 2
AC42
C_PEG_TX N1 3
AH39
C_PEG_TX N1 4
AE49
C_PEG_TX N1 5
AH44
C_PE G _ T X P 0
M45
C_PE G _ T X P 1
T38
C_PE G _ T X P 2
T46
C_PE G _ T X P 3
N50
C_PE G _ T X P 4
R51
C_PE G _ T X P 5
U43
C_PE G _ T X P 6
W42
C_PE G _ T X P 7
Y47
C_PE G _ T X P 8
Y39
C_PE G _ T X P 9
AC38
C_PEG
AD47
C_PEG _ T X P 1 1
AC50
C_PEG _ T X P 1 2
AD43
C_PEG _ T X P 1 3
AG39
C_PEG _ T X P 1 4
AE50
C_PEG _ T X P 1 5
AH43
TX L C L K OUT+ 16,24
T X LC LKO U T - 16,24
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP 1 5
_ T X P 1 0
TXLOUT0- 16,24
TXLOUT0+ 16,24
TXLOUT1- 16,24
TXLOUT1+ 16,24
TXLOUT2- 16,24
TXLOUT2+ 16,24
EDIDCLK_L
EDIDDATA_L
7
+VCC_PEG
R93 24.9/F/04
1 2
C162 .1U/10V
C576 .1U/10V
C163 .1U/10V
C567 .1U/10V
C165 .1U/10V
C569 .1U/10V
C167 .1U/10V
C571 .1U/10V
C168 .1U/10V
C573 .1U/10V
C171 .1U/10V
C574 .1U/10V
C173 .1U/10V
C578 .1U/10V
C174 .1U/10V
C580 .1U/10V
C161 .1U/10V
C575 .1U/10V
C159 .1U/10V
C566 .1U/10V
C164 .1U/10V
C568 .1U/10V
C166 .1U/10V
C570 .1U/10V
C169 .1U/10V
C572 .1U/10V
C170 .1U/10V
C565 .1U/10V
C172 .1U/10V
C577 .1U/10V
C175 .1U/10V
C579 .1U/10V
RP28 * 0 X 2
3
1
RP31 * 0 X 2
1
3
RP30 *0X2
1
3
RP29 *0X2
1
3
R75 0/04
R65 0/04
PEG_RXN0 15
PEG_RXN1 15
PEG_RXN2 15
PEG_RXN3 15
PEG_RXN4 15
PEG_RXN5 15
PEG_RXN6 15
PEG_RXN7 15
PEG_RXN8 15
PEG_RXN9 15
PEG_RXN10 15
PEG_RXN11 15
PEG_RXN12 15
PEG_RXN13 15
PEG_RXN14 15
PEG_RXN15 15
PEG_RXP0 15
PEG_RXP1 15
PEG_RXP2 15
PEG_RXP3 15
PEG_RXP4 15
PEG_RXP5 15
PEG_RXP6 15
PEG_RXP7 15
PEG_RXP8 15
PEG_RXP9 15
PEG_RXP10 15
PEG_RXP11 15
PEG_RXP12 15
PEG_RXP13 15
PEG_RXP 1 4 15
PEG_RXP 1 5 15
4
2
LA_DATAN0
2
LA_DATAP0
4
LA_DATAN1
2
LA_DATAP1
4
LA_DATAN2
2
LA_DATAP2
4
PEG_TXN _ C 0 15
PEG_TXN _ C 1 15
PEG_TXN _ C 2 15
PEG_TXN _ C 3 15
PEG_TXN _ C 4 15
PEG_TXN _ C 5 15
PEG_TXN _ C 6 15
PEG_TXN _ C 7 15
PEG_TXN _ C 8 15
PEG_TXN _ C 9 15
PEG_TXN_ C1 0 1 5
PEG_TXN_ C1 1 1 5
PEG_TXN_ C1 2 1 5
PEG_TXN_ C1 3 1 5
PEG_TXN_ C1 4 1 5
PEG_TXN_ C1 5 1 5
PEG_ T X P _ C0 15
PEG_ T X P _ C1 15
PEG_ T X P _ C2 15
PEG_ T X P _ C3 15
PEG_ T X P _ C4 15
PEG_ T X P _ C5 15
PEG_ T X P _ C6 15
PEG_ T X P _ C7 15
PEG_ T X P _ C8 15
PEG_ T X P _ C9 15
PEG_T X P _ C1 0 1 5
PEG_T X P _ C1 1 1 5
PEG_T X P _ C1 2 1 5
PEG_T X P _ C1 3 1 5
PEG_T X P _ C1 4 1 5
PEG_T X P _ C1 5 1 5
LA_CLK
LA_CLK#
8
07
PROJECT : CW4
Size Document Number Rev
5
6
Date: Sheet
7
Quanta Computer Inc.
Crestline_B (VGA,DMI)
of
74 4 Friday, November 03, 2006
8
1A Custom
1
2
3
4
5
6
7
8
M_A_DQ[63:0] 14 M_B_DQ[63:0] 14
A A
B B
C C
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BD8
AY9
BG10
AW9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AN10
AT9
AN9
AM9
AN11
U23D
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
CRESTLINE_1p0
BB19
SA_BS_0
BK19
SA_BS_1
BF29
SA_BS_2
BL17
SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RAS#
SA_RCVEN#
DDR SYSTEM MEM ORY A
SA_WE#
AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6
AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2
BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
BE18
AY20
BA19
M_A_DQM0
M_A_DQM1
M_A_DQM2
M_A_DQM3
M_A_DQM4
M_A_DQM5
M_A_DQM6
M_A_DQM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M _ A_A0
M _ A_A1
M _ A_A2
M _ A_A3
M _ A_A4
M _ A_A5
M _ A_A6
M _ A_A7
M _ A_A8
M _ A_A9
M_A_ A 1 0
M_A_ A 1 1
M_A_ A 1 2
M_A_ A 1 3
TP_SA_RCVE N #
M_A_BS#0 13,14
M_A_BS#1 13,14
M_A_BS#2 13,14
M_A_CAS# 13,14
M_A_DQM[0..7] 14
M_A_DQS[7:0] 14
M_A_DQS#[7:0] 14
M_A_A[13:0] 13,14
M _ A _ R A S # 13,14
T14
M _ A _ W E # 13,14
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BK10
BH5
BG1
BC2
BK3
BE4
BD3
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2
BL9
BK5
BL5
BK9
BJ8
BJ6
BF4
BJ2
U23E
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
CRESTLINE_1p0
08
AY17
SB_BS_0
BG18
SB_BS_1
BG36
SB_BS_2
BE17
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS#
SB_RCVEN#
SB_WE#
DDR SYSTEM MEMOR Y B
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
AV16
AY18
BC17
M_B_DQM0
M_B_DQM1
M_B_DQM2
M_B_DQM3
M_B_DQM4
M_B_DQM5
M_B_DQM6
M_B_DQM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
_ B_A10
M
M _ B_A11
M _ B_A12
M _ B_A13
TP_SB_RCVE N #
M_B_BS#0 13,14
M_B_BS#1 13,14
M_B_BS#2 13,14
M_B_CAS# 13,14
M_B_DQM[0..7] 14
M_B_DQS[7:0] 14
M_B_DQS#[7:0] 14
M_B_A[13:0] 13 ,14
M _ B _ R A S # 13,1 4
T 1 5 *PAD
M _ B _ W E # 13,1 4
D D
PROJECT : CW4
Quanta Computer Inc.
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
7
Crestline_C (DDR2)
84 4 Friday, November 03, 2006
of
8
1A Custom
AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32
AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30
W13
W14
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14
5
R30
R20
T14
Y12
U23G
VCC_1
VCC_2
VCC_3
VCC_5
VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC CORE
POWER
VCC SM VCC GFX
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC GFX NCTF
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
VCC SM LF
+1.05V
D D
IVCCSM supply
current 1
channel
1.615A 2
channel
3.318A
C C
B B
A A
+1.8VSUS_GMCH
+1.05V
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
AW45
BC39
BE39
BD17
BD4
AW8
AT6
4
Ivcc_AXG Graphics core supply
current 7.7A
12
+
C185
330U/6.3V
Layout Note:
Inside GMCH cavity for VCC_AXG.
1 2
C76
.1U/10V/04
GMCH 1.05V
VCC Core
VCC_AXG
VCC_AXD
VTT
VCC_PEG
VCC_AXM
VCCR_RX_DMI
12
+
1 2
C95
.1U/10V/04
current(A)
1.573
7.7
0.2
0.85
1.2
0.54
0.25
12.313 SUM
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
1 2
C33
.1U/10V/04
1 2
3
Ivcc (External GFX 1.310 A,
integrate 1.572 A)
+1.05V
1 2
+
C518
Layout Note:
370 mils from edge.
12
+
C178
330U/6.3V
1 2
C83
0.47U/10V/06
C585
*330U/6.3V
220U/2.5V
12
+
C186
*330U/6.3V
Layout Note:
370 mils from edge.
1 2
1 2
C99
C6
1U/10V/06
10U/6.3V/08
Remark
( 1.3A for
external
GFX )
for integrated
Gfx
Ivcc_AXM
Controller
supply
current
540mA
FSB VCCP
for PCIEG
for IAMT
function
DMI
1 2
C36
.1U/10V/04
1 2
C9
0.22U/10V/06
C63
0.22U/10V/06
1 2
C139
0.47U/10V/06
+3V
R475 10/04
1 2
1 2
Layout Note:
Inside GMCH cavity.
1 2
+1.05V
1 2
C533
10U
12
C5
10U
C120
0.22U/10V/06
C176
.1U/10V/04
1 2
1 2
Layout Note:
Place close to GMCH edge.
1 2
1 2
C136
1U/10V/06
+VCC_GMCH_L
+1.05V
Layout Note:
Inside GMCH
cavity.
C124
.1U/10V/04
C118
10U
C144
1U/10V/06
1 2
C129
0.22U/10V/06
1 2
C125
.1U/10V/04
1 2
C92
0.22U/10V/06
2
D16
2 1
CH751H-40HPT
1 2
C110
.1U/10V/04
1 2
C107
.1U/10V/04
1 2
C117
0.22U/10V/06
1.8VSUS
1 2
C86
.1U/10V/04
Layout Note:
Place C901 where LVDS
and DDR2 taps.
1
U23F
AB33
VCC_NCTF_1
AB36
VCC_NCTF_2
AB37
VCC_NCTF_3
AC33
VCC_NCTF_4
AC35
VCC_NCTF_5
AC36
VCC_NCTF_6
AD35
VCC_NCTF_7
AD36
VCC_NCTF_8
AF33
VCC_NCTF_9
AF36
VCC_NCTF_10
AH33
VCC_NCTF_11
AH35
VCC_NCTF_12
AH36
VCC_NCTF_13
AH37
VCC_NCTF_14
AJ33
VCC_NCTF_15
AJ35
VCC_NCTF_16
AK33
VCC_NCTF_17
AK35
VCC_NCTF_18
AK36
VCC_NCTF_19
AK37
VCC_NCTF_20
AD33
VCC_NCTF_21
AJ36
VCC_NCTF_22
AM35
VCC_NCTF_23
AL33
VCC_NCTF_24
AL35
VCC_NCTF_25
AA33
VCC_NCTF_26
AA35
VCC_NCTF_27
AA36
VCC_NCTF_28
AP35
VCC_NCTF_29
AP36
VCC_NCTF_30
AR35
VCC_NCTF_31
AR36
VCC_NCTF_32
Y32
VCC_NCTF_33
Y33
VCC_NCTF_34
Y35
VCC_NCTF_35
Y36
VCC_NCTF_36
Y37 A3
VCC_NCTF_37 VSS_SCB1
T30
VCC_NCTF_38
T34
VCC_NCTF_39
T35
VCC_NCTF_40
U29
VCC_NCTF_41
U31
VCC_NCTF_42
U32
VCC_NCTF_43
U33
VCC_NCTF_44
U35
VCC_NCTF_45
U36
VCC_NCTF_46
V32
VCC_NCTF_47
V33
VCC_NCTF_48
V36
VCC_NCTF_49
V37
VCC_NCTF_50
AL24
VCC_AXM_NCTF_1
AL26
VCC_AXM_NCTF_2
AL28
VCC_AXM_NCTF_3
AM26
VCC_AXM_NCTF_4
AM28
VCC_AXM_NCTF_5
AM29
VCC_AXM_NCTF_6
AM31
VCC_AXM_NCTF_7
AM32
VCC_AXM_NCTF_8
AM33
VCC_AXM_NCTF_9
AP29
VCC_AXM_NCTF_10
AP31
VCC_AXM_NCTF_11
AP32
VCC_AXM_NCTF_12
AP33
VCC_AXM_NCTF_13
AL29
VCC_AXM_NCTF_14
AL31
VCC_AXM_NCTF_15
AL32
VCC_AXM_NCTF_16
AR31
VCC_AXM_NCTF_17
AR32
VCC_AXM_NCTF_18
AR33
VCC_AXM_NCTF_19
CRESTLINE_1p0
1 2
+
C103
330U/6.3V
V CC NCTF
POWER
1 2
Layout Note:
Place on the edge.
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS NCTF
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6
VSS SCB VCC AXM
VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7
VCC AXM NCTF
+1.8VSUS_GMCH
1 2
C121
C133
10U
10U
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
B2
C1
BL1
BL51
A51
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
09
+1.05V
CRESTLINE_1p0
5
PROJECT : CW4
Size Document Number Rev
4
3
2
Date: Sheet
Quanta Computer Inc.
Crestline_D (VCC,NCTF)
94 4 Friday, November 03, 2006
1
of
1A Custom
5
IV&EV Dis/Enable setting
L55
1 2
*IV@BLM18PG181SN1/06
+VCC_TVBG
1 2
50mA
1 2
C521
.1U/10V/04
C514
22U/10V/12
150mA
+1.25V_VCCA_MPLL
+VCCA_MPLL_L
1 2
C128
0.1U/10V/04
1 2
C94
*IV@.1U/04
1 2
C542
*IV@10U/4V/08
+3V_VCCSYNC
C113
*IV@.1U/04
1 2
C558
*IV@.1U/04
1 2
C522
.1U/10V/04
+1.5V_VCCD_TVDAC
R71 0/04
1 2
1 2 3
C119
*22nF/3P
R41 0/04
1 2
1 2 3
C88
*IV@22N
+3V_TV_DAC
R59
EV@0/04
+VCCA_CRTDAC
1 2
C559
*IV@.1U/04
R492 0/04
1 2
123
C557
*IV@22N
+1.25V
L9
10uH/100MA/08
10uH +-20%_10 0 m A
L13
10uH/100MA/08
0.1Caps should be
placed 200 mils
with in its pins.
+1.25V
R45 0/06
+1.5V_VCCD_TVDAC
EV@0/04
R481 0/04
1 2
123
1 2
C548
*IV@.1U/04
R485 0/04
1 2
123
1 2
C546
*IV@.1U/04
R486 0/04
1 2
123
1 2
C551
*IV@.1U/04
R494 0/04
1 2
R490
EV@0/04
1 2
1 2
+1.25V
R30
+1.8VSUS_GMCH
C549
*IV@22N
C552
*IV@22N
C555
*IV@22N
1 2
+
1 2
+VCC_TVDACA_R
+VCC_TVDACB_R
+VCC_TVDACC_R
R88 *IV@0/06
+3V
D D
+3V
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC
+3V_TV_DAC
R27 *IV@0.03/F
FB _120ohm+-25 % _100mH z
_200mA _0.2ohm D C
+1.25V
L48
+1.25V_VCCA_HPLL
1 2
BLM11A121S/06
C C
1 2
+1.5V
B B
FB_180ohm+-25%_
100mHz _1500mA _
0.09ohm DC
1 2
L49
BLM11A121S/06
1 2
R462
0.5/F/06
1 2
+VCCA_MPLL_L
C515
22U/10V/12
L7
+VCCQ_TVDAC
1 2
*IV@BLM18PG181SN1/06
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC
L54
+3V
1 2
*IV@BLM18PG181SN1/06
22nF & 0.1uF for
VCC_TVDACA:C_R should
A A
be placed with in 250
mils from Crestline.
5
123
C560
*IV@22N
80mA
+1.25V_VCCA_DPLLA
1 2
C148
+
470U/4V
.1U/10V/04
80mA
+1.25V_VCCA_DPLLB
1 2
C156
+
470U/4V
.1U/10V/04
R11 0/08
C21
100U/6.3V
C115
22U/4V/08
+VCCA_MPLL_L
250mA
R106 *IV@0/06
R480
EV@0/04
R484
EV@0/04
R487
EV@0/04
4
+3V_VCCA_CRT_DAC
R491
EV@0/04
1 2
C154
1 2
C158
C78
4.7U/6.3V/06
1 2
1 2
C111
1U/10V/06
4
+1.25V
R49 EV@0/04
R51 *IV@0/06
C147
*IV@1U/06
+1.8VSUS_VCC_TX_LVDS
+1.8VSUS_VCC_TX_LVDS
10mA
R496
C153
.1U/10V/04
Ivcca_PEG_BG
supply current
100mA
1 2
C8
22U/4V/08
1 2
C102
.1U/10V/04
1 2
C152
.1U/10V/04
C146
*IV@10U/08
L14
1 2
BLM21PG221SN1D/08
EV@0/04
+1.25V_VCCD_PEG_PLL
+1.25V_VCCA_SM_CK
+3V
1 2
1 2
C56
22U/4V/08
1 2
C101
1U/10V/06
1 2
C520
.1U/10V/04
FB_220ohm+-25%_100MHz
_2A_0.1ohm DC
+1.25V_VCCA_DPLLA
+1.25V_VCCA_DPLLB
+1.25V_VCCA_HPLL
+1.25V_VCCA_MPLL
C563
*IV@1000P/04
100mA
+1.25V_VCCA_SM
1 2
C61
1U/10V/06
+VCC_TVDACA_R
+VCC_TVDACB_R
+VCC_TVDACC_R
+1.5V_VCCD_CRT
+1.5V_VCCD_TVDAC
+1.5V_VCCD_QDAC
+VCCA_MPLL_L
+1.25V_VCCD_PEG_PLL
+1.8V_VCCD_LVDS
150mA
R91
EV@0/04
100mA
1 2
R115
1/F/06
1 2
C182
10U/6.3V/06
3
CRT/TV Disable/Enable guideline
External VGA with EV@part,Internal VGA with IV@ part
VCCA_CRT_DAC
VCCD_CRT
Ball
U23H
J32
VCCSYNC
A33
VCCA_CRT_DAC_1
B33
VCCA_CRT_DAC_2
A30
VCCA_DAC_BG
B32
VSSA_DAC_BG
B49
VCCA_DPLLA
H49
VCCA_DPLLB
AL2
VCCA_HPLL
AM2
VCCA_MPLL
A41
VCCA_LVDS
B41
VSSA_LVDS
K50
VCCA_PEG_BG
K49
VSSA_PEG_BG
U51
VCCA_PEG_PLL
AW18
VCCA_SM_1
AV19
VCCA_SM_2
AU19
VCCA_SM_3
AU18
VCCA_SM_4
AU17
VCCA_SM_5
AT22
VCCA_SM_7
AT21
VCCA_SM_8
AT19
VCCA_SM_9
AT18
VCCA_SM_10
AT17
VCCA_SM_11
AR17
VCCA_SM_NCTF_1
AR16
VCCA_SM_NCTF_2
BC29
VCCA_SM_CK_1
BB29
VCCA_SM_CK_2
C25
VCCA_TVA_DAC_1
B25
VCCA_TVA_DAC_2
C27
VCCA_TVB_DAC_1
B27
VCCA_TVB_DAC_2
B28
VCCA_TVC_DAC_1
A28
VCCA_TVC_DAC_2
M32
VCCD_CRT
L29
VCCD_TVDAC
N28
VCCD_QDAC
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
J41
VCCD_LVDS_1
H42
VCCD_LVDS_2
+1.25V_VCCD_PEG_PLL
1 2
C155
.1U/10V/04
Enable
3.3V
1.5V
1.5V
3.3V
3.3V
+ V T TLF1
+ V T TLF2
+ V T TLF3
3
Ball
Disable
GND VCCA_TVC_DAC
GND
VCCD_TVDAC
GND VCCA_DAC_BG
VSS_DAC_BG
GND
GND
VCCSYNC
CRTPLL A PEG A SM TV
VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6
AXD
VCC_AXD_NCTF
VCC_AXF_1
POWER
A CK A LVDS
D TV/CRT LVDS
1 2
C519
0.47U/10V/06
VCC_AXF_2
VCC_AXF_3
AXF
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
SM CK
VCC_TX_LVDS
HV
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
PEG
VCC_RXR_DMI_1
VCC_RXR_DMI_2
DMI
CRESTLINE_1p0
1 2
C20
0.47U/10V/06
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VCC_DMI
VCC_HV_1
VCC_HV_2
VTTLF1
VTTLF2
VTTLF3
VTTLF
Enable
3.3V
1.5V
3.3V VCCD_QDAC
GND VCCA_TVA_DAC
3.3V VCCA_TVB_DAC
1 2
U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
AT23
AU28
AU24
AT29
AT25
AT30
AR29
B23
B21
A21
AJ50
BK24
BK23
BJ24
BJ23
A43
C40
B40
AD51
W50
W51
V49
V50
AH50
AH51
A7
F2
AH1
C532
0.47U/10V/06
Disable
+3V_VCC_HV
+VCC_RXR_DMI
+ V T TLF1
+ V T TLF2
+ V T TLF3
GND
1.5V
GND
GND
GND
1 2
C55
2.2U/6.3V/06
Place on the edge.
1 2
C41
0.47U/6.3V/04
Place on the edge.
+1.25V_AXD
1 2
C89
1U/10V/06
+1.25V_VCC_AXF
+1.25V_VCC_DMI
+1.25V_VCC_DMI
+1.8VSUS_VCC_SM_CK
200mA
+1.8VSUS_VCC_TX_LVDS
1 2
C561
.1U/10V/04
1 2
1 2
2
LVDS Disable/Enable guideline
External VGA with EV@part,Internal VGA with IV@ part
VCCD_LVDS
VCCA_LVDS
VCC_TX_LVDS
Signal
If SDVO Disable
LVDS Disable
GND
GND
GND
If LVDS
enable
1.8V
1.8V
1.8V
+3V_VCC_HV
D4
CH751H-40HPT
Ivcc_VTT FSB
1 2
supply
C516
4.7U/10V/08
1 2
1 2
+
C177
220U/4V
+
C586
220U/4V
2
C517
4.7U/10V/08
1 2
C60
22U/10V/12
R497
EV@0/04
+VCC_PEG
1 2
current
0.85A
+1.05V
1 2
+
C32
220U/4V
+VCC_AXD_R
L5
0/04
Reserved L81 pad for
induc t o r .
Place caps close
to VCC_AXD.
Ivcc_DMI supply
current 100mA
R499 0/08
1 2
C564
.1U/10V/04
+1.8VSUS_VCC_TX_LVDS
100mA
1 2
C562
*IV@1000P/04
L10
BLM21PG220SN1D/08
1 2
C145
10U/6.3V
L8
BLM21PG220SN1D/08
1 2
C134
10U/6.3V/06
+1.8VSUS_VCC_SM_CK
1 2
C82
C79
.1U/10V/04
22U/10V/12
R20 0/08
L56 *IV@1UH/08
1 2
1 u H + - 2 0 % _300mA
+
C142
*IV@220U
+1.05V
+1.05V
L6
1uH/300mA/08
1 2
1uH+-20%_300mA
R34
1/F/06
+VCC_SM_CK_L
1 2
C85
10U/6.3V/06
+3V_VCC_HV
R495 0/04
+1.25V
+1.25V_VCC_AXF
1 2
C48
1U/10V/06
+1.25V
1 2
Ivcc_PEG
supply current
1.2A
Ivcc_RX_DMI
supply current
250mA
Size Document Number Rev
Date: Sheet
1 2
Place caps close
to VCC_AXF
+1.8VSUS_GMCH
Quanta Computer Inc.
1
+1.05V
2 1
40 mil
wide
+3V_VCC_HV_L
12
R108
10/04
+3V
+1.25V
R25
0/08
1 2
C49
10U/6.3V/06
+1.8VSUS_GMCH
PROJECT : CW4
Crestline_E (POWER)
10 44 Friday, November 03, 2006
1
10
of
1A Custom
5
4
3
2
1
U23I
A13
VSS_1
A15
VSS_2
A17
VSS_3
A24
VSS_4
AA21
VSS_5
AA24
VSS_6
AA29
VSS_7
D D
C C
B B
A A
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC39
AC43
AC47
AD21
AD26
AD29
AD41
AD45
AD49
AD50
AE10
AE14
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16
AC3
AD1
AD3
AD5
AD8
AE6
AL1
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
CRESTLINE_1p0
VSS
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
U23J
C46
VSS_199
C50
VSS_200
C7
VSS_201
D13
VSS_202
D24
VSS_203
D3
VSS_204
D32
VSS_205
D39
VSS_206
D45
VSS_207
D49
VSS_208
E10
VSS_209
E16
VSS_210
E24
VSS_211
E28
VSS_212
E32
VSS_213
E47
VSS_214
F19
VSS_215
F36
VSS_216
F4
VSS_217
F40
VSS_218
F50
VSS_219
G1
VSS_220
G13
VSS_221
G16
VSS_222
G19
VSS_223
G24
VSS_224
G28
VSS_225
G29
VSS_226
G33
VSS_227
G42
VSS_228
G45
VSS_229
G48
VSS_230
G8
VSS_231
H24
VSS_232
H28
VSS_233
H4
VSS_234
H45
VSS_235
J11
VSS_236
J16
VSS_237
J2
VSS_238
J24
VSS_239
J28
VSS_240
J33
VSS_241
J35
VSS_242
J39
VSS_243
K12
VSS_245
K47
VSS_246
K8
VSS_247
L1
VSS_248
L17
VSS_249
L20
VSS_250
L24
VSS_251
L28
VSS_252
L3
VSS_253
L33
VSS_254
L49
VSS_255
M28
VSS_256
M42
VSS_257
M46
VSS_258
M49
VSS_259
M5
VSS_260
M50
VSS_261
M9
VSS_262
N11
VSS_263
N14
VSS_264
N17
VSS_265
N29
VSS_266
N32
VSS_267
N36
VSS_268
N39
VSS_269
N44
VSS_270
N49
VSS_271
N7
VSS_272
P19
VSS_273
P2
VSS_274
P23
VSS_275
P3
VSS_276
P50
VSS_277
R49
VSS_278
T39
VSS_279
T43
VSS_280
T47
VSS_281
U41
VSS_282
U45
VSS_283
U50
VSS_284
V2
VSS_285
V3
VSS_286
CRESTLINE_1p0
VSS
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28
AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50
11
PROJECT : CW4
Size Document Number Rev
5
4
3
2
Date: Sheet
Quanta Computer Inc.
Crestline_F (VSS)
11 44 Friday, November 03, 2006
1
of
1A Custom
5
Strap table
All strap are sampled with respect to the leading edge of the GMCH Power OK(PWROK) Signal
CFG[17:3] Have internal Pull-up
CFG[18:19] Have internal Pull-down
Any CFG signal strapping option not list below should be left NC Pin
Pin Name Strap description
D D
CFG[2:0]
CFG[4:3]
CFG5
CFG6
CFG7
CFG8
CFG9
CFG[11 :10]
C C
CFG[13 :12]
CFG[15 :14]
CFG16
CFG[18 :17]
SDVO_CTR LDATA
CFG19
CFG20
B B
DMI X2 Select
MCH_CFG_5 Low = DMIX2
MCH_CFG_5 7
High = IDMIX4(Default)
R39
*4.02K/F/04
FSB Dynamic ODT
MCH_CFG_16 Low = ODT Disable
A A
MCH_CFG_16 7
High = ODT Enable(Default)
R31
*4.02K/F/04
5
FSB Frequency Select
Reserved
DMI X2 Select
Reserved
CPU Strap
Low power PCI Express
PCI Express Graphi cs Lane Reversal
Reserv e d
XOR/AL L Z
Reserv e d
FSB Dyna mic ODT
Reserv e d
SDVO Pr esent
DMI Lane Reversal
SDVO/PCIe c oncurrent
DMI Lane R eversal
MCH_CFG_19 Low = Normal operation(Default)
MCH_CFG_19 7
SDVO/PCIE Concurrent operation
MCH_CFG_20
MCH_CFG_20 7
4
High = Reverse Lane
+3 V
R67
*4.02K/F/04
Low = Only SDVO or PCIE X1 is
operational(Default)
High = SDVO andPCIE X1 are operating
simultaneously via the PEG port
+3V
R69
*4.02K/F/04
4
3
2
Configuration
010 = FSB 800MHz
011 = FSB 667MHz
0 = DMI X2
1 = DMI X4(Default)
0 = Reserved
1 = Mobile CPU(Default)
0 = Normal mode
1 = Low Power mode
0 = Revers e Lanes
1 = Normal opera tion(Default)
0 0 = R e s erved
01 = XOR Mo de Enable
10 = All-Z Mo de Enabled
11 = Normal opera tion(Default)
0 = Dynamic O DT disable
1 = Dynamic ODT E nable(Default)
0 = No SDVO Card p resent(Default)
1 = SDVO Car d Present
0 = Normal opera tion(Default)
1 = Revers e Lanes
0 = Only SDVO or PCIE x1 is operation(Default)
1 = SDVO and PCIE x1 are operating simultaneously via the PEG port
XOR /ALLz /Cloc k Un-gating
MCH_CFG_12 MCH_CFG_13 Configuration
0
0
1
1
MCH_CFG_12 7
MCH_CFG_13 7
0
1
0
1
Clock gating disable
XOR Mode Enable
ALL-z Mode Enable
Normal operation(Default)
3
R38
*4.02K/F/04
R40
*4.02K/F/04
PCI Express Graphics
MCH_CFG_9 Low = Reverse Lane
MCH_CFG_9 7
MCH_CFG_8 7
SDVO_CTRL_DATA 7
High = Normal operation(Default)
2
R68
*4.02K/F/04
1
12
SDVO Pre sent
Strap define at External
DVI contro l page
R29
*4.02K/F/04
R33
*4.02K/F/04
PROJECT : CW4
Size Document Number Rev
Date: Sheet
Quanta Computer Inc.
Crestline_F Strap
1
of
12 44 Friday, November 03, 2006
1A Custom
1
2
3
4
5
6
7
8
DDRII DUAL CHANNEL A,B.
A A
13
DDRII A CHANNEL DDRII B CHANNEL
M_A_A[13..0] M_B_A[13..0]
SMDDR_VTERM 1.8VSUS
SMDDR_VTERM
SMDDR_VTERM
C47
C122
.1U/10V
B B
M_A_O D T 0 7,14
M_A_CKE1 7,14
M_A_BS#0 8,14
M_A_RAS# 8,14
M_A_BS#1 8,14
C C
M_A_ W E # 8,14
M_A_CAS# 8,14
SA_ M A 14 7,14
SB_ M A 14 7,14
.1U/10V
C114
.1U/10V
M_A_O D T 0
M_A _A13
M_A_A8
M_A_A5
M_A_A3
M_A_A1
M_A_CKE1
M_A _A11
M_A _A10
M_A_ BS#0
M_A_A7
M_A_A6
M_A_A2
M_A_A4
M_A_ BS#1
M_A_A9
M_A _A12
C91
.1U/10V
C90
C37
.1U/10V
.1U/10V
RP4 5 6 X 2
1
3
RP17 5 6 X 2
1
3
RP13 5 6 X 2
1
3
RP24 5 6 X 2
1
3
RP9 5 6 X 2
1
3
RP20 5 6 X 2
1
3
RP16 5 6 X 2
1
3
RP5 5 6 X 2
1
3
RP26 5 6 X 2
1
3
RP7 5 6 X 2
1
3
R52 56/04
R58 56/04
M_A_A[13..0] 8,14 M_B_A[13..0] 8,14
SMDDR_VTERM 37,39 1.8VSUS 7,9,10,14,37,39,44
C43
C138
.1U/10V
C64
.1U/10V
C65
.1U/10V
C132
.1U/10V
.1U/10V
C135
.1U/10V
C97
.1U/10V
SMDDR_VTERM
C96
.1U/10V
C140
.1U/10V
C46
.1U/10V
C131
.1U/10V
C45
.1U/10V
+3V
C112
.1U/10V
+3V 3,4,7,9,10,12,14,15,16,17,19,20,21,22,24,26,27,30,33,34,35,36,37,38,39
C40
C62
.1U/10V
.1U/10V
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
RP12 5 6 X 2
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
M_B_ BS#1 8,14
M_B_ BS#2 8,14
M_B_CKE0 7,14
M_B_RAS# 8,14
M_B_CS#0 7,14
M_B_ BS#0 8,14
M_B_CAS# 8,14
M_B_W E# 8,14
M_B_A0
M_B_A5
M_B_A1
M_B_A8
M_B_A3
M_B_A4
M_B_A2
M_B_A12
M_B_A9
M_B_A7
M_B_A6
M_B_A10
1
3
RP14 5 6 X 2
1
3
RP18 5 6 X 2
1
3
RP15 5 6 X 2
1
3
RP22 5 6 X 2
1
3
RP19 5 6 X 2
1
3
RP25 5 6 X 2
1
3
RP8 5 6 X 2
1
3
RP6 5 6 X 2
1
3
RP11 5 6 X 2
1
3
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
C57
.1U/10V
C123
.1U/10V
C42
.1U/10V
C84
.1U/10V
C137
.1U/10V
RP10 5 6 X 2
M_A_CS#0 7,14
M_B_O D T 0 7,14
M_B_O D T 1 7,14
M_B_CS#1 7,14
M_A_CS#1 7,14
M_A_O D T 1 7,14
M_B_CKE1 7,14
M_A_CKE0 7,14
M_A_BS#2 8,14
D D
M_A_A0
M_B _A13
M_OD T 3
M_OD T 1
M_B_A11
1
3
RP3 5 6 X 2
1
3
RP2 5 6 X 2
1
3
RP1 5 6 X 2
1
3
RP23 56X2
1
3
RP21 56X2
1
3
2
4
2
4
2
4
2
4
2
4
2
4
SMDDR_VTERM
PROJECT : CW4
Quanta Computer Inc.
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
DDRII RES. ARRAY
7
of
13 44 Friday, November 03, 2006
8
1A B
1
CGCLK_SMB +3V
CGDAT_SMB
M_A_CKE[0..1]
M_A_CS#[0..1]
M_A_RAS#
M_A_CAS#
M_A_WE#
CGCLK_SMB 3,35 +3V 3,4,7,9,10,12,15,16,17,19,20,21,22,24,26,27,30,33,34,35,36,37,38,39,40,41,42,43,44
CGDAT_SMB 3,35
M_A_CKE[0..1] 7,13 M_A_CLK0 7
M_A_CS#[0..1] 7,13
M_A_RAS# 8,13
M_A_CAS# 8,13
M_A_WE# 8,13
M_A_CLK0
M_A_CLK0#
M_A_CLK1
M_A_CLK1#
M_A_BS#[0..2]
M_A_ODT[0..1]
2
M_A_CLK0# 7
M_A_CLK1 7
M_A_CLK1# 7
M_A_BS#[0..2] 8,13 M_A_DQS#[0..7] 8
M_A_ODT[0..1] 7,13
3
M_A_DQM[0..7]
M_A_DQ[0..63]
M_A_DQS[0..7]
M_A_DQS#[0..7]
M_A_A[13..0]
M_A_DQM[0..7] 8
M_A_DQ[0..63] 8
M_A_DQS[0..7] 8
M_A_A[13..0] 8,13
4
M_B_CKE[0..1]
M_B_CS#[0..1]
M_B_RAS#
M_B_CAS#
M_B_WE#
5
M_B_CKE[0..1] 7,13
M_B_CS#[0..1] 7,13
M_B_RAS# 8,13
M_B_CAS# 8,13
M_B_WE# 8,13
1.8VSUS
M_B_CLK0
M_B_CLK0#
M_B_CLK1
M_B_CLK1#
M_B_BS#[0..2]
M_B_ODT[0..1]
6
1.8VSUS 7,9,10,37,39,44
M_B_CLK0 7
M_B_CLK0# 7
M_B_CLK1 7
M_B_CLK1# 7
M_B_BS#[0..2] 8,13
M_B_ODT[0..1] 7,13
M_B_DQM[0..7]
M_B_DQ[0..63]
M_B_DQS[0..7]
M_B_DQS#[0..7]
M_B_A[13..0]
7
M_B_DQM[0..7] 8
M_B_DQ[0..63] 8
M_B_DQS[0..7] 8
M_B_DQS#[0..7] 8
M_B_A[13..0] 8,13
8
14
CN13B
1
VREF
1.8VSUS
81
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
VDD_1
82
VDD_2
87
VDD_3
88
VDD_4
95
VDD_5
96
VDD_6
103
VDD_7
104
VDD_8
111
VDD_9
112
VDD_10
117
VDD_11
118
VDD_12
114
ODT0
119
ODT1
50
NC_1
69
NC_2
83
NC_3
84
NC_4/A15
86
NC_5/A14
116
NC_6/A13
120
NC_7
163
NC_8
162
VSS_45
165
VSS_46
168
VSS_47
171
VSS_48
172
VSS_49
177
VSS_50
178
VSS_51
183
VSS_52
184
VSS_53
187
VSS_54
190
VSS_55
193
VSS_56
196
VSS_57
201 202
VSS_58 VSS_59
DDRII_SOCKET---2ND
1.8VSUS
C550
2.2U/6.3V/06
SMDDR_VREF_DIMM
2
VSS_1
3
VSS_2
8
VSS_3
9
VSS_4
12
VSS_5
15
VSS_6
18
VSS_7
21
VSS_8
24
VSS_9
27
VSS_10
28
VSS_11
33
VSS_12
34
VSS_13
39
VSS_14
40
VSS_15
41
VSS_16
42
VSS_17
47
VSS_18
48
VSS_19
53
VSS_20
54
VSS_21
59
VSS_22
60
VSS_23
65
VSS_24
66
VSS_25
71
VSS_26
72
VSS_27
77
VSS_28
78
VSS_29
121
VSS_30
122
VSS_31
127
VSS_32
PC2100 DDR2 SDRAM
SO-DIMM (200 P)
128
VSS_33
132
VSS_34
133
VSS_35
138
VSS_36
139
VSS_37
144
VSS_38
145
VSS_39
149
VSS_40
150
VSS_41
155
VSS_42
156
VSS_43
161
VSS_44
C127
C77
2.2U/6.3V/06
2.2U/6.3V/06
C59
2.2U/6.3V/06
+3V
M_A_DQ1
M_A_DQ5
M_A_DQ3
M_A_DQ2
M_A_DQ4
M_A_DQ0
M_A_DQ7
M_A_DQ6
M_A_DQ13
M_A_DQ8
M_A_DQ15
M_A_DQ10
M_A_DQ9
M_A_DQ12
M_A_DQ14
M_A_DQ11
M_A_DQ16
M_A_DQ21
M_A_DQ23
M_A_DQ19
M_A_DQ20
M_A_DQ17
M_A_DQ18
M_A_DQ22
M_A_DQ24
M_A_DQ28
M_A_DQ31
M_A_DQ30
M_A_DQ25
M_A_DQ29
M_A_DQ27
M_A_DQ26
M_A_A 0
M_A_A 1
M_A_A 2
M_A_A 3
M_A_A 4
M_A_A 5
M_A_A 6
M_A_A 7
M_A_A 8
M_A_A 9
M_A_A1 0
M_A_A1 1
M_A_A1 2
M_A_BS# 0
M_A_BS# 1
M_A_BS# 2
M_A_CLK0
M_A_CLK0#
M_A_CLK1
M_A_CLK1#
CGCLK_SMB
CGDAT_SMB
DIM1_SA0
DIM1_SA1
C81
2.2U/6.3V/06
+3 V +3V
C553
.1U/10V/04
1
CN13A
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
107
BA0
106
BA1
85
NC/BA2
30
CLK0
32
CLK0
164
CLK1
166
CKL1
197
SCL
195
SDA
198
SA0
200
SA1
199
VDDSPD
DDRII_SOCKET---2ND
DIM2_SA0
DIM2_SA1
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS0
DQS1
PC2100 DDR2 SDRAM SO-DIMM
(200 P )
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
CS0
CS1
RAS
CAS
WE
CKE0
CKE1
R458 10K/04
R457 10K/04
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
10
26
52
67
130
147
170
185
13
11
31
29
51
49
70
68
131
129
148
146
169
167
188
186
110
115
108
113
109
79
80
CKEA 0,1
+3V
M_B_DQ36
M_B_DQ33
M_B_DQ35
M_B_DQ39
M_B_DQ37
M_B_DQ32
M_B_DQ34
M_B_DQ38
M_B_DQ40
M_B_DQ41
M_B_DQ46
M_B_DQ43
M_B_DQ45
M_B_DQ44
M_B_DQ47
M_B_DQ42
M_B_DQ55
M_B_DQ49
M_B_DQ51
M_B_DQ53
M_B_DQ48
M_B_DQ52
M_B_DQ50
M_B_DQ54
M_B_DQ61
M_B_DQ60
M_B_DQ59
M_B_DQ63
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ62
M_B_DQM 0
M_B_DQM 1
M_B_DQM 2
M_B_DQM 3
M_B_DQM 4
M_B_DQM 5
M_B_DQM 6
M_B_DQM 7
M_B_DQS0
M_B_DQS#0
M_B_DQS1
M_B_DQS#1
M_B_DQS2
M_B_DQS#2
M_B_DQS3
M_B_DQS#3
M_B_DQS4
M_B_DQS#4
M_B_DQS5
M_B_DQS#5
M_B_DQS6
M_B_DQS#6
M_B_DQS7
M_B_DQS#7
M_B_CS#0
M_B_CS#1
M_B_RAS#
M_B_CAS#
M_B_WE#
M_B_CKE0
M_B_CKE1
SMDDR_VREF_DIMM
1.8VSUS
PM _ E X TTS # 0 7
SB_MA1 4 7,13
M_B_ODT0
M_B_ODT1
M_B_A1 3
Place these Caps near So-Dimm1. Place these Caps near So-Dimm2.
C554
2.2U/6.3V/06
C543
2.2U/6.3V/06
C100
2.2U/6.3V/06
C58
2.2U/6.3V/06
+3V
C104
2.2U/6.3V/06
C545
.1U/10V/04
C126
.1U/10V/04
C80
.1U/10V/04
C74
.1U/10V/04
C556
.1U/10V/04
C75
.1U/10V/04
A A
M_B_DQ1
M_B_DQ4
M_B_DQ2
M_B_DQ3
M_B_DQ5
M_B_DQ0
M_B_DQ7
M_B_DQ6
M_B_DQ13
M_B_DQ12
M_B_DQ10
M_B_DQ11
M_B_DQ8
M_B_DQ9
M_B_DQ15
M_B_DQ14
M_B_DQ21
M_B_DQ17
M_B_DQ19
M_B_DQ23
M_B_DQ20
M_B_DQ16
M_B_DQ18
M_B_DQ22
M_B_DQ28
M_B_DQ29
M_B_DQ27
M_B_DQ26
M_B_DQ24
M_B_DQ25
M_B_DQ31
M_B_DQ30
B B
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_BS#0
M_B_BS#
M_B_BS#2
M_B_CLK0
M_B_CLK0#
M_B_CLK1
M_B_CLK1#
CGCLK_SMB
CGDAT_SMB
DIM2_SA0
DIM2_SA1
C C
1.8VSUS
SMDDR_VREF_DIMM
CN12A
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
102
101
100
99
98
97
94
92
93
91
105
90
89
107
106
85
30
32
164
166
197
195
198
200
199
DDRII_SOCKET---1ST
R4 10K/04
R3 10K/04
SMbus addr e s s A 0 SMbus addr e s s A 4
C108
C93
.1U/10V/04
.1U/10V/04
123
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
BA0
BA1
NC/BA2
CLK0
CLK0
CLK1
CKL1
SCL
SDA
SA0
SA1
VDDSPD
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS0
DQS1
PC2100 DDR2 SDRAM SO-DIMM
(200 P )
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
CS0
CS1
RAS
CAS
CKE0
CKE1
DIM1_SA0
DIM1_SA1
C98
C87
.1U/10V/04
.1U/10V/04
WE
C109
.1U/10V/04
10
26
52
67
130
147
170
185
13
11
31
29
51
49
70
68
131
129
148
146
169
167
188
186
110
115
108
113
109
79
80
CKEB 0,1
M_A_DQM 0
M_A_DQM
M_A_DQM 2
M_A_DQM 3
M_A_DQM 4
M_A_DQM 5
M_A_DQM 6
M_A_DQM 7
M_A_DQS0
M_A_DQS#0
M_A_DQS1
M_A_DQS#1
M_A_DQS2
M_A_DQS#2
M_A_DQS3
M_A_DQS#3
M_A_DQS4
M_A_DQS#4
M_A_DQS5
M_A_DQS#5
M_A_DQS6
M_A_DQS#6
M_A_DQS7
M_A_DQS#7
M_A_CS#0
M_A_CS#1
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_CKE0
M_A_CKE1
H 5.2 H 9.2
M_A_DQ32
M_A_DQ35
M_A_DQ37
M_A_DQ38
M_A_DQ33
M_A_DQ36
M_A_DQ39
M_A_DQ34
M_A_DQ40
M_A_DQ41
M_A_DQ46
M_A_DQ42
M_A_DQ45
M_A_DQ44
M_A_DQ43
M_A_DQ47
M_A_DQ52
M_A_DQ48
M_A_DQ55
M_A_DQ54
M_A_DQ53
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ60
M_A_DQ56
M_A_DQ62
M_A_DQ58
M_A_DQ57
M_A_DQ61
M_A_DQ59
M_A_DQ63
1
SMDDR_VREF_DIMM
1.8VSUS
M_A_ODT0
M_A_ODT1
PM _ E X TTS # 0 7
SA_MA1 4 7,13
R117
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
1.8VSUS
M_A_A1 3
C583 470P/50V/04
1 2
*10K/F/06
CN12B
1
VREF
81
VDD_1
82
VDD_2
87
VDD_3
88
VDD_4
95
VDD_5
96
VDD_6
103
VDD_7
104
VDD_8
111
VDD_9
112
VDD_10
117
VDD_11
118
VDD_12
114
ODT0
119
ODT1
50
NC_1
69
NC_2
83
NC_3
84
NC_4/A15
86
NC_5/A14
116
NC_6/A13
120
NC_7
163
NC_8
162
VSS_45
165
VSS_46
168
VSS_47
171
VSS_48
172
VSS_49
177
VSS_50
178
VSS_51
183
VSS_52
184
VSS_53
187
VSS_54
190
VSS_55
193
VSS_56
196
VSS_57
201 202
VSS_58 VSS_59
DDRII_SOCKET---1ST
SMDDR_VREF_DIMM
PC2100 DDR2 SDRAM
SO-DIMM (200 P)
R112
*10K/F/06
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
R111 0/06
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
SMDDR_VREF
1.8VSUS
C2
C587
C582
.1U/10V/04
D D
2.2U/6.3V/06
C1
2.2U/6.3V/06
.1U/10V/04
SO-DIMM BYPASS PLACEMENT :
C590
.1U/10V/04
C591
2.2U/6.3V/06
C4
2.2U/6.3V/06
C3
.1U/10V/04
SO-DIMM BYPASS PLACEMENT :
Place these Caps near So-Dimm1. Place these Caps near So-Dimm2
No Vias Betwe en the Trace of PIN to CAP.
No Vias Betwe en the Trace of PIN to CAP.
PROJECT : CW4
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
7
Quanta Computer Inc.
DDRII SO-DIMM(200P)
14 44 Friday, November 03, 2006
of
8
1A Custom
5
PEG_TXP_C0 7
PEG_TXN_C0 7
PEG_TXP_C1 7
PEG_TXN_C1 7
PEG_TXP_C2 7
PEG_TXN_C2 7
D D
G72MV: +1. 2 V _ G F X _ P C I E
NB8M : +VCC_GF X_COR E
C C
+1.2V_GFX_PCIE
L18
0
10nH
1 2
*0
C254
4.7U
C281
100P
C262
220P
C288
220P
C295
4.7U
1 2
C280
0.01U
1 2
C304
100P
1 2
C264
0.01U
1 2
C285
4.7U
1 2
C216
4.7U
5
1 2
1 2
1 2
1 2
L19
+VCC_GFX_CORE
+VCC_GFX_CORE
B B
+1.2V_GFX_PCIE
A A
L16
G72_PLLVDD
1 2
C301
0.1U
1 2
C287
0.01U
1 2
C279
220P
1 2
C293
220P
PLACE NEAR BALLS
1 2
C259
1U
PEG_TXP_C3 7
PEG_TXN_C3 7
PEG_TXP_C4 7
PEG_TXN_C4 7
PEG_TXP_C5 7
PEG_TXN_C5 7
PEG_TXP_C6 7
PEG_TXN_C6 7
PEG_TXP_C7 7
PEG_TXN_C7 7
PEG_TXP_C8 7
PEG_TXN_C8 7
PEG_TXP_C9 7
PEG_TXN_C9 7
PEG_TXP_C10 7
PEG_TXN_C10 7
PEG_TX P _ C 1 1 7
PEG_TXN_C11 7
PEG_TX P _ C 1 2 7
PEG_TXN_C12 7
PEG_TX P _ C 1 3 7
PEG_TXN_C13 7
PEG_TX P _ C 1 4 7
PEG_TXN_C14 7
PEG_TX P _ C 1 5 7
PEG_TXN_C15 7
CLK_PCIE_VGA 3
CLK_PCIE_VGA# 3
C245
100P
C261
100P
C263
220P
1 2
C300
0.01U
1 2
C291
1U
1 2
C305
4.7U
PEX_PLL_DVDD
1 2
1 2
C234
0.1U
C235
0.01U
1 2
1 2
1 2
1 2
C247
1U
G72_PLLVDD
4
4
U25A
AF1
AG2
AG3
AG4
AF4
AF5
AG6
AG7
AF7
AF8
AG9
AG10
AF10
AF11
AG12
AG13
AG15
AG16
AF16
AF17
AG18
AG19
AF19
AF20
AG21
AG22
AF22
AF23
AG24
AG25
AG26
AF27
AE4
J9
M9
N9
R9
T9
J10
J11
M11
N11
R11
T11
L12
M12
T12
U12
L13
M13
T13
U13
W13
M14
T14
L15
M15
T15
U15
W15
L16
M16
T16
U16
W16
M17
N17
R17
T17
Y6
AA5
AA6
G72M-V/NB8M-GS
PEX_RX0P
PEX_RX0N
PEX_RX1P
PEX_RX1N
PEX_RX2P
PEX_RX2N
PEX_RX3P
PEX_RX3N
PEX_RX4P
PEX_RX4N
PEX_RX5P
PEX_RX5N
PEX_RX6P
PEX_RX6N
PEX_RX7P
PEX_RX7N
PEX_RX8P
PEX_RX8N
PEX_RX9P
PEX_RX9N
PEX_RX10P
PEX_RX10N
PEX_RX11P
PEX_RX11N
PEX_RX12P
PEX_RX12N
PEX_RX13P
PEX_RX13N
PEX_RX14P
PEX_RX14N
PEX_RX15P
PEX_RX15N
Clock
PEX_REFCLK#
VDD_01
VDD_02
VDD_03
VDD_04
VDD_05
VDD_06
VDD_07
VDD_08
VDD_09
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
PEX_PLLAVDD
PEX_PLLDVDD
PEX_PLLGND
PART 1 OF 4
P
C
I
ÂE
X
P
R
E
S
S
I
N
T
E
R
F
A
C
E
PCIE Power
PEX_TX0P
PEX_TX0N
PEX_TX1P
PEX_TX1N
PEX_TX2P
PEX_TX2N
PEX_TX3P
PEX_TX3N
PEX_TX4P
PEX_TX4N
PEX_TX5P
PEX_TX5N
PEX_TX6P
PEX_TX6N
PEX_TX7P
PEX_TX7N
PEX_TX8P
PEX_TX8N
PEX_TX9P
PEX_TX9N
PEX_TX10P
PEX_TX10N
PEX_TX11P
PEX_TX11N
PEX_TX12P
PEX_TX12N
PEX_TX13P
PEX_TX13N
PEX_TX14P
PEX_TX14N
PEX_TX15P
PEX_TX15N
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT# PEX_REFCLK
PEX_RST#
PEX_IOVDD_01
PEX_IOVDD_02
PEX_IOVDD_03
PEX_IOVDD_04
PEX_IOVDD_05
PEX_IOVDD_06
PEX_IOVDD_07
PEX_IOVDD_08
PEX_IOVDDQ_01
PEX_IOVDDQ_02
PEX_IOVDDQ_03
PEX_IOVDDQ_04
PEX_IOVDDQ_05
PEX_IOVDDQ_06
PEX_IOVDDQ_07
PEX_IOVDDQ_08
PEX_IOVDDQ_09
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
PEX_IOVDDQ_15
PEX_IOVDDQ_16
PEX_IOVDDQ_17
PEX_IOVDDQ_18
PEX_IOVDDQ_19
VDD_LP_01
VDD_LP_02
VDD_LP_03
VDD_LP_04
VDD33_01
VDD33_02
VDD33_03
VDD33_04
VDD33_05
VDD33_06
NC_01
AD5
AD6
AE6
AE7
AD7
AC7
AE9
AE10
AD10
AC10
AE12
AE13
AD13
AC13
AC15
AD15
AE15
AE16
AC18
AD18
AE18
AE19
AC21
AD21
AE21
AE22
AD22
AD23
AF25
AE25
AE24
AD24
AF13
AF14 AE3
AC6
AB10
AB11
AB14
AB15
W17
W18
AB20
AB21
AA4
AB5
AB6
AB7
AB8
AB9
AC9
AC11
AB12
AC12
AB13
AB16
AC16
AB17
AC17
AB18
AB19
AC19
AC20
W9
W10
W11
W12
J12
F13
J13
F14
J15
J16
D12
3
PCIE_MRX_GTX_C_P0
PCIE_MRX_GTX_C_N0
PCIE_MRX_GTX_C_P1
PCIE_MRX_GTX_C_N1
PCIE_MRX_GTX_C_P2
PCIE_MRX_GTX_C_N2
PCIE_MRX_GTX_C_P3
PCIE_MRX_GTX_C_N3
PCIE_MRX_GTX_C_P4
PCIE_MRX_GTX_C_N4
PCIE_MRX_GTX_C_P5
PCIE_MRX_GTX_C_N5
PCIE_MRX_GTX_C_P6
PCIE_MRX_GTX_C_N6
PCIE_MRX_GTX_C_P7
PCIE_MRX_GTX_C_N7
PCIE_MRX_GTX_C_P8
PCIE_MRX_GTX_C_N8
PCIE_MRX_GTX_C_P9
PCIE_MRX_GTX_C_N9
PCIE_MRX_GTX_C_P10
PCIE_MRX_GTX_C_N10
PCIE_MRX_GTX_C_P1 1
PCIE_MRX_GTX_C_N11
PCIE_MRX_GTX_C_P1 2
PCIE_MRX_GTX_C_N12
PCIE_MRX_GTX_C_P1 3
PCIE_MRX_GTX_C_N13
PCIE_MRX_GTX_C_P1 4
PCIE_MRX_GTX_C_N14
PCIE_MRX_GTX_C_P1 5
PCIE_MRX_GTX_C_N15
PEX _ T STC L K
P E X _ TSTC LK#
3
1 2
C314
0.1U
1 2
R501 *200
PEG_RXN0 7
PEG_RXN1 7
PEG_RXN2 7
PEG_RXN3 7
PEG_RXN4 7
PEG_RXN5 7
PEG_RXN6 7
PEG_RXN7 7
PEG_RXN8 7
PEG_RXN9 7
PEG_RXN10 7
PEG_RXN11 7
PEG_RXN12 7
PEG_RXN13 7
PEG_RXN14 7
PEG_RXN15 7
1 2
C241
0.022U
1 2
PLACE NEAR BALLS
1 2
C292
220P
1 2
C322
4700P
PLACE NEAR BALLS
C246
10U
4
1 2
1 2
C260
0.01U
C306
0.022U
1 2
C240
0.022U
+3 V
3 5
1 2
C249
0.022U
+3V
U6
TC7SH08FU
2
1
R192
1 2
C251
0.022U
+VCC_GFX_CORE
1 2
C265
0.1U
1 2
C297
1U
1 2
*0
+1.2V_GFX_PCIE
1 2
C243
0.1U
C192 0.1U
1 2
C194 0.1U
1 2
C217 0.1U
1 2
C196 0.1U
1 2
C219 0.1U
1 2
C198 0.1U
1 2
C221 0.1U
1 2
C224 0.1U
1 2
C200 0.1U
1 2
C226 0.1U
1 2
C202 0.1U
1 2
C228 0.1U
1 2
C204 0.1U
1 2
C230 0.1U
1 2
C232 0.1U
1 2
C206 0.1U
1 2
1 2
C356
0.1U
1 2
C253
4.7U
2
PCIE_MRX_GTX_C_N0
PCIE_MRX_GTX_C_N1
PCIE_MRX_GTX_C_N2
PCIE_MRX_GTX_C_N3
PCIE_MRX_GTX_C_N4
PCIE_MRX_GTX_C_N5
PCIE_MRX_GTX_C_N6
PCIE_MRX_GTX_C_N7
PCIE_MRX_GTX_C_N8
PCIE_MRX_GTX_C_N9
PCIE_MRX_GTX_C_N10
PCIE_MRX_GTX_C_N11
PCIE_MRX_GTX_C_N12
PCIE_MRX_GTX_C_N13
PCIE_MRX_GTX_C_N14
PCIE_MRX_GTX_C_N15
PLTR S T # 20,21,30,31,33,35
C207
10U
1 2
C250
1U
1 2
PLACE NEAR GPU PLACE NEAR BALLS
2
1
C191 0.1U
PCIE_MRX_GTX_C_P0
PEG_RXP0 7
PEG_RXP1 7
PEG_RXP2 7
PEG_RXP3 7
PEG_RXP4 7
PEG_RXP5 7
PEG_RXP6 7
PEG_RXP7 7
PEG_RXP8 7
PEG_RXP9 7
PEG_RXP10 7
PEG_RXP11 7
PEG_RXP12 7
PEG_RXP13 7
PEG_RXP14 7
PEG_RXP15 7
+1.2V_GFX_PCIE
1 2
C248
0.1U
1 2
1 2
C255
0.1U
C252
4.7U
1 2
C193 0.1U
1 2
C218 0.1U
1 2
C195 0.1U
1 2
C220 0.1U
1 2
C197 0.1U
1 2
C222 0.1U
1 2
C223 0.1U
1 2
C199 0.1U
1 2
C225 0.1U
1 2
C201 0.1U
1 2
C227 0.1U
1 2
C203 0.1U
1 2
C229 0.1U
1 2
C231 0.1U
1 2
C205 0.1U
1 2
PCIE_MRX_GTX_C_P1
PCIE_MRX_GTX_C_P2
PCIE_MRX_GTX_C_P3
PCIE_MRX_GTX_C_P4
PCIE_MRX_GTX_C_P5
PCIE_MRX_GTX_C_P6
PCIE_MRX_GTX_C_P7
PCIE_MRX_GTX_C_P8
PCIE_MRX_GTX_C_P9
PCIE_MRX_GTX_C_P10
PCIE_MRX_GTX_C_P11
PCIE_MRX_GTX_C_P12
PCIE_MRX_GTX_C_P13
PCIE_MRX_GTX_C_P14
PCIE_MRX_GTX_C_P15
15
N B 8 M P o wer s e quenc e reques t
3.3V-->1.8V-->1.2V
G72M Power sequence request
3.3V -->2.5V -->1.8V-->1.2V
PROJECT : CW4
Size Document Number Rev
Date: Sheet
Quanta Computer Inc.
VGA(NB8M-GS)(1 of 4)
1
of
15 44 Friday, November 03, 2006
1A Custom
5
1 2
R139
*10K
1 2
R142
10K
1 2
R145
2K/F
LCD_CTL 7,24
DISP_ON 7,24
LCD_BLON 7,24
1 2
C607
1 2
18P
C610
1 2
18P
Vendor
Elpida
Samsung
Infineon
Hynix
Samsung
Infineon
Hynix
Elpida
Samsung
Infineon
Hynix
3GIO_ADR_0
3GIO_ADR_1
3GIO_ADR_2
3GIO_ADR_3
1 2
R186
*10K
PEX_PLL_EN_TERM100
1 2
R177
10K
+3 V
1 2
PCI_DEVID0
PCI_DEVID1
PCI_DEVID2
PCI_DEVID3
PCI_DEVID4
C309
4700P
RAM_CFG0
RAM_CFG1
RAM_CFG2
RAM_CFG3
+3 V
C326
0.1U
D6
*CH500H-40PT
PLLVDD
1 2
C310
470P
Y6
27MHz
+3V
BXTALOUT
XTALSSIN
1 2
R508 *2K/F
+3V
1 2
C318
0.1U
T 5 4 *PAD
T 1 9 2 *PAD
R513 0
R193 0
2 1
R169
*2.2K
R130 10K
RP44
4P2R-10K
1
3
1 2
R173
10K
R181
2K/F
1 2
1 2
1 2
R511 2K/F
+3V
+3V
1 2
R154
D D
C C
B B
A A
*10K
1 2
R155
10K
RAM_CFG[3..0]=>Infineon(16MX16) 1010
Hynix (16MX16)1011
Infineon(32MX16)1110
Hynix (32MX16)1111
+3V
1 2
1 2
R163
R138
*2K/F
*2K/F
+2.5V
L25 SBK160808T-121Y-N
L21
*SBK160808T-121Y-N
+1.2V_GFX_PCIE
G72MV: +2 . 5 V
NB8M : +1 . 2 V _ G F X _ P C I E
RAM_CFG[3:0]
DDR2 16Mx16x4,64bit,128MB
0000
DDR2 16Mx16x4,64bit,128MB
0001
DDR2 16Mx16x4,64bit,128MB
0010
0011
DDR2 16Mx16x4,64bit,128MB
Reserve
0100
DDR2 32Mx16x4,64bit,256MB
0101
DDR2 32Mx16x4,64bit,256MB
0110
DDR2 32Mx16x4,64bit,256MB
0111
1000
DDR2 16Mx16x2,32bit,64MB
1001
DDR2 16Mx16x2,32bit,64MB
DDR2 16Mx16x2,32bit,64MB
1010
1011
DDR2 16Mx16x2,32bit,64MB
PCI_DEVID[3:0]
0111
1000
1 2
R510 *2K/F
1 2
R509 *2K/F
1 2
R507 *2K/F
1 2
1 2
1 2
R159
R144
10K
10K
1 2
1 2
R150
R160
*10K
*10K
1 2
1 2
R506
R505
2K/F
2K/F
ECPWROK 7,21,36
GFX_CORE_CNTRL 44
1 2
C307
4.7U
RAM_CFG[3:0]
Description
G72MV
G72M
5
R141
*2K/F
R179
1 2
*2K/F
1 2
1 2
VGA_ALERT
2
4
1 2
R188
10K
R134 10K
4
PEX_PLL_EN_TERM100
SUB_VENDOR
T203 *PAD
T64 *PAD
T206 *PAD
T212 *PAD
3GIO_ADR_0
T191 *PAD
3GIO_ADR_1
3GIO_ADR_2
T189 *PAD
T63 *PAD
RAM_CFG0
RAM_CFG1
*PAD
T196
PCI_DEVID2
PCI_DEVID0
PCI_DEVID1
T193 *PAD
MOBILE_GPIO
RAM_CFG2
RAM_CFG3
*PAD
T190
PCI_DEVID3
PCI_DEVID4
BAR2_SIZE
3GIO_ADR_3
T197 *PAD
1 2
T 1 9 5 *PAD
T 1 9 4 *PAD
MIOBCAL_PD_VDDQ
MIOBCAL_PU_GND
T 5 3 *PAD
T 6 1 *PAD
ENVDD#
T 2 1 0 *PAD
T 2 0 4 *PAD
T 2 0 8 *PAD
T 2 1 1 *PAD
T 2 0 7 *PAD
T 6 0 *PAD
VGA_THERMDN
VGA_THERMDP
PLLVDD
XTALSS I N
XTA L I N
BXT AL OU T
T 1 8 5 *PAD
T182 *PAD
T180 *PAD
T199 *PAD
T198 *PAD
T202 *PAD
T200 *PAD
T65 *PAD
I2CH_SCL
I2CH_SDA
4
U25B
A2
MIO_A_D0
B3
MIO_A_D1
A3
MIO_A_D2
D4
MIO_A_D3
A4
MIO_A_D4
B4
MIO_A_D5
B6
MIO_A_D6
P4
MIO_A_D7
C6
MIO_A_D8
G5
MIO_A_D9
V4
MIO_A_D10
C4
MIO_A_HSYNC
G2
MIO_B_D0
G3
MIO_B_D1
J2
MIO_B_D2
J1
MIO_B_D3
K4
MIO_B_D4
K1
MIO_B_D5
M2
MIO_B_D6
M1
MIO_B_D7
N1
MIO_B_D8
N2
MIO_B_D9
N3
MIO_B_D10
R3
MIO_B_D11
F2
MIO_B_CTL3
G1
MIO_B_DE
G4
MIO_B_HSYNC
F1
MIO_B_VSYNC
R2
MIO_B_CLKIN
K2
MIO_B_CLKOUT
K3
MIO_B_CLKOUT#
F6
MIO_A_VDDQ1
G6
MIO_A_VDDQ2
J6
MIO_A_VDDQ3
K5
MIO_B_VDDQ1
K6
MIO_B_VDDQ2
L6
MIO_B_VDDQ3
J5
MIO_B_CAL_PD_VDDQ
M3
MIO_B_CAL_PU_GND
J4
MIO_B_VREF
A9
GPIO[0]
D9
GPIO[1]
A10
GPIO[2]
B10
GPIO[3]
C10
GPIO[4]
C12
GPIO[5]
B12
GPIO[6]
A12
GPIO[7]
A13
GPIO[8]
B13
GPIO[9]
B15
GPIO[10]
A15
GPIO[11]
B16
GPIO[12]
C9
THERMDN
B9
THERMDP
H4
PLLVDD
H5
PLLGND
C1
XTALSSIN
B1
XTALIN
C3
XTALOUTBUFF
C2
XTALOUT
AE27
JTAG_TCK
AD26
JTAG_TMS
AD27
JTAG_TDI
AE26
JTAG_TDO
AD25
JTAG_TRST#
D1
ROM_CS#
F3
ROM_SI
D3
ROM_SO
D2
ROM_SCLK
D11
CLAMP
C7
I2CH_SCL
B7
I2CH_SDA
G72M-V/NB8M-GS
General
Purpose
I/O
Thermal
Diode
PLL &
XTAL
Test
ROM
PART 2 OF 4
V
I
D
E
O
&
M
U
L
T
I
M
Multi-Use Input/Output
Interface
E
D
I
A
MISC
Integrated
TMDS
IFPC_TXD0N
IFPC_TXD0P
IFPC_TXD1N
IFPC_TXD1P
IFPC_TXD2N
IFPC_TXD2P
IFPC_TXCN
IFPC_TXCP
IFPCD_RSET
IFPCD_VPROBE
I2CB_SCL
I2CB_SDA
IFPC_IOVDD
IFPCD_PLLVDD
IFPCD_PLLGND
DACA / CRT
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_HSYNC
DACA_VSYNC
I2CA_SCL
I2CA_SDA
DACA_RSET
DACA_IDUMP
DACA_VDD
DACA_VREF
DA CB ( T V / C R T 2)
DACB_R_C
DACB_G_Y
DACB_B_COMP
DACB_HSYNC
DACB_VSYNC
DACB_RSET
DACB_IDUMP
DACB_VDD
DACB_VREF
LVDS
IFPA_TXD0N
IFPA_TXD0P
IFPA_TXD1N
IFPA_TXD1P
IFPA_TXD2N
IFPA_TXD2P
IFPA_TXD3N
IFPA_TXD3P
IFPA_TXCN
IFPA_TXCP
IFPB_TXD4N
IFPB_TXD4P
IFPB_TXD5N
IFPB_TXD5P
IFPB_TXD6N
IFPB_TXD6P
IFPB_TXD7N
IFPB_TXD7P
IFPB_TXCN
IFPB_TXCP
IFPAB_RSET
IFPAB_VPROBE
IFPA_IOVDD
IFPB_IOVDD
IFPAB_PLLVDD
IFPAB_PLLGND
I2CC_SCL
I2CC_SDA
BUFRST#
STEREO
SWAPRDY
TESTMODE RFU_GND
3
R1
T1
T2
T3
V3
V2
W1
V1
J3
M5
F9
F10
L4
M4
M6
AE1
AD1
AD2
AD4
AC4
D10
E10
AD3
U9
AE2
AB4
F4
E4
D5
E6
F5
D6
L9
F8
E7
N5
N4
R4
R5
T6
T5
P6
R6
U4
T4
W2
W3
AA3
AA2
AA1
AB1
AB2
AB3
W6
W5
U6
N6
W4
Y4
V5
V6
E9
D8
A6
F7
A7
D7 AC8
3
T52 *PAD
T51 *PAD
R140 10K
1 2
R147 10K
1 2
CRT_R_C
CRT_G_C
CRT_B_C
CRT_HSYNC_C
CRT_VSYNC_C
VGA_DDCCLK
VGA_DDCDAT
DACA_RSET
1 2
DACA_VDD
DACA_VREF
TV_C
R178 *150/F
TV_Y
R172 *150/F
TV_CVBS
R183 *150/F
T5 7 *PAD
T5 9 *PAD
T6 2 *PAD
DACB_VDD
R174 10K
DACB_VREF
LCD_A0-
LCD_A0+
LCD_A1-
LCD_A1+
LCD_A2-
LCD_A2+
T4 4 *PAD
T4 3 *PAD
LCD_ACLK-
LCD_ACLK+
T 188 *PAD
T 187 *PAD
T 186 *PAD
T 184 *PAD
T 183 *PAD
T 179 *PAD
T 178 *PAD
T 181 *PAD
T3 8 *PAD
T4 1 *PAD
R137
T4 8
IFPAB_IOVDD
IFPAB_PLLVDD
EDIDCLK_C
EDIDDATA_C
T209 *PAD
T56 *PAD
R512 10K
1 2
R195 10K
THRM_CLK 4
THRM_DATA 4
R199 2.2K
+3V
R476 0
1 2
R479 0
1 2
R483 0
1 2
R119 0
1 2
R127 0
1 2
R133 124/F
1 2
T5 8 *PAD
RP35 0 X 2
RP34 0 X 2
RP33 0 X 2
RP32 0 X 2
R165 0
R176 0
3
1
3
1
3
1
3
1
1K
1 2
1 2
1 2
1 2
4
2
4
2
4
2
4
2
+3V
VGA_ALERT
CRT_R 7,23
CRT_G 7,23
CRT_B 7,23
HSYNC_COM 7,23
VSYNC_COM 7,23
T X L O U T 0 - 7,24
T X L O U T 0 + 7,24
T X L O U T 1 - 7,24
T X L O U T 1 + 7,24
T X L O U T 2 - 7,24
T X L O U T 2 + 7,24
TX L C L K O U T - 7,24
T X L C L K O U T + 7,24
EDIDCLK 7,24
EDIDDATA 7,24
2
THERMAL SENSOR
U27
8
7
6
DACA_VDD
DACA_VREF
DACB_VDD
DACB_VREF
2
SMCLK
SMDATA
-ALT
MAX6647
SLAVE ADDRESS: 9C
VCC
DXP
DXN
-OVT GND
+5V
R217 2.2K
VGA_DDCCLK
R221 2.2K
+5V
VGA_DDCDAT
CRT_R_C
CRT_G_C
CRT_B_C
1 2
C244
0.01U
1 2
C317
*0.01U
IFPAB_IOVDD
IFPAB_PLLVDD
Size Document Number Rev
Date: Sheet
G781_VCC
R516 100/F
1
2
3
4 5
C605 0.1U
VGA_THERMDP
C608
VGA_THERMDN
2200P
R203 10K
+5V
2
1
2N7002E/CH2507SPT
2
1
2N7002E/CH2507SPT
R125 150/F
1 2
R121 150/F
1 2
R126 150/F
1 2
Place close to VGA Chip
1 2
1 2
1 2
1 2
1 2
C237
4700P
C353
*4700P
C269
470P
C289
470P
C239
470P
1 2
C345
*470P
1 2
C268
4700P
1 2
C290
4700P
PROJECT : CW4
Quanta Computer Inc.
VGA(NB8M-GS)(2 of 4)
1
Q16
3
Q17
3
L17
SBK160808T-121Y-N
1 2
C238
4.7U
L33
*SBK160808T-121Y-N
1 2
C358
*4.7U
L20
SBK160808T-121Y-N
1 2
C266
4.7U
SBK160808T-121Y-N
L23
1 2
L22
C286
*SBK160808T-121Y-N
4.7U
1
+3V
16
10 mil trace /
10 mil space
+3V
DDCCLK2 23
DDCDAT2 23
+3 V
+3 V
+1.8V
+2.5V
+1.8V
G72MV: +2.5V
NB8M : +1.8V
16 44 Friday, November 03, 2006
of
1A Custom
5
FB_CMD[0..26] 18
FBD[0..63] 18
FBDQM[0..7] 18
FBDQS[0..7] 18
FBDQS#[0..7] 18
D D
C C
+1.8V
1 2
R515
Rt
1K/F
1 2
Rb
R514
1K/F
B B
FBVREF = FBVDDQ * Rb/(Rt + Rb).
VREF = 0.5 * FBVDDQ.
DDR: 0.9V = 1.8V * 1K/(1K + 1K).
G72MV: NC
NB8M : +1.2V_GFX_PCIE
+1.2V_GFX_PCIE
A A
FBVREF
1 2
C602
0.1U
L60
*SBK160808T-121Y-N
L59 0
NB8M A VER :
STUFF
FB_CMD12
G72MV: NC
NB8M : 2.2K
+3V
1 2
C604
4.7U
1 2
FBD0
FBD1
FBD2
FBD3
FBD4
FBD5
FBD6
FBD7
FBD8
FBD9
FBD10
FBD11
FBD12
FBD13
FBD14
FBD15
FBD16
FBD17
FBD18
FBD19
FBD20
FBD21
FBD22
FBD23
FBD24
FBD25
FBD26
FBD27
FBD28
FBD29
FBD30
FBD31
FBD32
FBD33
FBD34
FBD35
FBD36
FBD37
FBD38
FBD39
FBD40
FBD41
FBD42
FBD43
FBD44
FBD45
FBD46
FBD47
FBD48
FBD49
FBD50
FBD51
FBD52
FBD53
FBD54
FBD55
FBD56
FBD57
FBD58
FBD59
FBD60
FBD61
FBD62
FBD63
FB_CLK0 18
FB_CLK0# 18
FB_CLK1 18
FB_CLK1# 18
T 4 5 *PAD
T 5 0 *PAD
R149
R180 *2.2K/F
1 2
R184 *2.2K/F
1 2
FBA_PLLVDD
FB_PLLAVDD
1 2
C331
1U
C603
0.01U
FB_DEBUG
*0_4
FBVREF
U25C
A26
C24
B24
A24
C22
A25
B25
D23
G22
J23
E24
F23
J24
F24
G23
H24
D16
E16
D17
F18
E19
E18
D20
D19
A18
B18
A19
B19
D18
C19
C16
C18
N26
N25
R25
R26
R27
T25
T27
T26
AB23
Y24
AB24
AB22
AC24
AC22
AA23
AA22
T24
T23
R24
R23
R22
T22
N23
P24
AA24
AA27
AA26
AB25
AB26
AB27
AA25
W25
L24
K23
M22
N22
M23
M24
K22
A16
F11
D14
D13
C15
G72M-V/NB8M-GS
4
FB_DQ0
FB_DQ1
FB_DQ2
FB_DQ3
FB_DQ4
FB_DQ5
FB_DQ6
FB_DQ7
FB_DQ8
FB_DQ9
FB_DQ10
FB_DQ11
FB_DQ12
FB_DQ13
FB_DQ14
FB_DQ15
FB_DQ16
FB_DQ17
FB_DQ18
FB_DQ19
FB_DQ20
FB_DQ21
FB_DQ22
FB_DQ23
FB_DQ24
FB_DQ25
FB_DQ26
FB_DQ27
FB_DQ28
FB_DQ29
FB_DQ30
FB_DQ31
FB_DQ32
FB_DQ33
FB_DQ34
FB_DQ35
FB_DQ36
FB_DQ37
FB_DQ38
FB_DQ39
FB_DQ40
FB_DQ41
FB_DQ42
FB_DQ43
FB_DQ44
FB_DQ45
FB_DQ46
FB_DQ47
FB_DQ48
FB_DQ49
FB_DQ50
FB_DQ51
FB_DQ52
FB_DQ53
FB_DQ54
FB_DQ55
FB_DQ56
FB_DQ57
FB_DQ58
FB_DQ59
FB_DQ60
FB_DQ61
FB_DQ62
FB_DQ63
FB_CLK0
FB_CLK0#
FB_CLK1
FB_CLK1#
FB_REFCLK
FB_REFCLK#
FB_DEBUG
FB_VREF
I2CS_SDA
FB_PLLVDD
FB_PLLAVDD
FB_PLLAGND
Part 3 of 4
FB_CMD0
FB_CMD1
FB_CMD2
FB_CMD3
FB_CMD4
FB_CMD5
FB_CMD6
FB_CMD7
FB_CMD8
FB_CMD9
FB_CMD10
FB_CMD11
FB_CMD12
FB_CMD13
FB_CMD14
FB_CMD15
FB_CMD16
FB_CMD17
FB_CMD18
FB_CMD19
FB_CMD20
FB_CMD21
FB_CMD22
MEMORY INTERFACE
FB_CMD23
FB_CMD24
FB_CMD25
FB_CMD26
FB_DQM0
FB_DQM1
FB_DQM2
FB_DQM3
FB_DQM4
FB_DQM5
FB_DQM6
FB_DQM7
FB_DQS_RN0
FB_DQS_RN1
FB_DQS_RN2
FB_DQS_RN3
FB_DQS_RN4
FB_DQS_RN5
FB_DQS_RN6
FB_DQS_RN7
FB_DQS_WP0
FB_DQS_WP1
FB_DQS_WP2
FB_DQS_WP3
FB_DQS_WP4
FB_DQS_WP5
FB_DQS_WP6
write strobe read strobe
FB_DQS_WP7
FBVTT_01
FBVTT_02
FBVTT_03
FBVTT_04
FBVTT_05
FBVTT_06
FBVTT_07
FBVTT_08
FBVTT_09
FBVTT_10
FBVDDQ_01
FBVDDQ_02
FBVDDQ_03
FBVDDQ_04
FBVDDQ_05
FBVDDQ_06
FBVDDQ_07
FBVDDQ_08
FBVDDQ_09
FBVDDQ_10 I2CS_SCL
FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND
G27
D25
F26
F25
G25
J25
J27
M26
C27
C25
D24
N27
R151 0_4
G24
J26
M27
C26
M25
D26
D27
K26
K25
K24
F27
K27
G26
B27
N24
D21
F22
F20
A21
V27
W22
V22
V24
A22
E22
F21
B21
V26
W23
V23
W27
B22
D22
E21
C21
V25
W24
U24
W26
E15
F15
F16
J17
J18
L19
N19
R19
U19
W19
F17
F19
J19
M19
T19
J22
L22
P22
U22
Y22 F12
FBCAL_PD_VDDQ
D15
FBCAL_PU_GND
E13
FBCAL_TERM_GND
H22
FB_CMD0
FB_CMD1
FB_CMD2
FB_CMD3
FB_CMD4
FB_CMD5
FB_CMD6
FB_CMD7
FB_CMD8
FB_CMD9
FB_CMD10
FB_CMD11
FB_CMD13
FB_CMD14
FB_CMD15
FB_CMD16
FB_CMD17
FB_CMD18
FB_CMD19
FB_CMD20
FB_CMD21
FB_CMD22
FB_CMD23
FB_CMD24
FB_CMD25
FB_CMD26
FBDQM0
FBDQM1
FBDQM2
FBDQM3
FBDQM4
FBDQM5
FBDQM6
FBDQM7
FBDQS#0
FBDQS#1
FBDQS#2
FBDQS#3
FBDQS#4
FBDQS#5
FBDQS#6
FBDQS#7
FBDQS0
FBDQS1
FBDQS2
FBDQS3
FBDQS4
FBDQS5
FBDQS6
FBDQS7
3
R158
1 2
*40/F
FB_CMD12
T49 *PAD
NB8M A VER:
NC
T47 *PAD
+1.8V
1 2
R170
40/F
1 2
R162
30/F
2
PLACE BELOW GPU
1 2
1 2
1 2
C256
4 7 00P
C275
4 7 00P
C312
4700P
1 2
1 2
1 2
C277
0.022U
C278
0.022U
C294
0.022U
U25D
B2
E2
H2
L2
P2
U2
Y2
AC2
AF2
AF3
B5
E5
L5
P5
U5
Y5
AC5
H6
AF6
B8
E8
AD8
K9
P9
V9
AD9
AF9
B11
E11
L11
P11
U11
AD11
N12
P12
R12
AD12
AF12
N13
P13
R13
B14
E14
J14
L14
N14
G72 M - V / N B 8 M - G S
1 2
1 2
1 2
GND_01
GND_02
GND_03
GND_04
GND_05
GND_06
GND_07
GND_08
GND_09
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
C298
0.1U
C270
0.1U
C593
0.1U
Part 4 of 4
GND
1 2
C594
4700P
1 2
C316
4700P
1 2
C336
0.022U
1 2
1 2
1 2
C324
0.1U
C313
0.022U
C321
0.1U
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
1
P14
R14
U14
W14
AC14
AD14
N15
P15
R15
AF15
N16
P16
R16
AD16
B17
E17
L17
P17
U17
AD17
AF18
K19
P19
V19
AD19
B20
E20
AD20
AF21
B23
E23
H23
L23
P23
U23
Y23
AC23
AF24
B26
E26
H26
L26
P26
U26
Y26
AC26
AF26
1 2
C325
4.7U
1 2
C334
0.1U
+1.8V
1 2
1 2
1 2
17
C302
1U
C360
4.7U
C284
1U
PROJECT : CW4
Quanta Computer Inc.
Size Document Number Rev
5
4
3
2
Date: Sheet
VGA(NB8M-GS)(3 of 4)
17 44 Friday, November 03, 2006
1
of
1A Custom
5
FB_CMD[0..26] 17
FBD[0..63] 17
FBDQM[0..7] 17
FBDQS[0..7] 17
FBDQS#[0..7] 17
R153
D D
10K
1 2
R504
10K
1 2
FB_CMD12
FB_CMD11
FB_CMD1
FB_CMD3
FB_CMD2
FB_CMD0
FB_CMD24
FB_CMD22
FB_CMD23
FB_CMD19
FB_CMD20
FB_CMD17
FB_CMD16
FB_CMD14
FB_CMD10
FB_CMD18
FBDQM1
FBDQM0
FB_CMD15
FB_CMD25
FB_CMD9
FB_CMD8
FB_CMD12
FB_CLK0
FB_CLK0#
+1.8V
FB_CLK0 17
FB_CLK0# 17
12
R209
C373
*0.01U/10V_4
C C
*0_4
1 2
1 2
1 2
R211
R210
56/F
56/F
FB_CLK0
FB_CLK0#
G72MV : FB_CLK0+FB_CLK0#=120 OHM
NB8M : 40.2/F + 40.2/F
U3
FB_ A 0
FB_CMD1
FB_CMD3
FB_CMD13
FB_CMD4
FB_CMD5
FB_CMD6
FB_CMD21
FB_CMD23
FB_CMD19
FB_CMD20
FB_CMD17
FB_CMD16
FB_CMD14
FB_CMD10
FB_CMD18
B B
FBDQM5
FBDQM4
FB_CMD15
FB_CMD25
FB_CMD9
FB_CMD8
FB_CMD11
FB_CMD12
FB_CLK1 17
FB_CLK1# 17
+1.8V
+1.8V
1 2
R124
C210
*0.01U/10V_4
A A
*0_4
1 2
1 2
1 2
R122
R123
56/F
56/F
FB_CLK1
FB_ R AS*
FB_ C AS*
FB_ W E *
FB_ C S 0 *
FB_ C KE
FB_ A 1
FB_ A 2
FB_ A 3
FB_ A 4
FB_ A 5
FB_ A 6
FB_ A 7
FB_ A 8
FB_ A 9
FB_ A 1 0
FB_ A 1 1
FB_ BA0
FB_ BA1
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
VRAM
+1.8V
FB_RAS*
FB_CAS*
FB_WE*
FB_CS0*
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UDQS
UDQS#
LDQS
LDQS#
VREF
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
NC1
NC2
NC3
NC4
NC5
NC6
FB_A0
FB_A1
FB_A2
FB_A3
FB_A4
FB_A5
FB_A6
FB_A7
FB_A8
FB_A9
FB_A10
FB_A11
FB_BA0
FB_BA1
4
U5
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UDQS
UDQS#
LDQS
LDQS#
VREF
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
NC1
NC2
NC3
NC4
NC5
NC6
FBD6
G8
FBD0
G2
FBD7
H7
FBD4
H3
FBD3
H1
FBD5
H9
FBD2 FB_CMD21
F1
FBD1
F9
FBD11
C8
FBD15
C2
FBD14
D7
FBD8
D3
FBD12
D1
FBD13
D9
FBD9
B1
FBD10
B9
FBDQS1
B7
FBDQS#1
A8
FBDQS0
F7
FBDQS#0
E8
A2
E2
L1
R3
R7
R8
VREF1
J2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
VRAM
FBD37
G8
FBD36
G2
FBD34
H7
FBD33
H3
FBD32
H1
FBD35
H9
FBD38
F1
FBD39
F9
FBD47
C8
FBD46
C2
FBD43
D7
FBD44
D3
FBD42
D1
FBD45
D9
FBD41
B1
FBD40
B9
FBDQS5
B7
FBDQS#5
A8
FBDQS4
F7
FBDQS#4
E8
A2
E2
L1
R3
R7
R8
VREF2
J2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
+1.8V
1 2
R502
1K/F
1 2
R503
C597
1K/F
0.1U
1 2
1 2
C581
4.7U
1 2
C215
0.1U
1 2
1 2
C211
0.1U
1 2
1 2
C595
0.1U
+1.8V
1 2
1 2
C374
0.01U
C596
0.01U
C362
4.7U
C335
0.1U
+1.8V
3
1 2
12
1 2
1 2
R213
1K/F
R214
1K/F
C589
0.1U
C242
0.1U
FB_CMD1
FB_CMD3
FB_CMD13
FB_CMD4
FB_CMD5
FB_CMD6
FB_CMD21
FB_CMD23
FB_CMD19
FB_CMD20
FB_CMD17
FB_CMD16
FB_CMD14
FB_CMD10
FB_CMD18
FBDQM7
FBDQM6
FB_CMD15
FB_CMD25
FB_CMD9
FB_CMD8
FB_CMD11
FB_CMD12
FB_CLK1
FB_CLK1#
+1.8V
2
U26
FB_A0
FB_CMD1
FB_CMD3
FB_CMD2
FB_CMD0
FB_CMD24
FB_CMD22
FB_CMD21
FB_CMD23
FB_CMD19
FB_CMD20
FB_CMD17
FB_CMD16
FB_CMD14
FB_CMD10
FB_CMD18
FBDQM2
FBDQM3
FB_CMD15
FB_CMD25
FB_CMD9
FB_CMD8
FB_CMD11 FB_CMD11
FB_CMD12
FB_CLK0
C376
0.1U
1 2
1 2
C365
0.01U
1 2
C328
0.01U
FB_CLK0#
+1.8V
FB_RAS*
FB_CAS*
FB_WE*
FB_CS0*
FB_CKE FB_CKE
FB_A1
FB_A2
FB_A3
FB_A4
FB_A5
FB_A6
FB_A7
FB_A8
FB_A9
FB_A10
FB_A11
FB_BA0
FB_BA1
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UDQS
UDQS#
LDQS
LDQS#
NC1
NC2
NC3
NC4
NC5
NC6
VREF
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
FBD24
G8
FBD26
G2
FBD25
H7
FBD30
H3
FBD28
H1
FBD27
H9
FBD29
F1
FBD31
F9
FBD19
C8
FBD20
C2
FBD16
D7
FBD18
D3
FBD23
D1
FBD17
D9
FBD22
B1
FBD21
B9
FBDQS2
B7
FBDQS#2
A8
FBDQS3
F7
FBDQS#3
E8
A2
E2
L1
R3
R7
R8
VREF1
J2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
+1.8V
1 2
1 2
C323
4.7U
C601
0.1U
1
18
1 2
1 2
1 2
C592
0.1U
C606
0.1U
C609
0.01U
1 2
C370
0.01U
VRAM
U24
FB_ R AS*
FB_ C AS*
FB_ W E *
FB_ C S 0 *
FB_ C KE
FB_ A 0
FB_ A 1
FB_ A 2
FB_ A 3
FB_ A 4
FB_ A 5
FB_ A 6
FB_ A 7
FB_ A 8
FB_ A 9
FB_ A 1 0
FB_ A 1 1
FB_ BA0
FB_ BA1
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
B3
UDM
F3
LDM
K7
RAS
L7
CAS
K3
WE
L8
CS
K2
CKE
K9
ODT
J8
CLK
K8
CLK#
J1
VDDL
J7
VSSDL
A3
VSS_0
E3
VSS_1
J3
VSS_2
N1
VSS_3
P9
VSS_4
A7
VSSQ_0
B2
VSSQ_1
B8
VSSQ_2
D2
VSSQ_3
D8
VSSQ_4
E7
VSSQ_5
F2
VSSQ_6
F8
VSSQ_7
H2
VSSQ_8
H8
VSSQ_9
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UDQS
UDQS#
LDQS
LDQS#
NC1
NC2
NC3
NC4
NC5
NC6
VREF
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
FBD51
G8
FBD49
G2
FBD55
H7
FBD54
H3
FBD52
H1
FBD53
H9
FBD48
F1
FBD50
F9
FBD56
C8
FBD60
C2
FBD58
D7
FBD61
D3
FBD59
D1
FBD57
D9
FBD62
B1
FBD63
B9
FBDQS7
B7
FBDQS#7
A8
FBDQS6
F7
FBDQS#6
E8
A2
E2
L1
R3
R7
R8
VREF2
J2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
+1.8V +1.8V
1 2
1 2
C213
4.7U
1 2
C319
0.1U
1 2
C214
C371
0.1U
0.01U
1 2
1 2
C584
0.1U
C588
0.01U
VRAM
FB_CLK1#
G72MV : FB_CLK0+FB_CLK0#=120 OHM
NB8M : 40.2/F + 40.2/F
5
Size Document Number Rev
4
3
Date: Sheet
2
PROJECT : CW4
Quanta Computer Inc.
VGA(VRAM X 4)(4 of 4)
of
18 44 Friday, November 03, 2006
1
1A Custom
5
RTC
3VPCU
VCCRTC_2
R317
D D
5VPCU
C C
B B
1K
RTC_BAT_V
1 2
BT1
RTC_BAT
R287 1.2K
R291
4.7K
R295
15K
add RTC Bat rechargeable circuit
VCCRTC
D13
CH500H-40PT
D12
CH500H-40PT
VCCRTC
R326
1M/F
R327
20K
C460
1U
20MIL 20MIL
VCCRTC_1 VCCRTC_3
R294 1K
CLK_PCIE_SATA# 3
CLK_PCIE_SATA 3
1 2
G1
C471
*SHORT_ PAD1
1U
Q23
1 3
M M B T3904
2
+1.5V_PCIE
+3 V
R372 10K
SATA_LED# 34
SATA_RXN 0 30
SATA _ R X P 0 30
SATA_ TX N 0 30
SATA_ T X P 0 30
SB Strap
ICH8-M Interna l VR Enable
strap
(Internal VR for
Vccsus1_05,VccSus1_5 and
VccCL1_5)
INTVRMEN
VCCRTC VCCRTC +3V
A A
Low = Internal VR disable
High = Internal VR
enable(Default)
R331
332K/F/06
ICH_INTVRMEN LAN100_SLP ACZ_SDOUT
R333
*0
5
ICH8-M LAN100_SLP Strap
(Internal VR for VccLAN1_05 and
VccCL1.05)
LAN100_SLP
4
CKL:C1/C2: 18pF -> CL:12.5pF
C1/C: 10pF -> CL Value =
8.5pF
C477
12P
32.768KHZ
C492
12P
T216
T85
T74
T219
T215
T82
T89
T77
T1 4 8
R257
24.9/F/04
ACZ_SDIN0 27
ACZ_SDIN1 29
T2 4 3
T130
T136
T1 4 2
C483 3900P/25V/04
C482 3900P/25V/04
T1 4 4
T1 4 6
T2 3 7
T2 3 6
T2 3 0
T2 2 9
T1 3 8
T1 3 3
R553 24.9/F
Place wi thin
500 mils o f
ICH7
Low = Internal VR disable
High = Internal VR
enable(Default)
R332
332K/F/06
R298
*0
4
CLK_32KX1
2 3
Y4
4 1
CLK_32KX2
RTCRST#
SM_INTRUDER#
ICH_INTVRMEN
LAN100_SLP
LAN_JCLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
GLAN_COMP_SB
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_SDIN3
ACZ_SDOUT
SATA_LED#
SATA_T X N 0 _ C
S A TA _TX P 0_C
SATA_BIA S
25mils/15mils
R389
10M
3
U29A
AG25
RTCX1
AF24
RTCX2
AF23
RTCRST#
AD22
INTRUDER#
AF25
INTVRMEN
AD21
LAN100_SLP
B24
GLAN_CLK
D22
LAN_RSTSYNC
C21
LAN_RXD0
B21
LAN_RXD1
C22
LAN_RXD2
D21
LAN_TXD0
E20
LAN_TXD1
C20
LAN_TXD2
AH21
GLAN_DOCK#/GPIO13
D25
GLAN_COMPI
C25
GLAN_COMPO
AJ16
HDA_BIT_CLK
AJ15
HDA_SYNC
AE14
HDA_RST#
AJ17
HDA_SDIN0
AH17
HDA_SDIN1
AH15
HDA_SDIN2
AD13
HDA_SDIN3
AE13
HDA_SDOUT
AE10
HDA_DOCK_EN#/GPIO33
AG14
HDA_DOCK_RST#/GPIO34
AF10
SATALED#
AF6
SATA0RXN
AF5
SATA0RXP
AH5
SATA0TXN
AH6
SATA0TXP
AG3
SATA1RXN
AG4
SATA1RXP
AJ4
SATA1TXN
AJ3
SATA1TXP
AF2
SATA2RXN
AF1
SATA2RXP
AE4
SATA2TXN
AE3
SATA2TXP
AB7
SATA_CLKN
AC6
SATA_CLKP
AG1
SATARBIAS#
AG2
SATARBIAS
ICH8M REV 1.0
RTCLAN / G LANIHDA SATA
LPCCPU
CPUPWRGD/GPIO49
IDE
XOR Chain Ent rance Strap
HDA_SDOUT
ICH_TP3
R421
*1K/06
R353
*1K
0
1
Normal opration(Default) 0
1
3
0
0
1
1 Set PCIE port config bit 1
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
FWH4/LFRAME#
LDRQ0#
LDRQ1#/GPIO23
A20GATE
A20M#
DPRSTP#
DPSLP#
FERR#
IGNNE#
INIT#
INTR
RCIN#
SMI#
STPCLK#
THRMTRIP#
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
DCS1#
DCS3#
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
Description
RSVD
Enter XOR Chain
ICH_TP3 21
2
1
19
+3V +3V
R370
R574
10K
E5
F5
G8
F6
C4
LDRQ#0
G9
LDRQ#1
E6
GATEA20
AF13
AG26
H_DPRSTP#_R
AF26
H_DPSLP#_R
AE26
AD24
AG29
AF27
AE24
AC20
RCIN#
AH14
AD23
NMI
TP8
DA0
DA1
DA2
AG28
AA24
AE27
AA23
V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6
AA4
AA1
AB3
Y6
Y5
W4
W3
Y2
Y3
Y1
W5
H_SMI#_R
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDA0
PDA1
PDA2
LAD0 35,36
LAD1 35,36
LAD2 35,36
LAD3 35,36
LFRAME# 35,36
R564 0
R567 0
H_THERMTRIP_R
T1 2 2
T97
T91
GATEA20 36
H_A20M# 4
R297 0
PDD[15:0] 30
PDA[2:0] 30
PDCS1# 30
PDCS3# 30
PDIOR# 30
PDIOW# 30
PDDACK# 30
IRQ14 30
PDIORDY 30
PDDREQ 30
ACZ_SDOUT
ACZ_SYNC
ACZ_BCLK
ACZ_RST#
ACZ_SDOUT
ACZ_SYNC
ACZ_BCLK
ACZ_RST#
H_PWRGD 4
H_IGNNE# 4
H_INIT# 4
H_INTR 4
RCIN# 36
H_NMI 4
H_SMI# 4
H_STPCLK# 4
R312 33/04
R351 33/04
R336 33/04
R322 33/04
R316 33/04
R342 33/04
R329 33/04
R323 33/04
2
+1.05V
R341
R305
*56/F
*56/F
Should be 2" close ICH7
C467
*10P/50V/04
C463
*10P/50V/04
Size Document Number Rev
Date: Sheet
RCIN#
GATEA20
R348 0
R306 24.9/F
C447
*SFI0603-050E101NP/06
C474
*10P/50V/04
C473
*10P/50V/04
10K
+1.05V
R304
H_DPRSTP# 4,7,40
H_DPSLP# 4
ACZ_SDOUT_AUDIO 27
ACZ_SYNC_AUDIO 27
BIT_CLK_AUDIO 27
ACZ_RST#_AUDIO 27
C451
*10P/50V/04
ACZ_SDOUT_AUDIO_MDC 29
ACZ_SYNC_AUDIO_MDC 29
BIT_CLK_AUDIO_MDC 29
ACZ_RST#_AUDIO_MDC 29
C455
*10P/50V/04
56/F
H_FERR# 4
PM_THRMTRIP# 4,7
PROJECT : CW4
Quanta Computer Inc.
ICH8-M HOST (1 of 4)
1
of
19 44 Friday, November 03, 2006
1A Custom
5
PCIE_RXN0 35
PCIE_RXP0 35
MINI CARD PCI-E
EXPRESS CARD (NEW CARD)
D D
PCIE-LAN
C C
AD[0..31] 25
B B
T72
T78
T76
A A
T220
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCIE_TXN0 35
PCIE_TXP0 35
PCIE_RXN1 33
PCIE_RXP1 33
PCIE_TXN1 33
PCIE_TXP1 33
PCIE_RXN2_LAN 31
PCIE_RXP2_LAN 31
PCIE_TXN2_LAN 31
PCIE_TXP2_LAN 31
U29B
D20
AD0
E19
AD1
D19
AD2
A20
AD3
D17
AD4
A21
AD5
A19
AD6
C19
AD7
A18
AD8
B16
AD9
A12
AD10
E16
AD11
A14
AD12
G16
AD13
A15
AD14
B6
AD15
C11
AD16
A9
AD17
D11
AD18
B12
AD19
C12
AD20
D10
AD21
C7
AD22
F13
AD23
E11
AD24
E13
AD25
E12
AD26
D8
AD27
A6
AD28
E8
AD29
D6
AD30
A3
AD31
INTA#
INTB#
INTC#
INTD#
Interrupt I/F
F9
PIRQA#
B5
PIRQB#
C5
PIRQC#
A10 B3
PIRQD# PIRQH#/GPIO5
ICH8M REV 1.0
PCI
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
C625 .1U/10V/04
C624 .1U/10V/04
C623 .1U/10V/04
C622 .1U/10V/04
C619 .1U/10V/04
C618 .1U/10V/04
REQ0#
GNT0#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
T100
T101
T227
T226
T96
T95
T222
T225
T84
T83
T224
T223
T81
T217
T9 4
T9 2
T9 0
T 147
T 248
T 235
T 132
T 121
T 140
T 141
T 240
T 129
T 244
A4
D7
E18
C18
B19
F18
A11
C10
C17
E15
F16
E17
C8
D9
G6
D16
A7
B7
F10
C16
C9
A17
AG24
B10
G7
F8
G11
F12
4
PCIE_TXN0_C
PCIE_TXP0_C
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_RXN5
PCIE_RXP5
PCIE_TXN5
PCIE_TXP5
PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3
PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4
PCIE_TXN2_C
PCIE_TXP2_C
SPI_CS1#
USBOC#0
USBOC#1
USBOC#2
USBOC#3
USBOC#4
USBOC#5
USBOC#6
USBOC#7
USBOC#8
USBOC#9
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
IRDY#
DEVSEL#
PERR#
LOCK#
SERR#
ST O P #
TRDY#
FRAME#
PLT_RST-R#
PCLK_ICH
INTE#
INTF#
INTG#
INTH#
P27
P26
N29
N28
M27
M26
K27
K26
H27
H26
G29
G28
E29
E28
D27
D26
C29
C28
C23
B23
E22
D23
AJ19
AG16
AG15
AE15
AF15
AG17
AD12
AJ18
AD14
AH18
L29
L28
J29
J28
F27
F26
F21
T213
T73
U29D
ICH8M REV 1.0
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
SPI_CLK
SPI_CS0#
SPI_CS1#
SPI_MOSI
SPI_MISO
OC0#
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#
OC9#
T 214
T7 5
T 221
T8 6
T 218
T8 0
C/BE0# 25
C/BE1# 25
C/BE2# 25
C/BE3# 25
IRDY# 25
PAR 25
PCIRST# 25
DEVSEL# 25
PERR# 25
SERR# 25
ST O P # 25
TRDY# 25
FRAME# 25
PCLK_ICH 3
PCI_PME# 25
INTE# 25
INTF# 25
3
V27
DMI0RXN
V26
DMI0RXP
U29
DMI0TXN
U28
DMI0TXP
Y27
DMI1RXN
Y26
DMI1RXP
W29
DMI1TXN
W28
DMI1TXP
AB26
DMI2RXN
AB25
DMI2RXP
AA29
DMI2TXN
AA28
DMI2TXP
AD27
DMI3RXN
AD26
DMI3RXP
AC29
DMI3TXN
AC28
DMI3TXP
DMI_CLKN
DMI_CLKP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBRBIAS
T26
T25
Y23
Y24
G3
G2
H5
H4
H2
H1
J3
J2
USBP4-
K5
USBP4+
K4
K2
K1
L3
L2
M5
M4
USBP8-
M2
USBP8+
M1
N3
N2
F2
USB_RBIAS_PN
F3
25mils/15mils
Place within 500
mils of ICH8
PLT_RST-R#
TC7SH08FU
PCI-Express
DMI_ZCOMP
DMI_IRCOMP
Direct Media Interface
SPI
USB
USBRBIAS#
REQ0# 25
GNT0# 25
U18
2
1
DMI_RXN0 7
DMI_RXP0 7
DMI_TXN0 7
DMI_TXP0 7
DMI_RXN1 7
DMI_RXP1 7
DMI_TXN1 7
DMI_TXP1 7
DMI_RXN2 7
DMI_RXP2 7
DMI_TXN2 7
DMI_TXP2 7
DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7
CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3
DRI_IRCOMP_R
USBP0- 30
USBP0+ 30
USBP1- 30
USBP1+ 30
USBP2- 30
USBP2+ 30
USBP3- 33
USBP3+ 33
T 106
T9 8
USBP5- 33
USBP5+ 33
USBP6- 35
USBP6+ 35
USBP7- 33
USBP7+ 33
T 107
T 113
USBP9- 35
USBP9+ 35
+3V
3 5
15/15mils
USB Connector
USB Connector
USB Connector
Carama USB
BLUETOOTH
WWAN
NEW CARD
WLAN
R527
22.6/F
PLT_RST-R# 7
C508
0.1U/16V/06
4
Don't connect to PCI device / Express card
+1.5V
R289
24.9/F
Place within 500
mils of ICH7
PLTRST# 15,21,30,31,33,35
2
USBOC#2
USBOC#4
USBOC#6
USBOC#3
USBOC#8
USBOC#9
6
7
8
9
10
6
7
8
9
10
6
7
8
9
10
RP53
8.2KX8
RP52
8.2KX8
RP50
8.2KX8
RP51
6
7
8
9
10
10P8R-10K
R420 10K/04
R355 10K/04
3VSUS
STOP#
REQ2#
FRAME#
REQ1#
+3V
SERR#
IRDY#
PERR#
LOCK#
+3V
INTA#
+3V
1
+3V
5
REQ3#
4
INTD#
3
DEVSEL#
2
TRDY#
1
+3V
5
4
REQ0#
3
INTG#
2
INTF#
1
+3V
5
INTE#
4
INTC#
3
INTB#
2
INTH#
1
5
USBOC#1
4
USBOC#7
3
USBOC#0
2
USBOC#5
1
3VSUS
3VSUS
A16 SWAP Override strap
PCI_GNT#3
GNT3#
Low = A16 swap override enabled
High = Default
R254 *1K
ICH8 Boot BIOS select
SPI_CS#1 PCI_GNT#0
R263 *1K
R255 *1K
IDSEL
AD25
1
INTERUPT
INTE#,INTF#
1
SPI_CS1#
GNT0#
PCI ROUTING
TABLE
REQ0# / GNT0# RICOH832
Boot BIOS Location
SPI(Default) 1 0
PCI 0 1
LPC
DEVICE
20
PCLK_ICH
R256 *0
for EMI request
5
4
C400 *33P/50V
Size Document Number Rev
3
2
Date: Sheet
PROJECT : CW4
Quanta Computer Inc.
ICH8-M PCI E (2 of 4)
20 44 Friday, November 03, 2006
1
of
1A Custom
5
+3V
U32
1
5
VR_PWRGD_CK410# 40
D D
2
4 3
NL17SZ14DFT2G
VR_PWRGD_CK410
PCLK_SMB
PDAT_SMB
PCIE_WAKE#
PM_BATLOW#_R
4
R618 2.2K C670 .1U/16V/04
R427 2.2K
R302 1K
R311 8.2K
3V_S5
SMLINK0
SMLINK1
3
R418 10K
R416 10K
3V_S5
RI#
DNBSWON#
SYS_RST#-1
CL_RST#1
EC_ME_ALERT
ME_EC_ALERT
SWI#_R
R417 8.2K
R259 10K
R412 10K
R415 10K
R378 *10K
R279 *10K
R303 10K
3V_S5
2
CLKRUN#
SERIRQ
SCI#_R
KBSMI#_R
PM_RSMRST#_R
R577 8.2K
R402 8.2K
R373 10K
R580 10K
R357 10K
1
+3V
21
PCLK_SMB 3,33
PDAT_SMB 3,33
+3V
R365
R352
*10K
*10K
PM_STPPCI# 3
PM_STPCPU# 3
THERM_ALERT# 4,41
C C
MCH_ICH_SYNC# 7
B B
+3V
R292 8.2K
CCD_PWRON# 33
+3V
KBSMI# 36
WAN_OFF# 35
WLAN_OFF# 35
R344 0
R360 *10K
CL_RST#1 35
SYS_RST# 4
PM_BMBUSY# 7
R343 0
R366 0
CLKRUN# 25
PCIE_WAKE# 31,33,35
SERIRQ 25,36
KBSMI#
SCI# 36
SCI#
+3V
ACZ_SPKR 27
PCLK_SMB
PDAT_SMB
T154
T153
T134
T87
SYS_RST#
T139
T 233
T 241
T1 27
T 123
T 242
T 143
T 135
R338 10K/04
R371 10K/04
R324 10K/04
CL_RST#1
SMLINK0
SMLINK1
RI#
SUS_STAT#
R419 0/04
R422 0/04
SMB_ALERT#
PM_STPPCI_ICH#
PM_STPCPU_ICH#
CLKRUN#
PCIE_WAKE#
SERIRQ
VR_PWRGD_CK410
R583 0/04
R374 0/04
BOARD_ID2
R587 0/04
R399 0/04
R361 0/04
MCH_ICH_SYNC#_R
ICH_TP3 19
R442 0/04
R243 0/04
SYS_RST#-1
KBSMI#_R
SCI#_R
SWI#_R
1 2
1 2
1 2
No Reboot strap
HDA_SPKR
ACZ_SPKR
Low = Default
High = No
Reboot
R319 *10K
+3V
U29C
AJ26
SMBCLK
AD19
SMBDATA
AG21
LINKALERT#
AC17
SMLINK0
AE19
SMLINK1
AF17
RI#
F4
SUS_STAT#/LPCPD#
AD15
SYS_RESET#
AG12
BMBUSY#/GPIO0
AG22
SMBALERT#/GPIO11
AE20
STP_PCI#/GPIO15
AG18
STP_CPU#/GPIO25
AH11
CLKRUN#/GPIO32
AE17
WAKE#
AF12
SERIRQ
AC13
THRM#
AJ20
VRMPWRGD
AJ22
TP7
AJ8
TACH1/GPIO1
AJ9
TACH2/GPIO6
AH9
TACH3/GPIO7
AE16
GPIO8
AC19
GPIO12
AG8
TACH0/GPIO17
AH12
GPIO18
AE11
GPIO20
AG10
SCLOCK/GPIO22
AH25
QRT_STATE0/GPIO27
AD16
QRT_STATE1/GPIO28
AG13
SATACLKREQ#/GPIO35
AF9
SLOAD/GPIO38
AJ11
SDATAOUT0/GPIO39
AD10
SDATAOUT1/GPIO48
AD9
SPKR
AJ13
MCH_SYNC#
AJ21
TP3
ICH8M REV 1.0
CRB STUFF
2K%1
+3V
DELAY_VR_PWRGOOD 7,40
ECPWROK 7,16,36
R432 100K
SYS
R414 2K/F/04
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA
GPIO
SATA3GP/GPIO37
SMB
Clocks
GPIO
Power MGT Controller Link
GPIO
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14
MISC
2
1
CLK14
CLK48
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
S4_STATE#/GPIO26
PWROK
DPRSLPVR/GPIO16
BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
CK_PWRGD
CLPWROK
SLP_M#
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
CL_VREF0
CL_VREF1
CL_RST#
MEM_LED/GPIO24
WOL_EN/GPIO9
3VSUS
C505 .047U/10V/04
U17
TC7SH08FU
3 5
4
AJ12
AJ10
AF11
AG11
AG9
G5
D3
AG23
AF21
AD18
AH27
AE23
AJ14
AE21
C2
AH20
AG27
E1
E3
SUSM#
AJ25
F23
AE18
F22
AF19
D24
AH23
AJ23
AJ27
ME_EC_ALERT_ L
AJ24
EC_ME_ALERT_ L
AF22
AG19
R430
10K
BOARD_ID1
BOARD_ID0
BOARD_ID3
BOARD_ID4
14M_ICH
CLKUSB_48
T79
T128
T 234
ICH_PWROK
DPRSLPVR-ICH
PM_BAT L O W # _ R
DNBSWON#
PLTRST_LAN#
R524 0/04
R522 0/04
T 246
CL_VREF0_SB
CL_VREF1_SB
T1 45
ICH_PWROK
R413 100/F
R367 100/F
R368 100/F
R307 *100/F
C502 *.1U/16V/04
R434 0/04
R354 100/F
R585 0/04
R282 *0/04
R377 *0/04
14M_ICH 3
CLKUSB_48 3
R359 *0/04
R369 100K/04
DPRSLPVR
RSMRST# PM_RSMRST#_R
CK_PWG 3
ECPWROK 7,16,36
CL_CLK0 7
ICH_CL_CLK1 35
CL_DATA0 7
ICH_CL_DATA1 35
CL_RST#0 7
BT_ON# 33
ME_EC_ALER T 3 6
EC_ME_ALER T 3 6
SUSB# 36
SUSC# 36
PM _EX T T S # 1 7
DPRSLPVR 7,40
DNBSWON# 3 6
LAN_REST# 36
PLTR S T # 15,20,30,31,33,35
RSMRST# 36
R375
453/F/04
Controller Link 1
VREF for IAMT
support only
LAN_RST pin : 1.if used pci
LAN please tie to PLTRST#
2.if used PHY LAN please tie
to RSMRST#
3V_S 5
R394
3.24K/F/06
C480
.1U/10V/04
+3V
R249
3.24K/F/06
R250
R252
.1U/10V/04
453/F/04
Controller Link 0
VREF for IAMT
support only
+3V +3V +3V
R581
*10K
A A
R582
10K
R578
*10K
R579
10K
R565
*10K
R558
10K
+3V +3V
R400
*8.2K
R401
10K
R403
R404
10K
*8.2K
Board ID
BOARD_ID4 BOARD_ID3 BOARD_ID0 BOARD_ID2 BOARD_ID1
965GM 965PM+
ID0
965PM+
10/100
1G
(0:0) (0:1) (1:0) (1:1)
R658
Stuff
R658
Stuff
R655
Stuff
Reserve
R655
Stuff
PROJECT : CW4
R668
ID1
Stuff
5
4
R669
Stuff
R668
Stuff
3
R669
Stuff
Size Document Number Rev
2
Date: Sheet
Quanta Computer Inc.
ICH8-M GPIO (3 of 4)
21 44 Friday, November 03, 2006
1
of
1A Custom
5
U29E
A23
VSS[001]
A5
VSS[002]
AA2
VSS[003]
AA7
VSS[004]
A25
VSS[005]
AB1
D D
C C
B B
A A
AB24
AC11
AC14
AC25
AC26
AC27
AD17
AD20
AD28
AD29
AE12
AE22
AE25
AF14
AF16
AF18
AH10
AH13
AH16
AH19
AF28
AH22
AH24
AH26
AD3
AD4
AD6
AE1
AE2
AD1
AE5
AE6
AE9
AF3
AF4
AG5
AG6
AH2
AH3
AH4
AH8
AJ5
B11
B14
B17
B2
B20
B22
B8
C24
C26
C27
C6
D12
D15
D18
D2
D4
E21
E24
E4
E9
F15
E23
F28
F29
F7
G1
E2
G10
G13
G19
G23
G25
G26
G27
H25
H28
H29
H3
H6
J1
J25
J26
J27
J4
J5
K23
K28
K29
K3
K6
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
ICH8M REV 1.0
VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
5V_S5
R267 10/06
+1.5V
+1.5V
R592 0/08
+3V
+1.5V
+1.5V_PCIE
4
3V_S5 +3V
2 1
D7
PDZ5.6B
+5V
+1.5V_PCIE
R593 1/08
+1.5V_USB
L61 1UH
C419
4.7U/10V/06
R288 100/06
+
C403
220U
+1.5V_APLL_RR
C409
.1U/10V/04
C612
10U
C407
.1U/10V/04
L38
BLM21PG220SN1D/08
+1.5V_SATA +1.5V_APLL
R525 0/06
R264 0/06
R520 1/08
C428
22U/6.3V/08
VCCRTC
2 1
D8
PDZ5.6B
C399
.1U/10V/04
C432
22U/6.3V/08
L67 10UH/08
C442
1U/16V/06
C408
1U/16V/06
C620
.1U/10V/04
C621
.1U/10V/04
C611
2.2U/06
+3V
3
C454
C457
.1U/10V/04
1U
+5VREF_SB
+5VREF_SUS_SB
C424
2.2U/06
C678
C684
10U/06
1U/16V/06
+1.5V_S A T A
TP_VCCLAN1_05_ICH_1
TP_VCCLAN1_05_ICH_2
+3V_VCCLAN
+1.5V_VCCGLANPLL
R251 0/06
+3V_GLAN
C453
.1U/10V/04
AD25
AA25
AA26
AA27
AB27
AB28
AB29
AC10
A16
T7
G4
D28
D29
E25
E26
E27
F24
F25
G24
H23
H24
J23
J24
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T23
T24
T27
T28
T29
U24
U25
V23
V24
V25
W25
Y25
AJ6
AE7
AF7
AG7
AH7
AJ7
AC1
AC2
AC3
AC4
AC5
AC9
AA5
AA6
G12
G17
H7
AC7
AD7
D1
F1
L6
L7
M6
M7
W23
F17
G18
F19
G20
A24
A26
A27
B26
B27
B28
B25
U29F
VCCRTC
V5REF[1]
V5REF[2]
V5REF_SUS
VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCCSATAPLL
VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
VCC1_5_A[09]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]
VCC1_5_A[17]
VCC1_5_A[18]
VCC1_5_A[19]
VCCUSBPLL
VCC1_5_A[20]
VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]
VCCLAN1_05[1]
VCCLAN1_05[2]
VCCLAN3_3[1]
VCCLAN3_3[2]
VCCGLANPLL
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN1_5[5]
VCCGLAN3_3
ICH8M REV 1.0
VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
CORE
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCC1_05[27]
VCC1_05[28]
VCCA3GP ATX ARX
V_CPU_IO[1]
V_CPU_IO[2]
VCCP_CORE VCCPSUS VCCPUSB
IDE
PCI
VCCSUSHDA
VCCSUS1_05[1]
VCCSUS1_05[2]
VCCSUS1_5[1]
VCCSUS1_5[2]
VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]
VCCSUS3_3[05]
USB CORE
VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
GLAN POWER
VCCCL3_3[1]
VCCCL3_3[2]
VCCDMIPLL
VCC_DMI[1]
VCC_DMI[2]
VCC3_3[01]
VCC3_3[02]
VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]
VCC3_3[07]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
VCC3_3[15]
VCC3_3[16]
VCC3_3[17]
VCC3_3[18]
VCC3_3[19]
VCC3_3[20]
VCC3_3[21]
VCC3_3[22]
VCC3_3[23]
VCC3_3[24]
VCCHDA
VCCCL1_05
VCCCL1_5
2
A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
R29
AE28
AE29
AC23
AC24
AF29
AD2
AC8
AD8
AE8
AF8
AA3
U7
V7
W1
W6
W7
Y7
A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11
AC12
AD11
J6
AF20
AC16
J7
C3
AC18
AC21
AC22
AG20
AH28
P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6
TP_VCCCL1_05_ICH
G22
VCCCL1_5_INT_ICH
A22
+V3.3M_ICH
F20
G21
+1.05V_SB
C406
.047U/10V/04
+1.05V_V_CPU_IO
+V3.3_DMI_ICH
+V3.3_SATA_ICH
+V3.3S_VCCPCORE_ICH
+V3.3S_IDE_ICH
C642
.1U/10V/04
+V3.3S_PCI_ICH
C401
.1U/10V
+3V_1.5V_HDA_IO_ICH
+VCCSUSHDA
TP_VCCSUS1_05_ICH_1
TP_VCCSUS1_05_ICH_2
TP_VCCSUS1_5_ICH_1
TP_VCCSUS1_5_ICH_2
+V3.3A_ICH
+V3.3A_USB_ICH
R521 0/12
C418
.022U/04
VCCDMIPLL_ICH
+1.25V_DMI
C650
22U/6.3V/08
C405
.1U/10V
C465
.1U/10V
C638
4.7U/10V/06
C613
1U/16V/06
R265 0/06
R546 0/08
C402
.1U/10V
C450
0.1U/16V/06
R310 0/06
C468
.022U
R536 0/08
C398
*.1U/04
+1.05V
C631
C630
10U
.1U/04
C449
.1U/10V
C461
C649
.1U/10V
.1U/10V/04
R296 0/06
Can be connect t o
+3V_S5 or
+1.5V_S5
TP_VCCLAN1_05_ICH_1
TP_VCCLAN1_05_ICH_2
TP_VCCSUS1_05_ICH_1
TP_VCCSUS1_05_ICH_2
TP_VCCSUS1_5_ICH_1
TP_VCCSUS1_5_ICH_2
TP_VCCCL1_05_ICH
+3V
L37 1UH
+1.25V
C458
.1U/10V/04
R557 0/06
R550 0/06
R314 0/06
R542 0/06
R261 0/06
3V_S5
3V_S5
1
R280 1/08
R308 0/06
C452
4.7U/10V/06
R309 0/06
C448
Can be connect t o
.1U/10V
+3V or +1.5 V
C420 0.1U/16V/06
C410 0.1U/16V/06
C417 0.1U/16V/06
C491 0.1U/16V/06
T104
T125
T99
22
+1.5V
+1.05V
+3 V
+3V
PROJECT : CW4
Size Document Number Rev
5
4
3
2
Date: Sheet
Quanta Computer Inc.
ICH8-M GPIO (3 of 4)
1
22 44 Friday, November 03, 2006
of
1A Custom
5
4
3
2
1
C24
*0.1U
CRTVDD_5V
T159
CRT PORT
D D
C C
B B
CRT_R 7,16
CRT_G 7,16
CRT_B 7,16
R18
150/F
+2.5V
DDCCLK 7
C23 0.1U
VSYNC_COM 7,16
HSYNC_COM 7,16
R16
R17
150/F
150/F
R468 *2.2K
+5V
Q36
1
*CH2507SPT
CRTVDD_5V
AHCT1G125DCH
1
5
2 4
1
5
2 4
2 1
D2 CH500H-40PT
+2.5V
2
U20
U21
CRTVDD1
C39
C35
5.6P
5.6P
3
DDCCLK2
DDCCLK2 16
CRTVS_VGA
CRTHS_VGA
F1
POLY_SWITCH_1.1A
L4 BLM18BA470SN1
L3 BLM18BA470SN1
L2 BLM18BA470SN1
C31
5.6P
CRTVDD2
1 2
R464
2.2K
L1
BLM18PG121SN
CRT_R_1
CRT_G_1
CRT_B_1
C30
5.6P
CRTVDD_5V
L50 HB-1T1608-121JT
L51 HB-1T1608-121JT
L52 HB-1T1608-121JT
C34
5.6P
C38
5.6P
6
7
2
8
3
9
4
10
5
CRT_GND
16 17
CRT_GND
DDCCLK_1
CRT_VS_1
CRT_HS_1
23
CN11
11 1
12
13
14
15
CRT_CONN
R7 0
R37 0
CRT_GND
AHCT1G125DCH
+2.5V
+2.5V
DDCDATA 7
A A
R473 *2.2K
Q37
1
2
3
*CH2507SPT
DDCDAT2 16
DDCDAT2
R474
2.2K
L53 HB-1T1608-121JT
CRTVDD_5V
C523
*33P
C530
*33P
DDCDAT_1
C531
*33P
C535
*33P
PROJECT : CW4
Quanta Computer Inc.
Size Document Number Rev
CRT CON
of
5
4
3
Date: Sheet
2
23 44 Friday, November 03, 2006
1
1A Custom
5
3VPCU +3V
R85
+15 V
1 2
3
1
10K
C130
1U
LCDONG
LCDON#
D D
C C
B B
A A
LID551# 34,36
LCD_BLON 7,16
DISP_ON 7,16
LCD_BLON
Q3
PDTC144EU
2
R99
2.2K
LID551#
C143
0.1U
5VSUS
R107
100K/06
R63 2.2K
R62
2.2K
1 2
1 3
R100
330K/06
2
Q2
2N7002E/CH2507SPT
2
C149
.022U/16V/04
2 1
4
D3
CH500H-40PT
3
Q4
AO 3404
1
3
R86
*4.7K
2 1
2
DISPON
C189
.1U/10V/04
1 2
R109
22/08
3
Q5
2N7002E/CH2507SPT
1
C157
10U/6.3V
R76 0
R89 *0
R90
2.2K
BRIGHT_PWM 36
LCD_CTL 7,16
+3V
LCD3V
+3V
2
1
3 5
4
U1
TC7SH08FU
VADJ_PWM
Q8
2
CN5
41
42
LCD_CON40P
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
3
1
9
8
7
6
5
4
3
2
1
2
LED_PWM
2N7002E/CH2507SPT
+3V
R113
2.2K
LED_P W M
R114
2.2K
VADJ_PWM
R116 0
C183 10U/6.3V
LCD3V
C151 0.1U
+3V
EDIDDATA 7,16
EDIDCLK 7,16
+3V
T X L C L K O U T + 7,16
T X L C L K O U T - 7,16
T X L O U T 2 + 7,16
T X L O U T 2 - 7,16
T X L O U T 1 + 7,16
T X L O U T 1 - 7,16
T X L O U T 0 + 7,16
T X L O U T 0 - 7,16
1
C184
4.7U
C181
1000P
PROJECT : CW4
24
VIN
Quanta Computer Inc .
S i z e Document Number Rev
5
4
3
2
Date: Sheet
LCD & LID CON
1
of
24 44Friday, November 03, 2006
1ACustom
5
4
3
2
1
Serial EEPROM
3VSUS
C655 *.01U/16V
R572
10K
* NOT Use EEPROM :
R199 : installed ( 57pin pu ll h i )
R207,U15,C198 : NOT installed
* Use EEPROM :
R207,U15,C198 : installed
R199 : NOT installed ( 57 pin pu ll low )
4 3
1
4 3
1
2
2
SD_CDZ
MS_CDZ
R568
10K
1
U31
8
VCC
7
NC
6
SCL
*24C02
L1394_TP A 0 +
L1394_TPA0 -
L1394_TP B 0 + TP B 0 P
L1394_TPB0 -
3VSUS
2
1
A0
2
A1
3
A3
4 5
GND SDA
5 6 7
8
5 6 7
4
3
2
1
1
CN24
1394_CONN
PCI_PME# 20
8
4
3
2
1
============================= GND
----------------------------- TPA0P
----------------------------- TPA0N
============================= GND
----------------------------- TPB0P
----------------------------- TPB0N
============================= GND
SD_CDZ 26
MS_CDZ 26
3
Q39
2N7002E/CH2507SPT
PROJECT : CW4
Size Document Number Rev
Date: Sheet
Quanta Computer Inc.
RICOH832 Controller
25 44 Friday, November 03, 2006
1
25
1A Custom
of
MSEN
XDEN
UDIO5
UDIO3
UDIO4
UDIO2
UDIO1
INTA#
INTB#
TEST
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
FIL0
REXT
VREF
RSV
XI
XO
3VSUS
10
20
27
32
41
128
61
VCC_ROUT_832
120
114
64
34
16
67
86
69
RH832_58P
58
RH832_55P
55
RH832_57P
57
65
59
56
60
L_INTE#
115
L_INTF#
116
RH832_T
66
4
13
22
28
54
62
63
68
118
122
99
102
103
107
111
98
106
110
112
113
108
109
104
105
1394_XIN
94
1394_XOUT
95
96
101
100
97
HWSPND#
C628 .01U/16V
C626 .01U/16V
C632 10U/6.3V
C656 .01U/16V
C627 .1U/10V
C639 .01U/16V
C629 .01U/16V
C658 0.47U/10V
C633 .47U/10V
3VSUS
C635 .01U/16V
3VSUS
C651 10U/6.3V
R571 10K
R547 10K
R540 10K
R544 100K
R543 *100K
SCL
SDA
UDIO2_RH832
UDIO1_RH832
R537 0
R535 0
R561 100K
(80 mils)
1394_AVDD
C641 .01U/16V
C643 .01U/16V
C647 .1U/10V
C657 10U/6.3V
TPBIAS0
R532
56.2/F
R539 56.2/F
R538 56.2/F
Y5 24.576MHZ
VREF_PWR
REXT
FIL0_PWR
3VSUS
3VSUS
T 131
T 137
INTE# 20 C/BE2# 20
INTF# 20 C/BE1# 20
L65
10nH
3
TPA0N
TPA0P
RH832_TPB
TPB0N
TPB0P
R570 0_4
3VSUS
C653 270P/50V
R552 5.11K/F
PCICGRST# 36
C646 .33U/16V
C645 .01U/16V
R534
56.2/F
C487 22P
C488 27P
C659 .01U/16V
R551 10K/F
C652 .01U/16V
AS CLOSE AS POSSIBLE TO R5C832
ADD GND shield
When HWSPND# is controlled by
system, the pull - u p r esistor(R2)
dose not need to apply.
3VSUS
R569
*100K_4@NC
GBRST#
C654
*1U/10V/X5R_6@NC
AS CLOSE AS POSSIBLE TO R5C832
3VSUS
R573
10K
SCL
SDA
TP A 0 P
R606 0
L69 *WCM2012-110
TPA0N
R604 0
R602 0
L68 *WCM2012-110
TPB0N
R597 0
AS CLOSE AS
POSSIBLE TO 1394
CONNECTOR.
PCI_PME1#
2
AD[0..31] 20
D D
C C
B B
A A
XD_CD 26
PCI_CLK_5C832
R531
*22
PCI_CLK_5C832_D
C634
*22P/50V
FRAME# 20
DEVSEL# 20
SERIRQ 21,36
PCIRST# 20
PCI_CLK_5C832 3
CLKRUN# 21
CoreLogic CLOCKRUN#
When CLKRUN# is controlled by
system, the pull-down
resistor(R14) dose not need to
apply.
D19 CH500H-40PT
D20 CH500H-40PT
MC_PWR_CTRL_0 26
5
PAR 20
C/BE3# 20
C/BE0# 20
REQ0# 20
GNT0# 20
IRDY# 20
TRDY# 20
STOP # 20
PERR# 20
SERR# 20
MDIO17 26
MDIO16 26
MDIO15 26
MDIO14 26
MDIO13 26
MDIO12 26
MDIO11 26
MDIO10 26
MDIO05 26
MDIO08 26
MDIO19 26
MDIO18 26
MDIO02 26
MDIO03 26
2 1
2 1
MDIO09 26
T152
AD25
R528 100
R533 *100K
MDIO17
MDIO16
MDIO15
MDIO14
MDIO13
MDIO12
MDIO11
MDIO10
MDIO05
MDIO08
MDIO19
MDIO18
MDIO02
MDIO03
MDIO09
MC_PWR_CTRL_0
CARD_LED
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
PAR
C/BE3#
C/BE2#
C/BE1#
C/BE0#
RC832_ID
REQ0#
GNT0#
FRAME#
IRDY#
TRDY#
DEVSEL#
ST O P #
PERR#
SERR#
SERIRQ
GBRST#
PCIRST#
PCI_CLK_5C832
PCI_PME1#
CLKRUN#
SD_CDZ
MS_CDZ
125
126
127
1
2
3
5
6
9
11
12
14
15
17
18
19
36
37
38
39
40
42
43
44
46
47
48
49
50
51
52
53
33
7
21
35
45
8
124
123
23
24
25
26
29
30
31
72
71
119
121
70
117
87
92
89
91
90
93
81
82
75
88
83
85
78
77
80
79
84
76
74
73
U13B
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
PAR
C/BE3#
C/BE2#
C/BE1#
C/BE0#
IDSEL
REQ#
GNT#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
UDIO0/SRIRQ#
GBRST#
PCIRST#
PCICLK
PME#
CLKRUN#
R5C832T_V00
U13A
MDIO17
MDIO16
MDIO15
MDIO14
MDIO13
MDIO12
MDIO11
MDIO10
MDIO05
MDIO08
MDIO19
MDIO18
MDIO02
MDIO03
MDIO00
MDIO01
MDIO09
MDIO04
MDIO06
MDIO07
R5C832T_V00
VCC_PCI1
VCC_PCI2
VCC_PCI3
VCC_PCI4
VCC_PCI5
VCC_PCI6
VCC_RIN
VCC_ROUT5
VCC_ROUT4
VCC_ROUT3
VCC_ROUT2
VCC_ROUT1
VCC_3V
VCC_MD
HWSPND#
PC I / O THER
GND10
AGND1
AGND2
AGND3
AGND4
AGND5
AVCC_PHY1
AVCC_PHY2
AVCC_PHY3
AVCC_PHY4
TPBIAS0
TPAN0
TPAP0
TPBN0
TPBP0
IEEE1394/MEM CARD
4
5
4
3
2
1
VCC_XD
3
2
3VSUS
C434
.1U/10V
SD_WP#_XD_R/B#
XD-D7
XD-D6
XD-D5
XD-D4
MS_DATA3_SD_DAT3
MS_DATA2_SD_DAT2
MS_DATA1_SD_DAT1
MS_DATA0_SD_DAT0
MS_BS_SD_CMD_XD_WE#
XD-WP#
XD-ALE
XD-CLE
XD-CE#
SD_CLK_MS_CLK_XD-RE#
C435
.1U/10V
1
Q22
AO3408L
2
R262 10K
Q21
PDTC144EU
C433
.1U/10V
5VSUS
VCC_XD
MS_CDZ 25
R281 *10K
C664
270P/50V/06
SD_WP#_XD_R/B#
SD_CLK_MS_CLK_XD-RE#
XD-CE#
XD-CLE
XD-ALE
MS_BS_SD_CMD_XD_WE#
XD-WP#
MS_DATA0_SD_DAT0
MS_DATA1_SD_DAT1
MS_DATA2_SD_DAT2
MS_DATA3_SD_DAT3
MS_BS_SD_CMD_XD_WE#
SD_CLK_MS_CLK_XD-RE#
MS_DATA3_SD_DAT3
MS_DATA2_SD_DAT2
MS_DATA0_SD_DAT0
4 IN1 CARD-READER (PUSH-PUSH)
Support MMC/SD/MS/xD Cards
CN8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
R013-C10-LR
XD-R/B
XD-RE
XD-CE
XD-CLE
XD-ALE
XD-WE
XD-WP
XD-D0
XD-D1
SD-DAT2
SD-DAT3
SD-CMD
4IN1-GND1
MS-VCC
MS-SCLK
MS-DATA3
MS-INS
MS-DATA2
MS-DATA0
SHIELD1-GND
SHIELD2-GND
MS-DATA1
MS-BS
4IN1-GND2
SD-VCC
SD-CLK
SD-DAT0
XD-D2
XD-D3
XD-D4
SD-DAT1
XD-D5
XD-D6
XD-D7
XD-VCC
XD-CD-SW
SD-WP-SW
SD-CD-SW
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
MS_DATA1_SD_DAT1
MS_BS_SD_CMD_XD_WE#
SD_CLK_MS_CLK_XD-RE#
MS_DATA0_SD_DAT0
MS_DATA2_SD_DAT2
MS_DATA3_SD_DAT3
XD-D4
MS_DATA1_SD_DAT1
XD-D5
XD-D6
XD-D7
SD_WP#_XD_R/B#
C663
270P/50V/06
VCC_XD
VCC_XD VCC_XD
26
XD_CD 25
SD_CDZ 25
MDIO03 25
MDIO17 25
MDIO16 25
MDIO15 25
MDIO14 25
MDIO13 25
MDIO12 25
D D
MDIO11 25
MDIO10 25
MDIO08 25
MDIO05 25
MDIO19 25
MDIO18 25
MDIO02 25
MDIO09 25
C C
MC_PWR_CTRL_0 25
MDIO03
MDIO17
MDIO16
MDIO15
MDIO14
MDIO13
MDIO12
MDIO11
MDIO10
MDIO08
MDIO05
MDIO19
MDIO18
MDIO02
MDIO09
R293 56
R301 56
R315 56
R320 56
R339 56
R350 56
R362 56
R330 56
R363 56
R392 56
R275 56
R407 56
R409 56
R423 56
R376 56
VCC_XD
C431
R284
2.2U/6.3V
150K
3VSUS VCC_XD
MC_PWR_CTRL_0 XD_PWON
1 3
B B
G-SENSOR
GSENSOR_ON# 36
GSENSOR_TST# 36 GSENSOR_X 36
A A
5
+3 V
Q26
DTA114EE
1 3
2
G_SENSOR Asm/NoAsm TABLE
Ra
Rb
NO_ASM
ASM
ASM
Ra
R439
*100K_4
Rb
R410
100K_4
No Accel. ADXL322
ASM
ASM
NO_ASM all others
R433 10_6
4
GS_VDD
14
VS
COMNCCOM
34567
R391
0_6
COM
15
VS
COM
C504 10U/10V /Y 5V _8
XOUT
YOUT
NC
ADXL322
U16
2
ST
1
NC
9
NC
11
NC
13
NC
16 17
NC PAD
C500 0.1U/10V /X 7R_4
GS_GND
12
10
8
GS_GND
C496 0.1U/10V/X7R_4
Width = 6mils
R428 56K_4
R408 56K_4
C497 0.1U/10V/X7R_4
3
Spacing = 10 mils
C489 0.1U/10V/X7R_4
C499 0.1U/10V/X7R_4
GSENSOR_Y 36
PROJECT : CW4
Size Document Number Rev
2
Date: Sheet
Quanta Computer Inc.
CARD-READER & G-SENSOR
of
26 44 Friday, November 03, 2006
1
1A Custom
A
+3V
L70
1 2
0/08
C691
*10U/6.3V/08
HP-L 28
HP-R 28
1 1
AUD_AMP_M U TE# 28
AGND
Q4 2
*CH2507SP T
3
2
1
AGND
C668
1U/04
LINEOUT_L 28
LINEOUT_R 28
AVDD
R609 20K/F/06
AGND
SPDIF 28
3V_DVDD
C675
.1U/16V/04
3V_DVDD
37
38
39
40
41
42
43
44
45
46
47
48
T250
35
36
U34
MONO
AVDD2
HP-OUT-L
JDREF
HP-OUT-R
AVSS2
NC
NC
NC
DMIC-CLK
EAPD
SPDIFO
LINE-OUT-L
LINE-OUT-R
DVDD
G P IO 0-DM IC-12
1 2 3 4 5 6 7 8 9 10 11
FOR EMI SOLUTION
R549 0
R556 *0
R328 *0
C716 *0.01U
C640 *0.01U
AGND
A
34
T249
Sense B
G P IO 3/DM IC-34
32
33
NC
ALC268
DVSS
B
30
31
GPIO1
MIC1-VREFO-R
SDATA-OUT
BIT-CLK
B
2 1
2 1
29
MIC2-VREFO
LINE1-VREFO
DVSS-I/O
SDATA-IN
28
MIC1-VREFO-L
DVDD-I/O
SDI
D18 CH500H-40PT
D17 CH500H-40PT
25
26
27
VREF
AVSS1
AVDD1
LINE1-R
LINE1-L
MIC1-R
MIC1-L
CD-GND
MIC2-R
MIC2-L
Sense A
SYNC
RESET#
PCBEEP
12
C679 1U/04
R595 22/0 4
MIC1-VREFO-R
MIC2-VREFO-R
MIC2-VREFO-L
MIC1-VREFO-L
AVDD
CD-R
CD-L
NC
NC
AGND
DOCK_MIC_RL
24
DOCK_MIC_LL
23
22
21
20
19
18
17
16
15
14
13
External MIC L
INT MIC R
INT MIC L
Externa MIC R
C672
10U/10V/08
AGND
C665 2.2U/6.3V/06
MIC1_R
MIC1_ L
C660 2.2U/6.3V/06
MIC2_R
MIC2_ L
SENSE A
PC_BE E P
ACZ_RST#_AUDIO 1 9
ACZ_SYNC_AUDIO 1 9
ACZ_SDIN0 1 9
BIT_CLK_AUDIO 1 9
ACZ_SDOUT_AUDIO 1 9
T247
T239
1 2
1 2
T23 8
T23 2
T23 1
C662 1U/04
C661 1U/04
R566 *10K/F/04
R560 20K/F/04
R559 39.2K/F/04
C
D
E
27
AVDD +5V
C693
.1U/10V/04
C688
10U/10V/08
AGND
AGND
C697
.1U/10V/04
C692
1U/04
U36
5
Vout
4
BYP
2 3
GND EN
TPS793475
AGND
1
Vin
C706
C708
.1U/10V/04
.047U/10V/04
MAINON
Vset=1.242V
MIC1-VREFO-R
MIC1-VREFO-L
MIC2-VREFO-R
MIC2-VREFO-L
DOCK_MIC_Sense#
C
T24 5
SENSE_MIC 2 8
SENSE_LINEOUT # 2 8
PC BEEP
ACZ_SPKR 21
D
L72 0/08
1 2
C705
.1U/10V/04
R601
*10K
C715
PC_BE E P
10U/10V/08
EXT_MIC_R 28
EXT_M IC _L 2 8
INT_MIC_R 3 3
INT_MIC_L 3 3
C707
1U/04
MAINON 36,37,39,41,42,43,44
R563 2.2K/04
R562 2.2K/04
R555 2.2K/04
R554 2.2K/04
R603 1 0 K
PROJECT : CW 4
S i z e Document Number Rev
Date: Sheet
Quanta Computer In c.
AZALIA ALC2 6 8
E
of
27 44Friday, November 03, 2006
1ACustom
1
2
3
4
5
6
7
8
INTERNAL SPEAKER AMPLIFIER
+5V
1 2
1 2
1 2
28
+5V
AMP_VDD_LDO
C703 1U/16V/X5R_8
C709 1U/16V/X5R_8
C682 4.7U/25V/X6S_8
C681 4.7U/25V/X6S_8
+5V_SPK_AMP
R610
10K
D21
CH500H-40PT
AUD_AMP_MUTE#
2 1
GAIN2
0 0 6dB
0 1 10dB
HP-L 27
HP-R 27
LINEOUT_L
LINEOUT_R
VOLMUTE#
R627
10K_4
AUD_AMP_GAIN1
R624
*10K_4
LINEOUT_L 27
LINEOUT_R 27
A A
VOLMUTE# 36
+5V_SPK_A M P
B B
R623
10K_4
R622
*10K_4
LIN_C2
RIN_C2
C673 *47P/50V/NPO_4
AGND
AUD_AMP_MUTE# 27
GAIN GAIN1
C713 *47P/50V/NPO_4
C674 *47P/50V/NPO_4
C710 *47P/50V/NPO_4
AGND
Q38
1 0 15.6dB
AGND
1 1 21.6dB
R625 0/06
R626 0/06
AGND
+5V_SPK_AMP
C677 10U/10V/X5R_8
AGND
R596
10K
3
2
2N7002E/CH2507SPT
1
AGND
R591 4.7K_6
R594 4.7K_6
C683
SPKR_HP_SW
AUD_AMP_MUTE#
AGND
SPKR_HP_SW
SENSE_LINE#
HP_IN_R2 HP_IN_R1
+5V_SPK _ A M P
1U/10V/X5R_6
C696 1U/10V/X5R_6
LIN_C1
RIN_C1
HP_IN_L1 HP_IN_L2
R599 0_4
R598 0_4
AUD_AMP_GAIN1
AUD_AMP_GAIN2
C690 1U/16V/X5R_8
AGND
C687
1U/16V/X5R_8
AGND
U35
3
SPKR_INL
2
SPKR_INR
27
HP_INL
26
HP_INR
24
BIAS
23
SPKR_EN
22
HP_EN
25
MUTE
31
GAIN1
32
GAIN2
17
HPVDD
9
CPVDD
10
C1P
12
C1N
11
CPGND
14
PVSS
13
CPVSS
AUD_SPK_R1
AUD_SPK_R2
AUD_SPK_L1 AUD_AMP_GAIN2
AUD_SPK_L2
*100P/50V/NPO_4
MAX9789A
TQFN
32PIN
C388
*100P/50V/NPO_4
AGND
OUTL+
OUTR+
OUTR-
REGEN
PVDD_8
PVDD_18
GND_28
PGND_5
PGND_21
GND_PAD
MAX9789A
AGND
OUTL-
HPL
HPR
SET
VOUT
VDD
C387
AUD_SPK_L1
6
AUD_SPK_L2
7
AUD_SPK_R1
20
AUD_SPK_R2
19
AMP_HPOUT_L
16
AMP_HPOUT_R
15
R614
4
1
29
30
8
18
28
5
21
33
AGND
C386
*100P/50V/NPO_4
AGND
0_4
+VDD
C6851U/ 1 0V/X5R_6
AGND
AVDD
C68910U/ 1 0V/X5R_8
C385
*100P/50V/NPO_4
AGND
AMP_VDD_LDO
+5V_SPK_AMP
C6991 U/10V/X5R_6
AGND
CN17
6
3 4 5
2
1
R-L-SPEAKERS
C6981 U/10V/X5R_6
C711
1U/10V/X5R_6
+5V_SPK_AMP
C69 51U/ 10V/ X 5R_6
+VDD
AGND
C712
1U/10V/X5R_6
C71 410U/ 10V/ X 5R_8
L74
BLM18AG601SN1D
C704
0.1U/10V/X7R_4
AGND
L73
BLM21PG600SN1D
L71
*BLM21PG600SN1D
+5V
R406
2 4
0
AGND
2
C494
470P
C644
0.1U
6
3
Q24
2N7002E/CH2507SPT
1
C470 0.1U
SPDIF_VCC
AGND
SENSE_LINE#
AGND
SPKR2
SPKL2
C495
470P
HEADPHONE/ SPDIF OUT
CN23
8
IC
9
Drive
10
6
1
4
3
2
7
2SJ-A001-002
LED
5
AGND
New type Phone jack low active
PROJECT : CW4
Size Document Number Rev
Date: Sheet
Quanta Computer Inc.
AMP_MAX9789A & JACK
7
of
28 44 Friday, November 03, 2006
8
1A Custom
MIC-IN JACK
CN26
AGND
1
2
6
3
4
5
LINEINL
LINEINR
SENSE_MIC 27
C510
*10P
AGND
L47
LZA10-2ACB104MT
L46
LZA10-2ACB104MT
C501
*10P
2
C C
D D
EXT_MI C _ L 27
EXT_MIC_R 27
1
2SJ-S351-001
3
9
7
8
10
SPDIF 27
SENSE_LINEOUT# 27
HP-L
HP-L 27
HP-R
HP-R 27
4
VIN
SPDIF SPDIF_C
AMP_HPOUT_R SPKR1
C509 *100U/6.3V
+
C511 *100U/6.3V
+
SENSE_LINEOUT# 27
R390 1 M
SENSE_LINE#
R444 0_4
R438 0_4
R440
R443
5
Q25
PDTC144EU
2
1 3
AGND
R388 33
R405 *0
L45 SBK160808T-121Y-N
SPKL1 AMP_HPOUT_L
*75
*75
L44 SBK160808T-121Y-N
+5V
R448
R436
*22K
*22K
AGND
AHCT1G125DCH
R541
10K
+5V
1
5
U30
A
MODEM
No Ground Plane In DAA Section
Homologation Area
4 4
MC4
0.47uF/50V_12
C1AC1A
C2A
3 3
MC1 33pF/5KV_18
MC2 33pF/5KV_18
MR9
1M/F
B
MR1
1.07K_4
MU1
1
NC
2
RX
3
IB
4
C1B
5
C2B
Si3080_F_FM
MC5
0.1uF/16V
2019181721
EPAD
6 7 8
DCT
VRE G
QE
RNG 1
IGND
DCT2
IGN D2
RNG 2
9
16
NC
DCT3
QB
QE2
SC
NC
VRE G2
10
15
14
13
12
11
MC6
0.1uF/16V
MR3
3.65K/F
MR10
536_4
C
MR11
73.2/F_1210
MR2
150/F
MQ5
MMBTA06-7-F
MC3
0.01uF/250V_8
MQ4
MMBTA06-7-F
2.49K/F
MR4
MC7
2700pF/50V
MR5
100K
D
MQ1
MMBTA42-7-F
MQ2
MMBTA92LT1G
MQ3
MMBTA42-7-F
MZ1
DDZ9717-7
MR6
100K
MC10
0.01U/16V_4
E
29
MR8
20M _ 8
MR7
20M _ 8
2 2
3VSUS R260
C422
0.1uF/06
1 1
ACZ_RST#_AUDIO_MDC
ACZ_SYNC_AUDIO_MDC
BIT_CLK_AUDIO_MDC
ACZ_SDOUT_AUDIO_MDC
ACZ_SDIN1_MDC
R358 33/04
ACZ_RST#_AUDIO_MDC 19
ACZ_SYNC_AUDIO_MDC 19
BIT_CLK_AUDIO_MDC 19
ACZ_SDOUT_AUDIO_MDC 19
ACZ_SDIN1 19
BIT_CLK_AUDIO_MDC
ACZ_SDIN1_MDC
ACZ_SDOUT_AUDIO_MDC
ACZ_SYNC_AUDIO_MDC
ACZ_RST#_AUDIO_MDC
U11
1
NC1
2
VDDIO
3
BCLK/BIT_CLK
4
VD
5
SDI/SDATA_IN
6
SDO/SDATA_OUT
7
SYNC
8
RST#/RESET#
Si3054
GPIO_B/EE_SD/PNPID
Dual Diode
Dual Diode
*Contact_Vendor/06
GPIO_A/EE_SC
NC3
GND
AOUT
C1A
C2A
MD1
MD2
R266
*10K/06
16
15
14
13
VA
12
11
10
9
MFB2
BLM18AG601SN1D
MFB1
BLM18AG601SN1D
+VA
T88
R276 56.2/06
R283 56.2/06
MC9
680pF/5KV_18
MC8
680pF/5KV_18
T93
C421
0.1uF/06
C1A
C2A
MFB4
BLM18AG601SN1D
MFB3
BLM18AG601SN1D
MRV1
SiDactor
MJP1
1
2
WIRE-TO-BOARD
PROJECT : CW4
Size Document Number Rev
A
B
C
Date: Sheet
D
Quanta Computer Inc.
MODEM( SI3054+SI3080 )
of
29 44 Friday, November 03, 2006
E
1A Custom
5
Q18
PDA[0..2]
PDD[0..15]
PDIOW#
PDDREQ
PDIORDY
PDIOR#
IRQ14
PDDACK#
PDCS1#
PDCS3#
+3V +5V
2
1 3
PDTC144EU
+5V
+3 V
R235
10K
IDERST#
CDLED# 34
CDVCC
NC for slave
CD-ROM USBX3
PLTRST# 15,20,21,31,33,35
D D
PDA[0..2] 19
PDD[0..15] 19
PDIOW# 19
PDDREQ 19
PDIORDY 19
PDIOR# 19
IRQ14 19
PDDACK# 19
PDCS1# 19
PDCS3# 19
PDIOR#
R227 *4.7K
PDIOW#
C C
PDIORDY
IRQ14
DIAG#
R222 *4.7K
R212 4.7K
R519 8.2K
R518 *4.7K
R207 *10K
SATA-HDD CONNECTOR
C340
10U/6.3V
4
R189 10K
R187 470
T6 6
C599
.1U/10V
CN15
2
1
4
CSEL
CD_P49
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
C600
.1U/10V
51
51
52
CDVCC
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
CON50_LP
6
8
CD.50
L27
PBY201209T-300Y-N
C598
10U/6.3V
IDERST#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1 PDD15
PDD0
PDIOW#
IRQ14
PDA1 DIAG#
PDA0
PDCS1#
120 m ils
C349
.1U/10V
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDDREQ
PDIOR#
PDDACK# PDIORDY
IOCS16#
PDA2
PDCS3#
3
5VSUS
C617
1U/6.3V
T70
CDVCC
T6 7
1 2
+5V
USBP0- 20
USBP0+ 20
C676
5VSUS
1U/6.3V
2
3
4
1
USB0PWR
2
3
4
1
TPS2065D
TPS2065D
U33
VIN1
VIN2
EN
GND
2
U28
VIN1
OUT3
VIN2
OUT2
EN
OUT1
GND
OC
R523 0
CML2
1
4 3
*DLW21HN900SQ2L
R526 0
OUT3
OUT2
OUT1
OC
8
7
6
5
2
8
7
6
5
USB0PWR
C615
*470P/50V
L62
BLM18PG121SN
USBP0-_C
USBP0+_C
USB1PWR
C667
*470P/50V
40 mils (Iout=1A)
C616
.1U/10V
40 m i l s ( I o u t = 1 A )
C666
.1U/10V
CN18
1
2
3
45
USB_CON
1 2
1 2
C614
8
7
6
C648
100U/6032
1
30
100U/6032
USB 0
USB 1
USB1PWR
R545 0
USBP1- 20
USBP1+ 20
1
4 3
*DLW21HN900SQ2L
R548 0
CML4
L66
BLM18PG121SN
2
USBP1-_C
USBP1+_C
CN22
1
2
3
45
USB_CON
8
7
6
B B
A A
CN20
22
12V
21
12V
20
12V
19
GND
18
RSVD
17
GND
16
5V
15
5V
14
5V
13
GND
12
GND
11
GND
10
3.3V
9
3.3V
8
3.3V
7
GND3
6
RXP
5
RXN
4
GND2
3
TXN
2
TXP
1
GND1
127043FB022G201ZR
SATA_RXP0_C
SATA_RXN0_C
+5VHDD
+3VHDD
C411 3900P
C412 3900P
L63
L41
+5VHDD
+3VHDD
1 2
PBY201209T-300Y-N
1 2
PBY201209T-300Y-N
SATA_RXP0 19
SATA_RXN0 19
SATA_TXN0 19
SATA_TXP0 19
C636
0.1U
+5V
+3V
+3VHDD
C637
4.7U
C464
0.1U
+5VHDD
C469
4.7U
USBP2- 20
USBP2+ 20
C404
1U/6.3V
5VSUS
U10
2
VIN1
3
VIN2
4
EN
1
GND
TPS2065D
USB2PWR
R530 0
*DLW21HN900SQ2L
R529 0
OUT3
OUT2
OUT1
OC
CML3
1
4 3
8
7
6
5
L40
BLM18PG121SN
2
USB2PWR
C429
*470P/50V
USBP2-_C
USBP2+_C
40 m i l s ( I o u t = 1 A )
C437
.1U/10V
CN19
USB_CON
1 2
C440
100U/6032
USB 2
1
5
2
6
3
7
4
8
PROJECT : CW4
Size Document Number Rev
5
4
3
2
Date: Sheet
Quanta Computer Inc.
SATA HDD/CD-ROM/USBX3
30 44 Friday, November 03, 2006
1
of
1A Custom
5
3VPCU
LANVCC
C333
4.7U
BLM11A601 S
BLM11A601 S
BLM11A601 S
BLM11A601 S
-LAN_WAKEUP
T2 0 5
T2 0 1
LANVCC
C354
1U
C315
C273
0.1U
0.1U
C351 4.7U
C355 4.7U
C329 4.7U
C339 4.7U
LANVCC
LANVCC
LANVCC
LANVCC
R136 200
2 1
Y1
25.0000 MHz/30PPM
LANVCC
Q11
PDTC144EU
C282
C337
0.1U
0.1U
LAN AVDDL
C344 0.1U
LAN GPHYPLLVDD
C352 0.1U
LAN PCIEPLLVDD
C327 0.1U
C332 0.1U
C320 0.1U
C311 0.1U
R175 1K
R182 1K
R135
10K
R156 47K
R161
5789 _ X O
5789_XI
2
-LAN_WAKEUP
1 3
578
Q14
LAN_ON 37
D D
C C
B B
A A
LAN_ON
VLAN_12V
AO4414
PCIE_RXP2_LAN 20
PCIE_RXN2_LAN 20
PCIE_TXP2_LAN 20
PCIE_TXN2_LAN 20
CLK_PCIE_LAN 3
CLK_PCIE_LAN# 3
LOM_DISABLE# 36
PCIE_LANREQ# 3
3 6
PLTRS T # 15,20,21,30,33,35
PCIE_WAKE# 21,33,35
241
L31
L32
L26
L28
C257 22P
C258 22P
C341
0.1U
C283
0.1U
LAN_PCIEVDD
47K
4
BCM5787M( LAN 10/ 100/ 1G )
BCM5906M( LAN 10/ 100 )
C274 4.7U
VLAN_12V
5
C267
0.1U
GPP_TX 1 P _ L A N
GPP_TX1N_LA N
13
C272
20
34
0.1U
55
60
39
44
46
51
35
30
27
33
24
26
25
31
32
12
10
29
28
54
53
3
58
57
22
21
37
R185
1.24K/F
11
BCM5906M : 1K/F
BCM5787M : 1.24K/F
C330 0.1U
C308 0.1U
C271 0.1U
U4
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
AVDDL
AVDDL
AVDDL
AVDDL
GPHY_PLLVDD
PCIE_PLLVDD
PCIE_VDD
PCIE_VDD
PCIE_GND
PCIE_TXDP
PCIE_TXDN
PCIE_RXDP
PCIE_RXDN
WAKE#
PERST#
REFCLK+
REFCLK-
VAUXPRSNT
VMAINPRSNT
LOW_PWR
SMB_CLK
SMB_DATA
XTALO
XTALI
RDAC
NC(CLK_REQ#)
LANVCC
615195661
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
BCM5787M
10mm X 10mm
68- P i n QF N
GND
69
17
68
VDDP
VDDP
SPD100LED#
SPD1000LED#
TRAFFICLED#
UART_MODE
GPIO1_SERIALDI
GPIO0_SERIALDO
NC/(ENERGY_DET)
Package Body
BCM5787M/BCM5906M
3
VLAN_25V
C299
0.1U
BIASVDD
XTALVDD
AVDD
AVDD
AVDD
TRD3-
TRD3+
TRD2-
TRD2+
TRD1-
TRD1+
TRD0-
TRD0+
LINKLED#
GPIO2
SCLK
REGCTL25
REGCTL12
REG_GND
2
1
31
C303
0.1U
L29
BLM11A601S
EEWP#
0.1U
0.1U
0.1U
LANVCC
LANVCC
C343 0.1U
C296
C342
C347
R152
4.7K
L24
BLM11A601S
L30
BLM11A601 S
LAN_LINK_10_1G_LED# 32
LAN_ACTLED# 32
R146
4.7K
R118
0
R120
R132
4.7K
0
LAN BIASVDD
36
LAN XTALVDD
23
LAN AVDD
38
45
52
49
50
48
47
42
43
41
40
2
1
T42
67
T46
66
8
T39
9
T40
7
4
T37
SCLK
65
SI
63
SI
SO
64
SO
CS#
62
CS#
59
T55
LAN REGCTL25
18
LAN REGCTL12
14
16
R143
4.7K
R131
4.7K
EEWP#
0.1U
C187
0.1U
C190
0.1U
C233
0.1U
C208
VLAN_25V
LANVCC
VLAN_25V
VLAN_12V
8
7
6
4.7U/10V
C188
10U/10V
C180
4.7U/10V
C236
10U/10V
C212
U2
VCC
NC
SCL
24C02
TRDM3
TRDP3
TRDM2
TRDP2
TRDM1
TRDP1
TRDM0
TRDP0
A0
A1
A3
GND SDA
MMJT943 5 / S O T
Q10
2 3
4
MMJT9435/SOT
Q9
2 3
4
TRDM3 32
TRDP3 32
TRDM2 32
TRDP2 32
TRDM1 32
TRDP1 32
TRDM0 32
TRDP0 32
R202
R201
*49.9
*49.9
C366
C276
0.1U
1
2
3
4 5
1
1
*0.1U
R128 0
R129 0
R190
R191
*49.9
*49.9
C357
*0.1U
1 G : NC
10/100 : STUFF
LAN REGCTL25
LAN REGCTL12
PROJECT : CW4
Size Document Number Rev
5
4
3
2
Date: Sheet
Quanta Computer Inc.
LAN(BCM5787M/ 5906M)
1
of
31 44 Friday, November 03, 2006
1A Custom
A
B
C
D
E
RJ45 Connector
4 4
TRDP3 31
TRDM3 31
3 3
2 2
TRDP2 31
TRDM2 31
TRDP1 31
TRDM1 31
TRDP0 31
TRDM0 31
VLAN_25V
TRDP3
TRDM3
TRDP2
TRDM2
TRDP1
TRDM1
TRDP0
TRDM0
C379
0.01U
C381
0.01U
C380
0.01U
C382
0.01U
10/100M Tr: DBED2LLAN05
10/100/1G Tr: DB0ZH1LAN06
U9
1
TCT1
2
TD1+
3
TD1-
4
TCT2
5
TD2+
6
TD2-
7
TCT3
8
TD3+
9
TD3-
10
TCT4
11
TD4+
12
TD4-
LAN TRANSFORMER
MCT1
MX1+
MX1-
MCT2
MX2+
MX2-
MCT3
MX3+
MX3-
MCT4
MX4+
MX4-
MCT1
24
23
22
MCT2
21
20
19
MC T 3
18
17
16
MC T 4
15
14
13
R248 75/F
R247 75/F
R246 75/F
R245 75/F
X-TX3P
X-TX3N
X-TX2P
X-TX2 N
X-TX1P
X-TX1 N
X-TX0P
X-TX0 N
LAN_1
1 2
C397
1000P_3KV
CN16
LAN_ACTLED# 31
LAN_LINK_10_1G_LED# 31
LANVCC
LANVCC
R220 150
X-TX3N
X-TX3P
X-TX1N
X-TX2 N
X-TX2P
X-TX1P
X-TX0 N
X-TX0P
R244 150
CN1
1
2
MODE M
1 2
1 2
RJ11_TIP
RJ11_RING
12
11
8
7
6
5
4
3
2
1
10
9
RJ45_CON
YÂY+
NC4/3ÂNC/3+
RX-/1ÂNC2/2-
NC1/2+
RX+/1+
TX-/0-
TX+/0+
G-
G+
CN10
1
23
RJ11_CON
GND
GND
4
14
13
32
1 1
PROJECT : CW4
Quanta Computer Inc.
Si z e Document Number Rev
RJ11/RJ45 CONNECTOR
A
B
C
Date: Sheet
D
32 44 Friday, November 03, 2006
E
of
1ACustom
A
CCD MODULE NEWCARD
+5V
C179 0.1U
D D
R110 1M
VIN
Q7
PDTC144EU
CCD_PWRON# 21
2
1 3
INT_MIC_L 27
INT_MIC_R 27
25mil
3
2
2N7002E/CH2507SPT
1
USBP3- 20
USBP3+ 20
L64
LZA10-2ACB104MT
L11
LZA10-2 A C B 1 0 4 M T
Q6
L12
*FBMH2016HM251NT
25mil
CCD_VCC
AGND
INT_MIC_L_C
INT_MIC_R_C
INTERNAL MIC
C C
B
CN3
8
7
6
5
4
3
2
1
CCD_CON
C
USBP7- 20
USBP7+ 20
3V_NEWCARD
USBCONP7ÂUSBCONP7+
CPUSB#
PCLK_SMB 3,21
PDAT_SMB 3,21
PCIE_WAKE# 21,31,35
NEW-CARD_CLK_REQ# 3
CLK_PCIE_NEW_C# 3
CLK_PCIE_NEW_C 3
PCIE_RXN1 20
PCIE_RXP1 20
PC I E _ T X N 1 20
P C I E _ T XP1 20
1.5V_NEWCARD
3VAUX
R277 0
1 2
CLK_PCIE_NEW_C#
CLK_PCIE_NEW_C
PERST#
CLK_NEW_OE#
CPPE#
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
331-1CX43201-ZG-X2_NEW _ C A R D
CN7
1
GND4
2
USB_D-
3
USB_D+
4
CPUSB#
5
RESERVED2
6
RESERVED1
7
SMB_CLK
8
SMB_DATA
9
+1.5V2
+1.5V1
WAKE#
+3.3VAUX
PERST#
+3.3V2
+3.3V1
CLKREQ#
CPPE#
REFCLKÂREFCLK+
GND3
PERn0
PERp0
GND2
PETn0
PETp0
GND1
R253 0
1 2
CML1
1 2
3 4
*PLW3216S900SQ2T1
R258 0
1 2
30
SHIELD4
29
SHIELD3
28
SHIELD2
27
SHIELD1
USBCONP7ÂUSBCONP7+
T105
*PAD
T116 *PAD
D
PLTRST# 15,20,21,30,31,35
R273 *10K
R278 *0
3V_NEWCARD
1 2
C444
0.1U
CPUSB#
CPPE#
2231_SHDN#
2231_STBY#
3VSUS
3VAUX
PLTRST#
C443
0.1U
2231_STBY#
CPPE#
CPUSB#
PERST#
2231_SHDN#
RCLKEN
OC#
R274 10K
R268 10K
R286 10K
R290 10K
U12
1 2
STBY# 3.3VIN
17
AUXIN
15
AUXOUT
6
SYSRST#
10
CPPE#
9
CPUSB#
8
PERST#
3.3VOUT
20
SHDN#
3.3VOUT
18
RCLKEN
19
OC#
1.5VOUT
7
GND
1.5VOUT
R5538
3VAUX
1 2
C414
0.1U
3.3VIN
1.5VIN
1.5VIN
C413
0.1U
E
+3V
33
+3V
4
12
+1.5V
14
3
3V_NEWCARD
5
11
1.5V_NEWCARD
13
1.5V_NEWCARD
1 2
C416
0.1U
C415
0.1U
Low High
Disable
Enable CCD_PWRON#
BLUETOOTH
B B
C507 0.1U
R431 1 M R446 330
VIN
BT_ON# 21
A A
2
+3V
C700
0.1U
2
Q40
PDTC144EU
1 3
+3V
3
Q2 7
2N7002E/CH2507SPT
1
USBP5- 20
USBP 5 + 20
BC0EX1
BC0EX2
B C 0 EX2
B C 0 EX1
BT_ L E D
R611 *0
R608 *0
R612 0
R607 0
CN27
8
GND1
7
GND
6
5
4
3
2
1
BLUETOOTH _ C O N
BBC0EX1 35
BBC0EX2 35
9
10
LED
PWR_BLUE 36
BATLED _ B L U E 36
B A T LED_AM BER 36
RF_LINK# 35
BT_ L E D
WWAN# 35
TP_LED# 36
2
Q 2 9 PDTC144EU
1 3
2
Q 2 8 PDTC144EU
1 3
1 3
Q 3 1 PDTC144EU
2
1 3
Q 3 0 PDTC144EU
2
LED5 BLUE_LED
LED2
3 1
2 4
LED_BLUE/AMBER
LED3
3 1
2 4
LED_BLUE/AMBER
LED4 BLUE_LED
LED1 BLUE_LED
R449 560
R450 560
R447 560
R445 330
R631 330
R441 330
5VPCU
5VPCU
+3V
+3V
+3V
PROJECT : CW4
Size Document Number Rev
A
B
C
D
Date: Sheet
Quanta Computer Inc.
CCD, NEW CARD, B/T, LED
E
of
33 44 Friday, November 03, 2006
1A Custom
5
4
3
2
1
FAN CONTROL
EMI PAD HOLES SWITCH BOARD CON.
34
PAD5
PAD18
FDBF1006
*FDBF1006
1
+5V
D D
U8
1
VEN
2
+5V_FAN
VFAN 36
C C
R229
180K
+5V_FAN
1 2
C383
1000P
FANSIG 36
VIN
3
VO
4 5
SET GND
G993P1U
+3V
30 MIL
R517
10K
GND
GND
GND
8
7
6
CN14
1
1
2
2
3
3
FAN
C393
1U
PAD2
FDBF1006
PAD13
*FDBF1006
PAD12
*FDBF1006
PAD3
*FDBF1006
PAD22
*FDBF1006
1
PAD23
*FDBF1006
1
1
PAD15
*FDBF1006
1
1
PAD11
*FDBF1006
1
1
PAD10
FDBF1006
1
1
PAD6
*FDBF1006
1
1
PAD7
FDBF1006
1
PAD14
*FDBF1006
1
PAD16
*FDBF1006
1
PAD19
*FDBF1006
1
PAD1
*FDBF1006
1
PAD21
*FDBF1006
1
PAD9
FDBF1006
1
PAD8
*FDBF1006
1
PAD17
*FDBF1006
1
PAD4
*FDBF1006
1
PAD24
*FDBF1006
1
PAD20
*FDBF1006
1
H26
*HOLE
H3
*HOLE
H8
*HOLE
H22
HOLE
H28
*HOLE
H14
H24
*HOLE
*HOLE
1
1
1
1
1
1
H27
*HOLE
H6
*HOLE
H21
HOLE
H11
*HOLE
1
AGND
1
1
1
H20
*HOLE
H9
*HOLE
H18
HOLE
H15
*HOLE
H29
*HOLE
1
1
1
1
1
1
H25
*HOLE
H19
*HOLE
H5
*HOLE
H17
HOLE
H12
*HOLE
H1
H2
*HOLE
*HOLE
1
1
1
1
1
1
H4
*HOLE
H13
HOLE
1
3VPCU +3V
CN2
1
1
2
2
3
3
4
1
H10
H7
HOLE
HOLE
1
1
1
SATA_LED# 19
CDLED# 30
CAPSLED 36
NUMLED 36
SCROLED 36
NBSWON# 36
NOVO_BUTTON# 36
MY12 36
MX1 36
MX2 36
MX3 36
MX4 36
MX5 36
LID551# 24,36
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
SWITCH/B_CON
TOUCH PAD KEYBOARD
B B
MY15 36
MY10 36
MY11 36
MY14 36
MY13 36
MY12 36
MY3 36
MY6 36
MY8 36
MY7 36
MY4 36
MY2 36
MX0 36
MY1 36
MY5 36
MX3 36
MX2 36
MY0 36
MX5 36
MX4 36
MY9 36
MX6 36
MX7 36
MX1 36
A A
MY15
MY10
MY11
MY14
MY13
MY12
MY3
MY6
MY8
MY7
MY4
MY2
MX0
MY1
MY5
MX3
MX2
MY0
MX5
MX4
MY9
MX6
MX7
MX1
CN4
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
KB-CON(85201-24051)
MY15
MY10
MY11
MY14
MY8
MY7
MY4
MY2
3VPCU
10
9
8
7 4
10
9
8
7 4
RP36
10KX 8
RP27
10KX8
L15
CA5 2 2 0 P X 4
MY6
1
MY3
2
MY12
3
MY13
5 6
MY1
1
MY5
2
MY0
3
MY9
5 6
MY8
MY7
MY4
MY2
MY13
MY12
MY3
MY6
MY15
MY10
MY11
MY14
1
3
5
7
CA6 2 2 0 P X 4
1
3
5
7
CA7 220PX4
1
3
5
7
2
4
6
8
2
4
6
8
2
4
6
8
CA1 2 2 0 P X 4
1
3
5
7
CA2 2 2 0 P X 4
1
3
5
7
CA4 220PX4
1
3
5
7
MY9
2
MX6
4
MX7
6
MX1
8
MX4
2
MX5
4
MY0
6
MX2
8
MX3
2
MY5
4
MY1
6
MX0
8
+5V
TPDA T A 36
TPCLK 36
+5V _ T P
BLM1 8 P G 1 2 1 S N
L57 SBK160808T-121Y- N
L58 SBK160808T-121Y-N
C209 0.1U
642
135
TOUCH_LEFT
TOUCH_RIGHT
CA3
8P4C-10P
7 8
CN6
12
11
10
9
8
7
6
5
4
3
2
1
TOUCH_PAD
TOUCH_RIGHT
TOUCH_LEFT
SW2
2
4
MISAKI _ T C 0 0 4 - P S 1 1 A T
SW1
2
4
MISAKI_TC004-PS11AT
R411
0
TP_GND
1
3
5
1
3
5
TP_GND
PROJECT : CW4
Size Document Number Rev
5
4
3
2
Date: Sheet
Quanta Computer Inc.
T/P,FAN,KB,T/B CON
1
of
34 44 Friday, November 03, 2006
1A Custom
A
B
C
D
E
Mini PCI-E Card 1
WLAN
3VWLAN
D D
PCLK_LPC_DEBUG 3
CLK_PCIE_MINI 3
CLK_PCIE_MINI# 3
C C
PCIE_WAKE# 21,31,33
only resever CW4 not
support IAMT
CL_RST#1 21
ICH_CL_DATA1 21
ICH_CL_CLK1 21
PCIE_TXP0 20
PCIE_TXN0 20
PCIE_RXP0 20
PCIE_RXN0 20
PLTR S T # 15,20,21,30,31,33
BBC0EX 2 33
BBC0EX 1 33
R619 0
R435 0
T 251
3VSUS
R613 *10K
2
1 3
Q41
PDTC144EU
R615 *0
R616 *0
R617 *0
PCIE_TXP0
PCIE_TXN0
PCIE_RXP0
PCIE_RXN0
DEB_CLK
DEB_RST#
CLK_PCIE_MINI
CLK_PCIE_MINI#
CLK_MINI_OE#
MINICAR_PME#
MINICAR_PME#
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
CN25
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
Reserved
Reserved
GND
REFCLK+
REFCLK-
GND
CLKREQ#
Reserved
Reserved
WAKE#
67910-0002
+3V 3VSUS
R630 0
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_D-
GND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
Reserved
GND
Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V
3VWLAN
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
R429 0
+1.5V
R586 *0
MINI_BLED
RF_LINK#
R588 10K
R590 0
DAT_SMB
CLK_SMB
R575 0
PLTRST#
LAD0_1
R589 0
LAD1_1
R576 0
LAD2_1
R605 0
LAD3_1
R584 0
LFRAME#_1 LFRAME#
R600 0
DEB_CLK
BLUELED
+3V
LAD0
LAD1
LAD2
LAD3
R620 *0
C701 *33P/50V
for EMI request
RF_LINK# 33
USBP9+ 20
USBP9- 20
CGDAT_SMB 3,14
CGCLK_SMB 3,14
PLTRST# 15,20,21,30,31,33
WLAN_OFF# 21
LAD0 19,36
LAD1 19,36
LAD2 19,36
LAD3 19,36
LFRAME# 19,36
+1.5V
C671
.01U/16V
WAN_OFF# WLAN_OFF#
C493
C669
10U/6.3V
.1U/10V
INTEL WLAN
CARD PIN 20
W_DISABLE#
have
internal
pull-up 110k
ohm
D15
*CH500H-40PT
R437 *0_4@NC
3VWLAN
C686
C680
10U/6.3V
.1U/10V
Prevent backdrive w h e n
Wo W is en ab l e d .
C503
.1U/10V
35
3VSUS
C506
1U/6.3V
WWAN -- have 2.8A 7W power
Mini PCI-E Card 2
WWAN(W/ S I M )
3VWWAN
B B
CN21
51
Reserved
49
Reserved
47
Reserved
45
Reserved
43
Reserved
41
Reserved
39
Reserved
37
Reserved
35
GND
33
PETp0
31
PETn0
29
GND
27
GND
25
PERp0
23
PERn0
21
GND
19
Reserved
17
Reserved
15
GND
13
REFCLK+
11
REFCLK-
9
GND
7
CLKREQ#
5
A A
T228
3
1
67910-0002
Reserved
Reserved
WAKE#
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_D-
GND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
Reserved
GND
Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V
consumption
power pin 24.39.41
GND pin 37,43
need to be careful power
rail
+1.5V
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
SHR_USB6+
SHR_USB6-
GDAT_SMB
GCLK_SMB
UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
R299 0
R364 *10K
R356 0
R349 0
R340 0
R335 0
R318 *0
R325 0
R313 *0
WAN_OFF#
T119
T118
T115
T112
C438
1 2
*.1U/10V
R272
*15K
C423
.1U/10V
3VWWAN
C456
10U/6.3V
C427
*.01U/16V
+3V
+3V
WWAN# 33
USBP6+ 20
USBP6- 20
CGDAT_SMB 3,14
CGCLK_SMB 3,14
+3V
3VSUS
PLTRST# 15,20,21,30,31,33
WAN_OFF# 21
C430
*4.7U/10V
C436
*1U/10V/X5R_6
1 2
+
C475
*470U/4V
C479
*.1U/10V
+1.5V
C478
*10U/6.3V
PROJECT : CW4
3VWWAN
A
B
C
D
Size Document Number Rev
Date: Sheet
Quanta Computer Inc.
WLAN & WWAN CON
35 44 Friday, November 03, 2006
E
of
1A Custom
5
C446
0.1U/10V_4
IT8512_AGND
C441
0.1U/10V_4
3VPCU
VST BY
VST BY
VST BY
LPC
CIR
)
FLASH
KSI1/AFD#
KSI2/INIT#
KSI3/SLIN#
MX2
MX1
MX3
RTC_VCC
1 213 7 4
VST BY
VST BY
KBMX
KSI4
KSI5
MX5
MX4
MX6
KSI6
65
MX7
IT8512_AVCC
IT8512_VSTBY
1 27
VBAT
AVC C
VST BY
IT8512
KSI7
VSS
1122749122
C439
1000P/16V_4@IV
VCCRTC
R347
0_4
RTC_VCC
C472
0.1U/10V_4
GATEA20 19
SERIRQ 21,25
KBSMI# 21
SCI# 21
RCIN# 19
TP_LED# 33
3VPCU
R321
470K_4
WRST_8512#
C459
0.1U/10V_4
CELL_SET 38
PCICGRST# 25
EC_ME_ALERT 21
FLASH TYPE SELECT
R3444
LPC/FWH FLASH ROM
High
SPI FLASH ROM (Default)
Low
3VPCU
C425
0.1U/10V_4
PCLK_LPC_8512 3
D11 CH500H-40PT
D9 CH500H-40PT
3VPCU
R395 0_4
R379
*100K_4@NC
MY[0..15] 34
MX[0..7] 34
D D
C C
B B
A A
L42 BK1608HS121-T
Layout Note:
Place all capacitors close t o I T8512.
C445
C484
0.1U/10V_4
0.1U/10V_4
Layout Note:
net "3VPCU" and "RTC_VCC"
minimum trace width 12mils.
LAD0 19,35
LAD1 19,35
LAD2 19,35
LAD3 19,35
LID551# 24,34
LFRAME# 19,35
T1 2 4
2 1
2 1
R381
*10K
R380
100K_4
IT85 12_T M
TMKBC Function
Hig h
Low
5
WRST_8512#
E nable
Disable
I T 8 512_T M
8512_SCK
8512_SO
8512_SI
8512_SCE#
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
CIR_IN
CIR_TX
C485
C466
0.1U/10V_4
0.1U/10V_4
+3V
C462
0.1U/10V_4
10
9
8
7
22
13
6
17
126
5
15
23
14
4
16
119
123
106
105
104
103
102
101
100
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
1 12 65 09 21 14
LAD0
VC C
LAD1
LAD2
LAD3
LPCRST#/WUI4/GPD2
LPCCLK
LFRAME#
LPCPD#/WUI6/GPE6
GA20/GPB5
SERIRQ
ECSMI#/GPD4
ECSCI#/GPD3
WRST#
KBRST#/GPB6
PWUREQ#/GPC7
GPC0/CRX
GPB2/CTX
N o t e 1 : S i nce all GP I O belong t o V S T B Y power domain, and
there a r e s o m e s p e c i a l c o n s i d e r a t i o n s b e l o w :
(1) I f it is out put t o ext e rnal V CC derived power d o m a i n
circuit , t his signal should be isolat ed by a diode such a s
K B R S T # and GA 2 0 .
(2) I f it is input f r om ext ernal V CC derived power d o m a i n
circuit, t h i s e x t e r n a l c i r c u i t m u s t c o n s i d e r n o t t o f l o a t t h e
G P I O input .
Not e 2 :
(1) E ach input pin should b e d r i v e n o r p u l l e d .
( 2 ) E a c h o u t p u t - d r a i n o u t put pin should be
pulled .
FLRST#/WUI7/GPG0/TM
FLCLK/SCK
FLAD3/GPG6
FLAD2/SO
FLAD1/SI
FLAD0/SCE#
FLFRAME#/GPG2
KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15
KSI0/STB#
58596061626364
MX0
4
L39 BK1608HS121-T
L43 BK1608HS121-T
C486
0.1U/10V_4
8 38 48 2
3 32 01 99 89 99 69 79 49 5
5 7
5 6
GPE2/ISAS
GPE1/ISAD
GI N T / G PD 5
GPE3/ISC L K
KSO17/GPC 5
KSO16/GPC 3
GPIO
)
VSS
VSS
VSS
VSS
VSS
VSS
AVSS
113
75
91
IT8512_AGND
4
MY16
MY17
1 07
G P H5/ID5
G P H6/ID6
G P H4/ID4
GPG1 / I D 7
L80LLAT / G PE7
L80HLAT / G PE0
WAKE UP
3VPCU
3VPCU
(For PLL Power)
OV_EVENT 38
RF_SW#
LOM_DISABLE# 31
T109
T111
T102
VOLMUTE# 28
ECPWROK 7,16,21
GSENSOR_TST# 26
RSMRST# 21
VRON 37,40,42,43
LAN_POWER 37
MAINON 27,37,39,41,42,43,44
SUSON 37,39
S5_ON 37
D/C# 38
9 3
SMCLK0/GPB3
SMDAT0/GPB4
SMCLK1/GPC1
GPH 0 /ID 0/SH BM
G P H1/ID1/B A DDR0
G P H2/ID2/B A DDR1
PWM
UART
A/D D/A
SMDAT1/GPC2
SMCLK2/GPF6
SMDAT2/GPF7
SM BUS PS/2
PS2CLK0/GPF0
PS2DAT0/GPF1
PS2CLK1/GPF2
PS2DAT1/GPF3
PS2CLK2/GPF4
PS2DAT2/GPF5
TACH0/GPD6
TACH1/GPD7
TMR0/WUI2/GPC4
TMR1/WUI3/GPC6
PWRSW/GPE4
RI1#/WUI0/GPD0
RI2#/WUI1/GPD1
CLOCK
U14
IT8512E-L
PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5
PWM6/GPA6
PWM7/GPA7
WUI5/GPE5
TXD/GPB1
RXD/GPB0
ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/GPI4
ADC5/GPI5
ADC6/GPI6
ADC7/GPI7
DAC0/GPJ0
DAC1/GPJ1
DAC2/GPJ2
DAC3/GPJ3
DAC4/GPJ4
DAC5/GPJ5
CK32KE
CK32K
G P H3/ID3
RING#/PWRFAIL#/LPCRST#/GPB7
110
111
115
116
117
118
85
86
87
88
89
90
24
25
28
29
30
31
32
34
47
48
120
124
125
18
21
35
112
109
108
66
67
68
69
70
71
72
73
76
77
78
79
80
81
2
128
10P/50V_4
PWM_FAN2
FANSIG2
NBSWON#
NOVO_BUTTON#
PR_INSERT#
HWPG
DNBSWON_R
IT8512_CK32K
C481
MB_CLK
MB_D A T A
MBCLK
MBD A T A
MSCLK
MSD A T A
KPCLK
KPDATA
TPCLK
TP DA T A
IT8512_CK32KE
1 4
2 3
32.768KHZ
3
3VPCU
MB_CLK
MB_DATA
MBCLK
MBDATA
MY16
MY17
PR_INSERT#
CIR_IN
CIR_TX
BATLED_AMBER
BATLED_BLUE
BL/C#
HWPG
MB_CLK 38
MB_DA T A 38
MBCLK 4
MBD A T A 4
CAPSLED 34
NUMLED 34
PWR_BLUE 33
T1 2 0
VFAN 34
T1 1 7
GSENSOR_ON# 26
SCROLED 34
ME_EC_ALERT 21
BRIGHT_PWM 24
FANSIG 34
T1 1 0
T1 5 0
T1 4 9
NBSWON# 34
SUSB# 21
ACIN 38
NOVO_BUTTON# 34
T1 5 1
BATLED_AMBER 33
BATLED_BLUE 33
T E M P _ M BAT 3 8
MBAT V 3 8
T1 0 8
T1 1 4
GSENSOR_X 26
GSENSOR_Y 26
HWPG 39,40,41,42,43,44
SUSC# 21
CC_SET 38
DAREF 38
BL/C# 38
LAN_REST# 21
T126
Y3
Layout Note:
32.768kHz clock lines :
a. If possible, please avoid using any through-hole.
C476
b. Please make the trace length short, and the trace width wide enough.
10P/50V_4
c. The spacing to the closest neighbor should be wide enough.
3
R383 4.7K_4
R397 4.7K_4
R384 4.7K_4
R385 4.7K_4
R271 10K_4
R270 10K_4
R398 10K_4
R386 10K_4
R393 10K_4
R396 10K_4
R382 10K_4
R300 10K_4
R285 *10K_4
2
RN1
*10K_8P4R@NC
D10 CH500H-40PT
7
2 1
8 6 4
1 3 5
+5V
R334
10K_4
DNBSWON# 21
R337
10K_4
+3V
TPCLK 34
TP DA T A 34
2
3VPCU 3VPCU
NBSWON#
RF_SW#
8512_SCE#
R425 47_4
8512_SCK
R424 47_4
8512_SI
R346 15_4
8512_SO
Layout Note:
P l ace R471, R498, R534 within 500 mils from SPI Flash.Place R567
wit h in 500mils f r om R534; R520 wit hin 500mils f r o m R498 and R570
within 500mils from R471.
POWER SWITCH/
NOVO BUTTON
R387
10K_4
C490
0.1U/10V_4
RF ON/OFF SWITCH
3VPCU
R621
10K_4
C702
0.1U/10V_4
Please r e s e r v e t h i s c o n n e c t o r
f o r serial debug port & K B S
downloa d u s a g e .
*IT8512_DEBUG@NC
SW3 RF_SLIDE_SWITCH
8 M b i t (1M Byte), S P I
3VPCU
8512_SCK1
8512_SI1
8512_SO1
3VPCU
CN9
1
2
3
4
CIR
5VPCU
R628
47_8
RF_PWR
C694
4.7U/10V/X5R_8
2
U37
3
VS
2
GND2
1
GND1
TSOP6238
Size Document Number Rev
Date: Sheet
NOVO_BUTTON#
3 2
1
R345
10K_4
U15
1
CE#
6
SCK
5
SI
2
SO
3
WP#
SST_SST25VF08 0 B
CIR_IN
CIR_TX
R629
*100K_4
4
OUT
20 mlis
1
R269
10K_4
C426
0.1U/10V_4
R426
10K_4
8
VDD
C498
7
HOLD#
VSS
5VPCU
D14
4
CH500H-40PT
0.1U/10V_4
CIR_IN
2 1
PROJECT : CW4
Quanta Computer Inc.
KBC ITE8512 & CIR
1
36 44 Friday, November 03, 2006
36
1A Custom
of
A
B
C
D
E
DISCHARGE
+VCC_GFX_CORE +1.8V +5V +3V +15V +1.2V_GFX_PCIE +2.5V
+1.25V
PR141
PR142
1M_6
MAINON
4 4
2
PQ44
PDTC144EU/50V/30MA
2
1 3
PR140
22_8
22_8
3
PQ43
2
1
CH2507SPT/60V/250MA
PR139
22_8
3
PQ42
2
1
CH2507SPT/60V/250MA
PR138
22_8
3
PQ41
2
1
CH2507SPT/60V/250MA
PR152
22_8
3
PQ40
2
1
CH2507SPT/60V/250MA
PR151
22_8
3
PQ48
2
1
CH2507SPT/60V/250MA
PR150
22_8
PQ47
3
PQ46
2
1
CH2507SPT/60V/250MA
CH2507SPT/60V/250MA
3
1
MAINON#
PR149
1M_6
+15V
MAIND
3
PQ45
2
PC188
1
2200P/50V/X7R_6
CH2507SPT/60V/250MA
3VPCU 5VPCU
MAIND 39
PC193
876
4
PQ70
AO4468
0.1U/10V/X7R_4
2
351
+3V
PC184
0.1U/10V/X7R_4
4
PQ71
AO4468
876
2
351
PC191
0.1U/10V/X7R_4
PC185
0.1U/10V/X7R_4
+5V
3VPCU
8 7 6
PQ56
AO4468
3V_S5
3 3
PC140
10U/6.3V/X5R_8
3 5 1
4
PC138
2
0.1U /25V/X7R _6
5VPCU
PR161
10K_4
2
3 1
S5_ON 36
RHU002N06T106/60V/200MA
2 2
2
PQ52
SU SO N 36,39
PDTC144EU/50V/30MA
PQ65
PR168
1M _ 6
2
5VPCU
PQ55
AO6402/30V/4.1A
6 5 2 4 1
3
PC139
+15V
PR165
100K/F_4
PQ53
RHU002N06T106/60V/200MA
3 1
CH2507SPT/60V/250MA
+15V 5VSUS 1.8VSUS
1 3
* 0 .1UF/25V/X7R_6
PR171
22_8
3
2
1
5V_S5
PC137
0.1U/10V/X7R_4
3V_S5 5V_S5
PR167
22_8
3
PQ59
2
1
3VSUS
PQ64
2
CH2507SPT/60V/250M A
PDTC144EU/50V/30MA
MAINON
PR163
22_8
3
PQ60
2
CH2507SPT/60V/250MA
1
PR170
22_8
3
PQ63
1
3
2
1
CH2507SPT/60V/250M A
PR169
22_8
PQ62
PR166
1M _ 6
PQ58
2
PR172
1M _ 6
2
CH2507SPT/60V/250M A
+1.5V +15V +1.05V SMDDR_VTERM
PR164
22_8
3
2
1
1 3
PQ69
+15V
AO6402/30V/4.1A
SU SD
3
PC190
PQ61
1 2
1
*2200P/50V/X7R _4
CH2507SPT/60V/250M A
PQ57
3
C H 2507SPT/60V/250M A
3VPCU
PQ35
AO4468
3
2
1
6 5 2 4 1
PC192
0.1U/10V/X7R_4
3VSUS
PC189
0.1U/10V/X7R_4
5VPCU
4
2
PR162
22_8
PQ54
C H 2507SPT/60V/250M A
8 7 6
PC186
0.1U/10V/X7R_4
3 5 1
5VSUS
PC187
0.1U/10V/X7R_4
PR71
PR159
22_8
3
PQ51
2
1
C H 2507SPT/60V/250M A
PR134
0_4
MAINON
MAINON 27,36,39,41,42,43,44
+3V
1 2
*0.1U/10V/X7R_4
PL10
HI0805R800R-10/5A_8
PC126
1 2
PC122
22U / 6.3V/X5R _8
+15V
PR85
1M _ 6
PQ27
LAN_POWER 36
PDTC144EU/50V/30MA
2
PR84
1M_6
1 3
2
PR133
*0_4
LANVCC
PR87
22_8
3
1
PC112
4.7U /10V/X5R _8
PQ28
VRON 36,40,42,43
PDTC144EU/50V/30MA
PC117
2
1M _ 6
2
PQ19
Max Power Consumption 1.6W
PR136
0/F_6
PU10 AT815
1
GND0
2 6
EN VO
3
VIN
4
VIN
ADJ
7
VTT-ADJ
1 2
PR131
R2
10K/F_4
0.1U /10V/X7R _4
+15V
PR83
1M _ 6
LAN_ON
3
PQ26
1 2
1
VCC_CORE +15V
PR73
22_8
3
2
1 3
1
5
VO
8
GND1
9
GND2
PR132
R1
10.2K/F_4
PC125
0.1U/10V/X7R_4
A1A:Change PU3 p/n CS33242FB19
Vout=1.24*[1+(R1/R2)]
LAN_ON 31
PC67
2200P/50V/X7R_4
PQ22
2N7002K-T1-E3/60V/300MA
1 2
PC111
PC115
22U/6.3V/X5R_8
PC114
+
* 1 50U /4V/ESR 35_3528
3/27 Change P/N
10/5
PJP3
1 2
0.1U /10V/X7R _4
+2.5V
CH2507SPT/60V/250MA
1 1
CH2507SPT/60V/250MA
PROJECT : CW4
Size Document Number Rev
A
B
C
D
Date: Sheet
Quanta Computer Inc.
DISCHARGE CIRCUIT
E
1A C
of
37 44 Friday, November 03, 2006
5
10/5
PJ1
1
ADPIN+
2
3
4
5
6
D D
ACIN 36
3
C C
2N7002K-T1-E3/60V/300MA
1
PQ20
PWR_CON
ACOK
PR74
10K/F_4
1 2
PR72
15K/F_4
1 2
2
PD15
2 1
SW 1010C /100V/100M A
ADPIN-
PQ21
PDTA124EU/50V/100MA
PC63
1 2
1U/25V/X7R_8
PR77
1M/F_6
8724LDO
2
3VPCU
1 3
ACOK#
8724LDO
PL3
HI0805R800R-10/5A_8
PL2
HI0805R800R-10/5A_8
PC15
0.1U/50V/X7R_6
PR66
*0_4
1 2
1 2
PR67
*0_4
GAIN = 50 for MAX4173F
VOUT = (GAIN) (RSE NSE)(ILOAD)
B B
Iin SENSE+ Iin SENSE-
+5V
PC62
0.1U/50V/X7R_6
300mV/A for Batt I
dicharge sensing
5
3 6
VCC OUT
GND R S+
1
2 4
RS-
PU 4
MAX4173 F E U T
GND
PR62
*0_4
10/13
A A
T8 PAD
5
AD_ID2
DAREF
PR54
1M _ 6
1 2
10/13
5
6
PC57
R1
330K
0.1U/50V/X7R_6
+5V +3V
PC55
*0.1U/50V/X7R_6
8 4
3
+
1
2
-
PU5A
*LM393M
0.1U/50V/X7R_6
VA1
1 2
PR215
75K/F_4
PR216
10K/F_4
1 2
CC_SET 36
1000P/50V/X7R_4
PR65
100K/F_4
PU 5 B
L M 393M
+
-
DAREF
PC56
0.1U/50V/X7R_6
VA1
PC12
RB500V-40/40V/0.1A
VA1
PC61
VA2
1 2
PR68
20K/F_4
CPU_PROCHOT# 4
+3V
PR70
*1K_6
7
2 1
SW1010C/100V/100MA
DAREF 36
10/13
PR78
*1K_6
PD16
2 1
*SW1010C/100V/100MA
4
10/5
PD6
SSM34PT/3A/40V/VF0.55V_SMA
2 1
PD10
SSM34PT/3A/40V/VF0.55V_SMA
2 1
2 1
PD9
SSM34PT/3A/40V/VF0.55V_SMA
PD7
2 1
PC30
1U/25V/X7R_8
0.1U/50V/X7R_6
PC59
0.01U/25V_4
1 2
8724_3D3_LDO
0.1U/10V/X7R_4
PR214
1K/F_4
PC174
PD14
1 2
1000P/50V/X7R_4
PC60
1 2
3
2
1
10/13
PR64
*100K/F_4
4
VA
0.01/1W_3720
1 2
PC20
*10U/25V/X6S_1206
PR18
R3
1P
2P
10/31
PR53
0_4
1 2
CSSN
MB_CLK 36
CELLS
DLOV
PGND
BATT
LDO
BST
DHI
LX
DLO
CSIP
CSIN
REF CCS
CLS
PR160
*10K/F_4
PF1
17
2
22
24
25
23
21
20
19
18
16
4 5
3
2
8724LDO
8724DLOV
8724BST
8724 D H
8724LX
8724DL
V_CHG
PR31
14.3K/F_6
3
1
PR2
200/F_4
PD3
5.6V
27
26
1
DCIN
CSSP
10
PC54
1 2
PC58
Iinput =(V CLS / V REF)*(0.075/ RS1)
ICHG =(V ICTL / V RE FIN)*(0.075/ RS2)
ACIN
15
VCTL
13
ICTL
12
REFIN
ACOK#
11
ACOK
9
ICHG
28
IINP
8
SHDN
7
CCV
6
CCI
1 2
PC53
GND
0.01U / 25V_4
GND
14
29
PU3
MAX8724
0.01U / 25V_4
Input current limit:3.2 A
CPU_PROCHOT#
10/13
T103 P A D
PQ18
2N7002K-T1-E3/60V/300M A
OV_EVENT 36
THR#
ACIN 36
4A
V_CHG
1 2
TR2/6125FA/10A
MB_DATA 36
3
VA2
8724_3D3_LDO
PR44
100K/F_4
1 2
33_6
PC35
1UF/10V/X5R_6
PR37
20K/F_4
R1
R2
2
PQ50
*2N7002K- T1- E3/60V/300M A
PL13
HI0805R800R-10/5A_8
PL14
HI0805R800R-10/5A_8
2 1
PR34
1 2
100K/F_4
2 1
PR3
200/F_4
PR69
1.33K/F_6
21
0.1U/50V/X7R_6
CSIP
CSIN
PD4
5.6V
1 2
1 2
PC31
1UF/10V/X5R_6
PD8
SW1010C/100V/100MA
PC26
PR188
100K/F_4
3
PR58
825/F_6
PR60
PR20
0/F_6
IF USE 90W PR24 CHANGE TO 26.7 K
CS32673F911
1 2
PC48
1UF/10V/X5R_6
3
PQ49
1
* 2 N 7 002K- T1- E3/60V/300M A
1U/25V/X7R_8
CELL-SLT
0 = 4 CELL
1 = 3 CELL
3
2
PQ15
2N7002K-T1-E3/60V/300MA
1
10U/25V/X6S_1206
D1
1
D1 S1/D2
2
G2
3
S2
4
PQ2
SI4914DY-T1-E3/30V/7.4A
PR187
14K/F_4
PR1
10K/F_4
PC43
CELL_SET
PC13
3VPCU
0.1U/10V/X7R_4
PC136
0.01U/25V/X7R_4
3VPCU
VA2
1 2
G1
8
7
6
5
PC10
MBATV
Close to EC
VBATT VBATT VBATT VBATT
PC2
0.1U/10V/X7R_4
300mil
PQ17
PDTA124EU/50V/100MA
1 3
2
PC49
0.1U/50V/X7R_6
CELL_SET 36
PL1
FBMJ3216HS480NT 6A 1206
PC14
0.1U/50V/X7R_6
PL15
8724LXR
10uH /4.4A/SIL104R-100PF
VIN 24,28,33,39,40,41,42,43,44
PD1
SW1010C/100V/100MA
2 1
MBATV 36
JP1
7
BT+
6
BT+
5
BT_TH
4
SDATA
3
SCLK
2
GND
1
GND
1827654-1
TEMP_MBAT 36
PR194
*0_4
VIN
PQ8
AO4413-30V-15A
PR192
0.01/1W_3720
1 2
1P
3VPCU 19,24,31,34,36,37,41
VIN
PR14
475K/F_6
P331
PC11
1 2
470P/50V/X7R _4
8
G1
9
G2
2
PQ10
1 2
1 6
2
3
IMD2
2P
1 2
PC23
PR13
332K/F_6
2
PR56
*33K/F_6
321
8 7 6
5 4
PC161
3VPCU
10/5
PR24
100/F_4
1U/25V/X5R_6
PC162
*0.1U/50V/X7R_6
5
4
0.1U /50V/X7R _6
5VPCU 19,33,36,37,39,41,42,43
3
1
PR197
*200K/F_6
D/C#
PR63
*10K/F_6
PR55
*0/F_6
PR206
*200K/F_6
PR27
0.01/2W_7520
1 2
1P
Iin SENSE+ Iin SENSE-
V_CHG
V_CHG
PC151
10U / 25V/X6S_1206
5VPCU
PC29
5
1
0.1U /10V/X7R _4
+
4
3
-
PU1
2
LM V331M 5 X
2
PQ1
2N7002K-T1-E3/60V/300MA
1
PR191
2P
3
1
PC150
10U/25V/X6S_1206
321
PQ5
AO4413-30V-15A
876
5 4
0.1U/50V/X7R_6
D/C#
2
PQ16
*2N7002K-T1-E3/60V/300MA
PC47
10K_6
VIN
1 2
PR50
200K/F_6
PR51
100K/F_6
VAD-5
3
2
1
ACOK-2
D/C#
2
PQ9
2N7002K-T1-E3/60V/300MA
PQ66
2N7002K-T1-E3/60V/300MA
D/C# 36
ACOK
RB500V-40/40V/0.1A
3VPCU
1 2
PR8
100K/F_4
1 2
PR9
100K/F_4
PR189
100K/F_4
PD26
1 2
2 1
3
1
PR10
*0_4
1 2
BL/C# 36
PROJECT : CW4
Size Document Number Rev
Date: Sheet
Quanta Computer Inc.
CHARGER-MAX8724
1
38 44 Friday, November 03, 2006
1A C
of
A
B
C
D
E
5VPCU
PR220
0/F_6
1 1
Design Current: 10 A
OCP POINT: 13 A
1.8VSUS
2 2
3 3
1M/F_6
MAINON
2
PQ25
PDTC144EU/50V/30MA
8632VDD
PR82
VIN
FBMJ3216HS480NT 6A 1206
PR221
0.001_7520
PR210
1 2
+15V
PC66
*1UF/10V/X5R_6
1 3
1 2
PR208
*100K/F_4
0_4
2
1 2
+5V
PL19
+DDR_PWR_SRC
1 2
PC168
*100P/50V/NPO_4
1 2
PR195
*63.4K/F_4
PR80
10K_4
3
PQ24
CH2507SPT/60V/250MA
1
PC170
1 2
+
PC179
0.1U /10V/X7R _4
PR81
1 2
0_4
MAIND 37
PC167
1 2
+
10U/25V/X6S_1206
1.8V_P
+
PC178
470U /2.5V/12m _7343
+1.8VRUN
Place these CAPs
close to FETs
1 2
10U/25V/X6S_1206
+
PC177
1.8VSUS
PR79
1 2
*0_4
PC164
PC173
1 2
0.1U/50V/X7R_6
2200P/50V/X7R_4
1.5UH/SIL104R/13A/3.9mohm
*SSM14PT/40V/1A
220U / 4V/25m _7343
PQ23
AO4468
8
7
6
5
4
1 2
PC65
*0.047UF/50V/X7R_6
2 1
PD27
PC172
0.1U/50V/X7R_6
PR212
100K/F_4
PR57
56.2K/F_4
2 1
CH501H-40PT/30V/0.1A
1.8V_BST
1 2
1 2
PC81
0.1U/10V/X7R_4
5 2
PQ67
NTMFS4744NT1G
4
3
PL20
1 2
PD13
1
52
PQ68
NTMFS4835NT1G
4
2 1
3
1
Freq=30 0 K
PR95
MAINON 27,36,37,41,42,43,44
MAINON
0_4
PD19
*SDM10K45-7-F/40V/0.1A
+1.8V
1 2
PC64
10U / 4V/X6S_8
+1.8V 16,17,18,37
PC108
+
10/18
220U /4V/25m _ 7343
PR94
*0_4
PR93
*100K/F_4
PR96
*43K/F_4
3
2
1
4.7U 10V X5R 0805
MAX8632ETI+
PR217
0/F_6
1.8V_DH
1.8V_LX
PR218
1 2
*0_4
8632RE F
PC171
0.22U 25V X5R 0603
1.8V_LIM
8632VDD
1.8VSUS
PQ33
2
*MMBT3904/40V/200MA
1 3
PC80
*0.1U/10V/X7R_4
PC176
PU13
BST
20
18
19
1.8_DL
21
23
16
15
EN_42 1 5
HI0805R800R-10/5A_8
22
BST
DH
LX
DL
PGND1
OUT
FB
1
TON
3
REF
4
PR76
1 2
*0_4
PL6
10U/4V/X6S_8
PR211
8632VDD
1 2
10/F_6
PR213
*0_4
2
26
VDD
VIN
AVDD
POK1
OVP/UVP
POK2
SHDN
STBY
VTTI
REFIN
PGND2
VTT
VTTS
VTTR
TP0
GND
SKIP
ILIM
24
28
25
GND_DD R
1 2
PR75
0_4
PC77
PC83
1 2
1 2
PC175
1UF/10V/X5R_6
+DDR_PWR_SRC
17
5
6
27
1 2
7
PR207 0_4
13
14
11
12
9
10
SS
8
PC166
1000P/50V/X7R_4
PR61
0/F_6
0.1U /10V/X7R _4
PR173
1 2
0_4
1 2
PR219 0_4
PR193
1 2
20/F_4
PC165
0.1U/10V/X7R_4
0.9V_P
S M DDR_V RE F
PC44
1UF/10V/X5R_6
1
NC0
2 6
EN VO
3
VIN
4
NC1
1 2
PR92
0_0805
R2
SUSON
1 2
MAINON
1.8V_P
PU 6
SC4215
ADJ
7
4215FB
PR88
10K/F_4
1 2
PR137
10K_4
SUSON
NC2
GND0
GND1
PC34
0.1U/10V/X7R_4
PC154
0.1U /10V/X7R _4
5
8
9
R1
PR89
5.76K/F_4
+3V
HWPG 36,40,41,42,43,44
1 2
SUSON 36,37
PC32
10UF/6.3V/X5R_8
PC157
PC156
10U F/6.3V/X5R _8
PC68
1 2
PR47
1.8V_P
10U F/6.3V/X5R _8
10U / 4V/X6S_8
*10K_4
1 2
PC158
PC71
10U / 4V/X6S_8
10U F/6.3V/X5R _8
+3V
10/5
PJP4
1 2
PC69
0.1U/10V/X7R_4
0.9 Volt +/-5%
Design curr ent 1.05A
Peak curr ent 1.5A
SMDDR_VTERM
10/5
1. 2 5 V / 2 A
PJP1
1 2
+1.25V
Vo=0.8(R1+R2)/R2
4 4
PROJECT : CW4
Size Document Number Rev
A
B
C
D
Date: Sheet
Quanta Computer Inc.
DDR-MAX8632
E
39 44 Friday, November 03, 2006
of
1A C
5
PR39
10/18 Before is 100K
0/F_4
1 2
CPU_VID0 5
CPU_VID1 5
CPU_VID2 5
CPU_VID3 5
CPU_VID4 5
CPU_VID5 5
CPU_VID6 5
VR_TT# 4
+1.05V
5VSUS
10/5
1 2
1 2
PR48
0_4
2 1
D1
1SS400
PR45
*10K_4
1 2
PR35 0_4
1 2
PR200 0_4
PR205 0_4
PR42 0_4
PR204 0_4
PR41 0_4
PR203 0_4
PR40 0_4
PR202 0_4
1 2
PR199 0_4
1 2
PR32 0_4
1 2
PR201 0_4
PC24 470P/50V/X7R_4
PR21 71.5K/F_4
PC21 0.22U/10V/X7R_6
PR196
56_4
PR209
*56_4
0.1U/10V/X7R_4
SHDN
PC42
100P/50V/NPO_4
PR25
10_4
+3V
2.2U/10V/X5R_6
1 2
1 2
1 2
1 2
1 2
1 2
1 2
PR28
10K_4
PC33
Add layout note on pins 2 2 and 28 of MAX8770
controller. These nets have large voltage swings.
Need to route them away from the sensitive areas that
are trying to detect small cha nges in voltage, such as
the voltage sense VccSe nse VssSense lines.
PC142
#CLKEN
8770PSI
S HDN
DSTP
DPSLP
8770CCV
8770TIME
8770RE F
8770THRM
8770POUT
1 2
PO U T
8770VCC
2
PWRGD
1
CLKEN
31
D0
32
D1
33
D2
34
D3
35
D4
36
D5
37
D6
3
PSI
38
SHDN
40
DPRSTP
39
DPRSLPVR
9
CCV
7
TIME
11
REF
18
GND
41
EP
6
THRM
5
VRHOT
4
POUT
PU12 MAX8770
VRON 36,37,42,43
HWPG 36,39,41,42,43,44
SYS_SHDN# 4,41
10/18 Before is THERM_ALERT#
D D
DELAY_VR_PWRGOOD 7,21
VR_PWRGD_CK410# 21
PM_PSI# 4
H_DP R S T P # 4,7,19
DPRSLPV R 7,21
C C
PR29
10K/F_4
8770VCC
B B
1 2
PR23
*10K/F_4
4
3
2
1
5VSUS
PR22
0_6
8770VDD
1 2
PC25
10UF/10V/X5R_1206
+CPU_PWR_SRC
19
25
8770TON
8
TON
VCC
VDD
8770BST1
30
BST1
8770LX1
28
LX1
8770DH1
29
DH1
8770DL1
26
DL1
27
PGND1
12
FB
8770CCI
10
CCI
8770GN D S
13
GNDS
8770CSP1
17
CSP1
8770CSN1
16
CSN1
8770CSN2
15
CSN2
8770CSP2
14
CSP2
8770DH2
21
DH2
8770DL2
24
DL2
8770LX2
22
LX2
8770BST2
20
BST2
23
PGND2
PR16
0_6
1 2
PR7
200K/F_4
PR4
*3.48K/F_4
1 2
8770F B
PR182
3.48K/F_4
PC145
470P/50V/X7R_4
PR6
0/F_6
8770VDD
2 1
PD11
SDM10K45-7-F/40V/0.1A
BST1
1 2
1 2
PR198
PC169
0/F_6
0.22U/25V/X5R_8
NTMFS4835NT1G
PC4
*4700P/25V/X7R_4
PR5
100/F_4
PC9
1000P/50V/X7R_6
8770CCI2
PR177
100/F_4
PC144
1000P/50V/X7R_6
1 2
PC7
0.22U/25V/X5R_8
BST2
PD2
SDM10K45-7-F/40V/0.1A
2 1
Sense lines are 18 mil wide, Z0=27.4 Ohm.
Use differential routing with 7 mil spacing.
Route external layer with solid GND reference
(no split p lanes).
Use 25 mil separation fro m any other signal.
PQ4
NTMFS4744NT1G
PQ12
PR174 *100_4
PR175
20K/F_4
PR176
*100_4
PQ14
NTMFS4835NT1G
4
3
4
3
TP_VCCSENS E 5
T P _ VSSSEN SE 5
NTMFS4744NT1G
5 2
4
3
Place these CAPs
close to FETs
5 2
1
5 2
8770DL1
PQ11
NTMFS4835NT1G
1
VCC_CORE
PQ3
8770DL2
PQ13
1
NTMFS4835NT1G
+CPU_PWR_SRC
PC5
2200P/50V/X7R_4
5 2
1
1
1
PC153
1 2
+
100U 25V +-20% EC
PC51
Place t h e s e C A P s
clo se to F E Ts
PC1
1 2
0.1U /50V/X7R _6
PC52
* 1 500P/50V/N PO _6
PC6
1 2
1 2
0.1U/50V/X7R_6
4
3
5 2
4
3
5 2
4
3
10/05
HI0805R800R-00
PC19
PC18
1 2
1 2
+
+
10U/25V/X6S_1206
10U/25V/X6S_1206
0.36U/25A/+-20%/MPC1040LR36/1.05m ohm
PR52
*2.2_8
PR185
1 2
1.82K/F_4
PR186
4.02K/F_4
8770CSP1
* 1500P/50V/N P O_6
8770CSN1
1 2
1 2
8770CSP2
8770CSN2
PR180
0_4
+CPU_PWR_ S R C
PC8
PC155
1 2
+
2200P/50V/X7R _4
100U 25V + - 20% EC
0.36U/25A/+-20%/MPC1040LR36/1.05m ohm
PR36
*2.2_8
PR181
1.82K/F_4
PR178
4.02K/F_4
PR179
PL5
VIN
Frequency:297.8KHz
1 Phase OCP Point:24.65A
PL17
1 2
3
4
PR183
NTC 10K_6-B4.25K
PC143
0.22U/10V/ X7R_6
PC16
1 2
+
10U / 25V/X6S_1206
PL16
1 2
3
4
PR184
NTC/10K_6-B4.25K
PC141
0.22U/10V/ X7R_6
0_4
distribute evenly bet ween N side and S
side, preferably on secondary side.
Use differential routing a way from switch nodes
8770LX1 and 8770LX2
PC17
1 2
+
10U / 25V/X6S_1206
1 2
PC163
10/05
PL4
HI0805R800R-00
1 2
PC180
330 U/2V/ESR=7_7343
330U /2V/ESR = 7_7343
1 2
1 2
PC38
PC40
330 U/2V/ESR=7_7343
330 U/2V/ESR=7_7343
VIN
VCC_CORE
1 2
1 2
PC41
PC39
330U /2V/ESR = 7_7343
330U /2V/ESR = 7_7343
VCC_CORE
1 2
PC148
0.01U/25V_4
1 2
PC149
0.01U/25V_4
A A
PROJECT : CW4
Size Document Number Rev
5
4
3
2
Date: Sheet
Quanta Computer Inc.
CPU Core (MAX8770)
1
1A C
of
40 44 Friday, November 03, 2006
5
4
3
2
1
DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+15V_ALW
Ton:OUT1/OUT2 Switching Frequency
5V_AL
PC99
8
LD O
LD O R EFIN
BST1
DL 1
PAD
17 18 19 20 21 22 23
5V_AL
VIN
PU7
ISL6236
VDD
SYS_ S HDN# 4,40
1 2
RT C
SECFB
PR91
39K/F_4
VCC: 200kHz/300kHz
OPEN (REF): 400kHz/300kHz
GND: 400kHz/500kHz
PR114
1 2
*0_4
10/5
PR229
*0_4
1 2
PR226
1 2
0_4
1 2 3 4 5 6 7
TO N
VCC
ONL D O
GND
PGND
DL 2
24
PR230
0/F_6
close to
pin 22
REF
BST2
REFIN2
ILIM2
OUT2
SKIP#
PGOOD2
PR111
0_4
DH2
EN2
LX2
HWPG
1 2
32
31
30
29
28
27
26
25
PR100
0/F_6
1 2
SYS_SHDN#
2
PC194
0.1U/10V/X7R_4
249K/F_4
POK2 POK1
PR224 0_4
1 2
PC98
1UF/10V/X5R_6
PR109
1 2
1 2
PC89
0.1U/50V/X7R_6
DL3
1 2
PR106
0_4
R148
*10K_4
2
Q12
*DTC144EUA
1 3
PR112
1 2
0_4
DH3
PR102
39K/F_4
MAINON 27,36,37,39,42,43,44
R157
*10K_4
Q13
*DTC144EUA
1 3
PC94
*0.1U/10V/X7R_4
1 2
2
4
4
+DC1_PWR_SRC
Place these CAPs
close to FETs
PC79
1 2
0.1U / 50V/X7R_6
8 7 6
PQ31
AO4468
2
3 5 1
Rds=17.4m@V gs= 4.5V
PL21
IND-SMD/3.3UH/6.6A/PLC-1045-3R3/21mohm
8 7 6
PR222
PQ32
0_4
AO4468
2
3 5 1
Rds=17.4m@V gs= 4.5V
5V_AL
SYS_SHDN#
Q15
*DTC115EE
1 3
D5
2 1
*1SS400
HI0805R800R-10/5A_8
1 2
+
PC87
10U/25V/X6S_1206
PC78
1 2
2200P/ 50V/X7R_4
1 2
PR107
*0_4
1 2
POK2
POK1
10/18
PL7
PC183
1 2
0.1U /10V/X7R _4
VIN
Design Current:5A
OCP point is 6.5A
PC182
+
330U _6.3V_25m ohm _7343
+3V
PR223
*10K_4
HWPG
H W P G 36,39,40,42,43,44
THERM_ALERT# 4,21
3VPCU
PR228
0_8
D D
Design Curre nt: 5 A
OCP point is 6.5 A
5VPCU
C C
VIN
10/5
B B
+15V
PL8
HI0805R800R-10/5A_8
IND-SMD/3.3UH/6.6A/PLC-1045-3R3/21mohm
OUT1
PC181
PC86
+
1 2
0.1U /10V/X7R _4
330U _6.3V_25m ohm _7343
PR86
1 2
22_8
PC73
0.1U/50V/X7R_6
+DC1_PWR_SRC
1 2
PC85
+
Place these CAPs
close to FETs
PC84
1 2
Rds=17.4m@V gs= 4.5V
PR113
*0_4
1 2
FB1
PR110
0_4
1 2
PC70
*4.7/25V/X6S_8
1 2
PC72
0.1U/50V/X7R_6
*4.7U/25V/X6S_8
1 2
10U/25V/X6S_1206
PC82
1 2
0.1U /50 V/X7R_6
2200P/50 V/X7R_4
PL22
PD17
1
2
BAT5 4 S
PD18
1
2
BAT5 4 S
PC74
3
3
8 7 6
3 5 1
8 7 6
3 5 1
2
2
0.1U/50V/X7R_6
1 2
PD28
2 1
*5.6V/ZENER
+DC1_PWR_SRC
PQ30
AO4468
4
4
PQ29
AO4468
Rds=17.4m@V gs= 4.5V
0.1U/50V/X7R_6
1 2
*0.1U/10V/X7R_4
1 2
220K/F_4
DH5
0.1U/50V/X7R_6
DL5
PC75
1 2
PC76
1 2
PR90
200K/F_4
REFIN2: DYNAMIC 0 to 2V
REFIN2 = RTC: 1.05V Fixed
REFIN2 = VCC: 3.3V Fixed
PR108
PC91
PR225
390K_4
PR227
150K/F_4
PC100
4.7U/10V/X5R_8
1 2
PC195
0.1U/50V/X7R_6
PC97
1 2
1 2
0.01U/50V/X7R/0603
9
BYP
OUT1
10
OUT1
FB1 OUT2
11
FB1
12
ILIM1
13
PGOOD1
14
EN1
15
DH1
16
LX1
37
PAD
36
PAD
PAD
PAD
PR99
0/F_6
4.7U/10V/X5R_8
33 34 35
PC88
close to
pin 19
LDO = 5V (LDOREFIN = GND) or
LDOREFIN RANGE: 0.3V to 2V
LDO = 2x LDOREFIN
A A
PROJECT : CW4
Size Document Number Rev
5
4
3
2
Date: Sheet
Quanta Computer Inc.
DC TO DC-ISL6236
1
of
41 44 Friday, November 03, 2006
1A C
5
D D
4
3
2
1
1.05V_PVCC
PR19
2.2/F_6
PC27
PD12
*CH751H-40HPT_NC
2 1
PR33
PC50
470P/50V/X7R_4
1 2
1 2
0_4
PR46
150K/F_4
4.7P/50V/NPO_4
C C
MAINON 27,36,37,39,41,43,44
10/5
PR38
Vref=0.6V
1 2
PR49
3K/F_4
R2
Vref =Vout*R2/ (R1+R2)
B B
10/5
2.26K/F_4
R1
1 2
10/5
1.05V_EN
1 2
PC36
*0.047U/25V_4_NC
1.05V_COMP
1 2
PC45
PR43
1 2
75K/F_4
1 2
PC46
0.01U/50V_4
OCP Poi n t
Isen* Rsen = Id*Rds(on )
1U/10V/X5R_4
1 2
PR26
1 2
0_4
4
18
EN
PAD
COMP
1.05V_FB +1.05V_RUN_P
6
FB
7
8
PR30
3.65K/F_4
TEST
VO
ISL6269CRZ-T
ISEN
9 5 10
1. 05V _I S E N
1 2
1.05V_TEST
1. 05V _F CCM
F CCM
PGND
1 2
1. 05V _V CC
2 13 3
VCC
LG
11 16 12
*SHORT-1A
10/5
1
VIN
PGOOD
PHASE
BOOT
PVCC
PU 2
ISL6269A
PC28
4.7U/10V/X5R_6
1 2
PR190
PC152
0.1U /50V_6
PR15
0_4
19
PAD
17
PAD
15
14
UG
1.05V_PVCC
1.05V_DL
+3V
PR11
*10K_4
*SDM10K45-7-F/40V/0.1A
1 2
1.05V_LX
1.05V_DH
1.05V_BST
PR17
0_6
10/18
PD5
2 1
PC22
0.1U/50V/X7R_6
PR12
0/F_6
10/5
1.05V_PWR_SRC
H W P G 36,39,40,41,43,44
VRON 36,37,40,43
4
4
5VPCU
Vgs:4.5V Rds:7m
PC146
10U /25V/X6S_1206
8 7 6
PQ6
FDS8884
Vgs:4.5V Rds:23m
2
3 5 1
1.5UH_SIL104R-1R5_10A/8.1 mohm
8 7 6
PQ7
IRF7805Z
2
3 5 1
PC147
0.1U /50V_6
10/26
PL18
1 2
PC3
2200P/50V_4
PL12
HI0805R800R-00
+
PC159 0.1U /10V/X7R _4
VIN
Maximum Current: 7A
PC37 470U /2.5V/ESR 1 2_7343
+
PR59
1 2
12
0.001/7520/2W
PC160 * 2 20U / 4V/ESR 25_7343
OCP: 10A
+1.05V
A A
PROJECT : CW4
Size Document Number Rev
5
4
3
2
Date: Sheet
Quanta Computer Inc.
1.05V-ISL6269A
1
42 44 Friday, November 03, 2006
of
1A C
5
D D
4
3
2
1
1.5V_PVCC
PR146
2.2/F_6
1. 5V _F CCM
F CCM
PGND
1 2
1. 5V _V CC
2 13 3
VCC
LG
11 16 12
10/5
1
PAD
VIN
PAD
PGOOD
PHASE
BOOT
PVCC
PU11
ISL6269A
PC131
4.7U/10V/X5R_6
1 2
PC130
1.5V_COMP
1.5V_FB
1.5V_TEST
6
7
8
PR153
9.31K/F_4
1U/10V/X5R_4
1 2
PR148
0_4
18
PAD
COMP
FB
ISL6269CRZ-T
TEST
VO
1 2
4
EN
ISEN
9 5 10
1. 5V _I S E N
1 2
PD25
*CH751H-40HPT_NC
2 1
PR154
1 2
PR158
3K/F_4
PC134
470P/50V/X7R_4
1 2
OCP Poi n t
1 2
0_4
PR155
4.53K/F_4
PR157
150K/F_4
C C
MAINON 27,36,37,39,41,42,44
Vref=0.6V
B B
4.7P/50V/NPO_4
PR156
75K/F_4
1 2
PC135
0.01U/50V_4
1 2
1 2
PC133
1 2
1.5V_EN
PC132
*0.047U/25V_4
1 2
PC129
0.1U /50V_6
PR144
19
17
15
14
UG
1.5V_PVCC
+3V
PR143
*10K_4
0_4
*SDM10K45-7-F/40V/0.1A
1 2
1.5V_DH
1.5V_BST
1.5V_DL
10/18
PD24
2 1
0.1U/50V/X7R_6
10/5
PR147
0_6
PR145
0/F_6
PC128
5VPCU
1.5V_PWR_SRC
H W P G 36,39,40,41,42,44
4
4
8 7 6
Vgs:4.5V Rd s:17.4m
2
3 5 1
8 7 6
IRF7805Z
2
3 5 1
VRON 36,37,40,42
Vgs:4.5V Rd s:17.4m
PC127
PC121
0.1U /50V_6
PL25
PC118
10U /25V/X6S_1206
PQ39
AO4468
2.5UH_SDB1004-2R5_7.5A/10mohm
10/26
PQ38
HI0805R800R-00
2200P/50V_4
+1.5V_RUN_P 1.5V_LX
1 2
+
PC113
VIN
PL11
Maximum Current: 6A
PR123
1 2
12
0.001/7520/2W
PC200
0.1U /10V/X7R _4
330U /2.5V/ESR 1 2_7343
OCP: 10A
+1.5V
Isen* Rsen = Id*Rds(on )
PR236
*SHORT-1A
A A
PROJECT : CW4
Size Document Number Rev
5
4
3
2
Date: Sheet
Quanta Computer Inc.
1.5V-ISL6269A
1
of
43 44 Friday, November 03, 2006
1A C
1
2
3
4
5
VIN
PL23
FBMJ3216HS480NT 6A 1206
A A
1.2V/1.0V 10A
Place these CAPs
close to FETs
OCP POINT: 13 A
+VCC_GFX_CORE
B B
C C
PR116
0.001_7520
1 2
SSM14PT/40V/1A
MAINON 27,36,37,39,41,42,43
PD29
PL24
0.56U/+-20%/15A/1.7m ohm/ETQP4LR56WFC
+
PC103
+
PC196
330U /2.5V/ESR 12_7343
330U /2.5V/ESR 12_7343
PR103
0_4
2 1
PD20
PC92
0.1U/10V/X7R_4
PR97
*0_4
PR98
*100K/F_4
PR104
*43K/F_4
330U /2.5V/ESR 12_7343
PC90
*0.1U/10V/X7R_4
0.22U/10V/X7R_6
2
PC107
0.1U /10V/X7R _4
VGA_CORE
+
PC104
1 2
2 1
MAINON
*SDM10K45-7-F/40V/0.1A
1993_VIN
1 2
PC198
+
10U/25V/X6S_1206
PC106
0.1U/50V/X7R_6
1 2
PR231
1.47K/F_6
PC199
1 2
PR232
0/F_6
EN_42 1 5
1.8VSUS
PQ34
*MMBT3904 40V 200M A
1 3
1993_VIN
1 2
PC197
+
10U/25V/X6S_1206
1 2
PC105
2200P/50V/X7R_4
PD21
2 1
*SSM 14PT/40V/1A
HI0805R800R-10/5A_8
PQ36
NTMFS4744NT1G
5 2
4
3
1
52
4
PQ37
NTMFS4835NT1G
3
1
PL9
PC96
5VSUS
PR120
0_6
2 1
PC110
4.7U/10V/X5R_8
PD22
SDM10K45-7-F/40V/0.1A
PR117
0_6
VGA_BST
1993_DH
PC109
0.1U/50V/X7R_6
1993_LX
1993_DL
VGA_CSP VGA_P_RE F
VGA_CSN
PR233
0_6
1
NC0
2 6
EN VO
3
VIN
4
PC95
1 2
10U/4V/X6S_8
0.1U /10V/X7R _4
NC1
1 2
PR115
0_0805
PR122
20_4
1 2
+
17
15
16 21
18
20
11
12
10
9
PU 8
SC4215
ADJ
7
4215FB
PR105
R2
10K/F_4
1 2
VGA_P_VCC
19
22
24
VDD
PU9
MAX1993ETG
GND_ PAD
29
PC124
5
NC2
8
9
VCC
OVP/UVP
LSAT
SHDN
REFIN
FBLAN K V+SKIP
ILIM
2 1413
5
0.1U /10V/X7R _4
BST
DH
LX GATE
DL
GND
CSP
CSN
OUT
FB
PR118
0_4
GND0
GND1
R1
PR101
5.1K/F_4
PC116
1UF/10V/X5R_6
1993_VIN
1993PG
4
POK
3
PR129 *0_4
23
Gate
VGA_REFIN
7
1 2
PC119
470P/50V/X7R_4
8
OD
PR130
*0_4
1
TON
6
REF
PR234
100K/F_4
1 2
PR235
30K/F_4
PC102
1 2
Vo=0.8(R1 +R2)/R2
PR128 0_4
10U / 4V/X6S_8
PC123
1UF/10V/X5R_6
1 2
PC101
1 2
10U / 4V/X6S_8
+3V
PR125
75K/F_4
PR124
16.9K/F_4
PC93
10/18
PR119
10K_4
PR121
Gate
*0_4
PR135
*10K_4
HWPG 36,39,40,41,42,43
PR127
75K/F_4
VGA_P_REF
R5
R6
R7
V_PWRCNTL
Vout(Low)=Vref(R6/R5+R6)
Vout(High)=Vref(R6+R7/R5+R6+R7)
0.1U /10V/X7R _4
+3V
1 2
10/5
PJP2
GFX_CORE_CNTRL 16
HI
M22
1.1V LO
1V
1. 2V/ 2A
+1.2V_GFX_PCIE
10/5
*SDM10K45-7-F/40V/0.1A
PC120
0.1U/10V/X7R_4
PR26 =16. 9K
PD23
2 1
PR126
0_4
MAINON
D D
PROJECT : CW4
Size Document Number Rev
1
2
3
4
Date: Sheet
Quanta Computer Inc.
VGA (MAX1993)
5
of
44 44 Friday, November 03, 2006
1A C