QUANTA BU5 Schematics

1

2

3

4

5

6

7

8

PCB STACK UP

LAYER 1 : TOP

LAYER 2 : GND

LAYER 3 : IN1

LAYER 4 : SVCC

LAYER 5 : IN2

A A

LAYER 6 : IN3

LAYER 7 : GND

LAYER 8 : BOT

DDRIII-SODIMM1 DDRIII-SODIMM2

SATA - HDD

BU5 Block Diagram

P13,14

P21

Dual Channel DDR III 800/1066/1333 MHZ

Sandy Bridge(UMA+VGA)

rPGA 989

P3,4, 5, 6,

DDR SYSTEM MEMORY

FDI

DMI

PCI-E

INT_LVDS

Port-A

INT_CRT

INT_HDMI

Graphics Interfaces

Port-B

HDMI-passive level shift

USB-11

LCD/CCD Con.

CRT Con.

P16

HDMI Con.

P17

P16

DMI(x4)

CougarPoint

PCH

P7,8, 9, 10, 11,12

LPC

DMI

PCI-Express

PCI-E

PCIE-3

PCIE-6

PCIE-1

NVRAM

USB-3

USB-13

USB-1

3G

P18

WLAN

P18

Giga/10/100 Lan

USB 3.0

USB 3.0 Conn.

POWER SYSTEM

ISL88731C PM6686 UP6163 RT8240 TPS51461 ISL95835HRTZ

P23

P19

G966A

Azalia

FDI

SATA

USB

RTC

IHDA

SATA - ODD

B B

USB Con.

Daughter board

SIM CARD.

Cardreader Con. 3 IN 1

C C

P21

SATA 0

SATA 4

USB-8,USB-9

USB-5

USB-4

USB 2.0 (Port0~13)

BATTERY

P8

P18

P20

+VCC_CORE

+1.5V +1.5VSUS

+VTT +1.05V

01

P28

P29

P30

P31

P32

P33

P34

+1.8V

HALL Sensor

P17

EC

SPI Flash

Touch Pad /B Con.

P27P25 P25P3 P25

P27

Power /B Con.

+1.5V_S5

+3VPCU +3V_S5 +3V +5VPCU +5V_S5 +5V +SMDDR_VTERM +SMDDR_VREF

Audio Codec

Port-A

Port-B

HP SPK Con.MIC JACK

D D

P22 P22 P22

P22

FAN

K/B Con.

+VCCSA

Quanta Computer Inc.

BU5

PROJECT :

Block Diagram

PROJECT :

1 35Wednes day, Novembe r 17, 2010

of

8

Size Document Numb er Rev

Date: Sheet

1

2

3

4

5

6

Date: Sheet

7

2A

1

2

3

4

5

6

7

8

02

Table of Contents

PAGE DESCRIPTION

A A

Schematic Block Dia gram

1

Front Page

2

Processor

3-6

7-12

PCH

8

RTC RTC

13-14

DDRIII SO-DIMM

17

VGA Connector

LCD Panel

16

CRT & CRT BUS SWITCH

CCD

HALL SENSOR&BACK LIGHT SWITCH

19

Display Port

20

HDMI comm part

HDMI for GM

SATA ODD

21

Main SATA HDD & 2nd SATA HDD HDD

B B

C C

D D

G-Sensor H3D

5 IN 1 Card reader

22

IEEE1394 FIW

MINI Card (Wi-Fi & WIM AX)

23

MINI Card 2nd

MINI Card 3nd

TMA Connector TMA

24

INT KeyBoard & K/B LED Power KBC

LED Board LED

TP&FP board TPD,FPD

Bluetooth Connector BTM

Felica Connector FEC

MMB Connector MMB

Power SW PSW

B-CAS Connector BCS

25

New Card (Express Card) EXC

E-SATA comb USB ESA

USB Connector USB

Audio & USB Board USB,ADO

Light Sensor LSN

Satellite LED

RF LED / WIMAX LED / Kill SW KSW

26

EC WP8763LDG/WPC8769L(O)

CIR CIR

Codec (CX20583)

27

28

FM Tunner

Modem Connector MDM

HOLE

29

Atheros LAN

30

NVRAM Connecyor

31

Charger (ISL6251A)

32

System 5V/3V (ISL6237)

33

CPU CORE (ISL62882)

BOI-FUNCTIONS

CPU

CLG

DDR

VGA

LDS

CRT

CCD

HSR

DPP

HDM

HMG

ODD

MMC

WLN

MNC

LED

KBC

ADO

FMM

LAN

NVR

PWM

34

VAXG (ISL62881)

+VTT (UP6111A)

35

+1.05V (UP6111AQDD)

36

DDR 1.5V (TPS51116)

37

Discharge (1.5V_S5/1.8V)

38

Power Tree Table

39

PCH Power Plane

40

Power Management

41

Change List

42

POWER PLANE

VIN

+VCCRTC

+3V

+3V_S5

+3V_HDP

+3VPCU

+5V

+5V_S5

+5VPCU

+5V_TMA

WIMAX_P

+1.8V

+1.5V

+1.5V_S5

+VCC_CORE

+VTT

+1.05V

+VAXG

GND PLANE PAGE

GND_SIGNAL

CARD_GND

AGND_DC/DC

GND ALL

BOI-FUNCTIONSPAGE DESCRIPTION

+3.0V~+3.3V

+1.05V~+1.1V

PWM

VOLTAGE

10V~+19V

+3.3V

+5V

+3.3V

+1.8V

+1.5V

+1.5V S5_ON

+1.5V+1.5V_SUS SUSON

+1.05V

32

21

31

CONTROL SIGNAL

MAIN_ON

S5_ON

MAIN_ON

AC/DC Insert enable

MAIN_ON S0

S5_ON S0~S5

AC/DC Insert enable

MAIN_ON

WMAX_P for EC

MAIN_ON

VRON

MAIN_ON

GFXVR_EN

Value Code

1

IV@

2

U3@

3

U2@

4

HM@

5

IHM@

6

EHM@

7

3G@

8

C@

9

MDC@ Modem

10

S3@

11

NS3@

12

E@ EMI

13

51@

14

52@

15

GS@ G-SENSOR

16

NGS@ No G-SENSOR

17

Power States

ACTIVE IN

S0~S5

S0

S0~S5

S0

S0~S5

S0

S0~S5

S0~S3

S0

FUNCTIONSITEM

DISCRETEEV@

UMA

USB 3.0

USB 2.0 (colay W USB 3.0)

HDMI

Internal HDMI

External HDMI

3G

Cost issue

S3 Power Reduction

No S3 Power Reduction

1G LAN

10/100 LAN

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

POWER STAGE AND BOI-FUNCTION

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

PROJECT :

7

BU5

2A

2 35Wednesday, November 17, 2010

2A

8

<CPU>

D D

C C

<CPU>

B B

FAN Control-->For one FAN solution

TEMP_AL ERT#[10,27]

A A

5

Sandy Bridge P rocessor (DMI, PEG,FDI)

U22A

INT_eDP _HPD_Q

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

CPU-989P -rPGA

<CPU>

+VTT

R78 24.9/F_4R78 24.9/F _4

W=12mil; S=15mil; L<500mil

+VTT

R74 24.9/F_4R74 24.9/F _4

W=12mil; S=15mil; L<500mil

DMI_TXN0[7] DMI_TXN1[7] DMI_TXN2[7] DMI_TXN3[7]

DMI_TXP 0[7] DMI_TXP 1[7] DMI_TXP 2[7] DMI_TXP 3[7]

DMI_RXN0[7] DMI_RXN1[7] DMI_RXN2[7] DMI_RXN3[7]

DMI_RXP 0[7] DMI_RXP 1[7] DMI_RXP 2[7] DMI_RXP 3[7]

FDI_TX N0[7 ] FDI_TX N1[7 ] FDI_TX N2[7 ] FDI_TX N3[7 ] FDI_TX N4[7 ] FDI_TX N5[7 ] FDI_TX N6[7 ] FDI_TX N7[7 ]

FDI_TX P0[7] FDI_TX P1[7] FDI_TX P2[7] FDI_TX P3[7] FDI_TX P4[7] FDI_TX P5[7] FDI_TX P6[7] FDI_TX P7[7]

FDI_FS YNC0[7] FDI_FS YNC1[7]

FDI_INT[7]

FDI_LS YNC0[7] FDI_LS YNC1[7]

eDP_CO MP

TP13TP13

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6]

DMI

PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4]

Intel(R) FDI

PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11]

PCI EXPRESS* - GRAPHICS

PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

eDP

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

eDP_CO MP

PEG_CO MP

<THC>

+3V

2

1

Q25 *2N7002_200MAQ25 *2N7002_200MA

REV-A1A Reserve Q8003

5

3

40mils

+5V

C378 2.2U/6.3V_6XC378 2.2U/6.3V_6X

CPUFAN#_ ON_R_1TEMP_AL ERT#

VFAN1[27]

1

4

U20

VIN2VO

/FON

VSET

G991P1 1U

3

5

GND

6

GND

7

GND

8

GND

J22 J21 H22

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

Processor pull-upDP & PEG CompensationFDI Disabling (Discrete O nly)

40mils

TH_FAN_P OWER1

C376

10U/6.3V_ 8X

4

PEG_CO MP

H_PROCHO T#

XDP_TMS XDP_TD I_R XDP_TD O_R XDP_TC LK XDP_TR ST#

4

3

Sandy Bridge P rocessor (CLK, MISC,JTAG)

U22B

H_SNB_IV B#[8]

EC_PEC I[27]

H_PROCHO T#[27,33]

REV-A1A add 0.01uF capacito r parallel 10K resistor can p ass turbo boot

PM_SYNC[7]

H_PWRG OOD[10]

PM_DRAM_ PWRGD _R[15]

R324 *75/F_4R324 *75/F_4

+VTT

CPU_PLT RST# CPU_PLT RST#_R

R331 62_4R331 62_4

R315 51_4R315 51_4 R312 51_4R312 51_4 R11 *51_4R11 *51_4 R314 51_4R314 51_4 R321 51_4R321 51_4

FANSIG1[27]

C361

0.01U/25V _4X

+VTT

FANSIG1

C362

*0.01U/25V _4X

Level Shift

+3V

R308

*10K_4

85205-0 300L

PLTRST #[9,18,19,2 3,27]

R325 1.5K/F_4R325 1.5K/F_ 4

VL

CN13

+3VPCU

1 2 3

3

TP8TP8

TP63TP63

R330 56_4R3 30 56_4

R328 0_4R328 0_4

R322 0_4R32 2 0_4 R320 10K_4R320 10K_4

C393 *0.1U/10V_ 4XC393 *0.1U/10V _4X

R323 *43_4R323 *43 _4

+3V_S5

U21

1

VCC5NC

2

IN

4

GND3OUT

*74LVC1 G07GW

CPU Thermal sensor / MB Local TEMP

R496 150_4R 496 150_4

R14 *1 50_4R14 *150_ 4

VL

Rset(Kohm)=0.0012T*T-0.9308T+96.147,Shut down on 86dgree Hysteresis is 30C

C26

PROC_SELECT#

AN34

SKTOCC #

TP_CAT ERR#

H_PROCHO T#_R

PM_THRMTRI P#

PM_SYNC_R

H_PWRG OOD_R

PM_DRAM_ PWRGD _R

C339

C339 *0.1U/10V_ 4X

*0.1U/10V_ 4X

R319

R319 750/F_4

750/F_4

C18

0.1U/10V_ 4X

0.1U/10V_ 4X R497 0_4R49 7 0_4

R498 *0_4R4 98 *0_4

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

CPU-989P -rPGA

CPU_PLT RST#CPU_PLT RST#

CPU_PLT RST#_R

U3

5

+3VPCU_HW _SD

VCC

4

HYST

G708T1 UU3G708T1 U

REV-C3A Change VCC PIN5 of U3 from +3VPCU to VL Add R496,R497,R499 Reverse R14,R498,R31,R24,Q3

1

SET

2

GND

3

OT#

MISCTHERMALPWR MANAGEMENT

Thermal Trip

<THC>

R13 24.9K/F_4R13 24.9K/F_ 4

2

1

03

A28

CLK_CP U_BCLKP _R

BCLK

A27

CLK_CP U_BCLKN_ R

BCLK#

A16

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

DDR3

MISC

DDR3

MISC

JTAG & BPM

DELAY_V R_PWR GOOD[7,33]

THER_SHD #

2

CLK_DP LL_SSC LKP_R

A15

CLK_DP LL_SSC LKN_R

R8

AK1

SM_RCOMP_ 0

SM_RCOMP[0]

A5

SM_RCOMP_ 1

SM_RCOMP[1]

A4

SM_RCOMP_ 2

SM_RCOMP[2]

REV-A1A Change from 26.1/F_4 to 25.5/F_4

AP29

XDP_PR DY#_R

PRDY#

AP27

XDP_PR EQ#

PREQ#

AR26

XDP_TC LK

TCK

AR27

XDP_TMS

TMS

AP30

XDP_TR ST#

TRST#

AR28

XDP_TD I_R

TDI

AP26

XDP_TD O_R

TDO

AL35

XDP_DB R#_R

DBR#

AT28

XDP_BP M0_R

BPM#[0]

AR29

XDP_BP M1_R

BPM#[1]

AR30

XDP_BP M2_R

BPM#[2]

AT30

XDP_BP M3_R

BPM#[3]

AP32

XDP_BP M4_R

BPM#[4]

AR31

XDP_BP M5_R

BPM#[5]

AT31

XDP_BP M6_R

BPM#[6]

AR32

XDP_BP M7_R

BPM#[7]

PM_THRMTRI P#

+3VPCU+3V PCU

R24

R31

*330_4

*10K_4

2

Q3

1 3

*MMBT3904 -7-F_200 MA

R499 0_4R49 9 0_4

3

R357 0X2R357 0X2

R362 1K_4R362 1K_4 R361 1K_4R361 1K_4

R34 140/F_4R34 140/F_4 R368 25.5/F_ 4R3 68 25.5/F_4 R367 200/F_ 4R36 7 200/F_4

TP7TP7 TP5TP5

TP1TP1

R332 0_4R33 2 0_4

TP2TP2 TP3TP3 TP58TP58 TP57TP57 TP4TP4 TP61TP61 TP59TP59 TP60TP60

+VTT

3

2

1

R40 100K_4R40 100K_4

R41

R41 1K_4

1K_4

2

1 3

Size Document Number Rev

Date: She et

Monday, Decem ber 20, 2 010

Date: She et of

Monday, Decem ber 20, 2 010

Date: She et of

Monday, Decem ber 20, 2 010

CLK_CP U_BCLKP [9]

241

CLK_CP U_BCLKN [9]

+VTT

CPU_DRA MRST# [15]

XDP_DB RST# [7]

Q6

2N7002_ 200MAQ62N7002_ 200MA

Q5

Q5 MMBT3904 -7-F_200 MA

MMBT3904 -7-F_200 MA

SYS_SHDN# [29 ]

Quanta Computer Inc.

PROJECT :

Sandy Bridge 1/4

1

SYS_SHDN# [29 ]

PM_THRMTRI P# [10]

BU5

3 35

of

2A

<CPU>

5

4

Sandy Bridge Processor (DDR3)

U22C

3

2

1

04

U22D

AB6

SA_CLK[0 ]

M_A_DQ[63:0][13]

D D

C C

B B

M_A_BS#0[13] M_A_BS#1[13] M_A_BS#2[13]

M_A_CAS#[13] M_A_RAS#[13] M_A_WE#[13]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

AM12 AM11

AP11 AN11 AL12

AL11 AP12 AN12 AJ14 AH14 AL15 AK15 AL14 AK14 AJ15 AH15

AE10 AF10

C5

SA_DQ[0]

D5

SA_DQ[1]

D3

SA_DQ[2]

D2

SA_DQ[3]

D6

SA_DQ[4]

C6

SA_DQ[5]

C2

SA_DQ[6]

C3

SA_DQ[7]

F10

SA_DQ[8]

F8

SA_DQ[9]

G10

SA_DQ[10 ]

G9

SA_DQ[11 ]

F9

SA_DQ[12 ]

F7

SA_DQ[13 ]

G8

SA_DQ[14 ]

G7

SA_DQ[15 ]

K4

SA_DQ[16 ]

K5

SA_DQ[17 ]

K1

SA_DQ[18 ]

J1

SA_DQ[19 ]

J5

SA_DQ[20 ]

J4

SA_DQ[21 ]

J2

SA_DQ[22 ]

K2

SA_DQ[23 ]

M8

SA_DQ[24 ]

N10

SA_DQ[25 ]

N8

SA_DQ[26 ]

N7

SA_DQ[27 ]

M10

SA_DQ[28 ]

M9

SA_DQ[29 ]

N9

SA_DQ[30 ]

M7

SA_DQ[31 ]

AG6

SA_DQ[32 ]

AG5

SA_DQ[33 ]

AK6

SA_DQ[34 ]

AK5

SA_DQ[35 ]

AH5

SA_DQ[36 ]

AH6

SA_DQ[37 ]

AJ5

SA_DQ[38 ]

AJ6

SA_DQ[39 ]

AJ8

SA_DQ[40 ]

AK8

SA_DQ[41 ]

AJ9

SA_DQ[42 ]

AK9

SA_DQ[43 ]

AH8

SA_DQ[44 ]

AH9

SA_DQ[45 ]

AL9

SA_DQ[46 ]

AL8

SA_DQ[47 ] SA_DQ[48 ] SA_DQ[49 ] SA_DQ[50 ] SA_DQ[51 ] SA_DQ[52 ] SA_DQ[53 ] SA_DQ[54 ] SA_DQ[55 ] SA_DQ[56 ] SA_DQ[57 ] SA_DQ[58 ] SA_DQ[59 ] SA_DQ[60 ] SA_DQ[61 ] SA_DQ[62 ] SA_DQ[63 ]

SA_BS[0 ] SA_BS[1 ]

V6

SA_BS[2 ]

AE8

SA_CAS#

AD9

SA_RAS#

AF9

SA_WE #

DDR SYSTEM MEMORY A

SA_CLK# [0]

SA_CKE[0 ]

SA_CLK[1 ]

SA_CLK# [1]

SA_CKE[1 ]

RSVD_TP[1] RSVD_TP[2] RSVD_TP[3]

RSVD_TP[4] RSVD_TP[5] RSVD_TP[6]

SA_CS#[0 ]

SA_CS#[1 ] RSVD_TP[7] RSVD_TP[8]

SA_ODT[0]

SA_ODT[1] RSVD_TP[9]

RSVD_TP[10 ]

SA_DQS# [0] SA_DQS# [1] SA_DQS# [2] SA_DQS# [3] SA_DQS# [4] SA_DQS# [5] SA_DQS# [6] SA_DQS# [7]

SA_DQS[0 ] SA_DQS[1 ] SA_DQS[2 ] SA_DQS[3 ] SA_DQS[4 ] SA_DQS[5 ] SA_DQS[6 ] SA_DQS[7 ]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10 ] SA_MA[11 ] SA_MA[12 ] SA_MA[13 ] SA_MA[14 ] SA_MA[15 ]

AA6 V9

AA5 AB5 V10

AB4 AA4 W9

AB3 AA3 W10

AK3 AL3 AG1 AH1

AH3 AG3 AG2 AH2

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_CLKP0 [13] M_A_CLKN0 [13] M_A_CKE0 [13]

M_A_CLKP1 [13] M_A_CLKN1 [13] M_A_CKE1 [13]

M_A_CS#0 [13] M_A_CS#1 [13]

M_A_ODT0 [13] M_A_ODT1 [13]

M_A_DQSN[7:0] [13]

M_A_DQSP[7:0] [13]

M_A_A[15:0] [13]

M_B_DQ[63:0][14]

M_B_BS#0[14] M_B_BS#1[14] M_B_BS#2[14]

M_B_CAS#[14] M_B_RAS#[14] M_B_WE#[14]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AJ11

AH11

AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA10

C9

SB_DQ[0]

A7

SB_DQ[1]

D10

SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10 ]

G1

SB_DQ[11 ]

G5

SB_DQ[12 ]

F5

SB_DQ[13 ]

F2

SB_DQ[14 ]

G2

SB_DQ[15 ]

J7

SB_DQ[16 ]

J8

SB_DQ[17 ]

K10

SB_DQ[18 ]

K9

SB_DQ[19 ]

J9

SB_DQ[20 ]

J10

SB_DQ[21 ]

K8

SB_DQ[22 ]

K7

SB_DQ[23 ]

M5

SB_DQ[24 ]

N4

SB_DQ[25 ]

N2

SB_DQ[26 ]

N1

SB_DQ[27 ]

M4

SB_DQ[28 ]

N5

SB_DQ[29 ]

M2

SB_DQ[30 ]

M1

SB_DQ[31 ]

AM5

SB_DQ[32 ]

AM6

SB_DQ[33 ]

AR3

SB_DQ[34 ]

AP3

SB_DQ[35 ]

AN3

SB_DQ[36 ]

AN2

SB_DQ[37 ]

AN1

SB_DQ[38 ]

AP2

SB_DQ[39 ]

AP5

SB_DQ[40 ]

AN9

SB_DQ[41 ]

AT5

SB_DQ[42 ]

AT6

SB_DQ[43 ]

AP6

SB_DQ[44 ]

AN8

SB_DQ[45 ]

AR6

SB_DQ[46 ]

AR5

SB_DQ[47 ]

AR9

SB_DQ[48 ] SB_DQ[49 ]

AT8

SB_DQ[50 ]

AT9

SB_DQ[51 ] SB_DQ[52 ]

AR8

SB_DQ[53 ] SB_DQ[54 ] SB_DQ[55 ] SB_DQ[56 ] SB_DQ[57 ] SB_DQ[58 ] SB_DQ[59 ] SB_DQ[60 ] SB_DQ[61 ] SB_DQ[62 ] SB_DQ[63 ]

AA9

SB_BS[0 ]

AA7

SB_BS[1 ]

R6

SB_BS[2 ]

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE #

DDR SYSTEM MEMORY B

SB_CLK[0 ]

SB_CLK# [0]

SB_CKE[0 ]

SB_CLK[1 ]

SB_CLK# [1]

SB_CKE[1 ]

RSVD_TP[11 ] RSVD_TP[12 ] RSVD_TP[13 ]

RSVD_TP[14 ] RSVD_TP[15 ] RSVD_TP[16 ]

SB_CS#[0 ]

SB_CS#[1 ] RSVD_TP[17 ] RSVD_TP[18 ]

SB_ODT[0]

SB_ODT[1] RSVD_TP[19 ] RSVD_TP[20 ]

SB_DQS# [0] SB_DQS# [1] SB_DQS# [2] SB_DQS# [3] SB_DQS# [4] SB_DQS# [5] SB_DQS# [6] SB_DQS# [7]

SB_DQS[0 ] SB_DQS[1 ] SB_DQS[2 ] SB_DQS[3 ] SB_DQS[4 ] SB_DQS[5 ] SB_DQS[6 ] SB_DQS[7 ]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10 ] SB_MA[11 ] SB_MA[12 ] SB_MA[13 ] SB_MA[14 ] SB_MA[15 ]

AE2 AD2 R9

AE1 AD1 R10

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_CLKP0 [14] M_B_CLKN0 [14] M_B_CKE0 [14]

M_B_CLKP1 [14] M_B_CLKN1 [14] M_B_CKE1 [14]

M_B_CS#0 [14] M_B_CS#1 [14]

M_B_ODT0 [14] M_B_ODT1 [14]

M_B_DQSN[7:0] [14]

M_B_DQSP[7:0] [14]

M_B_A[15:0] [14]

CPU-989P-rPGA

A A

5

4

3

CPU-989P-rPGA

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Monday, December 20, 2010

2

Monday, December 20, 2010

PROJECT :

Sandy Bridge 2/4

1

BU5

4 35

2A

<CPU>

5

Sandy Bridge Processor (POWER)

U22F

C414

C414 10U/6.3V_8X

10U/6.3V_8X

C409

C409 10U/6.3V_8X

10U/6.3V_8X

C84

10U/6.3V_8X

C53

C418

C400

C400 10U/6.3V_8X

10U/6.3V_8X

C413

C413 10U/6.3V_8X

10U/6.3V_8X

C101

10U/6.3V_8X

C402

*C@10U/6.3V_6X

C58

*C@10U/6.3V_6X

+VCC_CORE

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100

CPU-989P-rPGA

D D

C417

C399

C74

C74 10U/6.3V_8X

10U/6.3V_8X

C C

C394

C394 10U/6.3V_8X

10U/6.3V_8X

B B

A A

C399

C95

10U/6.3V_8X

C420

C420 10U/6.3V_8X

10U/6.3V_8X

C64

10U/6.3V_8X

C424

*C@10U/6.3V_6X

C95 10U/6.3V_8X

10U/6.3V_8X

C410

C410 10U/6.3V_8X

10U/6.3V_8X

C108

10U/6.3V_8X

C412

*C@10U/6.3V_6X

10U/6.3V_8X

C416

C416 10U/6.3V_8X

10U/6.3V_8X

C408

*C@10U/6.3V_6X

REV-A1A Change Footprint from 0804 to 0603

5

C403

C403 10U/6.3V_8X

10U/6.3V_8X

C395

C395 10U/6.3V_8X

10U/6.3V_8X

C404

*C@10U/6.3V_6X

POWER

CORE SUPPLY

4

+

C441

C441 *C@330U/2V_7343P_E6b

*C@330U/2V_7343P_E6b

AH13

VCCIO1

AH10

VCCIO2

AG10

VCCIO3

AC10

VCCIO4

Y10

VCCIO5

U10

VCCIO6

P10

VCCIO7

L10

VCCIO8

J14

C405

J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

AJ29 AJ30 AJ28

AJ35 AJ34

B10 A10

H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT

VCC_SENSE_R VSS_SENSE_R

VCCP_SENSE_R VSSP_SENSE_R

C405 10U/6.3V_8X

10U/6.3V_8X

C401

C401 10U/6.3V_8X

10U/6.3V_8X

C207

C207 *10U/6.3V_8X

*10U/6.3V_8X

R77 0_4R77 0_4

R339 0_4R339 0_4 R341 0_4R341 0_4

R359 0_4R359 0_4 R360 0_4R360 0_4

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30

PEG AND DDR

VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE VSSIO_SENSE

SENSE LINES SVID

4

+VTT

C105

C206

10U/6.3V_6X

10U/6.3V_8X

C419

C415

10U/6.3V_8X

C205

C208

*10U/6.3V_8X

R340 100 _4R340 100_4

R342 100 _4R342 100_4

R370 10_ 4R370 10_ 4

R371 10_ 4R371 10_ 4

REV-C3A Mount R359,R360,R370,R371

C396

C396 10U/6.3V_8X

10U/6.3V_8X

C57

C57 10U/6.3V_6X

10U/6.3V_6X

C442

C442 *10U/6.3V_8X

*10U/6.3V_8X

+VTT

+VCC_CORE

+VTT

3

C209

C209 10U/6.3V_8X

10U/6.3V_8X

C106

C106 10U/6.3V_6X

10U/6.3V_6X

VCC_SENSE [33] VSS_SENSE [33]

VCCP_SENSE [31] VSSP_SENSE [31]

3

C411

C411 10U/6.3V_8X

10U/6.3V_8X

C425

C425 10U/6.3V_8X

10U/6.3V_8X

+1.8V

+VAXG

C25

C25 IV@10U/6.3V_8X

IV@10U/6.3V_8X

C22

C22 IV@10U/6.3V_8X

IV@10U/6.3V_8X

C382

C382 *C@10U/6.3V_8X

*C@10U/6.3V_8X

R317

R317 *EV@0_4

*EV@0_4

C24

C385

IV@10U/6.3V_8X

IV@10U/6.3V_6X

C27

C26

IV@10U/6.3V_8X

C388

C387

*C@10U/6.3V_6X

PC260

PC259

22U/6.3V_8X

REV-C3A Add PC259,PC260 for VAXG issue

C147

C139

C140

1U/6.3V_4X

C140 1U/6.3V_4X

1U/6.3V_4X

*C@10U/6.3V_8X

2

Sandy Bridge Processor (GRAPHIC POWER)

POWER

U22G

AT24

VAXG1

AT23

VAXG2

AT21

VAXG3

AT20

VAXG4

AT18

VAXG5

AT17

VAXG6

AR24

VAXG7

AR23

VAXG8

AR21

VAXG9

AR20

VAXG10

AR18

VAXG11

AR17

VAXG12

AP24

VAXG13

AP23

VAXG14

AP21

C384

VAXG15

AP20

IV@10U/6.3V_6X

VAXG16

AP18

VAXG17

AP17

VAXG18

AN24

VAXG19

AN23

VAXG20

AN21

VAXG21

AN20

VAXG22

AN18

C23

VAXG23

AN17

IV@10U/6.3V_8X

VAXG24

AM24

VAXG25

AM23

VAXG26

AM21

VAXG27

AM20

VAXG28

AM18

VAXG29

AM17

VAXG30

AL24

C383

VAXG31

AL23

*C@10U/6.3V_8X

VAXG32

AL21

VAXG33

AL20

VAXG34

AL18

VAXG35

AL17

VAXG36

AK24

VAXG37

AK23

VAXG38

AK21

VAXG39

AK20

VAXG40

AK18

VAXG41

AK17

VAXG42

AJ24

VAXG43

AJ23

VAXG44

AJ21

VAXG45

AJ20

VAXG46

AJ18

VAXG47

AJ17

VAXG48

AH24

VAXG49

AH23

VAXG50

AH21

VAXG51

AH20

VAXG52

AH18

VAXG53

AH17

VAXG54

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

+

C439

*C@330U/2V_7343P_E6b

CPU-989P-rPGA

Layout note: need routing together and ALERT need between CLK and DATA

H_CPU_SVIDCLK

R337 0_4R337 0_4

+VTT

R336

R336 130/F_4

130/F_4

H_CPU_SVIDDAT

H_CPU_SVIDALRT#

R334 43_ 4R334 43_ 4

2

GRAPHICS

1.8V RAIL

R338 0_4R338 0_4

+VTT

R335

R335 75/F_4

75/F_4

SENSE

DDR3 -1.5V RAILS

SA RAIL VREFMISC

VAXG_SENSE

VSSAXG_SENSE

LINES

VCCSA_SENSE

VCCSA_VID1

SM_VREF

AK35

R46 0_4R46 0_4

AK34

R43 0_4R43 0_4

AL1

W=20mil ; S=20 mil; L<500mil

AF7

VDDQ1

AF4

VDDQ2

AF1

VDDQ3

AC7

VDDQ4

AC4

VDDQ5

AC1

VDDQ6

Y7

VDDQ7

Y4

VDDQ8

Y1

VDDQ9

U7

VDDQ10

U4

VDDQ11

U1

VDDQ12

P7

VDDQ13

P4

VDDQ14

P1

VDDQ15

M27

VCCSA1

M26

VCCSA2

L26

VCCSA3

J26

VCCSA4

J25

VCCSA5

J24

VCCSA6

H26

VCCSA7

H25

VCCSA8

H23

VCCSA_VCCSSENSE _R

C22

FC_C22

C24

R365 10K _4R365 10K_4

VR_SVID_CLK [33]

VR_SVID_DATA [33]

VR_SVID_ALERT# [33]

+VDDR_REF_CPU

R372 10K_4R372 10K_4

1

R42 100_4R42 100_4

+VAXG

VCC_AXG_SENSE [33]

C51

10U/6.3V_8X

C44

C44 10U/6.3V_8X

10U/6.3V_8X

C107

10U/6.3V_8X

Monday, December 20, 2010

VSS_AXG_SENSE [33]

C111

10U/6.3V_8X

+

C116

*C@330U/2V_7343P_E6b

C427

10U/6.3V_8X

VCCSA_VCCSSENSE [32]

VCCSA_VID1 [32]

Quanta Computer Inc.

PROJECT :

Sandy Bridge 3/4

1

R50 100_4R50 100_4

+VDDR_REF_CPU

C113

10U/6.3V_8X

C49

10U/6.3V_8X

C426

10U/6.3V_8X

R79 0_4R79 0_4

Size Document Number Rev

Date: Sheet

Date: Sheet of

05

+1.5V_CPU

C112

+VCCSA

BU5

of

5 35

2A

5

<CPU>

AT35 AT32 AT29 AT27 AT25 AT22 AT19 AT16 AT13

D D

AT10

AT7 AT4

AT3 AR25 AR22 AR19 AR16 AR13 AR10

AR7

AR4

AR2 AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10

AP7

AP4

AP1 AN30 AN27 AN25 AN22

C C

AN19 AN16 AN13 AN10

AN7

AN4 AM29 AM25 AM22 AM19 AM16 AM13 AM10

AM7

AM4

AM3

AM2

AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

B B

AL7

AL4

AL2 AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AK7

AK4 AJ25

Processor Stra pping

CFG2

A A

(PEG Static Lane Reversal)

CFG4 (DP Presence Strap)

CFG7 (PEG Defer Training)

Sandy Bridge Processor (GND)

U22H

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

CPU-989P-rPGA

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

The CFG signals have a default value of '1' if not terminated on the board.

1 0

Normal Operation Lane Reversed

Disable; No physical DP attached to eDP

PEG train immediately following xxRESETB de assertion

5

4

U22I

T35 T34 T33 T32 T31 T30 T29 T28 T27 T26

P9 P8 P6 P5 P3

P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 M34

L33 L30 L27

L9

L8

L6

L5

L4

L3

L2

L1

K35 K32 K29 K26 J34

J31 H33 H30 H27 H24 H21 H18 H15 H13 H10

H9 H8 H7 H6 H5 H4 H3 H2

H1 G35 G32 G29 G26 G23 G20 G17 G11

F34 F31 F29

VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233

CPU-989P-rPGA

VSS

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

Enable; An ext DP device is connected to eDP

PEG wait for BIOS training

4

3

Sandy Bridge Processor (RESERVED, CFG)

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

SMDDR_VREF_DQ0_M3[13] SMDDR_VREF_DQ1_M3[14]

R363

R363 10K_4

10K_4

TP11TP11 TP10TP10

TP9TP9

+VTT+3V

R364

R364 *10K/F_4

*10K/F_4

REV-A1A change PU power from +VTT to +3V

R9 *EV@1K_ 4R9 *EV@1K_4

CFG2

R333 *1K_4R333 *1K_4

CFG4

R327 *1K_4R327 *1K_4

CFG7

REV-A1A change to 5% tolerance

3

SMDDR_VREF_DQ0_M3

SMDDR_VREF_DQ1_M3

R358

*1K_4

CFG5 CFG6

CFG0CFG0

CFG2

CFG4CFG4

CFG5 CFG6

CFG7

R366

*1K_4

R326 *1K_4R326 *1K_4 R329 *1K_4R329 *1K_4

AK28 AK29 AL26 AL27 AK26 AL29

AL30 AM31 AM32 AM30 AM28 AM26 AN28 AN31 AN26 AM27

AK31 AN29

AJ31 AH31

AJ33 AH33

AJ26

F25 F24 F23 D24 G25 G24 E23 D23 C30 A31 B30 B29 D30 B31 A30 C29

J20 B18 A19

J15

U22E

B4 D1

CPU-989P-rPGA

2

L7

RSVD28

AG7

RSVD29 CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17]

VAXG_VAL_SENSE VSSAXG_VAL_SENSE VCC_VAL_SENSE VSS_VAL_SENSE

RSVD5

RSVD6 RSVD7

RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23

RSVD24 RSVD25 VCCIO_SEL

RSVD27

RESERVED

CFG[6:5] (PCIE Port Bifurcation Straps)

11: (Default) x16 - Device 1 functions 1 and 2 disabled 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

2

AE7

RSVD30

AK2

RSVD31

W8

RSVD32

AT26

RSVD33

AM33

RSVD34

AJ27

RSVD35

T8

RSVD37

J16

RSVD38

H16

RSVD39

G16

RSVD40

AR35

RSVD41

AT34

RSVD42

AT33

RSVD43

AP35

RSVD44

AR34

RSVD45

B34

RSVD46

A33

RSVD47

A34

RSVD48

B35

RSVD49

C35

RSVD50

AJ32

RSVD51

AK32

RSVD52

AH27

VCC_DIE_SENSE

CLK_XDP_ITPP CLK_XDP_ITPN

Sandy Bridge 4/4

Monday, December 20, 2010

TP6TP6 TP62TP62

AN35

RSVD54

AM35

RSVD55

AT2

RSVD56

AT1

RSVD57

AR1

RSVD58

B1

KEY

Size Document Number Rev

Date: Sh eet

Date: Sh eet of

1

06

Quanta Computer Inc.

PROJECT :

BU5

PROJECT :

BU5

PROJECT :

BU5

of

6 3 5

1

2A

<CLG>

D D

C C

PM_DRAM_PWRGD[15]

B B

5

Cougar Point (DMI,FDI,PM) Cougar Point (LVDS,DDI)

U25C

DMI_COMP

SUSACK#_R

XDP_DBRST#

SYS_PWROK_ R

EC_PWROK_R

APWROK_R

PM_DRAM_PWRGD

RSMRST#

SUS_PWR_ACK_R

AC_PRESENT_R

PM_BATLOW#

PM_RI#

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO3 0

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

CougarPoint_R1P0

DMI_RXN0[3] DMI_RXN1[3] DMI_RXN2[3] DMI_RXN3[3]

DMI_RXP0[3] DMI_RXP1[3] DMI_RXP2[3] DMI_RXP3[3]

DMI_TXN0[3] DMI_TXN1[3] DMI_TXN2[3] DMI_TXN3[3]

DMI_TXP0[3 ] DMI_TXP1[3 ] DMI_TXP2[3 ] DMI_TXP3[3 ]

R186 4 9.9/F_4R1 86 49. 9/F_4

+1.05V

R191 7 50/F_4R191 750/F_ 4

XDP_DBRST#[3]

R239 0 _4R239 0 _4

MPWROK

R225 0 _4R225 0 _4

RSMRST#[27]

DNBSWON#[27]

+3V_S5

DMI

+3V

System Power Management

DSW

4

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6

FDI

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GP IO63

SLP_S4#

+3V_S5

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

3

2

1

07

U25D

INT_CRT_HSYNC_R INT_CRT_VSYNC_R

DAC_IREF

R173

R173 1K/F_4

1K/F_4

J47

M45

P45

T40 K47

T45 P39

AF37 AF36

AE48 AE47

AK39 AK40

AN48 AM47 AK47 AJ48

AN47 AM49 AK49 AJ47

AF40 AF39

AH45 AH47 AF49 AF45

AH43 AH49 AF47 AF43

N48 P49 T49

T39

M40

M47 M49

T43 T42

L_BKLTEN L_VDD_EN

L_BKLTCTL

L_DDC_CLK L_DDC_DATA

L_CTRL_CLK L_CTRL_DATA

LVD_IBG LVD_VBG

LVD_VREFH LVD_VREFL

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

CougarPoint_R1P0

LVDS

Digital Display Interface

CRT

BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9

BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

DPWROK_R

B9

PCIE_WAKE#

N3

CLKRUN#SYS_PWROK

G8

T23T23

N14

D10

T11T11

H4

F4

G10

T12T12

G16

SLP_SUS#_R

AP14

K14

GPIO29

FDI_TXN0 [3] FDI_TXN1 [3] FDI_TXN2 [3] FDI_TXN3 [3] FDI_TXN4 [3] FDI_TXN5 [3] FDI_TXN6 [3] FDI_TXN7 [3]

FDI_TXP0 [3] FDI_TXP1 [3] FDI_TXP2 [3] FDI_TXP3 [3] FDI_TXP4 [3] FDI_TXP5 [3] FDI_TXP6 [3] FDI_TXP7 [3]

FDI_INT [3]

FDI_FSYNC0 [3]

FDI_FSYNC1 [3]

FDI_LSYNC0 [3]

FDI_LSYNC1 [3]

DSWVREN [8]

PCIE_WAKE# [ 19,23]

CLKRUN# [27]

*33P/50V_4NC323 *33P/50V_4NC323

SUSCLK [27]

SUSC# [27]

SUSB# [27]

PM_SYNC [3]

LCD_BLON_I[27] LVDS_DIGON[17]

LVDS_PWM[17]

LCD_EDIDCLK[17] LCD_EDIDDATA[17]

+3V

LCD_TXLCLKOUT-[17] LCD_TXLCLKOUT+[17]

LCD_TXLOUT0-[17] LCD_TXLOUT1-[17] LCD_TXLOUT2-[17]

LCD_TXLOUT0+[17] LCD_TXLOUT1+[17] LCD_TXLOUT2+[17]

CRT_BLU[17] CRT_GRE[17] CRT_RED[17]

CRT_DDCCLK[17] CRT_DDCDAT[17]

CRT_HSYNC[17] CRT_VSYNC[17]

R406 1 50/F_4R406 150/F_ 4

R405 1 50/F_4R405 150/F_ 4

R404 1 50/F_4R404 150/F_ 4

R389 2.2K_4R389 2.2K_4 R391 2.2K_4R391 2.2K_4

R169 2 .37K/F_4R169 2.37K/F_4

T6T6

TP67TP67

TP71TP71

INT_CRT_BLU INT_CRT_GRE INT_CRT_RED

R408 2 0/F_4R408 20/F_4 R407 2 0/F_4R407 20/F_4

INT_CRT_BLU

INT_CRT_GRE

INT_CRT_RED

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

DDPD_AUXN DDPD_AUXP

C_TMDSD_DATA2# C_TMDSD_DATA2 C_TMDSD_DATA1# C_TMDSD_DATA1 C_TMDSD_DATA0# C_TMDSD_DATA0 C_TMDSD_CLK# C_TMDSD_CLK

TP17TP17 TP18TP18

TP65TP65 TP64TP64 TP25TP25

TP69TP69 TP73TP73 TP16TP16 TP14TP14 TP72TP72 TP68TP68 TP75TP75 TP70TP70

INT_HDMI_SCL [16] INT_HDMI_SDA [16]

R398 *10 K_4R398 *10K_4 R395 *10 K_4R395 *10K_4

C241 IHM@0.1U/10V_4XC241 IHM@0.1U/10V_4X C242 IHM@0.1U/10V_4XC242 IHM@0.1U/10V_4X C240 IHM@0.1U/10V_4XC240 IHM@0.1U/10V_4X C239 IHM@0.1U/10V_4XC239 IHM@0.1U/10V_4X C462 IHM@0.1U/10V_4XC462 IHM@0.1U/10V_4X C463 IHM@0.1U/10V_4XC463 IHM@0.1U/10V_4X C460 IHM@0.1U/10V_4XC460 IHM@0.1U/10V_4X C461 IHM@0.1U/10V_4XC461 IHM@0.1U/10V_4X

+3V

Port-B_HPD [16]

HDMITX2N [16] HDMITX2P [16] HDMITX1N [16] HDMITX1P [16] HDMITX0N [16] HDMITX0P [16] HDMICLK- [ 16] HDMICLK+ [16 ]

+3V

CLKRUN#

R460 8.2 K_4R460 8 .2K_4

XDP_DBRST#

R481 1K_ 4R481 1K_4

RSMRST#

LCD_BLON_I

R430 10K _4R430 1 0K_4

R277 100 K_4R277 100K_4

R57 *10 0K_4R57 *10 0K_4

A A

5

PM_RI#

PM_BATLOW#

PCIE_WAKE#

GPIO29

SUS_PWR_ACK

PM_DRAM_PWRGD

R450 1 0K_4R450 10K_4

R220 8 .2K_4R220 8.2K_4

R457 1 0K_4R457 10K_4

R197 1 0K_4R197 10K_4

R447 1 0K_4R447 10K_4

R223 *S 3@200/F_4R223 *S 3@200/F_4

+3V_S5

System PWR_OKPCH Pull-high/low

SYS_PWROK[15]

4

U17 *TC7SH08 FU(F)U17 *TC7SH08FU(F)

4

+3V_S5

REV-A1A Reserve U9000,R9042,Mount R9046

C298

C298 *0.1U/10V_4X

*0.1U/10V_4X

2

1

MPWROKSYS_PWROK

3 5

R276 0_4R276 0_4

R226

R226 *100K_4

*100K_4

DELAY_VR_PWRGOOD [3,33]

MPWROK [27,33 ]

3

Deep Sx

AC_PRESENT_R

SUS_PWR_ACK_RSYS_PWROK

DPWROK_R

SLP_SUS#_R

REV-C3A Reserve R437

R439 1 0K_4R439 10K_4

R440 *1 0K_4R 440 *10 K_4

R437 *0 _4R437 *0_4

R448 *0 _4R448 *0_4

R449 0 _4R449 0 _4

R434 0 _4R434 0 _4

R435 *0 _4R435 *0_4

R212 *0 _4R212 *0_4

Deep Sx Support

Ra

+3V_S5

Rb

+3V_DSW

Rc

AC_PRESENT [2 7]

SUSACK#_R

Rd

Re

SUS_PWR_ACK [27]

RSMRST#

Rf

Rg

SYS_HWPG [27,29]

Rh

SLP_SUS# [27]

2

Net Name

AC_PRESENT

SUS_PWR_ACK

DPWROK

SLP_SUS

Rb,Rc stuff

Rd stuff Re stuff

Rg stuff Rf stuff

Rh stuff Rh No stuff

Deep Sx No Support

Ra stuff

Quanta Computer Inc.

PROJECT :

BU5

PROJECT :

BU5

PROJECT :

Size Document Number Rev

Cougar Point 1/6

Date: Shee t

Date: Shee t of

Monday, December 20 , 2010

BU5

of

7 35

1

2A

5

CH500H-40PTD6CH500H-40PT

D6

VCCRTC_1

CH500H-40PTD7CH500H-40PT

20MIL

R72

1K_4

VCCRTC_2

20MIL

12

CN9

RTC_BAT(RTC SOCKET-2032)

<RTC>

D7

<ADO>

BIT_CLK_AUDIO[22]

ACZ_SYNC_AUDIO[22]

ACZ_RST#_AUDIO[2 2]

ACZ_SDOUT_AUDIO[22]

ACZ_SDIN0_AUDIO[22]

+3V

+3V_RTC

20MIL

C92

1U/10V_4X

R177 33_4R177 33_4

R130 33_4R130 33_4

R427 33_4R427 33_4

R422 33_4R422 33_4

+3V_S5

R466

R466 51_4

51_4

MX25L3205DM2I- 12G: AKE39FP0Z 00

W25X32VSSIG: A KE39ZP0N00

C509

C509 *22P/50V_4N

*22P/50V_4N

R474 3.3K/F_ 4R474 3. 3K/F_4

REV-A1A change footprint from socket ty pe to W25X32VS SIG

5

R82 20K_6R82 20K_6

R83 20K_6R83 2 0K_6

R233

R233 210/F_4

210/F_4

R244

R244 100/F_4

100/F_4

U16

1

CE#

6

SCK

5

SI

2

SO

3

WP#

W25X32VSSIG

ACZ_BITCLK

ACZ_SYNC_R

ACZ_RST#

ACZ_SDOUT

ACZ_SDIN0_AUDIO

R230

R230 210/F_4

210/F_4

PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TCK

R229

R229 100/F_4

100/F_4

VDD

HOLD#

VSS

C126

1U/10V_4X

C127

1U/10V_4X

*33P/50V_4NC256 *33P /50V_4NC256

8

7

R459 3.3K/F_ 4R459 3. 3K/F_4

4

SRTC_RST#

12

RTC_RST#

12

*SHORT_ PADG1*SHORT_ PAD

*SHORT_ PADG2*SHORT_ PAD

RTC Circuit

+3VPCU

D D

HDA Bus

C C

PCH JTAG Debug (CLG)

B B

PCH Dual SPI (CLG)

PCH_SPI_CS0# PCH_SPI_CLK PCH_SPI_SI PCH_SPI_SO

A A

G1

G2

+3V

C328

0.1U/10V_4X

4

PCH2

C498 18P /50V_4CC498 18 P/50V_4C

C497 18P /50V_4CC497 18 P/50V_4C

+3V

1

Q16

*2N7002K_300 MA

R129 0_4R129 0_4

REV-C3A Change power rail f rom +5V to +3V and mount R129, reserve R1 32 C222 Q16

23

4 1

+3V_RTC

R132

*33K/F_4

C222

2

*33P/50V_4N

3

ACZ_SYNCACZ_SYNC_R

Y5

32.768KHZ_20Y532.768KHZ_20

+3VPCU

R429 1M_4R429 1 M_4

R465 *10K_4R4 65 *10K_4

PCH Strap Table

Pin Name

SPKR

GNT3# / GPIO55

INTVRMEN

GNT1# / GPIO51

GPIO19

HDA_SDO

DF_TVS

GPIO28

Strap description

No reboot mode setting PWROK

Top-Block Swap Override

Integrated 1.05V VRM enable ALWAYS Should be always pull-up

Boot BIOS Selection 1 [bit-1]

Boot BIOS Selection 0 [bit-0]

Flash Descriptor Security

DMI/FDI Termination voltage

On-die PLL Voltage Regulator RSMRST#

HDA_SYNC On-Die PLL VR Voltage Select RSMRST

GPIO15

DSWVRMEN

TLS Confidentiality RSMRST

Deep S4/S5 Well On -Die Voltage Regulator Enable

INIT3_3V# Reserved

GNT2#/ GPIO53

L_DDC_DATA

SDVO_CTRLDATA

DDPC_CTRLDATA

DDPD_CTRLDATA

SATA3GP/ GPIO37

SATA2GP/ GPIO36

4

ESI Strap (Server Only)

LVDS Detected

Port B Detected

Port C Detected

Port D Detected

Reserved

Sampled

PWROK

RSMRST

PWROK

ALWAYS

PWROK 1 = Default (weak pull-up 20K)

PWROK

3

R436

RTC_X1

10M_4

RTC_X2

RTC_RST#

SRTC_RST#

SM_INTRUDER#

PCH_INVRMEN

ACZ_BITCLK

ACZ_SYNC

PCBEEP

PCBEEP[22]

ACZ_RST#

ACZ_SDIN0_AUDIO

ACZ_SDOUT

HDPLOC[21]

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

TP83TP83

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SPI_CS1#

PCH_SPI_SI

PCH_SPI_SO

Configuration

0 = Default (weak pull-down 20K) 1 = Setting to No-Reboot mode

0 = "top-block swap" mode 1 = Default (weak pull-up 20K)

0 = Override 1 = Default (weak pull-up 20K)

0 = Set to Vss 1 = Set to Vcc (weak pull-down 20K)

0 = Disable 1 = Enable (Default)

0 = Support by 1.8V (weak pull-down) 1 = Support by 1.5V

0 = Default. TLS no Confidentiality 1 = TLS Confidentiality

0 = Disable 1 = Enable

1 = Default. Should not be pulled low for desktop and mobile

0 = Default. Not Detected 1 = Detected

0 = Default

3

2

Cougar Point (HDA,JTAG,SATA)

U25A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

TP26TP26

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

TP27TP27

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

CougarPoint_R1P0

GPIO19GNT1#

Boot Location

11

SPI

*

00

LPC

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LPC

FWH4 / LFRAME#

LDRQ0#

+3V

LDRQ1# / GPIO23

RTCIHDA

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN

SATA 6G

SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP

+3V

SATA4TXN

SATA

SATA4TXP

+3V_S5

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

JTAG

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SPI

+3V

SATA0GP / GPIO21

+3V

SATA1GP / GPIO19

R238 *1K_4R23 8 *1K_4

+3V

R403 *1K_4R40 3 *1K_4

R438 330K_4R438 330 K_4

+3V_RTC

R399 *1K_4R39 9 *1K_4

R478 *1K_4R47 8 *1K_4

R423 *1K_4R42 3 *1K_4

+3V

R463 2.2 K_4R463 2.2K_4

R464 4.7K_4R464 4.7K_ 4

R222 *10K_4R2 22 *10K_4

+3VPCU

R228 *1K_4R22 8 *1K_4

R136 1K_4R 136 1K_4

+3V_S5

R462 1K_4R4 62 1K_4

+3V_S5

R443 330K_4R443 330 K_4

+3V_RTC

Should not pull low. leave as No Connect

Should not pull low for desktop and mobile

1= PU to 3V

0=NC

Should not be pulled high when strap is sampled

2

C38 A38 B37 C37

D36

E36

PCH_DRQ#0

K36

V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

ACZ_SDOUT

TP24TP24

SERIRQ

SATA_RX1N

TP41TP41

SATA_RX1P

TP45TP45

SATA_TXN1_C

TP39TP39

SATA_TXP1_C

TP43TP43

Remove SATA po rt 2 12/29

SATA_RXN3

TP53TP53

SATA_RXP3

TP51TP51

SATA_TXN3_C

TP81TP81

SATA_TXP3_C

TP82TP82

SATA_RXN5 SATA_RXP5 SATA_TXN5_C SATA_TXP5_C

SATA_COMP

R214 37.4/F _4R214 37.4/F_4

SATA3_COMP

R209 49.9/F _4R209 49.9/F_4

SATA3_RBIAS

R472 750/F_ 4R47 2 750/F_4

GPIO21

GPIO19

PCBEEP

PCI_GNT3# [9]

PCH_INVRMEN

GNT1# [9]

GPIO19

ACZ_SDOUT [27]

+1.8V

DF_TVS [10]

H_SNB_IVB# [3]

PLL_ODVR_EN [1 0]

ACZ_SYNC

GPIO15 [10 ]

DSWVREN [7]

R442 *330K_4R4 42 *330K_4

LAD0 [18,27 ] LAD1 [18,27 ] LAD2 [18,27 ]

TP47TP47 TP50TP50 TP49TP49 TP46TP46

SATA_LED# [2 6]

LAD3 [18,27 ]

LFRAME# [1 8,27]

LDRQ#1 [ 18]

SERIRQ [18,27]

SATA_RXN_1ST_HDD# [21] SATA_RXP_1ST_HDD [21 ] SATA_TXN_1ST_HDD# [21] SATA_TXP_1ST_HDD [21]

SATA_RXN_ODD# [21] SATA_RXP_ODD [21] SATA_TXN_ODD# [21] SATA_TXP_ODD [2 1]

+1.05V

GPIO21

SERIRQ

GPIO19 GPIO21

12

REV-B2A Add G3 for Clear CM OS password

Quanta Computer Inc.

PROJECT :

Cougar Point 2/6

Monday, December 20 , 2010

PROJECT :

Size Document Number Rev

Date: Sheet of

Date: Sheet

1

G3

*SHORT_ PADG3*SHORT_ PAD

1

R234 8.2K_4R234 8.2K_ 4 R267 10K_4R267 10K_ 4 R266 10K_4R266 10K_ 4

SATA HDD/SSD

SATA ODD

BU5

8 35

08

+3V

of

2A

CLK_PCI_FB PCLK_DEBUG PCLK_591

+3V_S5

3 5

PCI_GNT3#[8]

ODD_MD#[21]

PCLK_591

PCLK_DEBUG

CLK_PCI_FB

U27

U27 *TC7SH08FU(F)

*TC7SH08FU(F)

GNT1#[8]

TP42TP42

TP74TP74 TP20TP20 R164 22_4R164 22_4 R387 22_4R387 22_4 R171 22_4R171 22_4

C330

C330 *0.1U/10V_4X

*0.1U/10V_4X

4

5

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

GPIO50 GPIO52 GPIO54

GNT1#

PCI_GNT3#

PIRQE# PIRQF# PIRQG# PIRQH#

PCI_PME#

PCI_PLTRST#

CLK_PCI0_R CLK_PCI1_R CLK_PCI_FB_R PCLK_DEBUG_R PCLK_591_R

C248

C248 *22P/50V_4N

*22P/50V_4N C447

C447 *22P/50V_4N

*22P/50V_4N C234

C234 *22P/50V_4N

*22P/50V_4N

REV-A1A for EMI

5

Cougar Point-M (PCI,USB,NVRAM)

U25E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

RSVD

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

PCI

C46

+3V

REQ1# / GPIO50

C44

+3V

REQ2# / GPIO52

E40

+3V

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

TP21TP21

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

CougarPoint_R1P0

USB

+3V +3V +3V

+3V +3V +3V +3V

+3V_S5

OC0# / GPIO59

+3V_S5

OC1# / GPIO40

+3V_S5

OC2# / GPIO41

+3V_S5

OC3# / GPIO42

+3V_S5

OC4# / GPIO43

+3V_S5

OC5# / GPIO9

+3V_S5

OC6# / GPIO10

+3V_S5

OC7# / GPIO14

PCI/USBOC# Pull-upPLTRST#

USB_OC4# USB_BUS_SW2_R USB_BUS_SW0 USB_BUS_SW3_R

PLTRST# [3,18,19,23,27]

R476

R476 100K_4

100K_4

D D

C C

PCLK_DEBUG[18]

PCLK_591[27]

B B

2

PCI_PLTRST#

1

R468 0_4R468 0_4

A A

RSVD1 RSVD2 RSVD3 RSVD4

RSVD5 RSVD6

RSVD7 RSVD8

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22

RSVD23 RSVD24

RSVD25

RSVD26 RSVD27

RSVD28 RSVD29

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

10

R441

9 8 7 4

10KX8

4

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5

NV_ALE

AV10

AT8

AY5 BA2

AT12 BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

TP80TP80 TP79TP79

USBP1-

USBP1- [19]

USBP1+

USBP1+ [19]

TP38TP38 TP78TP78

USB_3G#

USB_3G# [18]

USB_3G

USB_3G [18]

USB_CARD#

USB_CARD# [20]

USB_CARD

USB_CARD [20]

USB_SIM#

USB_SIM# [18]

USB_SIM

USB_SIM [18]

TP35TP35

TP37TP37 TP32TP32

USB_EXT2#

USB_EXT2# [20]

USB_EXT2

USB_EXT2 [20]

USB_EXT1#

USB_EXT1# [20]

USB_EXT1

USB_EXT1 [20]

TP28TP28 TP30TP30

USB_CCD#

USB_CCD# [17]

USB_CCD

USB_CCD [17]

TP33TP33 TP36TP36

USB_WLAN#

USB_WLAN# [18]

USB_WLAN

USB_WLAN [18]

USB_BIAS

R426 22.6/F_4R426 22.6/F_4

REV-B2A Reserve 0 ohm, modify control from EC

USB_SC_OC_PCH#_R

R207 0_4R207 0_4

USB_BUS_SW2_R

R583 *0_4R583 *0_4

USB_BUS_SW0 USB_BUS_SW3_R

R584 *0_4R584 *0_4

USB_OC4#

R205 0_4R205 0_4

USB30_SMI# USB_OC6# USB_OC7#

R218 0_4R218 0_4

1

USB_OC6#

2

USB_SC_OC_PCH#_R

3

USB_OC7# USB30_SMI#

56

4

TP44TP44

USB 2.0 (Colay w/ USB 3.0)

3G

Card Reader

SIM

USB 2.0 (R)

USB 2.0 (L)

CCD

WLAN

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

PIRQE# ODD_MD# GPIO54 PIRQF#

USB_SC_OC_PCH# [19] USB_BUS_SW2 [19,27]

USB_BUS_SW3 [19,27] USBOC#9 [20,27]

USB30_SMI# [19]

SCI# [27]

+3V

R157

10

9 8 7 4

10KX8

EHCI1

EHCI2

REV-A1A Del USBOC#8

R158 8.2K_4R158 8.2K_4 R176 8.2K_4R176 8.2K_4 R170 8.2K_4R170 8.2K_4

1

PIRQG#

2

PIRQH#

3

GPIO50 GPIO52

56

3

PCIE_RXN_USB30#[19] PCIE_RXP_USB30[19]

USB3.0

PCIE_TXN_USB30#[19]

PCIE_TXP_USB30[19]

PCIE_RXN_3G#[18] PCIE_RXP_3G[18]

3G

PCIE_TXN_3G#[18] PCIE_TXP_3G[18]

PCIE_RXN_WLAN#[18] PCIE_RXP_WLAN[18]

WLAN

PCIE_TXN_WLAN#[18]

PCIE_TXP_WLAN[18]

PCIE_RXN_LAN#[23] PCIE_RXP_LAN[23]

LAN

PCIE_TXN_LAN#[23]

PCIE_TXP_LAN[23]

REV-A1A Change port from 6 to 0

CLK_PCIE_LAN#[23] CLK_PCIE_LAN[23]

LAN

PCIE_CLK_REQ_LAN#[23]

CLK_PCIE_MINI#[18]

WLAN

CLK_PCIE_MINI[18]

PCIE_CLK_REQ1#[18]

REV-A1A Add R7585,R7581,R7582

CLK_PCIE_3G#[18]

3G

CLK_PCIE_3G[18]

PCIE_CLK_3G_REQ#[18]

CLK_PCIE_USB30#[19]

USB3.0

CLK_PCIE_USB30[19]

PCIE_CLK_USB30_REQ#[19]

REV-A1A change PCIE CLK port PCIE1 clock WLAN PCIE5 clock USB3.0 IC

CLK_REQ/Strap Pin

+3V_S5

+3V+3V_S5

R264 10K_4R264 10K_4 R265 10K_4R265 10K_4 R216 *10K_4R216 *10K_4R160 8.2K_4R160 8.2K_4 R245 *10K_4R245 *10K_4 R217 *10K_4R217 *10K_4

+3V

R261 *10K_4R261 *10K_4 R269 10K_4R269 10K_4

+3V_S5

R272 10K_4R272 10K_4

+3V_S5

R247 NS3@10K_4R247 NS3@10K_4 R237 *S3@10K_4R237 *S3@10K_4

+3V_S5

R243 IV@10K_4R243 IV@10K_4 R232 **EV@10K_4R232 **EV@10K_4

CLK_BUF_BCLKN CLK_BUF_BCLKP

CLK_BUF_PCIE_3GPLLN CLK_BUF_PCIE_3GPLLP CLK_BUF_DREFCLKN CLK_BUF_DREFCLKP CLK_BUF_DREFSSCLKN CLK_BUF_DREFSSCLKP CLK_PCH_14M

3

C261 0.1U/10V_4XC261 0.1U/10V_4X C258 0.1U/10V_4XC258 0.1U/10V_4X

C253 0.1U/10V_4XC253 0.1U/10V_4X C255 0.1U/10V_4XC255 0.1U/10V_4X

C236 0.1U/10V_4XC236 0.1U/10V_4X C235 0.1U/10V_4XC235 0.1U/10V_4X

C246 0.1U/10V_4XC246 0.1U/10V_4X C245 0.1U/10V_4XC245 0.1U/10V_4X

R166 0_4R166 0_4 R165 0_4R165 0_4

R271 0_4R271 0_4

R153 0_4R153 0_4 R152 0_4R152 0_4

R274 0_4R274 0_4

R151 3G@0_4R151 3G@0_4 R150 3G@0_4R150 3G@0_4

R280 3G@0_4R280 3G@0_4

R149 U3@0_4R149 U3@0_4 R148 U3@0_4R148 U3@0_4

R143 U3@0_4R143 U3@0_4

<CLG>

PCIE_CLK_REQ_LAN#_R PCIE_CLK_3G_REQ#_R PCIE_CLKREQ_REV1# PCIE_CLKRQ6# GPIO46

GPIO20 PCIE_CLK_REQ1#_R

PCIE_CLK_USB30_REQ#_R

S3_STRAP

CLK_PEGA_REQ#

R184 10K_4R184 10K_4 R183 10K_4R183 10K_4

R208 10K_4R208 10K_4 R206 10K_4R206 10K_4 R188 10K_4R188 10K_4 R187 10K_4R187 10K_4 R236 10K_4R236 10K_4 R235 10K_4R235 10K_4 R156 10K_4R156 10K_4

2

Cougar Point-M (PCI-E,SMBU S,CLK)

U25B

PCIE_TXN_USB30#_C PCIE_TXP_USB30_C

PCIE_TXN_3G#_C PCIE_TXP_3G_C

PCIE_TXN_WLAN#_C PCIE_TXP_WLAN_C

PCIE_TXN_LAN#_C PCIE_TXP_LAN_C

CLK_PCIE_LAN#_R CLK_PCIE_LAN_R

PCIE_CLK_REQ_LAN#_R

CLK_PCIE_MINI#_R CLK_PCIE_MINI_R

PCIE_CLK_REQ1#_R

GPIO20

CLK_PCIE_3G#_R CLK_PCIE_3G_R

PCIE_CLK_3G_REQ#_R

CLK_PCIE_REV1N CLK_PCIE_REV1P

PCIE_CLKREQ_REV1#

CLK_PCIE_USB30#_R CLK_PCIE_USB30_R

PCIE_CLK_USB30_REQ#_R

S3_STRAP

PCIE_CLKRQ6#

GPIO46

CLK_PCH_ITPN CLK_PCH_ITPP

SMBus/Pull-up

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

CougarPoint_R1P0

2ND_MBCLK[21,27]

2ND_MBDATA[21,27]

+3V_S5

REV-B2A Add R489 for S3 Enable Strap

R446 NS3@1K_4R446 NS3@1K_4 R489 *S3@10K_4R489 *S3@10K_4

+3V_S5

R219 10K_4R219 10K_4 R201 2.2K_4R201 2.2K_4 R458 2.2K_4R458 2.2K_4 R469 2.2K_4R469 2.2K_4 R203 2.2K_4R203 2.2K_4 R202 10K_4R202 10K_4

2

+3V_S5

PCI-E*

+3V_S5

+3V

+3V_S5

<CLG>

TP77TP77 TP76TP76 TP31TP31 TP29TP29

T20T20 T17T17 T22T22 T21T21

T18T18 T19T19 T5T5 T14T14

T15T15 T16T16TP34TP34

TP23TP23 TP19TP19

T7T7 T8T8

T9T9 T10T10

+3V_S5

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

+3V_S5

Link

+3V_S5

PEG_A_CLKRQ# / GPIO47

CLOCKS

+3V

CLKOUTFLEX0 / GPIO64

+3V

CLKOUTFLEX1 / GPIO65

+3V

CLKOUTFLEX2 / GPIO66

+3V

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

+3V_S5

321

Q18

Q18 2N7002_200MA

2N7002_200MA

+3V_S5

321

Q21

Q21 2N7002_200MA

2N7002_200MA

DRAMRST_CNTRL_PCH

SMBALERT# SCLK SDATA SMB_ME0_CLK SMB_ME0_DAT SML1ALERT#_R

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

R275

2.2K_4

SMB_ME1_CLK

R286

2.2K_4

SMB_ME1_DAT

1

E12

SMBALERT#

H14

SCLK

C9

SDATA

A12

DRAMRST_CNTRL_PCH

C8

SMB_ME0_CLK

G12

SMB_ME0_DAT

C13

SML1ALERT#_R

E14

SMB_ME1_CLK

M16

SMB_ME1_DAT

M7

T11

P10

M10

CLK_PEGA_REQ#

AB37

DEL CLK_PCIE_VGAN,CLK_PCIE_VGAP

AB38

AV22 AU22

AM12 AM13

BF18

CLK_BUF_PCIE_3GPLLN

BE18

CLK_BUF_PCIE_3GPLLP

BJ30

CLK_BUF_BCLKN

BG30

CLK_BUF_BCLKP

G24

CLK_BUF_DREFCLKN

E24

CLK_BUF_DREFCLKP

AK7

CLK_BUF_DREFSSCLKN

AK5

CLK_BUF_DREFSSCLKP

K45

CLK_PCH_14M

H45

CLK_PCI_FB

V47

XTAL25_IN

V49

XTAL25_OUT

Y47

XCLK_RCOMP

K43

CLK_FLEX0

F47

CLK_FLEX1

H47

CLK_FLEX2

K49

CLK_FLEX3

SCLK [18,23]

SDATA [18,23]

DRAMRST_CNTRL_PCH [15]

R204 *0_4R204 *0_4

For EC,G-SENSOR,ID ROM

*22P/50V_4NC237 *22P/50V_4NC237

*22P/50V_4NC247 *22P/50V_4NC247

R401 90.9/F_4R401 90.9/F_4

+1.05V

R172 *22_4R172 *22_4

R400 *EV@22_4R400 *EV@22_4

R409 *22_4R409 *22_4

REV-B2A Reserve

CLK_FLEX0

CLK_FLEX1

CLK_FLEX2

CLK_FLEX3

Size Document Number Rev

Date: Sheet of

Date: Sheet

TP22TP22

PCH_CLK_27M

TP15TP15

33MHz

27MHz 48/24MHz 14.318MHz 25MHz

Quanta Computer Inc.

PROJECT :

Cougar Point 3/6

Monday, December 20, 2010

1

09

TP40TP40

TP48TP48

CLK_CPU_BCLKN [3] CLK_CPU_BCLKP [3]

REV-C3A Change C456,C457 value from 18P to 27P

C457 27P/50V_4NC457 27P/50V_4N

21

Y4

R402

25MHZ_30Y425MHZ_30

1M_4

C456 27P/50V_4NC456 27P/50V_4N

TP66TP66

48M_CARD [20]

*33P/50V_4NC451 *33P/50V_4NC451

BU5

of

9 35

2A

5

<CLG>

REV-B2A Reserve PCH GPIO6 to HDPACT_R

D D

C C

B B

A A

BOARD_ID6[21]

ODD_EN[21]

HDPACT[21]

GPIO15[8]

PLL_ODVR_EN[8]

ODD_PRSN T#[21]

HDPINT[21]

TEMP_ALERT#[3,27]

5

BOARD_ID4

BOARD_ID5

BOARD_ID6

BOARD_ID2

ODD_EN

HDPACT

GPIO15

BOARD_ID9

GPIO17

GPIO22

USB_BUS_SW 1

GPIO27

PLL_ODVR_EN

STP_PCI#

BOARD_ID7

GPIO36

ODD_PRSN T#

BOARD_ID1

BOARD_ID8

HDPINT

TEMP_ALERT#

BOARD_ID3

4

Cougar Point (GPIO,VSS_NCTF,RSVD)

U25F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

CougarPoint_R 1P0

4

+3V_S5

DSW

+3V_S5

+3V

+3V_S5

+3V

+3V_S5

+3V

GPIO

+3V

+3V_S5

NCTF

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

A20GATE

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

PECI

RCIN#

NC_1

3

C40

GPIO68

B41

R413 1.5K/F_4R413 1.5K /F_4

C41

R415 1.5K/F_4R415 1.5K /F_4

A40

R417 1.5K/F_4R417 1.5K /F_4

P4

AU16

P5

RCIN#

AY11

AY10

PCH_THR MTRIP#

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

GPIO Pull-up/Pull-down

BJ5

<CLG>

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

3

R224 390_4R224 390_ 4

USB_BUS_SW 1 ODD_EN HDPACT

GPIO68 TEMP_ALERT#

GPIO17 GPIO22

HDPINT ODD_PRSN T# STP_PCI# GATEA20 RCIN#

GPIO36 GPIO27

+3V

R227 *10K_4R227 *10K _4 R159 *10K_4R159 *10K _4 R467 *10K_4R467 *10K _4

R167 10K_4R 167 10K_4 R470 10K_4R 470 10K_4

R416 10K_4R 416 10K_4 R268 10K_4R 268 10K_4

R255 *10K_4R255 *10K _4 R259 10K_4R 259 10K_4 R482 10K_4R 482 10K_4 R257 10K_4R257 10K_4 R258 10K_4R 258 10K_4

R254 10K_4R 254 10K_4 R452 10K_4R 452 10K_4

B2A

GATEA20 [27]

RCIN# [27]

H_PWRG OOD [3]

PM_THRMTR IP# [3]

DF_TVS [8]

+3V_S5

+3V

2

BOARD ID SETTING

ID1 ID2Board ID ID3

UMA SKU

VGA SKU

W/O 3G

W/ 3G

W/O LED KB

W/ LED KB

14"

15"

W G-SNR H

W/O G-SNR

W/ MDC

W/O MDC

W/ HDMI

W/O HDMI

NC

13"

H

L

H

L

<CLG>

ID4

H

L

H

L

W/O USB3.0

+3V

+3V +3V +3V

2

+3V

R479

IV@10K_4

R461

*EV@10K_4

R414

R414 *MDC@10K_4

*MDC@10K_4

BOARD_ID6 BOARD_ID7

R411

NMDC@10K_4

R161

R161 10K_4

10K_4

BOARD_ID2

+3V

R240

R240 *10K_4

*10K_4

BOARD_ID4

R256

R256 HM@10K_4

HM@10K_4

R270

*NHM@10K_4

Quanta Computer Inc.

PROJECT :

Size Docum ent Number Rev

Monday, Decemb er 20, 2010

Date: Sheet of

PROJECT :

Cougar Point 4/6

ID5

L

CPUSB# [1 8]

BOARD_ID8

R480

10K_4

1

ID6

H

L

+3V

1

ID7

H

L

+3V_S5

R410

GS@10K_4

BOARD_ID5

R412

*NGS@10K_4

BU5

10

ID8

H

L

R246

10K_4

BOARD_ID3BOARD_ID1

R477

R477 U3@10K_4

U3@10K_4

BOARD_ID9

R471

U2@10K_4

10 35

ID9

HW/ USB3.0

L

2A

<CLG>

PCH5

+1.05V +1.05V_PCH_VCC

R211 0_1206R211 0_1206

D D

R199 0_6R199 0_6

C536 *0.1U/10V_4XC536 *0.1U/10V_4X

+1.05V +1.05V_VCCAPLL_ EXP

L32 *1uh_ 6_25MAL32 *1uh_6_25MA

+1.05V +1.05V_VCCIO

R210 0_1206R210 0_1206

C C

B B

5

VccCORE =1.3 A(60mils)

C270

C277

1U/6.3V_4X

+1.05V_PCH_VCCDPLL_EXP+1.05V

1U/6.3V_4X

REV-C3A Reserv e C536 for ESD

C499

C499 *10U/6.3V_6X

*10U/6.3V_6X

VccIO =2.925 A(140mils)

C265

C257

1U/6.3V_4X

C307

C274

10U/6.3V_8X

1U/6.3V_4X

+3V_VCC_EXP+3V

R432 0_8R432 0_8

+VCCAFDI_VRM

C538 *0.1U/10V_4XC538 *0.1U/10V_4X

R231 *0_8R231 *0_8

+1.05V

R241 0_8R241 0_8

C537 *0.1U/10V_4XC537 *0.1U/10V_4X

REV-C3A Reserv e C537,C538 fo r ESD

REV-C3A Add C533 and reserv er C535,C534

R250 0_6R250 0_6

+1.5V

C533

10U/6.3V_6X

C273

C273 1U/6.3V_4X

1U/6.3V_4X

C266

C266 1U/6.3V_4X

1U/6.3V_4X

+

C308

+

C308 *C@330U/2V_7343P_E6b

*C@330U/2V_7343P_E6b

C493

0.1U/10V_4X

+1.05V_VCCAPLL_FDI

+1.05V_VCCDPLL_FDI

+1.05V

C534

*0.1U/10V_4X

C285

C285 10U/6.3V_6X

10U/6.3V_6X

+VCCAFDI_VRM

C535

C535 *0.1U/10V_4X

*0.1U/10V_4X

AA23 AC23 AD21 AD23 AF21 AF23 AG21 AG23 AG24 AG26 AG27 AG29 AJ23 AJ26 AJ27 AJ29 AJ31

AN19

BJ22

AN16

AN17

AN21

AN26

AN27

AP21

AP23

AP24

AP26

AT24

AN33

AN34

BH29

AP16

BG6

AP17

AU20

COUGAR POINT (POWER)

U25G

VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15] VCCCORE[16] VCCCORE[17]

VCCIO[28]

VCCAPLLEXP

VCCIO[15]

VCCIO[16]

VCCIO[17]

VCCIO[18]

VCCIO[19]

VCCIO[20]

VCCIO[21]

VCCIO[22]

VCCIO[23]

VCCIO[24]

VCCIO[25]

VCCIO[26]

VCC3_3[3]

VCCVRM[2]

VccAFDIPLL

VCCIO[27]

VCCDMI[2]

CougarPoint_R1P0

REV-C3A Reserve D23

POWER

VCC CORE

VCCIO

FDI

D23

*CH500H-40PT

CRTLVDS

DMI

DFT / SPI HVCMOS

4

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

+3V_DSW+3VPCU

VCCSPI

U48

U47

AK36

AK37

VccTX_LVDS=60mA(10mils)

AM37

AM38

C254

AP36

IV@0.01U/25V_4X

AP37

V33

V34

AT16

+VCCAFDI_VRM

AT20

AB36

C448

C448 1U/6.3V_4X

1U/6.3V_4X

AG16

AG17

AJ16

AJ17

V1

VccADAC =1mA(8mils)

C443

R382

0.01U/25V_4X

*0_6

VccALVDS=1mA(8mils)

C230

C230 IV@0.01U/25V_4X

IV@0.01U/25V_4X

+3V+3V_VCC_GIO

R420 0_6R420 0_6

C480

0.1U/10V_4X

+VCCAFDI_VRM

C444

C444 *10U/6.3V_8X

*10U/6.3V_8X

+1.8V+VCCP_NAND

R248 0_8R248 0_8

C291

0.1U/10V_4X

R485 0_6R485 0_6

C508

C508 1U/6.3V_4X

1U/6.3V_4X

+VCCA_DAC_1_2

C450

0.1U/10V_4X

+VCCALVDS +3V

C232

C232 IV@22U/6.3V_8X

IV@22U/6.3V_8X

VCCDMI = 42mA( 10mils)

L26 *10uh_8_100MAL26 *10uh _8_100MA

VCCPNAND = 190 mA(15mils)

+3V+3V_VCCME_SPI

VCCSPI = 20mA( 8mils)

L25 HCB1608KF-181T15_1.5AL25 HCB1608KF-181T15_1.5A

C446

C446 10U/6.3V_8X

10U/6.3V_8X

R174 IV@0_4R174 IV@0_4

R175 *EV@0_4R175 *EV@0_4

L6 IV@0.1uh_8_ 250MAL6 IV@0.1uh_8_250MA

R147 *EV@0_4R147 *EV@0_4

R190 0_4R190 0_4

C283

C283 1U/6.3V_4X

1U/6.3V_4X

VCCCLKDMI = 20 mA(8mils)

+VCC_DMI_CCI

R379 *1/F_4R379 *1/F_4

R384 0_4R384 0_4

1mA(8mils)

VCCRTC<1mA(8mi ls)

3

+3V

+3V_DSW

+3V_S5

+1.8V+VCC_TX_LVDS

+1.05V

+VCCAPLL_CPY_PCH

L31 *10uh_8_100MAL31 *10uh _8_100MA

VCCME(+1.05V) = ??A(??mils)

+1.05V

R198 0_1206R198 0_1206

+1.05V+1.1V_VCC_DMI

+1.05V+1.1V_VCC_DMI_CCI

+1.05V

R253 0_6R253 0_6

R393 0_6R393 0_6

R392 0_6R392 0_6

+1.05V

R192 *0_6R192 *0_6

+1.05V

R221 0_4R221 0_4

+3V_RTC

REV-C3A Reserv e C539 for ESD

R137 *0_8R137 *0_8

+1.05V

C539 *0.1U/10V_4XC539 *0.1U/10V_4X

R444 *0_4R444 *0_4

VCCDSW3_3= 3mA

R445 0_4R445 0_4

C286

0.1U/10V_4X

R178 0_6R178 0_6

+1.05V

C496

C540 *0.1U/10V_4XC540 *0.1U/10V_4X

*10U/6.3V_8X

REV-C3A Reserv e C540 for ESD

+1.05V_VCCEPW

VccASW =1.01 A(60mils)

C271

C278

1U/6.3V_4X

C259

C260

10U/6.3V_8X

C322

C322 1U/6.3V_4X

1U/6.3V_4X

C453

65mA(10mils)

1U/6.3V_4X

8mA(8mils)

C452

C452 1U/6.3V_4X

1U/6.3V_4X

VCCDIFFCLKN= 5 5mA(10mils)

VCCSSC= 95mA(1 0mils)

C292

C292 *1U/6.3V_4X

*1U/6.3V_4X

C302

C299

0.1U/10V_4X

4.7U/6.3V_6X

C489

C490

0.1U/10V_4X

1U/6.3V_4X

C305

C305 *0.1U/10V_4X

*0.1U/10V_4X

C279

C279 *1U/6.3V_4X

*1U/6.3V_4X

C272

C272 1U/6.3V_4X

1U/6.3V_4X

C297 0.1U/10V_4XC297 0.1U/10V_4X

+VCCAFDI_VRM

C295 0.1U/10V_4XC295 0.1U/10V_4X

C301

0.1U/10V_4X

C488

0.1U/10V_4X

2

Cougar Point-M (POWER)

AD49

+VCCACLK

T16

+VCCPDSW

V12

PCH_VCCDSW

T38

+3V_SUS_CLKF33

BH23

AL29

+VCCDPLL_CPY

AL24

+VCCSUS1

AA19

AA21

AA24

AA26

AA27

AA29

AA31

AC26

+

C268

+

C268

AC27

*C@330U/2V_7343P_E6b

AC29

AC31

AD29

AD31

W21

W23

W24

W26

W29

W31

W33

N16

+VCCRTCEXT

Y49

+VCCAFDI_VRM

BD47

+1.05V_VCCA_A_DPL

BF47

+1.05V_VCCA_B_DPL

AF17

+VCCDIFFCLK

AF33

+VCCDIFFCLKN

AF34

AG34

AG33

+V1.05V_SSCVCC

V16

+VCCSST

T17 V19

+V1.05M_VCCSUS

+VTT_VCCPCPU

BJ8

A22

U25J

VCCACLK

VCCDSW3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2

VCCIO[14]

DCPSUS[3]

VCCASW[1]

VCCASW[2]

VCCASW[3]

VCCASW[4]

VCCASW[5]

VCCASW[6]

VCCASW[7]

VCCASW[8]

VCCASW[9]

VCCASW[10]

VCCASW[11]

VCCASW[12]

VCCASW[13]

VCCASW[14]

VCCASW[15]

VCCASW[16]

VCCASW[17]

VCCASW[18]

VCCASW[19]

VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA

VCCADPLLB

VCCIO[7] VCCDIFFCLKN[1] VCCDIFFCLKN[2] VCCDIFFCLKN[3]

VCCSSC

DCPSST

DCPSUS[1] DCPSUS[2]

V_PROC_IO

VCCRTC

CougarPoint_R1P0

POWER

Clock and Miscellaneous

CPURTC

PCI/GPIO/LPCMISC

SATA USB

HDA

VCCIO[29]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

1

11

+1.05V+1.05V_VCCUSBCORE

+3V

R249 0_6R249 0_6

C294

C294 1U/6.3V_4X

1U/6.3V_4X

+1.05V_VCCEPW

R185 0_6R185 0_6

C280

C280 *1U/6.3V_4X

*1U/6.3V_4X

L13 *10uh _8_100MAL13 *10uh_8_100MA

C510

C510 *10U/6.3V_8X

*10U/6.3V_8X

VCCME = 1.01A( 60mils)

R431 0_4R431 0_4

C491

0.1U/10V_4X

R139 0_8R139 0_8

C472

C472 1U/6.3V_4X

1U/6.3V_4X

VCCSUS3_3 = 11 9mA(15mils)

+3V_S5

R195 0_6R195 0_6

C276

0.1U/10V_4X

R433 0_6R433 0_6

C494

0.1U/10V_4X

+1.05V

VCC5REFSUS=1mA

R138 10/F_4R138 10/F_4

D11 CH500H-40PTD11 CH500H-40PTC265

C225

0.1U/10V_4X

V5REF= 1mA

R168 10/F_4R168 10/F_4

D13 CH500H-40PTD13 CH500H-40PT

C252

C252 1U/6.3V_4X

1U/6.3V_4X

R200 0_6R200 0_6

VCCSUS3_3 = 11 9mA(15mils)

C290

C290 1U/6.3V_4X

1U/6.3V_4X

R273 0_6R273 0_6

VCCPCORE = 28m A(10mils)

C326

0.1U/10V_4X

+3V

C264

0.1U/10V_4X

R242 0_8R242 0_8

C306

C306 1U/6.3V_4X

1U/6.3V_4X

??mA(??mils)

+1.05V

VCCVRM= 114mA( 15mils)

+1.05V

VCCSUSHDA= 10m A(8mils)

+3V

Modify Power f rom +3V_S5 to +3V

+5V_S5

+3V_S5

+5V

+3V

+3V_S5

+3V

+1.05V

N26

P26

P28

T27

T29

T23

+3V_VCCPUSB

T24

V23

V24

P24

+3V_VCCAUBG

T26

+VCCAUPLL

M26

+5V_PCH_VCC5REFSUS

AN23

+VCCA_USBSUS

AN24

+3V_VCCPSUS

P34

+5V_PCH_VCC5REF

V5REF

N20

N22

P20

+3V_VCCPSUS

P22

AA16

W16

+3V_VCCPCORE

T34

C314

0.1U/10V_4X

AJ2

AF13

AH13

+V1.05S_SATA3

AH14

AF14

AK1

+V1.1LAN_VCCAPLL

AF11

+VCCAFDI_VRM

AC16

+VCC_SATA

AC17

AD17

T21

V21

T19

P32

+V3.3A_1.5A_HDA_IO

C492

C492 *1U/6.3V_4X

*1U/6.3V_4X

REV-B2A Reserve R581

Cougar Point 5 /6

Friday, December 17, 2010

1

+1.05V_VCCA_A_DPL

R581

R581 *0_6

*0_6

+1.05V_VCCA_B_DPL

Quanta Computer Inc.

PROJECT :

BU5

PROJECT :

BU5

PROJECT :

BU5

11 35

L7 10uh_8_100MAL7 10uh_8_10 0MA

+1.05V

+3V

R381 *0_6R381 *0_6

L27 10uh_8_100MAL27 10uh_ 8_100MA

R380 1/F_4R380 1/F_4

A A

5

4

3

C445

C445 10U/6.3V_8X

10U/6.3V_8X

+3V_SUS_CLKF33

C449

C449 1U/6.3V_4X

1U/6.3V_4X

L8 10uh_8_100MAL8 10uh_8_10 0MA

2

+

C251

+

C251 IV@220U/2.5V_3528P_E35b

IV@220U/2.5V_3528P_E35b

+

C249

+

C249 IV@220U/2.5V_3528P_E35b

IV@220U/2.5V_3528P_E35b

C250

C250 IV@1U/6.3V_4X

IV@1U/6.3V_4X

C244

C244 IV@1U/6.3V_4X

IV@1U/6.3V_4X

Size Document Number Rev

Date: Sheet of

2A