QUANTA BD8 Schematics

For Internal Check Only
5
4
3
2
1
PCB STACK UP
LAYER 1 : TOP LAYER 2 : GND LAYER 3 : IN1
D D
LAYER 4 : PWR LAYER 5 : IN2 LAYER 6 : IN3 LAYER 7 : GND LAYER 8 : BOT
Transformer
RJ45
P28 P30
C C
B B
Card Reader Con.
A A
Card Reader 2 IN 1 (MS/SD) (GL834L)
DDRIII-SODIMM1 DDRIII-SODIMM2
Atheros
10/100M
AL8162B
WLAN Con.
SATA - HDD Con.
SATA - ODD Con.
Support zero power ODD
USB2.0 Con.
USB2.0 Con.
CCD
Port-B
BD8 Richland/Comal Block Diagram
X'TAL 25MHz
P28P28
P25
P25
P32
P31P31
P12, 13
USB2-7
USB2-0
USB2-1
USB2-6
USB2-5
Dual Channel DDR III
1600~1866 MHZ
P33
P33
USB 2.0 (Port0~13)
SATA-0
SATA-1
BATTERY
P8
PCI-Express
Audio Codec CX20756-11Z
Port-A
P29 P29 P29
HP SPK Con.MIC JACK
X'TAL 25MHz
CPU
Trinity/Piledriver APU 35W
35mm X 35mm
FS1r2 socket 722 pin uPGA
DP1(x4)
SATA III
USB2.0
Hudson/Bolton M3
24.5mm X 24.5mm
656 Pin BGA
RTC
Azalia
IHDA
P29
FAN
Display Port 2
Display Port 0
PCI-E x8
USB 3.0 (Port0~3)
AMD
P3, 4, 5, 6
DMI
UMI LINK
2.5GT /s
UMI(x4)
VGA-DAC
USB3.0
FCH
X'TAL
32.768KHz
P7, 8, 9, 10, 11
NVRAM
LPC
SPI Flash
4M
LPC
EC NPCE985L
HALL Sensor
P4 P32 P31 P34
LED
RTD2136R-CG LVDS PANEL
HDMI CONN
GPU
Sun Pro M2
P26 P32
P27
VRAM DDR3-128MB*4 VRAM DDR3-256MB*4
29mm X 29mm
P14~21, 24
X'TAL
27.0MHz
CRT Con.
USB3-0 USB2-10
USB3.0 Con.
USB3-1
USB3.0 Con.
USB2-11
P9
K/B Con.
Touch Pad /B Con.
Power /B Con.
P34P34
eDP PANEL
P32
P25
P25
P35
P32
VRAM DDRIII
P22
POWER SYSTEM
ISL88731CHRTZ-T TPS51123A TPS51216RUKR TPS51211DSCR TPS51211DSCR OSL6277 G9661-25ADJF12U ISL95870AHRUZ-L
CHARGER
+15V +3VPCU +3V_S5 +3V +5VPCU +5V_S5 +5V
+SMDDR_VTERM +SMDDR_VREF
+1.5VSUS +1.5V_S5 +1.5V
+1.2V_VDDPR
+1.1V_DUAL +1.1V
+VDD_CORE +VDDNB_CORE
+2.5V_VDDA DISCHARGE
+VGPU_CORE +3V_GPU
+1.8V_GPU +1.5V_GPU
+1V_GPU
01
P36
P37
P38
P39
P40
P41
P42
P43,P44
5
4
3
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
Date: Sheet of
PROJECT :
Block Diagram
Block Diagram
Block Diagram
Richland
Richland
Richland
of
147
147
1
147
1A
1A
1A
For Internal Check Only
5
4
3
2
1
02
Table of Contents
D D
C C
B B
A A
PAGE DESCRIPTION
Schematic Block Diagram
1
Front Page
2
3 - 6
Processor
7 - 11
FCH
8
RTC RTC DDRIII SO-DIMM
12 - 13 14 - 21
Thames/Seymour(M2) VGA
22 - 23
VRAM - DDR3 VGA
24
PX VGA USB Connector USB
25
USB 3.0 Redriver U3B USB Sleep Charger SLC TRAVIS Decoder LDS
26
HDMI comm part
27
Touch Screen Atheros LAN
28
Codec (CX20671-21Z)
29
MINI Card (Wi-Fi & WIMAX)
30
Card reader
31
LED LED VGA Connector
32
LCD Panel CRT & CRT BUS SWITCH CCD HALL SENSOR&BACK LIGHT SWITCH HDD HDD
33
ODD
34
Thermal THC FAN THC
35
KeyBoard TP&FP board TPD,FPD Power SW PSW EC NPCE885LA0DX
36 37
Charger (ISL88731CHRTZ-T)
38
System 5V/3V
DDR 1.5V
39 40
+1.2V_VDDPR
41
+1.1V_DUAL
+VCC_CORE 2+1
42 43
Discharge GPU_CORE
44 45
Power Sequence Change List
46
BOI-FUNCTIONS
CPU CLG
DDR
HDM TSN LAN ADO MNW MMC
VGA LDS CRT CCD HSR
ODD
KBC
KBC PWM PWM PWM PWM PWM PWM PWM PWM
POWER PLANE
+VIN +VCCRTC +3V +3V_S5 +3VPCU +5V +5V_S5 +5VPCU
WIMAX_P +1.5VSUS +1.5V +1.2V_VDDPR +1.1V_DUAL
+VDD_CORE +VDDNB_CORE ~ VDDA_PWRGD S0 +VGPU_CORE
+1.8V_GPU +1V_GPU +1V +3V_GPU +1.5V_GPU +2.5V_VDDA +2.5V MAIN_ON S0
VOLTAGE
10V~+19V
+3.0V~+3.3V
+3.3V +3.3V +3.3V +5V +5V +5V
+3.3V
+1.5V S5_ON +1.5V +1.2V VDDA_PWRGD +1.1V +1.1V_DUAL_EN
+1.1V+1.1V MAIN_ON
~
+1.8V
+3.3V +1.5V PX_MODE_D
GND PLANE PAGE
GND_SIGNAL 8769GND 36
GND ADOGND 29
32
28 ALL
CONTROL SIGNAL
MAIN_ON S5_ON
MAIN_ON S0 S5_ON S0~S5
AC/DC Insert enable
WMAX_P
MAIN_ON
VDDA_PWRGD
PX_MODE PE_GPIO1 DGPU_PWREN PE_GPIO1 S0
Value Code
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
CEC@ Debug@
IV@ U3@ 1G4@ 1G8@ 2G@ VRAM 2Gb AMD@ AMD VRAM DIS@ DISCRETE M2@
NMP@ LPC Debug Card PX4@ PX5@ Sam@ Samsung VRAM U2@ E@ EMI
Power States
ACTIVE IN
S0~S5 S0~S5 S0 S0~S5 S0~S5AC/DC Insert enable
S0~S5
S0 S0~S3 S0 S0 S0~S5
S0
S0
S0 S0 S0
S0
FUNCTIONSITEM
CEC HDT+ Debug DISCRETEEV@ UMA Internal USB 3.0 VRAM 1Gb*4 VRAM 1Gb*8
M2 FCH M3 FCHM3@
PX4 Mode PX5 Mode
USB 2.0 (colay W USB 3.0)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
5
4
3
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
POWER STAGE & BOI-FUNCTION
POWER STAGE & BOI-FUNCTION
POWER STAGE & BOI-FUNCTION
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
Date: Sheet of
Date: Sheet
PROJECT :
1
Richland
Richland
Richland
of
247
247
247
1A
1A
1A
For Internal Check Only
5
4
3
2
1
U1F
PEG_RXP0[14] PEG_RXN0[14]
PCIE_RXP_LAN[28] PCIE_RXN_LAN[28] PCIE_RXP_WLAN[30] PCIE_RXN_WLAN[30]
PEG_RXP1[14] PEG_RXN1[14] PEG_RXP2[14] PEG_RXN2[14] PEG_RXP3[14] PEG_RXN3[14] PEG_RXP4[14] PEG_RXN4[14] PEG_RXP5[14] PEG_RXN5[14] PEG_RXP6[14] PEG_RXN6[14] PEG_RXP7[14] PEG_RXN7[14]
UMI_RXP0[8] UMI_RXN0[8] UMI_RXP1[8] UMI_RXN1[8] UMI_RXP2[8] UMI_RXN2[8] UMI_RXP3[8] UMI_RXN3[8]
+1.2V_VDDP
D D
C C
TO PCIE-LAN
TO WLAN
B B
PEG_RXP0 PEG_RXN0 PEG_RXP1 PEG_RXN1 PEG_RXP2 PEG_RXN2 PEG_RXP3 PEG_RXN3 PEG_RXP4 PEG_RXN4 PEG_RXP5 PEG_RXN5 PEG_RXP6 PEG_RXN6 PEG_RXP7 PEG_RXN7
PCIE_RXP_LAN PCIE_RXN_LAN PCIE_RXP_WLAN PCIE_RXN_WLAN
UMI_RXP0 UMI_RXN0 UMI_RXP1 UMI_RXN1 UMI_RXP2 UMI_RXN2 UMI_RXP3 UMI_RXN3
R1 196/F_6
P_ZVDDP
AB8 AB7 AA9 AA8 AA5 AA6
AE5 AE6 AD8 AD7 AC9 AC8 AC5 AC6
AG8 AG9 AG6 AG5 AF7 AF8 AE8 AE9
AG11
Y8
Y7 W9 W8 W5 W6
V8
V7
U9 U8 U5 U6
T8
T7
R9 R8 R5 R6
P8
P7
N9 N8 N5 N6 M8 M7
P_GFX_RXP0 P_GFX_RXN0 P_GFX_RXP1 P_GFX_RXN1 P_GFX_RXP2 P_GFX_RXN2 P_GFX_RXP3 P_GFX_RXN3 P_GFX_RXP4 P_GFX_RXN4 P_GFX_RXP5 P_GFX_RXN5 P_GFX_RXP6 P_GFX_RXN6 P_GFX_RXP7 P_GFX_RXN7 P_GFX_RXP8 P_GFX_RXN8 P_GFX_RXP9 P_GFX_RXN9 P_GFX_RXP10 P_GFX_RXN10 P_GFX_RXP11 P_GFX_RXN11 P_GFX_RXP12 P_GFX_RXN12 P_GFX_RXP13 P_GFX_RXN13 P_GFX_RXP14 P_GFX_RXN14 P_GFX_RXP15 P_GFX_RXN15
P_GPP_RXP0 P_GPP_RXN0 P_GPP_RXP1 P_GPP_RXN1 P_GPP_RXP2 P_GPP_RXN2 P_GPP_RXP3 P_GPP_RXN3
P_UMI_RXP0 P_UMI_RXN0 P_UMI_RXP1 P_UMI_RXN1 P_UMI_RXP2 P_UMI_RXN2 P_UMI_RXP3 P_UMI_RXN3
P_ZVDDP
PCI EXPRESS
GRAPHICS
GPP
UMI-LINK
P_GFX_TXP0 P_GFX_TXN0 P_GFX_TXP1 P_GFX_TXN1 P_GFX_TXP2 P_GFX_TXN2 P_GFX_TXP3 P_GFX_TXN3 P_GFX_TXP4 P_GFX_TXN4 P_GFX_TXP5 P_GFX_TXN5 P_GFX_TXP6 P_GFX_TXN6 P_GFX_TXP7 P_GFX_TXN7 P_GFX_TXP8 P_GFX_TXN8 P_GFX_TXP9
P_GFX_TXN9 P_GFX_TXP10 P_GFX_TXN10 P_GFX_TXP11 P_GFX_TXN11 P_GFX_TXP12 P_GFX_TXN12 P_GFX_TXP13 P_GFX_TXN13 P_GFX_TXP14 P_GFX_TXN14 P_GFX_TXP15 P_GFX_TXN15
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
P_UMI_TXP0 P_UMI_TXN0 P_UMI_TXP1 P_UMI_TXN1 P_UMI_TXP2 P_UMI_TXN2 P_UMI_TXP3 P_UMI_TXN3
P_ZVSS
AB2
PEG_TXP0_C
AB1
PEG_TXN0_C
AA3
PEG_TXP1_C
AA2
PEG_TXN1_C
Y5
PEG_TXP2_C
Y4
PEG_TXN2_C
Y2
PEG_TXP3_C
Y1
PEG_TXN3_C
W3
PEG_TXP4_C
W2
PEG_TXN4_C
V5
PEG_TXP5_C
V4
PEG_TXN5_C
V2
PEG_TXP6_C
V1
PEG_TXN6_C
U3
PEG_TXP7_C
U2
PEG_TXN7_C
T5 T4 T2 T1 R3 R2 P5 P4 P2 P1 N3 N2 M5 M4 M2 M1
AD5
PCIE_TXP_LAN_C
AD4
PCIE_TXN_LAN_C
AD2
PCIE_TXP_WLAN_C
AD1
PCIE_TXN_WLAN_C
AC3 AC2 AB5 AB4
AG2
UMI_TXP0_C
AG3
UMI_TXN0_C
AF4
UMI_TXP1_C
AF5
UMI_TXN1_C
AF1
UMI_TXP2_C
AF2
UMI_TXN2_C
AE2
UMI_TXP3_C
AE3
UMI_TXN3_C
AH11
P_ZVSS
C1 EV@0.1U/10V_4X C3 EV@0.1U/10V_4X C5 EV@0.1U/10V_4X C7 EV@0.1U/10V_4X C9 EV@0.1U/10V_4X C11 EV@0.1U/10V_4X C13 EV@0.1U/10V_4X C15 EV@0.1U/10V_4X
C17 0.1U/10V_4X C19 0.1U/10V_4X
C21 0.1U/10V_4X C23 0.1U/10V_4X C25 0.1U/10V_4X C27 0.1U/10V_4X
R2 196/F_6
C2 EV@0.1U/10V_4X C4 EV@0.1U/10V_4X C6 EV@0.1U/10V_4X C8 EV@0.1U/10V_4X C10 EV@0.1U/10V_4X C12 EV@0.1U/10V_4X C14 EV@0.1U/10V_4X C16 EV@0.1U/10V_4X
C18 0.1U/10V_4X C20 0.1U/10V_4X
C22 0.1U/10V_4X C24 0.1U/10V_4X C26 0.1U/10V_4X C28 0.1U/10V_4X
PEG_TXP0 PEG_TXN0 PEG_TXP1 PEG_TXN1 PEG_TXP2 PEG_TXN2 PEG_TXP3 PEG_TXN3 PEG_TXP4 PEG_TXN4 PEG_TXP5 PEG_TXN5 PEG_TXP6 PEG_TXN6 PEG_TXP7 PEG_TXN7
PCIE_TXP_LAN PCIE_TXN_LAN PCIE_TXP_WLAN PCIE_TXN_WLAN
UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3
PEG_TXP0 [14] PEG_TXN0 [14] PEG_TXP1 [14] PEG_TXN1 [14] PEG_TXP2 [14] PEG_TXN2 [14] PEG_TXP3 [14] PEG_TXN3 [14] PEG_TXP4 [14] PEG_TXN4 [14] PEG_TXP5 [14] PEG_TXN5 [14] PEG_TXP6 [14] PEG_TXN6 [14] PEG_TXP7 [14] PEG_TXN7 [14]
PCIE_TXP_LAN [28] PCIE_TXN_LAN [28] PCIE_TXP_WLAN [30] PCIE_TXN_WLAN [30]
UMI_TXP0 [8] UMI_TXN0 [8] UMI_TXP1 [8] UMI_TXN1 [8] UMI_TXP2 [8] UMI_TXN2 [8] UMI_TXP3 [8] UMI_TXN3 [8]
TO PCIE-LAN
TO WLAN
03
PEG X 8
Piledriver APU
HDT+ Connector
Debug only
A A
APU_TRST#[5]
APU_TRST#
5
R8 DEBUG@0_4 R9 DEBUG@10K_4 R10 DEBUG@10K_4 R11 DEBUG@10K_4
+1.5VSUS
J1
1
CPU_VDDIO1
3
GND1
5
GND2
7
GND3
9
CPU_TRST_L
11
CPU_DBRDY3
13
CPU_DBRDY2
15
CPU_DBRDY1
17
GND4
19
CPU_VDDIO2
*DEBUG@HDT+ HEADER
4
CPU_TCK CPU_TMS
CPU_TDI
CPU_TDO
CPU_PWROK_BUF
CPU_RST_L_BUF
CPU_DBRDY0
CPU_DBREQ_L CPU_PLLTEST0 CPU_PLLTEST1
2
APU_TCK
4
APU_TMS
6
APU_TDI
8
APU_TDO
10
APU_PWROK_BUF
12
APU_RST_L_BUF
14
APU_DBRDY
16
APU_DBREQ#
18
APU_TEST19_PLLTEST0
20
APU_TEST18_PLLTEST1
APU_TCK [5] APU_TMS [5] APU_TDI [5] APU_TDO [5] APU_PWROK_BUF [5] APU_RST_L_BUF [5] APU_DBRDY [5] APU_DBREQ# [5] APU_TEST19_PLLTEST0 [5] APU_TEST18_PLLTEST1 [5]
3
2
Close by HDT+ Conector
APU_TDI APU_TCK APU_TMS APU_TRST# APU_DBREQ#
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet
R3 1K_4 R4 1K_4 R5 1K_4 R6 1K_4 R7 1K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
APU 1/4(PCIE/UMI/GPP/HDT)
APU 1/4(PCIE/UMI/GPP/HDT)
APU 1/4(PCIE/UMI/GPP/HDT)
+1.5VSUS
Richland
Richland
Richland
347
347
347
1
of
1A
1A
1A
For Internal Check Only
5
4
3
2
1
04
M_B_DQ[0..63] [13]
1K/F_4
C30
M_B_A[15:0][13]
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14
M_B_BS#[2..0][13]
M_B_DM[7..0][13]
M_B_DQSP0[13] M_B_DQSN0[13] M_B_DQSP1[13] M_B_DQSN1[13] M_B_DQSP2[13] M_B_DQSN2[13] M_B_DQSP3[13] M_B_DQSN3[13] M_B_DQSP4[13] M_B_DQSN4[13] M_B_DQSP5[13] M_B_DQSN5[13] M_B_DQSP6[13] M_B_DQSN6[13] M_B_DQSP7[13] M_B_DQSN7[13]
M_B_CLKP0[13] M_B_CLKN0[13] M_B_CLKP1[13] M_B_CLKN1[13]
M_B_CKE0[13] M_B_CKE1[13]
M_B_ODT0[13] M_B_ODT1[13]
M_B_CS#0[13] M_B_CS#1[13]
R13
M_B_RAS#[13] M_B_CAS#[13] M_B_WE#[13]
M_B_RST#[13]
M_B_A15 M_B_BS#0
M_B_BS#1 M_B_BS#2
M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7
M_B_DQSP0 M_B_DQSN0 M_B_DQSP1 M_B_DQSN1 M_B_DQSP2 M_B_DQSN2 M_B_DQSP3 M_B_DQSN3 M_B_DQSP4 M_B_DQSN4 M_B_DQSP5 M_B_DQSN5 M_B_DQSP6 M_B_DQSN6 M_B_DQSP7 M_B_DQSN7
M_B_CLKP0 M_B_CLKN0 M_B_CLKP1 M_B_CLKN1
M_B_CKE0 M_B_CKE1
M_B_ODT0 M_B_ODT1
M_B_CS#0 M_B_CS#1
M_B_RAS# M_B_CAS# M_B_WE#
M_B_RST# M_B_EVENT#
M28 M27 M24 M25
W26
AF25 AG22 AH18 AD14
AG24 AG25 AG21
AF21 AG17 AG18 AH14 AG14
W27
T27 P24 P25 N27 N26
L26
U26
L27
K27 K25
K24 U27
T28 K28
D14 A18 A22 C25
C15 B15 E18 D18 E22 D22 B26 A26
R26 R27 P27 P28
J26 J27
Y28 V25
Y27 V24
V27 V28
J25
T25
U1B
MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15
MB_BANK0 MB_BANK1 MB_BANK2
MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7
MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7
MB_CLK_H0 MB_CLK_L0 MB_CLK_H1 MB_CLK_L1
MB_CKE0 MB_CKE1
MB_ODT0 MB_ODT1
MB_CS_L0 MB_CS_L1
MB_RAS_L MB_CAS_L MB_WE_L
MB_RESET_L MB_EVENT_L
MEMORY CHANNEL B
MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7
MB_DATA8
MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15
MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23
MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31
MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39
MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47
MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55
MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63
A14 B14 D16 E16 B13 C13 B16 A16
C17 B18 B20 A20 E17 B17 B19 C19
C21 B22 C23 A24 D20 B21 E23 B23
E24 B25 B27 D28 B24 D24 D26 C27
AG26 AH26 AF23 AG23 AG27 AF27 AH24 AE24
AE22 AH22 AE20 AH20 AD23 AD22 AD21 AD20
AF19 AE18 AE16 AH16 AG20 AG19 AF17 AD16
AG15 AD15 AG13 AD13 AG16 AF15 AE14 AF13
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7
M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15
M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23
M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31
M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39
M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47
M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55
M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
Piledriver APU
M_A_DQ[0..63] [12]
M_B_EVENT#[13]
220P/50V_4X
M21 M22
AA25
AD27 AC23 AD19 AC15
AE26 AD26 AB22 AA22 AB18 AA18 AA14 AA15
AA27
AA26
W24 W23
W20 W21
U20 R20 R21 P22 P21 N24 N23 N20 N21
U23
L24 L21
L20
U24 U21
L23
E14
J17
E21
F25
G14 H14 G18
H18 J21 H21 E27 E26
T21 T22 R23 R24
H28 H27
Y25
V22
V21
H25 T24
U1A
MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15
MA_BANK0 MA_BANK1 MA_BANK2
MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7
MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7
MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1
MA_CKE0 MA_CKE1
MA_ODT0 MA_ODT1
MA_CS_L0 MA_CS_L1
MA_RAS_L MA_CAS_L MA_WE_L
MA_RESET_L MA_EVENT_L
M_VREF M_ZVDDIO
MEMORY CHANNEL A
MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7
MA_DATA8
MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15
MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23
MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31
MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39
MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47
MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55
MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63
E13 J13 H15 J15 H13 F13 F15 E15
H17 F17 E19 J19 G16 H16 H19 F19
H20 F21 J23 H23 G20 E20 G22 H22
G24 E25 G27 G26 F23 H24 E28 F27
AB28 AC27 AD25 AA24 AE28 AD28 AB26 AC25
Y23 AA23 Y21 AA20 AB24 AD24 AA21 AC21
AA19 AC19 AC17 AA17 AB20 Y19 AD18 AD17
AA16 Y15 AA13 AC13 Y17 AB16 AB14 Y13
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7
M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15
M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23
M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31
M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39
M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47
M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55
M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
M_A_A[15:0][12]
D D
M_A_BS#[2..0][12]
M_A_DM[7..0][12]
M_A_DQSP0[12] M_A_DQSN0[12] M_A_DQSP1[12] M_A_DQSN1[12]
C C
+1.5VSUS +1.5VSUS
R12
B B
M_A_EVENT#[12]
1K/F_4
C29
220P/50V_4X
M_A_DQSP2[12] M_A_DQSN2[12] M_A_DQSP3[12] M_A_DQSN3[12] M_A_DQSP4[12] M_A_DQSN4[12] M_A_DQSP5[12] M_A_DQSN5[12] M_A_DQSP6[12] M_A_DQSN6[12] M_A_DQSP7[12] M_A_DQSN7[12]
M_A_CLKP0[12] M_A_CLKN0[12] M_A_CLKP1[12] M_A_CLKN1[12]
M_A_CKE0[12] M_A_CKE1[12]
M_A_ODT0[12] M_A_ODT1[12]
M_A_CS#0[12] M_A_CS#1[12]
M_A_RAS#[12] M_A_CAS#[12] M_A_WE#[12]
M_A_RST#[12]
+MEMVREF_CPU
+1.5VSUS
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_BS#0 M_A_BS#1 M_A_BS#2
M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7
M_A_DQSP0 M_A_DQSN0 M_A_DQSP1 M_A_DQSN1 M_A_DQSP2 M_A_DQSN2 M_A_DQSP3 M_A_DQSN3 M_A_DQSP4 M_A_DQSN4 M_A_DQSP5 M_A_DQSN5 M_A_DQSP6 M_A_DQSN6 M_A_DQSP7 M_A_DQSN7
M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1
M_A_CKE0 M_A_CKE1
M_A_ODT0 M_A_ODT1
M_A_CS#0 M_A_CS#1
M_A_RAS# M_A_CAS# M_A_WE#
M_A_RST# M_A_EVENT#
+M_ZVDDIO
R14 39.2/F_4
Place close to APU within 1"
Piledriver APU
+1.5VSUS
40 MIL
+5V
FANPWR = 1.6*VSET
1 4
APE8872M
Gnd shape
2
1
U2
VIN2VO
GND
/FON
GND GND
VSET
GND
5678
3
4
40 MIL
3 5 6 7 8
G995 layout notice
4
+5V_FAN
C35
2.2U/6.3V_6X
FANSIG1[35]
+3V
C36
0.01U/25V_4X
R15 *10K_4
FANSIG1
C37 *0.01U/25V_4X
CN1
1 2 3
85205-0300L
1206 change value
3
R16 1K/F_4
R17 1K/F_4
+MEMVREF_CPU
C32
0.47U/6.3V_4X
2
C33
0.1U/10V_4X
1206 add for flash screen
C34 1000P/50V_4X
C410 39P/50V_4N
Close to C33 C34
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet
Date: Sheet of
Date: Sheet of
PROJECT :
APU 2/4(DDR3 MEM I/F)
APU 2/4(DDR3 MEM I/F)
APU 2/4(DDR3 MEM I/F)
1
Richland
Richland
Richland
of
447
447
447
1A
1A
1A
2 1
2 1
<THC>
FANSIG1
*VPORT 0603 220K-V05
+5V_FAN
*VPORT 0603 220K-V05
5
C31 2.2U/6.3V_4X
VFAN1[35]
FAN Control
A A
D1
D2
For Internal Check Only
5
4
3
2
1
1017 AMD FAE suggest(DG_1.05)
APU_THERMTRIP#_VDDIOAPU_THERMTRIP#
+1.5VSUS
APU_SVT[41]
+1.5VSUS
FCH_PWRGD
R72 *0_4
R76 DEBUG@300_4
INT_HDMI_TXDP2 INT_HDMI_TXDN2
INT_HDMI_TXDP1 INT_HDMI_TXDN1
INT_HDMI_TXDP0 INT_HDMI_TXDN0
INT_HDMI_TXCP INT_HDMI_TXCN
APU_DP_TXP0 APU_DP_TXN0
APU_DP_TXP1 APU_DP_TXN1
APU_DP_TXP2 APU_DP_TXN2
APU_DP_TXP3 APU_DP_TXN3
INT_LVDS_TXP0 INT_LVDS_TXN0
INT_LVDS_TXP1 INT_LVDS_TXN1
INT_LVDS_TXP2 INT_LVDS_TXN2
INT_LVDS_TXP3 INT_LVDS_TXN3
CLK_APU_HCLKP CLK_APU_HCLKN
CLK_DP_NSSCP CLK_DP_NSSCN
SVC SVD
APU_SVT
+1.5VSUS
APU_RST# APU_PWRGD
R38 1K/F_4
APU_TDI[3] APU_TDO[3] APU_TCK[3] APU_TMS[3]
APU_TRST#[3] APU_DBRDY[3] APU_DBREQ#[3]
APU_VDD_RUN_FB_L APU_VDDP_FB_H APU_VDDNB_RUN_FB_H APU_VDDIO_RUN_FB_H APU_VDD_RUN_FB_H APU_VDDR_FB_H
+1.5VSUS
3
2
1
2
1 3
Q6 METR3904-G_200MA
+1.5VSUS
APU_RST_L_BUF [3]
APU_PWROK_BUF [3]
C40 0.1U/10V_4X C41 0.1U/10V_4X
C43 0.1U/10V_4X C45 0.1U/10V_4X
C38 0.1U/10V_4X C48 0.1U/10V_4X
C49 0.1U/10V_4X C50 0.1U/10V_4X
C51 0.1U/10V_4X C52 0.1U/10V_4X
C53 0.1U/10V_4X C54 0.1U/10V_4X
C55 0.1U/10V_4X C56 0.1U/10V_4X
C57 0.1U/10V_4X C58 0.1U/10V_4X
C59 0.1U/10V_4X C60 0.1U/10V_4X
C61 0.1U/10V_4X
C62 eDP@0.1U/10V_4X C63 eDP@0.1U/10V_4X
C64 eDP@0.1U/10V_4X C65 eDP@0.1U/10V_4X
Q3
FDV301N_200MA
R58 100K_4
R64 1K_4
R69 1K_4
INT_HDMI_TXDP2[27] INT_HDMI_TXDN2[27]
INT_HDMI_TXDP1[27]
DP0
HDMI
D D
Hudson-M3 VGA output
Note: CLK_APU_HCLKP/N is 100MHZ SSC
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC
C C
B B
APU_THERMTRIP#[7]
APU Core Power
A A
Fan
APU_RST#
APU_PWRGD
C70 DEBUG@0.1U/10V_4X
DP1
DP2
LVDS
APU_RST#[8] APU_PWRGD[8]
APU_PROCHOT#_VDDIO[8] CORE_PWM_PROCHOT#[41]
EC
H_PROCHOT#[8]
Debug only
U4
1 2 3
A1
Y1
GND
VCC
A2
Y2
*DEBUG@74LVC2G07
6 5 4
5
INT_HDMI_TXDN1[27] INT_HDMI_TXDP0[27]
INT_HDMI_TXDN0[27]
INT_HDMI_TXCP[27] INT_HDMI_TXCN[27]
INT_LVDS_TXP0[26] INT_LVDS_TXN0[26]
INT_LVDS_TXP1[26] INT_LVDS_TXN1[26]
INT_LVDS_TXP2[32] INT_LVDS_TXN2[32]
INT_LVDS_TXP3[32] INT_LVDS_TXN3[32]
+1.5VSUS +1.5VSUS
R34 300_4
C66 150P/50V_4N
APU_VDD_RUN_FB_L[41] APU_VDDP_FB_H[39] APU_VDDNB_RUN_FB_H[41] APU_VDDIO_RUN_FB_H[38] APU_VDD_RUN_FB_H[41] APU_VDDR_FB_H[39]
FCH_PWRGD[7,11]
+1.5VSUS
R62 10K_4
2
13
Q5 METR3904-G_200MA
APU_PROCHOT#_VDDIO CORE_PWM_PROCHOT# H_PROCHOT#
R75
DEBUG@300_4
APU_RST_L_BUF
+3V
APU_PWROK_BUF
APU_DP_TXP0[9] APU_DP_TXN0[9]
APU_DP_TXP1[9] APU_DP_TXN1[9]
APU_DP_TXP2[9] APU_DP_TXN2[9]
APU_DP_TXP3[9] APU_DP_TXN3[9]
CLK_APU_HCLKP[8] CLK_APU_HCLKN[8]
CLK_DP_NSSCP[8] CLK_DP_NSSCN[8]
R35 300_4
C67 150P/50V_4N
+1.5VSUS
R63 1K_4
R36 *1K/F_4
APU_PROCHOT#_VDDIO APU_THERMTRIP#_VDDIO
APU_ALERT
APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#
R41 0_4
TP17 TP18 TP19 TP20 TP21
SYS_SHDN#
4
INT_HDMI_TXDP2_C INT_HDMI_TXDN2_C
INT_HDMI_TXDP1_C INT_HDMI_TXDN1_C
INT_HDMI_TXDP0_C INT_HDMI_TXDN0_C
INT_HDMI_TXCP_C INT_HDMI_TXCN_C
APU_DP_TXP0_C APU_DP_TXN0_C
APU_DP_TXP1_C APU_DP_TXN1_C
APU_DP_TXP2_C APU_DP_TXN2_C
APU_DP_TXP3_C APU_DP_TXN3_C
INT_LVDS_TXP0_C INT_LVDS_TXN0_C
INT_LVDS_TXP1_C INT_LVDS_TXN1_C
INT_LVDS_TXP2_C INT_LVDS_TXN2_C
INT_LVDS_TXP3_C INT_LVDS_TXN3_C
APU_SIC APU_SID
VSS_SENSE
H_PROCHOT_EC[35]
SYS_SHDN# [15,37]
U1C
L3
DP0_TXP0
L2
DP0_TXN0
K5
DP0_TXP1
K4
DP0_TXN1
K2
DP0_TXP2
K1
DP0_TXN2
J3
DP0_TXP3
J2
DP0_TXN3
H5
DP1_TXP0
H4
DP1_TXN0
H2
DP1_TXP1
H1
DP1_TXN1
G3
DP1_TXP2
G2
DP1_TXN2
F2
DP1_TXP3
F1
DP1_TXN3
L9
DP2_TXP0
L8
DP2_TXN0
L5
DP2_TXP1
L6
DP2_TXN1
K8
DP2_TXP2
K7
DP2_TXN2
J6
DP2_TXP3
J5
DP2_TXN3
AE11
CLKIN_H
AD11
CLKIN_L
AB11
DISP_CLKIN_H
AA11
DISP_CLKIN_L
B3
SVC
A3
SVD
C3
SVT
AG12
SIC
AH12
SID
AF10
RESET_L
AB12
PWROK
AC10
PROCHOT_L
AE12
THERMTRIP_L
AF12
ALERT_L
H10
TDI
J10
TDO
F10
TCK
G10
TMS
F9
TRST_L
G9
DBRDY
H9
DBREQ_L
B4
VSS_SENSE
C5
VDDP_SENSE
A4
VDDNB_SENSE
A5
VDDIO_SENSE
C4
VDD_SENSE
B5
VDDR_SENSE
Piledriver APU
H_PROCHOT_EC
ANALOG/DISPLAY/MISC
DISPLAY
PORT 0
DISPLAY
PORT 1
DISPLAY
PORT 2
CLK
TEST DISPLAY PORT
CTRL SER.
JTAG
RSVD
SENSE
2
R59 100K_4
DP0_AUXP DP0_AUXN
DP1_AUXP DP1_AUXN
DP2_AUXP DP2_AUXN
DP3_AUXP DP3_AUXN
DP4_AUXP DP4_AUXN
DP5_AUXP DP5_AUXN
MISC.
DP0_HPD DP1_HPD DP2_HPD DP3_HPD DP4_HPD DP5_HPD
DP_BLON
DP_DIGON
DP_VARY_BL
DP_AUX_ZVSS
TEST6
TEST9 TEST10 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19 TEST20 TEST24
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST30_H
TEST30_L
TEST31
TEST32_H
TEST32_L
TEST35
FS1R2
DMAACTIVE_L
TEST4
TEST5
RSVD_1 RSVD_2 RSVD_3 RSVD_4
H_PROCHOT#
3
Q4
FDV301N_200MA
1
D1 D2
E1 E2
D5 D6
E5 E6
F5 F6
G5 G6
D3 E3 D7 E7 F7 G7
C6 B6 A6
C1 AD12
M18 N18 F11 G11 H11 J11 F12 G12 J12 H12 AE10 AD10 L10 M10 P19 R19 K22 T19 N19 AA12
W10 AC12
P18 R18
Y10 AA10 Y12 K21
VDDA_PWRGD[35,39,41,42]
INT_HDMI_AUXP INT_HDMI_AUXN
APU_DP_AUXP_C APU_DP_AUXN_C
INT_LVDS_AUXP_C INT_LVDS_AUXN_C
INT_HDMI_HPD
INT_VGA_HPD_Q INT_LVDS_HPD_Q
APU_BL_EN_R APU_DIGON_R APU_VARY_BL
DP_AUX_ZVSS
APU_TEST9 APU_TEST10 APU_TEST14_BP0 APU_TEST15_BP1 APU_TEST16_BP2 APU_TEST17_BP3 APU_TEST18_PLLTEST1 APU_TEST19_PLLTEST0 APU_TEST20_SCANCLK2 APU_TEST24_SCANCLK1 APU_TEST25_H APU_TEST25_L APU_TEST28_H APU_TEST28_L
M_TEST
APU_TEST35 FS1R2
TEST4 TEST5
R30 150/F_4
+3V_S5
FS1R2
C42 0.1U/10V_4X C44 0.1U/10V_4X
C46 0.1U/10V_4X C47 0.1U/10V_4X
R28 eDP@0_4 R29 eDP@0_4
R53 10K_4
D10 RB500V-40_100MA
R244 *20K/F_4
BOOT VOLTAGE
SVC SVD
000
1
0
111
VFIX_+VDD =VCC/GND
VFIX_+VDD =OPEN
1.1 1.1
1.0 1.2
0.9 1.0
0.8 0.8
CPU Thermal sensor / MB Local TEMP
+3VPCU
R77 150_4
C69
0.1U/10V_4X
Rset(Kohm)=0.0012T*T-0.9308T+96.147,Shut down on 76dgree Hysteresis is 30C
5
4
U5
VCC
HYST
G708T1U
3
R78
32.4K/F_4
1
SET
2
GND
3
THER_SHD# SYS_SHDN#
OT#
R79 0_4
INT_HDMI_AUXP [27] INT_HDMI_AUXN [27]
APU_DP_AUXP APU_DP_AUXN
INT_LVDS_AUXP INT_LVDS_AUXN
INT_HDMI_HPD [27]
APU_BL_EN [32] APU_DIGON [32] APU_VARY_BL [26]
TP1 TP2 TP3 TP4 TP5 TP6
TP7 TP8 TP9 TP10 TP11 TP12
TP13
TP14
TP15 TP16
APU_TEST18_PLLTEST1 [3] APU_TEST19_PLLTEST0 [3]
+1.5VSUS
FS1R1 signals is for detect CPU TYPE and protect it. FS1R1 CPU this pin is N.C FS1R2 CPU this pin is LOW can remove it at MP
R37 1K_4
DMAACTIVE_L
DMAACTIVE_L controls entry and exit from the sleep and power states
Note: To override VID,Remove Rd, Re, Rf, install Rc set VID via SVC & SVD option RES.
SVC SVD APU_PWRGD
APU_PWRGD have pull up 300ohm to +1.5V on page 4
HDMI
APU_DP_AUXP [9] APU_DP_AUXN [9]
INT_LVDS_AUXP [26] INT_LVDS_AUXN [26]
DMAACTIVE_L [8]
M_TEST CONNECTION TBD
R60 0_4 R61 0_4
Re
R65 0_4
Rf
2ND_MBCLK[25,35]
2ND_MBDATA[25,35]
2
INT_HDMI_AUXP INT_HDMI_AUXN
APU_DP_AUXP_C
FCH VGA
LVDS
APU_DP_AUXN_C INT_LVDS_AUXP_C
INT_LVDS_AUXN_C
INT_LVDS_HPD_Q
INT_VGA_HPD_Q
+1.5VSUS+1.5VSUS +1.2V_VDDPR
R42 *39.2/F_4
APU_TEST35M_TEST
R49
39.2/F_4
R55 *1K_4
R66 *220_4
Ra RbRdRc
2ND_MBCLK APU_SIC
2ND_MBDATA
R181 *1.8K_4C39 0.1U/10V_4X R191 *1.8K_4
R20 1.8K_4 R21 1.8K_4
R22 1.8K_4 R23 1.8K_4
+3V
R26 LDS@1K_4
34
LDS@2N7002KDW_115MA
5
Q1B
R330 eDP@0_4
+3V
R32 1K_4
34
2N7002KDW_115MA
5
Q2B
R43 300_4
R50 *300_4
+1.5VSUS
R57
R56
*2.2K_4
*1K_4
R68
R67
*220_4
*220_4
D3 RB500V-40_100MA
+5V
6
1
+5V
APU_TEST25_L
APU_TEST18_PLLTEST1 APU_TEST19_PLLTEST0 APU_TEST20_SCANCLK2 APU_TEST24_SCANCLK1 APU_TEST14_BP0 APU_TEST16_BP2 APU_TEST17_BP3
APU_TEST25_H
APU_SVC APU_SVD APU_PWRGD_SVID_REG
C68 *0.1U/10V_4X
R70 2K/F_4
Q7
2
METR3904-G_200MA
13
21
D4 RB500V-40_100MA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
Date: Sheet of
Date: Sheet
INT_LVDS_AUXP_C INT_LVDS_AUXN_C
For eDP Panel
R27 LDS@10K_4
LDS@2N7002KDW_115MA
2
INT_LVDS_HPD
Q1A
6
1
R31 100K_4
R33 10K_4
2N7002KDW_115MA
2
FCH_VGA_HPD
Q2A
R39 100K_4
R40 510/F_4
R44 1K_4 R45 1K_4 R46 1K_4 R47 1K_4 R48 *1K_4 R51 *1K_4 R52 *1K_4
R54 510/F_4
APU_SVC [41] APU_SVD [41] APU_PWRGD_SVID_REG [41]
for normal operation open Ra , Rb,Rc
R73 2K/F_4
Q8
2
METR3904-G_200MA
13
APU_SID
21
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
APU 3/4(DISPLAY/MISC)
APU 3/4(DISPLAY/MISC)
APU 3/4(DISPLAY/MISC)
05
R24 *eDP@100K_4 R25 *eDP@100K_4
INT_LVDS_HPD [26,32]
FCH_VGA_HPD [9]
+1.5VSUS+1.5VSUS
R71
R74
1K/F_4
1K/F_4
Richland
Richland
Richland
547
547
1
547
+3V
1A
1A
1A
of
For Internal Check Only
5
APU POWER TABLE
PIN NAME VDD VDDNB VDDIO
VDDR +1.2V
D D
VDDA
C91 ESD@39P/50V_4N
NET NAME +VDD_CORE +VDDNB_CORE +1.5VSUS +1.2V_VDDP +1.2V_VDDR +2.5V_VDDA
B2A add for ESD
C77 ESD@39P/50V_4N
VOLTAGE
+1.1V
?? +1.5V +1.2VVDDP
+2.5V
C92 22U/6.3V_6X
C93 22U/6.3V_6X
+VDD_CORE +VDD_CORE
+VDDNB_CORE
C78 10U/6.3V_6X
1026 change for EOD
C104 22U/6.3V_6X
C111
0.22U/10V_4X
+1.2V_VDDP
C99
0.22U/10V_4X
+VDDNB_CAP
C105 180P/50V_4N
C112
0.22U/10V_4X
C100 180P/50V_4N
C113
0.22U/10V_4X
VDDP_A + VDDP_B = 5A
C126
C127
22U/6.3V_6X
10U/6.3V_6X
C101 180P/50V_4N
+VDDNB_CORE
C114
0.22U/10V_4X
C124 180P/50V_4N
C128 10U/6.3V_6X
C102 180P/50V_4N
+1.5VSUS
C115
0.22U/10V_4X
C125 180P/50V_4N
C129 10U/6.3V_6X
C98
0.22U/10V_4X
C C
C103 22U/6.3V_6X
VDDIO=4.6A (Up to DDR3_1600 @ 1.5V)
C110
0.22U/10V_4X
B B
+1.2V_VDDPR
R80 0_8
1026 change for EOD
C142
4.7U/6.3V_6X
C136 180P/50V_4N
C143
0.22U/10V_4X
C133
0.22U/10V_4X
+2.5V_VDDA
A A
C134
0.22U/10V_4X
L1 HCB1608KF-221T20_2A
C135 180P/50V_4N
VDDA = 0.75A
F8 H6
J1
J14
P6
P10
J16 J18
J9
K19
K3
K17
M3
K6 V10 V18
V3
F3 L18
V6
W1 T18 Y14
AA1 AB6 AC1
R1 P3
K10
H3
M19
C8
D10
B8
B12
C9 A9
A10
A8 A11 E10 E11
C10
H26
K20
J28 K23 K26 L22 L25 L28
M20 M23 M26 N22 N25 N28
P20 P23 P26
AA28
AH6 AH5 AH4 AH3 AH7
AB10
C144 3300P/50V_4X
4
U1D
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31
VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5 VDDNB_6 VDDNB_7 VDDNB_8 VDDNB_9 VDDNB_10 VDDNB_11 VDDNB_12
VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4 VDDIO_5 VDDIO_6 VDDIO_7 VDDIO_8 VDDIO_9 VDDIO_10 VDDIO_11 VDDIO_12 VDDIO_13 VDDIO_14 VDDIO_15 VDDIO_16 VDDIO_17 VDDIO_18
VDDP VDDP VDDP VDDP VDDP
VDDA
VDDNB_13 VDDNB_14 VDDNB_15 VDDNB_16 VDDNB_17 VDDNB_18 VDDNB_19 VDDNB_20 VDDNB_21 VDDNB_22 VDDNB_23
VDDNB_CAP VDDNB_CAP
VDDIO_19 VDDIO_20 VDDIO_21 VDDIO_22 VDDIO_23 VDDIO_24 VDDIO_25 VDDIO_26 VDDIO_27 VDDIO_28 VDDIO_29 VDDIO_30 VDDIO_31 VDDIO_32 VDDIO_33 VDDIO_34 VDDIO_35 VDDIO_36
Piledriver APU
C145 ESD@39P/50V_4N
B2A add for ESD
VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49 VDD_50 VDD_51 VDD_52 VDD_53 VDD_54 VDD_55 VDD_56 VDD_57 VDD_58 VDD_59 VDD_60 VDD_61 VDD_62 VDD_63
VDDR VDDR VDDR VDDR
3
R11 T10 H8 G1 U11 W11 W13 W15 W17 W19 AB3 AD3 AD6 AE1 L1 Y6 M6 N11 N1 T3 T6 U19 U1 Y16 Y18 Y3 D4 F4 AF6 AF3 L11
C11 C12 D9 D8 D12 D11 B11 A12 B10 E12 B9
K13 K12
T23 T26 U22 U25 U28 Y26 T20 R28 R25 R22 V20 V23 V26 W22 W25 W28 Y24 G28
AG10 AH8 AH9 AH10
25A Maximum IDDNBspike 33A
+VDDNB_CORE
+VDDNB_CAP
+1.5VSUS
C116 22U/6.3V_6X
VDDR = 3.3A (Up to DDR3_1600 @ 1.2V)
C130 10U/6.3V_6X
36A Maximum IDDspike 50A
C79 22U/6.3V_6X
C82 22U/6.3V_6X
C94
0.22U/10V_4X
DECOUPLING between PROCESSOR and DIMMs
+1.5VSUS
C117 22U/6.3V_6X
+1.2V_VDDR
C131 10U/6.3V_6X
1026 change for EOD
C137
0.22U/10V_4X
C138
0.22U/10V_4X
C74 22U/6.3V_6X
C83 22U/6.3V_6X
C95
0.22U/10V_4X
C75 22U/6.3V_6X
C89 22U/6.3V_6X
C96 180P/50V_4N
C76 22U/6.3V_6X
C84 22U/6.3V_6X
C85 180P/50V_4N
Across VDDIO and VSS split
C106
0.22U/10V_4X
C118 22U/6.3V_6X
C132 10U/6.3V_6X
C139 1000P/50V_4X
C107
0.22U/10V_4X
C119 22U/6.3V_6X
R81 0_8
C140 180P/50V_4N
C108 180P/50V_4N
C120
4.7U/6.3V_6X
+1.2V_VDDPR
C141 180P/50V_4N
C80 22U/6.3V_6X
C90 22U/6.3V_6X
C86
0.01U/25V_4X
C121
4.7U/6.3V_6X
C88 ESD@39P/50V_4N
C97
0.01U/25V_4X
C109 180P/50V_4N
C122
4.7U/6.3V_6X
2
+VDD_CORE
C71 470P/50V_4X
C87
0.01U/25V_4X
C72 470P/50V_4X
C81 ESD@39P/50V_4N
C123
4.7U/6.3V_6X
C73 470P/50V_4X
EMI
W18
AB17 AC22 AE21 AF24 AH23 AH25
G13 G15 G17 G19 G21 G23 G25
AC11
M11
AF11
W16
U1E
J20
VSS_1
L4
VSS_2
R7
VSS_3 VSS_4
A15
VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11
B7
VSS_12
C14
VSS_13
C16
VSS_14
C2
VSS_15
C20
VSS_16
C22
VSS_17
C24
VSS_18
C26
VSS_19
C28
VSS_20
D13
VSS_21
D15
VSS_22
D17
VSS_23
D19
VSS_24
D23
VSS_25
D25
VSS_26
D27
VSS_27
E4
VSS_28
E9
VSS_29
F14
VSS_30
F16
VSS_31
F18
VSS_32
F20
VSS_33
F22
VSS_34
F26
VSS_35
F28
VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43
G4
VSS_44
J22
VSS_45
J24
VSS_46
J4
VSS_47
J7
VSS_48
K11
VSS_49
K14
VSS_50
K9
VSS_51 VSS_52
L19
VSS_53
L7
VSS_54 VSS_55 VSS_56
V19
VSS_57
V9
VSS_58 VSS_59
W4
VSS_60
W7
VSS_61
Y11
VSS_62
Y20
VSS_63
Y22
VSS_64
Y9
VSS_65
A17
VSS_66
A13
VSS_68
K16
VSS_67
F24
VSS_69
G8
VSS_70
H7
VSS_71
J8
VSS_72
Piledriver APU
VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98
VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145
A19 A21 A23 A25 A7 AA4 AA7 AB13 AB15 AB19 AB21 AB23 AB25 AB27 AB9 AC14 AC16 AC18 AC20 AC24 AC26 AC28 AC4 AC7 AD9 AE13 AE15 AE17 M9 N10 N4 N7 R10 R4 T11 T9 U10 U18 U4 U7 V11 AE19 AE23 AE25 AE27 AE4 AE7 AF14 AF16 AF18 AF20 AF22 AF26 AF28 AF9 AG4 AG7 AH13 AH15 AH17 AH19 AH21 P9 C18 D21 W14 P11 C7 E8 K18 W12
1
06
5
4
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet
Date: Sheet of
2
Date: Sheet of
PROJECT :
APU 4/4(POWER/GND)
APU 4/4(POWER/GND)
APU 4/4(POWER/GND)
1
Richland
Richland
Richland
of
647
647
647
1A
1A
1A
For Internal Check Only
5
4
3
2
1
+3V_S5
NC,no install by default
R383 *2.2K_4
R382 *2.2K_4
D D
C C
Note:LLB#, WAKE# and PWR_BTN need pull up to +3VPCU only if S5+ mode is supported
B B
A A
R344 *2.2K_4
+3V
R272 2.2K_4 R270 2.2K_4 R271 10K_4
+3V_S5
+3V_S5
RSMRST_GATE#[35]
R369 2.2K_4 R384 2.2K_4 R698 *2.2K_4
R685 4.7K_4 R375 2.2K_4 R96 10K_4 R97 10K_4 R407 10K_4 R368 10K_4 R374 10K_4 R101 10K_4
FCH_TEST0
FCH_TEST1
FCH_TEST2
SMB_RUN_CLK SMB_RUN_DAT
GPIO65
SMB_LAN_CLK SMB_LAN_DAT VGA_PD
APU_THERMTRIP#
PWR_BTN#
FCH_ODD_EN
ODD_PRSNT# PCIE_WAKE#
USB_SC_OC# USB_NORMAL_OC# USB_DB_OC#
R430 0_4
remove pull hi ( chip internal have pull hi )
For Dimm
For Lan&WiFi
FCH_ODD_EN [33]
USB_DB_OC#[25,35] USB_SC_OC#[25,35]
USB_NORMAL_OC#[25,35]
GEVENT12# ~18# are +3V_S5
RSMRST#
R432 22K_4
G2 *SHORT_PAD
APU_THERMTRIP#[5]
FCH_PCIE_LAN_CLKREQ#[28]
FCH_PCIE_WLAN_CLKREQ#[30]
VGA_PD for power control
PCIE_REQ_GPU#[15]
ODD_PRSNT#[33]
USB_DB_OC# USB_NORMAL_OC#
+3V_S5
R662 10K_4
12
SYS_RST#
*SHORT_PAD
T1 T2
T3
SLP_S3#[24,35] SLP_S5#[35]
DNBSWON#[35] FCH_PWRGD[5,11]
EC_A20GATE[35] EC_KBRST#[35] EC_EXT_SCI#[35]
T8
LPCPD#[35]
PCIE_WAKE#[28,30]
T9
C379 33P/50V_4N
BOARD_ID8[9] BOARD_ID9[9]
PCBEEP[29] SMB_RUN_CLK[12,13] SMB_RUN_DAT[12,13] SMB_LAN_CLK[26,30,34] SMB_LAN_DAT[26,30,34]
VGA_PD[10]
SPI_HOLD#[9]
ODD_MD#[33]
R245 0_4
R711 0_4
R710 0_4
HDaudio interface are +3V_S5
+3V_S5
R286 *10K_4
G5
12
APU_MEMHOT#
GEVENT22# GEVENT21#
SLP_S3# SLP_S5# DNBSWON# FCH_PWRGD
+3V
T10
T11
T12
R102 EV@0_4
T15 T16 T17
5 6 3
2 1
R734 *10KX8
BOARD_ID10[9]
PE_GPIO0[24] PE_GPIO1[24,43,44]
*EV@10K_4
KSO_5
R682 0_4
FCH_TEST0 FCH_TEST1
EC_A20GATE EC_KBRST# EC_EXT_SCI#
LPCPD# SYS_RST#
PCIE_WAKE#
GEVENT20#
R288 10K/F_4
Provided test points from checklist
FCH_TEST2
GEVENT23#
APU_THERMTRIP#
RSMRST#
R329
WD_PWRGD
FCH_PCIE_LAN_CLKREQ# BOARD_ID8 BOARD_ID9 TRAVIS_EN#
PCBEEP SMB_RUN_CLK SMB_RUN_DAT SMB_LAN_CLK SMB_LAN_DAT
GPIO62
FCH_PCIE_WLAN_CLKREQ#
GPIO51
VGA_PD SPI_HOLD#
GPIO65
FCH_BLINK
ODD_MD# GEVENT17# ODD_PRSNT# FCH_JTAG_TDO FCH_JTAG_TCK FCH_JTAG_TDIUSB_SC_OC# FCH_JTAG_RST#
ACZ_BCLK_R ACZ_SDOUT_R ACZ_SDIN0
74
ACZ_SDIN1
8
ACZ_SDIN2_R
9
FCH_ODD_EN
10
ACZ_SYNC_R ACZ_RST#_R
PE_GPIO0 PE_GPIO1
R354 *EV@10K_4
+3V_S5+3V_S5
PWR_BTN#
T18
KSO_5
U3A
AB6
PCIE_RST2#/GEVENT4#
R2
RI#/GEVENT22#
W7
SPI_CS3#/GBE_STAT1/GEVENT21#
T3
SLP_S3#
W2
SLP_S5#
J4
PWR_BTN#
N7
PWR_GOOD
T9
TEST0
T10
TEST1/TMS
V9
TEST2
AE22
GA20IN/GEVENT0#
AG19
KBRST#/GEVENT1#
R9
PME#/GEVENT3#
C26
LPC_SMI#/GEVENT23#
T5
LPC_PD#/GEVENT5#
U4
SYS_RESET#/GEVENT19#
K1
WAKE#/GEVENT8#
V7
IR_RX1/GEVENT20#
R10
THRMTRIP#/SMBALERT#/GEVENT2#
AF19
WD_PWRGD
U2
RSMRST#
AG24
CLK_REQ4#/SATA_IS0#/GPIO64
AE24
CLK_REQ3#/SATA_IS1#/GPIO63
AE26
SMARTVOLT1/SATA_IS2#/GPIO50
AF22
CLK_REQ0#/SATA_IS3#/GPIO60
AH17
SATA_IS4#/FANOUT3/GPIO55
AG18
SATA_IS5#/FANIN3/GPIO59
AF24
SPKR/GPIO66
AD26
SCL0/GPIO43
AD25
SDA0/GPIO47
T7
SCL1/GPIO227
R7
SDA1/GPIO228
AG25
CLK_REQ2#/FANIN4/GPIO62
AG22
CLK_REQ1#/FANOUT4/GPIO61
J2
IR_LED#/LLB#/GPIO184
AG26
SMARTVOLT2/SHUTDOWN#/GPIO51
V8
DDR3_RST#/GEVENT7#/VGA_PD
W8
GBE_LED0/GPIO183
Y6
SPI_HOLD#/GBE_LED1/GEVENT9#
V10
GBE_LED2/GEVENT10#
AA8
GBE_STAT0/GEVENT11#
AF25
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#
M7
BLINK/USB_OC7#/GEVENT18#
R8
USB_OC6#/IR_TX1/GEVENT6#
T1
USB_OC5#/IR_TX0/GEVENT17#
P6
USB_OC4#/IR_RX0/GEVENT16#
F5
USB_OC3#/AC_PRES/TDO/GEVENT15#
P5
USB_OC2#/TCK/GEVENT14#
J7
USB_OC1#/TDI/GEVENT13#
T8
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
AB3
AZ_BITCLK
AB1
AZ_SDOUT
AA2
AZ_SDIN0/GPIO167
Y5
AZ_SDIN1/GPIO168
Y3
AZ_SDIN2/GPIO169
Y1
AZ_SDIN3/GPIO170
AD6
AZ_SYNC
AE4
AZ_RST#
K19
PS2_DAT/SDA4/GPIO187
J19
PS2_CLK/CEC/SCL4/GPIO188
J21
SPI_CS2#/GBE_STAT2/GPIO166
D21
PS2KB_DAT/GPIO189
C20
PS2KB_CLK/GPIO190
D23
PS2M_DAT/GPIO191
C22
PS2M_CLK/GPIO192
F21
KSO_0/GPIO209
E20
KSO_1/GPIO210
F20
KSO_2/GPIO211
A22
KSO_3/GPIO212
E18
KSO_4/GPIO213
A20
KSO_5/GPIO214
J18
KSO_6/GPIO215
H18
KSO_7/GPIO216
G18
KSO_8/GPIO217
B21
KSO_9/GPIO218
K18
KSO_10/GPIO219
D19
KSO_11/GPIO220
A18
KSO_12/GPIO221
C18
KSO_13/GPIO222
B19
KSO_14/XDB0/GPIO223
B17
KSO_15/XDB1/GPIO224
A24
KSO_16/XDB2/GPIO225
D17
KSO_17/XDB3/GPIO226
33_S5
33_S5
HUDSON-M3
Part 4 of 5
33_S0
33_S0
33_S5
33_S5
33_S5
33_S5
33_S5
33_S5
33_S0 33_S0 33_S0 33_S0
33_S5 33_S5
33_S0
33_S5
33_S5
33_S5 33_S5
33_S5
33_S5/1.5V_S5 33_S5/1.5V_S5 33_S5/1.5V_S5 33_S5/1.5V_S5
33_S5
33_S5 33_S5 33_S5
33_S5 33_S5 33_S5 33_S5 33_S5 33_S5 33_S5
33_S5
33_S5 33_S5 33_S5
33_S5
EMBEDDED
33_S5
CTRL
33_S5 33_S5
33_S5
33_S5
33_S5
33_S5
To Azalia
ACZ_SDOUT_R ACZ_SYNC_R ACZ_BCLK_R ACZ_BITCLK
ACZ_RST#_R ACZ_RST#
R392 33_4 R391 33_4
R406 33_4
R357 33_4
USBCLK/14M_25M_48M_OSC
33_S0
33_S0
33_S5 33_S5
33_S5
HD
33_S0 33_S0 33_S0 33_S0
33_S5
33_S5 33_S5
33_S5 33_S5
AUDIO
33_S5
33_S5
33_S5
33_S5
USB_FSD1P/GPIO186
USB
MISC
33_S5
USB_FSD0P/GPIO185
USB
1.1
ACPI / WAKE UP
EVENTS
33_S5
USB
2.0
GPIO
33_S0
33_S0
33_S5
USB
OC
33_S5
USB
3.0
33_S5 33_S5
33_S5
SCL3_LV/GPIO195
33_S5 33_S5 33_S5
EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
33_S5
C571
SDA3_LV/GPIO196 EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198
EC_PWM3/EC_TIMER3/GPIO200
33_S5 33_S5 33_S5 33_S5 33_S5 33_S5 33_S5 33_S5
ACZ_SDOUT ACZ_SYNC
*22P/50V_4N
ACZ_SDIN0
USB_RCOMP
USB_FSD1N
USB_FSD0N
USB_HSD13P
USB_HSD13N
USB_HSD12P
USB_HSD12N
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9P USB_HSD9N
USB_HSD8P USB_HSD8N
USB_HSD7P USB_HSD7N
USB_HSD6P USB_HSD6N
USB_HSD5P USB_HSD5N
USB_HSD4P USB_HSD4N
USB_HSD3P USB_HSD3N
USB_HSD2P USB_HSD2N
USB_HSD1P USB_HSD1N
USB_HSD0P USB_HSD0N
USBSS_CALRP USBSS_CALRN
USB_SS_TX3P USB_SS_TX3N
USB_SS_RX3P USB_SS_RX3N
USB_SS_TX2P USB_SS_TX2N
USB_SS_RX2P USB_SS_RX2N
USB_SS_TX1P USB_SS_TX1N
USB_SS_RX1P USB_SS_RX1N
USB_SS_TX0P USB_SS_TX0N
USB_SS_RX0P USB_SS_RX0N
SCL2/GPIO193 SDA2/GPIO194
KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208
G8 B9
USB_RCOMP_SB
H1 H3
H6 H5
H10 G10
K10 J12
G12
USBP11+
F12
USBP11-
K12
USBP10+
K13
USBP10-
B11 D11
E10
USBP8+
F10
USBP8-
C10
USBP7+
A10
USBP7-
H9
USBP6+_LCD
G9
USBP6-_LCD
A8
USBP5+
C8
USBP5-
F8 E8
C6 A6
C5
USBP2+
A5
USBP2-
C1
USBP1+
C3
USBP1-
E1
USBP0+
E3
USBP0-
C16
USBSS_CALRP
A16
USBSS_CALRN
A14 C14
C12 A12
D15 B15
E14 F14
F15
USB3_TXP1
G15
USB3_TXN1
H13
USB3_RXP1
G13
USB3_RXN1
J16
USB3_TXP0
H16
USB3_TXN0
J15
USB3_RXP0
K15
USB3_RXN0
H19
SMB_EC_CLK
G19
SMB_EC_DAT
G22 G21 E22 H22 J22
EC_PWM2
H21 K21
K22 F22 F24 E24 B23 C24 F18
ACZ_SDOUT [29]
ACZ_SYNC [29]
ACZ_BITCLK [29]
ACZ_RST# [29]
ACZ_SDIN0 [29]
R647 11.8K/F_6
T4 T5
Note: USB P/N pairs with trace lengths up to 10"
T6 T7
USBP11+ [25] USBP11- [25]
USBP10+ [25] USBP10- [25]
1114 add touch screen function close to FCH
2 4
1 3
USBP7+ [30] USBP7- [30]
USBP6+_LCD [32] USBP6-_LCD [32]
USBP5+ [31] USBP5- [31]
RP24 *TSN@0X2
USB3.0 W/O S&C
USB3.0 S&C
USBP8+_R [27] USBP8-_R [27]
WLAN
CCD on LVDS
Card Reader
C3A
2
RP25 TSN@0X2
R646 U3@1K/F_4 R642 U3@1K/F_4
within 1000mil 35ohm
R318 *0_4 R315 *0_4
EC
I2Ce_1(M)
I2Ce_2(M)
I2Ce_3(M)
1
4
3
USBP1+ [25] USBP1- [25]
USBP0+ [25] USBP0- [25]
+FCH_VDD_11_SSUSB_S
USB3_TXP1 [25] USB3_TXN1 [25]
USB3_RXP1 [25] USB3_RXN1 [25]
USB3_TXP0 [25] USB3_TXN0 [25]
USB3_RXP0 [25] USB3_RXN0 [25]
MBCLK [35,36] MBDATA [35,36]
EC_PWM2 [11]
FCH
I2Cf_2(M) Charger Battery
EEPROM ALLAPU
VGA Thermal
USB2.0
USB2.0 debug port
USB3.0 Port 2
USB3.0 S&C
GPIO193 ~196 are +3V_S5
Device
I2C_Device(S)
I2Cf_3(M) APU
I2Cf_1(M)
Lan WLan
I2Cf_0(M) Dimm Clk Gen
Touch Screen
HUB3
HUB2
HUB1
ALL/S5
S5
S5
S0
EC will Conflict with FCH, did not mount R113&R114
07
5
4
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
2
Date: Sheet of
PROJECT :
FCH 1/5(GPIO/USB/AZ)
FCH 1/5(GPIO/USB/AZ)
FCH 1/5(GPIO/USB/AZ)
1
Richland
Richland
Richland
of
747
747
747
1A
1A
1A
For Internal Check Only
5
4
3
2
1
08
APU_PCIE_RST#[24,28,30]
C842 150P/50V_4N
D D
Note: CLK_FCH_SRCP/N is 100MHZ SSC
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC
Note: CLK_PCIE_TRAVISP/N is 100MHZ non-SSC Note: CLK_APU_HCLKP/N is 100MHZ SSC Note: CLK_PCIE_VGAP/N is 100MHZ SSC
C C
B B
Note: GPP_CLK(0:8)P/N is 100MHZ SSC capable
CLK_DP_NSSCP[5] CLK_DP_NSSCN[5]
CLK_APU_HCLKP[5] CLK_APU_HCLKN[5]
CLK_PCIE_VGAP[14] CLK_PCIE_VGAN[14]
CLK_PCIE_WLANP[30] CLK_PCIE_WLANN[30]
CLK_PCIE_LANP[28] CLK_PCIE_LANN[28]
1205 for FAE suggestion change to 10pF from 22pF
PLTRST#[27,30,31,35] PCI_CLK1 [11] UMI_RXP0[3]
UMI_RXN0[3] UMI_RXP1[3] UMI_RXN1[3] UMI_RXP2[3] UMI_RXN2[3] UMI_RXP3[3] UMI_RXN3[3]
UMI_TXP0[3] UMI_TXN0[3] UMI_TXP1[3] UMI_TXN1[3] UMI_TXP2[3] UMI_TXN2[3] UMI_TXP3[3] UMI_TXN3[3]
C397
C381
PLTRST#
UMI_RXP1 UMI_RXN1 UMI_RXP2 UMI_RXN2 UMI_RXP3 UMI_RXN3
UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3
+1.1V_PCIE_VDDR
+1.1V_CKVDD
CLK_DP_NSSCP CLK_DP_NSSCN
CLK_APU_HCLKP CLK_APU_HCLKN
CLK_PCIE_LANP INT_CLK_PCIE_LANP
10P/50V_4N
23
Y6 LAN@25MHZ_30
4 1
10P/50V_4N
1204 change Crystal to 3225
A A
R670 33_4 C843 150P/50V_4N
R669 33_4 R434 0_4
C767 0.1U/10V_4X C764 0.1U/10V_4X C765 0.1U/10V_4X C766 0.1U/10V_4X C770 0.1U/10V_4X C771 0.1U/10V_4X C773 0.1U/10V_4X C774 0.1U/10V_4X
R275 590/F_4 R276 2K/F_4
PCIE_RST#_R A_RST#
UMI_RXP0_CUMI_RXP0 UMI_RXN0_CUMI_RXN0 UMI_RXP1_C UMI_RXN1_C UMI_RXP2_C UMI_RXN2_C UMI_RXP3_C UMI_RXN3_C
PCIE_CALRP PCIE_CALRN
within 1000mil 50~55ohm
3
3
3
3
3
T26
CLK_CALRN
INT_CLK_FCH_SRCP INT_CLK_FCH_SRCN
INT_CLK_DP_NSSCP INT_CLK_DP_NSSCN
INT_CLK_PCIE_TRAVISP INT_CLK_PCIE_TRAVISN
INT_CLK_APU_HCLKP INT_CLK_APU_HCLKN
INT_CLK_PCIE_VGAPCLK_PCIE_VGAP INT_CLK_PCIE_VGANCLK_PCIE_VGAN
INT_CLK_PCIE_WLANPCLK_PCIE_WLANP INT_CLK_PCIE_WLANNCLK_PCIE_WLANN
INT_CLK_PCIE_LANNCLK_PCIE_LANN
CLK_48M_CARD_R
25M_X1
25M_X2
R274 2K/F_4
TP62 TP63
241
RP22 0X2
TP24 TP25
241
RP20 0X2
241
RP23 0X2
241
RP12 0X2
241
RP18 0X2
Card Reader
R715 0_4
R273 1M/F_4
AE30 AE32 AD33 AD31 AD28 AD29 AC30 AC32
AB33 AB31 AB28 AB29
AF29 AF31
AB26 AB27 AA24 AA23
AA27 AA26
U3E
AE2 AD5
Y33 Y31 Y28 Y29
V33 V31 W30 W32
W27 V27 V26 W26 W24 W23
F27
G30 G28
R26
T26
H33 H31
T24 T23
J30
K29 H27
H28
J27
K26
F33 F31
E33 E31
M23 M24
M27 M26
N25 N26
R23 R24
N27 R27
J26
C31
C33
PCIE_RST# A_RST#
UMI_TX0P UMI_TX0N UMI_TX1P UMI_TX1N UMI_TX2P UMI_TX2N UMI_TX3P UMI_TX3N
UMI_RX0P UMI_RX0N UMI_RX1P UMI_RX1N UMI_RX2P UMI_RX2N UMI_RX3P UMI_RX3N
PCIE_CALRP PCIE_CALRN
GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N
GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N
CLK_CALRN
PCIE_RCLKP PCIE_RCLKN
DISP_CLKP DISP_CLKN
DISP2_CLKP DISP2_CLKN
APU_CLKP APU_CLKN
SLT_GFX_CLKP SLT_GFX_CLKN
GPP_CLK0P GPP_CLK0N
GPP_CLK1P GPP_CLK1N
GPP_CLK2P GPP_CLK2N
GPP_CLK3P GPP_CLK3N
GPP_CLK4P GPP_CLK4N
GPP_CLK5P GPP_CLK5N
GPP_CLK6P GPP_CLK6N
GPP_CLK7P GPP_CLK7N
GPP_CLK8P GPP_CLK8N
14M_25M_48M_OSC
25M_X1
25M_X2
HUDSON-M3
Part 1 of 5
33_S0
PCI
CLKS
PCI EXPRESS
INTERFACES
33_S0
LDRQ1#/CLK_REQ6#/GPIO49
CLOCK
GENERATOR
S5
PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
PCIRST#
AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8
AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26
33_S0
AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31
PCI
INTERFACE
CBE0# CBE1# CBE2# CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY# STOP#
PERR# SERR# REQ0#
REQ1#/GPIO40 REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42
GNT3#/CLK_REQ7#/GPIO46
APU
PLUS
GNT0#
GNT1#/GPO44
GNT2#/SD_LED/GPO45
CLKRUN#
LOCK#
INTE#/GPIO32 INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
LPCCLK0 LPCCLK1
LPC
LFRAME#
LDRQ0#
33_S0
SERIRQ/GPIO48
DMA_ACTIVE#
PROCHOT#
APU_PG
LDT_STP#
APU_RST#
32K_X1 32K_X2
S5_CORE_EN
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G
LAD0 LAD1 LAD2 LAD3
AF3 AF1
PCI_CLK1_R PCI_CLK1
AF5 AG2
PCI_CLK3_R
AF6
PCI_CLK4_R PCI_CLK4
AB5
AJ3 AL5 AG4 AL6 AH3 AJ5 AL1 AN5 AN6 AJ1 AL8 AL3 AM7 AJ6 AK7 AN8 AG9 AM11 AJ10 AL12 AK11 AN12 AG12 AE12 AC12 AE13 AF13 AH13 AH14 AD15 AC15 AE16 AN3 AJ8 AN10 AD12 AG10 AK9 AL10 AF10 AE10
PAR
AH1 AM9 AH8 AG15 AG13 AF15 AM17 AD16 AD13 AD21 AK17 AD19 AH9
AF18 AE18 AC16 AD18
B25 D25 D27 C28 A26 A29 A31 B27 AE27 AE19
G25 E28 E26 G26 F26
G2 G4 H7
F1 F3 E6
T135
PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PE_PWRGD HUDSON_MEMHOT#
LPC_CLK0_R LPC_CLK1_R
LDRQ#0 LDRQ#1
DMAACTIVE_L APU_PROCHOT#_VDDIO
APU_PWRGD_R APU_STOP#
APU_RST#
32K_X1 32K_X2
S5_CORE_EN RTC_CLK
INTRUDER_ALERT#
+3V_RTC
T20
T21
T22
20MIL
CLKRUN#
R436 0_4 R433 0_4
R428 *2.2K_4
R280 NMP@22_4 R281 22_4
R608 22_4 R611 22_4
T38 T30
R716 0_4
C534 *0.1U/10V_4X
R352 *1M/F_4
R656 560_4
12
G6
*SHORT_PAD
PCI_CLK3
CLKRUN# [35]
LPC_CLK0 LPC_CLK1 LAD0 LAD1 LAD2 LAD3
SERIRQ
APU_PWRGD
T31
C531
0.1U/10V_4X
PCI_CLK3 [11] PCI_CLK4 [11]
PCI_AD23 [11] PCI_AD24 [11] PCI_AD25 [11] PCI_AD26 [11] PCI_AD27 [11]
PE_PWRGD [35,44]
+3V
SERIRQ [35]
DMAACTIVE_L [5]
APU_PROCHOT#_VDDIO [5]
T27
RTC_CLK [11,35] +3V_RTC +3V_RTC
PCLK_DEBUG [30] PCLK_591 [35]
LPC_CLK0 [11] LPC_CLK1 [11] LAD0 [30,35] LAD1 [30,35] LAD2 [30,35] LAD3 [30,35] LFRAME# [30,35]
APU_PWRGD [5] APU_RST# [5]
RTC Circuitry(RTC)
+3V_RTC
20MIL
R655 510/F_6
C537 1U/10V_4X
GPIONet I/O Power Well
GPIO28
GPIO191
GPIO192
DGPU_PWRGD
DGPU_RST#PE_GPIO0
PE_PWRGD
PE_GPIO1
For EMI
PCLK_DEBUG PCLK_591LFRAME#
S5_CORE_EN is necessary to connect enable pin of +3VPCU/+5VPCU regulator for S5+ mode implementation
INTRUDER_ALERT# Left not connected (FCH has 50-kohm internal pull-up to VBAT).
C805 *15P/50V_4C C434 *15P/50V_4C
32K_X1
R390 20M_4
32K_X2
USE GROUND GUARD FOR 32K_X1 AND 32K_X2
23
4 1
C562 18P/50V_4C
Y7
32.768KHZ_10
C560 18P/50V_4C
20MIL
+3VRTC
I +3.3V
+3.3V
O
+3.3VDGPU_PWREN
O
D37
*RB500V-40_100MA
21
D27
BAT54C-7-F_200MA
21
D38
*RB500V-40_100MA
DOS
"0->1"
"0->1"
"0->1"
R681 0_6
+VCCRTC_2
20MIL
R680 1K/F_4
20MIL
+BAT
12
CN21 AAA-BAT-054-K01
+3VPCU
5
4
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
2
Date: Sheet of
PROJECT :
FCH 2/5(ACPI/PCI/CLK)
FCH 2/5(ACPI/PCI/CLK)
FCH 2/5(ACPI/PCI/CLK)
1
Richland
Richland
Richland
of
847
847
847
1A
1A
1A
For Internal Check Only
5
4
3
2
1
PLACE SATA AC COUPLING CAPS CLOSE TO HUDSON-M2/M3
SATA_TXP0[33]
D D
SATA HDD/SSD
SATA ODD
C C
+1.1V_AVDD_SATA
B B
SATA_TXN0[33] SATA_RXN0[33]
SATA_RXP0[33] SATA_TXP1[33]
SATA_TXN1[33] SATA_RXN1[33]
SATA_RXP1[33]
PLACE SATA_CAL RES VERY CLOSE TO BALL OF HUDSON-M2/M3
within 1000mil 35ohm
R583 931/F_4
R648 *10K/F_4
+3V
R581 1K/F_4
R156 10K_4
Integrated Clock Mode: Leave unconnected.
T138
SATA_CALRP SATA_CALRN
SATA_LED#
BOARD_ID1 BOARD_ID11
FCH_PROCHOT#_C
BOARD_ID2 BOARD_ID3 BOARD_ID4
BOARD_ID5 BOARD_ID6 BOARD_ID7 TEMPIN3
R637 10K_4
1205 Change Board ID
0111 change setting
1101 change setting
A A
1101 change setting
1029 change setting
1120 Add Board ID
5
U3B
SERIAL
33_S0
SD
CARD
ATA
SPI
ROM
VGA
DAC
VGA
MAINLINK
33_S5
Part 2 of 5
SD_CLK/SCLK_2/GPIO73
SD_CMD/SLOAD_2/GPIO74
SD_DATA0/SDATI_2/GPIO77
SD_DATA1/SDATO_2/GPIO78
GBE
LAN
33_S5
ROM_RST#/SPI_WP#/GPIO161
VGA_DDC_SDA/GPO70
ML_VGA_HPD/GPIO229
33_S5 33_S5
VIN3/SDATO_1/GPIO178
33_S5
VIN4/SLOAD_1/GPIO179
33_S5
33_S5
VIN6/GBE_STAT3/GPIO181
33_S5
VIN7/GBE_LED3/GPIO182
AK19
SATA_TX0P
AM19
SATA_TX0N
AL20
SATA_RX0N
AN20
SATA_RX0P
AN22
SATA_TX1P
AL22
SATA_TX1N
AH20
SATA_RX1N
AJ20
SATA_RX1P
AJ22
SATA_TX2P
AH22
SATA_TX2N
AM23
SATA_RX2N
AK23
SATA_RX2P
AH24
SATA_TX3P
AJ24
SATA_TX3N
AN24
SATA_RX3N
AL24
SATA_RX3P
AL26
SATA_TX4P
AN26
SATA_TX4N
AJ26
SATA_RX4N
AH26
SATA_RX4P
AN29
SATA_TX5P
AL28
SATA_TX5N
AK27
SATA_RX5N
AM27
SATA_RX5P
AL29
NC6
AN31
NC7
AL31
NC8
AL33
NC9
AH33
NC10
AH31
NC11
AJ33
NC12
AJ31
NC13
AF28
SATA_CALRP
AF27
SATA_CALRN
AD22
SATA_ACT#/GPIO67
AF21
SATA_X1
AG21
SATA_X2
AH16
FANOUT0/GPIO52
AM15
FANOUT1/GPIO53
AJ16
FANOUT2/GPIO54
AK15
FANIN0/GPIO56
AN16
FANIN1/GPIO57
AL16
FANIN2/GPIO58
K6
TEMPIN0/GPIO171
K5
TEMPIN1/GPIO172
K3
TEMPIN2/GPIO173
M6
TEMPIN3/TALERT#/GPIO174
HUDSON-M3
33_S0 33_S0 33_S0
HW MONITOR
33_S0 33_S0 33_S0
33_S5 33_S5 33_S5
BOARD ID SETTING
UMA SKU
VGA SKU
1000
900
USB3.0
USB2.0
W/O LAN
W LAN
W/O S&C
W S&C
N-Brand
Brand(Harman/Kardon)
N-METAL(W/O KBPLED)
METAL(W KBPLED) L
W/O HDMI
W HDMI
Win8
Win7
Non-TEXTURE(BOX)
TEXTURE(NBOX)
N-Brand
Brand(ONKYO)
Sun
Mars
W/O CRT
W CRT
4
H
L
H
L
SD_CD#/GPIO75
SD_WP/GPIO76
SD_DATA2/GPIO79 SD_DATA3/GPIO80
GBE_COL GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR
SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
VGA_RED
VGA_GREEN
VGA_BLUE
VGA_HSYNC/GPO68 VGA_VSYNC/GPO69
VGA_DDC_SCL/GPO71
VGA_DAC_RSET AUX_VGA_CH_P
AUX_VGA_CH_N
AUXCAL
ML_VGA_L0P ML_VGA_L0N ML_VGA_L1P ML_VGA_L1N ML_VGA_L2P ML_VGA_L2N ML_VGA_L3P ML_VGA_L3N
33_S5
VIN0/GPIO175
33_S5
VIN1/GPIO176
VIN2/SDATI_1/GPIO177
VIN5/SCLK_1/GPIO180
ID4
H
L
H
L
AL14 AN14 AJ12 AH12 AK13 AM13 AH15 AJ14
AC4 AD3 AD9 W10 AB8 AH7 AF7 AE7 AD7 AG8 AD1 AB7 AF9 AG6 AE8 AD8 AB9 AC2 AA7 W9
GBE_PHY_INTR
V6 V5 V3 T6 V1
L30 L32 M29
M28 N30
M33 N32
K31 V28
V29 U28 T31
T33 T29 T28 R32 R30 P29 P28
C29 N2
M3 L2 N4 P1 P3 M1 M5
AG16
NC1
AH10
NC2
A28
NC3
G27
NC4
L4
NC5
ID5
ID6
H
L
H
L
FCH_SPI_SO_R FCH_SPI_CLK_R FCH_SPI_CS0#_R FCH_SPI_WP
FCH_CRT_RED
FCH_CRT_GRE
FCH_CRT_BLU
FCH_VGA_HPD
VIN0 VIN1 VIN2 BOARD_ID12 BOARD_ID13 VIN_VDDIO VIN_VDDR VIN7
ID8ID1 ID2Board ID ID3
ID7
H
H
L
R342 10K_4
R380 33_4 R386 33_4 R387 33_4
R293 715/F_4
R287 100/F_4
R359 10K_4 R674 10K_4 R676 10K_4
R165 10K_4 R166 10K_4 R675 10K_4
ID9
ID10
H
L
H
L
3
ID11
H
L
FCH_SPI_SI FCH_SPI_SO
FCH_SPI_CLK
FCH_SPI_CS0#
ID12 ID13
H
L
+3V_S5
FCH_CRT_RED [32]
FCH_CRT_GRE [32]
FCH_CRT_BLU [32]
FCH_CRT_HSYNC [32] FCH_CRT_VSYNC [32]
FCH_DDCDAT [32] FCH_DDCCLK [32]
APU_DP_AUXP [5] APU_DP_AUXN [5]
+FCH_VDDAN_11_MLDAC
APU_DP_TXP0 [5] APU_DP_TXN0 [5] APU_DP_TXP1 [5] APU_DP_TXN1 [5] APU_DP_TXP2 [5] APU_DP_TXN2 [5] APU_DP_TXP3 [5] APU_DP_TXN3 [5]
H
L
FCH_SPI_CS0#[35]
FCH_SPI_CLK[35] FCH_SPI_SO[35] FCH_SPI_SI[35]
R place close to PCH
FCH_CRT_RED
FCH_CRT_GRE
FCH_CRT_BLU
+3V_S5
H
L
R291 150/F_4 R290 150/F_4 R285 150/F_4
R296 *10K/F_4
Metal
IMR
Texture
2
FCH_SPI_CS0# FCH_SPI_CLK FCH_SPI_SO FCH_SPI_SI
R376 33_4
R488 10K_4
+3V_S5
FCH_VGA_HPD [5]
Speaker Touch Pad KB BacklightBox Vendor
Box
Boxless
W25Q32BVSSIG:AKE391P0N00
W25Q16BVSSIG:AKE38FP0N01
A-stage Socket: DG008000031 91960-0084L
FCH_SPI_SI_R
C557 *22P/50V_4N
FCH_SPI_WP
+3V
B2A change board ID setting to fix keyboard BL issue
+3V_S5
BOARD_ID6[29] BOARD_ID7[34] BOARD_ID8[7] BOARD_ID9[7] BOARD_ID10[7] BOARD_ID11[29]
R496 10K_4
U18
1 6 5 2
3
CE#
VDD SCK SI SO
HOLD#
WP#
W25Q32BVSSIG
8
7 4
VSS
1101 change to SPI ROM
B2A change board ID setting for VRAM
R312 UMA@10K_4 R334 1000@10K_4 R704 U3@10K_4 R297 NLAN@10K_4 R692 NHM@10K_4 R736 W8@10K_4 R322 10K_4
R684 NS&C@10K_4 R671 10K_4 R699 10K_4
R703 NTEX@10K_4 R737 Sun@10K_4 R739 NCRT@10K_4
Board ID11Board ID10
BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID8 BOARD_ID9 BOARD_ID11
BOARD_ID5 BOARD_ID6 BOARD_ID7
BOARD_ID10 BOARD_ID12 BOARD_ID13
1126 Change Board ID for GPU
C3A change Board ID for Harman/Kardon
BOARD_ID6 BOARD_ID7 BOARD_ID8 BOARD_ID9 BOARD_ID10 BOARD_ID11
Board ID6
Box Vendor
ONKYO/Harman Kardon/Others+3.3V
+5V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
XX
FCH 3/5(SATA/VGA/GND/SPI)
FCH 3/5(SATA/VGA/GND/SPI)
FCH 3/5(SATA/VGA/GND/SPI)
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
+3V_S5
R372 10K_4
SPI_HOLD# [7]
C551
0.1U/10V_4X
R317 DIS@10K_4 R333 900@10K_4 R424 U2@10K_4 R310 LAN@10K_4 R693 HM@10K_4 R538 W7@10K_4 R320 *10K_4
R683 S&C@10K_4 R677 *10K_4 R422 *10K_4
R423 TEX@10K_4 R738 Mars@10K_4 R740 CRT@10K_4
Board ID7
V
X
X
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
Richland
Richland
Richland
of
947
947
947
1A
1A
1A
09
For Internal Check Only
5
4
3
2
1
T25 T27 U6 U14 U17 U20 U21 U30 U32 V11 V16 V18 W4 W6 W25 W28 Y14 Y16 Y18 AA6 AA12 AA13 AA14 AA16 AA17 AA25 AA28 AA30 AA32 AB25 AC6 AC18 AC28 AD27 AE6 AE15 AE21 AE28 AF8 AF12 AF16 AF33 AG30 AG32 AH5 AH11 AH18 AH19 AH21 AH23 AH25 AH27 AJ18 AJ28 AJ29 AK21 AK25 AL18 AM21 AM25 AN1 AN18 AN28 AN33
T21 L28 K33 N28
R6
C784
0.1U/10V_4X
10
PLACE ALL THE DECOUPLING CAPS ON
+3.3V_FCH_R
R299 0_8
+3V
D D
L31 HCB1608KF-221T20_2A
L32 HCB1608KF-221T20_2A
+FCH_VDDAN_11_MLDAC
+3V_S5 +FCH_VDDPL_33_SSUSB_S
L44
U3@HCB1608KF-221T20_2A
1026 change for EOD
+3V_AVDD_USB
C C
B B
L73
HCB1608KF-221T20_2A
+1.1V_DUAL
U3@HCB1608KF-221T20_2A
R413 U2@0_4
R301 0_8
HCB1608KF-221T20_2A
L46
C510 U3@1U/10V_4X
C539 1U/10V_4X
C383
2.2U/6.3V_4X
C389
2.2U/6.3V_4X
L24
C508 U3@2.2U/10V_6X
+FCH_VDDPL_33_SUSB_S
C832
2.2U/6.3V_6X
+3V_S5
HCB1608KF-221T20_2A
+1.1V_DUAL
+FCH_VDD_11_SSUSB_S
C507 U3@0.1U/10V_4X
+VDDIO_AZ
C541 1U/10V_4X
TRACE WIDTH >=15mil
C393 *0.1U/10V_4X
TRACE WIDTH >=15mil
C399 *0.1U/10V_4X
C496 U3@0.1U/10V_4X
C829 1U/10V_4X
L47
EMI
HCB1608KF-221T20_2A
HCB1608KF-221T20_2A
R302 0_8
R304 0_8
C495 U3@0.1U/10V_4X
C593
2.2U/10V_6X
C512 1U/10V_4X
R278 0_8 R279 0_8
R412 U2@0_4
C218
0.1U/10V_4X
C520
0.1U/10V_4X
L49
L52
C448 *0.1U/10V_4X
VDDQ--3.3V I/O power
C543
C491
1U/10V_4X
22U/6.3V_8X
+VDDPL_3.3V
+FCH_VDDPL_33_MLDAC +FCH_VDDAN_33_DAC_R +FCH_VDDPL_33_SSUSB_S +FCH_VDDPL_33_SUSB_S
+FCH_VDDAN_11_DAC +FCH_VDDAN_11_ML
C463
0.1U/10V_4X
R298 0_8
+FCH_VDDAN_33_DAC_R
1026 change for EOD
C552
C540
22U/6.3V_8X
10U/6.3V_8X
+FCH_VDDAN_11_USB_S
C505
0.1U/10V_4X
+FCH_VDDAN_11_SSUSB_S_R
C515
U3@10U/6.3V_8X C506 U3@1U/10V_4X
+1.1V
L36
U2@HCB1608KF-221T20_2A
L35
U3@HCB1608KF-221T20_2A
C501
0.1U/10V_4X
+1.5VSUS
C419 1U/10V_4X
TRACE WIDTH >=50mil
C545 10U/6.3V_8X
C566 2.2U/10V_6X C504 0.1U/10V_4X C548 0.1U/10V_4X
+FCH_VDDCR_11_USB_S
C518
0.1U/10V_4X
+FCH_VDDCR_11_SSUSB_S
C493 U3@1U/10V_4X
102mA
C524
C494
0.1U/10V_4X
0.1U/10V_4X
R169 0_8 R171 0_8
+FCH_VDDPL_33_PCIE +FCH_VDDPL_33_SATA
R563 *0_4 C756 *2.2U/6.3V_6X
C441
C418
4.7U/6.3V_6X
0.1U/10V_4X
+FCH_VDDPL_33_MLDAC
C382
C384
2.2U/10V_6X
0.1U/10V_4X
+3V_AVDD_USB
470mA
C525
C519
1U/10V_4X
1U/10V_4X
1026 change for EOD
TRACE WIDTH >=20mil
140mA
TRACE WIDTH >=15mil
42mA
C587 10U/6.3V_8X
282mA
424mA
C485 U3@0.1U/10V_4X
C482 U3@0.1U/10V_4X
+VDDPL_1.1V+1.1V_DUAL
C443
C427
2.2U/10V_6X
0.1U/10V_4X
1026 change for EOD
THIS SHEET CLOSE TO SB AS POSSIBLE.
U3C
HUDSON-M3
AB17
VDDIO_33_PCIGP_1
AB18
VDDIO_33_PCIGP_2
AE9
VDDIO_33_PCIGP_3
AD10
VDDIO_33_PCIGP_4
AG7
VDDIO_33_PCIGP_5
AC13
VDDIO_33_PCIGP_6
AB12
VDDIO_33_PCIGP_7
AB13
VDDIO_33_PCIGP_8
AB14
47mA 20mA 12mA 200mA 11mA 14mA 11mA 12mA
LDO_CAP
7mA
226mA
+3V_S5+3V_S5
AB16
H24
V22
U22
T22 L18
D7 AH29 AG28
M31
V21 Y22
V23 V24 V25
AB10
AB11 AA11
AA9
AA10
G7
H8
J8 K8 K9
M9
M10
N9
N10 M12 N12 M11
U12 U13
T12 T13
P16 M14 N14
P13
P14 N16
N17
P17 M17
R414 U2@0_4
L51
HCB1608KF-221T20_2A
VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10
VDDPL_33_SYS VDDPL_33_DAC VDDPL_33_ML VDDAN_33_DAC VDDPL_33_SSUSB_S VDDPL_33_USB_S VDDPL_33_PCIE VDDPL_33_SATA
LDO_CAP VDDPL_11_DAC VDDAN_11_ML_1
VDDAN_11_ML_2 VDDAN_11_ML_3 VDDAN_11_ML_4
VDDIO_33_GBE_S
VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2
VDDIO_GBE_S_1 VDDIO_GBE_S_2
VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 VDDAN_33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12
VDDAN_11_USB_S_1 VDDAN_11_USB_S_2
VDDCR_11_USB_S_1 VDDCR_11_USB_S_2
VDDAN_11_SSUSB_S_1 VDDAN_11_SSUSB_S_2 VDDAN_11_SSUSB_S_3 VDDAN_11_SSUSB_S_4 VDDAN_11_SSUSB_S_5
VDDCR_11_SSUSB_S_1 VDDCR_11_SSUSB_S_2 VDDCR_11_SSUSB_S_3 VDDCR_11_SSUSB_S_4
1026 change for EOD1026 change for EOD
PCI/GPIO I/O
CLKGEN
PCI
EXPRESS
MAIN
LINK
GBE
LAN
SERIAL
POWER
+VDDAN_3.3V_HWM
C570
2.2U/10V_6X
ATA
Part 3 of 5
VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7
CORE
S0
VDDCR_11_8 VDDCR_11_9
VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8
I/O
VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8
VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_11_SATA_8 VDDAN_11_SATA_9
VDDAN_11_SATA_10
VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8
3.3V_S5 I/O
USB
VDDXL_33_S
VDDCR_11_S_1 VDDCR_11_S_2
VDDPL_11_SYS_S
VDDAN_33_HWM_S
VDDIO_AZ_S
USB
SS
C532
0.1U/10V_4X
1007mA
T14 T17 T20 U16 U18 V14 V17 V20 Y17
340mA
H26 J25 K24 L22 M22 N21 N22 P22
1088mA
AB24 Y21 AE25 AD24 AB23 AA22 AF26 AG27
1337mA
AA21 Y20 AB21 AB22 AC22 AC21 AA20 AA18 AB20 AC19
S5_3.3--3.3v standby power
59mA
N18 L19 M18 V12 V13 Y12 Y13 W11
5mA
G24
113mA
N20 M20
TRACE WIDTH >=15mil
J24
70mA 12mA
M8
26mA
AA4
Trace width >=20 mil
L40
HCB1608KF-221T20_2A
1026 change for EOD
TRACE WIDTH >=100mil
C478
0.1U/10V_4X
TRACE WIDTH >=30mil
C460 1U/10V_4X
TRACE WIDTH >=100mil
C407
0.1U/10V_4X
TRACE WIDTH >=50mil
C467 1U/10V_4X
TRACE WIDTH >=20mil
+VDDIO_33_S
C503 *0.1U/10V_4X
+VDDXL_3.3V
+VDDCR_1.1V
+VDDPL_1.1V
+VDDAN_3.3V_HWM
+VDDIO_AZ
+VDDPL_3.3V+3V
VDD-- S/B CORE power
+1.1V_VCC_FCH_R
C477
C490
0.1U/10V_4X
1U/10V_4X
+1.1V_CKVDD
C459
C442
1U/10V_4X
0.1U/10V_4X
+1.1V_PCIE_VDDR
C445
C430 1U/10V_4X
0.1U/10V_4X
+1.1V_AVDD_SATA
C472
C451 1U/10V_4X
0.1U/10V_4X
C455
C521
2.2U/10V_6X
2.2U/10V_6X
1026 change for EOD
S5_1.1V--1.1V standby power
C461
C473
1U/10V_4X
1U/10V_4X
C437
C433
2.2U/10V_6X
0.1U/10V_4X
C498
C489
10U/6.3V_8X
1U/10V_4X
CKVDD_1.1V-­Internal clock Generator I/O power
C484
C404
22U/6.3V_8X
0.1U/10V_4X
PCIE_VDDR--PCIE I/O power
C391
C415
22U/6.3V_8X
1U/10V_4X
AVDD_SATA--SATA phy power
C466
C412 22U/6.3V_8X
0.1U/10V_4X
C538 1U/10V_4X
R353 0_6
C456
2.2U/6.3V_4X
+1.1V_DUAL
VGA_PD[7]
C513
C497
2.2U/6.3V_4X
1U/10V_4X
C474 1U/10V_4X
C398 1U/10V_4X
C387 1U/10V_4X
C527
C530
1U/10V_4X
1U/10V_4X
C420 *0.1U/10V_4X
1026 change for EOD
VGA_PD
R566
2.2K_4
C523 1U/10V_4X
R300 0_8
C514
2.2U/6.3V_4X
L42 HCB1608KF-181T15_1.5A
L29 HCB1608KF-181T15_1.5A
L30 HCB1608KF-181T15_1.5A
S5 plus mode
R314 0_6
C385
C386
1U/10V_4X
2.2U/10V_6X
2
C755 *1U/10V_4X
+1.1V
+1.1V
+1.1V
+3V_S5
L33 HCB1608KF-221T20_2A
+15V
R558 1M_4
R294 100K/F_4
3
Q84
FDV301N_200MA
1
+1.1V
+3V_S5
+3V
2
+1.1V
C759 *1U/10V_4X
2
+FCH_VDDAN_11_MLDAC
3
Q77 PMV45EN_4A
+FCH_VDDAN_33_DAC
1
3
Q75 PMV45EN_4A
1
*HCB1608KF-221T20_2A
HCB1608KF-221T20_2A
L67
L62
L68 *HCB1608KF-221T20_2A
A3
A33
B7
B13
D9
D13
E5 E12 E16 E29
F7
F9
F11 F13 F16 F17 F19 F23 F25 F29
G6 G16 G32 H12 H15 H29
J6
J9 J10 J13 J28 J32
K7
K16 K27 K28
L6 L12 L13 L15 L16 L21
M13 M16 M21 M25
N6 N11 N13 N23 N24 P12 P18 P20 P21 P31 P33
R4 R11 R25 R28
T11 T16 T18
N8 K25 H25
U3D
HUDSON-M3
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64
VSSAN_HWM VSSXL VSSPL_SYS
Part 5 of 5
VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94
GROUND
VSS_95 VSS_96 VSS_97 VSS_98
VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128
VSSPL_DAC VSSAN_DAC
VSSANQ_DAC
VSSIO_DAC
EFUSE
+FCH_VDDAN_33_DAC_R
32mA Max
C777
2.2U/10V_6X
1026 change for EOD
Q75&Q76 1st BAM34040001, Rdson=22.5m 2nd BAM2306006, Rdson=38m
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
FCH 4/5(POWER)
FCH 4/5(POWER)
FCH 4/5(POWER)
1
Richland
Richland
Richland
10 47
10 47
10 47
1A
1A
1A
of
For Internal Check Only
5
4
3
2
1
OVERLAP COMMON PADS WHERE POSSIBLE FOR DUAL-OP RESISTORS.
STRAPS PINS
D D
PULL HIGH
PULL LOW
PCI_CLK1 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 EC_PWM2 RTC_CLK
--------
--------
--------
PCI_CLK1[8] PCI_CLK3[8] PCI_CLK4[8] LPC_CLK0[8] LPC_CLK1[8] EC_PWM2[7] RTC_CLK[8,35]
C C
REQUIRED STRAPS
B B
+3V +3V +3V +3V_S5 +3V_S5 +3V_S5 +3V_S5
ALLOW PCIE Gen2
DEFAULT
FORCE PCIE Gen1
R700
R702
10K_4
*10K_4
R690
R686
10K_4
*10K_4
Remove PCI_CLK2 function
PCI_CLK3
--------
--------
R701 *10K_4
R688 10K_4
USE DEBUG STRAP
IGNORE DEBUG STRAP
DEFAULT
R617 *10K_4
R612 10K_4
PCI_CLK4
non_Fusion CLOCK MODE
FUSION CLOCK MODE
DEFAULT
R625 10K_4
R620 *10K_4
R663
R305
10K_4
*10K_4
R672
R306
2.2K_4
LPC_CLK0 EC_PWM2
EC ENABLED
EC DISABLED
DEFAULT
EC_PWM2-->
*2.2K_4
SPI ROM: 2.2-KΩ 5% pull-down LPC ROM: Pull-up to 3.3V_S5. External pull-up resistor is not required as FCH has integrated 10-KΩ pull-up to 3.3V_S5.
LPC_CLK1
LPC ROM
CLKGEN ENABLED
DEFAULT
CLKGEN
SPI ROM
DISABLED
DEFAULT
RTC_CLKPCI_CLK1 PCI_CLK2
S5 PLUS MODE DISABLED
DEFAULT
S5 PLUS MODE ENABLED
+3V_S5+3V_S5
R435 10K_4
VRM_PWRGD[40,41]
MPWROK[35]
D42 1SS355_100MA
D49 1SS355_100MA
C604
*2.2U/6.3V_6X
U20
2 4
3 5
R440 0_4
C610 *0.1U/10V_4X
R439 *0_4
*SN74LVC1G17DCKR
FCH_PWRGD [5,7]
FCH PWRGD CKT
11
DEBUG STRAPS
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]
PCI_AD27[8] PCI_AD26[8] PCI_AD25[8] PCI_AD24[8] PCI_AD23[8]
A A
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
R345 *2.2K_4
R401 *2.2K_4
R402 *2.2K_4
R351 *2.2K_4
R350 *2.2K_4
PULL HIGH
PULL LOW
PCI_AD27 PCI_AD26
DISABLE ILA
USE PCI
AUTORUN
PLL
DEFAULT
DEFAULT
ENABLE ILA
BYPASS
AUTORUN
PCI PLL
PCI_AD25 PCI_AD24
USE DEFAULT
USE FC
PCIE STRAPS
PLL
DEFAULT
DEFAULT
USE EEPROM
BYPASS FC
PCIE STRAPS
PLL
PCI_AD23
DISABLE PCI MEM BOOT
DEFAULT
ENABLE PCI MEM BOOT
5
4
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
2
Date: Sheet of
PROJECT :
FCH 5/5(STRAP & PWRGD)
FCH 5/5(STRAP & PWRGD)
FCH 5/5(STRAP & PWRGD)
1
Richland
Richland
Richland
11 47
11 47
11 47
1A
1A
1A
of
For Internal Check Only
5
4
3
2
1
DDR_STD(DDR)
M_A_A[15:0][4]
D D
R19 10K_4 R18 10K_4
C C
B B
Reserve ICT test point
JDIM_1 close to APU, CLK Min=1016 mils
JDIM6A
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_BS#0[4] M_A_BS#1[4] M_A_BS#2[4] M_A_CS#0[4] M_A_CS#1[4] M_A_CLKP0[4] M_A_CLKN0[4] M_A_CLKP1[4] M_A_CLKN1[4] M_A_CKE0[4] M_A_CKE1[4] M_A_CAS#[4] M_A_RAS#[4] M_A_WE#[4]
SMB_RUN_CLK[7,13] SMB_RUN_DAT[7,13]
M_A_ODT0[4] M_A_ODT1[4]
M_A_DM0[4] M_A_DM1[4] M_A_DM2[4] M_A_DM3[4] M_A_DM4[4] M_A_DM5[4] M_A_DM6[4] M_A_DM7[4]
M_A_DQSP[7:0][4]
M_A_DQSN[7:0][4]
DIMM0_SA0 DIMM0_SA1 SMB_RUN_CLK SMB_RUN_DAT
M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDRSK-20401-TP8D
PC2100 DDR3 SDRAM SO-DIMM
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
(204P)
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
M_A_DQ[0..63] [4]
+0.75V_VREF_DQ
R355 0_6
+1.5VSUS
R316 1K/F_4
R313 1K/F_4
+0.75V_VREF_DQ +0.75V_VREF_CA
C408 470P/50V_4X
M_A_EVENT#[4]
M_A_RST#[4]
C267
0.1U/10V_4X
2.48A
+3V
R324 *0_6
C268 1000P/50V_4X
+1.5VSUS
+SMDDR_VREF
JDIM6B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDRSK-20401-TP8D
+0.75V_VREF_CA
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
PC2100 DDR3 SDRAM SO-DIMM
R321 0_6
VTT1 VTT2
GND GND
+1.5VSUS
203 204
205 206
R311 1K/F_4
R319 1K/F_4
+SMDDR_VTERM
C401 470P/50V_4X
C270
0.1U/10V_4X
+SMDDR_VREF
R323 *0_6
C271 1000P/50V_4X
12
+1.5VSUS
C542 10U/6.3V_6X
+3V
A A
C499
2.2U/10V_6X
Place these Caps near So-Dimm0.
C517 10U/6.3V_6X
C492
0.1U/10V_4X
C529 10U/6.3V_6X
+SMDDR_VTERM
C547 1U/6.3V_4X
C546 10U/6.3V_6X
C511 1U/6.3V_4X
C522 10U/6.3V_6X
C647 1U/6.3V_4X
C526 10U/6.3V_6X
C645 1U/6.3V_4X
C536 *10U/6.3V_6X
C646 10U/6.3V_6X
C535 1U/10V_4X
C544 *10U/6.3V_6X
C500 1U/10V_4X
C502 1U/10V_4X
C509 1U/10V_4X
+0.75V_VREF_DQ
C528 10U/6.3V_8X
C435
0.1U/10V_4X
C516 10U/6.3V_8X
C409 1000P/50V_4X
close to C435 close to C438
C648 39P/50V_4N
+1.5VSUS
1026 change for EOD 1206 Add 39pF for flash screen
5
4
3
EMI Suggestion
C396 ESD@39P/50V_4N
+0.75V_VREF_CA
C403
0.1U/10V_4X
C388 ESD@39P/50V_4N
C438 1000P/50V_4X
C390 ESD@39P/50V_4N
C649 39P/50V_4N
C392 ESD@39P/50V_4N
2
C394 ESD@39P/50V_4N
C395 ESD@39P/50V_4N
C400 ESD@39P/50V_4N
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet
Date: Sheet of
Date: Sheet of
PROJECT :
DDR3 DIMM-1
DDR3 DIMM-1
DDR3 DIMM-1
1
Richland
Richland
Richland
12 47
12 47
12 47
1A
1A
1A
of
For Internal Check Only
5
4
3
2
1
DDR_RVS(DDR)
M_B_A[15:0][4]
D D
M_B_BS#0[4] M_B_BS#1[4] M_B_BS#2[4] M_B_CS#0[4] M_B_CS#1[4] M_B_CLKP0[4] M_B_CLKN0[4] M_B_CLKP1[4] M_B_CLKN1[4] M_B_CKE0[4] M_B_CKE1[4] M_B_CAS#[4] M_B_RAS#[4]
R462 10K_4
+3V
R464 10K_4
C C
B B
Reserve ICT test point
M_B_WE#[4]
SMB_RUN_CLK[7,12] SMB_RUN_DAT[7,12]
M_B_ODT0[4] M_B_ODT1[4]
M_B_DM0[4] M_B_DM1[4] M_B_DM2[4] M_B_DM3[4] M_B_DM4[4] M_B_DM5[4] M_B_DM6[4] M_B_DM7[4]
M_B_DQSP[7:0][4]
M_B_DQSN[7:0][4]
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
DIMM1_SA0 DIMM1_SA1
M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7
JDIM7A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDRSK-20401-TP4B
5
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46
(204P)
PC2100 DDR3 SDRAM SO-DIMM
DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
M_B_DQ0
7
M_B_DQ1
15
M_B_DQ2
17
M_B_DQ3
4
M_B_DQ4
6
M_B_DQ5
16
M_B_DQ6
18
M_B_DQ7
21
M_B_DQ8
23
M_B_DQ9
33
M_B_DQ10
35
M_B_DQ11
22
M_B_DQ12
24
M_B_DQ13
34
M_B_DQ14
36
M_B_DQ15
39
M_B_DQ16
41
M_B_DQ17
51
M_B_DQ18
53
M_B_DQ19
40
M_B_DQ20
42
M_B_DQ21
50
M_B_DQ22
52
M_B_DQ23
57
M_B_DQ24
59
M_B_DQ25
67
M_B_DQ26
69
M_B_DQ27
56
M_B_DQ28
58
M_B_DQ29
68
M_B_DQ30
70
M_B_DQ31
129
M_B_DQ32
131
M_B_DQ33
141
M_B_DQ34
143
M_B_DQ35
130
M_B_DQ36
132
M_B_DQ37
140
M_B_DQ38
142
M_B_DQ39
147
M_B_DQ40
149
M_B_DQ41
157
M_B_DQ42
159
M_B_DQ43
146
M_B_DQ44
148
M_B_DQ45
158
M_B_DQ46
160
M_B_DQ47
163
M_B_DQ48
165
M_B_DQ49
175
M_B_DQ50
177
M_B_DQ51
164
M_B_DQ52
166
M_B_DQ53
174
M_B_DQ54
176
M_B_DQ55
181
M_B_DQ56
183
M_B_DQ57
191
M_B_DQ58
193
M_B_DQ59
180
M_B_DQ60
182
M_B_DQ61
192
M_B_DQ62
194
M_B_DQ63
M_B_DQ[0..63] [4]
+0.75V_VREF_DQ +0.75V_VREF_CA
+1.5VSUS
2.48A
+3V
M_B_EVENT#[4]
M_B_RST#[4]
JDIM7B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDRSK-20401-TP4B
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
PC2100 DDR3 SDRAM SO-DIMM
VTT1 VTT2
GND GND
203 204
205 206
+SMDDR_VTERM
13
Place these Caps near So-Dimm1.
+1.5VSUS
C483 10U/6.3V_6X
A A
+3V
C453
2.2U/10V_6X
C465 10U/6.3V_6X
C452
0.1U/10V_4X
C476 10U/6.3V_6X
+SMDDR_VTERM
C488 1U/6.3V_4X
C487 10U/6.3V_6X
C462 1U/6.3V_4X
C470 10U/6.3V_6X
C644 1U/6.3V_4X
C471 10U/6.3V_6X
C643 1U/6.3V_4X
C481 *10U/6.3V_6X
C642 10U/6.3V_6X
C480 1U/10V_4X
C486 *10U/6.3V_6X
C454 1U/10V_4X
C458 1U/10V_4X
C457 1U/10V_4X
C475 10U/6.3V_8X
C464 10U/6.3V_8X
1026 change for EOD
5
4
+0.75V_VREF_CA
C468
0.1U/10V_4X
+0.75V_VREF_DQ
C469
0.1U/10V_4X
3
C449 1000P/50V_4X
C479 1000P/50V_4X
+1.5VSUS
EMI Suggestion
C447 ESD@39P/50V_4N
C450 ESD@39P/50V_4N
2
C439 ESD@39P/50V_4N
C440 ESD@39P/50V_4N
C444 ESD@39P/50V_4N
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet
Date: Sheet of
Date: Sheet of
C446 ESD@39P/50V_4N
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
DDR3 DIMM-2
DDR3 DIMM-2
DDR3 DIMM-2
1
Richland
Richland
Richland
of
13 47
13 47
13 47
1A
1A
1A
For Internal Check Only
<VGA>
U5000A
PART 1 0F 9
14
PEG_TXP0[3]
PEG_TXN0[3]
PEG_TXP1[3]
PEG_TXN1[3]
PEG_TXP2[3]
PEG_TXN2[3]
PEG_TXP3[3]
PEG_TXN3[3]
PEG_TXP4[3]
PEG_TXN4[3]
PEG_TXP5[3]
PEG_TXN5[3]
PEG_TXP6[3] PEG_TXN6[3]
PEG_TXP7[3] PEG_TXN7[3]
CLK_PCIE_VGAP[8] CLK_PCIE_VGAN[8]
R5000 EV@10K_4
PERST#_BUF[24]
PERST#_BUF
R5182 EV@0_4
C5323 *E@0.1U/10V_4X
PEG_TXP0 PEG_TXN0
PEG_TXP1 PEG_TXN1
PEG_TXP2 PEG_TXN2
PEG_TXP3 PEG_TXN3
PEG_TXP4 PEG_TXN4
PEG_TXP5 PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7 PEG_TXN7
PERST#_BUF_R
AA38
Y37
Y35
W36
W38
V37
V35
U36
U38
T37
T35
R36
R38
P37
P35
N36
N38 M37
M35
L36
L38 K37
K35
H37
H35 G36
G38
F37
F35 E37
AB35 AA36
AH16
AA30
J36
J38
PCIE_RX0P PCIE_RX0N
PCIE_RX1P PCIE_RX1N
PCIE_RX2P PCIE_RX2N
PCIE_RX3P PCIE_RX3N
PCIE_RX4P PCIE_RX4N
PCIE_RX5P PCIE_RX5N
PCIE_RX6P PCIE_RX6N
PCIE_RX7P PCIE_RX7N
NC_PCIE_RX8P NC_PCIE_RX8N
NC_PCIE_RX9P NC_PCIE_RX9N
NC_PCIE_RX10P NC_PCIE_RX10N
NC_PCIE_RX11P NC_PCIE_RX11N
NC_PCIE_RX12P NC_PCIE_RX12N
NC_PCIE_RX13P NC_PCIE_RX13N
NC_PCIE_RX14P NC_PCIE_RX14N
NC_PCIE_RX15P NC_PCIE_RX15N
CLOCK
PCIE_REFCLKP PCIE_REFCLKN
TEST_PG
PERSTB
PCI EXPRESS INTERFACE
EV@Mars_M2
PCIE_TX0P PCIE_TX0N
PCIE_TX1P PCIE_TX1N
PCIE_TX2P PCIE_TX2N
PCIE_TX3P PCIE_TX3N
PCIE_TX4P PCIE_TX4N
PCIE_TX5P PCIE_TX5N
PCIE_TX6P PCIE_TX6N
PCIE_TX7P PCIE_TX7N
NC_PCIE_TX8P NC_PCIE_TX8N
NC_PCIE_TX9P NC_PCIE_TX9N
NC_PCIE_TX10P NC_PCIE_TX10N
NC_PCIE_TX11P NC_PCIE_TX11N
NC_PCIE_TX12P NC_PCIE_TX12N
NC_PCIE_TX13P NC_PCIE_TX13N
NC_PCIE_TX14P NC_PCIE_TX14N
NC_PCIE_TX15P NC_PCIE_TX15N
CALIBRATION
PCIE_CALR_TX PCIE_CALR_RX
Y33 Y32
W33 W32
U33 U32
U30 U29
T33 T32
T30 T29
P33 P32
P30 P29
N33 N32
N30 N29
L33 L32
L30 L29
K33 K32
J33 J32
K30 K29
H33 H32
Y30 Y29
CPEG_RXP0 CPEG_RXN0
CPEG_RXP1 CPEG_RXN1
CPEG_RXP2 CPEG_RXN2
CPEG_RXP3 CPEG_RXN3
CPEG_RXP4 CPEG_RXN4
CPEG_RXP5 CPEG_RXN5
CPEG_RXP6 CPEG_RXN6
CPEG_RXP7 CPEG_RXN7
C5001 EV@0.1U/10V_4X C5002 EV@0.1U/10V_4X
C5003 EV@0.1U/10V_4X C5004 EV@0.1U/10V_4X
C5005 EV@0.1U/10V_4X C5006 EV@0.1U/10V_4X
C5007 EV@0.1U/10V_4X C5008 EV@0.1U/10V_4X
C5586 EV@0.1U/10V_4X C5590 EV@0.1U/10V_4X
C5588 EV@0.1U/10V_4X C5591 EV@0.1U/10V_4X
C5593 EV@0.1U/10V_4X C5589 EV@0.1U/10V_4X
C5592 EV@0.1U/10V_4X C5587 EV@0.1U/10V_4X
R5001 *EV@1.27K/F_4 R5003 EV@1.69K/F_4 R5002 EV@1K/F_4
+5VRUN/+3VRUN/VDDR3
RUNPWROK
MVDDQ/VDDC/VDDCI
1.8V_IO/PCIE_VDDC
PWRGOOD
PCIE_RST#(PERSTB)
PCIE Clock
+0.95V_GPU
PEG_RXP0 [3]
PEG_RXN0 [3]
PEG_RXP1 [3]
PEG_RXN1 [3]
PEG_RXP2 [3]
PEG_RXN2 [3]
PEG_RXP3 [3]
PEG_RXN3 [3]
PEG_RXP4 [3]
PEG_RXN4 [3]
PEG_RXP5 [3]
PEG_RXN5 [3]
PEG_RXP6 [3]
PEG_RXN6 [3]
PEG_RXP7 [3]
PEG_RXN7 [3]
Mars Power-on sequence
1 => +3V_GPU 2 => +VDDC,+VDDCI,+1.5V_GPU,+0.95V_GPU 3 => +1.8V_GPU
PEG
Intel platform: Lane0 ~ Lane15 Brazos platform: Lane12 ~ Lane15 Comal and Sabine platform: Lane8 ~Lane15 Richland and Kabini platform: Lane0 ~ Lane7
Power Up Reset Sequence
20ms max
100ms min 100ms min
100us min
Asic in Reset Hardware Reset Sequence DFG Space Ready
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
100ms max
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Mars_M2/ PEG*8
Mars_M2/ PEG*8
Mars_M2/ PEG*8
Richland
Richland
Richland
A1A
A1A
A1A
of
of
of
14 47Saturday, January 26, 2013
14 47Saturday, January 26, 2013
14 47Saturday, January 26, 2013
For Internal Check Only
<VGA>
Q5047A EV@2N7002KDW_115MA
3ND_MBCLK[26,35]
3ND_MBDATA[26,35]
SYS_SHDN#[5,37]
On Mars only HPD1 and GPIO_14_HPD2 are available for display hot-plug detection
+1.8V_GPU
6
2
5
3 4
Q5047B EV@2N7002KDW_115MA
3
1
+1.8V_GPU
R5014 EV@499/F_4
R5015 EV@249/F_4
1.8V@8mA
EV@BLM15BD121SN1D_300MAL5002
on-die thermal sensor power
1
R5005 EV@10K/F_4
+3V_GPU
R5004 EV@10K/F_4
+3V_GPU
GPU_DPRSLPVR[43]
R5037 EV@10K_4
Q5013
2
*ME2N7002E_200MA
R5253 *EV@100K_4
Place close to Chip
C5038 EV@0.1U/10V_4X
PU:Disable MLPS PD:Enable MLPS
C5039 EV@10U/6.3V_6X
GENIL_CLK[17] GENIL_VSYNC[17]
GPU_SMBCLK
1.8V GPIO
GPU_SMBDAT
Tempeature function: Connect to EC
R5006 EV@4.7K_4 R5007 EV@4.7K_4
R5125 *EV@0_4
GPU_GPIO0[17] GPU_GPIO1[17] GPU_GPIO2[17]
GPU_GPIO8[17]
GPU_GPIO9[17] GPU_GPIO10[17] GPU_GPIO11[17] GPU_GPIO12[17] GPU_GPIO13[17]
GFX_CORE_CNTRL0[43] GFX_CORE_CNTRL4[43]
GPIO_19_CTF
GFX_CORE_CNTRL1[43]
GPU_GPIO21[17]
GPU_GPIO22[17]
PCIE_REQ_GPU#[7]
GFX_CORE_CNTRL2[43] GFX_CORE_CNTRL3[43]
GPU_GENERICC[17]
GPU_VREFG
+3V_GPU
+3V_GPU
C5040 EV@1U/6.3V_4X
GPU_SMBCLK GPU_SMBDAT
GPU_SCL GPU_SDA
T5047
T5049
T5048
T5046
T5050
PCIE_REQ_GPU#
T5051
T5052 T5045
R5017 *EV@4.7K_4
R5018 EV@1K_4 R5019 *EV@5.11K/F_4
R5020 *EV@10K/F_4 R5021 EV@10K/F_4
TSVDD
C5041 EV@0.1U/10V_4X
T5053 T5054 T5055 T5056 T5057
T5058 T5059
AD29 AC29
AK21
AR10
AW10
AU10 AP10 AV11 AT11 AR12
AW12
AU12 AP12
AH23
AK26
AH20 AH18 AN16
AH17 AK17 AH15 AK16 AM16
AM14 AM13 AK14 AG30 AN14 AM17
AK13 AN13
AG32 AG33
AK19 AK20 AH26
AH24
AC30 AK24
AH13
AD28
AM23 AN23 AK23
AM24
AF29 AG29
AK32
AJ21
AW8
AW3 AW5
AW6
AJ23
AJ26
AJ17 AJ13 AJ16 AL16
AL13 AJ14
AJ19 AJ20 AJ24
AL21
AL24
AL31
AJ32 AJ33
AR8 AU8 AP8
AR3 AR1 AU1 AU3
AP6 AU5
AR6 AU6
AT7 AV7 AN7 AV9 AT9
PART 2 0F 9
MUTI GFX
GENLK_CLK GENLK_VSYNC
SWAPLOCKA SWAPLOCKB
NC_DVPCNTL_MVP_0 NC_DVPCNTL_MVP_1 DBG_CNTL0 NC_DVPCNTL_1 NC_DVPCNTL_2
NC_DVPCLK DBG_DATA0 DBG_DATA1 DBG_DATA2 DBG_DATA3 DBG_DATA4 DBG_DATA5 DBG_DATA6 DBG_DATA7 DBG_DATA8 DBG_DATA9 DBG_DATA10 DBG_DATA11 DBG_DATA12 DBG_DATA13 DBG_DATA14 DBG_DATA15 DBG_DATA16 DBG_DATA17 DBG_DATA18 DBG_DATA19 DBG_DATA20 DBG_DATA21 DBG_DATA22 DBG_DATA23
SMBCLK
SMBus
SMBDATA
SCL
I2C
SDA
GENERAL PURPOSE I/O
GPIO_0 GPIO_1 GPIO_2
GPIO_5_AC_BATT GPIO_6_TACH GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL_0 GPIO_16 GPIO_17_THERMAL_INT GPIO_18 GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21 GPIO_22_ROMCSB CLKREQB
GPIO_29 GPIO_30
GENERICA GENERICB GENERICC GENERICD GENERICE GENERICF GENERICG
CEC_1 HPD1
DBG_VREFG
BACO
PX_EN
DEBUG
TESTEN
JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO
THERMAL
DPLUS DMINUS
GPIO_28_FDO TS_A
TSVDD TSVSS
U5000B
NC_TXCAP_DPA3P NC_TXCAM_DPA3N
NC_TX0P_DPA2P NC_TX0M_DPA2N
DPA
NC_TX1P_DPA1P NC_TX1M_DPA1N
NC_TX2P_DPA0P NC_TX2M_DPA0N
NC_TXCBP_DPB3P NC_TXCBM_DPB3N
NC_TX3P_DPB2P NC_TX3M_DPB2N
DPB
NC_TX4P_DPB1P NC_TX4M_DPB1N
NC_TX5P_DPB0P NC_TX5M_DPB0N
NC_TXCCP_DPC3P NC_TXCCM_DPC3N
NC_TX0P_DPC2P NC_TX0M_DPC2N
DPC
NC_TX1P_DPC1P NC_TX1M_DPC1N
NC_TX2P_DPC0P NC_TX2M_DPC0N
NC_TXCDP_DPD3P NC_TXCDM_DPD3N
NC_TX3P_DPD2P NC_TX3M_DPD2N
DPD
NC_TX4P_DPD1P NC_TX4M_DPD1N
NC_TX5P_DPD0P NC_TX5M_DPD0N
DAC1
MLPS
DDC/AUX
NC_DDCCLK_AUX3P NC_DDCDATA_AUX3N
NC_DDCCLK_AUX4P NC_DDCDATA_AUX4N
NC_DDCCLK_AUX5P NC_DDCDATA_AUX5N
NC_DDCCLK_AUX6P NC_DDCDATA_AUX6N
DDCVGACLK DDCVGADATA
EV@Mars_M2
AVSSN#1
AVSSN#2
AVSSN#3 HSYNC
VSYNC
RSET AVDD
AVSSQ VDD1DI
VSS1DI
NC#1
NC#2 NC_SVI2 NC_SVI2
NC#5 NC_SVI2
NC#7
NC#8
NC#9
NC_TSVSSQ
PS_0
PS_1
PS_2
PS_3
DDC1CLK DDC1DATA
AUX1P
AUX1N
DDC2CLK DDC2DATA
AUX2P
AUX2N
AU24 AV23
AT25 AR24
AU26 AV25
AT27 AR26
AR30 AT29
AV31 AU30
AR32 AT31
AT33 AU32
AU14 AV13
AT15 AR14
AU16 AV15
AT17 AR16
AU20 AT19
AT21 AR20
AU22 AV21
AT23 AR22
AD39
R
AD37 AE36
G
AD35 AF37
B
AE38 AC36
AC38
AB34
R5011 EV@499/F_4
AD34
AVDD
AE34 AC33
VDD1DI
AC34
V13 U13 AC31 AD30 AC32 AD32 AF32 AA29 AG21
NC_TSVSSQ should be tied to GND on Thames/Whistler/Seymour
AF33
PS_0 should be tied to GND on Thames/Whistler/Seymour
AM34
PS_0
AD31
PS_1
AG31
PS_2
AD33
PS_3
PS_1,PS_2, PS_3 are NC on Thames/Whistler/Seymour
AM26 AN26
AM27 AL27
AM19 AL19
AN20 AM20
AL30 AM30
AL29 AM29
AN21 AM21
AK30 AK29
AJ30 AJ31
Close to ASIC
T5042
T5043
T5044
GPU_HSYNC [17] GPU_VSYNC [17]
T5006 T5007 T5008 T5010 T5011 T5012 T5014 T5016 T5017
PS_3 [17]
DAC1 Analog Power
AVDD
R_pu
R_pdCa
C5033
Mars@1U/6.3V_4X
C5036
Mars@1U/6.3V_4X
R5205 *EV@8.45K/F_4
R5208 EV@4.75K/F_4
C5032 Mars@0.1U/10V_4X
VDD1DI
C5035 Mars@0.1U/10V_4X
VDDC_CT VDDC_CT VDDC_CT
R5204 EV@8.45K/F_4
C5351 *EV@0.1U/10V_4X
R_pu
R_pdCa
R5249 EV@2K/F_4
C5352 *EV@0.1U/10V_4X
11001 11000 00000 for Mars
PS_0 PS_1 PS_2
1.8V@18mA
C5034 Mars@4.7U/6.3V_6X
DAC1 Digital Power
1.8V@117mA
C5037 Mars@4.7U/6.3V_6X
01000 for Sun
Mars@BLM15BD121SN1D_300MAL5000
Mars@BLM15BD121SN1D_300MAL5001
C5599 Mars@0.68U/6.3V_4X
1124 add for Mars
System Memory Aperture size
PS0[3:1]
ROMIDCFG[2:0]
128M
256M
64M
000
001
010 011Reserved
MLPS
R_pu R_pd
4.75K
NC
2K
8.45K
4.53K
2K
6.98K
4.99K
4.53K
4.99K
3.24K
5.62K
3.4K
10K
NC
Ca Bits [5:4]
680nF
82nF
10nF
NC
00
01
10
11
Bits [3:1]
000
001
010
011
100
101
110
1114.75K
P/N
CH4681K9B00 X5R CH4681JEB00 X6S
CH3823K1B00
CH31003KB11
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Mars_M2/ GPIO_DP_CRT_I2C
Mars_M2/ GPIO_DP_CRT_I2C
Mars_M2/ GPIO_DP_CRT_I2C
Date: Sheet
Date: Sheet
Date: Sheet
+1.8V_GPU
15
R5206 *EV@10K/F_4
R_pu
R5209
R_pdCa
C5353 Sun@0.082U/16V_4X
Ra P/N
2K
3.24K
3.4K
4.53K
4.75K
4.99K
5.62K
6.98K
8.45K
10K
MLPS Bit Bits [5:1]
PS_0
PS_1
PS_2
PS_3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
CS22002FB19
CS23242FB09
CS23402FB08
CS24532FB08
CS24752FB12
CS24992FB26
CS25622FB18
CS26982FB01
CS28452FB12
CS31002FB26
11001
11000
01000
11XXX
Richland
Richland
Richland
15 47Saturday, January 26, 2013
15 47Saturday, January 26, 2013
15 47Saturday, January 26, 2013
EV@4.75K/F_4
of
of
of
A1A
A1A
A1A
For Internal Check Only
<VGA>
0.95V@16mA for Sun
0.95V@330mA for Mars
+0.95V_GPU
1.8V@90mA for Sun
1.8V@130mA for Mars
1002 AMD FAE suggest 220ohm
+1.8V_GPU
1.8V@75mA for Sun
1.8V@75mA for Mars
+1.8V_GPU
0.95V@100mA for Sun
0.95V@100mA for Mars
+0.95V_GPU
1002 AMD FAE suggest 120ohm
EV@PBY160808T-501Y-N_1.2AL5004
C5046 EV@10U/6.3V_6X
Memory phase-locked loop power. Dedicated analog power pin for the memory PLLs.
C5050 EV@10U/6.3V_6X
Engine phase-locked loop power. Dedicated analog power pin for the engine and UVD PLLs.
EV@BLM15BD121SN1D_300MAL5006
C5053 EV@10U/6.3V_6X
Engine phase-locked loop power. Dedicated digital power pin for the engine and UVD PLLs.
EV@BLM15BD121SN1D_300MAL5007
C5058 EV@10U/6.3V_6X
C5047 EV@1U/6.3V_4X
C5051 EV@1U/6.3V_4X
C5054 EV@1U/6.3V_4X
C5059 EV@1U/6.3V_4X
DPEF_VDD18
1.8V@20mA for Sun
DPLL_VDDC
DPLL_VDDC
C5048 EV@0.1U/10V_4X
MPLL_PVDD
C5052 EV@0.1U/10V_4X
SPLL_PVDD
C5055 EV@0.1U/10V_4X
SPLL_VDDC
C5060 EV@0.1U/10V_4X
R5028 *EV@0_4 R5029 *EV@0_4
DPEF_VDD18
AM32
AN31
AN32
AM10
AN10
AF30 AF31
H7 H8
AN9
DP_VDDR DP_VDDC
DP_VSSR
MPLL_PVDD MPLL_PVDD
SPLL_PVDD
SPLL_VDDC
SPLL_PVSS
NC_XTAL_PVDD NC_XTAL_PVSS
PART 9 0F 9
PLLS/XTAL
EV@Mars_M2
U5000I
AV33
GPU_XTALIN
XTALIN
R5024 EV@1M/F_4
AU34
XTALOUT
GPU_XTALOUT
R5025 EV@0_4
1205 for FAE suggestion change to 8.2pF from 27pF
XO_IN
XO_IN2
CLKTESTA CLKTESTB
AW34
AW35
AK10 AL10
CLKTESTA CLKTESTB
*EV@0.1U/10V_4X
T5040EV@FCM1608KF-221T05_500MAL5005
T5041
C5056
R5026
*EV@51.1/F_4
C5045 EV@8.2P/50V_4C
23
Y5000 EV@27MHZ_10
4 1
C5049 EV@8.2P/50V_4C
1204 change Crystal to 3225
C5057 *EV@0.1U/10V_4X
R5027
*EV@51.1/F_4
DPE/DPF/LVDS
U5000G
PART 7 0F 9
LVDS CONTROL
TXCBP_DPB3P TXCBM_DPB3N
TX3P_DPB2P TX3M_DPB2N
TX4P_DPB1P TX4M_DPB1N
TX5P_DPB0P TX5M_DPB0N
NC_TXOUT_U3P NC_TXOUT_U3N
LVTMDP
TXCAP_DPA3P TXCAM_DPA3N
TX0P_DPA2P TX0M_DPA2N
TX1P_DPA1P TX1M_DPA1N
TX2P_DPA0P TX2M_DPA0N
NC_TXOUT_L3P NC_TXOUT_L3N
EV@Mars_M2
RSVD RSVD
AK27 AJ27
AK35 AL36
AJ38 AK37
AH35 AJ36
AG38 AH37
AF35 AG36
AP34 AR34
AW37 AU35
AR37 AU39
AP35 AR35
AN36 AP37
R5023 *EV@10K/F_4 R5617 *EV@10K/F_4
16
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
Mars_M2/ XTAL_LVDS
Mars_M2/ XTAL_LVDS
Mars_M2/ XTAL_LVDS
Richland
Richland
Richland
16 47Saturday, January 26, 2013
16 47Saturday, January 26, 2013
16 47Saturday, January 26, 2013
of
of
of
A1A
A1A
A1A
For Internal Check Only
<VGA>
GPU_GENERICC[15]
Close to ASIC
10XXX for Mars
11XXX for Sun
PS_3[15]
MLPS
R_pu R_pd Bits [3:1]
NC
8.45K
4.53K
6.98K
4.53K
3.24K
3.4K
Ra P/N
2K
3.24K
3.4K
4.53K
4.75K
4.99K
5.62K
6.98K
8.45K
10K
GPU_GPIO0[15] GPU_GPIO1[15] GPU_GPIO2[15]
GPU_GPIO9[15] GPU_GPIO11[15] GPU_GPIO12[15] GPU_GPIO13[15] GPU_GPIO22[15]
GENIL_VSYNC[15]
GPU_HSYNC[15] GPU_VSYNC[15] GENIL_CLK[15]
GPU_GPIO8[15] GPU_GPIO21[15]
GPU_GPIO10[15]
PS_3
C5596 Mars@0.01U/25V_4X
1124 add for Mars
4.75K
2K
2K
4.99K
4.99K
5.62K
10K
NC
CS22002FB19
CS23242FB09
CS23402FB08
CS24532FB08
CS24752FB12
CS24992FB26
CS25622FB18
CS26982FB01
CS28452FB12
CS31002FB26
R5030 *EV@10K/F_4 R5031 EV@10K/F_4 R5032 *EV@10K/F_4 R5033 *EV@10K/F_4 R5034 EV@10K/F_4 R5035 *EV@10K/F_4 R5036 *EV@10K/F_4 R5038 *EV@10K/F_4 R5039 *EV@10K/F_4 R5041 *EV@10K/F_4 R5042 *EV@10K/F_4 R5043 *EV@10K/F_4 R5044 *EV@10K/F_4 R5045 *EV@10K/F_4 R5046 *EV@10K/F_4 R5145 *EV@10K/F_4
VDDC_CT
R5047 H2G@4.75K/F_4
R_pu
R5052
R_pdCa
H1G@4.75K/F_4
000
001
010
011
100
101
110
1114.75K
+3V_GPU
R5048 S1G@8.45K/F_4
R5053 SAM@2K/F_4
Ca Bits [5:4]
680nF
82nF
10nF
NC
Hynix
Micron
Samsung
R5049 S2G@4.53K/F_4
R5054 MICRON@4.99K/F_4
R5050 M1G@6.98K/F_4
R5621 H1GG@5.62K/F_4
R5051 M2G@4.53K/F_4
R5622 S1GG@10K/F_4
P/N
00
01
10
CH4681K9B00
CH3823K1B00
CH31003KB11
11
DDR3 Memory TYPE
Vendor P/N B/S P/N (QCI P/N)
H5TQ2G63DFR-11C (128M*16)(900MHz)
H5TC4G63AFR-11C (256M*16)(900MHz)
H5TQ2G63DFR-N0C (128M*16)(1GHz)
MT41J128M16JT-107G:K (128M*16)(900MHz)
MT41K256M16HA-107G:E (256M*16)(900MHz)
K4W2G1646E-BC11 (128M*16)(900MHz)
K4W4G1646B-HC11 (256M*16)(900MHz)
K4W2G1646B-BC1A (128M*16)(1GHz)
AKD5MGWTW16 * 4 1GB
AKD5PGWTW05 * 4
AKD5MGDTW01 * 4 1GB
AKD5DGSTL00 * 4
AKD5PGSTL00 * 4
AKD5MGGT520 * 4
AKD5MGWT516 * 4
AKD5MGGT532 * 4 1GB 110
R5623 H1GG@3.24K/F_4
R5624 S1GG@3.4K/F_4
1101 Add for 1GHz VRAM
SizeVendor
2GB
1GB
2GB
1GB
2GB
MLPS
000
111
101
011
100
001
010
CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET
STRAPS
MLPS_DISABLE
STRAP_TX_CFG_DRV_FULL_SWING
STRAP_TX_DEEMPH_EN
STRAP_BIF_GEN3_EN_A
STRAP_BIF_VGA_DIS
ROM_CONFIG[2:0]
STRAP_BIOS_ROM_EN
AUD[1] AUD[0]
N/A
N/A
STRAP_BIF_CLK_PM_EN
RESERVED RESERVED
AUD_PORT_CONN_PINSTRAP[2] AUD_PORT_CONN_PINSTRAP[1] AUD_PORT_CONN_PINSTRAP[0]
+5VRUN/+3VRUN/VDDR3
MVDDQ/VDDC/VDDCI
1.8V_IO/PCIE_VDDC
PCIE_RST#(PERSTB)
MLPS
NA
PS_1[4]
PS_1[5]
PS_1[1]
PS_2[4]
PS_0[3..1]
PS_2[3]
NA
NA
PS_0[4]
PS_1[3] PS_1[2]
NA NA
PS_3[5] PS_3[4] PS_0[5]
RUNPWROK
PWRGOOD
PCIE Clock
GPIO PIN
GPIO_28_FDO
HSYNC VSYNC
GENLK_CLK GPIO8
GPIO21 GENERICC
NA NA NA
DESCRIPTION OF DEFAULT SETTINGS
Enable MLPS, NA for Thames/Whistler/Seymour 0 0: Enable MLPS, disable GPIO PINSTRAP 1: Disable MLPS, enable GPIO PINSTRAP
Control the transmitter full-/half- swing mode 0: 50% Tx output swing 1: Full Tx output swing
PCIe transmitter, de-emphasis enable 0: Tx de-emphasis disabled 1: Tx de-emphasis enabled
PCIe GEN3 Capability 0: GEN3 not supported at power-on 1: GEN3 supported at power-on
VGA disable determines whether or not the card will be recognized as the system's VGA controler (through the SUBCLASS field in the PCI configuration space) 0: VGA controller capacity enabled 1: The device will not be recognized as the system's VGA controller
Serial ROM type or Memory Aperture Size Select If GPIO22 = 0, defines memory aperture size
If GPIO22 = 1, defines ROM type
100 - 512Kbit M25P05A (ST) 101 - 1Mbit M25P10A (ST) 101 - 2Mbit M25P20 (ST) 101 - 4Mbit M25P40 (ST) 101 - 8Mbit M25P80 (ST) 100 - 512Kbit Pm25LV512 (Chingis) 101 - 1Mbit Pm25LV010 (Chingis)
Enable external BIOS ROM device 0: Disabled
1: Enabled
00 - No audio function 01 - Audio for DP only 10 - Audio for DP and HDMI if dongle is detected 11 - Audio for both DP and HDMI HDMI must only be enabled on systems that are legally entitled. It is the responsibility of the system designer to ensure that the system is entitled to support this feature.
Reserved for internal use only. Must be 1 at reset
Reserved PCIe reference clock power management capability is reported in the PCI
0: The CLKREQB power management capability is disabled
1: The CLKREQB power management capability is enabled
Reserved Reserved (for Thames/Whistler/Seymour only)
STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS 111 = 0 usable endpoints 110 = 1 usable endpoints 101 = 2 usable endpoints 100 = 3 usable endpoints 011 = 4 usable endpoints 010 = 5 usable endpoints 001 = 6 usable endpoints 000 = all endpoints are usable
Power Up Reset Sequence
20ms max
Default Setting
XXX
100ms min 100ms min
100us min
Asic in Reset Hardware Reset Sequence DFG Space Ready
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
100ms max
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Mars_M2/ STRAPS_Thermal
Mars_M2/ STRAPS_Thermal
Mars_M2/ STRAPS_Thermal
Richland
Richland
Richland
17
1
1
0 for Kabini
0
XXX
0
XX
1
0
0
0 0
17 47Saturday, January 26, 2013
17 47Saturday, January 26, 2013
17 47Saturday, January 26, 2013
of
of
of
A1A
A1A
A1A
For Internal Check Only
<VGA>
+1.5V_GPU
C5062 EV@10U/6.3V_6X
C5071 EV@2.2U/6.3V_4X
C5080 *EV@0.1U/10V_4X
C5088 *EV@0.1U/10V_4X
C5063 EV@10U/6.3V_6X
C5084 EV@2.2U/6.3V_4X
C5081 *EV@0.1U/10V_4X
C5089 *EV@0.1U/10V_4X
(3.3V@25mA for Sun, Mars)
(1.8V@300mA for Mars; NC for Sun)
(1.5V@930mA/ Sun DDR3) (1.5V@1.5A/Mars DDR3 128bits) (1.5V@1.0A Mars DDR3 64bits)
C5064 EV@10U/6.3V_6X
C5072 EV@2.2U/6.3V_4X
+1.8V_GPU
+3V_GPU
+1.8V_GPU
C5065 *EV@4.7U/6.3V_6X
C5073 EV@2.2U/6.3V_4X
C5082 *EV@0.1U/10V_4X
C5090 *EV@0.1U/10V_4X
Level translation between core and I/O, excluding memory receivers.
C5083 *EV@0.1U/10V_4X
C5091 *EV@0.1U/10V_4X
(1.8V@13mA for Sun, Mars)
EV@BLM15BD121SN1D_300MAL5009
I/O power for 3.3-V pins, such as GPIOs.
1002 AMD FAE suggest 120ohm
EV@BLM15BD121SN1D_300MAL5010
Power for all DVP pins; DVPDATA_[23:0]—DVO or GPIO.
1002 AMD FAE suggest 120ohm
Mars@FCM1608KF-121T04_400MAL5011
C5595 *EV@10U/6.3V_6X
C5074 *EV@2.2U/6.3V_4X
+
C5061 EV@100U/6.3V_3528P_E45b
1115 add net VDDC_CT
C5099 EV@10U/6.3V_6X
C5112 EV@10U/6.3V_6X
C5125 Mars@10U/6.3V_6X
C5113 EV@1U/6.3V_4X
C5126 Mars@1U/6.3V_4X
VCORE_VCCSSENSE[43]
VCORE_SEN/RTN route a differtial pair.
VCORE_VSSSENSE[43]
C5594 *EV@10U/6.3V_6X
C5085 *EV@2.2U/6.3V_4X
VDDC_CT
C5075 EV@2.2U/6.3V_4X
C5100 EV@1U/6.3V_4X
VDDR3
C5114 EV@1U/6.3V_4X
VDDR4
C5127 Mars@0.1U/10V_4X
R5532 EV@0_4
R5533 EV@0_4
VDDC_CT
C5101 EV@0.1U/10V_4X
C5138 EV@1U/6.3V_4X
AD11 AG10
AF26 AF27 AG26 AG27
AF23 AF24 AG23 AG24
AD12 AF11 AF12 AF13
AF15 AG11 AG13 AG15
AF28
AG28
AH29
AC7
AF7 AJ7
AK8
AL9 G11 G14 G17 G20 G23 G26 G29 H10
K11
K13
L12
L16
L21
L23
L26 M11
N11 R11
U11
Y11
J7 J9
K8
L7
P7
U7
Y7
MEM I/O
VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1
LEVEL
TRANSLATION
VDD_CT VDD_CT VDD_CT VDD_CT
I/O
VDDR3 VDDR3 VDDR3 VDDR3
DVP
VDDR4 VDDR4 VDDR4 VDDR4
VDDR4 VDDR4 VDDR4 VDDR4
VOLTAGE SENESE
FB_VDDC
FB_VDDCI
FB_GND
PART 5 0F 9
U5000E
EV@Mars_M2
NC_PCIE_VDDR NC_PCIE_VDDR NC_PCIE_VDDR NC_PCIE_VDDR NC_PCIE_VDDR NC_PCIE_VDDR NC_BIF_VDDC NC_BIF_VDDC PCIE_PVDD
PCIE
BACO
CORE
CORE I/O
ISOLATED
PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC
BIF_VDDC BIF_VDDC
VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC
VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC
VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI
On Mars except for AB37, all other balls can be NC
AA31 AA32 AA33 AA34 W30 Y31 V28 W29 AB37
G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28
N27 T27
AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18
AH22 AH27 AH28 M26 N24 R18 R21 R23 R26 T17 T20 T22 T24 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28
AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13
PCIE_VDDR
C5066 EV@0.01U/25V_4X
C5076 EV@1U/6.3V_4X
(0.95V@1.4A for Sun, Mars)
C5092 EV@1U/6.3V_4X
C5102 EV@1U/6.3V_4X
C5115 EV@1U/6.3V_4X
C5331 EV@1U/6.3V_4X
VDDCI
C5128 *EV@1U/6.3V_4X
C5132 *EV@10U/6.3V_6X
C5067 EV@0.1U/10V_4X
C5077 EV@1U/6.3V_4X
C5093 EV@10U/6.3V_6X
C5103 EV@1U/6.3V_4X
C5116 EV@1U/6.3V_4X
C5332 EV@1U/6.3V_4X
C5068 EV@1U/6.3V_4X
C5078 EV@1U/6.3V_4X
+0.95V_GPU
C5094 EV@1U/6.3V_4X
C5104 EV@1U/6.3V_4X
C5117 EV@1U/6.3V_4X
C5333 EV@1U/6.3V_4X
C5129 EV@1U/6.3V_4X
C5133 *EV@10U/6.3V_6X
PCIe IO power.
(1.8V@100mA for Sun, Mars)
L5008 EV@HCB1608KF-181T15_1.5A
C5069 *EV@1U/6.3V_4X
PCIe digital power supply.
(0.95V@2.5A for Sun, Mars)
C5079 EV@1U/6.3V_4X
C5139 EV@1U/6.3V_4X
Dedicated core power, provides power to the internal logic.
C5070 EV@10U/6.3V_6X
C5086 EV@1U/6.3V_4X
Always connect to PCIE_VDDC for both BACO & non-BACO designs.
(0.775~1.125V@30A)
C5095 EV@1U/6.3V_4X
C5105 EV@1U/6.3V_4X
C5118 EV@1U/6.3V_4X
C5334 EV@1U/6.3V_4X
Isolated (clean) core power for the l/O logic.
C5096 EV@1U/6.3V_4X
C5106 EV@1U/6.3V_4X
C5119 EV@10U/6.3V_6X
C5335 EV@1U/6.3V_4X
(0.775V~1.125V@5A/Sun)
L5012 EV@HCB1608KF-121T30_3A L5013 EV@HCB1608KF-121T30_3A
C5130 *EV@1U/6.3V_4X
C5134 EV@10U/6.3V_6X
C5131 *EV@1U/6.3V_4X
C5135 EV@1U/6.3V_4X
+0.95V_GPU
C5340 EV@1U/6.3V_4X
C5136 EV@1U/6.3V_4X
C5341 EV@1U/6.3V_4X
+VGPU_CORE
C5097 EV@1U/6.3V_4X
C5107 EV@1U/6.3V_4X
C5120 EV@10U/6.3V_6X
C5336 EV@1U/6.3V_4X
C5137 *EV@1U/6.3V_4X
+1.8V_GPU
C5342 EV@10U/6.3V_6X
C5098 EV@1U/6.3V_4X
C5108 EV@1U/6.3V_4X
C5121 EV@1U/6.3V_4X
C5337 EV@1U/6.3V_4X
+VGPU_CORE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
C5087 EV@10U/6.3V_6X
C5109 EV@1U/6.3V_4X
C5122 EV@1U/6.3V_4X
C5338 EV@1U/6.3V_4X
Mars_M2/ MainPower
Mars_M2/ MainPower
Mars_M2/ MainPower
C5110 EV@1U/6.3V_4X
C5123 EV@10U/6.3V_6X
C5339 EV@1U/6.3V_4X
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
18
C5111 EV@1U/6.3V_4X
C5124 EV@10U/6.3V_6X
Richland
Richland
Richland
18 47Saturday, January 26, 2013
18 47Saturday, January 26, 2013
18 47Saturday, January 26, 2013
A1A
A1A
A1A
of
of
of
For Internal Check Only
<VGA>
+1.8V_GPU
EV@PBY160808T-501Y-N_1.2AL5019
C5153 EV@10U/6.3V_6X
DPEF_VDD18
DPEF_VDD18
C5154 EV@1U/6.3V_4X
DPEF_VDD18_MARS
R5009
Mars@0_6
C5155 EV@0.1U/10V_4X
Reserve for Mars
R5057 *EV@150/F_4
R5058 *EV@150/F_4
R5059 EV@150/F_4
DP_VDDR DP_VDDC
AN24
NC
AP24
NC
AP25
NC
AP26
NC
AU28
NC
AV29
NC
AP20
NC
AP21
NC
AP22
NC
AP23
NC
AU18
NC
AV19
NC
AH34
DP_VDDR
AJ34
DP_VDDR
AF34
DP_VDDR
AG34
DP_VDDR
AM37
DP_VDDR
AL38
DP_VDDR
CALIBRATION
AW28
NC_DPAB_CALR
AW18
NC_DPCD_CALR
AM39
DP_CALR
PART 8 0F 9
U5000H
DP GND
DP_VDDC DP_VDDC
DP_VDDC
DP_VDDC DP_VDDC
DP_VDDC
DP_VSSR DP_VSSR DP_VSSR
DP_VSSR DP_VSSR DP_VSSR DP_VSSR
DP_VSSR DP_VSSR DP_VSSR DP_VSSR
DP_VSSR DP_VSSR DP_VSSR DP_VSSR
DP_VSSR DP_VSSR DP_VSSR DP_VSSR
DP_VSSR DP_VSSR DP_VSSR DP_VSSR
DP_VSSR DP_VSSR DP_VSSR DP_VSSR
19
AP31 AP32 AN33DP_VDDC AP33
AP13
NC
AT13
NC
AP14NC AP15
NC
AL33 AM33 AK33DP_VDDC AK34
AN27 AP27 AP28 AW24DP_VSSR AW26 AN29 AP29 AP30 AW30DP_VSSR AW32 AN17 AP16 AP17 AW14DP_VSSR AW16 AN19 AP18 AP19 AW20DP_VSSR AW22 AN34 AP39 AR39 AU37DP_VSSR AF39 AH39 AK39 AL34 AV27DP_VSSR AR28 AV17 AR18 AN38 AM35DP_VSSR
C5141 Mars@10U/6.3V_6X
C5147 Mars@10U/6.3V_6X
C5142 Mars@1U/6.3V_4X
C5148 Mars@1U/6.3V_4X
For ESD
+0.95V_GPU
(0.95V@280mA/link for Mars)
C5143 Mars@0.1U/10V_4X
DPLL_VDDC_MARS
C5149 Mars@0.1U/10V_4X
(0.95V@280mA/link for Mars)(1.8V@237mA/link for Mars)
C5584 EV@39P/50V_4N
R5008 Mars@0_6
C5585 EV@39P/50V_4N
DPLL_VDDC
EV@Mars_M2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
Mars_M2/ DP_Powers
Mars_M2/ DP_Powers
Mars_M2/ DP_Powers
Richland
Richland
Richland
of
of
of
19 47Saturday, January 26, 2013
19 47Saturday, January 26, 2013
19 47Saturday, January 26, 2013
A1A
A1A
A1A
For Internal Check Only
<VGA>
AB39
U5000F
PART 6 0F 9
PCIE_VSS
E39
PCIE_VSS
F34
PCIE_VSS
F39
PCIE_VSS
G33
PCIE_VSS
G34
PCIE_VSS
H31
PCIE_VSS
H34
PCIE_VSS
H39
PCIE_VSS
J31
PCIE_VSS
J34
PCIE_VSS
K31
PCIE_VSS
K34
PCIE_VSS
K39
PCIE_VSS
L31
PCIE_VSS
L34
PCIE_VSS
M34
PCIE_VSS
M39
PCIE_VSS
N31
PCIE_VSS
N34
PCIE_VSS
P31
PCIE_VSS
P34
PCIE_VSS
P39
PCIE_VSS
R34
PCIE_VSS
T31
PCIE_VSS
T34
PCIE_VSS
T39
PCIE_VSS
U31
PCIE_VSS
U34
PCIE_VSS
V34
PCIE_VSS
V39
PCIE_VSS
W31
PCIE_VSS
W34
PCIE_VSS
Y34
PCIE_VSS
Y39
PCIE_VSS
F15 F17 F19 F21 F23 F25 F27 F29 F31 F33
F7 F9 G2 G6 H9 J2
J27
J6 J8
K14
K7 L11 L17
L2 L22 L24
L6
M17 M22 M24
N16 N18
N2 N21 N23 N26
N6 R15 R17
R2 R20 R22 R24 R27
R6 T11 T13 T16 T18 T21 T23 T26 U15 U17
U2 U20 U22 U24 U27
U6 V11 V16 V18 V21 V23 V26
W2 W6 Y15 Y17 Y20 Y22 Y24 Y27
GND
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
EV@Mars_M2
NC_EVDDQ2
VSS_MECH VSS_MECH VSS_MECH
A3
GND
A37
GND
AA16
GND
AA18
GND
AA2
GND
AA21
GND
AA23
GND
AA26
GND
AA28
GND
AA6
GND
AB12
GND
AB15
GND
AB17
GND
AB20
GND
AB22
GND
AB24
GND
AB27
GND
AC11
GND
AC13
GND
AC16
GND
AC18
GND
AC2
GND
AC21
GND
AC23
GND
AC26
GND
AC28
GND
AC6
GND
AD15
GND
AD17
GND
AD20
GND
AD22
GND
AD24
GND
AD27
GND
AD9
GND
AE2
GND
AE6
GND
AF10
GND
AF16
GND
AF18
GND
AF21
GND
AG17
GND
AG2
GND
AG20
GND
AG22 AG6
GND
AG9
GND
AH21
GND
AJ10
GND
AJ11
GND
AJ2
GND
AJ28
GND
AJ6
GND
AK11
GND
AK31
GND
AK7
GND
AL11
GND
AL14
GND
AL17
GND
AL2
GND
AL20
GND
AL23
GND
AL26
GND
AL32
GND
AL6
GND
AL8
GND
AM11
GND
AM31
GND
AM9
GND
AN11
GND
AN2
GND
AN30
GND
AN6
GND
AN8
GND
AP11
GND
AP7
GND
AP9
GND
AR5
GND
B11
GND
B13
GND
B15
GND
B17
GND
B19
GND
B21
GND
B23
GND
B25
GND
B27
GND
B29
GND
B31
GND
B33
GND
B7
GND
B9
GND
C1
GND
C39
GND
E35
GND
E5
GND
F11
GND
F13
GND
A39 AW1 AW39
Mars AG22 NC
20
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
Mars_M2/ GND
Mars_M2/ GND
Mars_M2/ GND
Richland
Richland
Richland
20 47Saturday, January 26, 2013
20 47Saturday, January 26, 2013
20 47Saturday, January 26, 2013
of
of
of
A1A
A1A
A1A
For Internal Check Only
<VGA>
VMA_RDQS[7..0][22]
VMA_WDQS[7..0][22]
Place MVREF dividers and Caps close to ASIC
+1.5V_GPU
R5060
Ra
EV@40.2/F_4
R5062
Rb
EV@100/F_4
+1.5V_GPU
R5070
Ra
EV@40.2/F_4
VMA_DQ[63..0][22]
VMA_DM[7..0][22]
VMA_MA[14..0][22]
VMA_BA0[22] VMA_BA1[22] VMA_BA2[22]
(0.7*VDDR1)
C5156 EV@1U/6.3V_4X
(0.7*VDDR1)
VMA_DQ[63..0] VMA_DM[7..0] VMA_RDQS[7..0] VMA_WDQS[7..0] VMA_MA[14..0]
VMA_BA0 VMA_BA1 VMA_BA2
VMA_DQ0 VMA_DQ1 VMA_DQ2 VMA_DQ3 VMA_DQ4 VMA_DQ5 VMA_DQ6 VMA_DQ7 VMA_DQ8 VMA_DQ9 VMA_DQ10 VMA_DQ11 VMA_DQ12 VMA_DQ13 VMA_DQ14 VMA_DQ15 VMA_DQ16 VMA_DQ17 VMA_DQ18 VMA_DQ19 VMA_DQ20 VMA_DQ21 VMA_DQ22 VMA_DQ23 VMA_DQ24 VMA_DQ25 VMA_DQ26 VMA_DQ27 VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ31 VMA_DQ32 VMA_DQ33 VMA_DQ34 VMA_DQ35 VMA_DQ36 VMA_DQ37 VMA_DQ38 VMA_DQ39 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ44 VMA_DQ45 VMA_DQ46 VMA_DQ47 VMA_DQ48 VMA_DQ49 VMA_DQ50 VMA_DQ51 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ55 VMA_DQ56 VMA_DQ57 VMA_DQ58 VMA_DQ59 VMA_DQ60 VMA_DQ61 VMA_DQ62 VMA_DQ63
MVREFDA MVREFSA
R5068 EV@120/F_4 R5069 *EV@120/F_4
AG12
AH12
C37 C35 A35 E34 G32 D33
F32 E32 D31
F30 C30 A30
F28 C28 A28 E28 D27
F26 C26 A26
F24 C24 A24 E24 C22 A22
F22 D21 A20
F20 D19 E18 C18 A18
F18 D17 A16
F16 D15 E14
F14 D13
F12 A12 D11
F10 A10 C10 G13 H13
J13 H11 G10
G8 K9
K10
G9 A8 C8 E8 A6 C6 E6 A5
L18
L20
L27 N12
M12 M27
DQA0_0 DQA0_1 DQA0_2 DQA0_3 DQA0_4 DQA0_5 DQA0_6 DQA0_7 DQA0_8 DQA0_9 DQA0_10 DQA0_11 DQA0_12 DQA0_13 DQA0_14 DQA0_15 DQA0_16 DQA0_17 DQA0_18 DQA0_19 DQA0_20 DQA0_21 DQA0_22 DQA0_23 DQA0_24 DQA0_25 DQA0_26 DQA0_27 DQA0_28 DQA0_29 DQA0_30 DQA0_31 DQA1_0 DQA1_1 DQA1_2 DQA1_3 DQA1_4 DQA1_5 DQA1_6 DQA1_7 DQA1_8 DQA1_9 DQA1_10 DQA1_11 DQA1_12 DQA1_13 DQA1_14 DQA1_15 DQA1_16 DQA1_17 DQA1_18 DQA1_19 DQA1_20 DQA1_21 DQA1_22 DQA1_23 DQA1_24 DQA1_25 DQA1_26 DQA1_27 DQA1_28 DQA1_29 DQA1_30 DQA1_31
MVREFDA MVREFSA
NC_MEM_CALRN0 NC_MEM_CALRN1 NC_MEM_CALRN2
NC_MEM_CALRP1 MEM_CALRP0 NC_MEM_CALRP2
PART 3 0F 9 GDDR5/DDR3
MEMORY INTERFACE A
U5000C
MAA1_5/MAA_BA2 MAA1_6/MAA_BA0 MAA1_7/MAA_BA1
WCKA0_0/DQMA_0 WCKA0B_0/DQMA_1 WCKA0_1/DQMA_2 WCKA0B_1/DQMA_3 WCKA1_0/DQMA_4 WCKA1B_0/DQMA_5 WCKA1_1/DQMA_6 WCKA1B_1/DQMA_7
EDCA0_0/QSA_0 EDCA0_1/QSA_1 EDCA0_2/QSA_2 EDCA0_3/QSA_3 EDCA1_0/QSA_4 EDCA1_1/QSA_5 EDCA1_2/QSA_6 EDCA1_3/QSA_7
DDBIA0_0/QSA_0B DDBIA0_1/QSA_1B DDBIA0_2/QSA_2B DDBIA0_3/QSA_3B DDBIA1_0/QSA_4B DDBIA1_1/QSA_5B DDBIA1_2/QSA_6B DDBIA1_3/QSA_7B
EV@Mars_M2
MAA0_0/MAA_0 MAA0_1/MAA_1 MAA0_2/MAA_2 MAA0_3/MAA_3 MAA0_4/MAA_4 MAA0_5/MAA_5 MAA0_6/MAA_6 MAA0_7/MAA_7 MAA1_0/MAA_8 MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12
ADBIA0/ODTA0 ADBIA1/ODTA1
CLKA0 CLKA0B
CLKA1 CLKA1B
RASA0B RASA1B
CASA0B CASA1B
CSA0B_0 CSA0B_1
CSA1B_0 CSA1B_1
CKEA0 CKEA1
WEA0B WEA1B
MAA0_8/MAA_13 MAA1_8/MAA_14 MAA0_9/MAA_15
MAA1_9/RSVD
G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17
A32 C32 D23 E22 C14 A14 E10 D9
C34 D29 D25 E20 E16 E12 J10 D7
A34 E30 E26 C20 C16 C12 J11 F8
J21 G19
H27 G27
J14 H14
K23 K19
K20 K17
K24 K27
M13 K16
K21 J20
K26 L15
H23 J19 M21 M20
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_BA2 VMA_BA0 VMA_BA1
VMA_DM0 VMA_DM1 VMA_DM2 VMA_DM3 VMA_DM4 VMA_DM5 VMA_DM6 VMA_DM7
VMA_RDQS0 VMA_RDQS1 VMA_RDQS2 VMA_RDQS3 VMA_RDQS4 VMA_RDQS5 VMA_RDQS6 VMA_RDQS7
VMA_WDQS0 VMA_WDQS1 VMA_WDQS2 VMA_WDQS3 VMA_WDQS4 VMA_WDQS5 VMA_WDQS6 VMA_WDQS7
VMA_CLK0 VMA_CLK0#
VMA_CLK1 VMA_CLK1#
VMA_RAS0# VMA_RAS1#
VMA_CAS0# VMA_CAS1#
VMA_CS0#
VMA_CS1#
VMA_CKE0 VMA_CKE1
VMA_WE0# VMA_WE1#
VMA_MA13 VMA_MA14
VMA_ODT0 [22] VMA_ODT1 [22]
VMA_CLK0 [22] VMA_CLK0# [22]
VMA_CLK1 [22] VMA_CLK1# [22]
VMA_RAS0# [22] VMA_RAS1# [22]
VMA_CAS0# [22] VMA_CAS1# [22]
VMA_CS0# [22]
VMA_CS1# [22]
VMA_CKE0 [22] VMA_CKE1 [22]
VMA_WE0# [22] VMA_WE1# [22]
VMB_DQ[63..0][23]
VMB_DM[7..0][23]
VMB_RDQS[7..0][23]
VMB_WDQS[7..0][23]
VMB_MA[14..0][23]
VMB_BA0[23] VMB_BA1[23] VMB_BA2[23]
Place MVREF dividers and Caps close to ASIC
+1.5V_GPU
(0.7*VDDR1)
R5061
Ra
EV@40.2/F_4
Rb
+1.5V_GPU
Ra
R5064 EV@100/F_4
R5071 EV@40.2/F_4
C5157 EV@1U/6.3V_4X
(0.7*VDDR1)
VMB_DQ[63..0] VMB_DM[7..0] VMB_RDQS[7..0] VMB_WDQS[7..0] VMB_MA[14..0]
VMB_BA0 VMB_BA1 VMB_BA2
VMB_DQ0 VMB_DQ1 VMB_DQ2 VMB_DQ3 VMB_DQ4 VMB_DQ5 VMB_DQ6 VMB_DQ7 VMB_DQ8 VMB_DQ9 VMB_DQ10 VMB_DQ11 VMB_DQ12 VMB_DQ13 VMB_DQ14 VMB_DQ15 VMB_DQ16 VMB_DQ17 VMB_DQ18 VMB_DQ19 VMB_DQ20 VMB_DQ21 VMB_DQ22 VMB_DQ23 VMB_DQ24 VMB_DQ25 VMB_DQ26 VMB_DQ27 VMB_DQ28 VMB_DQ29 VMB_DQ30 VMB_DQ31 VMB_DQ32 VMB_DQ33 VMB_DQ34 VMB_DQ35 VMB_DQ36 VMB_DQ37 VMB_DQ38 VMB_DQ39 VMB_DQ40 VMB_DQ41 VMB_DQ42 VMB_DQ43 VMB_DQ44 VMB_DQ45 VMB_DQ46 VMB_DQ47 VMB_DQ48 VMB_DQ49 VMB_DQ50 VMB_DQ51 VMB_DQ52 VMB_DQ53 VMB_DQ54 VMB_DQ55 VMB_DQ56 VMB_DQ57 VMB_DQ58 VMB_DQ59 VMB_DQ60 VMB_DQ61 VMB_DQ62 VMB_DQ63
MVREFDB MVREFSB
AA12
U5000D
21
PART 4 0F 9
DQB0_0 DQB0_1 DQB0_2 DQB0_3 DQB0_4 DQB0_5 DQB0_6 DQB0_7 DQB0_8 DQB0_9 DQB0_10 DQB0_11 DQB0_12 DQB0_13 DQB0_14 DQB0_15 DQB0_16 DQB0_17 DQB0_18 DQB0_19 DQB0_20 DQB0_21 DQB0_22 DQB0_23 DQB0_24 DQB0_25 DQB0_26 DQB0_27 DQB0_28 DQB0_29 DQB0_30 DQB0_31 DQB1_0 DQB1_1 DQB1_2 DQB1_3 DQB1_4 DQB1_5 DQB1_6 DQB1_7 DQB1_8 DQB1_9 DQB1_10 DQB1_11 DQB1_12 DQB1_13 DQB1_14 DQB1_15 DQB1_16 DQB1_17 DQB1_18 DQB1_19 DQB1_20 DQB1_21 DQB1_22 DQB1_23 DQB1_24 DQB1_25 DQB1_26 DQB1_27 DQB1_28 DQB1_29 DQB1_30 DQB1_31
MVREFDB MVREFSB
GDDR5/DDR3
MEMORY INTERFACE B
MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8 MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12
WCKB0_0/DQMB_0 WCKB0B_0/DQMB_1 WCKB0_1/DQMB_2 WCKB0B_1/DQMB_3 WCKB1_0/DQMB_4 WCKB1B_0/DQMB_5 WCKB1_1/DQMB_6 WCKB1B_1/DQMB_7
EDCB0_0/QSB_0 EDCB0_1/QSB_1 EDCB0_2/QSB_2 EDCB0_3/QSB_3 EDCB1_0/QSB_4 EDCB1_1/QSB_5 EDCB1_2/QSB_6 EDCB1_3/QSB_7
DDBIB0_0/QSB_0B DDBIB0_1/QSB_1B DDBIB0_2/QSB_2B DDBIB0_3/QSB_3B DDBIB1_0/QSB_4B DDBIB1_1/QSB_5B DDBIB1_2/QSB_6B DDBIB1_3/QSB_7B
ADBIB0/ODTB0 ADBIB1/ODTB1
MAB0_8/MAB_13 MAB1_8/MAB_14 MAB0_9/MAB_15
EV@Mars_M2
MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1
CLKB0 CLKB0B
CLKB1 CLKB1B
RASB0B RASB1B
CASB0B CASB1B
CSB0B_0 CSB0B_1
CSB1B_0 CSB1B_1
CKEB0 CKEB1
WEB0B WEB1B
MAB1_9/RSVD
DRAM_RST
P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9
H3 H1 T3 T5 AE4 AF5 AK6 AK5
F6 K3 P3 V5 AB5 AH1 AJ9 AM5
G7 K1 P1 W4 AC4 AH3 AJ8 AM3
T7 W7
L9 L8
AD8 AD7
T10 Y10
W10 AA10
P10 L10
AD10 AC10
U10 AA11
N10 AB11
T8 W8 U12 V12
AH11
VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_BA2 VMB_BA0 VMB_BA1
VMB_DM0 VMB_DM1 VMB_DM2 VMB_DM3 VMB_DM4 VMB_DM5 VMB_DM6 VMB_DM7
VMB_RDQS0 VMB_RDQS1 VMB_RDQS2 VMB_RDQS3 VMB_RDQS4 VMB_RDQS5 VMB_RDQS6 VMB_RDQS7
VMB_WDQS0 VMB_WDQS1 VMB_WDQS2 VMB_WDQS3 VMB_WDQS4 VMB_WDQS5 VMB_WDQS6 VMB_WDQS7
VMB_CLK0 VMB_CLK0#
VMB_CLK1 VMB_CLK1#
VMB_RAS0# VMB_RAS1#
VMB_CAS0# VMB_CAS1#
VMB_CS0#
VMB_CS1#
VMB_CKE0 VMB_CKE1
VMB_WE0# VMB_WE1#
VMB_MA13 VMB_MA14
GPU_DRAM_RST
QSB[7..0]
QSB#[7..0]
VMB_ODT0 [23] VMB_ODT1 [23]
VMB_CLK0 [23] VMB_CLK0# [23]
VMB_CLK1 [23] VMB_CLK1# [23]
VMB_RAS0# [23] VMB_RAS1# [23]
VMB_CAS0# [23] VMB_CAS1# [23]
VMB_CS0# [23]
VMB_CS1# [23]
VMB_CKE0 [23] VMB_CKE1 [23]
VMB_WE0# [23] VMB_WE1# [23]
C5 C3 E3 E1 F1 F3 F5 G4 H5 H6 J4 K6 K5 L4 M6 M1 M3 M5 N4 P6 P5 R4 T6 T1 U4 V6 V1 V3 Y6 Y1 Y3
Y5 AA4 AB6 AB1 AB3
AD6 AD1 AD3 AD5
AF1 AF3 AF6
AG4 AH5 AH6
AJ4 AK3 AF8 AF9
AG8 AG7
AK9 AL7
AM8 AM7
AK1 AL4
AM6 AM1 AN4
AP3 AP1 AP5
Y12
Rb
R5072 EV@100/F_4
C5158 EV@1U/6.3V_4X
MEM_CALRN0
MEM_CALRN1
MEM_CALRN2
MEM_CALRP0
MEM_CALRP1
MEM_CALRP2
243R
X
243R
243R
X
243R
SeymourThamesBall Name
X
243R
X
X
243R
X
Mars
X
X
X
120R
X
X
Rb
R5073 EV@100/F_4
C5159 EV@1U/6.3V_4X
25mm (max) 5mm (max) 25mm (max)
GPU_DRAM_RST
Place all these componets very close to GPU (within 25mm) and keep all components close to each other ** This basic topology should be used for DRAM_RAT for DDR3/GDDR5
These Capacitors and Resistor values arre an example only The series R and || cap values will depend on the DRAM loads and will have to be calculated for differrent Memory, DRAM loads and board to pass Reset Signal Spec
R5074 EV@10/F_4
R5076 EV@4.99K/F_4
R5075 EV@51/F_4
C5160 EV@120P/50V_4N
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MEM_RST# [22,23]
C5328 *E@0.1U/10V_4X
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Mars_M2/ MEM Interface
Mars_M2/ MEM Interface
Mars_M2/ MEM Interface
Richland
Richland
Richland
21 47Saturday, January 26, 2013
21 47Saturday, January 26, 2013
21 47Saturday, January 26, 2013
A1A
A1A
A1A
of
of
of
For Internal Check Only
5
VMA_DQ[63..0][21]
VMA_DM[7..0][21] VMA_RDQS[7..0][21] VMA_WDQS[7..0][21]
D D
C C
VMA_DQ[63..0] VMA_DM[7..0] VMA_RDQS[7..0] VMA_WDQS[7..0]
VMA_MA10[21] VMA_MA11[21] VMA_MA12[21] VMA_MA13[21] VMA_MA14[21]
VMA_CLK0#[21] VMA_CKE0[21]
VMA_ODT0[21] VMA_RAS0#[21]
VMA_CAS0#[21] VMA_WE0#[21]
QSA[7..0] QSA#[7..0]
VMA_MA0[21] VMA_MA1[21] VMA_MA2[21] VMA_MA3[21] VMA_MA4[21] VMA_MA5[21] VMA_MA6[21] VMA_MA7[21] VMA_MA8[21] VMA_MA9[21]
VMA_BA0[21] VMA_BA1[21] VMA_BA2[21]
VMA_CLK0[21]
VMA_CS0#[21]
MEM_RST#[21,23]
U5002
M8
VREFC_VMA1 VREFD_VMA1
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA13 VMA_MA14 VMA_MA14
VMA_BA0 VMA_BA1 VMA_BA2
VMA_CLK0 VMA_CLK0# VMA_CKE0
VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0#
VMA_RDQS0 VMA_RDQS3
VMA_DM0 VMA_DM3
VMA_WDQS0 VMA_WDQS3
MEM_RST#
VMA_ZQ1
R5077
Mars@243/F_4
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
100-BALL SDRAM DDR3
Mars@VRAM _DDR3
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9
VSS#A9 VSS#B3 VSS#E1
VSS#G8
VSS#J2
VSS#J8 VSS#M1 VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1 VSSQ#B9
VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9
E3
VMA_DQ5
F7
VMA_DQ0
F2
VMA_DQ6
F8
VMA_DQ1
H3
VMA_DQ4
H8
VMA_DQ3
G2
VMA_DQ7
H7
VMA_DQ2
D7
VMA_DQ24
C3
VMA_DQ31
C8
VMA_DQ27
C2
VMA_DQ28
A7
VMA_DQ25
A2
VMA_DQ29
B8
VMA_DQ26
A3
VMA_DQ30
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
+1.5V_GPU
+1.5V_GPU
TOP Left TOP Right
B B
R5081 Mars@4.99K/F_4
VREFC_VMA1
R5089 Mars@4.99K/F_4
C5161 Mars@0.1U/10V_4X
R5082 Mars@4.99K/F_4
VREFD_VMA1
R5090 Mars@4.99K/F_4
C5162 Mars@0.1U/10V_4X
+1.5V_GPU +1.5V_GPU+1.5V_GPU +1.5V_GPU
R5083 Mars@4.99K/F_4
R5091 Mars@4.99K/F_4
4
CHANNEL A: 1024MB DDR3 (128M*16*4pcs)
VREFC_VMA2 VREFD_VMA2
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12
VMA_BA0 VMA_BA1 VMA_BA2
VMA_CLK0 VMA_CLK0# VMA_CKE0
VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0#
VMA_RDQS1 VMA_RDQS2
VMA_DM1 VMA_DM2
VMA_WDQS1 VMA_WDQS2
MEM_RST#
VMA_ZQ2
R5078
Mars@243/F_4
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
100-BALL SDRAM DDR3
Mars@VRAM _DDR3
U5003
M8
BOT Left
VREFC_VMA2 VREFD_VMA2
C5163 Mars@0.1U/10V_4X
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9
VSS#A9 VSS#B3 VSS#E1
VSS#G8
VSS#J2
VSS#J8 VSS#M1 VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
R5084 Mars@4.99K/F_4
R5092 Mars@4.99K/F_4
VMA_DQ20 VMA_DQ19 VMA_DQ23 VMA_DQ17 VMA_DQ22 VMA_DQ16 VMA_DQ21 VMA_DQ18
VMA_DQ12 VMA_DQ14 VMA_DQ8 VMA_DQ11 VMA_DQ10 VMA_DQ15 VMA_DQ9 VMA_DQ13
+1.5V_GPU
+1.5V_GPU
C5164 Mars@0.1U/10V_4X
3
2
1
<VGA>
22
VREFC_VMA3 VREFD_VMA3
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA13 VMA_MA14 VMA_MA14
VMA_BA0 VMA_BA1 VMA_BA2
VMA_CLK1
VMA_CLK1[21] VMA_CLK1#[21] VMA_CKE1[21]
VMA_ODT1[21] VMA_RAS1#[21]
VMA_CAS1#[21] VMA_WE1#[21]
VMA_CLK1# VMA_CKE1
VMA_ODT1 VMA_CS1#
VMA_CS1#[21]
VMA_RAS1# VMA_CAS1# VMA_WE1#
VMA_RDQS6 VMA_RDQS4
VMA_DM6 VMA_DM4
VMA_WDQS6 VMA_WDQS4
MEM_RST#
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
VMA_ZQ3 VMA_ZQ4
ZQ
R5079
Mars@243/F_4
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
Mars@VRAM _DDR3
U5004
M8
BOT Right
Group-A1 VREFGroup-A0 VREF
R5085 Mars@4.99K/F_4
VREFC_VMA3 VREFD_VMA3
R5093 Mars@4.99K/F_4
C5165 Mars@0.1U/10V_4X
100-BALL SDRAM DDR3
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD#B2 VDD#D9
VDD#G7
VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9
VSS#A9 VSS#B3 VSS#E1 VSS#G8
VSS#J2
VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9
VSSQ#B1
VSSQ#B9 VSSQ#D1 VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9 VSSQ#G1 VSSQ#G9
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
R5086 Mars@4.99K/F_4
R5094 Mars@4.99K/F_4
E3
VMA_DQ54
F7
VMA_DQ50
F2
VMA_DQ53
F8
VMA_DQ49
H3
VMA_DQ52
H8
VMA_DQ51
G2
VMA_DQ55
H7
VMA_DQ48
D7
VMA_DQ32
C3
VMA_DQ36
C8
VMA_DQ33
C2
VMA_DQ37
A7
VMA_DQ34
A2
VMA_DQ39
B8
VMA_DQ35
A3
VMA_DQ38
+1.5V_GPU
B2 D9 G7 K2 K8 N1 N9 R1 R9
+1.5V_GPU
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
C5166 Mars@0.1U/10V_4X
VREFC_VMA4 VREFD_VMA4
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12
VMA_BA0 VMA_BA1 VMA_BA2
VMA_CLK1 VMA_CLK1# VMA_CKE1
VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1#
VMA_RDQS5 VMA_RDQS7
VMA_DM5 VMA_DM7
VMA_WDQS5 VMA_WDQS7
MEM_RST#
U5005
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
R5080
Mars@243/F_4
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
100-BALL SDRAM DDR3
Mars@VRAM _DDR3
R5087 Mars@4.99K/F_4
VREFC_VMA4 VREFD_VMA4
R5095 Mars@4.99K/F_4
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9
VSS#A9 VSS#B3 VSS#E1 VSS#G8
VSS#J2
VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8
VSSQ#F9 VSSQ#G1 VSSQ#G9
C5167 Mars@0.1U/10V_4X
E3 F7 F2 F8 H3 H8 G2 H7
D7 C3 C8 C2 A7 A2 B8 A3
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
VMA_DQ46 VMA_DQ45 VMA_DQ44 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ47
VMA_DQ61 VMA_DQ58 VMA_DQ63 VMA_DQ56 VMA_DQ60 VMA_DQ59 VMA_DQ62 VMA_DQ57
+1.5V_GPU+1.5V_GPU+1.5V_GPU +1.5V_GPU
R5088 Mars@4.99K/F_4
R5096 Mars@4.99K/F_4
+1.5V_GPU
+1.5V_GPU
C5168 Mars@0.1U/10V_4X
MEM_A0 CLK
VMA_CLK0 VMA_CLK0#
R5097 Mars@40.2/F_4
A A
R5098 Mars@40.2/F_4
C5189 Mars@0.01U/25V_4X
Group-A0 decoupling CAP
+1.5V_GPU
C5169 Mars@1U/6.3V_4X
+1.5V_GPU
C5186 Mars@1U/6.3V_4X
+1.5V_GPU
C5203 Mars@4.7U/6.3V_6X
5
C5170 Mars@1U/6.3V_4X
C5187 Mars@1U/6.3V_4X
C5204 Mars@4.7U/6.3V_6X
C5171 Mars@1U/6.3V_4X
C5188 Mars@1U/6.3V_4X
C5205 Mars@4.7U/6.3V_6X
C5178 Mars@1U/6.3V_4X
C5196 Mars@1U/6.3V_4X
C5206 Mars@4.7U/6.3V_6X
C5179 Mars@1U/6.3V_4X
C5197 Mars@1U/6.3V_4X
4
C5207 Mars@4.7U/6.3V_6X
C5180 Mars@1U/6.3V_4X
C5198 Mars@1U/6.3V_4X
C5181 Mars@1U/6.3V_4X
C5199 Mars@1U/6.3V_4X
C5182 Mars@1U/6.3V_4X
C5200 Mars@1U/6.3V_4X
Group-A1 decoupling CAP
+1.5V_GPU
C5172 Mars@1U/6.3V_4X
+1.5V_GPU
C5190 Mars@1U/6.3V_4X
+1.5V_GPU
C5208 Mars@4.7U/6.3V_6X
3
C5173 Mars@1U/6.3V_4X
C5191 Mars@1U/6.3V_4X
C5209 Mars@4.7U/6.3V_6X
C5174 Mars@1U/6.3V_4X
C5192 Mars@1U/6.3V_4X
C5210 Mars@4.7U/6.3V_6X
C5175 Mars@1U/6.3V_4X
C5193 Mars@1U/6.3V_4X
C5211 Mars@4.7U/6.3V_6X
C5176 Mars@1U/6.3V_4X
C5194 Mars@1U/6.3V_4X
C5212 Mars@4.7U/6.3V_6X
2
C5177 Mars@1U/6.3V_4X
C5195 Mars@1U/6.3V_4X
C5183 Mars@1U/6.3V_4X
C5201 Mars@1U/6.3V_4X
C5184 Mars@1U/6.3V_4X
C5202 Mars@1U/6.3V_4X
MEM_A1 CLK
VMA_CLK1 VMA_CLK1#
R5099 Mars@40.2/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
VRAM_A: DDR3*4PCS
VRAM_A: DDR3*4PCS
VRAM_A: DDR3*4PCS
1
R5100 Mars@40.2/F_4
C5185 Mars@0.01U/25V_4X
Richland
Richland
Richland
22 47Saturday, January 26, 2013
22 47Saturday, January 26, 2013
22 47Saturday, January 26, 2013
of
of
of
A1A
A1A
A1A
For Internal Check Only
5
VMB_MA0[21] VMB_MA1[21] VMB_MA2[21] VMB_MA3[21] VMB_MA4[21] VMB_MA5[21] VMB_MA6[21] VMB_MA7[21] VMB_MA8[21]
VMB_MA9[21] VMB_MA10[21] VMB_MA11[21] VMB_MA12[21] VMB_MA13[21] VMB_MA14[21]
VMB_BA0[21]
VMB_BA1[21]
VMB_BA2[21]
VMB_CLK0[21]
VMB_CLK0#[21]
VMB_CKE0[21]
VMB_ODT0[21]
VMB_CS0#[21] VMB_RAS0#[21] VMB_CAS0#[21] VMB_WE0#[21]
MEM_RST#[21,22]
VMB_DQ[63..0] VMB_DM[7..0] VMB_RDQS[7..0] VMB_WDQS[7..0]
QSA[7..0] QSA#[7..0]
VREFC_VMB1 VREFD_VMB1
VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 VMB_MA13 VMB_MA13 VMB_MA13 VMB_MA14 VMB_MA14 VMB_MA14 VMB_MA14
VMB_BA0 VMB_BA1 VMB_BA2
VMB_CLK0 VMB_CLK0# VMB_CKE0
VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0#
VMB_RDQS2 VMB_RDQS3
VMB_DM2 VMB_DM3
VMB_WDQS2 VMB_WDQS0 VMB_WDQS3
MEM_RST#
VMB_ZQ1
EV@243/F_4
R5101
U5006
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
EV@VRAM _DDR3
100-BALL SDRAM DDR3
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9
VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9
E3
VMB_DQ23
F7
VMB_DQ16
F2
VMB_DQ21
F8
VMB_DQ17
H3
VMB_DQ22
H8
VMB_DQ19
G2
VMB_DQ20
H7
VMB_DQ18
D7
VMB_DQ26
C3
VMB_DQ30
C8
VMB_DQ28
C2
VMB_DQ31
A7
VMB_DQ24
A2
VMB_DQ27
B8
VMB_DQ25
A3
VMB_DQ29
+1.5V_GPU
B2 D9 G7 K2 K8 N1 N9 R1 R9
+1.5V_GPU
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
VMB_DQ[63..0][21]
VMB_DM[7..0][21]
VMB_RDQS[7..0][21]
VMB_WDQS[7..0][21]
D D
C C
BOT Down
4
CHANNEL B: 1024MB DDR3 (128M*16*4pcs)
U5007
VREFC_VMB2 VREFD_VMB2
VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12
VMB_BA0 VMB_BA1 VMB_BA2
VMB_CLK0 VMB_CLK0# VMB_CKE0
VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0#
VMB_RDQS0 VMB_RDQS1
VMB_DM0 VMB_DM1
VMB_WDQS1
MEM_RST#
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
VMB_ZQ2 VMB_ZQ3 VMB_ZQ4
R5102
EV@243/F_4
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
100-BALL SDRAM DDR3
EV@VRAM _DDR3
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9
VSS#A9 VSS#B3 VSS#E1
VSS#G8
VSS#J2
VSS#J8 VSS#M1 VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8
VSSQ#F9 VSSQ#G1 VSSQ#G9
E3
VMB_DQ1
F7
VMB_DQ4
F2
VMB_DQ2
F8
VMB_DQ5
H3
VMB_DQ0
H8
VMB_DQ7
G2
VMB_DQ3
H7
VMB_DQ6
D7
VMB_DQ15
C3
VMB_DQ10
C8
VMB_DQ14
C2
VMB_DQ8
A7
VMB_DQ12
A2
VMB_DQ9
B8
VMB_DQ13
A3
VMB_DQ11
+1.5V_GPU
B2 D9 G7 K2 K8 N1 N9 R1 R9
+1.5V_GPU +1.5V_GPU
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
3
2
<VGA>
U5008
R5103
EV@243/F_4
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
EV@VRAM _DDR3
100-BALL SDRAM DDR3
VREFC_VMB3 VREFD_VMB3
VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12
VMB_BA0 VMB_BA1 VMB_BA2
VMB_CLK1[21]
VMB_CLK1#[21] VMB_CKE1[21]
VMB_ODT1[21]
VMB_CS1#[21] VMB_RAS1#[21] VMB_CAS1#[21] VMB_WE1#[21]
VMB_CLK1 VMB_CLK1# VMB_CKE1
VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1#
VMB_RDQS6 VMB_RDQS5
VMB_DM6 VMB_DM5
VMB_WDQS6 VMB_WDQS5
MEM_RST#
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9
VDDQ#F1 VDDQ#H2 VDDQ#H9
VSS#A9 VSS#B3 VSS#E1
VSS#G8
VSS#J2
VSS#J8 VSS#M1 VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8
VSSQ#F9 VSSQ#G1 VSSQ#G9
E3
VMB_DQ55
F7
VMB_DQ51
F2
VMB_DQ54
F8
VMB_DQ50
H3
VMB_DQ52
H8
VMB_DQ49
G2
VMB_DQ53
H7
VMB_DQ48
D7
VMB_DQ41
C3
VMB_DQ47
C8
VMB_DQ40
C2
VMB_DQ46
A7
VMB_DQ44
A2
VMB_DQ45
B8
VMB_DQ43
A3
VMB_DQ42
B2 D9 G7 K2 K8 N1 N9 R1 R9
+1.5V_GPU
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
TOP Down TOP Up
VREFC_VMB4 VREFD_VMB4
VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12
VMB_BA0 VMB_BA1 VMB_BA2
VMB_CLK1 VMB_CLK1# VMB_CKE1
VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1#
VMB_RDQS7 VMB_RDQS4
VMB_DM7 VMB_DM4
VMB_WDQS7 VMB_WDQS4
MEM_RST#
R5104
EV@243/F_4
U5009
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC#J1
L1
NC#L1
J9
NC#J9
L9
NC#L9
EV@VRAM _DDR3
BOT Up
100-BALL SDRAM DDR3
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9
VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9
VSS#A9 VSS#B3 VSS#E1 VSS#G8
VSS#J2
VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9
VSSQ#B1
VSSQ#B9 VSSQ#D1 VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9 VSSQ#G1 VSSQ#G9
1
23
E3
VMB_DQ62
F7
VMB_DQ61
F2
VMB_DQ63
F8
VMB_DQ60
H3
VMB_DQ59
H8
VMB_DQ58
G2
VMB_DQ57
H7
VMB_DQ56
D7
VMB_DQ38
C3
VMB_DQ32
C8
VMB_DQ36
C2
VMB_DQ33
A7
VMB_DQ37
A2
VMB_DQ35
B8
VMB_DQ39
A3
VMB_DQ34
+1.5V_GPU+1.5V_GPU
B2 D9 G7 K2 K8 N1 N9 R1 R9
A1 A8 C1 C9 D2 E9 F1 H2 H9
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B1 B9 D1 D8 E2 E8 F9 G1 G9
Group-B0 VREF Group-B1 VREF
B B
R5111 EV@4.99K/F_4
VREFC_VMB4 VREFD_VMB4VREFC_VMB2 VREFD_VMB2
R5119 EV@4.99K/F_4
C5234 EV@1U/6.3V_4X
C5252 EV@1U/6.3V_4X
C5219 EV@0.1U/10V_4X
C5235 EV@1U/6.3V_4X
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
C5229 EV@1U/6.3V_4X
C5247 EV@1U/6.3V_4X
C5259 EV@4.7U/6.3V_6X
R5109 EV@4.99K/F_4
R5117 EV@4.99K/F_4
C5230 EV@1U/6.3V_4X
C5248 EV@1U/6.3V_4X
C5217 EV@0.1U/10V_4X
C5231 EV@1U/6.3V_4X
C5249 EV@1U/6.3V_4X
C5260 EV@4.7U/6.3V_6X
R5110 EV@4.99K/F_4
R5118 EV@4.99K/F_4
C5232 EV@1U/6.3V_4X
C5250 EV@1U/6.3V_4X
C5261 EV@4.7U/6.3V_6X
2
C5218 EV@0.1U/10V_4X
C5233 EV@1U/6.3V_4X
C5251 EV@1U/6.3V_4X
C5262 EV@4.7U/6.3V_6X
R5105 EV@4.99K/F_4
VREFC_VMB1 VREFD_VMB1 VREFC_VMB3 VREFD_VMB3
R5113 EV@4.99K/F_4
C5213 EV@0.1U/10V_4X
MEM_B0 CLK MEM_B1 CLK
VMB_CLK0 VMB_CLK0#
R5123 EV@40.2/F_4
A A
R5124 EV@40.2/F_4
C5237 EV@0.01U/25V_4X
5
+1.5V_GPU
C5221 EV@1U/6.3V_4X
+1.5V_GPU
C5238 EV@1U/6.3V_4X
+1.5V_GPU
C5253 EV@4.7U/6.3V_6X
R5106 EV@4.99K/F_4
R5114 EV@4.99K/F_4
C5214 EV@0.1U/10V_4X
C5222 EV@1U/6.3V_4X
C5239 EV@1U/6.3V_4X
C5254 EV@4.7U/6.3V_6X
C5223 EV@1U/6.3V_4X
C5240 EV@1U/6.3V_4X
C5255 EV@4.7U/6.3V_6X
R5107 EV@4.99K/F_4
R5115 EV@4.99K/F_4
C5224 EV@1U/6.3V_4X
C5241 EV@1U/6.3V_4X
C5256 EV@4.7U/6.3V_6X
4
C5215 EV@0.1U/10V_4X
C5225 EV@1U/6.3V_4X
C5242 EV@1U/6.3V_4X
C5257 EV@4.7U/6.3V_6X
R5108 EV@4.99K/F_4
R5116 EV@4.99K/F_4
C5226 EV@1U/6.3V_4X
C5243 EV@1U/6.3V_4X
C5216 EV@0.1U/10V_4X
C5227 EV@1U/6.3V_4X
C5244 EV@1U/6.3V_4X
C5245 EV@1U/6.3V_4X
3
Group-B1 decoupling CAPGroup-B0 decoupling CAP
+1.5V_GPU
C5228 EV@1U/6.3V_4X
+1.5V_GPU
C5246 EV@1U/6.3V_4X
+1.5V_GPU
C5258 EV@4.7U/6.3V_6X
+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU
R5112 EV@4.99K/F_4
R5120 EV@4.99K/F_4
VMB_CLK1 VMB_CLK1#
VRAM_B: DDR3*4PCS
VRAM_B: DDR3*4PCS
VRAM_B: DDR3*4PCS
C5220 EV@0.1U/10V_4X
R5121 EV@40.2/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Richland
Richland
Richland
1
R5122 EV@40.2/F_4
C5236 EV@0.01U/25V_4X
23 47Saturday, January 26, 2013
23 47Saturday, January 26, 2013
23 47Saturday, January 26, 2013
of
of
of
A1A
A1A
A1A
For Internal Check Only
5
4
3
2
1
<VGA>
D D
SLP_S3#[7,35]
PE_GPIO1[7,43,44]
C C
SLP_S3#
21
D5004 EV@RB500V-40_100MA
R5620 EV@0_4
R5619 *EV@200K_4
+5V_S5
R5618 EV@100K_4
C5598 EV@4700P/25V_4X
C5597 EV@0.1U/10V_4X
31
2
PE_GPIO0[7]
APU_PCIE_RST#[8,28,30]
2
Q5015
EV@ME2N7002E_200MA
There is no restriction on
+3V
1
3
C5266 EV@10U/6.3V_6X
VDDR3 relative to other rails
Q5001
EV@ME1303_3A
C5267 EV@1U/6.3V_4X
B2A 1026 change for EOD
+3V
C5559 EV@0.1U/10V_4X
U5034
2 1
4
EV@TC7SH08FU(F)
3 5
PERST#_BUF
+3V_GPU
0.5A
C5268 EV@0.1U/10V_4X
PERST#_BUF [14]
GPU +3V power
R5625 EV@0_4
B2A for power sequence
24
GPU_MAINON [43,44]
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Richland
Richland
1
Richland
24 47Saturday, January 26, 2013
24 47Saturday, January 26, 2013
24 47Saturday, January 26, 2013
of
of
of
A1A
A1A
A1A
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
Mars_M2/ PX5
Mars_M2/ PX5
Mars_M2/ PX5
For Internal Check Only
5
USB 3.0 Power switch
USB_SC_EN#[35]
D D
URL@10K_4
+3V_S5
R2500
USB 3.0 CONN
L2500
2
USB_S&C#_R USB_S&C_R USB_S&C_R1
C C
2
3
*URL@MCM2012B900GBE
USBP10+[7] USBP10-[7]
<USB> <U3B>
+5V_S5
U2500
2
8
USB_SC_EN#
C2505 URL@1U/16V_6X
<U3B>
1
USB_S&C#_R1
1 443
2ND_MBCLK[5,35] 2ND_MBDATA[5,35]
EN#
1
GND
9
GND-C
URL@UP7534BRA8-15
<USB>
USB3_TXN0[7] USB3_TXP0[7]
USBP10+ USBP10-
+3VPCU
Q2502A
126
*S&C@2N7002KDW_115MA
OC#
+5V_S5 +5V_S5
IN1
OUT3
IN23OUT2
OUT1
4
+5VSUS_USBP0
7 6
C2500
5
*URL@470P/50V_4X
USB_SC_OC#
<EMI>
C2507 *URL@15P/50V_4C
USB3_RXN0[7] USB3_RXP0[7]
USB3_RXN0 USB3_RXP0
USB3_TXN0 USB3_TX0-_C
R2512 URL@0_4
USB3_TX0+_R
+5VSUS_USBP0
USB_S&C#_R1
USB3_RX0+
R2524 *S&C@10K_4
4
C2501 *URL@0.1U/10V_4X
USB_SC_OC# [7,35]
R2508 *URL@300_4
USB_S&C#_R USB_S&C_R
R2510 URL@0_4 R2511 URL@0_4
USB3_TX0-_R USB3_TX0+_R
ESD2501
1
1
2
VDD
GND
3
NC
4
4 556
*URL-3@AZ1065-06F
1015 change Caps to 220uF
+
C2504 URL@220U/6.3V_105CS_E18e
D2500 *UR@AZ5125-01J
RP2500 URL@0X2
241
USB3_RX0­USB3_RX0+
C2508 URL@0.1U/10V_4X C2509 URL@0.1U/10V_4XR2513 URL@0_4
10
USB3_TX0-_R
10
9 8
NC1
7
USB_S&C_R1
7
6
USB3_RX0-
+3VPCU
5
Q2502B
34
*S&C@2N7002KDW_115MA
3
R2525 *S&C@10K_4
C2502 *URL@10U/6.3V_8X
+5VSUS_USBP0
USB_S&C#_R1 USB_S&C_R1
USB3_TX0+_CUSB3_TXP0
SC_SDASC_SCL
C2503 *URL@100U/6.3V_1206
Q2500
2
URL@ME2N7002E_200MA
Right-Low Side USB3.0 Support S&C
CN2500
1
VBUS
1
2
D-
2
3
D+
3
4
4
GND
5
SSRX-
5
6
6
SSRX+
7
7
GND
8
8
SSTX-
9
SSTX+
9
11111010131312
URL@C19066-90905-L
12
3
USB w S&C MAXIM solution
R2501 URL@470/F_4
3
1
USB_BUS_SW3[35] USB_BUS_SW2[35]
CB0 CB10Status
0 01 10 1
SW2 SW3
CB0 CB10Status
0
01 10
1
14600
Auto mode
Force dedicated charger mode
Pass-Through(USB) mode
pass-through(USB) with CDP
1
Emulation
14644
2A Auto mode for Apple device
Force dedicated charger mode
Pass-Through(USB) mode
pass-through(USB) with CDP
1
Emulation
SC_SDA
+5V_S5
C2506 S&C@0.1U/10V_4X
R7
R2502 *S&C@10K_4
R1
R2506 *S&C@0_4 R2505 S&C@0_4
R2
R2523 *S&C@0_4
R3
CB1_CEN#_CB2 CB0_SDA
2
<SLC>
14566/14600/14617
R1 R2 R3
14566
14600
14617(no CB2)
14641/14642/14644
14640/14651 V
U2501
5
1 8
9
VCC
CB1/CEN#/CB2/INT# CB0/SDA
GND/CB1/SCL
GND
S&C@MAX14641ETA+T
TDP
TDM
DP
DM
C3A update S&C table
Charger , AM
Charger , FM
USB , PM
USB , CM
Charger , AM2
Charger , FM
USB , PM
USB , CM
VV
1015 Close to U2501
6
USBP10+
R2503 NS&C@0_4
7
USBP10-
R2504 NS&C@0_4
3 2
R4
4
GND_CB1
R2507 S&C@0_4
R5
R2522 *S&C@0_4
R6
R2509 *S&C@0_4
SW2 SW3SW3SW2
CB0 CB10Status
0
01 10
1
1
SW2 SW3
CB0 CB10Status
X
10
1
1
R4
V
V
V
V
V
R5
V
VV
V
USB_S&C_R USB_S&C#_R
USB_BUS_SW3 SC_SCL
14641
2A Auto mode for Apple device
Force 1A for Apple device
Pass-Through(USB) mode
pass-through(USB) with CDP Emulation
14642
2A Auto mode for Apple device
Pass-Through(USB) mode
pass-through(USB) with CDP Emulation
1
25
R6
R7
Charger , AM2
Charger , AP1
USB , PM
USB , CM
Charger , AM2
USB , PM
USB , CM
B B
USB 3.0 CONN
USB 2.0 CONN
A A
<U3B>
C2510 *URU-3@15P/50V_4C
USB3_RXN1
USB3_RXN1[7] USB3_RXP1[7]
USB3_TXN1[7] USB3_TXP1[7]
CN2504
21
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20
22
88511-200N
1005 Update FP
+5V_S5
R2521 100K_4
1124 for USB board Mouse LED glisten
5
R2516 URU-3@0_4
USB3_RXP1
R2517 URU-3@0_4
USB3_TXN1
R2519 URU-3@0_4
USB3_TXP1
R2520 URU-3@0_4
USBP11­USBP11+ USBP11+_R
R2514 *URU-3@300_4
USBP11-[7] USBP11+[7]
L2501
1
2
1
2
3
443
*URU@MCM2012B900GBE
USBP1+ [7] USBP1- [7]
USBP0+ [7] USBP0- [7]
USB_DB_OC# [7,35]
USB_DB_EN# [35]
+3V_S5
USBP11­USBP11+
USB3_RX1­USB3_RX1+
USB3_TX1-_R USB3_TX1+_R
USBP11-_R
RP2501 URU@0X2
241
C2516 URU-3@0.1U/10V_4X C2518 URU-3@0.1U/10V_4X
D2501 *URU@AZ5125-01J
4
3
<EMI>
<U2B>
Right-Up Side USB3.0/USB2.0 Co-lay
CN2502
1
+5VSUS_USBP1
USBP11-_R USBP11+_R
USB3_TX1-_C USB3_TX1+_C
+5VSUS_USBP1
USBP11-_R USBP11+_R
Confirm USB3.0 DFHS09FR085 ULU-3@TARA9-9V1391 USB2.0 DFHS04FR487 ULU-2@UARC6-4K1926
2 3 4 5 6 7 8 9
CN2503
1 2 3 4 5 6 7 8 9
VBUS
1
D-
2
D+
3 4
GND SSRX-
5 6
SSRX+
7
GND
8
SSTX­SSTX+
9
11111010131312
12
VBUS
1
D-
2
D+
3 4
GND SSRX-
5 6
SSRX+
7
GND
8
SSTX­SSTX+
9
11111010131312
12
URU-3@C19066-90905-L
URU-2@UARC8-4K1986
URU@10K_4
USB_NORMAL_EN#[35]
3
+5V_S5+3V_S5
R2515
USB_NORMAL_EN#
C2517 URU@1U/16V_6X
USB3_TX1+_R USB3_TX1-_R
+5VSUS_USBP1
USB3_RX1+ USB3_RX1-
2
4 1 9
ESD2500
1
1
2
VDD
3
NC
4
4 556
*URU-3@AZ1065-06F
U2502
IN1 IN23OUT2
EN# GND GND-C
URU@UP7534BRA8-15
10 GND NC1
7
8
OUT3 OUT1
OC#
10 9 8 7 6
+5VSUS_USBP1
7 6
C2511
5
*URU@470P/50V_4X
USB_NORMAL_OC#
USBP11+_RUSBP11-_R
2
1015 change Caps to 220uF
+
C2513
C2512 *URU@0.1U/10V_4X
URU@220U/6.3V_105CS_E18e
USB_NORMAL_OC# [7,35]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
C2514 *URU@10U/6.3V_8X
URU@ME2N7002E_200MA
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
USB2.0/USB3.0
USB2.0/USB3.0
USB2.0/USB3.0
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
C2515
*URU@100U/6.3V_1206
1
3
Q2501
2
1
Richland
Richland
Richland
25 47
25 47
25 47
R2518 URU@470/F_4
of
1A
1A
1A
For Internal Check Only
5
4
3
2
1
+3V
40mils
L2600 LDS@HCB1608KF-221T20_2A
+3V
D D
C C
B B
A A
80mils
L2601 LDS@HCB1608KF-221T20_2A
INT_LVDS_AUXN[5]
INT_LVDS_AUXP[5]
INT_LVDS_TXP0[5] INT_LVDS_TXN0[5] INT_LVDS_TXP1[5] INT_LVDS_TXN1[5]
CIICSCL
+3V
CIICSDA
C2600 LDS@10U/6.3V_6X
C2604 LDS@0.1U/10V_4X
R2637 *LDS@0_4
1
Q2600A *LDS@2N7002KDW_115MA
R2610 LDS@4.7K_4
R2614 LDS@4.7K_4
Q2600B *LDS@2N7002KDW_115MA
R2638 *LDS@0_4
MODE_CFG1(PIN48)
R2621 *LDS@4.7K_4
+3V
R2623 LDS@4.7K_4
+3V
5
AVCC33
C2601 LDS@0.1U/10V_4X
DVCC33
C2605 LDS@10U/6.3V_6X
INT_LVDS_HPD[5,32]
R2631 LDS@0_4 R2632 LDS@0_4
R2633 LDS@0_4 R2634 LDS@0_4 R2635 LDS@0_4 R2636 LDS@0_4
2
RP2601 eDP@0X2
4 2
RP2602 eDP@0X2
4 2
RP2603 eDP@0X2
4
Close to U2600
6
2
1018 FAE suggest connect to FCH and EC
5
34
01 0 1
MODE_CFG0 MODE_CFG1
Close to chip
C2602 LDS@0.1U/10V_4X
C2606 LDS@22U/6.3V_6X
PD at APU side
1 3 1 3 1 3
1010 Reserve 0_4
R2641 *LDS@0_4 R2639 *LDS@0_4
R2640 *LDS@0_4 R2642 *LDS@0_4
1010 Reserve 0_4
MODE_CFG0(PIN47)
EP MODEX
EEPROM MODEROM ONLY MODE
R2622 LDS@4.7K_4 R2624 *LDS@4.7K_4
C2607 LDS@0.1U/10V_4X
R2600 LDS@1K_4 R2601 LDS@100K_4
VCCK_V12
C2609 LDS@0.1U/10V_4X
INT_LVDS_AUXN_R [32] INT_LVDS_AUXP_R [32] INT_LVDS_TXP0_R [32] INT_LVDS_TXN0_R [32] INT_LVDS_TXP1_R [32] INT_LVDS_TXN1_R [32]
C2608 LDS@0.1U/10V_4X
AUX_CH_N AUX_CH_P
LANE0_P LANE0_N LANE1_P LANE1_N
3ND_MBCLK [15,35] SMB_LAN_CLK [7,30,34]
SMB_LAN_DAT [7,30,34]
3ND_MBDATA [15,35]
4
TEST_MODE
AVCC33
R2603 LDS@12K/F_4
APU_VARY_BL[5]
U2600
1
DP_HPD
2
TEST_MODE
3
AUX_CH_N
4
AUX_CH_P
5
DP_V33
6
DP_GND
7
LANE0_P
8
LANE0_N
9
LANE1_P
10
LANE1_N
11
DP_V12
12
DP_REXT
APU_VARY_BL_Q
R2619
*LDS@2.2K_4
MODE_CFG1
49
EPAD_GND
MODE_CFG148MODE_CFG0
CIICSCL13CIICSDA14SWR_VCCK/LDO_VCCK
CIICSCL
+1.5VSUS
*LDS@0.1U/10V_4X
MODE_CFG0
MIICSCL
VCCK_V12
TRAVIS_BL_EN
MIICSDA
42
45
46
47
MIICSCL
MIICSDA
44
BL_EN
41
43
VCCK
TXO0-
TXO0+
RTD2136R
GND16SWR_LX/LDO_FB17SWR_VDD/LDO_VDD
PWMOUT19PANEL_VCC20PWMIN21PVCC22TXE3+23TXE3-
15
18
CIICSDA
VCCK_V12
PIN17
DVCC33
TRAVIS_VARY_BL
PANEL_VCC
R2609 LDS@0_4
R2612 LDS@100K_4
+1.5VSUS
R2617
2.2K_4
C2613
2
1
Q2601 FDV301N_200MA
R2625 *LDS@0_4
C2603 LDS@0.1U/10V_4X
40
38
39
37
TXO1-
TXO2-
TXO1+
TXO2+
TXOC-
TXOC+
TXO3-
TXO3+
TXE0-
TXE0+
TXE1-
TXE1+
TXE2-
TXE2+
TXEC-
TXEC+
24
DVCC33=80mils
PWM_IN
DVCC33
+3V
R2620
4.7K_4
3
APU_VARY_BL_Q
3
36 35 34 33 32 31 30 29 28 27 26 25
APU_VARY_BL_Q [32]
INT_LCD_TXLOUT0- [32] INT_LCD_TXLOUT0+ [32] INT_LCD_TXLOUT1- [32] INT_LCD_TXLOUT1+ [32] INT_LCD_TXLOUT2- [32] INT_LCD_TXLOUT2+ [32]
INT_LCD_TXLCLKOUT- [32] INT_LCD_TXLCLKOUT+ [32]
INT_LCD_TXUOUT0- [32] INT_LCD_TXUOUT0+ [32] INT_LCD_TXUOUT1- [32] INT_LCD_TXUOUT1+ [32] INT_LCD_TXUOUT2- [32] INT_LCD_TXUOUT2+ [32] INT_LCD_TXUCLKOUT- [32] INT_LCD_TXUCLKOUT+ [32]
R2611 LDS@100K_4
R2613 LDS@100K_4
C3A Remove R2615
1206 FAE suggest change to 100K PD
EEPROM Mode
MIICSDA
RTD2136R
MIICSCL MODE_CFG0
RTD2136S
MODE_CFG1
R2615 *LDS@100K_4
C2610 *LDS@4.7U/6.3V_6X
1018 FAE suggest
0918 FAE suggest reserve SMbus connect to FCH
R2626 *LDS@0_4 R2627 *LDS@0_4
R2628 *LDS@0_4 R2629 *LDS@0_4
1- EEPROM with a size 8K-Byte 2- EEPROM device should be 2-byte addressing device 3- Slave address should configure as 0xA8
2
MIICSCL
MIICSDA
L2602 *LDS@TLPC3010C-4R7M
R2618 LDS@0_6
0918 FAE suggest C2611 used 22uF X5R L2602 used TLPC3010C-4R7M
60mils
2.2-uH(L2602) 0 Olm(R2618) SWR LDO
+3V
R2605 LDS@4.7K_4
+3V
R2606 LDS@4.7K_4
TRAVIS_BL_EN
TRAVIS_VARY_BL
PANEL_VCC
R2630 LDS@0_1206
U2601
8
VCC
5
SDA
6
SCL
4
GND
*LDS@M24C64
R2607 LDS@0_4
R2608 LDS@0_4
80mils
7
WP
3
A2
2
A1
1
A0
I2C address=0xA8
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet
Date: Sheet of
Date: Sheet of
Close to PIN17
VCCK_V12PIN17
C2611 LDS@22U/6.3V_6X
Connect NC
NC Connect
INT_LCD_EDIDCLK [32]
INT_LCD_EDIDDATA [32]
TRAVIS_BL_EN [32]
TRAVIS_VARY_BL [32]
PANEL_VCC_R [32]
For RTD2136S
C2614 *LDS@0.1U/10V_4X
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
TRAVIS RTD2136R
TRAVIS RTD2136R
TRAVIS RTD2136R
1
26
C2612 LDS@0.1U/10V_4X
Richland
Richland
Richland
of
26 47
26 47
26 47
1A
1A
1A
For Internal Check Only
5
HDMI
D D
INT_HDMI_TXDN0[5] INT_HDMI_TXDP0[5]
INT_HDMI_TXDN1[5] INT_HDMI_TXDP1[5]
INT_HDMI_TXDN2[5] INT_HDMI_TXDP2[5]
INT_HDMI_TXCN[5] INT_HDMI_TXCP[5]
INT_HDMI_TXDN2 INT_HDMI_TXDP2
R2700 *HM@100_4
INT_HDMI_TXDN1
R2703 *HM@100_4
INT_HDMI_TXDN0
R2704 *HM@100_4
INT_HDMI_TXCN INT_HDMI_TXCP
R2706 *HM@100_4
HDMI_SCL HDMI_SDA DDC5V
C2700 *HM@0.1U/10V_4X
INT_HDMI_TXDN0 INT_HDMI_TXDP0
INT_HDMI_TXDN1 INT_HDMI_TXDP1
INT_HDMI_TXDN2 INT_HDMI_TXDP2
INT_HDMI_TXCN INT_HDMI_TXCP
INT_HDMI_TXDP1 INT_HDMI_TXDP0
C2702 *HM@56P/50V_4N
C2703 *HM@56P/50V_4N
+5V
R2705 HM@0_6
4
0922 del HDMI_CON_CEC
1015 Change to correct diode (BC000220Z01)
12
Q2700
OUT
IN
GND
HM@AP2337SA-7
1 2
+5V_HDM
F2700 *HM@SMD1206P110TFT
3
C2706 *HM@0.1U/16V_4Y
2 1
D2701 *HM@B220LFA-13-F
C2707 *HM@0.1U/16V_4Y
INT_HDMI_TXDP2 INT_HDMI_TXDN2
INT_HDMI_TXDP1 INT_HDMI_TXDN1
INT_HDMI_TXDP0 INT_HDMI_TXDN0
INT_HDMI_TXCP INT_HDMI_TXCN
DDC5V
HDMI_HPD_L
D2700 *HM@AZ5125-01J
HDMI_SCL HDMI_SDA
C2701 HM@0.1U/10V_4X
3
CN2700
SHELL1
1
D2+
2
D2 Shield
3
D2-
4
D1+
5
D1 Shield
6
D1-
7
D0+
8
D0 Shield
9
D0-
10
CK+
11
CK Shield
12
CK-
13
CE Remote
14
NC
15
DDC CLK
16
DDC DATA
17
GND
18
+5V
19
HP DET
SHELL2
HM@2HE1655-000111F
1022 change FP
2
20
23
GND
22
GND
21
HDMI Hot-plug
INT_HDMI_HPD[5]
+3V
R2701 HM@1K_4
34
Q2701B
5
HM@2N7002KDW_115MA
+5V
R2702 HM@10K_4
6
HM@2N7002KDW_115MA
2
Q2701A
1
HDMI_HPD_L
R2708 HM@100K_4
1
27
1121 change HDMI solution
ESD2700
1 2 3
R2725 TSN_3V@0_4
4 5
1 2 3 4 5
1 2 3 4 5
R2726 *TSN@300_4
DDC5V
C C
Touch Screen
<TSN>
1114 add touch screen function
C3A Update Footprint for ME
B B
CN2701
1
1
2
2
3
3
4
4
5
5
6
6
TSN@50273-0060N-001
INT_HDMI_TXDN0 INT_HDMI_TXDN0 INT_HDMI_TXCP INT_HDMI_TXCP
INT_HDMI_TXCN INT_HDMI_TXCN
INT_HDMI_TXDN1 INT_HDMI_TXDP1
INT_HDMI_TXDN2 INT_HDMI_TXDP2
+5V +3V
R2724 *TSN_5V@0_4
nRST
R5626 *TSN@0_4
PA4
R5627 *TSN@0_4
1 2 GND_3/8 4 5
*HM@RClamp0524P
ESD2701
1 2 GND_3/8 4 5
*HM@RClamp0524P
ESD2702
1 2 GND_3/8 4 5
*HM@RClamp0524P
USBP8-_R [7] USBP8+_R [7]
PLTRST# [8,30,31,35]
10
10
9
9
7
7
6
6
10
10
9
9
7
7
6
6
10
10
9
9
7
7
6
6
C2705 *TSN@15P/50V_4C
HDMI_SDAHDMI_SDA HDMI_SCLHDMI_SCL
DDC5V HDMI_HPD_LHDMI_HPD_L
INT_HDMI_TXDP0INT_HDMI_TXDP0
INT_HDMI_TXDN1 INT_HDMI_TXDP1
INT_HDMI_TXDN2 INT_HDMI_TXDP2
HOLE24
1
*h-tc177bc91d91pt
HOLE28
1
*h-tc177bc98d98pt
INT_HDMI_AUXN[5]
INT_HDMI_AUXP[5]
HOLE25
1
*h-tc177bc91d91pt
HOLE29
1
*h-tc177bc98d98pt
1
*h-tc177bc91d91pt
C3A Add Hole for Connector
+3V
R2709 HM@2.2K_4
INT_HDMI_AUXN
INT_HDMI_AUXP HDMI_SCL
HOLE26
1
Q2702 HM@FDV301N_200MA
+3V
R2717 HM@2.2K_4
1
Q2704 HM@FDV301N_200MA
HOLE27
1
*h-tc177bc91d91pt
+5V
1015 add Diode for leakage
D2702 HM@RB500V-40_100MA
+3V
2
+3V
2
R2710 HM@2.2K_4
3
HDMI_SDA
+5V
1015 add Diode for leakage
D2703 HM@RB500V-40_100MA
R2718 HM@2.2K_4
3
+3V +5V
R2711 *HM@0_4
R2712 HM@0_4
Q2703
2
HM@FDV301N_200MA
R2721 HM@100K_4
C2704 HM@0.1U/10V_4X
R316,R311,R335,R330,R343,R339,R327 and R321 need to close to HDMI connector
R2713 HM@604/F_4
3
R2714 HM@604/F_4 R2715 HM@604/F_4 R2716 HM@604/F_4 R2719 HM@604/F_4
1
R2720 HM@604/F_4 R2722 HM@604/F_4 R2723 HM@604/F_4
INT_HDMI_TXDP0 INT_HDMI_TXDN0 INT_HDMI_TXDP1 INT_HDMI_TXDN1 INT_HDMI_TXDP2 INT_HDMI_TXDN2 INT_HDMI_TXCP
INT_HDMI_TXCN
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Saturday, January 26, 2013
Saturday, January 26, 2013
5
4
3
2
Saturday, January 26, 2013
PROJECT :
HDMI/CEC
HDMI/CEC
HDMI/CEC
1
Richland
Richland
Richland
27 47
27 47
27 47
1A
1A
1A
of
For Internal Check Only
5
Atheros Lan
<LAN> <LNG>
Power Sequence
VDD33
D D
0.163A(30mils)
+LAN_VDD33
C2800 LAN@10U/6.3V_6X
PERSTn(20mils)
AVDDL 20mil
C2814
C2815
LAN@0.1U/16V_4Y
LAN@1U/6.3V_4X
C C
1205 for FAE suggestion change to 15pF from 33pF
Close to Pin1
C2807 LAN@10U/6.3V_6X
APU_PCIE_RST#[8,24,30]
LAN@15P/50V_4CC2813
LAN@15P/50V_4CC2817
1204 change Crystal to 3225
+LAN_VDD33
23
4 1
PERSTn
C2808 *LAN@1000P/50V_4X
Y2800 LAN@25MHZ_30
=100ms
C2809 LAN@1U/6.3V_4X
PCIE_WAKE#
R2804 LAN@30K/F_4
AVDDH 20mil
C2818 LAN@0.1U/16V_4Y
C2810 LAN@0.1U/16V_4Y
R2800 LAN@0_4
C2819 LAN@1U/6.3V_4X
For EMI
TX0P
E@6.8P/50V_4NC2822
TX0N
E@6.8P/50V_4NC2823
TX1P
E@6.8P/50V_4NC2824
TX1N
E@6.8P/50V_4NC2826
PLACE NEAR LAN IC SIDE
B B
0920 FAE suggest remove 49.9K, 0.1u and 1000p
A A
5
TRANSFORMER CONN
For ESD
TX0P
TX0N
1114 change to mount
4
CKREQ_G# AVDDL
LAN_XTLO LAN_XTLI
AVDDH
10
RBIAS
R2805 LAN@2.37K/F_4
Individual to GND 25mil
C3A
U2802
1
6
CH1
CH4
5
2
VP
VN
4
CH23CH3
LAN@TVLST2304AD0
4
1 2 3 4 5 6 7 8 9
U2800
VDD33 PERSTn WAKEn CLKREQn ISOLATn AVDDL_REG XTLO XTLI AVDDH_REG RBIAS
LAN@AR8162-B
TX1P
TX1N
40
50
41
GND
GND142GND243GND344GND445GND546GND647GND748GND849GND9
Atheros
AR8161/8162
GIGA:AR8161B
10/100:AR8162B
<LAN> <LNG><LAN> <LNG>
1114 move transformer to RJ45 >350mils
AVDD_CEN_R
C2831 LAN@0.1U/16V_4Y
+LAN_VDD33
C2832 *LAN@1000P/50V_4X
1
1
1
D2800
*LAN@GT1206200ASMD
1114 reserve GDT for FAE suggest
2
2
2
1206 for EMI suggest change to 10P from 220P
DVDDL 20mil
35
33
36
37
34
31
32
38
LX
LED139LED0
RX_P
RX_N
AVDDL
REFCLK_P
REFCLK_N
DVDDL_REG
TRXP011TRXN012AVDDL13TRXP114TRXN115AVDD3316TRXP217TRXN218AVDDL19TRXP3
20
TX1P
TX0P
TX1N
TX0N
AVDDH_C 30mil
AVDDL 20mil
U2801
8
TX0N
TD-
7
TX0P
TD+
6
CT
5
NC
4
NC
3
CT
2
TX1N
RD-
TX1P
RD+1RX+
LAN@NS681610
1
D2801
2
*LAN@GT1206200ASMD
C2843 LAN@10P/3KV_1808N
LAN_LINKLED# LAN_ACTLED
DVDDL
AVDDVCO
AVDDL
AVDDL
AVDDH_C
AVDDL
TX­TX+
CT NC NC CT
RX-
C2803 LAN@1U/6.3V_4X
LAN@0.1U/16V_4YC2804
LAN@0.1U/16V_4YC2805
LAN@0.1U/16V_4YC2806
9
X-TX0N
10
X-TX0P
11
TERM0
12 13 14
TERM1
15
X-TX1N
16
X-TX1P
C2830
LAN@0.01U/100V_6X
TERM2
C2839
*LAN@0.1U/10V_4X
3
L2800
LAN@HCB1608KF-601T10_1A
C2801 LAN@4.7U/6.3V_6X
PCIE_TXN_LAN [3] PCIE_TXP_LAN [3]
CLK_PCIE_LANP [8] CLK_PCIE_LANN [8]
30
PCIE_RXP_LAN_C
TX_P
29
PCIE_RXN_LAN_C
TX_N
28
NC
27
TESTMODE
26
SMDATA
25
SMCLK
24
PPS
23
LED2
22
TRXN3
AVDDH
21
C2825 LAN@1U/6.3V_4X
R2809 LAN@0_6
AVDDH
LAN@0.1U/16V_4YC2828
C2802 LAN@1U/6.3V_4X
LAN@0.1U/10V_4XC2811 LAN@0.1U/10V_4XC2812
LAN@0.1U/16V_4YC2816
LAN@0.1U/16V_4YC2827
+LAN_VDD33
RJ45
C2829 LAN@0.01U/100V_6X
TERM3
C2840
R2811
R2810 LAN@75/F_8
3
LAN@75/F_8
*LAN@0.1U/10V_4X
2
AVDDLAVDDVCO
PCIE_RXP_LAN [3]
PCIE_RXN_LAN [3]
<LAN> <LNG> <LN1>
TERM0 TERM0
X-TX1N
TERM0
TERM0
X-TX1P X-TX0N X-TX0P
2
<LAN> <LNG> <LN1>
FCHIntegratedPU8.2Kto+3V
FCH_PCIE_LAN_CLKREQ#[7]
LAN-Wake up function
+LAN_VDD33
PCIE_WAKE#
Wake on LAN function
+3V_S5
R2806 *LAN@0_6
1
Q2801 LAN@ME1303_3A
C2820
2
LAN@0.01U/25V_4X
CN2800
8
NC4/3-
7
NC/3+
6
RX-/1-
5
NC2/2-
4
NC1/2+
3
RX+/1+
2
TX-/0-
1
TX+/0+
GND GND
LAN@2RJ3057-008211F
1005 Update FP
9 10
LED0 = LAN_ACTLED
LED1 = LAN_LINKLED#
LED2
1205 for EMI solution
R2812 *SHORT_6 R2816 *SHORT_6
<LAN>
<LAN>
+LAN_VDD33
3
1
+3V
R2801 LAN@4.7K_4
2
1
Q2802 LAN@ME2N7002E_200MA
R2803 *LAN@4.7K_4
+3V_S5
C2821 *LAN@0.01U/25V_4X
R2808 LAN@3.01K/F_4
High core voltage(default=1)
1
Low core voltage
0
Switch mode regulator (SWR) select
1
Linear regulator (LDO) select
0
25 MHz external clock input
1
48 MHz external clock input
0
+LAN_VDD33
R2817 LAN@10K_4
3
1206 add for LAN CKRFQ
PullUP10Kto+3V_S5inFCH
PCIE_WAKE# [7,30]
R2807
2
LAN@4.7K_4
Q2800
LAN@LTC044EUBFS8TL_30MA
13
CKREQ_G#
Power on Strapping pin
LAN_ACTLED
R2813 *LAN@5.1K/F_6
LAN_LINKLED#
R2815 LAN@5.1K/F_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
PROJECT :
ATHEROS LAN (AR8152B)
ATHEROS LAN (AR8152B)
ATHEROS LAN (AR8152B)
1
Richland
Richland
Richland
28
LAN_P [35]
28 47
28 47
28 47
1A
1A
1A
of
For Internal Check Only
5
Codec (CX20756-11Z)
<ADO> <EMI>
4
3
2
1
29
D D
R2900 0_6
+3V
R2903 0_6
C C
Low Active
R2915 33_4 R2916 *10K_4
DMIC_DATA[32]
DMIC_CLK[32]
C2923 0.1U/16V_4Y
ACZ_RST#[7]
ACZ_BITCLK[7] ACZ_SYNC[7] ACZ_SDIN0[7]
ACZ_SDOUT[7]
AMP_MUTE#[35]
PCBEEP[7]
B B
1.2mA(20mils)
C2904
4.7U/6.3V_6X
C2910 *10U/6.3V_8X
48.7mA(20mils)
C2914
C2915
*10U/6.3V_8X
0.1U/16V_4Y
R2911 0_4 R2910 33_4
AMP_MUTE#
PCBEEP_R PCBEEP_C
1019 FAE suggest change to 33ohm
C2936 *0.47U/6.3V_4X
ACZ_BITCLK_R SDATA_IN
C2929 0.1U/16V_4Y
R2917 33_4
Place close to audio codec.
DMIC
DMIC_DATA
C2937
*0.47U/6.3V_4X
ADOGND ADOGND
C2906
C2905
0.1U/16V_4Y
0.1U/16V_4Y
Near chip
C2911
0.1U/16V_4Y
Determining HDA use +1.5V/+3V
Output
C2916
4.7U/6.3V_6X
DMIC_DATA DMIC
TP2903 TP2904
Output
C2901
C2900
0.1U/16V_4Y
1U/10V_6Y
+3AVDD
+3AVDD_S5
+3AVDD
FILT_1.8V
C2917
0.1U/16V_4Y
3
U2900
9
RESET#
FILT_1.8V
5
BIT_CLK
8
SYNC
6
SDATA_IN
4
SDATA_OUT
39
SPKR_MUTE#
10
PCBEEP
1
DMIC_DAT/GPIO1
40
DMIC_CLK/MUSIC_REQ/GPIO0
37
GPIO1/PORTC_R_MIC
36
MUSIC_REQ/GPIO0/PORTC_L_MIC
2
For EMI
ACZ_BITCLK
C2946 *10P/50V_4C
A A
ACZ_SDOUT
C2947 *10P/50V_4C
ACZ_RST#
C2948 *10P/50V_4C
FILT_1.65V
18
7
VDD_IO
VDDO33
LEFT+
12
24
DVDD33
AVDD_HP
CX20756-11Z
LEFT-14RIGHT-
29
15
FILT_1.65V
Output
27
AVDD_3.3V
RIGHT+
17
AVDD_3.3
28
AVDD_5V
PORTB_R_LINE PORTB_L_LINE
PORTD_B_MIC PORTD_A_MIC
13
16
LPWR_5.0
MICBIASC MICBIASB
PORTA_R PORTA_L
RPWR_5.0
JSENSE
+5AVDD
11
CLASS-D_REF
HGNDB HGNDA
AVEE FLY_N FLY_P
EP_GND
41
<ADO> <EMC>
C2902
C2903
4.7U/6.3V_6X
0.1U/16V_4Y
1A(100mils)0.061mA(15mils)
C2912 *10U/6.3V_8X
(40mils)
CLASSD_5V
C2918
C2920
0.1U/16V_4Y
0.1U/16V_4Y
38
SENSE_A
35
TP2900
34
MIC1-VREFO_B MIC1-VREFO
33
MIC1-RR MIC1_R1
32 26
25 31
TP2901
30
TP2902 C2928
23 22
21
AVEE
20
FLY_N
19
FLY_P
C2931 1U/10V_6Y
C2934 0.1U/16V_4Y C2935 0.1U/16V_4Y C2938 *0.1U/16V_4Y C2941 *0.1U/16V_4Y
ADOGND
SPK_R+ SPK_R­SPK_L­SPK_L+
L2902 TI160808U300_1A
C2913
0.1U/16V_4Y
Layout Note: Path from +5V_IC to LPWR_5.0 and RPWR_5.0 must be very low resistance ( <0.01 ohms).
Place bypass caps very close to device.
C2919
0.1U/16V_4Y
R2913 0_4
C2925 2.2U/10V_6X C2926 2.2U/10V_6X
ADOGND
C2922
C2921
10U/6.3V_8X
10U/6.3V_8X
MIC1_L1MIC1-LL
1026 change for EOD
HPOUT-R HPOUT-L
C2932
C2933
0.1U/16V_4Y
4.7U/6.3V_6X
+5V+3V_S5
R2904 0_4
SENSE_A_R
R2905
5.11K/F_4
R2908 39.2K/F_4 R2909 20K/F_4
MIC1-LL MIC1-RR
SENSE PIN A
C2939 *0.47U/6.3V_4X
+3AVDD
Port_A# Port_B#
C2940
*0.47U/6.3V_4X
HP
HPOUT-L HPOUT-L3
R2901 5.1/F_6
R2902 5.1/F_6
External MIC
MIC1_L1 MIC1_L3
HPOUT-L2
HPOUT-R2
D2901 *VPORT 0603 220K-V05
D2902 *VPORT 0603 220K-V05
<ADO> <EMC>
MIC1-VREFO
R2906
3.3K/F_4
R2912 100/F_6
R2914 100/F_6
MIC1_L2
MIC1_R2
2 1
D2903 *VPORT 0603 220K-V05
2 1
D2905 *VPORT 0603 220K-V05
Internal Speaker
<ADO> <EMC>
BOARD_ID11[9] BOARD_ID6[9]
INSPKL-N INSPKL+N INSPKR-N INSPKR+N
D2906
VPORT 0603 220K-V05
L2900 HCB1608KF-121T20_2A
L2901 HCB1608KF-121T20_2A
C2907 *100P/50V_4N
HPOUT-L3
HPOUT-R3
C2924
R2907
*4.7U/6.3V_6X
3.3K/F_4
ADOGND
L2903 HCB1608KF-121T20_2A
L2904 HCB1608KF-121T20_2A
C2927
100P/50V_4N
MIC1_L3
MIC1_R3
R2918 PBY160808T-501Y-N_1.2A R2919 PBY160808T-501Y-N_1.2A R2920 PBY160808T-501Y-N_1.2A R2921 PBY160808T-501Y-N_1.2A
Close to CN2902
C2942 E@2200P/50V_4X
INSPKL+N INSPKL-NINSPKR-NINSPKR+N
D2907
VPORT 0603 220K-V05
C2908 *100P/50V_4N
100P/50V_4N
HPOUT-R3HPOUT-R
Port_A#
C2909 *0.1U/25V_6X
MIC1_R3MIC1_R1
Port_B#
C2930 *0.1U/25V_6X
C3A change connector to 8pin
INSPKR+NSPK_R+ INSPKR-NSPK_R­INSPKL-NSPK_L­INSPKL+NSPK_L+
C2944
C2943
E@2200P/50V_4X
E@2200P/50V_4X
D2908
VPORT 0603 220K-V05
C3A change Phone Jack
1
CN2900
2 6
7 8
3
9 4 5
2SJ3013-018311F
Normal Open Jack
ADOGND
Port_A#
D2900
*VPORT 0603 220K-V05
C3A change Phone Jack
1
CN2901
2 6
7
8 3
9 4 5
2SJ3013-018311F
Normal Open Jack
ADOGND
Port_B#
CN2902
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
88266-080L
1005 Update FP
C2945 E@2200P/50V_4X
D2909
VPORT 0603 220K-V05
D2904 *VPORT 0603 220K-V05
5
4
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Saturday, January 26, 2013
Saturday, January 26, 2013
2
Saturday, January 26, 2013
PROJECT :
AUDIO CODEC (CX20756-11Z)
AUDIO CODEC (CX20756-11Z)
AUDIO CODEC (CX20756-11Z)
1
Richland
Richland
Richland
29 47
29 47
29 47
1A
1A
1A
of
For Internal Check Only
5
4
3
2
1
MINI Card Slot#1 (WiFi)
D D
C C
B B
<MNW>
FCHIntegratedPU8.2Kto+3V
FCH_PCIE_WLAN_CLKREQ#[7]
PLTRST#[8,27,31,35]
PCLK_DEBUG[8]
PCIE_TXP_WLAN[3] PCIE_TXN_WLAN[3]
PCIE_RXP_WLAN[3] PCIE_RXN_WLAN[3]
+WIMAX_P
R3006
2
*IOIC@10K_4
1
Q3000 *IOIC@ME2N7002E_200MA
R3014 0_4
PCIE_WAKE#[7,28]
PLTRST# PLTRST#_debug
3
+3V +WIMAX_P
+3V_S5
*IOIC@0.01U/25V_4X
BT_RFCTRL_BT
R3000 NMP@0_4 R3001 NMP@0_4
CLK_PCIE_WLANP[8] CLK_PCIE_WLANN[8]
CLKREQ# BT_RFCTRL_BT_1
R3010 *0_4
R3012 0_8
R3013 0_8
C3010
R3018 0_4
PCLK__debug_R
R3008 *0_4
WLAN_WAKE#
3
1
Q3003 *IOIC@ME1303_3A
2
*IOIC@0.01U/25V_4X
Before RAMP must to remove debug card component
C3000 E@0.01U/25V_4X
CN3000
51
NC
49
C-Link_RST
47
C-Link_DAT
45
C-Link_CLK
43
GND
41
NC
39
NC
37
GND
35
GND
33
PETp0
31
PETn0
29
GND
27
GND
25
PERp0
23
PERn0
21
GND
19
NC
17
NC
15
GND
13
REFCLK+
11
REFCLK-
9
GND
7
CLKREQ#
5
BT_CHCLK
3
BT_DATA
1
WAKE#
AAA-PCI-052-P01
C3001 E@0.1U/16V_4Y
LED_WPAN# LED_WLAN#
SMB_DATA
W_DISABLE#
+3.3V +1.5V
USB_D+ USB_D-
SMB_CLK
+1.5V
+3.3Vaux
PERST#
+1.5V +3.3V
GND
GND
GND
GND
GND
1018 change to 7H
C3011
R3016 *IOIC@3.01K/F_4
+1.5V +WIMAX_P
C3002 *10U/6.3V_8X
52 50 48 46 44 42
NC
40
NC
38 36 34 32 30 28 26 24 22 20 18
16
NC
14
NC
12
NC
10
NC
8
NC
6 4 2
+3V_S5
R3015 *IOIC@4.7K_4
Q3004
2
*IOIC@LTC044EUBFS8TL_30MA
1 3
C3003 E@0.1U/16V_4Y
WLAN_P [35]
C3004
0.1U/16V_4Y
USBP7+ USBP7-
WLCGDAT_SMB WLCGCLK_SMB
RF_EN
LFRAME#_PCIE LAD3_PCIE LAD2_PCIE LAD1_PCIE LAD0_PCIE
C3005 *C@0.1U/16V_4Y
241
RN3000 NMP@0X2
241
RN3001 NMP@0X2 R3007 NMP@0_4
C3006 *C@0.1U/16V_4Y
R3003 *300_4
C3009 *150P/50V_4N
3 3
BT_RFCTRL[35]
BT_RFCTRL_1[35]
C3007 *C@10U/6.3V_8X
USBP7+ [7]
C3008 *15P/50V_4C
APU_PCIE_RST# [8,24,28]
RF_EN [35]
LFRAME# [8,35] LAD3 [8,35] LAD2 [8,35] LAD1 [8,35] LAD0 [8,35]
1 3
Q3002 LTC044EUBFS8TL_30MA
1 3
Q3005 *LTC044EUBFS8TL_30MA
USBP7- [7]
+WIMAX_P
2
+WIMAX_P
2
B2A reserve for blue tooth issue
SMB_LAN_CLK[7,26,34]
SMB_LAN_DAT[7,26,34]
R3011 10K_4
R3017 *10K_4
SMBus(WLAN)
R3002 *0_4
Q3001B 2N7002KDW_115MA
3 4
5
2
6
Q3001A 2N7002KDW_115MA
R3009 *0_4
BT_RFCTRL_BT
BT_RFCTRL_BT_1
WLCGCLK_SMB
R3004
4.7K_4
+WIMAX_P
R3005
4.7K_4
1
WLCGDAT_SMB
30
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
MINI CARD
MINI CARD
MINI CARD
1
Richland
Richland
Richland
30 47
30 47
30 47
1A
1A
1A
of
For Internal Check Only
5
4
3
2
1
+5VPCU
D D
2 IN 1 CARD READER (Type: MS/SD)
BATERRY
1
LED3101 12-12Z/S2ST3D-C31/2C(QN)
D3A : LED luminance to light,1K-ohm change 2.2K-ohm.
2
-BATLED0
R3101 2.2K_4
3
-BATLED1
R3103 1.2K/F_4
-BATLED0
-BATLED1
1
3
2
D3101 *PJMBZ5V6
BAT_SAT0# [35]
BAT_SAT1# [35]
<MMC>
Card Reader (GL834L QFN24-3.3V)
C C
+3V_CARD
SD_GPIO0
+3V_CARD
SD_DETECT#
PLTRST#
22
21
23
19
20
RSTZ
PMOS
GPIO0
DVDD33
SD_CDZ
SB17SB38SB49SB510MS_BS11SB8
12
SD_WP
C3106
0.1U/16V_4Y
DVDD33
VDD18
SD_CMD
SD_CLK
GL834L-OGY03
SD_DATA1
SB13 SB12
SB9
C3102
4.7U/6.3V_6X
FAE suggestion near PIN 24 9/20
+3V_CARD
B B
+3V_CARD
C3108
4.7U/6.3V_6X
R3113 0_8
C3109
0.1U/16V_4Y
C3111
2.2U/10V_6X
C3112
0.1U/16V_4Y
USBP5-_R USBP5+_R
1026 change for EOD
U3100
1 2 3 4 5 6
DVDD33 DM DP AVDD33 MS_INS SB0
25
G1
VCC_SD
24
GL834L QFN24-3.3V
C3A for EMI
RP3100 0X2
2
1
4
3
Close to U3100
L3100
1
2
1
2
3
443
*MCM2012B900GBE
USBP5+_R USBP5-_R
USBP5+_R USBP5-_R
4
R3117 *300_4
USBP5+ USBP5-
USBP5+ USBP5-
USBP5+[7]
USBP5-[7]
A A
C3114 *15P/50V_4C
5
LED
18 17 16 15 14 13
PLTRST#[8,27,30,35]
+5VPCU
0.1U/16V_4YC3107
POWER
+1.8V_CARD SD_DATA2 SD_DATA3 SD_CMD SD_CLK SD_DATA0
D3A : LED luminance to light,1K-ohm change 2.2K-ohm.
C3110 1U/6.3V_4X
2
3
PLTRST#
C3115
0.1U/16V_4Y
SUSLED
C3100
4.7U/6.3V_6X
1
LED3100 12-11Z/T3D-CP2Q2B12Y/2C(QN)
+3V_CARD
3
1015 Del PWRLED
R3104 1.2K/F_4
SUSLED
R3105 0_8
C3101
0.1U/10V_4X
SB0:SD_D7/MS_CLK SB1:SD_D6/MS_D3 SB3:SD_D5/MS_D2 SB4:SD_D4/MS_D0 SB5:SD_WP/MS_D1 SB8:SD_D1/MS_D7 SB9:SD_D0/MS_D6 SB12:SD_D3/MS_D4 SB13:SD_D2/MS_D5
R3115 *1K_4
R3118 *100K_4
1
2
SUSLED_EC#
3
D3100 *PJMBZ5V6
+3V+3V_CARD
RF LED
SUSLED_EC# [35]
VCC_SD
SD_CLK SD_CLK_R
1120 for card reader driver issue
SD_GPIO0
R3116 NC 10K Normal Mode
800mA 40mils
C3103
C3104 *0.1U/16V_4Y
C3105 *0.1U/16V_4Y
2
0.1U/16V_4Y
Close to connector
R3111 BLM15BD121SN1D_300MA
R3116 *10K_4
Power Saving Mode (default)
SD_WP
SD_DATA2 SD_DATA2_R SD_DATA1 SD_DATA1_R SD_DATA0 SD_DATA0_R
SD_CMD SD_CMD_R SD_DATA3 SD_DATA3_R
C3113 close to CN3100
SD_CLK_R
3
1 2
LED3102 12-21/S2C-AQ2R2B/2C
RF_LED_R
R3102 1.2K/F_4
RF_LED_R
1
3
2
D3102 *PJMBZ5V6
C3A for EMI
SD_DATA0_R SD_DATA1_R SD_DATA2_R SD_DATA3_R SD_CLK_R
R3106 33_4
VCC_SD
R3107 E@0_4
R3108 E@0_4 R3110 E@0_4 R3109 E@0_4
R3112 E@0_4 R3114 E@0_4
C3113 *33P/50V_4N
SD_WP_R
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
+5V
RF_LED# [35]
C3116 *E@12P/50V_4C C3117 *E@12P/50V_4C C3118 *E@12P/50V_4C C3119 *E@12P/50V_4C C3120 *E@4.7P/50V_4C
SD_DETECT#_RSD_DETECT#
CN3100
10
W/P(GND)
9
DATA2
8
DATA1
7
DATA0
6
VSS2
5
CLK
3
VSS1
2
CMD
1
DATA3
CARD READER/LED
CARD READER/LED
CARD READER/LED
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
31
1029 update CONN
11
12
4
PSDBT0-09GLBS1N14H1
WP
C/D
VDD
16
GND4
15
GND3
GND113GND2
14
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Richland
Richland
Richland
of
31 47
31 47
1
31 47
1A
1A
1A
For Internal Check Only
[CCD]
CCD
USBP6+_LCD USBP6-_LCD
D D
+3V
R3200 Hudson@300_4
0924 Bolton without R+C
12
F3200 SMD1206P110TFT
R3205 *0_8
1015 Exchange
LCD Panel Module
C C
LCD_EDIDDATA
LCD_EDIDCLK
B B
[CRT]
CRT
FCH_CRT_RED[9]
FCH_CRT_GRE[9]
FCH_CRT_BLU[9]
FCH_CRT_HSYNC[9] FCH_CRT_VSYNC[9]
FCH_DDCDAT[9] FCH_DDCCLK[9]
A A
5
C3215 *4.7P/50V_4C C3216 *4.7P/50V_4C
[LDS]
+VIN
LVDS Enable
APU_VARY_BL_Q[26] TRAVIS_VARY_BL[26]
C3211 E@2200P/50V_4X
C3212 E@2200P/50V_4X
5
USBP6+_LCD [7] USBP6-_LCD [7]
C3200 Hudson@15P/50V_4C
CCD_POWER
+
C3204 10U/6.3V_8X
USBP6+_LCD USBP6-_LCD
R3209 0_8
R3210 4.7K_4
+3V
R3211 4.7K_4
LCD_BK_POWER
C3205 1000P/50V_4X
R3212 eDP@0_4 R3213 LDS@0_4
C3208 0.1U/10V_4X
FCH_CRT_RED
FCH_CRT_GRE
FCH_CRT_BLU
FCH_CRT_HSYNC FCH_CRT_VSYNC
FCH_DDCDAT FCH_DDCCLK
C3206
0.1U/25V_6X
LCD_EDIDCLK LCD_EDIDDATA
LVDS_VADJ
+3VPCU +3VPCU
C3213
0.1U/10V_4X
C3214
0.1U/10V_4X
LCD POWER SWITCH
FCH_CRT_RED
FCH_CRT_GRE
4
1017 3D eDP panel VDD=5V
APU_DIGON[5]
PANEL_VCC_R[26]
R3214
R3215 CRT@150/F_4
CRT@150/F_4
4
3
<LDS> <HSR>
+5V
+3V
C3201 eDP@1U/10V_6X
R3226 eDP@0_1206
R3225 LDS@0_1206
C3221
R3216
CRT@6.8P/50V_4N
CRT@150/F_4
2A
R3202 eDP@0_1206
R3206 100K_4
INT_LCD_TXLOUT0-[26]
INT_LCD_TXLOUT0+[26]
INT_LCD_TXLOUT1-[26]
INT_LCD_TXLOUT1+[26]
INT_LCD_TXLOUT2-[26]
INT_LCD_TXLOUT2+[26]
INT_LCD_TXLCLKOUT-[26]
INT_LCD_TXLCLKOUT+[26]
INT_LCD_TXUOUT0-[26]
INT_LCD_TXUOUT0+[26]
INT_LVDS_TXN0_R[26] INT_LVDS_TXP0_R[26] INT_LVDS_TXN1_R[26] INT_LVDS_TXP1_R[26] INT_LVDS_TXN2[5] INT_LVDS_TXP2[5] INT_LVDS_TXN3[5] INT_LVDS_TXP3[5] INT_LVDS_AUXN_R[26]
INT_LVDS_AUXP_R[26]
L3202 CRT@BLM18BA470SN1D_300MA L3203 CRT@BLM18BA470SN1D_300MA L3204 CRT@BLM18BA470SN1D_300MA
C3223
C3222
CRT@6.8P/50V_4N
CRT@6.8P/50V_4N
C3230 CRT@0.1U/25V_6X
R3227 LDS@0_1206
U3200
6
IN
4
IN
3
ON/OFF
AP2821KTR-G1
C3234 LDS@1U/10V_6X
+3V+5V
C3231 CRT@0.1U/25V_6X
C3224 CRT@6.8P/50V_4N
LCDVCC
1
OUT
2
GND GND
C3203
5
0.1U/16V_4Y
Close to CN3200
RP3203 LDS@0X2
241
RP3201 LDS@0X2
241
RP3204 LDS@0X2
241
RP3202 LDS@0X2
241
RP3210 LDS@0X2
241
RP3205 eDP@0X2
241
RP3206 eDP@0X2
241
RP3207 eDP@0X2
241
RP3208 eDP@0X2
241
RP3209 eDP@0X2
241
C3225
C3226 CRT@6.8P/50V_4N
CRT@6.8P/50V_4N
+5V
+3V
3 3 3 3 3
3 3 3 3 3
CRT_RED_L
CRT_GRE_L
CRT_BLU_LFCH_CRT_BLU
3
LCD_TXLOUT0­LCD_TXLOUT0+ LCD_TXLOUT1­LCD_TXLOUT1+ LCD_TXLOUT2­LCD_TXLOUT2+ LCD_TXLCLKOUT­LCD_TXLCLKOUT+ LCD_TXUOUT0­LCD_TXUOUT0+
+5V
C3219 CRT@0.1U/16V_4Y
+3V
C3228 CRT@0.22U/10V_4X
+3V
C3220 CRT@0.1U/16V_4Y
R3217 CRT@4.7K_4
R3218 CRT@4.7K_4
1
5V_CRT2
7 8
2
3
CRT_RED_L
4
CRT_GRE_L
5
CRT_BLU_L
6
INT_LVDS_HPD[5,26]
+5V
FCH_DDCDAT
FCH_DDCCLK
U3201
VCC_SYNC VCC_DDC
BYP VCC_VIDEO
VIDEO_1 VIDEO_2 VIDEO_3
GND
CRT@IP4772CZ16
SYNC_OUT2 SYNC_OUT1
2
HALL SENSOR&BACK LIGHT SWITCH
+3V
C3207 *47P/50V_4N
DMIC_DATA[29] DMIC_CLK[29]
INT_LCD_EDIDCLK[26]
INT_LCD_EDIDDATA[26]
INT_LCD_TXUOUT1-[26]
INT_LCD_TXUOUT1+[26]
INT_LCD_TXUOUT2-[26]
INT_LCD_TXUOUT2+[26]
INT_LCD_TXUCLKOUT-[26]
INT_LCD_TXUCLKOUT+[26]
2 1
D3201 CRT@SS14L_1A
16
VSYNC1 CRTVSYNC
14
HSYNC1
15
FCH_CRT_VSYNC 5V_CRT2
SYNC_IN2
13
FCH_CRT_HSYNC
SYNC_IN1
10
FCH_DDCCLK
DDC_IN1
11
FCH_DDCDAT
DDC_IN2
9
CRTDCLK
DDC_OUT1
12
CRTDDAT
DDC_OUT2
2
R3201 100K_4
+3VPCU
1
C3202
0.1U/10V_4X
DISPON
D3200 LCP0G050M0R2R
R3224 eDP@0_4 R3223 LDS@0_4
C3210 22P/50V_4N L3200 FCM1005KF-221T03_300MA L3201 FCM1005KF-221T03_300MA C3217 22P/50V_4N
RP3200 LDS@0X2
RP3211 LDS@0X2
RP3212 LDS@0X2
RP3213 LDS@0X2
Close to CN3200
12
F3201 CRT@SMD1206P110TFT
3
R3207 100K_4
R3219 CRT@39/F_4 R3220 CRT@39/F_4
2
LID591#
MR3200 APX9132H AI-TRG
R3208 1.2K/F_4
LCDVCC
241
241
241
241
CRT_RED_L
CRT_GRE_L
CRT_BLU_L
R3221 CRT@2.7K_4
LID591# [35]
R3203 LDS@0_4 R3204 eDP@0_4
C3209 *10U/6.3V_4X
3
3
3
3
C3218 CRT@0.1U/16V_4Y
5V_CRT2
R3222 CRT@2.7K_4
C3232 CRT@10P/50V_4C
1
32
TRAVIS_BL_EN [26]DISPON_I[35] APU_BL_EN [5]
EC_FPBACK# [35]
B2A change connector
LCD_BK_POWER
LCDVCC
CCD_POWER
DMIC_DATA_R DMIC_CLK_R
LVDS_VADJ DISPON LCD_EDIDCLK LCD_EDIDDATA USBP6-_LCD USBP6+_LCD
LCD_TXLOUT0­LCD_TXLOUT0+
LCD_TXLOUT1­LCD_TXLOUT1+
LCD_TXLOUT2­LCD_TXLOUT2+
LCD_TXLCLKOUT­LCD_TXLCLKOUT+
LCD_TXUOUT0­LCD_TXUOUT0+
LCD_TXUOUT1­LCD_TXUOUT1+
LCD_TXUOUT2­LCD_TXUOUT2+
LCD_TXUCLKOUT­LCD_TXUCLKOUT+
1617
6 7
2 8 3 9 4
10
5
C3227 CRT@10P/50V_4C
C3233 CRT@10P/50V_4C
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
CN3200
G_1
1 2 3 4 5 6 7 8 9 10
G_2 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
G_3
31 32 33 34 35 36 37 38 39 40
G_4
7300L40-000000-G4
111 12
CRTDDAT
13
CRTHSYNC
14
CRTVSYNC
15
CRTDCLK
CN3201 CRT@10256-00011
1020 Update CRT CONN
1121 Change PT & PN
CRTHSYNC
C3229 CRT@10P/50V_4C
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LVDS/CCD/DRT
LVDS/CCD/DRT
LVDS/CCD/DRT
1
Richland
Richland
Richland
32 47
32 47
32 47
of
1A
1A
1A
For Internal Check Only
5
4
3
2
1
<OZP>ODD Zero power
L3300 NZRP@HCB1608KF-121T30_3A
3
Q3301
2
ZRP@ME1303_3A
C3303 *ZRP@0.01U/25V_4X R3302 ZRP@3.01K/F_4
+5V_ODD
+5V_ODD
R3303 ZRP@22_8
3
2
Q3303
1
ZRP@ME2N7002E_200MA
+5V
ZRP@4.7K_4
2
Q3302
1 3
ZRP@LTC044EUBFS8TL_30MA
FCH_ODD_EN [7]
SATA
[HDD]
HDD
CN3301
23
GND23
7
GND1
6
SATA_TXP0_C
RXP
5
SATA_TXN0_C
RXN
4
GND2
3
SATA_RXN0_C
TXN
2
SATA_RXP0_C
TXP
1
GND3
22
3.3V
21
3.3V
20
3.3V
19
GND
18
GND
17
GND
16
5V
15
5V
14
5V
13
GND
12
RSVD
11
GND
10
12V
9
12V
8
12V
24
GND24
6030H-22G05
1018 update HDD CONN 1115 update HDD pin define
+5V_HDD1
C3314
0.1U/16V_4Y
C3302 0.01U/25V_4X C3307 0.01U/25V_4XR3301
C3308 0.01U/25V_4X C3309 0.01U/25V_4X
C3316
C3315
10U/6.3V_8X
0.1U/16V_4Y
SATA_TXP0 [9] SATA_TXN0 [9]
SATA_RXN0 [9] SATA_RXP0 [9]
+
C3317 *100U/6.3V_3528P_E45b
R3304 0_8
33
+5V
14 1
2 3 4 5 6 7
8 9 10 11 12 13
15
[ODD]
SATA_TXP1_C SATA_TXN1_C
SATA_RXN1_C SATA_RXP1_C
R3306 NZRP@1K/F_4
ODD_DP
R3305 ZRP@0_4
ODD_MD#_Q
1121 update FP
ODD_MD#_Q
C3300 0.01U/25V_4X C3305 0.01U/25V_4X
C3301 0.01U/25V_4X C3304 0.01U/25V_4X C3306
ODD_PRSNT#
+5V_ODD
+3V
R3300 ZRP@10K_4
2
1
Q3300 ZRP@ME2N7002E_200MA
3
SATA_TXP1 [9] SATA_TXN1 [9]
SATA_RXN1 [9] SATA_RXP1 [9]
ODD_PRSNT# [7]
C3310
0.1U/10V_4X
C3311
0.1U/10V_4X
ODD_MD# [7]
C3312 10U/6.3V_6X
+5V_ODD
+
C3313 *100U/6.3V_3528P_E45b
3D-u-micro P<GSR>
+5V
1
ZRP@0.01U/25V_4X
<GSR>3D-LDO Power
SATA ODD
CN3300
D D
GND14
GND1
RXP RXN
GND2
TXN TXP
GND3
DP +5V +5V
RSVD
GND GND
GND15
10300-00001
1020 update CONN
C C
B B
3D-SMBus
A A
<GSR>
3D-Sensor IC
5
4
<GSR>
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
3
2
Date: Sheet of
PROJECT :
HDD/ODD
HDD/ODD
HDD/ODD
1
Richland
Richland
Richland
33 47
33 47
33 47
1A
1A
1A
of
For Internal Check Only
5
4
3
2
1
KEY BOARD Connector
INT KeyBoard
D D
C C
C3400 ESD@39P/50V_4N C3402 ESD@39P/50V_4N C3405 ESD@39P/50V_4N C3401 ESD@39P/50V_4N
C3410 ESD@39P/50V_4N C3411 ESD@39P/50V_4N C3412 ESD@39P/50V_4N C3413 ESD@39P/50V_4N
C3414 ESD@39P/50V_4N C3415 ESD@39P/50V_4N C3416 ESD@39P/50V_4N C3417 ESD@39P/50V_4N
C3418 ESD@39P/50V_4N C3419 ESD@39P/50V_4N C3420 ESD@39P/50V_4N C3421 ESD@39P/50V_4N
C3422 ESD@39P/50V_4N C3423 ESD@39P/50V_4N C3424 ESD@39P/50V_4N C3425 ESD@39P/50V_4N
C3426 ESD@39P/50V_4N C3427 ESD@39P/50V_4N
ESD Issue
K_LED_P
CAPSLED
C3429 220P/50V_4X
KEY BOARD LED
<KBP> <EMI>
B B
C3430 220P/50V_4X
+3V
MX7 MX2 MX3 MX4
MX0 MX5 MX6 MX1
MY7 MY13 MY12 MY15
MY3 MY5 MY14 MY6
MY2 MY1 MY0 MY4
MY16 MY17
NUMLED
R3400 150_4
BOARD_ID7[9]
1010 Reservve
KB_LED[35]
<KBC> <EMI>
C3453 220P/50V_4X
K_LED_P
0.35A(20mils)
+5V
CN3400
36
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
35
91504-340N
1121 Change PN
MX1 MX2 MX6 MX5 MX4 MX0
For EMI
C3451 *E@0.1U/10V_4X
R3408 *Metal@0_4
R3404 Metal@300_4
*Metal@1U/6.3V_4X
K_LED_P
MY16 MY17
MY2 MY1 MY0 MY4 MY3 MY5 MY14 MY6 MY7 MY13 MY8 MY9 MY10 MY11 MY12 MY15 MX7 MX2 MX3 MX4 MX0 MX5 MX6
MX1 K_LED_P CAPSLED
NUMLED
+3VPCU
10
RP3400
9 8 7 4
MY16 [35] MY17 [35]
MY2 [35] MY1 [35] MY0 [35] MY4 [35] MY3 [35] MY5 [35] MY14 [35] MY6 [35] MY7 [35] MY13 [35] MY8 [35] MY9 [35] MY10 [35] MY11 [35] MY12 [35] MY15 [35] MX7 [35] MX2 [35] MX3 [35] MX4 [35] MX0 [35] MX5 [35] MX6 [35] MX1 [35]
CAPSLED [35] NUMLED [35]
1
10KX8
2 3
56
MX7 MX3
B2A change keyboard BL connector
CN3404
1 2 3
6
4 5
Metal@88513-0401
2
Q3401 Metal@MMBT2222A_600MA
C3452
1 3
C3A change keyboard BL connector
EMI PAD
+VIN +VIN +VIN +VIN +VIN +VIN +VIN +VIN
<EMI>
C3442 E@0.1U/25V_4X
B2A add for EMI
C3443 E@0.1U/25V_4X
C3444 E@0.1U/25V_4X
C3445 E@1U/25V_6X
C3446 E@0.1U/25V_6X
C3447 E@0.1U/25V_6X
C3448 *E@10U/6.3V_8X
C3449 *E@10U/6.3V_8X
TOUCH PAD BOARD
1101 BOM option
R3405 NTEX@0_4
+3V
R3406 TEX@0_4
+5V
Power Board (UIF)
NBSWON#[35]
PWRLED[35]
ME2N7002E_200MA
1113 add Q3402 for power board LED
HOLE
<OTH>
<PSW>
B2A change power domain
NBSWON# PWRLED#
3
Q3402
2
1
HOLE1
67 5
8
4
9
123
*HG-C315D118P2
HOLE7
67 5
8
4
9
123
*HG-C315D118P2
HOLE12
+TP_PWR
C3403
4.7U/6.3V_6X
R3407 0_4
1008 Reserve for ESD
D3400 ESD@LCP0G050M0R2R
8 9
123
8 9
123
<TPD> <EMI>
TPDATA[35]
TPCLK[35]
C3404 E@0.1U/16V_4X
1206 change value
+5V
C3428 220P/50V_4X
HOLE2
67 5 4
*HG-C315D118P2
HOLE8
67 5 4
*HG-C315D118P2
HOLE13
5
1 2 3 4
6
8 9
123
8 9
123
C3406 *10P/50V_4C
CN3403
5
6
50503-0040N-001
HOLE3
67 5 4
*HG-C315D118P2
HOLE9
67 5 4
*HG-C315D118P2
PAD1
+TP_PWR
SMB_LAN_CLK_Q SMB_LAN_DAT_Q
C3407 *10P/50V_4C
C3409 *10P/50V_4C
TP board <TPD>
SMB_LAN_DAT[7,26,30]
SMB_LAN_CLK[7,26,30]
HOLE4
67 5
8
4
9
123
*HG-C315D118P2
C3A Change Hole10
HOLE10
1
*h-c315d315n
1017 modify Hole
PAD2
1206 change value
CN3401
6
6
5
5
4
4
3
3
2
2
1
1
50503-0060N-001
C3408 *10P/50V_4C
1010 For EMI
3 4
Q3400B 2N7002KDW_115MA
Q3400A 2N7002KDW_115MA
6
C3A Del Hole5
HOLE11
1
*H-TC236BC161D161PT
HOLE21
ID_Detect default
Metal
TEXTURE
5
2
1
HOLE6
67 5
8
4
9
123
*HG-C315D118P2
HOLE18
34
+3.3V
+5V
SMB_LAN_DAT_Q
R3409
4.7K_4
+TP_PWR
R3410
4.7K_4
SMB_LAN_CLK_Q
34
+1.5VSUS+5V +5V +5V +5V +5V +5V
C3431
A A
*0.1U/10V_4X
C3432 *0.1U/10V_4X
C3433 *0.1U/10V_4X
C3434 E@0.1U/10V_4X
C3435 *0.1U/10V_4X
C3436 *0.1U/10V_4X
C3450 E@680P/50V_4X
B2A add for EMI B2A reserve for EMI
+3V +3V +3V +3V +3V
C3437 *0.1U/10V_4X
C3438 *0.1U/10V_4X
C3439 *0.1U/10V_4X
5
C3440 E@0.1U/10V_4X
C3441 E@0.1U/10V_4X
HOLE22
1
*spad-c315np
4
R3401 *0_4 R3402 *0_4 R3403 *0_4
HOLE23
1
*spad-c315np
ADOGND
1
*H-TC236BC161D161PT
HOLE16
1
*H-C91D91N
3
1
H-TC236BC161D161PT
HOLE17
1
*H-C91D91N
C3A add PAD
1
*spad-c315np
HOLE19
1
*h-tc276bc150d150p2
1
*spad-c315np
HOLE20
1
*h-tc276bc150d150p2
2
1
*h-tc276bc150d150p2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
KBC/TP/FP CONN.
KBC/TP/FP CONN.
KBC/TP/FP CONN.
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
*INTEL-CPU-BKT2
1 2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
Richland
Richland
Richland
of
34 47
34 47
34 47
1A
1A
1A
For Internal Check Only
EC
<KBC>
5
4
3
2
1
35
+3VPCU
+A3VPCU
C3501
0.1U/10V_4X
8769AGND
46
76
88
115
102
H=1.6mm
VCC1
VCC2
VCC3
VCC4
VCC5
AVCC
A/D
D/A
LPC
GPIO
GPO82/IOX_LDSH/VD_OUT1 GPO84/IOX_SCLK/VD_OUT2
KB
TIMER
GPIO20/TA2/IOX_DIN_DIO
TIMER
SMB
IR
PS/2
FIU
GPIO55/CLKOUT/IOX_DIN_DIO
GND1
GND2
GND3
GND4
GND5
AGND
GND6
5
18
45
78
89
103
116
L3501 0_6
8769AGND
R3522 *10K_4
R3521 *10K_4 R3524 *10K_4
+3VPCU+3VPCU
SCI#_uR
SERIRQ
CLKRUN#
R3533 10K_4
SKU_STRAP_2 NBSWON#_R SKU_STRAP_3 SKU_STRAP_1
R3538 10K_4
C3510
C3509
ESD@39P/50V_4N
0.1U/10V_4X
CLKRUN#
SCI#_uR
SERIRQ
B2A change EC985 symbol
PCLK_591
R3523 *22_4
C3515 *10P/50V_4C
L3500 HCB1608KF-601T10_1A
19
U3500
3
LFRAME/GPIOF6
126
LAD0/GPIOF1
127
LAD1/GPIOF2
128
LAD2/GPIOF3
1
LAD3/GPIOF4
2
LCLK/GPIOF5
8
GPIO11/CLKRUN
121
GPIO85/GA20
122
KBRST/GPIO86
29
ECSCI/GPIO54
124
GPIO10/LPCPD
7
LREST/GPIOF7
123
GPIO67/N2TMS
125
SERIRQ/GPIOF0
9
GPIO65/SMI
54
KBSIN0/GPIOA0/N2TCK
55
KBSIN1/GPIOA1/N2TMS
56
KBSIN2/GPIOA2
57
KBSIN3/GPIOA3
58
KBSIN4/GPIOA4
59
KBSIN5/GPIOA5
60
KBSIN6/GPIOA6
61
KBSIN7/GPIOA7
53
KBSOUT0/GPIOB0/SOUT_CR/JENK
52
KBSOUT1/GPIOB1/TCK
51
KBSOUT2/GPIOB2/TMS
50
KBSOUT3/GPIOB3/TDI
49
KBSOUT4/GPIOB4/JENO
48
KBSOUT5/GPIOB5/TDO
47
KBSOUT6/GPIOB6/RDY
43
KBSOUT7/GPIOB7
42
KBSOUT8/GPIOC0
41
KBSOUT9/GPIOC1/SDP_VIS
40
KBSOUT10&P80_CLK/GPIOC2
39
KBSOUT11&P80_DAT/GPIOC3
38
KBSOUT12/GPO64/TEST
37
KBSOUT13/GPIO63/TRIST
36
KBSOUT14/GPIO62/XORTR
35
KBSOUT15/GPIO61/XOR_OUT
34
GPIO60/KBSOUT16
33
GPIO57/KBSOUT17
70
GPIO17/SCL1/N2TCK
69
GPIO22/SDA1/N2TMS
67
GPIO73/SCL2/N2TCK
68
GPIO74/SDA2/N2TMS
119
GPIO23/SCL3/N2TCK
120
GPIO31/SDA3/N2TMS
72
GPIO37/PSCLK1
71
GPIO35/PSDAT1
10
GPIO26/PSCLK2
11
GPIO27PSDAT2
77
GPIO00/EXTCLK/F_SDIO3
12
VTT
13
PECI
NPCE985LA0DX
+3V_S5
+3V
SKU STRAPPING: Pull H SKU_STRAP_3 For Disctete Pull L SKU_STRAP_3 For UMA Pull SKU_STRAP_1=Lo&SKU_STRAP_2=Hi For 14"
SKU strap pin
R3532 DIS@10K_4
R3537 UMA@10K_4
R3500
AC SET_EC
2.2_6
C3500 10U/6.3V_6X
8769AGND
C3505
0.1U/10V_4X
Battery
APU, G-Sensor
GPU, CEC, LDS
C3513 *10U/6.3V_8X
C3506
0.1U/10V_4X
ICMNT
USB_NORMAL_EN#[25]
USB_NORMAL_OC#[7,25]
8769AGND
C3507
0.1U/10V_4X
PCLK_591[8]
CLKRUN#[8] EC_A20GATE[7] EC_KBRST#[7]
EC_EXT_SCI#[7]
2ND_MBCLK[5,25]
2ND_MBDATA[5,25]
3ND_MBCLK[15,26]
3ND_MBDATA[15,26]
PE_PWRGD[8,44]
USB_SC_EN#[25]
RTC_CLK[8,11]
C3514 *10U/6.3V_8X
C3508
0.1U/10V_4X
LFRAME#[8,30]
LAD0[8,30] LAD1[8,30] LAD2[8,30] LAD3[8,30]
LPCPD#[7]
PLTRST#[8,27,30,31]
SERIRQ[8]
MX0[34] MX1[34] MX2[34] MX3[34] MX4[34] MX5[34] MX6[34] MX7[34]
MY0[34] MY1[34] MY2[34] MY3[34] MY4[34] MY5[34] MY6[34] MY7[34] MY8[34]
MY9[34] MY10[34] MY11[34] MY12[34] MY13[34] MY14[34] MY15[34] MY16[34] MY17[34]
MBCLK[7,36]
MBDATA[7,36]
2ND_MBCLK 2ND_MBDATA 3ND_MBCLK 3ND_MBDATA
TPCLK[34]
TPDATA[34]
D D
C C
B B
SKU_STRAP_1(GPIO56) SKU_STRAP_2(GPIO02) SKU_STRAP_3(GPIO41) SKU
0
A A
0
01
0
0
0
1
0
110
1
1
0
0
0
1
Kabini UMA
Kabini DIS
Richland UMA
Richland DIS
Brazos UMA
Brazos DIS
+3V_VDD_EC
C3502
C3503
10U/6.3V_6X
0.1U/10V_4X
4
VDD
97
GPIO90/AD0
98
GPIO91/AD1
99
GPIO92/AD2
100
GPIO93/AD3
108
GPIO05/AD4
96
GPIO04/AD5
95
GPIO03/AD6
GPIO94/DA0 GPIO95/DA1 GPIO96/DA2
GPIO24
GPIO01/TB2
GPIO02/SPI_CS
GPIO16
GPIO30/F_WP
GPIO36
GPIO41/F_WP
GPIO42/TCK GPIO43/TMS
GPIO44/TDI
GPIO51/N2TCK
GPIO70 GPIO71 GPIO72
GPIO75/SPI_SCK
GPO76/SPI_MOSI
GPIO77/SPI_MISO
GPIO97/DA3
GPIO56/TA1 GPIO14/TB1
GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM GPIO32/D_PWM GPIO45/E_PWM
GPIO66/G_PWM
GPIO34
GPIO87/SIN_CR
GPIO46/TRST
GPIO83/SOUT_CR
F_SDI&F_SDIO1
F_SDIO&F_SDIO0
F_CS0
F_SCK
EST_RST
GPIO80/VD_IN1
VCORF
44
NPCE791LA0DX: AJ007910F00 (w/o CIR)
VCORF_uR
C3512 1U/10V_6X
94
101 105 106
6 64 79 93 114 109 15 80 17 20 21 24 25 26 27 28 73 74 75 82 83 84 91 110 112 107
31 117 63
32 118 62 65 22 16 81 66
14
113 23 111
86 87 90 92
30 85 104
GPIO07/AD7/VD_IN2
GPIO06/IOX_DOUT
GPO47/SCL4/N2TCK
GPIO50/PSCLK3/TDO GPIO52/PSDAT3/RDY
GPIO53/SDA4/N2TMS
GPIO81/FW_P/F_SDIO2
GPIO40/F_PWM/1_WIRE GPO33/H_PWM/VD1_EN
FCHIntegratedPU10Kto+3V_S5
FCHIntegratedPU8.2Kto+3V FCHIntegratedPU7.5Kto+3V
C3504 10U/6.3V_6X
R3502 *100K/F_4
ICMNT AC SET_EC
USB_BUS_SW4
NBSWON#_R
SKU_STRAP_2 USB_DB_EN#
PWRLED SKU_STRAP_3
H_PROCHOT_EC
USB_BUS_SW3
HWPG
MPWROK RSMRST_GATE# USB_BUS_SW2
RF_EN
DNBSWON#_uR
NUMLED
SKU_STRAP_1
RF_LED#
TP_ON_OFF
EC_Debug
SPI_SDI_uR SPI_SDO_uR SPI_CS0#_uR SPI_SCK_uR
VCC_POR#
R3501 2.2_6
R3512 0_4
R3519 4.7K_4
5
4
+3V
+3VPCU
TEMP_MBAT [36] ICMNT [36] AC SET_EC [36]
R3503 1.2K/F_4
TP3511
TP3506
LAN_P [28]
R3514 0_4 R3515 *100K/F_4 R3516 33_4 R3517 33_4 R3518 33_4
Make sure that the rise time of VCC_POR is less than 10?sec.
TP3510
Power Button
DNBSWON#_uR
USB_SC_OC# [7,25] NBSWON# [34]
SLP_S3# [7,24]
USB_DB_OC# [7,25] VFAN1 [4] WLAN_P [30]
EC_FPBACK# [32] ACIN [36]
LID591# [32] USB_DB_EN# [25] PWRLED [34]
H_PROCHOT_EC [5] AMP_MUTE# [29] ID [36] USB_BUS_SW3 [25] D/C# [36] S5_ON [37]
SLP_S5# [7] MPWROK [11] RSMRST_GATE# [7] USB_BUS_SW2 [25] RF_EN [30] BT_RFCTRL_1 [30] DNBSWON# [7]
+1.1V_EN_EC [40]
FANSIG1 [4]
RF_LED# [31] SUSLED_EC# [31] BAT_SAT0# [31] BAT_SAT1# [31] SUSON [38] MAINON [38,42]
BT_RFCTRL [30]
+3VPCU
+A3VPCU
<KBC><KBC>
C3516 *0.1U/10V_4X
SW3500 *SHORT_ PAD
D3500 *LCP0G050M0R2R
3
TP3508 TP3507
For Daughter Board USB2.0
R3511 0_4
1205 reserve for Blue tooth enable
1205 Exchange KB_LED and CAPSLED
R3513 *10K_4
+1.1V_DUAL_EN [40]
FCH_SPI_SI [9]
FCH_SPI_SO [9] FCH_SPI_CS0# [9] FCH_SPI_CLK [9]
NUMLED [34]
KB_LED [34] CAPSLED [34]
DISPON_I [32]
+3VPCU
TP interface PU
+TP_PWR
1101 add for Metal/IMR ID
LED
<LED>
PU/PD
RF_LED#
SUSLED_EC# BAT_SAT0# BAT_SAT1#
PWRLED
B2A 1126 modify for LED
TP_ON_OFF EC_Debug
R3528 NTEX@10K_4 R3529 NTEX@10K_4
R3531 10K_4 R3534 *IOIC@10K_4
R3536 10K_4 R3539 10K_4 R3540 10K_4
R3535 10K_4
1206 change value
CN3500
1 2 3
*DEBUG@85205-0300L
<KBC>
TPCLK TPDATA
+5V
+5V_S5
+5VPCU
+5V
2
SM BUS PU
Strap
ID EEPROM
SPI FLASH
INTERNAL KEYBOARD STRIP SET
<KBC>
HWPG circuit
MBCLK MBDATA 2ND_MBCLK 2ND_MBDATA 3ND_MBCLK 3ND_MBDATA
<KBC>
AMD
AMD
SYS_HWPG[37] HWPG_1.5V[38]
+1.1V_DUAL_PG[40]
VDDA_PWRGD[5,39,41,42]
+1.2V_VDDPR_PG[39]
<KBC>
R3504 4.7K_4 R3505 4.7K_4 R3506 4.7K_4 R3507 4.7K_4 R3508 4.7K_4 R3509 4.7K_4
SHBM
RF_EN
<KBC>
<KBC>
<KBC>
SMBUS Table
SMBUS
Battery
1
PCH SML1
2
2ND_MBCLK 2ND_MBDATA
+3VPCU
R3510 10K_4
3D Sensor EC EEPROM VGA Board Thermal Sensor Touch Sensor
3
HDMI CEC Light Sensor 52H
U3501
6
A0
SCL
5
A1
SDA
A2
7
VCC
WP
GND
M24C08-WMN6TP
SHBM=0: Enable shared memory with host BIOS
Disabled ('1') if using FWH device on LPC. Enabled ('0') if using SPI flash for both system BIOS and EC firmware
1 2 3
8 4
ADDRESS: A0H
D3501 *1SS355_100MA D3502 *1SS355_100MA D3503 *1SS355_100MA
EC NPCE795CA0DX
EC NPCE795CA0DX
EC NPCE795CA0DX
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
1
+3VPCU
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
MY0
R3520 10K_4
R3527 0_4 R3530 0_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
AddressDevices
32H A0H 98H 58H 34H
+3VPCU
0.003A(20mils)
C3511
0.1U/10V_4X
+3VPCU
+3V
R3525 10K_4
Richland
Richland
Richland
35 47
35 47
35 47
HWPG
R3526
*10K_6
of
1A
1A
1A
For Internal Check Only
5
11/30 B2A
50302-00641-001
6 5 4
E@2200P/50V_4X
D D
C C
B B
11/30 B2A
C3A change symble
A A
PCN1
+3VPCU
PCN2
12 10
2 3 4 5 6 7 8 9111
13
BTJ-09BJAB
AC SET_EC[35]
PR254
*100K_4
3 2 1
ID
BAT-GND M-DATA
M-CLOCK
PR259
100/F_4
PC194
47P/50V_4N
PC170
PR255 *SHORT_4
TEMP_MBAT_C
PF1
F1206HA15V024TM
1 2
PC176
10U/6.3V_6X
1 2
PR257 1K_4
PR260
100/F_4
VA0
E@0.1U/25V_4X
PD12 TVLST2304AD0
CH1 VN CH23CH3
PC193 47P/50V_4N
MBDATA [7,35]
MBCLK [7,35]
PR242
82.5K/F_6
PR243 10K/F_4
CH4
VP
PC171
6 5 4
ACIN[35]
MBDATA
+3VPCU
MBCLKTEMP_MBAT
PF2
F1206HA15V024TM
1 2
VA1 +VIN
PC172 E@1U/25V_6X
PD11
1SS355_100MA
ACIN
BAT-VMBAT+
ID [35]
+3VPCU
PR261 100K_4
1K_4
PR263
12
PC199
0.01U/25V_4X
+3VPCU
PR249
49.9/F_6
PR252
82.5K/F_6
22K/F_6
4
PD9
1 2
SBR1045SP5-13
PR244 10K/F_4
3.2V
PR253
1 2
TEMP_MBAT [35]
3
TVS_SMAJ20A
PC181 0.1U/10V_4X
9/19
PC195
*1U/6.3V_4X
VA2VA2
PD10
2 1
10/F_6
( Near by IC side)
+3VPCU
MBDATA
MBCLK
PC188
0.1U/25V_6X
DCIN
88731ACIN
PC196
12
2200P/50V_4X
1024
0.01_3720 PR235
R1
1 2
PC173
0.1U/25V_6X
PR239
PR238
10/F_6
( Near by sense R side)
CSIN
CSIP
PC178
0.1U/10V_4X
30
28
1
NC
GND33GND32GND31GND
VDDSMB
SDA
SCL
ACOK
DCIN
ACIN
VREF
ICOMP
NC
VCOMP
PC197
0.01U/25V_4X
CSSP
NC
7
PU11
ISL88732HRTZ-T
1024
ICM
8
11
9
10
13
22
2
3
4
5
6
12
PR258
2.21K/F_6
27
CSSN
220K/F_4
14
PR262
100_4
VA3
PR241
26
NC
3
VCC
UGATE
PHASE
LGATE
PR236 220K/F_4
PC177 1U/6.3V_4X
1 2
PR245
4.7_6
21
VDDP
25
BOOT
24
23
20
19
PGND
18
CSOP
17
CSON
16
NC
15
VBF
29
GND GND
12
PC198
10U/6.3V_6X
10/8
1 6 2
5
3
4
PQ44
IMD2AT108
PC180 1U/6.3V_4X
PR246
2.7_6
88731A_U_GATE
88731A_PHASE
88731A_L_GATE
PC192
0.1U/10V_4X
( Near by IC side)
ICMNT [35]
1 2
PC187
0.1U/25V_6X
PQ42 AOD403
1
9/18
CSOPCSOP CSON
2
1
01/08 C3A(remove 2nd)
PQ43
PC174
E@1U/25V_6X
+VIN
PC182
*0.1U/25V_4X
52
AON7410
3
1
52
AON7410
3
1
9/18
PC179
PQ46
PQ47
E@2200P/50V_4X
D/C#[35]
PC183
*2200P/50V_4X
E@1000P/50V_4X
PC175
10U/25V_8X
PR248
E@2.2/F_6
PC191
PC184
10U/25V_8X
PC185
*10U/25V_8X
PL11
3.3UH_7X7_TOK
43
4
4
PR237 33K_6
1 3
PC186
*10U/25V_8X
PR250 10/F_6
AP4439GMT
2
1 2
( Near by sense R side)
(Please place this R near by battery pack side)
PR256 100_4
4
3
1
0.01_3720 PR247
PR240
10K/F_6
BAT-V
P36
52
BAT-V
10/30
PQ45
2N7002K_300MA
BAT-V
PR251 10/F_6
PC189
10U/25V_8X
PC190
10U/25V_8X
PC632
10U/25V_8X
C3A add two Caps
PC633
10U/25V_8X
5
4
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Richland
Richland
1
Richland
of
36 47Saturday, January 26, 2013
of
36 47Saturday, January 26, 2013
of
36 47Saturday, January 26, 2013
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
PROJECT :
CHARGER-ISL88731C 1A
CHARGER-ISL88731C 1A
CHARGER-ISL88731C 1A
For Internal Check Only
5
4
3
2
1
9/26
+VIN
D D
PC200
*2200P/50V_4X
PC33
0.1U/25V_6X
PC34
10U/25V_8X
9/18
(Peak 10.752A ,AVG 7.5264A)
OCP:13.5A~14.3A
11/13 B2A 11/13 B2A
C C
+5V_1 +3.3V_1
+
PC41
( Near by Output cap side)
220U/6.3V_105CS_E18e
PR39 *0_2/S
PL2
2.2UH_7X7_TOK PR38
*2.2/F_6 PR40 *0_2/S
PC44
*1000P/50V_4X
1
1
9/26
B B
PC46
+15V
A A
5
0.1U/25V_6X
PR55
22_8
PD6 BAV99W-7-F_150MA
PD7 BAV99W-7-F_150MA
+15V_ALWP
SYS_SHDN#[5,15]
PQ9
52
AON7410
4
3
52
4
PQ11
3
AON7752
Rds(on) 14.5m ohm
2
1
2
1
PC48
0.1U/25V_6X
MAIND[38,42]
4
10/19
0.1U/25V_6X
3
3
MAIND
PC45
PC47
0.1U/25V_6X
PR34 0_4
PC39 0.1U/25V_6X
PR46
15.4K/F_4
PR48
10K/F_4
S5_ON[35]
MAIND
12
1 2
11/30 B2A
+3VPCU
PQ13
AON7406
4
TOP Side TOP Side
+VIN
+5VPCU
PC35
12
10U/6.3V_6X
17
8
VREG3
RT8223P
TOP Side
ENTRIP26SKIPSEL
PR45 *0_4/S
1 2
10U/6.3V_6X
+2VREF+3VPCU
3
REF
TONSEL
VREG5
UGATE2
BOOT2
PHASE2 LGATE2
OUT2
EMC18GND
GND
15
25
14
12
PC38 1U/6.3V_4X
FB2
4 10 9
11 12
7 5
3V_UGATE2
3V_LGATE2
PR50 0_6
PR33
2.2/F_8
PU2
13
EN
21
UGATE1
22
BOOT1
20
PHASE1
19
LGATE1
24
VOUT1
2
FB1
23
PGOOD
PR44
120K/F_4
PR47
76.8K/F_4
10/17
PC37
16
VIN
ENTRIP1
1
PC36
0.1U/25V_6X
5V_UGATE1
PR36
5V_BST1
2.2_6
5V_PHASE1 3V_PHASE2
5V_LGATE1
5V_FB1
DDPWRGD_R
12
PR49 10K_4
PR52 0_4
+5V_S5
1015 changed
52
MAIND
3
1
+5V
(Peak 5.25A, AVG 3.676A)
3
9/18
9/18
(Peak 3.583A, AVG 2.5A)
PR35 *0_2/S
PR37
1 2
2.2_6
3V_FB2
PR53
10K/F_4
+3V_S5
3
PC40
0.1U/25V_6X
65241
PQ14 AO6402A
52
4
3
52
4
PQ12
3
AON7752
10/19
Rds(on) 14.5m ohm
PR51
6.8K/F_4
DDPWRGD_R
+3V
+3VPCU
2
1
1
0.1U/25V_6X
PQ10 AON7410
PR54 *10K_4
PC31
PC32
10U/25V_8X
9/18
(Peak 6.088A, AVG 4.2621A)
PL3
2.2UH_7X7_TOK
PR41 *2.2/F_6
PR42 *0_2/S
PC43 *1000P/50V_4X
SYS_HWPG [35]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PR43 *0_2/S
( Near by Output cap side)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
System 3V/5V(TPS51123A) 1A
System 3V/5V(TPS51123A) 1A
System 3V/5V(TPS51123A) 1A
9/26
+VIN
37
PC201 *2200P/50V_4X
OCP:7.5A~8.4A
+
PC42
9/26
220U/6.3V_105CS_E18e
Richland
Richland
Richland
of
37 47Saturday, January 26, 2013
of
37 47Saturday, January 26, 2013
of
37 47Saturday, January 26, 2013
1
+3V_S5+5V_S5
For Internal Check Only
5
4
3
2
1
Be careful to this two net name.
10/19
PR5643.2K/F_4
S3_1.5V
PR60 0_4
S5_1.5V
PR61 0_4
PR62 100K_4
PC54 1U/6.3V_4X
PU3
VTTSNS VLDOIN VTT VTTGND VTTREF
PR58 *100K_4
23
PwPad-122PwPad-2
TPS51216RUKR
PwPad-324PwPad-425PwPad-5
26
PR59 200K_4
21
19
18
20
S317S5
TRIP
MODE
PwPad
PGOOD
VREF6GND7REFIN8VDDQSNS9PGND
10
16
15
VBST
14
DRVH
13
SW
12
V5IN
11
DRVL
D D
( Near by Output cap side)
+1.5VSUS_1_LOD 1.5SUS_HG
+SMDDR_VTERM
C C
9/18
+SMDDR_VREF
9/18
(Peak 0.1A, AVG 0.07A)
PC52
PC53
10U/6.3V_6X
PR65 0_8
10U/6.3V_6X
PR64
*0_2/S
PC59
0.22U/10V_4X
+3VPCU
HWPG_1.5V[35]
1 2 3 4 5
1 2
10/19
PR63
PC49 0.1U/25V_6X
2.2/F_6
1.5SUS_PHASE
+5V_S5
RDSon=2.8m ohm
MAINON [35,42] SUSON [35]
1.5SUS_LG
11/30 B2A
B B
PR69
10K/F_4
R1
PC61
0.1U/10V_4X PR70
52.3K/F_4
A A
5
R2
4
PC62
0.01U/25V_4X
Vout = 1.8 * (R2/(R1+R2))
MAIND[37,42]
3
PR57
*0_4
11/30 B2A
PQ26 HP8S36TB
1
D1
G1
S1/D2
9
G2
S2
765
8
3
MAINDMAIND
(Peak 0.374A)
S5_1.5VS3_1.5V
2
D1
S2
+1.5VSUS
9/26
PC203
*2200P/50V_4X
D1
S2
65241
PQ17 AO6402A
+1.5V
PC50
0.1U/25V_6X
PL4
1.5UH_10X10
10/17
PR66 *2.2/F_6
PC60
*1000P/50V_4X
+1.5VSUS_1_VDDQSNS
2
+1.5VSUS_1
9/26
PR68
PR67
*0_2/S
+1.5VSUS_1_LOD
PR71 *100_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PC51
10U/25V_8X
PC55
0.1U/10V_4X
*0_8/S
( Near by Output cap side)
+VIN
9/18
OCP:22.5A~24A
(Peak 17.955A, AVG 12.5685A)
ESR : 9mΩ
f : 400k Hz
11/13 B2A
PC57
PC56
+
PC58
+
10U/6.3V_6X
*330U/2V_7343P_E9c
330U/2V_7343P_E9c
10/30
APU_VDDIO_RUN_FB_H [5]
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Richland
Richland
Richland
1
DDR1.5V
DDR1.5V
DDR1.5V
PROJECT :
PROJECT :
PROJECT :
38
of
38 47Saturday, January 26, 2013
of
38 47Saturday, January 26, 2013
of
38 47Saturday, January 26, 2013
+1.5VSUS
1A
1A
1A
For Internal Check Only
5
4
3
2
+VIN
1
PC68
+
9/26
9/18
OCP:10.5A~11.5A
(Peak 8.5A, AVG 5.95A)
ESR : 9m ohm
F : 400k Hz
11/13 B2A
PC69
0.1U/10V_4X
( Near by Output cap side)
PL5
PC64
10U/25V_8X
PR80
PC204 *2200P/50V_4X
*0_2/S 330U/2V_7343P_E9c
+5V_S5
D D
10/19
88.7K/F_4
PC67
R2
1 2
51211_EN_2
12
VDDA_PWRGD[5,35,41,42]
C C
PR73 0_4
*1U/6.3V_4X
PR79
10K/F_4
PR72
PR78
7.15K/F_4 PC71
12
*39P/50V_4N
PC65
1 2
1U/6.3V_4X
51211_V5IN_2
R1
51211_VFB_2
12
PR76 470K/F_4
PU4 TPS51211DSCR
7
V5IN
2
TRIP
3
EN
4
VFB
5
TST
16
GND
GND12GND13GND14GND
VBST DRVH
PGOOD
DRVL
GND
15
PQ18
AON7410
PQ19
AON7752
10/30
4
3
4
3
PR74
10
1 2
9
2.2_6
8
SW
1 6 11
PC66
0.1U/25V_6X
51211_SW_2
51211_DRVH_2
+1.2V_VDDPR_PG [35]
PR75*10K_4
51211_DRVL_2
+3V_S5
RDSon=14m ohm
52
1
52
1
PC63
0.1U/25V_4X
2.2UH_7X7_TOK
PR77 *2.2/F_6
PC70 *1000P/50V_4X
Vout=0.704V*(R1+R2)/R2
PR81 *100_4
B B
PR82 *100_4
APU_VDDP_FB_H [5] APU_VDDR_FB_H [5]
39
+1.2V_VDDPR
A A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
+1.2V_VDDPR (TPS51211DSCR)
+1.2V_VDDPR (TPS51211DSCR)
+1.2V_VDDPR (TPS51211DSCR)
Date: Sheet
Date: Sheet of
Date: Sheet of
Saturday, January 26, 2013
Saturday, January 26, 2013
5
4
3
2
Saturday, January 26, 2013
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
Richland
Richland
Richland
of
39 47
39 47
39 47
1A
1A
1A
For Internal Check Only
5
4
3
2
1
+VIN
+
PC78 330U/2V_7343P_E9c
PR95 10K/F_4
2
12
9/26
+5V_S5
PR94 10K/F_4
3
1
OCP:6.5A~7.5A
(Peak 5.145A, AVG 3.6A)
ESR : 9m ohm
F : 290k Hz
11/13 B2A
PC77
0.1U/10V_4X
( Near by Output cap side)
+15V
PR93
1M/F_4
3
2
PQ24
2N7002K_300MA
PC81
PQ23
1
2N7002K_300MA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
+1.1V_DUAL (TPS51211DSCR) 1A
+1.1V_DUAL (TPS51211DSCR) 1A
+1.1V_DUAL (TPS51211DSCR) 1A
Date: Sheet
Date: Sheet
Date: Sheet
*2200P/50V_4X
+1.1V_DUAL
+1.1V_DUAL
65241
3
PQ22 AO6402A
(Peak 4A)
+1.1V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
D D
10/19
+1.1V_DUAL_EN[35]
C C
PR84
0_4 *1U/6.3V_4X
PR90
10K/F_4
PC76
R2
PR83
52.3K/F_4
1 2
12
PR91
5.76K/F_4 PC80
*39P/50V_4N
+5V_S5
PR86
R1
12
PC74
1 2
1U/6.3V_4X
100K/F_4
+1.1V_V5IN +1.1V_TRIP +1.1V_EN +1.1V_VFB
12
PR88 470K/F_4
PU5 TPS51211DSCR
7
V5IN
2
TRIP
3
EN
4
VFB
5
TST
16
GND
GND12GND13GND14GND
VBST DRVH
PGOOD
DRVL
GND
15
PC72
0.1U/25V_4X
52
PQ20
AON7410
PR85
PC75
2.2_6
10
+1.1V_VBST
9
+1.1V_DRVH
8
+1.1V_SW
SW
1
+1.1V_PGOOD
6
+1.1V_DRVL+1.1V_TST
11
1 2
0.1U/25V_6X
PR87*10K_4
+1.1V_DUAL_PG [35]
+3V_S5
4
10/30
4
PQ21
AON7752
3
1
2.2UH_7X7_TOK
52
PR89 *2.2/F_6
3
PC79
1
*1000P/50V_4X
RDSon=14m ohm
PC205 *2200P/50V_4X
PC73
10U/25V_8X
PL6
PR92
*0_2/S
Vout=0.704V*(R1+R2)/R2
B B
+3V
PR96
VRM_PWRGD[11,41]
+1.1V_EN_EC[35]
A A
5
4
3
PR97
0_4
*0_4
PD8
RB500V-40_100MA
PC82
*1U/10V_4X
2
40
Richland
Richland
Richland
of
40 47Saturday, January 26, 2013
of
40 47Saturday, January 26, 2013
of
40 47Saturday, January 26, 2013
For Internal Check Only
5
+VDDNB_CORE
PR101
VRM_PWRGD[11,40]
CORE_PWM_PROCHOT#[5]
VDDA_PWRGD[5,35,39,42]
PR124
9.76K/F_4
1 2
0_4
APU_SVC[5]
APU_SVD[5]
+1.5VSUS
APU_SVT[5]
PR125
9.76K/F_4
PR132
PR133
27.4K/F_4
1 2
NTC_470K_4
1 2
Place NTC close to the VDDCORE Hot-Spot.(PQ29)
+VDD_CORE
PR146
0_4
PR150
0_4
APU_VDDNB_RUN_FB_H[5]
D D
C C
APU_PWRGD_SVID_REG[5]
PR130
NTC_470K_4
B B
APU_VDD_RUN_FB_H[5]
APU_VDD_RUN_FB_L[5]
A A
PR131
27.4K/F_4
1 2
Place NTC close to the VDDNB Hot-Spot.(PQ25)
PR119 0_4
PR120 0_4
PR121 0_4
PR143 10_4
PR151 10_4
PR98 10_4
PR113 10K/F_4
PR128
130K/F_4
10/23
0.01U/25V_4X
PC84 330P/50V_4X
PR109 *0_4
+3V_S5
PC111
PR137 *0_4
PC122
330P/50V_4X
PC128
PR115 0_4
VRM_PWRGD
0.1U/25V_4X
PC118
680P/50V_4X
PC91
100P/50V_4N
PC92
PC96
PC99
NTC_NB
NTC
IMON_NB
IMON
PR129
130K/F_4
680P/50V_4X
150P/50V_4N
47P/50V_4N
PC115 47P/50V_4N
PC117 150P/50V_4N
PC119 100P/50V_4N
11/30 B2A
PR102
2.8K/F_4
PR104 499/F_4
PR105 2K/F_4
PR110 267K/F_4
62771_FB_NB
62771_COMP_NB
35
PGOOD_NB
20
PGOOD
3
SVC
4
VR_HOT_L
5
SVD
6
VDDIO
7
SVT
8
ENABLE
9
PWROK
1
NTC_NB
11
NTC
2
IMON_NB
10
IMON
PC113
0.1U/25V_4X
62771_COMP
PR140
2K/F_4
11/30 B2A
5
PR138 267K/F_4
PR141 499/F_4
PR144
2.1K/F_4
4
+5V_S5
PR99
PC83
62771_VSEN_NB
38
VSEN_NB
PU6
ISL62771HRTZ-T
VSEN16RTN
17
62771_VSEN
62771_RTN
1/F_6
26
PR100 0_6
VDDP
PC85 1U/10V_4X
1 2
1 2
0.1U/10V_4X PC98
PC97
1 2
1 2
1 2
576/F_4 PR117
40
39
ISUMP_NB
ISUMN_NB
LGATE_NB
PHASE_NB
UGATE_NB
BOOT_NB
BOOT2
UGATE2
PHASE2
LGATE2
LGATE1
PHASE1
UGATE1
BOOT1
EP
15
ISUMN
ISEN212ISEN113ISUMP14ISUMN
0.22U/25V_6X
0.22U/25V_6X
PR149
562/F_4
12
34
33
32
31
30
29
28
27
24
23
22
21
41
PC114
PC116
PC123
0.1U/10V_4X
12
LGATE_NB
PHASE_NB
UGATE_NB
BOOT_NB
BOOT_2
UGATE_2
PHASE_2
LGATE_2
LGATE_1
PHASE_1
UGATE_1
BOOT_1
12
12
PC124
0.1U/10V_4X
11/30 B2A
Add 9 GND VIAs for thermal pad
ISEN2
VSUM-
ISEN1
12
1 2
1 2
25
VDD
1U/10V_4X
37
36
FB_NB
COMP_NB
FB18COMP
19
62771_FB
10/30
4
PR145
0.022U/16V_4X
11K/F_4
PR108
12
11K/F_4
1 2
PR142
2.61K/F_4
12
PR147
NTC_10K_4
12
3
VSUMG+
2.61K/F_4
PR106
1 2
NTC_10K_4
PR111
1 2
VSUMG-
0.1U/10V_4X PC100
VSUM+
11/30 B2A
Place NTC close to the VDD chock(PL9)
VSUM-
12
PC129
0.1U/10V_4X
3
BOOT_NB
PHASE_NB
Place NTC close to the VDD chock(PL7)
LGATE_NB
12
UGATE_2
PR122
2.2_6
1 2
BOOT_2
PHASE_2
LGATE_2
VDDNB_CORE
UGATE_NB
PR103
2.2_6
0.22U/25V_6X
PC107
0.22U/25V_6X
1 2
UGATE_1
PR148
1 2
BOOT_1
2.2_6
PHASE_1
LGATE_1
PC90
VSUMG+
VSUMG-
VDD_CORE
PQ27 HP8S36TB
1
G1
S1/D2
9
G2
8
PC127
1 2
0.22U/25V_6X
2
11/30 B2A
PQ25 HP8S36TB
1
G1
S1/D2
9
G2
8
11/30 B2A
2
D1D1D1
S2S2S2
765
11/30 B2A
PQ29 HP8S36TB
1
G1
S1/D2
9
G2
765
8
2
2
765
*1000P/50V_4X
2
D1D1D1
S2S2S2
PC102
PR123
*2.2/F_6
PC112
D1D1D1
S2S2S2
*2.2/F_6
PC133
*1000P/50V_4X
ISEN1
VSUM+
VSUM-
ISEN2
PC86
2200P/50V_6X
PR107
*2.2/F_6
PC101
*1000P/50V_4X
( Near by IC side)
PC104
2200P/50V_6X
10U/25V_8X
PR134 10K/F_4
ISEN2
PR135 3.65K/F_6
VSUM+
PR136 1/F_6
VSUM-
PR139
ISEN1
*10K/F_4
( Near by IC side)
PC120
2200P/50V_6X
PR152
PR155
10K/F_4
PR156 3.65K/F_6
PR157 1/F_6
PR158
*10K/F_4
( Near by IC side)
PC87
10U/25V_8X
PL7 0.24UH_7X7
PR114
1 2
3.65K/F_6 PR118
1 2
1/F_6
PC105
10U/25V_8X
PL8 0.24UH_7X7
PC125
PL9 0.24UH_7X7
PR153*0_2/S
1
+VIN
9/18
(Peak 33A)
PC89
PC88
10U/25V_8X
PC93
PR116*0_2/S
PR112*0_2/S
PC106
0.1U/50V_6X
PR127*0_2/S
PR126*0_2/S
PC126
10U/25V_8X
10U/25V_8X
+
PR154*0_2/S
PC130
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
ESR
0.1U/50V_6X
:4.5mΩ f :300k Hz
+
PC95
PC94
560U/2V_7343P_E4.5a_3pin
12
+
PC103
100U/25V_105CE_f
PC147
22U/6.3V_6X
22U/6.3V_6X
+VIN
22U/6.3V_6X
Place PC147, PC148, PC149, PC150 close to CPU socket
+
PC108
PC110
560U/2V_7343P_E4.5a_3pin
(Peak 50A)
+VIN
PC121
0.1U/50V_6X
PC131
560U/2V_7343P_E4.5a_3pin
PC143
PC132
22U/6.3V_6X
CPU_CORE (ISL62771HRTZ-T) 1A
CPU_CORE (ISL62771HRTZ-T) 1A
CPU_CORE (ISL62771HRTZ-T) 1A
22U/6.3V_6X
22U/6.3V_6X
11/30 B2A
Place PC143, PC144, PC145, PC146 close to CPU socket
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
41
+VDDNB_CORE
PC149
PC148
22U/6.3V_6X
22U/6.3V_6X
11/30 B2A
+VDD_CORE
PC109
22U/6.3V_6X
22U/6.3V_6X
9/18
ESR :4.5mΩ
f :300k Hz
+VDD_CORE
PC144
PC145
22U/6.3V_6X
Richland
Richland
Richland
41 47Saturday, January 26, 2013
41 47Saturday, January 26, 2013
41 47Saturday, January 26, 2013
PC150
22U/6.3V_6X
PC146
22U/6.3V_6X
22U/6.3V_6X
of
of
of
For Internal Check Only
5
4
3
+3V_S5
2
1
+5V_S5
D D
PR160
MAINON[35,38]
+3V_S5
0_4
PC134
0.1U/10V_4X
PU7 G9661-25ADJF12U
4 2 3
8 9
VPP VEN VIN
GND GND
PGOOD
ADJ
7
VO
NC
1 6
5
PR159 100K_4
PR161
73.2K/F_6
VDDA_PWRGD [5,35,39,41]
+2.5V_VDDA
PC135
10U/6.3V_6X
42
0.75A
0.8V
PC136
10U/6.3V_6X
C C
PC137
0.1U/10V_4X
PC138 *0.1U/10V_4X
PR162 34K/F_6
Vout =0.8(1+R1/R2) =2.5V
+VIN
PR163 1M/F_4
PQ31
B B
MAINON
PDTC143TT_100MA
2
PR167 100K_4
PR166 1M/F_4
1 3
PQ32B
2N7002KDW_115MA PR169 22_8
5
3 4
+5V
PR165 22_8
2
+3V
6
1
PQ32A
+1.1V
3
2
1
2N7002KDW_115MA
10/17
PR180 22_8
PQ5065
2N7002K_300MA
PQ33B
2N7002KDW_115MA
PR168 22_8
5
3 4
+1.5V
+15V
PR164 1M/F_4
MAIND [37,38]
6
2
PC139
1
PQ33A
2N7002KDW_115MA
2200P/50V_4X
A A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DISCHARGE
DISCHARGE
DISCHARGE
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Richland
Richland
Richland
of
42 47
42 47
42 47
1
1A
1A
1A
For Internal Check Only
5
4
3
2
1
Mars VDDC VID TABLE
43
+VGPU_CORE
Richland
Richland
Richland
of
43 47Saturday, January 26, 2013
of
43 47Saturday, January 26, 2013
of
43 47Saturday, January 26, 2013
Int_VGA
D D
[PWM]
62881DPRSLPVR
62881VR_ON
C C
01/08 C3A
B B
A A
[PWM]
GFX_CORE_CNTRL0[15] GFX_CORE_CNTRL1[15] GFX_CORE_CNTRL2[15] GFX_CORE_CNTRL3[15] GFX_CORE_CNTRL4[15]
PR201 EV@4.7K_4
62881PGOOD_R[44]
12/03 B2A
62881_GND
PR14
EV@226K/F_4
PR635
EV@715/F_4
GPU_MAINON[24,44]
PE_GPIO1[7,24,44]
PR202 *EV@10K_4
PR641
EV@120K/F_4
PC13
EV@390P/50V_4X
EV@1000P/50V_4X
PR643 EV@0_4 PR644 EV@0_4 PR645 EV@0_4 PR646 EV@0_4 PR647 EV@0_4
+3V
PR639 EV@0_4
62881_GND
PC12 EV@56P/50V_4N
PC8
5
H_VID0
12
H_VID1
12
H_VID2
12
H_VID3
12
H_VID4
12
H_VID5 H_VID6
12/03 B2A
PR439 EV@0_4 PR264 *EV@10K/F_4 PR438 *EV@0_4
GPU_DPRSLPVR[15]
62881_GND
+3V
PR21 EV@147K/F_4
PR17 EV@8.06K/F_4
PC629
EV@1000P/50V_4X
PR640 EV@2K/F_4
PC626
PC630
EV@330P/50V_4X
62881_GND
EV@330P/50V_4X
PC628 EV@1000P/50V_4X
62881_GND
62881_GND
PR30 *EV@0_4/S
62881_GND
PR634 EV@1.91K/F_4
62881PGOOD
62881RBIAS
62881VW
62881COMP
62881FB
62881VSEN
62881RTN
PC26
*EV@0.01U/25V_4X
12
PR32 EV@0_4
PR29 EV@0_4
62881_GND
29
GND
1
CLK_EN#
2
PGOOD
3
RBIAS
4
VW
5
COMP
6
FB
7
VSEN
RTN
PU1
8
62881DPRSLPVR
62881VR_ON
27
28
VR_ON
DPRSLPVR
EV@ISL62881CHRTZ-T
ISUM-
ISUM+
9
10
62881ISUM-
62881ISUM+
PC141
EV@1U/6.3V_4X
26
VID6
11
62881VDD
25
VID5
VDD
62881_GND
24
VID4
VIN
12
62881VIN
PC140 EV@0.22U/25V_6X
62881_GND
PR637
EV@1/F_6
Parallel
4
23
VID3
IMON
13
PR176
EV@2.2/F_4
22
VID2
LGATE
PHASE
UGATE
BOOT
14
62881BOOT
EV@1K/F_4
+5V_S5
VCCP
VSSP
PR24
21
VID1
20
VID0
19
18
62881LGATE
17
16
62881PHASE
15
62881UGATE
+VIN
PR177 EV@10/F_4
PR172 EV@0_4
PR171 EV@10/F_4
PR175 EV@0_4
1 2
+5V_S5
+3V
PR178 EV@2.2/F_6
PR627 *EV@10K/F_4 PR628 *EV@10K/F_4
PR642 EV@10K/F_4
PR621 *EV@10K/F_4 PR626 EV@10K/F_4 PR623 EV@10K/F_4 PR631 *EV@10K/F_4
+5V_S5
PC142
1 2
EV@4.7U/10V_6X
PC631
EV@0.22U/25V_6X
PR624 *EV@10K/F_4
PR633 EV@10K/F_4
PR632 *EV@10K/F_4
PR401 EV@2.2/F_6
PC374
EV@1500P/50V_4X
VCORE_VSSSENSE [18]
VCORE_VCCSSENSE [18]
PR618 EV@10K/F_4
PR625 *EV@10K/F_4
10/16
9
H_VID0
H_VID1
H_VID2
H_VID3 H_VID4 H_VID5 H_VID6
PR619 EV@10K/F_4
PR622 EV@10K/F_4
62881_GND
11/30 B2A
1
2
D1D1D1
G1
S1/D2
G2
S2S2S2
765
8
11/09 B2A
3
PQ5051 EV@HP8S36TB
VDDC(V)
1.125
1.100
1.075
1.050
1.025
1.000
0.975
0.950
0.925
0.900
0.875
0.850
0.825
0.800
0.775
GFX_CORE_CNTRL4
(VID5) (VID4) (VID3)
(GPIO_6)
1 1 1 1 1 1 1 1 1
1 11 1 1 1
10/16
PR170
*EV@0_2/S
PR636
EV@3.65K/F_4
EV@2.61K/F_4
GFX_CORE_CNTRL3
(GPIO_30)
0 0 0 0 0 0
11 1
1 1
PC621
PC622
EV@10U/25V_8X
PL25
EV@0.22UH_7X7X4
PR630
*EV@0_2/S
PC623
EV@10U/25V_8X
EV@0.1U/25V_4X
+VGPU_CORE-1
11/30 B2A
PR174
PR173
EV@NTC_10K_4
10K NTC put close with Inductor
PR27
EV@11K/F_4
PC23
EV@0.15U/10V_4X
PC22
*EV@0.1U/10V_4X
EV@649/F_4
PR26
62881_GND
PC627 EV@0.1U/10V_4X
PC11 *EV@180P/50V_4N
PR638 *EV@100/F_4
GFX_CORE_CNTRL2
(GPIO_29)
PC624
*EV@2200P/50V_4X
2
GFX_CORE_CNTRL1
(VID2) (VID1)
110 0 0 0 01 1 1
101 0 0 0 0 1 1
+VIN
PC625
(GPIO_20)
+
EV@10U/25V_8X
PC371
1 0 0 1
0 0 110
01 0 1 1 0 0
+
PC372
EV@330U/2V_7343P_E6b
GFX_CORE_CNTRL0
+VGPU_CORE
EV@330U/2V_7343P_E6b
(GPIO_15)
1 0 1 0 1 0 1 0 1 0 1 0
0 1
Countinue current:14.7A Peak current:21A OCP:27A~28A
10/22
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
+VGPU_CORE (TPS51728RHAR) 1A
+VGPU_CORE (TPS51728RHAR) 1A
+VGPU_CORE (TPS51728RHAR) 1A
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
1
For Internal Check Only
5
12/03 B2A
D D
62881PGOOD_R[43]
PE_GPIO1[7,24,43]
9/18
12/03 B2A
PR265
EV@0_4
PR220
*EV@0_4
12
12
+3V_S5
PC160
EV@10U/6.3V_6X
PC159
EV@0.1U/50V_6X
PC161
EV@0.1U/10V_4X
+5V_S5
PC162 *EV@0.1U/10V_4X
Vout =0.8(1+R1/R2) =1.8V
C C
12/03 B2A
EV@LTC044EUBFS8TL_30MA
PR267
GPU_MAINON[24,43]
PE_GPIO1
9/19
B B
EV@0_4 PR266
*EV@0_4
12
12
PR227 EV@100K_4
2
PU9 EV@G9661-25ADJF12U
4
VPP
2
VEN
3
VIN
8
GND
9
GND
PQ38
1 3
4
PGOOD
+VIN
VO
NC
ADJ
7
PR223
EV@1M/F_4
PR226 EV@1M/F_4
12/03 B2A
+3V_S5
PR179 EV@100K_4
1 6
5
PE_PWRGD
PR221 EV@43.2K/F_6
PR222 EV@34K/F_6
2
+3V_GPU
3
1
PE_PWRGD [8,35]
+1.8V_GPU
(Peak 1.055A ,AVG 0.7385A)
PC163
EV@10U/6.3V_6X
9/18
11/30 B2A
+1.8V_GPU +0.95V_GPU
PR225 EV@22_8
PQ40
EV@2N7002K_300MA
PR181 EV@22_8
34
5
PQ5066B
EV@2N7002KDW_115MA
3
01/08 C2B
PE_GPIO1_D
PR608 EV@22_8
6
2
1
PQ5066A
EV@2N7002KDW_115MA
+1.5VSUS
52
3
PQ37 EV@AON7516
1
+1.5V_GPU
4
(Peak 4.7A ,AVG 3.29A)
+1.5V_GPU
PR228 EV@22_8
34
5
PQ39B
EV@2N7002KDW_115MA
9/18
2
+15V
6
1
2
PR224 EV@1M/F_4
PQ39A
EV@2N7002KDW_115MA
1
44
PE_GPIO1_D
+1.5VSUS
+5V_S5
+3V
PR229
EV@100K_4
9/18
A A
PE_GPIO1
GPU_MAINON
12/03 B2A
5
PR231 *EV@0_4
PR268 EV@0_4
PC168
EV@0.1U/10V_4X
9/26
EV@10U/6.3V_6X PU10
EV@G9336ADJTP1U
1
VCC
3
PGD EN4ADJ
PR234 *EV@100K_4
PC164
6
DRV
5
GND
2
5 2
PC165 EV@0.1U/10V_4X
G9334_DRV
PC169
EV@0.033U/50V_6X
4
4
PR232 EV@47/F_6
PQ41EV@AON7406
1 3
EV@10U/6.3V_6X
PR230 EV@90.9/F_4
Rg
PR233 EV@100/F_4
Rh
+0.95V_GPU
PC166
Vout = (1+Rg/Rh)*0.5 =0.95V
PC167
EV@10U/6.3V_6X
C3A Change Value to EV@
0.95V/+-5% PEAK : 4.28A
3
9/18
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Saturday, January 26, 2013
Saturday, January 26, 2013
2
Saturday, January 26, 2013
VGA_DIS
VGA_DIS
VGA_DIS
PROJECT :
Richland
Richland
Richland
1
of
44 47
44 47
44 47
1A
1A
1A
For Internal Check Only
5
4
3
2
1
BD8/BD8D Power On Sequence: S5 > S0
45
+3V_RTC
+VIN
+5VPCU/+3VPCU/+15V
ACIN
D D
S5_ON active by pull up 10k to +3VPCU
EC SPI signals
NBSWON#
S5+ NOT implemented
S5+ implemented
S5_ON/S5_CORE_EN
S5_CORE_EN
+3V_S5
EC GPIO46 Enable
+1.1V_DUAL
+1.1V_DUAL_PG
RSMRST_GATE#
RTCLK
C C
PWR_BTN#_EC
AC not present equal to LOW; AC present equal to High
EC FW download
Power button from switch to EC
To turn on dual power rails
S5+ implemented to turn off dual power rails
2ms
20ms delay at least
50ms Max
32ms Min
Power button from EC to FCH
APU Power on sequence required:
Llano APU:
1.Group A ( +1.5VSUS, +2.5V_VDDA ) ramp before Group B ( +VDD_CORE, +VDDNB_CORE, +1.2V_VDDPR )
HUDSON-M2/M3:
1.+3V_S5 ramp before +1.1V_DUAL
2.+3V ramp before +1.1V
3.+3V_RTC must ramp at least 5 secs before the +3V_S5
SLP_S5#
SUSON
APU GROUP A power
+1.5VSUS
+0.75V_DDR_VTT
VDRAM_PWRGD
+0.75V_DDR_VTT only will be shut down in S3 mode and for DDR3 SODIMM only
SLP_S3#
MAINON
+5V/+3V
+2.5V_VDDA
+1.5V_RUN/+1.1V/+1.5V
Default controlled by +3.3V
VDDA_PWRGD
B B
APU GROUP B power
+VDDNB_CORE
+VDD_CORE
+1.2V_VDDPR
VRM_PWRGD
+1.2V_VDDPR_PG
98ms < T <150ms
FCH_PWRGD
50ms Max
APU_CLKP/N
APU_PWRGD
A_RST#(PLTRST#)
A A
PCIRST#
38ms Max
101ms < T <113ms
75ns < T <100ns
1ms < T <2.3ms
APU_RST#
Quanta Computer Inc.
Quanta Computer Inc.
5
4
3
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
POWER SEQUENCE
POWER SEQUENCE
POWER SEQUENCE
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
1
Quanta Computer Inc.
PROJECT :
Richland
PROJECT :
Richland
PROJECT :
Richland
of
45 47
45 47
45 47
1A
1A
1A
For Internal Check Only
5
4
3
2
1
+5VPCU +-5%
AC/DC Insert enable
(Peak 0.07A, AVG 0.049A)
+5V_S5 +-5%
D D
2
RT8223P +3VPCU +-5% P.37
Power Tree Table (UMA)
1
System
AC
Charger ISL88731CHRTZ-T P.36
DC
3
C C
B B
TPS51216RUKR
P.38
4
TPS51211DSCR P.39
5
TPS51211DSCR P.40
6
ISL62771HRZ-T
P.41
S5_ON enable
(Peak 10.752A ,AVG 7.5264A)
AC/DC Insert enable
(Peak 0.235A, AVG 0.165A)
+3V_S5 +-5%
S5_ON enable
(Peak 5.0338A, AVG 3.5236A)
+SMDDR_VTERM
SUSON enable
+SMDDR_VREF
SUSON enable
+1.5VSUS +-3%
SUSON enable
(Peak 8.975A, AVG 6.2825A)
+1.2V_VDDPR +-5%
VDDA_PWRGD enable
(Peak 8.5A, AVG 5.95A)
+1.1V_DUAL +-5%
+1.1V_DUAL_EN enable
(Peak 5.15A, AVG 3.605A)
+VDD_CORE +-2%
VDDA_PWRGD enable
(Peak 50A ,AVG 40A)
+VDDNB_CORE +-2%
VDDA_PWRGD enable
(Peak 33A ,AVG 27A)
OCP:10.5A
OCP:6.5A
OCP 65A
OCP 43A
OCP:0.3A
OCP:13.5A
OCP:0.3A
OCP:6.5A
OCP:11.5A
AO6402A
Power Distribution List
Power
Distribution
7
AO6402A P.37
8
AO6402A P.37
9
G9661 P.42
10
P.39
11
AO6402A P.41
+5V +-5%
MAIND enable
(Peak 5.25A, AVG 3.676A)
+3V +-5%
MAIND enable
(Peak 3.583A, AVG 2.5A)
+2.5V_VDDA +-5%
MAINON enable
(Peak 0.75A)
+1.5V +-5%
MAIND enable
(Peak 0.375A, AVG 0.2625A)
+1.1V +-5%
VRM_PWRGD enable
(Peak 4A, AVG 2.8035A)
Power Tree Table (DIS)
1
System
AC
Charger ISL88731CHRTZ-T P.36
DC
+5VPCU +-5%
AC/DC Insert enable
(Peak 0.07A, AVG 0.049A)
+5V_S5 +-5%
S5_ON enable
2
RT8223P +3VPCU +-5% P.37
3
TPS51216RUKR
P.38
4
TPS51211DSCR P.39
5
TPS51211DSCR P.40
6
ISL62771HRZ-T
P.41
7
TPS51728RHAR
P.43
(Peak 10.752A ,AVG 7.5264A)
AC/DC Insert enable
(Peak 0.235A, AVG 0.165A)
+3V_S5 +-5%
S5_ON enable
(Peak 6.088A, AVG 4.2621A)
+SMDDR_VTERM
SUSON enable
+SMDDR_VREF
SUSON enable
+1.5VSUS +-3%
SUSON enable
(Peak 17.955A, AVG 12.5685A)
+1.2V_VDDPR +-5%
VDDA_PWRGD enable
(Peak 8.5A, AVG 5.95A)
+1.1V_DUAL +-5%
+1.1V_DUAL_EN enable
(Peak 5.15A, AVG 3.605A)
+VDD_CORE +-2%
VDDA_PWRGD enable
(Peak 50A ,AVG 40A)
+VDDNB_CORE +-2%
VDDA_PWRGD enable
(Peak 33A ,AVG 27A)
+VGPU_CORE +-5%
PE_GPIO1 enable
(Peak 38.8A ,AVG 27.16A)
OCP:10.5A
OCP 65A
OCP 43A
OCP:0.3A
OCP:13.5A
OCP:0.3A
OCP:7.5A
OCP:22.5A
OCP:6.5A
OCP:51A
8
AO6402A P.37
9
AO6402A P.37
10
G9661 P.42
11
G9661 P.44
12
G9334 P.44
13
AO6402A
P.38
14
AON7202 P.44
15
AO6402A
P.40
+5V +-5%
MAIND enable
(Peak 5.25A, AVG 3.676A)
+3V +-5%
MAIND enable
(Peak 3.583A, AVG 2.5A)
+2.5V_VDDA +-5%
MAINON enable
(Peak 0.75A)
+1.8V_GPU +-5%
PE_GPIO1 enable
(Peak 1.829A ,AVG 1.2803A)
+0.95V_GPU +-5%
PE_GPIO1 enable
(Peak 4.28A ,AVG 2.996A)
+1.5V +-5%
MAIND enable
(Peak 0.375A, AVG 0.2625A)
+1.5V_GPU +-5%
PE_GPIO1 enable
(Peak 4.7A ,AVG 3.29A)
+1.1V +-5%
VRM_PWRGD enable
(Peak 4A, AVG 2.8035A)
46
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Richland
Richland
Richland
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
POWER TREE TABLE
POWER TREE TABLE
POWER TREE TABLE
1
of
of
of
46 47Saturday, January 26, 2013
46 47Saturday, January 26, 2013
46 47Saturday, January 26, 2013
1A
1A
1A
For Internal Check Only
5
4
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1
46
BY6D
D D
Model
BY6D MB
C C
B B
REV
A1A
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MODEL
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A A
DOC NO. 204
PROJECT MODEL : BY6D APPROVED BY: PART NUMBER:
DRAWING BY: REVISON:
Wei-Sheng
DATE:
5
4
3
2
2011/10/02
A1A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
Change List
Change List
Change List
1
Richland
Richland
Richland
of
47 47Saturday, January 26, 2013
of
47 47Saturday, January 26, 2013
of
47 47Saturday, January 26, 2013
1A
1A
1A
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