QUANTA BD8 Schematics

For Internal Check Only
5
4
3
2
1
PCB STACK UP
LAYER 1 : TOP LAYER 2 : GND LAYER 3 : IN1
D D
LAYER 4 : PWR LAYER 5 : IN2 LAYER 6 : IN3 LAYER 7 : GND LAYER 8 : BOT
Transformer
RJ45
P28 P30
C C
B B
Card Reader Con.
A A
Card Reader 2 IN 1 (MS/SD) (GL834L)
DDRIII-SODIMM1 DDRIII-SODIMM2
Atheros
10/100M
AL8162B
WLAN Con.
SATA - HDD Con.
SATA - ODD Con.
Support zero power ODD
USB2.0 Con.
USB2.0 Con.
CCD
Port-B
BD8 Richland/Comal Block Diagram
X'TAL 25MHz
P28P28
P25
P25
P32
P31P31
P12, 13
USB2-7
USB2-0
USB2-1
USB2-6
USB2-5
Dual Channel DDR III
1600~1866 MHZ
P33
P33
USB 2.0 (Port0~13)
SATA-0
SATA-1
BATTERY
P8
PCI-Express
Audio Codec CX20756-11Z
Port-A
P29 P29 P29
HP SPK Con.MIC JACK
X'TAL 25MHz
CPU
Trinity/Piledriver APU 35W
35mm X 35mm
FS1r2 socket 722 pin uPGA
DP1(x4)
SATA III
USB2.0
Hudson/Bolton M3
24.5mm X 24.5mm
656 Pin BGA
RTC
Azalia
IHDA
P29
FAN
Display Port 2
Display Port 0
PCI-E x8
USB 3.0 (Port0~3)
AMD
P3, 4, 5, 6
DMI
UMI LINK
2.5GT /s
UMI(x4)
VGA-DAC
USB3.0
FCH
X'TAL
32.768KHz
P7, 8, 9, 10, 11
NVRAM
LPC
SPI Flash
4M
LPC
EC NPCE985L
HALL Sensor
P4 P32 P31 P34
LED
RTD2136R-CG LVDS PANEL
HDMI CONN
GPU
Sun Pro M2
P26 P32
P27
VRAM DDR3-128MB*4 VRAM DDR3-256MB*4
29mm X 29mm
P14~21, 24
X'TAL
27.0MHz
CRT Con.
USB3-0 USB2-10
USB3.0 Con.
USB3-1
USB3.0 Con.
USB2-11
P9
K/B Con.
Touch Pad /B Con.
Power /B Con.
P34P34
eDP PANEL
P32
P25
P25
P35
P32
VRAM DDRIII
P22
POWER SYSTEM
ISL88731CHRTZ-T TPS51123A TPS51216RUKR TPS51211DSCR TPS51211DSCR OSL6277 G9661-25ADJF12U ISL95870AHRUZ-L
CHARGER
+15V +3VPCU +3V_S5 +3V +5VPCU +5V_S5 +5V
+SMDDR_VTERM +SMDDR_VREF
+1.5VSUS +1.5V_S5 +1.5V
+1.2V_VDDPR
+1.1V_DUAL +1.1V
+VDD_CORE +VDDNB_CORE
+2.5V_VDDA DISCHARGE
+VGPU_CORE +3V_GPU
+1.8V_GPU +1.5V_GPU
+1V_GPU
01
P36
P37
P38
P39
P40
P41
P42
P43,P44
5
4
3
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
Date: Sheet of
PROJECT :
Block Diagram
Block Diagram
Block Diagram
Richland
Richland
Richland
of
147
147
1
147
1A
1A
1A
For Internal Check Only
5
4
3
2
1
02
Table of Contents
D D
C C
B B
A A
PAGE DESCRIPTION
Schematic Block Diagram
1
Front Page
2
3 - 6
Processor
7 - 11
FCH
8
RTC RTC DDRIII SO-DIMM
12 - 13 14 - 21
Thames/Seymour(M2) VGA
22 - 23
VRAM - DDR3 VGA
24
PX VGA USB Connector USB
25
USB 3.0 Redriver U3B USB Sleep Charger SLC TRAVIS Decoder LDS
26
HDMI comm part
27
Touch Screen Atheros LAN
28
Codec (CX20671-21Z)
29
MINI Card (Wi-Fi & WIMAX)
30
Card reader
31
LED LED VGA Connector
32
LCD Panel CRT & CRT BUS SWITCH CCD HALL SENSOR&BACK LIGHT SWITCH HDD HDD
33
ODD
34
Thermal THC FAN THC
35
KeyBoard TP&FP board TPD,FPD Power SW PSW EC NPCE885LA0DX
36 37
Charger (ISL88731CHRTZ-T)
38
System 5V/3V
DDR 1.5V
39 40
+1.2V_VDDPR
41
+1.1V_DUAL
+VCC_CORE 2+1
42 43
Discharge GPU_CORE
44 45
Power Sequence Change List
46
BOI-FUNCTIONS
CPU CLG
DDR
HDM TSN LAN ADO MNW MMC
VGA LDS CRT CCD HSR
ODD
KBC
KBC PWM PWM PWM PWM PWM PWM PWM PWM
POWER PLANE
+VIN +VCCRTC +3V +3V_S5 +3VPCU +5V +5V_S5 +5VPCU
WIMAX_P +1.5VSUS +1.5V +1.2V_VDDPR +1.1V_DUAL
+VDD_CORE +VDDNB_CORE ~ VDDA_PWRGD S0 +VGPU_CORE
+1.8V_GPU +1V_GPU +1V +3V_GPU +1.5V_GPU +2.5V_VDDA +2.5V MAIN_ON S0
VOLTAGE
10V~+19V
+3.0V~+3.3V
+3.3V +3.3V +3.3V +5V +5V +5V
+3.3V
+1.5V S5_ON +1.5V +1.2V VDDA_PWRGD +1.1V +1.1V_DUAL_EN
+1.1V+1.1V MAIN_ON
~
+1.8V
+3.3V +1.5V PX_MODE_D
GND PLANE PAGE
GND_SIGNAL 8769GND 36
GND ADOGND 29
32
28 ALL
CONTROL SIGNAL
MAIN_ON S5_ON
MAIN_ON S0 S5_ON S0~S5
AC/DC Insert enable
WMAX_P
MAIN_ON
VDDA_PWRGD
PX_MODE PE_GPIO1 DGPU_PWREN PE_GPIO1 S0
Value Code
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
CEC@ Debug@
IV@ U3@ 1G4@ 1G8@ 2G@ VRAM 2Gb AMD@ AMD VRAM DIS@ DISCRETE M2@
NMP@ LPC Debug Card PX4@ PX5@ Sam@ Samsung VRAM U2@ E@ EMI
Power States
ACTIVE IN
S0~S5 S0~S5 S0 S0~S5 S0~S5AC/DC Insert enable
S0~S5
S0 S0~S3 S0 S0 S0~S5
S0
S0
S0 S0 S0
S0
FUNCTIONSITEM
CEC HDT+ Debug DISCRETEEV@ UMA Internal USB 3.0 VRAM 1Gb*4 VRAM 1Gb*8
M2 FCH M3 FCHM3@
PX4 Mode PX5 Mode
USB 2.0 (colay W USB 3.0)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
5
4
3
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
POWER STAGE & BOI-FUNCTION
POWER STAGE & BOI-FUNCTION
POWER STAGE & BOI-FUNCTION
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
Date: Sheet of
Date: Sheet
PROJECT :
1
Richland
Richland
Richland
of
247
247
247
1A
1A
1A
For Internal Check Only
5
4
3
2
1
U1F
PEG_RXP0[14] PEG_RXN0[14]
PCIE_RXP_LAN[28] PCIE_RXN_LAN[28] PCIE_RXP_WLAN[30] PCIE_RXN_WLAN[30]
PEG_RXP1[14] PEG_RXN1[14] PEG_RXP2[14] PEG_RXN2[14] PEG_RXP3[14] PEG_RXN3[14] PEG_RXP4[14] PEG_RXN4[14] PEG_RXP5[14] PEG_RXN5[14] PEG_RXP6[14] PEG_RXN6[14] PEG_RXP7[14] PEG_RXN7[14]
UMI_RXP0[8] UMI_RXN0[8] UMI_RXP1[8] UMI_RXN1[8] UMI_RXP2[8] UMI_RXN2[8] UMI_RXP3[8] UMI_RXN3[8]
+1.2V_VDDP
D D
C C
TO PCIE-LAN
TO WLAN
B B
PEG_RXP0 PEG_RXN0 PEG_RXP1 PEG_RXN1 PEG_RXP2 PEG_RXN2 PEG_RXP3 PEG_RXN3 PEG_RXP4 PEG_RXN4 PEG_RXP5 PEG_RXN5 PEG_RXP6 PEG_RXN6 PEG_RXP7 PEG_RXN7
PCIE_RXP_LAN PCIE_RXN_LAN PCIE_RXP_WLAN PCIE_RXN_WLAN
UMI_RXP0 UMI_RXN0 UMI_RXP1 UMI_RXN1 UMI_RXP2 UMI_RXN2 UMI_RXP3 UMI_RXN3
R1 196/F_6
P_ZVDDP
AB8 AB7 AA9 AA8 AA5 AA6
AE5 AE6 AD8 AD7 AC9 AC8 AC5 AC6
AG8 AG9 AG6 AG5 AF7 AF8 AE8 AE9
AG11
Y8
Y7 W9 W8 W5 W6
V8
V7
U9 U8 U5 U6
T8
T7
R9 R8 R5 R6
P8
P7
N9 N8 N5 N6 M8 M7
P_GFX_RXP0 P_GFX_RXN0 P_GFX_RXP1 P_GFX_RXN1 P_GFX_RXP2 P_GFX_RXN2 P_GFX_RXP3 P_GFX_RXN3 P_GFX_RXP4 P_GFX_RXN4 P_GFX_RXP5 P_GFX_RXN5 P_GFX_RXP6 P_GFX_RXN6 P_GFX_RXP7 P_GFX_RXN7 P_GFX_RXP8 P_GFX_RXN8 P_GFX_RXP9 P_GFX_RXN9 P_GFX_RXP10 P_GFX_RXN10 P_GFX_RXP11 P_GFX_RXN11 P_GFX_RXP12 P_GFX_RXN12 P_GFX_RXP13 P_GFX_RXN13 P_GFX_RXP14 P_GFX_RXN14 P_GFX_RXP15 P_GFX_RXN15
P_GPP_RXP0 P_GPP_RXN0 P_GPP_RXP1 P_GPP_RXN1 P_GPP_RXP2 P_GPP_RXN2 P_GPP_RXP3 P_GPP_RXN3
P_UMI_RXP0 P_UMI_RXN0 P_UMI_RXP1 P_UMI_RXN1 P_UMI_RXP2 P_UMI_RXN2 P_UMI_RXP3 P_UMI_RXN3
P_ZVDDP
PCI EXPRESS
GRAPHICS
GPP
UMI-LINK
P_GFX_TXP0 P_GFX_TXN0 P_GFX_TXP1 P_GFX_TXN1 P_GFX_TXP2 P_GFX_TXN2 P_GFX_TXP3 P_GFX_TXN3 P_GFX_TXP4 P_GFX_TXN4 P_GFX_TXP5 P_GFX_TXN5 P_GFX_TXP6 P_GFX_TXN6 P_GFX_TXP7 P_GFX_TXN7 P_GFX_TXP8 P_GFX_TXN8 P_GFX_TXP9
P_GFX_TXN9 P_GFX_TXP10 P_GFX_TXN10 P_GFX_TXP11 P_GFX_TXN11 P_GFX_TXP12 P_GFX_TXN12 P_GFX_TXP13 P_GFX_TXN13 P_GFX_TXP14 P_GFX_TXN14 P_GFX_TXP15 P_GFX_TXN15
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
P_UMI_TXP0 P_UMI_TXN0 P_UMI_TXP1 P_UMI_TXN1 P_UMI_TXP2 P_UMI_TXN2 P_UMI_TXP3 P_UMI_TXN3
P_ZVSS
AB2
PEG_TXP0_C
AB1
PEG_TXN0_C
AA3
PEG_TXP1_C
AA2
PEG_TXN1_C
Y5
PEG_TXP2_C
Y4
PEG_TXN2_C
Y2
PEG_TXP3_C
Y1
PEG_TXN3_C
W3
PEG_TXP4_C
W2
PEG_TXN4_C
V5
PEG_TXP5_C
V4
PEG_TXN5_C
V2
PEG_TXP6_C
V1
PEG_TXN6_C
U3
PEG_TXP7_C
U2
PEG_TXN7_C
T5 T4 T2 T1 R3 R2 P5 P4 P2 P1 N3 N2 M5 M4 M2 M1
AD5
PCIE_TXP_LAN_C
AD4
PCIE_TXN_LAN_C
AD2
PCIE_TXP_WLAN_C
AD1
PCIE_TXN_WLAN_C
AC3 AC2 AB5 AB4
AG2
UMI_TXP0_C
AG3
UMI_TXN0_C
AF4
UMI_TXP1_C
AF5
UMI_TXN1_C
AF1
UMI_TXP2_C
AF2
UMI_TXN2_C
AE2
UMI_TXP3_C
AE3
UMI_TXN3_C
AH11
P_ZVSS
C1 EV@0.1U/10V_4X C3 EV@0.1U/10V_4X C5 EV@0.1U/10V_4X C7 EV@0.1U/10V_4X C9 EV@0.1U/10V_4X C11 EV@0.1U/10V_4X C13 EV@0.1U/10V_4X C15 EV@0.1U/10V_4X
C17 0.1U/10V_4X C19 0.1U/10V_4X
C21 0.1U/10V_4X C23 0.1U/10V_4X C25 0.1U/10V_4X C27 0.1U/10V_4X
R2 196/F_6
C2 EV@0.1U/10V_4X C4 EV@0.1U/10V_4X C6 EV@0.1U/10V_4X C8 EV@0.1U/10V_4X C10 EV@0.1U/10V_4X C12 EV@0.1U/10V_4X C14 EV@0.1U/10V_4X C16 EV@0.1U/10V_4X
C18 0.1U/10V_4X C20 0.1U/10V_4X
C22 0.1U/10V_4X C24 0.1U/10V_4X C26 0.1U/10V_4X C28 0.1U/10V_4X
PEG_TXP0 PEG_TXN0 PEG_TXP1 PEG_TXN1 PEG_TXP2 PEG_TXN2 PEG_TXP3 PEG_TXN3 PEG_TXP4 PEG_TXN4 PEG_TXP5 PEG_TXN5 PEG_TXP6 PEG_TXN6 PEG_TXP7 PEG_TXN7
PCIE_TXP_LAN PCIE_TXN_LAN PCIE_TXP_WLAN PCIE_TXN_WLAN
UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3
PEG_TXP0 [14] PEG_TXN0 [14] PEG_TXP1 [14] PEG_TXN1 [14] PEG_TXP2 [14] PEG_TXN2 [14] PEG_TXP3 [14] PEG_TXN3 [14] PEG_TXP4 [14] PEG_TXN4 [14] PEG_TXP5 [14] PEG_TXN5 [14] PEG_TXP6 [14] PEG_TXN6 [14] PEG_TXP7 [14] PEG_TXN7 [14]
PCIE_TXP_LAN [28] PCIE_TXN_LAN [28] PCIE_TXP_WLAN [30] PCIE_TXN_WLAN [30]
UMI_TXP0 [8] UMI_TXN0 [8] UMI_TXP1 [8] UMI_TXN1 [8] UMI_TXP2 [8] UMI_TXN2 [8] UMI_TXP3 [8] UMI_TXN3 [8]
TO PCIE-LAN
TO WLAN
03
PEG X 8
Piledriver APU
HDT+ Connector
Debug only
A A
APU_TRST#[5]
APU_TRST#
5
R8 DEBUG@0_4 R9 DEBUG@10K_4 R10 DEBUG@10K_4 R11 DEBUG@10K_4
+1.5VSUS
J1
1
CPU_VDDIO1
3
GND1
5
GND2
7
GND3
9
CPU_TRST_L
11
CPU_DBRDY3
13
CPU_DBRDY2
15
CPU_DBRDY1
17
GND4
19
CPU_VDDIO2
*DEBUG@HDT+ HEADER
4
CPU_TCK CPU_TMS
CPU_TDI
CPU_TDO
CPU_PWROK_BUF
CPU_RST_L_BUF
CPU_DBRDY0
CPU_DBREQ_L CPU_PLLTEST0 CPU_PLLTEST1
2
APU_TCK
4
APU_TMS
6
APU_TDI
8
APU_TDO
10
APU_PWROK_BUF
12
APU_RST_L_BUF
14
APU_DBRDY
16
APU_DBREQ#
18
APU_TEST19_PLLTEST0
20
APU_TEST18_PLLTEST1
APU_TCK [5] APU_TMS [5] APU_TDI [5] APU_TDO [5] APU_PWROK_BUF [5] APU_RST_L_BUF [5] APU_DBRDY [5] APU_DBREQ# [5] APU_TEST19_PLLTEST0 [5] APU_TEST18_PLLTEST1 [5]
3
2
Close by HDT+ Conector
APU_TDI APU_TCK APU_TMS APU_TRST# APU_DBREQ#
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet
R3 1K_4 R4 1K_4 R5 1K_4 R6 1K_4 R7 1K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
APU 1/4(PCIE/UMI/GPP/HDT)
APU 1/4(PCIE/UMI/GPP/HDT)
APU 1/4(PCIE/UMI/GPP/HDT)
+1.5VSUS
Richland
Richland
Richland
347
347
347
1
of
1A
1A
1A
For Internal Check Only
5
4
3
2
1
04
M_B_DQ[0..63] [13]
1K/F_4
C30
M_B_A[15:0][13]
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14
M_B_BS#[2..0][13]
M_B_DM[7..0][13]
M_B_DQSP0[13] M_B_DQSN0[13] M_B_DQSP1[13] M_B_DQSN1[13] M_B_DQSP2[13] M_B_DQSN2[13] M_B_DQSP3[13] M_B_DQSN3[13] M_B_DQSP4[13] M_B_DQSN4[13] M_B_DQSP5[13] M_B_DQSN5[13] M_B_DQSP6[13] M_B_DQSN6[13] M_B_DQSP7[13] M_B_DQSN7[13]
M_B_CLKP0[13] M_B_CLKN0[13] M_B_CLKP1[13] M_B_CLKN1[13]
M_B_CKE0[13] M_B_CKE1[13]
M_B_ODT0[13] M_B_ODT1[13]
M_B_CS#0[13] M_B_CS#1[13]
R13
M_B_RAS#[13] M_B_CAS#[13] M_B_WE#[13]
M_B_RST#[13]
M_B_A15 M_B_BS#0
M_B_BS#1 M_B_BS#2
M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7
M_B_DQSP0 M_B_DQSN0 M_B_DQSP1 M_B_DQSN1 M_B_DQSP2 M_B_DQSN2 M_B_DQSP3 M_B_DQSN3 M_B_DQSP4 M_B_DQSN4 M_B_DQSP5 M_B_DQSN5 M_B_DQSP6 M_B_DQSN6 M_B_DQSP7 M_B_DQSN7
M_B_CLKP0 M_B_CLKN0 M_B_CLKP1 M_B_CLKN1
M_B_CKE0 M_B_CKE1
M_B_ODT0 M_B_ODT1
M_B_CS#0 M_B_CS#1
M_B_RAS# M_B_CAS# M_B_WE#
M_B_RST# M_B_EVENT#
M28 M27 M24 M25
W26
AF25 AG22 AH18 AD14
AG24 AG25 AG21
AF21 AG17 AG18 AH14 AG14
W27
T27 P24 P25 N27 N26
L26
U26
L27
K27 K25
K24 U27
T28 K28
D14 A18 A22 C25
C15 B15 E18 D18 E22 D22 B26 A26
R26 R27 P27 P28
J26 J27
Y28 V25
Y27 V24
V27 V28
J25
T25
U1B
MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15
MB_BANK0 MB_BANK1 MB_BANK2
MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7
MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7
MB_CLK_H0 MB_CLK_L0 MB_CLK_H1 MB_CLK_L1
MB_CKE0 MB_CKE1
MB_ODT0 MB_ODT1
MB_CS_L0 MB_CS_L1
MB_RAS_L MB_CAS_L MB_WE_L
MB_RESET_L MB_EVENT_L
MEMORY CHANNEL B
MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7
MB_DATA8
MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15
MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23
MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31
MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39
MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47
MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55
MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63
A14 B14 D16 E16 B13 C13 B16 A16
C17 B18 B20 A20 E17 B17 B19 C19
C21 B22 C23 A24 D20 B21 E23 B23
E24 B25 B27 D28 B24 D24 D26 C27
AG26 AH26 AF23 AG23 AG27 AF27 AH24 AE24
AE22 AH22 AE20 AH20 AD23 AD22 AD21 AD20
AF19 AE18 AE16 AH16 AG20 AG19 AF17 AD16
AG15 AD15 AG13 AD13 AG16 AF15 AE14 AF13
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7
M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15
M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23
M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31
M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39
M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47
M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55
M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
Piledriver APU
M_A_DQ[0..63] [12]
M_B_EVENT#[13]
220P/50V_4X
M21 M22
AA25
AD27 AC23 AD19 AC15
AE26 AD26 AB22 AA22 AB18 AA18 AA14 AA15
AA27
AA26
W24 W23
W20 W21
U20 R20 R21 P22 P21 N24 N23 N20 N21
U23
L24 L21
L20
U24 U21
L23
E14
J17
E21
F25
G14 H14 G18
H18 J21 H21 E27 E26
T21 T22 R23 R24
H28 H27
Y25
V22
V21
H25 T24
U1A
MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15
MA_BANK0 MA_BANK1 MA_BANK2
MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7
MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7
MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1
MA_CKE0 MA_CKE1
MA_ODT0 MA_ODT1
MA_CS_L0 MA_CS_L1
MA_RAS_L MA_CAS_L MA_WE_L
MA_RESET_L MA_EVENT_L
M_VREF M_ZVDDIO
MEMORY CHANNEL A
MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7
MA_DATA8
MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15
MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23
MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31
MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39
MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47
MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55
MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63
E13 J13 H15 J15 H13 F13 F15 E15
H17 F17 E19 J19 G16 H16 H19 F19
H20 F21 J23 H23 G20 E20 G22 H22
G24 E25 G27 G26 F23 H24 E28 F27
AB28 AC27 AD25 AA24 AE28 AD28 AB26 AC25
Y23 AA23 Y21 AA20 AB24 AD24 AA21 AC21
AA19 AC19 AC17 AA17 AB20 Y19 AD18 AD17
AA16 Y15 AA13 AC13 Y17 AB16 AB14 Y13
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7
M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15
M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23
M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31
M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39
M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47
M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55
M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
M_A_A[15:0][12]
D D
M_A_BS#[2..0][12]
M_A_DM[7..0][12]
M_A_DQSP0[12] M_A_DQSN0[12] M_A_DQSP1[12] M_A_DQSN1[12]
C C
+1.5VSUS +1.5VSUS
R12
B B
M_A_EVENT#[12]
1K/F_4
C29
220P/50V_4X
M_A_DQSP2[12] M_A_DQSN2[12] M_A_DQSP3[12] M_A_DQSN3[12] M_A_DQSP4[12] M_A_DQSN4[12] M_A_DQSP5[12] M_A_DQSN5[12] M_A_DQSP6[12] M_A_DQSN6[12] M_A_DQSP7[12] M_A_DQSN7[12]
M_A_CLKP0[12] M_A_CLKN0[12] M_A_CLKP1[12] M_A_CLKN1[12]
M_A_CKE0[12] M_A_CKE1[12]
M_A_ODT0[12] M_A_ODT1[12]
M_A_CS#0[12] M_A_CS#1[12]
M_A_RAS#[12] M_A_CAS#[12] M_A_WE#[12]
M_A_RST#[12]
+MEMVREF_CPU
+1.5VSUS
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_BS#0 M_A_BS#1 M_A_BS#2
M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7
M_A_DQSP0 M_A_DQSN0 M_A_DQSP1 M_A_DQSN1 M_A_DQSP2 M_A_DQSN2 M_A_DQSP3 M_A_DQSN3 M_A_DQSP4 M_A_DQSN4 M_A_DQSP5 M_A_DQSN5 M_A_DQSP6 M_A_DQSN6 M_A_DQSP7 M_A_DQSN7
M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1
M_A_CKE0 M_A_CKE1
M_A_ODT0 M_A_ODT1
M_A_CS#0 M_A_CS#1
M_A_RAS# M_A_CAS# M_A_WE#
M_A_RST# M_A_EVENT#
+M_ZVDDIO
R14 39.2/F_4
Place close to APU within 1"
Piledriver APU
+1.5VSUS
40 MIL
+5V
FANPWR = 1.6*VSET
1 4
APE8872M
Gnd shape
2
1
U2
VIN2VO
GND
/FON
GND GND
VSET
GND
5678
3
4
40 MIL
3 5 6 7 8
G995 layout notice
4
+5V_FAN
C35
2.2U/6.3V_6X
FANSIG1[35]
+3V
C36
0.01U/25V_4X
R15 *10K_4
FANSIG1
C37 *0.01U/25V_4X
CN1
1 2 3
85205-0300L
1206 change value
3
R16 1K/F_4
R17 1K/F_4
+MEMVREF_CPU
C32
0.47U/6.3V_4X
2
C33
0.1U/10V_4X
1206 add for flash screen
C34 1000P/50V_4X
C410 39P/50V_4N
Close to C33 C34
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet
Date: Sheet of
Date: Sheet of
PROJECT :
APU 2/4(DDR3 MEM I/F)
APU 2/4(DDR3 MEM I/F)
APU 2/4(DDR3 MEM I/F)
1
Richland
Richland
Richland
of
447
447
447
1A
1A
1A
2 1
2 1
<THC>
FANSIG1
*VPORT 0603 220K-V05
+5V_FAN
*VPORT 0603 220K-V05
5
C31 2.2U/6.3V_4X
VFAN1[35]
FAN Control
A A
D1
D2
For Internal Check Only
5
4
3
2
1
1017 AMD FAE suggest(DG_1.05)
APU_THERMTRIP#_VDDIOAPU_THERMTRIP#
+1.5VSUS
APU_SVT[41]
+1.5VSUS
FCH_PWRGD
R72 *0_4
R76 DEBUG@300_4
INT_HDMI_TXDP2 INT_HDMI_TXDN2
INT_HDMI_TXDP1 INT_HDMI_TXDN1
INT_HDMI_TXDP0 INT_HDMI_TXDN0
INT_HDMI_TXCP INT_HDMI_TXCN
APU_DP_TXP0 APU_DP_TXN0
APU_DP_TXP1 APU_DP_TXN1
APU_DP_TXP2 APU_DP_TXN2
APU_DP_TXP3 APU_DP_TXN3
INT_LVDS_TXP0 INT_LVDS_TXN0
INT_LVDS_TXP1 INT_LVDS_TXN1
INT_LVDS_TXP2 INT_LVDS_TXN2
INT_LVDS_TXP3 INT_LVDS_TXN3
CLK_APU_HCLKP CLK_APU_HCLKN
CLK_DP_NSSCP CLK_DP_NSSCN
SVC SVD
APU_SVT
+1.5VSUS
APU_RST# APU_PWRGD
R38 1K/F_4
APU_TDI[3] APU_TDO[3] APU_TCK[3] APU_TMS[3]
APU_TRST#[3] APU_DBRDY[3] APU_DBREQ#[3]
APU_VDD_RUN_FB_L APU_VDDP_FB_H APU_VDDNB_RUN_FB_H APU_VDDIO_RUN_FB_H APU_VDD_RUN_FB_H APU_VDDR_FB_H
+1.5VSUS
3
2
1
2
1 3
Q6 METR3904-G_200MA
+1.5VSUS
APU_RST_L_BUF [3]
APU_PWROK_BUF [3]
C40 0.1U/10V_4X C41 0.1U/10V_4X
C43 0.1U/10V_4X C45 0.1U/10V_4X
C38 0.1U/10V_4X C48 0.1U/10V_4X
C49 0.1U/10V_4X C50 0.1U/10V_4X
C51 0.1U/10V_4X C52 0.1U/10V_4X
C53 0.1U/10V_4X C54 0.1U/10V_4X
C55 0.1U/10V_4X C56 0.1U/10V_4X
C57 0.1U/10V_4X C58 0.1U/10V_4X
C59 0.1U/10V_4X C60 0.1U/10V_4X
C61 0.1U/10V_4X
C62 eDP@0.1U/10V_4X C63 eDP@0.1U/10V_4X
C64 eDP@0.1U/10V_4X C65 eDP@0.1U/10V_4X
Q3
FDV301N_200MA
R58 100K_4
R64 1K_4
R69 1K_4
INT_HDMI_TXDP2[27] INT_HDMI_TXDN2[27]
INT_HDMI_TXDP1[27]
DP0
HDMI
D D
Hudson-M3 VGA output
Note: CLK_APU_HCLKP/N is 100MHZ SSC
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC
C C
B B
APU_THERMTRIP#[7]
APU Core Power
A A
Fan
APU_RST#
APU_PWRGD
C70 DEBUG@0.1U/10V_4X
DP1
DP2
LVDS
APU_RST#[8] APU_PWRGD[8]
APU_PROCHOT#_VDDIO[8] CORE_PWM_PROCHOT#[41]
EC
H_PROCHOT#[8]
Debug only
U4
1 2 3
A1
Y1
GND
VCC
A2
Y2
*DEBUG@74LVC2G07
6 5 4
5
INT_HDMI_TXDN1[27] INT_HDMI_TXDP0[27]
INT_HDMI_TXDN0[27]
INT_HDMI_TXCP[27] INT_HDMI_TXCN[27]
INT_LVDS_TXP0[26] INT_LVDS_TXN0[26]
INT_LVDS_TXP1[26] INT_LVDS_TXN1[26]
INT_LVDS_TXP2[32] INT_LVDS_TXN2[32]
INT_LVDS_TXP3[32] INT_LVDS_TXN3[32]
+1.5VSUS +1.5VSUS
R34 300_4
C66 150P/50V_4N
APU_VDD_RUN_FB_L[41] APU_VDDP_FB_H[39] APU_VDDNB_RUN_FB_H[41] APU_VDDIO_RUN_FB_H[38] APU_VDD_RUN_FB_H[41] APU_VDDR_FB_H[39]
FCH_PWRGD[7,11]
+1.5VSUS
R62 10K_4
2
13
Q5 METR3904-G_200MA
APU_PROCHOT#_VDDIO CORE_PWM_PROCHOT# H_PROCHOT#
R75
DEBUG@300_4
APU_RST_L_BUF
+3V
APU_PWROK_BUF
APU_DP_TXP0[9] APU_DP_TXN0[9]
APU_DP_TXP1[9] APU_DP_TXN1[9]
APU_DP_TXP2[9] APU_DP_TXN2[9]
APU_DP_TXP3[9] APU_DP_TXN3[9]
CLK_APU_HCLKP[8] CLK_APU_HCLKN[8]
CLK_DP_NSSCP[8] CLK_DP_NSSCN[8]
R35 300_4
C67 150P/50V_4N
+1.5VSUS
R63 1K_4
R36 *1K/F_4
APU_PROCHOT#_VDDIO APU_THERMTRIP#_VDDIO
APU_ALERT
APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#
R41 0_4
TP17 TP18 TP19 TP20 TP21
SYS_SHDN#
4
INT_HDMI_TXDP2_C INT_HDMI_TXDN2_C
INT_HDMI_TXDP1_C INT_HDMI_TXDN1_C
INT_HDMI_TXDP0_C INT_HDMI_TXDN0_C
INT_HDMI_TXCP_C INT_HDMI_TXCN_C
APU_DP_TXP0_C APU_DP_TXN0_C
APU_DP_TXP1_C APU_DP_TXN1_C
APU_DP_TXP2_C APU_DP_TXN2_C
APU_DP_TXP3_C APU_DP_TXN3_C
INT_LVDS_TXP0_C INT_LVDS_TXN0_C
INT_LVDS_TXP1_C INT_LVDS_TXN1_C
INT_LVDS_TXP2_C INT_LVDS_TXN2_C
INT_LVDS_TXP3_C INT_LVDS_TXN3_C
APU_SIC APU_SID
VSS_SENSE
H_PROCHOT_EC[35]
SYS_SHDN# [15,37]
U1C
L3
DP0_TXP0
L2
DP0_TXN0
K5
DP0_TXP1
K4
DP0_TXN1
K2
DP0_TXP2
K1
DP0_TXN2
J3
DP0_TXP3
J2
DP0_TXN3
H5
DP1_TXP0
H4
DP1_TXN0
H2
DP1_TXP1
H1
DP1_TXN1
G3
DP1_TXP2
G2
DP1_TXN2
F2
DP1_TXP3
F1
DP1_TXN3
L9
DP2_TXP0
L8
DP2_TXN0
L5
DP2_TXP1
L6
DP2_TXN1
K8
DP2_TXP2
K7
DP2_TXN2
J6
DP2_TXP3
J5
DP2_TXN3
AE11
CLKIN_H
AD11
CLKIN_L
AB11
DISP_CLKIN_H
AA11
DISP_CLKIN_L
B3
SVC
A3
SVD
C3
SVT
AG12
SIC
AH12
SID
AF10
RESET_L
AB12
PWROK
AC10
PROCHOT_L
AE12
THERMTRIP_L
AF12
ALERT_L
H10
TDI
J10
TDO
F10
TCK
G10
TMS
F9
TRST_L
G9
DBRDY
H9
DBREQ_L
B4
VSS_SENSE
C5
VDDP_SENSE
A4
VDDNB_SENSE
A5
VDDIO_SENSE
C4
VDD_SENSE
B5
VDDR_SENSE
Piledriver APU
H_PROCHOT_EC
ANALOG/DISPLAY/MISC
DISPLAY
PORT 0
DISPLAY
PORT 1
DISPLAY
PORT 2
CLK
TEST DISPLAY PORT
CTRL SER.
JTAG
RSVD
SENSE
2
R59 100K_4
DP0_AUXP DP0_AUXN
DP1_AUXP DP1_AUXN
DP2_AUXP DP2_AUXN
DP3_AUXP DP3_AUXN
DP4_AUXP DP4_AUXN
DP5_AUXP DP5_AUXN
MISC.
DP0_HPD DP1_HPD DP2_HPD DP3_HPD DP4_HPD DP5_HPD
DP_BLON
DP_DIGON
DP_VARY_BL
DP_AUX_ZVSS
TEST6
TEST9 TEST10 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19 TEST20 TEST24
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST30_H
TEST30_L
TEST31
TEST32_H
TEST32_L
TEST35
FS1R2
DMAACTIVE_L
TEST4
TEST5
RSVD_1 RSVD_2 RSVD_3 RSVD_4
H_PROCHOT#
3
Q4
FDV301N_200MA
1
D1 D2
E1 E2
D5 D6
E5 E6
F5 F6
G5 G6
D3 E3 D7 E7 F7 G7
C6 B6 A6
C1 AD12
M18 N18 F11 G11 H11 J11 F12 G12 J12 H12 AE10 AD10 L10 M10 P19 R19 K22 T19 N19 AA12
W10 AC12
P18 R18
Y10 AA10 Y12 K21
VDDA_PWRGD[35,39,41,42]
INT_HDMI_AUXP INT_HDMI_AUXN
APU_DP_AUXP_C APU_DP_AUXN_C
INT_LVDS_AUXP_C INT_LVDS_AUXN_C
INT_HDMI_HPD
INT_VGA_HPD_Q INT_LVDS_HPD_Q
APU_BL_EN_R APU_DIGON_R APU_VARY_BL
DP_AUX_ZVSS
APU_TEST9 APU_TEST10 APU_TEST14_BP0 APU_TEST15_BP1 APU_TEST16_BP2 APU_TEST17_BP3 APU_TEST18_PLLTEST1 APU_TEST19_PLLTEST0 APU_TEST20_SCANCLK2 APU_TEST24_SCANCLK1 APU_TEST25_H APU_TEST25_L APU_TEST28_H APU_TEST28_L
M_TEST
APU_TEST35 FS1R2
TEST4 TEST5
R30 150/F_4
+3V_S5
FS1R2
C42 0.1U/10V_4X C44 0.1U/10V_4X
C46 0.1U/10V_4X C47 0.1U/10V_4X
R28 eDP@0_4 R29 eDP@0_4
R53 10K_4
D10 RB500V-40_100MA
R244 *20K/F_4
BOOT VOLTAGE
SVC SVD
000
1
0
111
VFIX_+VDD =VCC/GND
VFIX_+VDD =OPEN
1.1 1.1
1.0 1.2
0.9 1.0
0.8 0.8
CPU Thermal sensor / MB Local TEMP
+3VPCU
R77 150_4
C69
0.1U/10V_4X
Rset(Kohm)=0.0012T*T-0.9308T+96.147,Shut down on 76dgree Hysteresis is 30C
5
4
U5
VCC
HYST
G708T1U
3
R78
32.4K/F_4
1
SET
2
GND
3
THER_SHD# SYS_SHDN#
OT#
R79 0_4
INT_HDMI_AUXP [27] INT_HDMI_AUXN [27]
APU_DP_AUXP APU_DP_AUXN
INT_LVDS_AUXP INT_LVDS_AUXN
INT_HDMI_HPD [27]
APU_BL_EN [32] APU_DIGON [32] APU_VARY_BL [26]
TP1 TP2 TP3 TP4 TP5 TP6
TP7 TP8 TP9 TP10 TP11 TP12
TP13
TP14
TP15 TP16
APU_TEST18_PLLTEST1 [3] APU_TEST19_PLLTEST0 [3]
+1.5VSUS
FS1R1 signals is for detect CPU TYPE and protect it. FS1R1 CPU this pin is N.C FS1R2 CPU this pin is LOW can remove it at MP
R37 1K_4
DMAACTIVE_L
DMAACTIVE_L controls entry and exit from the sleep and power states
Note: To override VID,Remove Rd, Re, Rf, install Rc set VID via SVC & SVD option RES.
SVC SVD APU_PWRGD
APU_PWRGD have pull up 300ohm to +1.5V on page 4
HDMI
APU_DP_AUXP [9] APU_DP_AUXN [9]
INT_LVDS_AUXP [26] INT_LVDS_AUXN [26]
DMAACTIVE_L [8]
M_TEST CONNECTION TBD
R60 0_4 R61 0_4
Re
R65 0_4
Rf
2ND_MBCLK[25,35]
2ND_MBDATA[25,35]
2
INT_HDMI_AUXP INT_HDMI_AUXN
APU_DP_AUXP_C
FCH VGA
LVDS
APU_DP_AUXN_C INT_LVDS_AUXP_C
INT_LVDS_AUXN_C
INT_LVDS_HPD_Q
INT_VGA_HPD_Q
+1.5VSUS+1.5VSUS +1.2V_VDDPR
R42 *39.2/F_4
APU_TEST35M_TEST
R49
39.2/F_4
R55 *1K_4
R66 *220_4
Ra RbRdRc
2ND_MBCLK APU_SIC
2ND_MBDATA
R181 *1.8K_4C39 0.1U/10V_4X R191 *1.8K_4
R20 1.8K_4 R21 1.8K_4
R22 1.8K_4 R23 1.8K_4
+3V
R26 LDS@1K_4
34
LDS@2N7002KDW_115MA
5
Q1B
R330 eDP@0_4
+3V
R32 1K_4
34
2N7002KDW_115MA
5
Q2B
R43 300_4
R50 *300_4
+1.5VSUS
R57
R56
*2.2K_4
*1K_4
R68
R67
*220_4
*220_4
D3 RB500V-40_100MA
+5V
6
1
+5V
APU_TEST25_L
APU_TEST18_PLLTEST1 APU_TEST19_PLLTEST0 APU_TEST20_SCANCLK2 APU_TEST24_SCANCLK1 APU_TEST14_BP0 APU_TEST16_BP2 APU_TEST17_BP3
APU_TEST25_H
APU_SVC APU_SVD APU_PWRGD_SVID_REG
C68 *0.1U/10V_4X
R70 2K/F_4
Q7
2
METR3904-G_200MA
13
21
D4 RB500V-40_100MA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
Date: Sheet of
Date: Sheet
INT_LVDS_AUXP_C INT_LVDS_AUXN_C
For eDP Panel
R27 LDS@10K_4
LDS@2N7002KDW_115MA
2
INT_LVDS_HPD
Q1A
6
1
R31 100K_4
R33 10K_4
2N7002KDW_115MA
2
FCH_VGA_HPD
Q2A
R39 100K_4
R40 510/F_4
R44 1K_4 R45 1K_4 R46 1K_4 R47 1K_4 R48 *1K_4 R51 *1K_4 R52 *1K_4
R54 510/F_4
APU_SVC [41] APU_SVD [41] APU_PWRGD_SVID_REG [41]
for normal operation open Ra , Rb,Rc
R73 2K/F_4
Q8
2
METR3904-G_200MA
13
APU_SID
21
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
APU 3/4(DISPLAY/MISC)
APU 3/4(DISPLAY/MISC)
APU 3/4(DISPLAY/MISC)
05
R24 *eDP@100K_4 R25 *eDP@100K_4
INT_LVDS_HPD [26,32]
FCH_VGA_HPD [9]
+1.5VSUS+1.5VSUS
R71
R74
1K/F_4
1K/F_4
Richland
Richland
Richland
547
547
1
547
+3V
1A
1A
1A
of
For Internal Check Only
5
APU POWER TABLE
PIN NAME VDD VDDNB VDDIO
VDDR +1.2V
D D
VDDA
C91 ESD@39P/50V_4N
NET NAME +VDD_CORE +VDDNB_CORE +1.5VSUS +1.2V_VDDP +1.2V_VDDR +2.5V_VDDA
B2A add for ESD
C77 ESD@39P/50V_4N
VOLTAGE
+1.1V
?? +1.5V +1.2VVDDP
+2.5V
C92 22U/6.3V_6X
C93 22U/6.3V_6X
+VDD_CORE +VDD_CORE
+VDDNB_CORE
C78 10U/6.3V_6X
1026 change for EOD
C104 22U/6.3V_6X
C111
0.22U/10V_4X
+1.2V_VDDP
C99
0.22U/10V_4X
+VDDNB_CAP
C105 180P/50V_4N
C112
0.22U/10V_4X
C100 180P/50V_4N
C113
0.22U/10V_4X
VDDP_A + VDDP_B = 5A
C126
C127
22U/6.3V_6X
10U/6.3V_6X
C101 180P/50V_4N
+VDDNB_CORE
C114
0.22U/10V_4X
C124 180P/50V_4N
C128 10U/6.3V_6X
C102 180P/50V_4N
+1.5VSUS
C115
0.22U/10V_4X
C125 180P/50V_4N
C129 10U/6.3V_6X
C98
0.22U/10V_4X
C C
C103 22U/6.3V_6X
VDDIO=4.6A (Up to DDR3_1600 @ 1.5V)
C110
0.22U/10V_4X
B B
+1.2V_VDDPR
R80 0_8
1026 change for EOD
C142
4.7U/6.3V_6X
C136 180P/50V_4N
C143
0.22U/10V_4X
C133
0.22U/10V_4X
+2.5V_VDDA
A A
C134
0.22U/10V_4X
L1 HCB1608KF-221T20_2A
C135 180P/50V_4N
VDDA = 0.75A
F8 H6
J1
J14
P6
P10
J16 J18
J9
K19
K3
K17
M3
K6 V10 V18
V3
F3 L18
V6
W1 T18 Y14
AA1 AB6 AC1
R1 P3
K10
H3
M19
C8
D10
B8
B12
C9 A9
A10
A8 A11 E10 E11
C10
H26
K20
J28 K23 K26 L22 L25 L28
M20 M23 M26 N22 N25 N28
P20 P23 P26
AA28
AH6 AH5 AH4 AH3 AH7
AB10
C144 3300P/50V_4X
4
U1D
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31
VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5 VDDNB_6 VDDNB_7 VDDNB_8 VDDNB_9 VDDNB_10 VDDNB_11 VDDNB_12
VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4 VDDIO_5 VDDIO_6 VDDIO_7 VDDIO_8 VDDIO_9 VDDIO_10 VDDIO_11 VDDIO_12 VDDIO_13 VDDIO_14 VDDIO_15 VDDIO_16 VDDIO_17 VDDIO_18
VDDP VDDP VDDP VDDP VDDP
VDDA
VDDNB_13 VDDNB_14 VDDNB_15 VDDNB_16 VDDNB_17 VDDNB_18 VDDNB_19 VDDNB_20 VDDNB_21 VDDNB_22 VDDNB_23
VDDNB_CAP VDDNB_CAP
VDDIO_19 VDDIO_20 VDDIO_21 VDDIO_22 VDDIO_23 VDDIO_24 VDDIO_25 VDDIO_26 VDDIO_27 VDDIO_28 VDDIO_29 VDDIO_30 VDDIO_31 VDDIO_32 VDDIO_33 VDDIO_34 VDDIO_35 VDDIO_36
Piledriver APU
C145 ESD@39P/50V_4N
B2A add for ESD
VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49 VDD_50 VDD_51 VDD_52 VDD_53 VDD_54 VDD_55 VDD_56 VDD_57 VDD_58 VDD_59 VDD_60 VDD_61 VDD_62 VDD_63
VDDR VDDR VDDR VDDR
3
R11 T10 H8 G1 U11 W11 W13 W15 W17 W19 AB3 AD3 AD6 AE1 L1 Y6 M6 N11 N1 T3 T6 U19 U1 Y16 Y18 Y3 D4 F4 AF6 AF3 L11
C11 C12 D9 D8 D12 D11 B11 A12 B10 E12 B9
K13 K12
T23 T26 U22 U25 U28 Y26 T20 R28 R25 R22 V20 V23 V26 W22 W25 W28 Y24 G28
AG10 AH8 AH9 AH10
25A Maximum IDDNBspike 33A
+VDDNB_CORE
+VDDNB_CAP
+1.5VSUS
C116 22U/6.3V_6X
VDDR = 3.3A (Up to DDR3_1600 @ 1.2V)
C130 10U/6.3V_6X
36A Maximum IDDspike 50A
C79 22U/6.3V_6X
C82 22U/6.3V_6X
C94
0.22U/10V_4X
DECOUPLING between PROCESSOR and DIMMs
+1.5VSUS
C117 22U/6.3V_6X
+1.2V_VDDR
C131 10U/6.3V_6X
1026 change for EOD
C137
0.22U/10V_4X
C138
0.22U/10V_4X
C74 22U/6.3V_6X
C83 22U/6.3V_6X
C95
0.22U/10V_4X
C75 22U/6.3V_6X
C89 22U/6.3V_6X
C96 180P/50V_4N
C76 22U/6.3V_6X
C84 22U/6.3V_6X
C85 180P/50V_4N
Across VDDIO and VSS split
C106
0.22U/10V_4X
C118 22U/6.3V_6X
C132 10U/6.3V_6X
C139 1000P/50V_4X
C107
0.22U/10V_4X
C119 22U/6.3V_6X
R81 0_8
C140 180P/50V_4N
C108 180P/50V_4N
C120
4.7U/6.3V_6X
+1.2V_VDDPR
C141 180P/50V_4N
C80 22U/6.3V_6X
C90 22U/6.3V_6X
C86
0.01U/25V_4X
C121
4.7U/6.3V_6X
C88 ESD@39P/50V_4N
C97
0.01U/25V_4X
C109 180P/50V_4N
C122
4.7U/6.3V_6X
2
+VDD_CORE
C71 470P/50V_4X
C87
0.01U/25V_4X
C72 470P/50V_4X
C81 ESD@39P/50V_4N
C123
4.7U/6.3V_6X
C73 470P/50V_4X
EMI
W18
AB17 AC22 AE21 AF24 AH23 AH25
G13 G15 G17 G19 G21 G23 G25
AC11
M11
AF11
W16
U1E
J20
VSS_1
L4
VSS_2
R7
VSS_3 VSS_4
A15
VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11
B7
VSS_12
C14
VSS_13
C16
VSS_14
C2
VSS_15
C20
VSS_16
C22
VSS_17
C24
VSS_18
C26
VSS_19
C28
VSS_20
D13
VSS_21
D15
VSS_22
D17
VSS_23
D19
VSS_24
D23
VSS_25
D25
VSS_26
D27
VSS_27
E4
VSS_28
E9
VSS_29
F14
VSS_30
F16
VSS_31
F18
VSS_32
F20
VSS_33
F22
VSS_34
F26
VSS_35
F28
VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43
G4
VSS_44
J22
VSS_45
J24
VSS_46
J4
VSS_47
J7
VSS_48
K11
VSS_49
K14
VSS_50
K9
VSS_51 VSS_52
L19
VSS_53
L7
VSS_54 VSS_55 VSS_56
V19
VSS_57
V9
VSS_58 VSS_59
W4
VSS_60
W7
VSS_61
Y11
VSS_62
Y20
VSS_63
Y22
VSS_64
Y9
VSS_65
A17
VSS_66
A13
VSS_68
K16
VSS_67
F24
VSS_69
G8
VSS_70
H7
VSS_71
J8
VSS_72
Piledriver APU
VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98
VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145
A19 A21 A23 A25 A7 AA4 AA7 AB13 AB15 AB19 AB21 AB23 AB25 AB27 AB9 AC14 AC16 AC18 AC20 AC24 AC26 AC28 AC4 AC7 AD9 AE13 AE15 AE17 M9 N10 N4 N7 R10 R4 T11 T9 U10 U18 U4 U7 V11 AE19 AE23 AE25 AE27 AE4 AE7 AF14 AF16 AF18 AF20 AF22 AF26 AF28 AF9 AG4 AG7 AH13 AH15 AH17 AH19 AH21 P9 C18 D21 W14 P11 C7 E8 K18 W12
1
06
5
4
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet
Date: Sheet of
2
Date: Sheet of
PROJECT :
APU 4/4(POWER/GND)
APU 4/4(POWER/GND)
APU 4/4(POWER/GND)
1
Richland
Richland
Richland
of
647
647
647
1A
1A
1A
For Internal Check Only
5
4
3
2
1
+3V_S5
NC,no install by default
R383 *2.2K_4
R382 *2.2K_4
D D
C C
Note:LLB#, WAKE# and PWR_BTN need pull up to +3VPCU only if S5+ mode is supported
B B
A A
R344 *2.2K_4
+3V
R272 2.2K_4 R270 2.2K_4 R271 10K_4
+3V_S5
+3V_S5
RSMRST_GATE#[35]
R369 2.2K_4 R384 2.2K_4 R698 *2.2K_4
R685 4.7K_4 R375 2.2K_4 R96 10K_4 R97 10K_4 R407 10K_4 R368 10K_4 R374 10K_4 R101 10K_4
FCH_TEST0
FCH_TEST1
FCH_TEST2
SMB_RUN_CLK SMB_RUN_DAT
GPIO65
SMB_LAN_CLK SMB_LAN_DAT VGA_PD
APU_THERMTRIP#
PWR_BTN#
FCH_ODD_EN
ODD_PRSNT# PCIE_WAKE#
USB_SC_OC# USB_NORMAL_OC# USB_DB_OC#
R430 0_4
remove pull hi ( chip internal have pull hi )
For Dimm
For Lan&WiFi
FCH_ODD_EN [33]
USB_DB_OC#[25,35] USB_SC_OC#[25,35]
USB_NORMAL_OC#[25,35]
GEVENT12# ~18# are +3V_S5
RSMRST#
R432 22K_4
G2 *SHORT_PAD
APU_THERMTRIP#[5]
FCH_PCIE_LAN_CLKREQ#[28]
FCH_PCIE_WLAN_CLKREQ#[30]
VGA_PD for power control
PCIE_REQ_GPU#[15]
ODD_PRSNT#[33]
USB_DB_OC# USB_NORMAL_OC#
+3V_S5
R662 10K_4
12
SYS_RST#
*SHORT_PAD
T1 T2
T3
SLP_S3#[24,35] SLP_S5#[35]
DNBSWON#[35] FCH_PWRGD[5,11]
EC_A20GATE[35] EC_KBRST#[35] EC_EXT_SCI#[35]
T8
LPCPD#[35]
PCIE_WAKE#[28,30]
T9
C379 33P/50V_4N
BOARD_ID8[9] BOARD_ID9[9]
PCBEEP[29] SMB_RUN_CLK[12,13] SMB_RUN_DAT[12,13] SMB_LAN_CLK[26,30,34] SMB_LAN_DAT[26,30,34]
VGA_PD[10]
SPI_HOLD#[9]
ODD_MD#[33]
R245 0_4
R711 0_4
R710 0_4
HDaudio interface are +3V_S5
+3V_S5
R286 *10K_4
G5
12
APU_MEMHOT#
GEVENT22# GEVENT21#
SLP_S3# SLP_S5# DNBSWON# FCH_PWRGD
+3V
T10
T11
T12
R102 EV@0_4
T15 T16 T17
5 6 3
2 1
R734 *10KX8
BOARD_ID10[9]
PE_GPIO0[24] PE_GPIO1[24,43,44]
*EV@10K_4
KSO_5
R682 0_4
FCH_TEST0 FCH_TEST1
EC_A20GATE EC_KBRST# EC_EXT_SCI#
LPCPD# SYS_RST#
PCIE_WAKE#
GEVENT20#
R288 10K/F_4
Provided test points from checklist
FCH_TEST2
GEVENT23#
APU_THERMTRIP#
RSMRST#
R329
WD_PWRGD
FCH_PCIE_LAN_CLKREQ# BOARD_ID8 BOARD_ID9 TRAVIS_EN#
PCBEEP SMB_RUN_CLK SMB_RUN_DAT SMB_LAN_CLK SMB_LAN_DAT
GPIO62
FCH_PCIE_WLAN_CLKREQ#
GPIO51
VGA_PD SPI_HOLD#
GPIO65
FCH_BLINK
ODD_MD# GEVENT17# ODD_PRSNT# FCH_JTAG_TDO FCH_JTAG_TCK FCH_JTAG_TDIUSB_SC_OC# FCH_JTAG_RST#
ACZ_BCLK_R ACZ_SDOUT_R ACZ_SDIN0
74
ACZ_SDIN1
8
ACZ_SDIN2_R
9
FCH_ODD_EN
10
ACZ_SYNC_R ACZ_RST#_R
PE_GPIO0 PE_GPIO1
R354 *EV@10K_4
+3V_S5+3V_S5
PWR_BTN#
T18
KSO_5
U3A
AB6
PCIE_RST2#/GEVENT4#
R2
RI#/GEVENT22#
W7
SPI_CS3#/GBE_STAT1/GEVENT21#
T3
SLP_S3#
W2
SLP_S5#
J4
PWR_BTN#
N7
PWR_GOOD
T9
TEST0
T10
TEST1/TMS
V9
TEST2
AE22
GA20IN/GEVENT0#
AG19
KBRST#/GEVENT1#
R9
PME#/GEVENT3#
C26
LPC_SMI#/GEVENT23#
T5
LPC_PD#/GEVENT5#
U4
SYS_RESET#/GEVENT19#
K1
WAKE#/GEVENT8#
V7
IR_RX1/GEVENT20#
R10
THRMTRIP#/SMBALERT#/GEVENT2#
AF19
WD_PWRGD
U2
RSMRST#
AG24
CLK_REQ4#/SATA_IS0#/GPIO64
AE24
CLK_REQ3#/SATA_IS1#/GPIO63
AE26
SMARTVOLT1/SATA_IS2#/GPIO50
AF22
CLK_REQ0#/SATA_IS3#/GPIO60
AH17
SATA_IS4#/FANOUT3/GPIO55
AG18
SATA_IS5#/FANIN3/GPIO59
AF24
SPKR/GPIO66
AD26
SCL0/GPIO43
AD25
SDA0/GPIO47
T7
SCL1/GPIO227
R7
SDA1/GPIO228
AG25
CLK_REQ2#/FANIN4/GPIO62
AG22
CLK_REQ1#/FANOUT4/GPIO61
J2
IR_LED#/LLB#/GPIO184
AG26
SMARTVOLT2/SHUTDOWN#/GPIO51
V8
DDR3_RST#/GEVENT7#/VGA_PD
W8
GBE_LED0/GPIO183
Y6
SPI_HOLD#/GBE_LED1/GEVENT9#
V10
GBE_LED2/GEVENT10#
AA8
GBE_STAT0/GEVENT11#
AF25
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#
M7
BLINK/USB_OC7#/GEVENT18#
R8
USB_OC6#/IR_TX1/GEVENT6#
T1
USB_OC5#/IR_TX0/GEVENT17#
P6
USB_OC4#/IR_RX0/GEVENT16#
F5
USB_OC3#/AC_PRES/TDO/GEVENT15#
P5
USB_OC2#/TCK/GEVENT14#
J7
USB_OC1#/TDI/GEVENT13#
T8
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
AB3
AZ_BITCLK
AB1
AZ_SDOUT
AA2
AZ_SDIN0/GPIO167
Y5
AZ_SDIN1/GPIO168
Y3
AZ_SDIN2/GPIO169
Y1
AZ_SDIN3/GPIO170
AD6
AZ_SYNC
AE4
AZ_RST#
K19
PS2_DAT/SDA4/GPIO187
J19
PS2_CLK/CEC/SCL4/GPIO188
J21
SPI_CS2#/GBE_STAT2/GPIO166
D21
PS2KB_DAT/GPIO189
C20
PS2KB_CLK/GPIO190
D23
PS2M_DAT/GPIO191
C22
PS2M_CLK/GPIO192
F21
KSO_0/GPIO209
E20
KSO_1/GPIO210
F20
KSO_2/GPIO211
A22
KSO_3/GPIO212
E18
KSO_4/GPIO213
A20
KSO_5/GPIO214
J18
KSO_6/GPIO215
H18
KSO_7/GPIO216
G18
KSO_8/GPIO217
B21
KSO_9/GPIO218
K18
KSO_10/GPIO219
D19
KSO_11/GPIO220
A18
KSO_12/GPIO221
C18
KSO_13/GPIO222
B19
KSO_14/XDB0/GPIO223
B17
KSO_15/XDB1/GPIO224
A24
KSO_16/XDB2/GPIO225
D17
KSO_17/XDB3/GPIO226
33_S5
33_S5
HUDSON-M3
Part 4 of 5
33_S0
33_S0
33_S5
33_S5
33_S5
33_S5
33_S5
33_S5
33_S0 33_S0 33_S0 33_S0
33_S5 33_S5
33_S0
33_S5
33_S5
33_S5 33_S5
33_S5
33_S5/1.5V_S5 33_S5/1.5V_S5 33_S5/1.5V_S5 33_S5/1.5V_S5
33_S5
33_S5 33_S5 33_S5
33_S5 33_S5 33_S5 33_S5 33_S5 33_S5 33_S5
33_S5
33_S5 33_S5 33_S5
33_S5
EMBEDDED
33_S5
CTRL
33_S5 33_S5
33_S5
33_S5
33_S5
33_S5
To Azalia
ACZ_SDOUT_R ACZ_SYNC_R ACZ_BCLK_R ACZ_BITCLK
ACZ_RST#_R ACZ_RST#
R392 33_4 R391 33_4
R406 33_4
R357 33_4
USBCLK/14M_25M_48M_OSC
33_S0
33_S0
33_S5 33_S5
33_S5
HD
33_S0 33_S0 33_S0 33_S0
33_S5
33_S5 33_S5
33_S5 33_S5
AUDIO
33_S5
33_S5
33_S5
33_S5
USB_FSD1P/GPIO186
USB
MISC
33_S5
USB_FSD0P/GPIO185
USB
1.1
ACPI / WAKE UP
EVENTS
33_S5
USB
2.0
GPIO
33_S0
33_S0
33_S5
USB
OC
33_S5
USB
3.0
33_S5 33_S5
33_S5
SCL3_LV/GPIO195
33_S5 33_S5 33_S5
EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
33_S5
C571
SDA3_LV/GPIO196 EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198
EC_PWM3/EC_TIMER3/GPIO200
33_S5 33_S5 33_S5 33_S5 33_S5 33_S5 33_S5 33_S5
ACZ_SDOUT ACZ_SYNC
*22P/50V_4N
ACZ_SDIN0
USB_RCOMP
USB_FSD1N
USB_FSD0N
USB_HSD13P
USB_HSD13N
USB_HSD12P
USB_HSD12N
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9P USB_HSD9N
USB_HSD8P USB_HSD8N
USB_HSD7P USB_HSD7N
USB_HSD6P USB_HSD6N
USB_HSD5P USB_HSD5N
USB_HSD4P USB_HSD4N
USB_HSD3P USB_HSD3N
USB_HSD2P USB_HSD2N
USB_HSD1P USB_HSD1N
USB_HSD0P USB_HSD0N
USBSS_CALRP USBSS_CALRN
USB_SS_TX3P USB_SS_TX3N
USB_SS_RX3P USB_SS_RX3N
USB_SS_TX2P USB_SS_TX2N
USB_SS_RX2P USB_SS_RX2N
USB_SS_TX1P USB_SS_TX1N
USB_SS_RX1P USB_SS_RX1N
USB_SS_TX0P USB_SS_TX0N
USB_SS_RX0P USB_SS_RX0N
SCL2/GPIO193 SDA2/GPIO194
KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208
G8 B9
USB_RCOMP_SB
H1 H3
H6 H5
H10 G10
K10 J12
G12
USBP11+
F12
USBP11-
K12
USBP10+
K13
USBP10-
B11 D11
E10
USBP8+
F10
USBP8-
C10
USBP7+
A10
USBP7-
H9
USBP6+_LCD
G9
USBP6-_LCD
A8
USBP5+
C8
USBP5-
F8 E8
C6 A6
C5
USBP2+
A5
USBP2-
C1
USBP1+
C3
USBP1-
E1
USBP0+
E3
USBP0-
C16
USBSS_CALRP
A16
USBSS_CALRN
A14 C14
C12 A12
D15 B15
E14 F14
F15
USB3_TXP1
G15
USB3_TXN1
H13
USB3_RXP1
G13
USB3_RXN1
J16
USB3_TXP0
H16
USB3_TXN0
J15
USB3_RXP0
K15
USB3_RXN0
H19
SMB_EC_CLK
G19
SMB_EC_DAT
G22 G21 E22 H22 J22
EC_PWM2
H21 K21
K22 F22 F24 E24 B23 C24 F18
ACZ_SDOUT [29]
ACZ_SYNC [29]
ACZ_BITCLK [29]
ACZ_RST# [29]
ACZ_SDIN0 [29]
R647 11.8K/F_6
T4 T5
Note: USB P/N pairs with trace lengths up to 10"
T6 T7
USBP11+ [25] USBP11- [25]
USBP10+ [25] USBP10- [25]
1114 add touch screen function close to FCH
2 4
1 3
USBP7+ [30] USBP7- [30]
USBP6+_LCD [32] USBP6-_LCD [32]
USBP5+ [31] USBP5- [31]
RP24 *TSN@0X2
USB3.0 W/O S&C
USB3.0 S&C
USBP8+_R [27] USBP8-_R [27]
WLAN
CCD on LVDS
Card Reader
C3A
2
RP25 TSN@0X2
R646 U3@1K/F_4 R642 U3@1K/F_4
within 1000mil 35ohm
R318 *0_4 R315 *0_4
EC
I2Ce_1(M)
I2Ce_2(M)
I2Ce_3(M)
1
4
3
USBP1+ [25] USBP1- [25]
USBP0+ [25] USBP0- [25]
+FCH_VDD_11_SSUSB_S
USB3_TXP1 [25] USB3_TXN1 [25]
USB3_RXP1 [25] USB3_RXN1 [25]
USB3_TXP0 [25] USB3_TXN0 [25]
USB3_RXP0 [25] USB3_RXN0 [25]
MBCLK [35,36] MBDATA [35,36]
EC_PWM2 [11]
FCH
I2Cf_2(M) Charger Battery
EEPROM ALLAPU
VGA Thermal
USB2.0
USB2.0 debug port
USB3.0 Port 2
USB3.0 S&C
GPIO193 ~196 are +3V_S5
Device
I2C_Device(S)
I2Cf_3(M) APU
I2Cf_1(M)
Lan WLan
I2Cf_0(M) Dimm Clk Gen
Touch Screen
HUB3
HUB2
HUB1
ALL/S5
S5
S5
S0
EC will Conflict with FCH, did not mount R113&R114
07
5
4
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
2
Date: Sheet of
PROJECT :
FCH 1/5(GPIO/USB/AZ)
FCH 1/5(GPIO/USB/AZ)
FCH 1/5(GPIO/USB/AZ)
1
Richland
Richland
Richland
of
747
747
747
1A
1A
1A
For Internal Check Only
5
4
3
2
1
08
APU_PCIE_RST#[24,28,30]
C842 150P/50V_4N
D D
Note: CLK_FCH_SRCP/N is 100MHZ SSC
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC
Note: CLK_PCIE_TRAVISP/N is 100MHZ non-SSC Note: CLK_APU_HCLKP/N is 100MHZ SSC Note: CLK_PCIE_VGAP/N is 100MHZ SSC
C C
B B
Note: GPP_CLK(0:8)P/N is 100MHZ SSC capable
CLK_DP_NSSCP[5] CLK_DP_NSSCN[5]
CLK_APU_HCLKP[5] CLK_APU_HCLKN[5]
CLK_PCIE_VGAP[14] CLK_PCIE_VGAN[14]
CLK_PCIE_WLANP[30] CLK_PCIE_WLANN[30]
CLK_PCIE_LANP[28] CLK_PCIE_LANN[28]
1205 for FAE suggestion change to 10pF from 22pF
PLTRST#[27,30,31,35] PCI_CLK1 [11] UMI_RXP0[3]
UMI_RXN0[3] UMI_RXP1[3] UMI_RXN1[3] UMI_RXP2[3] UMI_RXN2[3] UMI_RXP3[3] UMI_RXN3[3]
UMI_TXP0[3] UMI_TXN0[3] UMI_TXP1[3] UMI_TXN1[3] UMI_TXP2[3] UMI_TXN2[3] UMI_TXP3[3] UMI_TXN3[3]
C397
C381
PLTRST#
UMI_RXP1 UMI_RXN1 UMI_RXP2 UMI_RXN2 UMI_RXP3 UMI_RXN3
UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3
+1.1V_PCIE_VDDR
+1.1V_CKVDD
CLK_DP_NSSCP CLK_DP_NSSCN
CLK_APU_HCLKP CLK_APU_HCLKN
CLK_PCIE_LANP INT_CLK_PCIE_LANP
10P/50V_4N
23
Y6 LAN@25MHZ_30
4 1
10P/50V_4N
1204 change Crystal to 3225
A A
R670 33_4 C843 150P/50V_4N
R669 33_4 R434 0_4
C767 0.1U/10V_4X C764 0.1U/10V_4X C765 0.1U/10V_4X C766 0.1U/10V_4X C770 0.1U/10V_4X C771 0.1U/10V_4X C773 0.1U/10V_4X C774 0.1U/10V_4X
R275 590/F_4 R276 2K/F_4
PCIE_RST#_R A_RST#
UMI_RXP0_CUMI_RXP0 UMI_RXN0_CUMI_RXN0 UMI_RXP1_C UMI_RXN1_C UMI_RXP2_C UMI_RXN2_C UMI_RXP3_C UMI_RXN3_C
PCIE_CALRP PCIE_CALRN
within 1000mil 50~55ohm
3
3
3
3
3
T26
CLK_CALRN
INT_CLK_FCH_SRCP INT_CLK_FCH_SRCN
INT_CLK_DP_NSSCP INT_CLK_DP_NSSCN
INT_CLK_PCIE_TRAVISP INT_CLK_PCIE_TRAVISN
INT_CLK_APU_HCLKP INT_CLK_APU_HCLKN
INT_CLK_PCIE_VGAPCLK_PCIE_VGAP INT_CLK_PCIE_VGANCLK_PCIE_VGAN
INT_CLK_PCIE_WLANPCLK_PCIE_WLANP INT_CLK_PCIE_WLANNCLK_PCIE_WLANN
INT_CLK_PCIE_LANNCLK_PCIE_LANN
CLK_48M_CARD_R
25M_X1
25M_X2
R274 2K/F_4
TP62 TP63
241
RP22 0X2
TP24 TP25
241
RP20 0X2
241
RP23 0X2
241
RP12 0X2
241
RP18 0X2
Card Reader
R715 0_4
R273 1M/F_4
AE30 AE32 AD33 AD31 AD28 AD29 AC30 AC32
AB33 AB31 AB28 AB29
AF29 AF31
AB26 AB27 AA24 AA23
AA27 AA26
U3E
AE2 AD5
Y33 Y31 Y28 Y29
V33 V31 W30 W32
W27 V27 V26 W26 W24 W23
F27
G30 G28
R26
T26
H33 H31
T24 T23
J30
K29 H27
H28
J27
K26
F33 F31
E33 E31
M23 M24
M27 M26
N25 N26
R23 R24
N27 R27
J26
C31
C33
PCIE_RST# A_RST#
UMI_TX0P UMI_TX0N UMI_TX1P UMI_TX1N UMI_TX2P UMI_TX2N UMI_TX3P UMI_TX3N
UMI_RX0P UMI_RX0N UMI_RX1P UMI_RX1N UMI_RX2P UMI_RX2N UMI_RX3P UMI_RX3N
PCIE_CALRP PCIE_CALRN
GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N
GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N
CLK_CALRN
PCIE_RCLKP PCIE_RCLKN
DISP_CLKP DISP_CLKN
DISP2_CLKP DISP2_CLKN
APU_CLKP APU_CLKN
SLT_GFX_CLKP SLT_GFX_CLKN
GPP_CLK0P GPP_CLK0N
GPP_CLK1P GPP_CLK1N
GPP_CLK2P GPP_CLK2N
GPP_CLK3P GPP_CLK3N
GPP_CLK4P GPP_CLK4N
GPP_CLK5P GPP_CLK5N
GPP_CLK6P GPP_CLK6N
GPP_CLK7P GPP_CLK7N
GPP_CLK8P GPP_CLK8N
14M_25M_48M_OSC
25M_X1
25M_X2
HUDSON-M3
Part 1 of 5
33_S0
PCI
CLKS
PCI EXPRESS
INTERFACES
33_S0
LDRQ1#/CLK_REQ6#/GPIO49
CLOCK
GENERATOR
S5
PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
PCIRST#
AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8
AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26
33_S0
AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31
PCI
INTERFACE
CBE0# CBE1# CBE2# CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY# STOP#
PERR# SERR# REQ0#
REQ1#/GPIO40 REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42
GNT3#/CLK_REQ7#/GPIO46
APU
PLUS
GNT0#
GNT1#/GPO44
GNT2#/SD_LED/GPO45
CLKRUN#
LOCK#
INTE#/GPIO32 INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
LPCCLK0 LPCCLK1
LPC
LFRAME#
LDRQ0#
33_S0
SERIRQ/GPIO48
DMA_ACTIVE#
PROCHOT#
APU_PG
LDT_STP#
APU_RST#
32K_X1 32K_X2
S5_CORE_EN
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G
LAD0 LAD1 LAD2 LAD3
AF3 AF1
PCI_CLK1_R PCI_CLK1
AF5 AG2
PCI_CLK3_R
AF6
PCI_CLK4_R PCI_CLK4
AB5
AJ3 AL5 AG4 AL6 AH3 AJ5 AL1 AN5 AN6 AJ1 AL8 AL3 AM7 AJ6 AK7 AN8 AG9 AM11 AJ10 AL12 AK11 AN12 AG12 AE12 AC12 AE13 AF13 AH13 AH14 AD15 AC15 AE16 AN3 AJ8 AN10 AD12 AG10 AK9 AL10 AF10 AE10
PAR
AH1 AM9 AH8 AG15 AG13 AF15 AM17 AD16 AD13 AD21 AK17 AD19 AH9
AF18 AE18 AC16 AD18
B25 D25 D27 C28 A26 A29 A31 B27 AE27 AE19
G25 E28 E26 G26 F26
G2 G4 H7
F1 F3 E6
T135
PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PE_PWRGD HUDSON_MEMHOT#
LPC_CLK0_R LPC_CLK1_R
LDRQ#0 LDRQ#1
DMAACTIVE_L APU_PROCHOT#_VDDIO
APU_PWRGD_R APU_STOP#
APU_RST#
32K_X1 32K_X2
S5_CORE_EN RTC_CLK
INTRUDER_ALERT#
+3V_RTC
T20
T21
T22
20MIL
CLKRUN#
R436 0_4 R433 0_4
R428 *2.2K_4
R280 NMP@22_4 R281 22_4
R608 22_4 R611 22_4
T38 T30
R716 0_4
C534 *0.1U/10V_4X
R352 *1M/F_4
R656 560_4
12
G6
*SHORT_PAD
PCI_CLK3
CLKRUN# [35]
LPC_CLK0 LPC_CLK1 LAD0 LAD1 LAD2 LAD3
SERIRQ
APU_PWRGD
T31
C531
0.1U/10V_4X
PCI_CLK3 [11] PCI_CLK4 [11]
PCI_AD23 [11] PCI_AD24 [11] PCI_AD25 [11] PCI_AD26 [11] PCI_AD27 [11]
PE_PWRGD [35,44]
+3V
SERIRQ [35]
DMAACTIVE_L [5]
APU_PROCHOT#_VDDIO [5]
T27
RTC_CLK [11,35] +3V_RTC +3V_RTC
PCLK_DEBUG [30] PCLK_591 [35]
LPC_CLK0 [11] LPC_CLK1 [11] LAD0 [30,35] LAD1 [30,35] LAD2 [30,35] LAD3 [30,35] LFRAME# [30,35]
APU_PWRGD [5] APU_RST# [5]
RTC Circuitry(RTC)
+3V_RTC
20MIL
R655 510/F_6
C537 1U/10V_4X
GPIONet I/O Power Well
GPIO28
GPIO191
GPIO192
DGPU_PWRGD
DGPU_RST#PE_GPIO0
PE_PWRGD
PE_GPIO1
For EMI
PCLK_DEBUG PCLK_591LFRAME#
S5_CORE_EN is necessary to connect enable pin of +3VPCU/+5VPCU regulator for S5+ mode implementation
INTRUDER_ALERT# Left not connected (FCH has 50-kohm internal pull-up to VBAT).
C805 *15P/50V_4C C434 *15P/50V_4C
32K_X1
R390 20M_4
32K_X2
USE GROUND GUARD FOR 32K_X1 AND 32K_X2
23
4 1
C562 18P/50V_4C
Y7
32.768KHZ_10
C560 18P/50V_4C
20MIL
+3VRTC
I +3.3V
+3.3V
O
+3.3VDGPU_PWREN
O
D37
*RB500V-40_100MA
21
D27
BAT54C-7-F_200MA
21
D38
*RB500V-40_100MA
DOS
"0->1"
"0->1"
"0->1"
R681 0_6
+VCCRTC_2
20MIL
R680 1K/F_4
20MIL
+BAT
12
CN21 AAA-BAT-054-K01
+3VPCU
5
4
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
2
Date: Sheet of
PROJECT :
FCH 2/5(ACPI/PCI/CLK)
FCH 2/5(ACPI/PCI/CLK)
FCH 2/5(ACPI/PCI/CLK)
1
Richland
Richland
Richland
of
847
847
847
1A
1A
1A
For Internal Check Only
5
4
3
2
1
PLACE SATA AC COUPLING CAPS CLOSE TO HUDSON-M2/M3
SATA_TXP0[33]
D D
SATA HDD/SSD
SATA ODD
C C
+1.1V_AVDD_SATA
B B
SATA_TXN0[33] SATA_RXN0[33]
SATA_RXP0[33] SATA_TXP1[33]
SATA_TXN1[33] SATA_RXN1[33]
SATA_RXP1[33]
PLACE SATA_CAL RES VERY CLOSE TO BALL OF HUDSON-M2/M3
within 1000mil 35ohm
R583 931/F_4
R648 *10K/F_4
+3V
R581 1K/F_4
R156 10K_4
Integrated Clock Mode: Leave unconnected.
T138
SATA_CALRP SATA_CALRN
SATA_LED#
BOARD_ID1 BOARD_ID11
FCH_PROCHOT#_C
BOARD_ID2 BOARD_ID3 BOARD_ID4
BOARD_ID5 BOARD_ID6 BOARD_ID7 TEMPIN3
R637 10K_4
1205 Change Board ID
0111 change setting
1101 change setting
A A
1101 change setting
1029 change setting
1120 Add Board ID
5
U3B
SERIAL
33_S0
SD
CARD
ATA
SPI
ROM
VGA
DAC
VGA
MAINLINK
33_S5
Part 2 of 5
SD_CLK/SCLK_2/GPIO73
SD_CMD/SLOAD_2/GPIO74
SD_DATA0/SDATI_2/GPIO77
SD_DATA1/SDATO_2/GPIO78
GBE
LAN
33_S5
ROM_RST#/SPI_WP#/GPIO161
VGA_DDC_SDA/GPO70
ML_VGA_HPD/GPIO229
33_S5 33_S5
VIN3/SDATO_1/GPIO178
33_S5
VIN4/SLOAD_1/GPIO179
33_S5
33_S5
VIN6/GBE_STAT3/GPIO181
33_S5
VIN7/GBE_LED3/GPIO182
AK19
SATA_TX0P
AM19
SATA_TX0N
AL20
SATA_RX0N
AN20
SATA_RX0P
AN22
SATA_TX1P
AL22
SATA_TX1N
AH20
SATA_RX1N
AJ20
SATA_RX1P
AJ22
SATA_TX2P
AH22
SATA_TX2N
AM23
SATA_RX2N
AK23
SATA_RX2P
AH24
SATA_TX3P
AJ24
SATA_TX3N
AN24
SATA_RX3N
AL24
SATA_RX3P
AL26
SATA_TX4P
AN26
SATA_TX4N
AJ26
SATA_RX4N
AH26
SATA_RX4P
AN29
SATA_TX5P
AL28
SATA_TX5N
AK27
SATA_RX5N
AM27
SATA_RX5P
AL29
NC6
AN31
NC7
AL31
NC8
AL33
NC9
AH33
NC10
AH31
NC11
AJ33
NC12
AJ31
NC13
AF28
SATA_CALRP
AF27
SATA_CALRN
AD22
SATA_ACT#/GPIO67
AF21
SATA_X1
AG21
SATA_X2
AH16
FANOUT0/GPIO52
AM15
FANOUT1/GPIO53
AJ16
FANOUT2/GPIO54
AK15
FANIN0/GPIO56
AN16
FANIN1/GPIO57
AL16
FANIN2/GPIO58
K6
TEMPIN0/GPIO171
K5
TEMPIN1/GPIO172
K3
TEMPIN2/GPIO173
M6
TEMPIN3/TALERT#/GPIO174
HUDSON-M3
33_S0 33_S0 33_S0
HW MONITOR
33_S0 33_S0 33_S0
33_S5 33_S5 33_S5
BOARD ID SETTING
UMA SKU
VGA SKU
1000
900
USB3.0
USB2.0
W/O LAN
W LAN
W/O S&C
W S&C
N-Brand
Brand(Harman/Kardon)
N-METAL(W/O KBPLED)
METAL(W KBPLED) L
W/O HDMI
W HDMI
Win8
Win7
Non-TEXTURE(BOX)
TEXTURE(NBOX)
N-Brand
Brand(ONKYO)
Sun
Mars
W/O CRT
W CRT
4
H
L
H
L
SD_CD#/GPIO75
SD_WP/GPIO76
SD_DATA2/GPIO79 SD_DATA3/GPIO80
GBE_COL GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR
SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
VGA_RED
VGA_GREEN
VGA_BLUE
VGA_HSYNC/GPO68 VGA_VSYNC/GPO69
VGA_DDC_SCL/GPO71
VGA_DAC_RSET AUX_VGA_CH_P
AUX_VGA_CH_N
AUXCAL
ML_VGA_L0P ML_VGA_L0N ML_VGA_L1P ML_VGA_L1N ML_VGA_L2P ML_VGA_L2N ML_VGA_L3P ML_VGA_L3N
33_S5
VIN0/GPIO175
33_S5
VIN1/GPIO176
VIN2/SDATI_1/GPIO177
VIN5/SCLK_1/GPIO180
ID4
H
L
H
L
AL14 AN14 AJ12 AH12 AK13 AM13 AH15 AJ14
AC4 AD3 AD9 W10 AB8 AH7 AF7 AE7 AD7 AG8 AD1 AB7 AF9 AG6 AE8 AD8 AB9 AC2 AA7 W9
GBE_PHY_INTR
V6 V5 V3 T6 V1
L30 L32 M29
M28 N30
M33 N32
K31 V28
V29 U28 T31
T33 T29 T28 R32 R30 P29 P28
C29 N2
M3 L2 N4 P1 P3 M1 M5
AG16
NC1
AH10
NC2
A28
NC3
G27
NC4
L4
NC5
ID5
ID6
H
L
H
L
FCH_SPI_SO_R FCH_SPI_CLK_R FCH_SPI_CS0#_R FCH_SPI_WP
FCH_CRT_RED
FCH_CRT_GRE
FCH_CRT_BLU
FCH_VGA_HPD
VIN0 VIN1 VIN2 BOARD_ID12 BOARD_ID13 VIN_VDDIO VIN_VDDR VIN7
ID8ID1 ID2Board ID ID3
ID7
H
H
L
R342 10K_4
R380 33_4 R386 33_4 R387 33_4
R293 715/F_4
R287 100/F_4
R359 10K_4 R674 10K_4 R676 10K_4
R165 10K_4 R166 10K_4 R675 10K_4
ID9
ID10
H
L
H
L
3
ID11
H
L
FCH_SPI_SI FCH_SPI_SO
FCH_SPI_CLK
FCH_SPI_CS0#
ID12 ID13
H
L
+3V_S5
FCH_CRT_RED [32]
FCH_CRT_GRE [32]
FCH_CRT_BLU [32]
FCH_CRT_HSYNC [32] FCH_CRT_VSYNC [32]
FCH_DDCDAT [32] FCH_DDCCLK [32]
APU_DP_AUXP [5] APU_DP_AUXN [5]
+FCH_VDDAN_11_MLDAC
APU_DP_TXP0 [5] APU_DP_TXN0 [5] APU_DP_TXP1 [5] APU_DP_TXN1 [5] APU_DP_TXP2 [5] APU_DP_TXN2 [5] APU_DP_TXP3 [5] APU_DP_TXN3 [5]
H
L
FCH_SPI_CS0#[35]
FCH_SPI_CLK[35] FCH_SPI_SO[35] FCH_SPI_SI[35]
R place close to PCH
FCH_CRT_RED
FCH_CRT_GRE
FCH_CRT_BLU
+3V_S5
H
L
R291 150/F_4 R290 150/F_4 R285 150/F_4
R296 *10K/F_4
Metal
IMR
Texture
2
FCH_SPI_CS0# FCH_SPI_CLK FCH_SPI_SO FCH_SPI_SI
R376 33_4
R488 10K_4
+3V_S5
FCH_VGA_HPD [5]
Speaker Touch Pad KB BacklightBox Vendor
Box
Boxless
W25Q32BVSSIG:AKE391P0N00
W25Q16BVSSIG:AKE38FP0N01
A-stage Socket: DG008000031 91960-0084L
FCH_SPI_SI_R
C557 *22P/50V_4N
FCH_SPI_WP
+3V
B2A change board ID setting to fix keyboard BL issue
+3V_S5
BOARD_ID6[29] BOARD_ID7[34] BOARD_ID8[7] BOARD_ID9[7] BOARD_ID10[7] BOARD_ID11[29]
R496 10K_4
U18
1 6 5 2
3
CE#
VDD SCK SI SO
HOLD#
WP#
W25Q32BVSSIG
8
7 4
VSS
1101 change to SPI ROM
B2A change board ID setting for VRAM
R312 UMA@10K_4 R334 1000@10K_4 R704 U3@10K_4 R297 NLAN@10K_4 R692 NHM@10K_4 R736 W8@10K_4 R322 10K_4
R684 NS&C@10K_4 R671 10K_4 R699 10K_4
R703 NTEX@10K_4 R737 Sun@10K_4 R739 NCRT@10K_4
Board ID11Board ID10
BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID8 BOARD_ID9 BOARD_ID11
BOARD_ID5 BOARD_ID6 BOARD_ID7
BOARD_ID10 BOARD_ID12 BOARD_ID13
1126 Change Board ID for GPU
C3A change Board ID for Harman/Kardon
BOARD_ID6 BOARD_ID7 BOARD_ID8 BOARD_ID9 BOARD_ID10 BOARD_ID11
Board ID6
Box Vendor
ONKYO/Harman Kardon/Others+3.3V
+5V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
XX
FCH 3/5(SATA/VGA/GND/SPI)
FCH 3/5(SATA/VGA/GND/SPI)
FCH 3/5(SATA/VGA/GND/SPI)
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
+3V_S5
R372 10K_4
SPI_HOLD# [7]
C551
0.1U/10V_4X
R317 DIS@10K_4 R333 900@10K_4 R424 U2@10K_4 R310 LAN@10K_4 R693 HM@10K_4 R538 W7@10K_4 R320 *10K_4
R683 S&C@10K_4 R677 *10K_4 R422 *10K_4
R423 TEX@10K_4 R738 Mars@10K_4 R740 CRT@10K_4
Board ID7
V
X
X
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
Richland
Richland
Richland
of
947
947
947
1A
1A
1A
09
For Internal Check Only
5
4
3
2
1
T25 T27 U6 U14 U17 U20 U21 U30 U32 V11 V16 V18 W4 W6 W25 W28 Y14 Y16 Y18 AA6 AA12 AA13 AA14 AA16 AA17 AA25 AA28 AA30 AA32 AB25 AC6 AC18 AC28 AD27 AE6 AE15 AE21 AE28 AF8 AF12 AF16 AF33 AG30 AG32 AH5 AH11 AH18 AH19 AH21 AH23 AH25 AH27 AJ18 AJ28 AJ29 AK21 AK25 AL18 AM21 AM25 AN1 AN18 AN28 AN33
T21 L28 K33 N28
R6
C784
0.1U/10V_4X
10
PLACE ALL THE DECOUPLING CAPS ON
+3.3V_FCH_R
R299 0_8
+3V
D D
L31 HCB1608KF-221T20_2A
L32 HCB1608KF-221T20_2A
+FCH_VDDAN_11_MLDAC
+3V_S5 +FCH_VDDPL_33_SSUSB_S
L44
U3@HCB1608KF-221T20_2A
1026 change for EOD
+3V_AVDD_USB
C C
B B
L73
HCB1608KF-221T20_2A
+1.1V_DUAL
U3@HCB1608KF-221T20_2A
R413 U2@0_4
R301 0_8
HCB1608KF-221T20_2A
L46
C510 U3@1U/10V_4X
C539 1U/10V_4X
C383
2.2U/6.3V_4X
C389
2.2U/6.3V_4X
L24
C508 U3@2.2U/10V_6X
+FCH_VDDPL_33_SUSB_S
C832
2.2U/6.3V_6X
+3V_S5
HCB1608KF-221T20_2A
+1.1V_DUAL
+FCH_VDD_11_SSUSB_S
C507 U3@0.1U/10V_4X
+VDDIO_AZ
C541 1U/10V_4X
TRACE WIDTH >=15mil
C393 *0.1U/10V_4X
TRACE WIDTH >=15mil
C399 *0.1U/10V_4X
C496 U3@0.1U/10V_4X
C829 1U/10V_4X
L47
EMI
HCB1608KF-221T20_2A
HCB1608KF-221T20_2A
R302 0_8
R304 0_8
C495 U3@0.1U/10V_4X
C593
2.2U/10V_6X
C512 1U/10V_4X
R278 0_8 R279 0_8
R412 U2@0_4
C218
0.1U/10V_4X
C520
0.1U/10V_4X
L49
L52
C448 *0.1U/10V_4X
VDDQ--3.3V I/O power
C543
C491
1U/10V_4X
22U/6.3V_8X
+VDDPL_3.3V
+FCH_VDDPL_33_MLDAC +FCH_VDDAN_33_DAC_R +FCH_VDDPL_33_SSUSB_S +FCH_VDDPL_33_SUSB_S
+FCH_VDDAN_11_DAC +FCH_VDDAN_11_ML
C463
0.1U/10V_4X
R298 0_8
+FCH_VDDAN_33_DAC_R
1026 change for EOD
C552
C540
22U/6.3V_8X
10U/6.3V_8X
+FCH_VDDAN_11_USB_S
C505
0.1U/10V_4X
+FCH_VDDAN_11_SSUSB_S_R
C515
U3@10U/6.3V_8X C506 U3@1U/10V_4X
+1.1V
L36
U2@HCB1608KF-221T20_2A
L35
U3@HCB1608KF-221T20_2A
C501
0.1U/10V_4X
+1.5VSUS
C419 1U/10V_4X
TRACE WIDTH >=50mil
C545 10U/6.3V_8X
C566 2.2U/10V_6X C504 0.1U/10V_4X C548 0.1U/10V_4X
+FCH_VDDCR_11_USB_S
C518
0.1U/10V_4X
+FCH_VDDCR_11_SSUSB_S
C493 U3@1U/10V_4X
102mA
C524
C494
0.1U/10V_4X
0.1U/10V_4X
R169 0_8 R171 0_8
+FCH_VDDPL_33_PCIE +FCH_VDDPL_33_SATA
R563 *0_4 C756 *2.2U/6.3V_6X
C441
C418
4.7U/6.3V_6X
0.1U/10V_4X
+FCH_VDDPL_33_MLDAC
C382
C384
2.2U/10V_6X
0.1U/10V_4X
+3V_AVDD_USB
470mA
C525
C519
1U/10V_4X
1U/10V_4X
1026 change for EOD
TRACE WIDTH >=20mil
140mA
TRACE WIDTH >=15mil
42mA
C587 10U/6.3V_8X
282mA
424mA
C485 U3@0.1U/10V_4X
C482 U3@0.1U/10V_4X
+VDDPL_1.1V+1.1V_DUAL
C443
C427
2.2U/10V_6X
0.1U/10V_4X
1026 change for EOD
THIS SHEET CLOSE TO SB AS POSSIBLE.
U3C
HUDSON-M3
AB17
VDDIO_33_PCIGP_1
AB18
VDDIO_33_PCIGP_2
AE9
VDDIO_33_PCIGP_3
AD10
VDDIO_33_PCIGP_4
AG7
VDDIO_33_PCIGP_5
AC13
VDDIO_33_PCIGP_6
AB12
VDDIO_33_PCIGP_7
AB13
VDDIO_33_PCIGP_8
AB14
47mA 20mA 12mA 200mA 11mA 14mA 11mA 12mA
LDO_CAP
7mA
226mA
+3V_S5+3V_S5
AB16
H24
V22
U22
T22 L18
D7 AH29 AG28
M31
V21 Y22
V23 V24 V25
AB10
AB11 AA11
AA9
AA10
G7
H8
J8 K8 K9
M9
M10
N9
N10 M12 N12 M11
U12 U13
T12 T13
P16 M14 N14
P13
P14 N16
N17
P17 M17
R414 U2@0_4
L51
HCB1608KF-221T20_2A
VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10
VDDPL_33_SYS VDDPL_33_DAC VDDPL_33_ML VDDAN_33_DAC VDDPL_33_SSUSB_S VDDPL_33_USB_S VDDPL_33_PCIE VDDPL_33_SATA
LDO_CAP VDDPL_11_DAC VDDAN_11_ML_1
VDDAN_11_ML_2 VDDAN_11_ML_3 VDDAN_11_ML_4
VDDIO_33_GBE_S
VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2
VDDIO_GBE_S_1 VDDIO_GBE_S_2
VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 VDDAN_33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12
VDDAN_11_USB_S_1 VDDAN_11_USB_S_2
VDDCR_11_USB_S_1 VDDCR_11_USB_S_2
VDDAN_11_SSUSB_S_1 VDDAN_11_SSUSB_S_2 VDDAN_11_SSUSB_S_3 VDDAN_11_SSUSB_S_4 VDDAN_11_SSUSB_S_5
VDDCR_11_SSUSB_S_1 VDDCR_11_SSUSB_S_2 VDDCR_11_SSUSB_S_3 VDDCR_11_SSUSB_S_4
1026 change for EOD1026 change for EOD
PCI/GPIO I/O
CLKGEN
PCI
EXPRESS
MAIN
LINK
GBE
LAN
SERIAL
POWER
+VDDAN_3.3V_HWM
C570
2.2U/10V_6X
ATA
Part 3 of 5
VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7
CORE
S0
VDDCR_11_8 VDDCR_11_9
VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8
I/O
VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8
VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_11_SATA_8 VDDAN_11_SATA_9
VDDAN_11_SATA_10
VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8
3.3V_S5 I/O
USB
VDDXL_33_S
VDDCR_11_S_1 VDDCR_11_S_2
VDDPL_11_SYS_S
VDDAN_33_HWM_S
VDDIO_AZ_S
USB
SS
C532
0.1U/10V_4X
1007mA
T14 T17 T20 U16 U18 V14 V17 V20 Y17
340mA
H26 J25 K24 L22 M22 N21 N22 P22
1088mA
AB24 Y21 AE25 AD24 AB23 AA22 AF26 AG27
1337mA
AA21 Y20 AB21 AB22 AC22 AC21 AA20 AA18 AB20 AC19
S5_3.3--3.3v standby power
59mA
N18 L19 M18 V12 V13 Y12 Y13 W11
5mA
G24
113mA
N20 M20
TRACE WIDTH >=15mil
J24
70mA 12mA
M8
26mA
AA4
Trace width >=20 mil
L40
HCB1608KF-221T20_2A
1026 change for EOD
TRACE WIDTH >=100mil
C478
0.1U/10V_4X
TRACE WIDTH >=30mil
C460 1U/10V_4X
TRACE WIDTH >=100mil
C407
0.1U/10V_4X
TRACE WIDTH >=50mil
C467 1U/10V_4X
TRACE WIDTH >=20mil
+VDDIO_33_S
C503 *0.1U/10V_4X
+VDDXL_3.3V
+VDDCR_1.1V
+VDDPL_1.1V
+VDDAN_3.3V_HWM
+VDDIO_AZ
+VDDPL_3.3V+3V
VDD-- S/B CORE power
+1.1V_VCC_FCH_R
C477
C490
0.1U/10V_4X
1U/10V_4X
+1.1V_CKVDD
C459
C442
1U/10V_4X
0.1U/10V_4X
+1.1V_PCIE_VDDR
C445
C430 1U/10V_4X
0.1U/10V_4X
+1.1V_AVDD_SATA
C472
C451 1U/10V_4X
0.1U/10V_4X
C455
C521
2.2U/10V_6X
2.2U/10V_6X
1026 change for EOD
S5_1.1V--1.1V standby power
C461
C473
1U/10V_4X
1U/10V_4X
C437
C433
2.2U/10V_6X
0.1U/10V_4X
C498
C489
10U/6.3V_8X
1U/10V_4X
CKVDD_1.1V-­Internal clock Generator I/O power
C484
C404
22U/6.3V_8X
0.1U/10V_4X
PCIE_VDDR--PCIE I/O power
C391
C415
22U/6.3V_8X
1U/10V_4X
AVDD_SATA--SATA phy power
C466
C412 22U/6.3V_8X
0.1U/10V_4X
C538 1U/10V_4X
R353 0_6
C456
2.2U/6.3V_4X
+1.1V_DUAL
VGA_PD[7]
C513
C497
2.2U/6.3V_4X
1U/10V_4X
C474 1U/10V_4X
C398 1U/10V_4X
C387 1U/10V_4X
C527
C530
1U/10V_4X
1U/10V_4X
C420 *0.1U/10V_4X
1026 change for EOD
VGA_PD
R566
2.2K_4
C523 1U/10V_4X
R300 0_8
C514
2.2U/6.3V_4X
L42 HCB1608KF-181T15_1.5A
L29 HCB1608KF-181T15_1.5A
L30 HCB1608KF-181T15_1.5A
S5 plus mode
R314 0_6
C385
C386
1U/10V_4X
2.2U/10V_6X
2
C755 *1U/10V_4X
+1.1V
+1.1V
+1.1V
+3V_S5
L33 HCB1608KF-221T20_2A
+15V
R558 1M_4
R294 100K/F_4
3
Q84
FDV301N_200MA
1
+1.1V
+3V_S5
+3V
2
+1.1V
C759 *1U/10V_4X
2
+FCH_VDDAN_11_MLDAC
3
Q77 PMV45EN_4A
+FCH_VDDAN_33_DAC
1
3
Q75 PMV45EN_4A
1
*HCB1608KF-221T20_2A
HCB1608KF-221T20_2A
L67
L62
L68 *HCB1608KF-221T20_2A
A3
A33
B7
B13
D9
D13
E5 E12 E16 E29
F7
F9
F11 F13 F16 F17 F19 F23 F25 F29
G6 G16 G32 H12 H15 H29
J6
J9 J10 J13 J28 J32
K7
K16 K27 K28
L6 L12 L13 L15 L16 L21
M13 M16 M21 M25
N6 N11 N13 N23 N24 P12 P18 P20 P21 P31 P33
R4 R11 R25 R28
T11 T16 T18
N8 K25 H25
U3D
HUDSON-M3
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64
VSSAN_HWM VSSXL VSSPL_SYS
Part 5 of 5
VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94
GROUND
VSS_95 VSS_96 VSS_97 VSS_98
VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128
VSSPL_DAC VSSAN_DAC
VSSANQ_DAC
VSSIO_DAC
EFUSE
+FCH_VDDAN_33_DAC_R
32mA Max
C777
2.2U/10V_6X
1026 change for EOD
Q75&Q76 1st BAM34040001, Rdson=22.5m 2nd BAM2306006, Rdson=38m
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
FCH 4/5(POWER)
FCH 4/5(POWER)
FCH 4/5(POWER)
1
Richland
Richland
Richland
10 47
10 47
10 47
1A
1A
1A
of
For Internal Check Only
5
4
3
2
1
OVERLAP COMMON PADS WHERE POSSIBLE FOR DUAL-OP RESISTORS.
STRAPS PINS
D D
PULL HIGH
PULL LOW
PCI_CLK1 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 EC_PWM2 RTC_CLK
--------
--------
--------
PCI_CLK1[8] PCI_CLK3[8] PCI_CLK4[8] LPC_CLK0[8] LPC_CLK1[8] EC_PWM2[7] RTC_CLK[8,35]
C C
REQUIRED STRAPS
B B
+3V +3V +3V +3V_S5 +3V_S5 +3V_S5 +3V_S5
ALLOW PCIE Gen2
DEFAULT
FORCE PCIE Gen1
R700
R702
10K_4
*10K_4
R690
R686
10K_4
*10K_4
Remove PCI_CLK2 function
PCI_CLK3
--------
--------
R701 *10K_4
R688 10K_4
USE DEBUG STRAP
IGNORE DEBUG STRAP
DEFAULT
R617 *10K_4
R612 10K_4
PCI_CLK4
non_Fusion CLOCK MODE
FUSION CLOCK MODE
DEFAULT
R625 10K_4
R620 *10K_4
R663
R305
10K_4
*10K_4
R672
R306
2.2K_4
LPC_CLK0 EC_PWM2
EC ENABLED
EC DISABLED
DEFAULT
EC_PWM2-->
*2.2K_4
SPI ROM: 2.2-KΩ 5% pull-down LPC ROM: Pull-up to 3.3V_S5. External pull-up resistor is not required as FCH has integrated 10-KΩ pull-up to 3.3V_S5.
LPC_CLK1
LPC ROM
CLKGEN ENABLED
DEFAULT
CLKGEN
SPI ROM
DISABLED
DEFAULT
RTC_CLKPCI_CLK1 PCI_CLK2
S5 PLUS MODE DISABLED
DEFAULT
S5 PLUS MODE ENABLED
+3V_S5+3V_S5
R435 10K_4
VRM_PWRGD[40,41]
MPWROK[35]
D42 1SS355_100MA
D49 1SS355_100MA
C604
*2.2U/6.3V_6X
U20
2 4
3 5
R440 0_4
C610 *0.1U/10V_4X
R439 *0_4
*SN74LVC1G17DCKR
FCH_PWRGD [5,7]
FCH PWRGD CKT
11
DEBUG STRAPS
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]
PCI_AD27[8] PCI_AD26[8] PCI_AD25[8] PCI_AD24[8] PCI_AD23[8]
A A
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
R345 *2.2K_4
R401 *2.2K_4
R402 *2.2K_4
R351 *2.2K_4
R350 *2.2K_4
PULL HIGH
PULL LOW
PCI_AD27 PCI_AD26
DISABLE ILA
USE PCI
AUTORUN
PLL
DEFAULT
DEFAULT
ENABLE ILA
BYPASS
AUTORUN
PCI PLL
PCI_AD25 PCI_AD24
USE DEFAULT
USE FC
PCIE STRAPS
PLL
DEFAULT
DEFAULT
USE EEPROM
BYPASS FC
PCIE STRAPS
PLL
PCI_AD23
DISABLE PCI MEM BOOT
DEFAULT
ENABLE PCI MEM BOOT
5
4
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet of
2
Date: Sheet of
PROJECT :
FCH 5/5(STRAP & PWRGD)
FCH 5/5(STRAP & PWRGD)
FCH 5/5(STRAP & PWRGD)
1
Richland
Richland
Richland
11 47
11 47
11 47
1A
1A
1A
of
For Internal Check Only
5
4
3
2
1
DDR_STD(DDR)
M_A_A[15:0][4]
D D
R19 10K_4 R18 10K_4
C C
B B
Reserve ICT test point
JDIM_1 close to APU, CLK Min=1016 mils
JDIM6A
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_BS#0[4] M_A_BS#1[4] M_A_BS#2[4] M_A_CS#0[4] M_A_CS#1[4] M_A_CLKP0[4] M_A_CLKN0[4] M_A_CLKP1[4] M_A_CLKN1[4] M_A_CKE0[4] M_A_CKE1[4] M_A_CAS#[4] M_A_RAS#[4] M_A_WE#[4]
SMB_RUN_CLK[7,13] SMB_RUN_DAT[7,13]
M_A_ODT0[4] M_A_ODT1[4]
M_A_DM0[4] M_A_DM1[4] M_A_DM2[4] M_A_DM3[4] M_A_DM4[4] M_A_DM5[4] M_A_DM6[4] M_A_DM7[4]
M_A_DQSP[7:0][4]
M_A_DQSN[7:0][4]
DIMM0_SA0 DIMM0_SA1 SMB_RUN_CLK SMB_RUN_DAT
M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDRSK-20401-TP8D
PC2100 DDR3 SDRAM SO-DIMM
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
(204P)
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
M_A_DQ[0..63] [4]
+0.75V_VREF_DQ
R355 0_6
+1.5VSUS
R316 1K/F_4
R313 1K/F_4
+0.75V_VREF_DQ +0.75V_VREF_CA
C408 470P/50V_4X
M_A_EVENT#[4]
M_A_RST#[4]
C267
0.1U/10V_4X
2.48A
+3V
R324 *0_6
C268 1000P/50V_4X
+1.5VSUS
+SMDDR_VREF
JDIM6B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDRSK-20401-TP8D
+0.75V_VREF_CA
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
PC2100 DDR3 SDRAM SO-DIMM
R321 0_6
VTT1 VTT2
GND GND
+1.5VSUS
203 204
205 206
R311 1K/F_4
R319 1K/F_4
+SMDDR_VTERM
C401 470P/50V_4X
C270
0.1U/10V_4X
+SMDDR_VREF
R323 *0_6
C271 1000P/50V_4X
12
+1.5VSUS
C542 10U/6.3V_6X
+3V
A A
C499
2.2U/10V_6X
Place these Caps near So-Dimm0.
C517 10U/6.3V_6X
C492
0.1U/10V_4X
C529 10U/6.3V_6X
+SMDDR_VTERM
C547 1U/6.3V_4X
C546 10U/6.3V_6X
C511 1U/6.3V_4X
C522 10U/6.3V_6X
C647 1U/6.3V_4X
C526 10U/6.3V_6X
C645 1U/6.3V_4X
C536 *10U/6.3V_6X
C646 10U/6.3V_6X
C535 1U/10V_4X
C544 *10U/6.3V_6X
C500 1U/10V_4X
C502 1U/10V_4X
C509 1U/10V_4X
+0.75V_VREF_DQ
C528 10U/6.3V_8X
C435
0.1U/10V_4X
C516 10U/6.3V_8X
C409 1000P/50V_4X
close to C435 close to C438
C648 39P/50V_4N
+1.5VSUS
1026 change for EOD 1206 Add 39pF for flash screen
5
4
3
EMI Suggestion
C396 ESD@39P/50V_4N
+0.75V_VREF_CA
C403
0.1U/10V_4X
C388 ESD@39P/50V_4N
C438 1000P/50V_4X
C390 ESD@39P/50V_4N
C649 39P/50V_4N
C392 ESD@39P/50V_4N
2
C394 ESD@39P/50V_4N
C395 ESD@39P/50V_4N
C400 ESD@39P/50V_4N
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet
Date: Sheet of
Date: Sheet of
PROJECT :
DDR3 DIMM-1
DDR3 DIMM-1
DDR3 DIMM-1
1
Richland
Richland
Richland
12 47
12 47
12 47
1A
1A
1A
of
For Internal Check Only
5
4
3
2
1
DDR_RVS(DDR)
M_B_A[15:0][4]
D D
M_B_BS#0[4] M_B_BS#1[4] M_B_BS#2[4] M_B_CS#0[4] M_B_CS#1[4] M_B_CLKP0[4] M_B_CLKN0[4] M_B_CLKP1[4] M_B_CLKN1[4] M_B_CKE0[4] M_B_CKE1[4] M_B_CAS#[4] M_B_RAS#[4]
R462 10K_4
+3V
R464 10K_4
C C
B B
Reserve ICT test point
M_B_WE#[4]
SMB_RUN_CLK[7,12] SMB_RUN_DAT[7,12]
M_B_ODT0[4] M_B_ODT1[4]
M_B_DM0[4] M_B_DM1[4] M_B_DM2[4] M_B_DM3[4] M_B_DM4[4] M_B_DM5[4] M_B_DM6[4] M_B_DM7[4]
M_B_DQSP[7:0][4]
M_B_DQSN[7:0][4]
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
DIMM1_SA0 DIMM1_SA1
M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7
JDIM7A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDRSK-20401-TP4B
5
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46
(204P)
PC2100 DDR3 SDRAM SO-DIMM
DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
M_B_DQ0
7
M_B_DQ1
15
M_B_DQ2
17
M_B_DQ3
4
M_B_DQ4
6
M_B_DQ5
16
M_B_DQ6
18
M_B_DQ7
21
M_B_DQ8
23
M_B_DQ9
33
M_B_DQ10
35
M_B_DQ11
22
M_B_DQ12
24
M_B_DQ13
34
M_B_DQ14
36
M_B_DQ15
39
M_B_DQ16
41
M_B_DQ17
51
M_B_DQ18
53
M_B_DQ19
40
M_B_DQ20
42
M_B_DQ21
50
M_B_DQ22
52
M_B_DQ23
57
M_B_DQ24
59
M_B_DQ25
67
M_B_DQ26
69
M_B_DQ27
56
M_B_DQ28
58
M_B_DQ29
68
M_B_DQ30
70
M_B_DQ31
129
M_B_DQ32
131
M_B_DQ33
141
M_B_DQ34
143
M_B_DQ35
130
M_B_DQ36
132
M_B_DQ37
140
M_B_DQ38
142
M_B_DQ39
147
M_B_DQ40
149
M_B_DQ41
157
M_B_DQ42
159
M_B_DQ43
146
M_B_DQ44
148
M_B_DQ45
158
M_B_DQ46
160
M_B_DQ47
163
M_B_DQ48
165
M_B_DQ49
175
M_B_DQ50
177
M_B_DQ51
164
M_B_DQ52
166
M_B_DQ53
174
M_B_DQ54
176
M_B_DQ55
181
M_B_DQ56
183
M_B_DQ57
191
M_B_DQ58
193
M_B_DQ59
180
M_B_DQ60
182
M_B_DQ61
192
M_B_DQ62
194
M_B_DQ63
M_B_DQ[0..63] [4]
+0.75V_VREF_DQ +0.75V_VREF_CA
+1.5VSUS
2.48A
+3V
M_B_EVENT#[4]
M_B_RST#[4]
JDIM7B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDRSK-20401-TP4B
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
PC2100 DDR3 SDRAM SO-DIMM
VTT1 VTT2
GND GND
203 204
205 206
+SMDDR_VTERM
13
Place these Caps near So-Dimm1.
+1.5VSUS
C483 10U/6.3V_6X
A A
+3V
C453
2.2U/10V_6X
C465 10U/6.3V_6X
C452
0.1U/10V_4X
C476 10U/6.3V_6X
+SMDDR_VTERM
C488 1U/6.3V_4X
C487 10U/6.3V_6X
C462 1U/6.3V_4X
C470 10U/6.3V_6X
C644 1U/6.3V_4X
C471 10U/6.3V_6X
C643 1U/6.3V_4X
C481 *10U/6.3V_6X
C642 10U/6.3V_6X
C480 1U/10V_4X
C486 *10U/6.3V_6X
C454 1U/10V_4X
C458 1U/10V_4X
C457 1U/10V_4X
C475 10U/6.3V_8X
C464 10U/6.3V_8X
1026 change for EOD
5
4
+0.75V_VREF_CA
C468
0.1U/10V_4X
+0.75V_VREF_DQ
C469
0.1U/10V_4X
3
C449 1000P/50V_4X
C479 1000P/50V_4X
+1.5VSUS
EMI Suggestion
C447 ESD@39P/50V_4N
C450 ESD@39P/50V_4N
2
C439 ESD@39P/50V_4N
C440 ESD@39P/50V_4N
C444 ESD@39P/50V_4N
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Saturday, January 26, 2013
Saturday, January 26, 2013
Saturday, January 26, 2013
Date: Sheet
Date: Sheet of
Date: Sheet of
C446 ESD@39P/50V_4N
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
DDR3 DIMM-2
DDR3 DIMM-2
DDR3 DIMM-2
1
Richland
Richland
Richland
of
13 47
13 47
13 47
1A
1A
1A
For Internal Check Only
<VGA>
U5000A
PART 1 0F 9
14
PEG_TXP0[3]
PEG_TXN0[3]
PEG_TXP1[3]
PEG_TXN1[3]
PEG_TXP2[3]
PEG_TXN2[3]
PEG_TXP3[3]
PEG_TXN3[3]
PEG_TXP4[3]
PEG_TXN4[3]
PEG_TXP5[3]
PEG_TXN5[3]
PEG_TXP6[3] PEG_TXN6[3]
PEG_TXP7[3] PEG_TXN7[3]
CLK_PCIE_VGAP[8] CLK_PCIE_VGAN[8]
R5000 EV@10K_4
PERST#_BUF[24]
PERST#_BUF
R5182 EV@0_4
C5323 *E@0.1U/10V_4X
PEG_TXP0 PEG_TXN0
PEG_TXP1 PEG_TXN1
PEG_TXP2 PEG_TXN2
PEG_TXP3 PEG_TXN3
PEG_TXP4 PEG_TXN4
PEG_TXP5 PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7 PEG_TXN7
PERST#_BUF_R
AA38
Y37
Y35
W36
W38
V37
V35
U36
U38
T37
T35
R36
R38
P37
P35
N36
N38 M37
M35
L36
L38 K37
K35
H37
H35 G36
G38
F37
F35 E37
AB35 AA36
AH16
AA30
J36
J38
PCIE_RX0P PCIE_RX0N
PCIE_RX1P PCIE_RX1N
PCIE_RX2P PCIE_RX2N
PCIE_RX3P PCIE_RX3N
PCIE_RX4P PCIE_RX4N
PCIE_RX5P PCIE_RX5N
PCIE_RX6P PCIE_RX6N
PCIE_RX7P PCIE_RX7N
NC_PCIE_RX8P NC_PCIE_RX8N
NC_PCIE_RX9P NC_PCIE_RX9N
NC_PCIE_RX10P NC_PCIE_RX10N
NC_PCIE_RX11P NC_PCIE_RX11N
NC_PCIE_RX12P NC_PCIE_RX12N
NC_PCIE_RX13P NC_PCIE_RX13N
NC_PCIE_RX14P NC_PCIE_RX14N
NC_PCIE_RX15P NC_PCIE_RX15N
CLOCK
PCIE_REFCLKP PCIE_REFCLKN
TEST_PG
PERSTB
PCI EXPRESS INTERFACE
EV@Mars_M2
PCIE_TX0P PCIE_TX0N
PCIE_TX1P PCIE_TX1N
PCIE_TX2P PCIE_TX2N
PCIE_TX3P PCIE_TX3N
PCIE_TX4P PCIE_TX4N
PCIE_TX5P PCIE_TX5N
PCIE_TX6P PCIE_TX6N
PCIE_TX7P PCIE_TX7N
NC_PCIE_TX8P NC_PCIE_TX8N
NC_PCIE_TX9P NC_PCIE_TX9N
NC_PCIE_TX10P NC_PCIE_TX10N
NC_PCIE_TX11P NC_PCIE_TX11N
NC_PCIE_TX12P NC_PCIE_TX12N
NC_PCIE_TX13P NC_PCIE_TX13N
NC_PCIE_TX14P NC_PCIE_TX14N
NC_PCIE_TX15P NC_PCIE_TX15N
CALIBRATION
PCIE_CALR_TX PCIE_CALR_RX
Y33 Y32
W33 W32
U33 U32
U30 U29
T33 T32
T30 T29
P33 P32
P30 P29
N33 N32
N30 N29
L33 L32
L30 L29
K33 K32
J33 J32
K30 K29
H33 H32
Y30 Y29
CPEG_RXP0 CPEG_RXN0
CPEG_RXP1 CPEG_RXN1
CPEG_RXP2 CPEG_RXN2
CPEG_RXP3 CPEG_RXN3
CPEG_RXP4 CPEG_RXN4
CPEG_RXP5 CPEG_RXN5
CPEG_RXP6 CPEG_RXN6
CPEG_RXP7 CPEG_RXN7
C5001 EV@0.1U/10V_4X C5002 EV@0.1U/10V_4X
C5003 EV@0.1U/10V_4X C5004 EV@0.1U/10V_4X
C5005 EV@0.1U/10V_4X C5006 EV@0.1U/10V_4X
C5007 EV@0.1U/10V_4X C5008 EV@0.1U/10V_4X
C5586 EV@0.1U/10V_4X C5590 EV@0.1U/10V_4X
C5588 EV@0.1U/10V_4X C5591 EV@0.1U/10V_4X
C5593 EV@0.1U/10V_4X C5589 EV@0.1U/10V_4X
C5592 EV@0.1U/10V_4X C5587 EV@0.1U/10V_4X
R5001 *EV@1.27K/F_4 R5003 EV@1.69K/F_4 R5002 EV@1K/F_4
+5VRUN/+3VRUN/VDDR3
RUNPWROK
MVDDQ/VDDC/VDDCI
1.8V_IO/PCIE_VDDC
PWRGOOD
PCIE_RST#(PERSTB)
PCIE Clock
+0.95V_GPU
PEG_RXP0 [3]
PEG_RXN0 [3]
PEG_RXP1 [3]
PEG_RXN1 [3]
PEG_RXP2 [3]
PEG_RXN2 [3]
PEG_RXP3 [3]
PEG_RXN3 [3]
PEG_RXP4 [3]
PEG_RXN4 [3]
PEG_RXP5 [3]
PEG_RXN5 [3]
PEG_RXP6 [3]
PEG_RXN6 [3]
PEG_RXP7 [3]
PEG_RXN7 [3]
Mars Power-on sequence
1 => +3V_GPU 2 => +VDDC,+VDDCI,+1.5V_GPU,+0.95V_GPU 3 => +1.8V_GPU
PEG
Intel platform: Lane0 ~ Lane15 Brazos platform: Lane12 ~ Lane15 Comal and Sabine platform: Lane8 ~Lane15 Richland and Kabini platform: Lane0 ~ Lane7
Power Up Reset Sequence
20ms max
100ms min 100ms min
100us min
Asic in Reset Hardware Reset Sequence DFG Space Ready
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
100ms max
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Mars_M2/ PEG*8
Mars_M2/ PEG*8
Mars_M2/ PEG*8
Richland
Richland
Richland
A1A
A1A
A1A
of
of
of
14 47Saturday, January 26, 2013
14 47Saturday, January 26, 2013
14 47Saturday, January 26, 2013
For Internal Check Only
<VGA>
Q5047A EV@2N7002KDW_115MA
3ND_MBCLK[26,35]
3ND_MBDATA[26,35]
SYS_SHDN#[5,37]
On Mars only HPD1 and GPIO_14_HPD2 are available for display hot-plug detection
+1.8V_GPU
6
2
5
3 4
Q5047B EV@2N7002KDW_115MA
3
1
+1.8V_GPU
R5014 EV@499/F_4
R5015 EV@249/F_4
1.8V@8mA
EV@BLM15BD121SN1D_300MAL5002
on-die thermal sensor power
1
R5005 EV@10K/F_4
+3V_GPU
R5004 EV@10K/F_4
+3V_GPU
GPU_DPRSLPVR[43]
R5037 EV@10K_4
Q5013
2
*ME2N7002E_200MA
R5253 *EV@100K_4
Place close to Chip
C5038 EV@0.1U/10V_4X
PU:Disable MLPS PD:Enable MLPS
C5039 EV@10U/6.3V_6X
GENIL_CLK[17] GENIL_VSYNC[17]
GPU_SMBCLK
1.8V GPIO
GPU_SMBDAT
Tempeature function: Connect to EC
R5006 EV@4.7K_4 R5007 EV@4.7K_4
R5125 *EV@0_4
GPU_GPIO0[17] GPU_GPIO1[17] GPU_GPIO2[17]
GPU_GPIO8[17]
GPU_GPIO9[17] GPU_GPIO10[17] GPU_GPIO11[17] GPU_GPIO12[17] GPU_GPIO13[17]
GFX_CORE_CNTRL0[43] GFX_CORE_CNTRL4[43]
GPIO_19_CTF
GFX_CORE_CNTRL1[43]
GPU_GPIO21[17]
GPU_GPIO22[17]
PCIE_REQ_GPU#[7]
GFX_CORE_CNTRL2[43] GFX_CORE_CNTRL3[43]
GPU_GENERICC[17]
GPU_VREFG
+3V_GPU
+3V_GPU
C5040 EV@1U/6.3V_4X
GPU_SMBCLK GPU_SMBDAT
GPU_SCL GPU_SDA
T5047
T5049
T5048
T5046
T5050
PCIE_REQ_GPU#
T5051
T5052 T5045
R5017 *EV@4.7K_4
R5018 EV@1K_4 R5019 *EV@5.11K/F_4
R5020 *EV@10K/F_4 R5021 EV@10K/F_4
TSVDD
C5041 EV@0.1U/10V_4X
T5053 T5054 T5055 T5056 T5057
T5058 T5059
AD29 AC29
AK21
AR10
AW10
AU10 AP10 AV11 AT11 AR12
AW12
AU12 AP12
AH23
AK26
AH20 AH18 AN16
AH17 AK17 AH15 AK16 AM16
AM14 AM13 AK14 AG30 AN14 AM17
AK13 AN13
AG32 AG33
AK19 AK20 AH26
AH24
AC30 AK24
AH13
AD28
AM23 AN23 AK23
AM24
AF29 AG29
AK32
AJ21
AW8
AW3 AW5
AW6
AJ23
AJ26
AJ17 AJ13 AJ16 AL16
AL13 AJ14
AJ19 AJ20 AJ24
AL21
AL24
AL31
AJ32 AJ33
AR8 AU8 AP8
AR3 AR1 AU1 AU3
AP6 AU5
AR6 AU6
AT7 AV7 AN7 AV9 AT9
PART 2 0F 9
MUTI GFX
GENLK_CLK GENLK_VSYNC
SWAPLOCKA SWAPLOCKB
NC_DVPCNTL_MVP_0 NC_DVPCNTL_MVP_1 DBG_CNTL0 NC_DVPCNTL_1 NC_DVPCNTL_2
NC_DVPCLK DBG_DATA0 DBG_DATA1 DBG_DATA2 DBG_DATA3 DBG_DATA4 DBG_DATA5 DBG_DATA6 DBG_DATA7 DBG_DATA8 DBG_DATA9 DBG_DATA10 DBG_DATA11 DBG_DATA12 DBG_DATA13 DBG_DATA14 DBG_DATA15 DBG_DATA16 DBG_DATA17 DBG_DATA18 DBG_DATA19 DBG_DATA20 DBG_DATA21 DBG_DATA22 DBG_DATA23
SMBCLK
SMBus
SMBDATA
SCL
I2C
SDA
GENERAL PURPOSE I/O
GPIO_0 GPIO_1 GPIO_2
GPIO_5_AC_BATT GPIO_6_TACH GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL_0 GPIO_16 GPIO_17_THERMAL_INT GPIO_18 GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21 GPIO_22_ROMCSB CLKREQB
GPIO_29 GPIO_30
GENERICA GENERICB GENERICC GENERICD GENERICE GENERICF GENERICG
CEC_1 HPD1
DBG_VREFG
BACO
PX_EN
DEBUG
TESTEN
JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO
THERMAL
DPLUS DMINUS
GPIO_28_FDO TS_A
TSVDD TSVSS
U5000B
NC_TXCAP_DPA3P NC_TXCAM_DPA3N
NC_TX0P_DPA2P NC_TX0M_DPA2N
DPA
NC_TX1P_DPA1P NC_TX1M_DPA1N
NC_TX2P_DPA0P NC_TX2M_DPA0N
NC_TXCBP_DPB3P NC_TXCBM_DPB3N
NC_TX3P_DPB2P NC_TX3M_DPB2N
DPB
NC_TX4P_DPB1P NC_TX4M_DPB1N
NC_TX5P_DPB0P NC_TX5M_DPB0N
NC_TXCCP_DPC3P NC_TXCCM_DPC3N
NC_TX0P_DPC2P NC_TX0M_DPC2N
DPC
NC_TX1P_DPC1P NC_TX1M_DPC1N
NC_TX2P_DPC0P NC_TX2M_DPC0N
NC_TXCDP_DPD3P NC_TXCDM_DPD3N
NC_TX3P_DPD2P NC_TX3M_DPD2N
DPD
NC_TX4P_DPD1P NC_TX4M_DPD1N
NC_TX5P_DPD0P NC_TX5M_DPD0N
DAC1
MLPS
DDC/AUX
NC_DDCCLK_AUX3P NC_DDCDATA_AUX3N
NC_DDCCLK_AUX4P NC_DDCDATA_AUX4N
NC_DDCCLK_AUX5P NC_DDCDATA_AUX5N
NC_DDCCLK_AUX6P NC_DDCDATA_AUX6N
DDCVGACLK DDCVGADATA
EV@Mars_M2
AVSSN#1
AVSSN#2
AVSSN#3 HSYNC
VSYNC
RSET AVDD
AVSSQ VDD1DI
VSS1DI
NC#1
NC#2 NC_SVI2 NC_SVI2
NC#5 NC_SVI2
NC#7
NC#8
NC#9
NC_TSVSSQ
PS_0
PS_1
PS_2
PS_3
DDC1CLK DDC1DATA
AUX1P
AUX1N
DDC2CLK DDC2DATA
AUX2P
AUX2N
AU24 AV23
AT25 AR24
AU26 AV25
AT27 AR26
AR30 AT29
AV31 AU30
AR32 AT31
AT33 AU32
AU14 AV13
AT15 AR14
AU16 AV15
AT17 AR16
AU20 AT19
AT21 AR20
AU22 AV21
AT23 AR22
AD39
R
AD37 AE36
G
AD35 AF37
B
AE38 AC36
AC38
AB34
R5011 EV@499/F_4
AD34
AVDD
AE34 AC33
VDD1DI
AC34
V13 U13 AC31 AD30 AC32 AD32 AF32 AA29 AG21
NC_TSVSSQ should be tied to GND on Thames/Whistler/Seymour
AF33
PS_0 should be tied to GND on Thames/Whistler/Seymour
AM34
PS_0
AD31
PS_1
AG31
PS_2
AD33
PS_3
PS_1,PS_2, PS_3 are NC on Thames/Whistler/Seymour
AM26 AN26
AM27 AL27
AM19 AL19
AN20 AM20
AL30 AM30
AL29 AM29
AN21 AM21
AK30 AK29
AJ30 AJ31
Close to ASIC
T5042
T5043
T5044
GPU_HSYNC [17] GPU_VSYNC [17]
T5006 T5007 T5008 T5010 T5011 T5012 T5014 T5016 T5017
PS_3 [17]
DAC1 Analog Power
AVDD
R_pu
R_pdCa
C5033
Mars@1U/6.3V_4X
C5036
Mars@1U/6.3V_4X
R5205 *EV@8.45K/F_4
R5208 EV@4.75K/F_4
C5032 Mars@0.1U/10V_4X
VDD1DI
C5035 Mars@0.1U/10V_4X
VDDC_CT VDDC_CT VDDC_CT
R5204 EV@8.45K/F_4
C5351 *EV@0.1U/10V_4X
R_pu
R_pdCa
R5249 EV@2K/F_4
C5352 *EV@0.1U/10V_4X
11001 11000 00000 for Mars
PS_0 PS_1 PS_2
1.8V@18mA
C5034 Mars@4.7U/6.3V_6X
DAC1 Digital Power
1.8V@117mA
C5037 Mars@4.7U/6.3V_6X
01000 for Sun
Mars@BLM15BD121SN1D_300MAL5000
Mars@BLM15BD121SN1D_300MAL5001
C5599 Mars@0.68U/6.3V_4X
1124 add for Mars
System Memory Aperture size
PS0[3:1]
ROMIDCFG[2:0]
128M
256M
64M
000
001
010 011Reserved
MLPS
R_pu R_pd
4.75K
NC
2K
8.45K
4.53K
2K
6.98K
4.99K
4.53K
4.99K
3.24K
5.62K
3.4K
10K
NC
Ca Bits [5:4]
680nF
82nF
10nF
NC
00
01
10
11
Bits [3:1]
000
001
010
011
100
101
110
1114.75K
P/N
CH4681K9B00 X5R CH4681JEB00 X6S
CH3823K1B00
CH31003KB11
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Mars_M2/ GPIO_DP_CRT_I2C
Mars_M2/ GPIO_DP_CRT_I2C
Mars_M2/ GPIO_DP_CRT_I2C
Date: Sheet
Date: Sheet
Date: Sheet
+1.8V_GPU
15
R5206 *EV@10K/F_4
R_pu
R5209
R_pdCa
C5353 Sun@0.082U/16V_4X
Ra P/N
2K
3.24K
3.4K
4.53K
4.75K
4.99K
5.62K
6.98K
8.45K
10K
MLPS Bit Bits [5:1]
PS_0
PS_1
PS_2
PS_3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
CS22002FB19
CS23242FB09
CS23402FB08
CS24532FB08
CS24752FB12
CS24992FB26
CS25622FB18
CS26982FB01
CS28452FB12
CS31002FB26
11001
11000
01000
11XXX
Richland
Richland
Richland
15 47Saturday, January 26, 2013
15 47Saturday, January 26, 2013
15 47Saturday, January 26, 2013
EV@4.75K/F_4
of
of
of
A1A
A1A
A1A
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