QUANTA BD6 Schematics

1

2

3

4

5

6

7

8

BD6 Shark Bay Block Diagram

USB-11

A A

DDR3L-SODIMM1 DDR3L-SODIMM2

P14,15

SATA - HDD

B B

SATA - ODD

Touch Panel

Card Reader

Daughter Board

USB 2.0 L1 Con.

USB 2.0 L2 Con.

P38

P36

P31

USB-3

USB-8

USB-2 USB-9

P33

Dual Channel DDR3L

SATA 5

SATA4

Haswell

37W/47W

rPGA 946

P3, 4, 5, 6, 7

DDR3L SYSTEM MEMORY

FDI

FDI(x2)

FDI

SATA0

SATA1

Lynx Point

FCBGA 708

USB2.0

RTC

PEGX16 Gen 3

DP_B eDP

DMI

DMI(x4)

DMI

PCIe 2.0

USB3.0

PEG x8

HDMI eDP

CRT

dGPU

nVIDIA N14P-GV2 nVIDIA N14M-GL

P16, 17, 18, 19, 20, 21, 22

VRAM DDR3-64M*16 VRAM DDR3-128M*16

HDMI Level Shift

eDP to LVDS

PCIE-3

USB-10

PCIE-4

P28

P26

BATTERY

C C

P9

IHDA

P8, 9, 10, 11, 12, 13

LPC

SPI

SPI Flash

P9

Azalia

EXT_LVDS

EXT_CRT

EXT_HDMI

LCD

USB-11

WLAN

Giga/10/100 Lan

P30

P35

USB-0

USB-1

HDMI Level Shift

HDMI Con.

LCD/CCD Con.

CRT Con.

USB 3.0 R1

Port1

USB 3.0 R2

Port2

P28

P29

P31

LCD/CCD Con.

CRT Con.

HDMI Con.

P29

P28

01

LPC

Audio Codec

P34

HP SPK Con.MIC JACK

P34 P34 P34

D D

1

2

3

FAN

4

K/B Con.

P38 P38P3 P38

EC

HALL Sensor

P29

5

Touch Pad /B Con.

6

Power /B Con.

P37

POWER SYSTEM

ISL88732HRTZ-T RT8223P TPS51216RUKR TPS51211DSCR ISL95812HRZ-T (+VCC_CORE) RT8812A (NV_VGPU_CORE)

Size Document Nu mber Rev

Block Diagram

Date: Sheet of

7

(Charge) (System 5V/3V) (DDR 1.35V) (+1.05V)

(other GPU)

Quanta Computer Inc.

PROJECT :

8

BD6

P40 P41 P42 P43 P44 P46 P47

1A

1 49Thursday, January 03 , 2013

1A

5

4

3

2

1

02

Table of Contents

D D

C C

B B

PAGE DESCRIPTION

Schematic Block Diagram

1

Front Page

2

Processor

3 - 7 8 - 13

PCH

14 - 15

DDRIII SO-DIMM DDR

16 - 22

N14P-GV2/N14M-GL

23 - 24

VRAM - DDR3 PCH XDP CLG

25 26

EDP to LVDS LDS HDMI comm part HDM

28

VGA Connector

29

LCD Panel CRT & CRT BUS SWITCH CCD HALL SENSOR&BACK LIGHT SWITCH

30

MINI Card (Wi-Fi & WIMAX)

31

USB Connector USB Sleep Charger HDD HDD

33

ODD

34

Audio Codec

35

Atheros LAN

36

Card reader MMC

37

EC

38

KeyBoard TP&FP board Power SW LED

39 40

Charger

41

System 5V/3V

42

DDR 1.35V

43

+1.05V

45

+VCORE Discharge

46 47

GPU_CORE

48

other GPU

BOI-FUNCTIONS

CPU CLG

VGA VGA

VGA LDS CRT CCD HSR MNW USB SLC

ODD ADO LAN

KBC KBC TPD,FPD PSW LED PWM PWM PWM PWM PWM PWM PWM PWM

POWER PLANE

+VIN +3V_RTC +3V +3V_S5 +3VPCU +5V +5V_S5 +5VPCU

+1.35VSUS +1.5V

VOLTAGE

10V~+19V

+3.0V~+3.3V

+3.3V +3.3V +3.3V +5V +5V

+1.5V S5_ON +1.5V MAIN_ON

CONTROL SIGNAL

MAIN_ON S5_ON

MAIN_ON S0 S5_ON S0~S5 AC/DC Insert enable

Power States

+1.05V +1.05V MAIN_ON

~ S0MPWROK+VCORE

+3V_GPU +3.3V DGPU_PWR_EN_R

+VGPU_CORE

DGPU_PWR_EN_RC S0~ +1.5V_GPU +1.5V GPU_PWR_GD +1.05V_GPU GPU_PWR_GD S0

+1.05V

ACTIVE IN

S0~S5 S0~S5 S0 S0~S5 S0~S5AC/DC Insert enable

S0~S5+5V

S0~S3 S0 S0

S0

GND PLANE PAGE

GND_SIGNAL 8769GND GND ADOGND

A A

5

4

3

32 37 ALL 34

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

POWER STAGE & BOI-FUNCTION

Date: Sheet of

Tuesday, December 18, 2012

Date: Sheet of

Tuesday, December 18, 2012

Date: Sheet of

2

Tuesday, December 18, 2012

PROJECT :

Chief River

2 49

1

1A

5

Haswell Processor (DMI,PEG,FDI)

Haswell rPGA EDS

FDI_CSYNC_R FDI_INT_R

D21

DMI_RXN_0

C21

DMI_RXN_1

B21

DMI_RXN_2

A21

DMI_RXN_3

D20

DMI_RXP_0

C20

DMI_RXP_1

B20

DMI_RXP_2

A20

DMI_RXP_3

D18

DMI_TXN_0

C17

DMI_TXN_1

B17

DMI_TXN_2

A17

DMI_TXN_3

D17

DMI_TXP_0

C18

DMI_TXP_1

B18

DMI_TXP_2

A18

DMI_TXP_3

H29

FDI_CSYNC

J29

DISP_INT

HSW_RPGA_EDS_PGA

PEG

DMI FDI

DMI_TXN0{8} DMI_TXN1{8} DMI_TXN2{8}

D D

DMI_TXN3{8} DMI_TXP0{8}

DMI_TXP1{8} DMI_TXP2{8} DMI_TXP3{8}

DMI_RXN0{8} DMI_RXN1{8} DMI_RXN2{8} DMI_RXN3{8}

DMI_RXP0{8} DMI_RXP1{8} DMI_RXP2{8} DMI_RXP3{8}

R152 0_4

FDI_CSYNC{8}

R148 0_4

FDI_INT{8}

C C

B B

B2A

U23A

PEG_RCOMP

PEG_RXN_0 PEG_RXN_1 PEG_RXN_2 PEG_RXN_3 PEG_RXN_4 PEG_RXN_5 PEG_RXN_6 PEG_RXN_7 PEG_RXN_8

PEG_RXN_9 PEG_RXN_10 PEG_RXN_11 PEG_RXN_12 PEG_RXN_13 PEG_RXN_14 PEG_RXN_15

PEG_RXP_0

PEG_RXP_1

PEG_RXP_2

PEG_RXP_3

PEG_RXP_4

PEG_RXP_5

PEG_RXP_6

PEG_RXP_7

PEG_RXP_8

PEG_RXP_9 PEG_RXP_10 PEG_RXP_11 PEG_RXP_12 PEG_RXP_13 PEG_RXP_14 PEG_RXP_15

PEG_TXN_0

PEG_TXN_1

PEG_TXN_2

PEG_TXN_3

PEG_TXN_4

PEG_TXN_5

PEG_TXN_6

PEG_TXN_7

PEG_TXN_8

PEG_TXN_9 PEG_TXN_10 PEG_TXN_11 PEG_TXN_12 PEG_TXN_13 PEG_TXN_14 PEG_TXN_15

PEG_TXP_0

PEG_TXP_1

PEG_TXP_2

PEG_TXP_3

PEG_TXP_4

PEG_TXP_5

PEG_TXP_6

PEG_TXP_7

PEG_TXP_8

PEG_TXP_9 PEG_TXP_10 PEG_TXP_11 PEG_TXP_12 PEG_TXP_13 PEG_TXP_14 PEG_TXP_15

1 OF 9

E23 M29 K28 M31 L30 M33 L32 M35 L34 E29 D28 E31 D30 E35 D34 E33 E32 L29 L28 L31 K30 L33 K32 L35 K34 F29 E28 F31 E30 F35 E34 F33 D32 H35 H34 J33 H32 J31 G30 C33 B32 B31 A30 B29 A28 B27 A26 B25 A24 J35 G34 H33 G32 H31 H30 B33 A32 C31 B30 C29 B28 C27 B26 C25 B24

PEG_RCOMP

PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7

PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7

PEG_TXN0_C PEG_TXN1_C PEG_TXN2_C PEG_TXN3_C PEG_TXN4_C PEG_TXN5_C PEG_TXN6_C PEG_TXN7_C

PEG_TXP0_C PEG_TXP1_C PEG_TXP2_C PEG_TXP3_C PEG_TXP4_C PEG_TXP5_C PEG_TXP6_C PEG_TXP7_C

+VCCIOA_OUT

C575 EV@0.22U/10V_4X C557 EV@0.22U/10V_4X C573 EV@0.22U/10V_4X C555 EV@0.22U/10V_4X C571 EV@0.22U/10V_4X C553 EV@0.22U/10V_4X C569 EV@0.22U/10V_4X C551 EV@0.22U/10V_4X

C576 EV@0.22U/10V_4X C558 EV@0.22U/10V_4X C574 EV@0.22U/10V_4X C556 EV@0.22U/10V_4X C572 EV@0.22U/10V_4X C554 EV@0.22U/10V_4X C570 EV@0.22U/10V_4X C552 EV@0.22U/10V_4X

<THC>

4

R133

24.9/F_4

PEG_RXN[0..7] {16}

PEG_RXP[0..7] {16 }

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7

FDI Disable(Discrete Only)

FDI_CSYNC_R FDI_INT_R

R147 OEV@1K_4

PEG_TXN[0..7] {16}

PEG_TXP[0..7] {16}

<OEV>

R153 OEV@1K_4

3

R109 *0_4

C730 *4.7U/6.3V_6X

+VCCST+1.05V

C80 *0.1U/10V_4X

B2A

Thermal Trip & Process HOT

DELAY_VR_PWRGOOD{8,44}

PM_THRMTRIP#_R

PU/PD of CPU

XDP PU/PD

B2A

H_PROCHOT# H_PWRGOOD_R

XDP_TDO

XDP_TCLK XDP_TRST#

<CPU>

R106 62_4 R101 10K_4

R926 51_4 R89 51_4

R100 51_4

PM_DRAM_PWRGD_R{27}

2

1 3

H_PROCHOT#{40,44}

PM_THRMTRIP#{3,11}

H_PWRGOOD{11} CPU_PLTRST#{11}

CLK_DPLL_NSCLKN{10} CLK_DPLL_NSCLKP{10} CLK_DPLL_SSCLKN{10} CLK_DPLL_SSCLKP{10}

CLK_CPU_BCLKN{1 0} CLK_CPU_BCLKP{10}

+1.05V

6

Q49A 2N7002KDW_115MA

1

R603 100K_4

R599 1K_4 Q48

2

METR3904-G_200MA

+VCCIO_OUT

+1.05V

B2A

EC_PECI{37}

PM_SYNC{8}

FAN Control-->For one FAN solution <THC>

SKTOCC#

TP19

CATERR#

R105 56_4

R84 0_4 R90 0_4

R39 0_4

TP1

H_PROCHOT#_RH_PROCHOT#

PM_SYNC_R H_PWRGOOD_R

PM_DRAM_PWRGD_R

CPU_RST#_R

EC_PECI

Intel Turbo mode only<CPU> <CPU>

5

H_PROCHOT_EC{37}

B2A

S5_ON

PM_THRMTRIP# {3,11}

EDP Disable(Discrete Only)

CLK_DPLL_SSCLKN

CLK_DPLL_NSCLKN CLK_DPLL_NSCLKP

H_PROCHOT_EC

R608 100K_4

R170 OEV@10K_4

R925 *OEV@10K_4 R924 *OEV@10K_4

+VCCIO_OUT

CLK_DPLL_SSCLKP

2

Haswell Processor (CLK,MISC,JTAG)

H_PROCHOT#

34

Q49B 2N7002KDW_115MA

<OEV>

+VCCIO_OUT

AP32

SKTOCC

AN32

CATERR

AR27

PECI

AK31

FC_AK31

AM30

PROCHOT

AM35

THERMTRIP

AT28

PM_SYNC

AL34

PWRGOOD

AC10

SM_DRAMPWROK

AT26

PLTRSTIN

G28

DPLL_REF_CLKN

H28

DPLL_REF_CLKP

F27

SSC_DPLL_REF_CLKN

E27

SSC_DPLL_REF_CLKP

D26

BCLKN

E26

BCLKP

HSW_RPGA_EDS_PGA

C70 *47P/50V_4N

R941 OEV@10K_4

R171 *OEV@10K_4

Haswell rPGA EDS

MISC

THERMAL

PWR

Reserved For buffer reset of PLTRSRIN#

B2A

CPU Thermal sensor / MB Local TEMP <THP/UGA/VGA>

CLOCK

DDR3

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 SM_DRAMRST

JTAG

2 OF 9

BPM_N_0 BPM_N_1 BPM_N_2 BPM_N_3 BPM_N_4 BPM_N_5 BPM_N_6 BPM_N_7

PLTRST#{8,30,35,36,37,38}

U23B

PRDY PREQ

TRST

AP3

SM_RCOMP_0

AR3

SM_RCOMP_1

AP2

SM_RCOMP_2

AN3

CPU_DRAMRST#

AR29

XDP_PRDY#

AT29

XDP_PREQ#

AM34

XDP_TCLK

TCK

AN33

XDP_TMS

TMS

AM33

XDP_TRST#

AM31

XDP_TDI

TDI

AL33

XDP_TDO

TDO

AP33

XDP_DBRST#

DBR

AR30

XDP_BPM#0

AN31

XDP_BPM#1

AN29

XDP_BPM#2

AP31

XDP_BPM#3

AP30

XDP_BPM#4

AN28

XDP_BPM#5

AP29

XDP_BPM#6

AP28

XDP_BPM#7

1 2

R33 *1.5K/F_4

R563 100/F_4 R562 75/F_4 R564 100/F_4

CPU_DRAMRST# {27}

TP71 TP73 TP21 TP20 TP22 TP7 TP6

XDP_DBRST# {8,25}

TP9

TP16 TP13 TP8 TP15 TP12 TP14 TP81

U3

VCC5NC

IN

4

GND3OUT

*74LVC1G07GW

<CPU>

+3V

C42 *0.1U/10V_4X

+1.05V

R58 *1K_4

R44 *43_4

R52 *20K_4

R51 *750/F_4

1

03

CPU_RST#_RCPU_PLTRST#_Q

CPU_RST#_R

Rset(Kohm)=0.0012T*T-0.9308T+96.147

+5V VIN +5VPCU

2

Q47

1 3

*MMBT2222A_600MA

TH_FAN_POWER1

A A

R590 *100K_4

R588 *100K_4

R592 *162K/F_4

VFAN1

U22

1

1 OUT

2

1 IN-

3

1 IN+ GND42 IN+

*LM358

2 OUT

VCC

2 IN-

R601 *IV@NTC_470K_4

8 7 6 5

R598 *48.7K/F_4

R602 *EV@NTC_470K_4

R605 *499K/F_4

R606 *499K/F_4

5

2

S5_ON

34

Q50B

*2N7002KDW_115MA

R604 *IV@1M_4

6

Q50A *2N7002KDW_115MA

1

B2A

R600 *EV@1M_4

+5V

C510 2.2U/6.3V_4X

B2A

VFAN1{37}

1 4

U20

VIN2VO /FON VSET

APE8872M

R594 150_4

+3V

R581 *10K_4

3

TH_FAN_POWER1

5

GND

6

GND

7

GND

8

C508

GND

2.2U/6.3V_4X

FANSIG1{37}

B2A

FANSIG1

CN11

85205-0300L

B2A

+3VPCU

1 2 3

C513

0.1U/16V_4Y

HYST=VCC for 10 degree Hys. HYST=GND for 30 degree Hys.

+3VPCU_HW_SD

5

4

U21

VCC

HYST

G708T1U

1

SET

2

GND

3

OT#

R597 EV@24.9K/F_4

R596 IV@24.9K/F_4

R896 0_4

SYS_SHDN#

R595 *470K_4

S5_ON

D15 *1SS355_100 MA

B2A

S5_ON {20,37,41}

+3VPCU

Quanta Computer Inc.

PROJECT :

BD6

PROJECT :

BD6

PROJECT :

Size Document Number Rev

Haswell 1/5 (PEG/DMI/FDI)

Date: Sheet of

Thursday, December 20, 2012

Date: Sheet of

Thursday, December 20, 2012

Date: Sheet of

5

4

3

2

Thursday, December 20, 2012

1

BD6

3 49

1A

5

4

3

2

1

04

Haswell Processor (DDR3)

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8

M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

Haswell rPGA EDS

AC7

RSVD_AC7

U4

SA_CK_N_0

V4

SA_CK_P_0

AD9

SA_CKE_0

U3

SA_CK_N_1

V3

SA_CK_P_1

AC9

SA_CKE_1

U2

SA_CK_N_2

V2

SA_CK_P_2

AD8

SA_CKE_2

U1

SA_CK_N_3

V1

SA_CK_P_3

AC8

SA_CKE_3

M7

SA_CS_N_0

L9

SA_CS_N_1

M9

SA_CS_N_2

M10

SA_CS_N_3

M8

SA_ODT_0

L7

SA_ODT_1

L8

SA_ODT_2

L10

SA_ODT_3

V5

SA_BS_0

U5

SA_BS_1

AD1

SA_BS_2

V10

VSS

U6

SA_RAS

U7

SA_WE

U8

SA_CAS

V8

SA_MA_0

AC6

SA_MA_1

V9

SA_MA_2

U9

SA_MA_3

AC5

SA_MA_4

AC4

SA_MA_5

AD6

SA_MA_6

AC3

SA_MA_7

AD5

SA_MA_8

AC2

SA_MA_9

V6

SA_MA_10

AC1

SA_MA_11

AD4

SA_MA_12

V7

SA_MA_13

AD3

SA_MA_14

AD2

SA_MA_15

AP15

SA_DQS_N_0

AP8

SA_DQS_N_1

AJ8

SA_DQS_N_2

AF3

SA_DQS_N_3

J3

SA_DQS_N_4

E2

SA_DQS_N_5

C5

SA_DQS_N_6

C11

SA_DQS_N_7

AP14

SA_DQS_P_0

AP9

SA_DQS_P_1

AK8

SA_DQS_P_2

AG3

SA_DQS_P_3

H3

SA_DQS_P_4

E3

SA_DQS_P_5

C6

SA_DQS_P_6

C12

SA_DQS_P_7

HSW_RPGA_EDS_PGA

SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

3 OF 9

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9

SM_VREF

D D

C C

B B

M_A_CLKN0{14} M_A_CLKP0{14}

M_A_CKE0{14} M_A_CLKN1{14} M_A_CLKP1{14}

M_A_CKE1{14}

M_A_CS#0{14}

M_A_CS#1{14}

M_A_ODT0{14}

M_A_ODT1{14}

M_A_BS#0{14}

M_A_BS#1{14}

M_A_BS#2{14}

M_A_RAS#{14}

M_A_WE#{14}

M_A_CAS#{14} M_A_A[15:0]{14}

M_A_DQSN[7:0]{14}

M_A_DQSP[7:0]{14}

TP24

R127 0_4

M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7 M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7

<CPU>

U23C

AR15

M_A_DQ0

AT14

M_A_DQ1

AM14

M_A_DQ2

AN14

M_A_DQ3

AT15

M_A_DQ4

AR14

M_A_DQ5

AN15

M_A_DQ6

AM15

M_A_DQ7

AM9

M_A_DQ8

AN9

M_A_DQ9

AM8

M_A_DQ10

AN8

M_A_DQ11

AR9

M_A_DQ12

AT9

M_A_DQ13

AR8

M_A_DQ14

AT8

M_A_DQ15

AJ9

M_A_DQ16

AK9

M_A_DQ17

AJ6

M_A_DQ18

AK6

M_A_DQ19

AJ10

M_A_DQ20

AK10

M_A_DQ21

AJ7

M_A_DQ22

AK7

M_A_DQ23

AF4

M_A_DQ24

AF5

M_A_DQ25

AF1

M_A_DQ26

AF2

M_A_DQ27

AG4

M_A_DQ28

AG5

M_A_DQ29

AG1

M_A_DQ30

AG2

M_A_DQ31

J1

M_A_DQ32

J2

M_A_DQ33

J5

M_A_DQ34

H5

M_A_DQ35

H2

M_A_DQ36

H1

M_A_DQ37

J4

M_A_DQ38

H4

M_A_DQ39

F2

M_A_DQ40

F1

M_A_DQ41

D2

M_A_DQ42

D3

M_A_DQ43

D1

M_A_DQ44

F3

M_A_DQ45

C3

M_A_DQ46

B3

M_A_DQ47

B5

M_A_DQ48

E6

M_A_DQ49

A5

M_A_DQ50

D6

M_A_DQ51

D5

M_A_DQ52

E5

M_A_DQ53

B6

M_A_DQ54

A6

M_A_DQ55

E12

M_A_DQ56

D12

M_A_DQ57

B11

M_A_DQ58

A11

M_A_DQ59

E11

M_A_DQ60

D11

M_A_DQ61

B12

M_A_DQ62

A12

M_A_DQ63

AM3

+SM_VREF

F16

+VREFDQ_SA_CPU

F13

+VREFDQ_SB_CPU

M_A_DQ[63:0] {14}

+SM_VREF +VREFDQ_SA_CPU +VREFDQ_SB_CPU

M_B_CLKN0{15} M_B_CLKP0{15}

M_B_CKE0{15} M_B_CLKN1{15} M_B_CLKP1{15}

M_B_CKE1{15}

M_B_CS#0{15}

M_B_CS#1{15}

M_B_ODT0{15}

M_B_ODT1{15}

M_B_BS#0{15}

M_B_BS#1{15}

M_B_BS#2{15}

M_B_RAS#{15}

M_B_WE#{15}

M_B_CAS#{15} M_B_A[15:0]{15}

M_B_DQSN[7:0]{15}

M_B_DQSP[7:0]{15}

Haswell Processor (DDR3)

Haswell rPGA EDS

AG8

TP23

R129 0_4

M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8

M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7

RSVD

Y4

SB_CKN0

AA4

SB_CK0

AF10

SB_CKE_0

Y3

SB_CKN1

AA3

SB_CK1

AG10

SB_CKE_1

Y2

SB_CKN2

AA2

SB_CK2

AG9

SB_CKE_2

Y1

SB_CKN3

AA1

SB_CK3

AF9

SB_CKE_3

P4

SB_CS_N_0

R2

SB_CS_N_1

P3

SB_CS_N_2

P1

SB_CS_N_3

R4

SB_ODT_0

R3

SB_ODT_1

R1

SB_ODT_2

P2

SB_ODT_3

R7

SB_BS_0

P8

SB_BS_1

AA9

SB_BS_2

R10

VSS

R6

SB_RAS

P6

SB_WE

P7

SB_CAS

R8

SB_MA_0

Y5

SB_MA_1

Y10

SB_MA_2

AA5

SB_MA_3

Y7

SB_MA_4

AA6

SB_MA_5

Y6

SB_MA_6

AA7

SB_MA_7

Y8

SB_MA_8

AA10

SB_MA_9

R9

SB_MA_10

Y9

SB_MA_11

AF7

SB_MA_12

P9

SB_MA_13

AA8

SB_MA_14

AG7

SB_MA_15

AP18

SB_DQS_N_0

AP11

SB_DQS_N_1

AP5

SB_DQS_N_2

AJ3

SB_DQS_N_3

L3

SB_DQS_N_4

H9

SB_DQS_N_5

C8

SB_DQS_N_6

C14

SB_DQS_N_7

AP17

SB_DQS_P_0

AP12

SB_DQS_P_1

AP6

SB_DQS_P_2

AK3

SB_DQS_P_3

M3

SB_DQS_P_4

H8

SB_DQS_P_5

C9

SB_DQS_P_6

C15

SB_DQS_P_7

HSW_RPGA_EDS_PGA

SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

4 OF 9

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9

<CPU>

U23D

AR18

M_B_DQ0

AT18

M_B_DQ1

AM17

M_B_DQ2

AM18

M_B_DQ3

AR17

M_B_DQ4

AT17

M_B_DQ5

AN17

M_B_DQ6

AN18

M_B_DQ7

AT12

M_B_DQ8

AR12

M_B_DQ9

AN12

M_B_DQ10

AM11

M_B_DQ11

AT11

M_B_DQ12

AR11

M_B_DQ13

AM12

M_B_DQ14

AN11

M_B_DQ15

AR5

M_B_DQ16

AR6

M_B_DQ17

AM5

M_B_DQ18

AM6

M_B_DQ19

AT5

M_B_DQ20

AT6

M_B_DQ21

AN5

M_B_DQ22

AN6

M_B_DQ23

AJ4

M_B_DQ24

AK4

M_B_DQ25

AJ1

M_B_DQ26

AJ2

M_B_DQ27

AM1

M_B_DQ28

AN1

M_B_DQ29

AK2

M_B_DQ30

AK1

M_B_DQ31

L2

M_B_DQ32

M2

M_B_DQ33

L4

M_B_DQ34

M4

M_B_DQ35

L1

M_B_DQ36

M1

M_B_DQ37

L5

M_B_DQ38

M5

M_B_DQ39

G7

M_B_DQ40

J8

M_B_DQ41

G8

M_B_DQ42

G9

M_B_DQ43

J7

M_B_DQ44

J9

M_B_DQ45

G10

M_B_DQ46

J10

M_B_DQ47

A8

M_B_DQ48

B8

M_B_DQ49

A9

M_B_DQ50

B9

M_B_DQ51

D8

M_B_DQ52

E8

M_B_DQ53

D9

M_B_DQ54

E9

M_B_DQ55

E15

M_B_DQ56

D15

M_B_DQ57

A15

M_B_DQ58

B15

M_B_DQ59

E14

M_B_DQ60

D14

M_B_DQ61

A14

M_B_DQ62

B14

M_B_DQ63

M_B_DQ[63:0] {15}

CPU SM_VREF M3 CPU VREFDQ M3

+SM_VREF

A A

5

+SM_VREF

C207 *0.1U/10V_4X

4

+VREFDQ_SA_CPU

+VREFDQ_SB_CPU

R162 *1K_4

R161 *1K_4

3

R160 *1K_4

R169 0_6

1

Q18

2

*AP2302GN

DRAMRST_CNTRL

3

+VREF_CA_CPU

R164 0_6

1

R163 0_6

Q20

2

*AP2302GN

DRAMRST_CNTRL

Q19

2

*AP2302GN

3

+VREFDQ_SA_M3

DRAMRST_CNTRL {27}

3

+VREFDQ_SB_M3

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Quanta Computer Inc.

PROJECT :

Haswell 2/5 (DDR3 I/F)

Thursday, December 20, 2012

1

BD6

4 49

1A

5

4

3

2

1

05

D D

Haswell Processor (DDI,eDP,FDI)

Haswell rPGA EDS

IV_HDMITX2#{28} IV_HDMITX2{28} IV_HDMITX1#{28} IV_HDMITX1{28} IV_HDMITX0#{28} IV_HDMITX0{28} IV_HDMICLK#{28} IV_HDMICLK{28}

C C

B B

T28

DDIB_TXBN_0

U28

DDIB_TXBP_0

T30

DDIB_TXBN_1

U30

DDIB_TXBP_1

U29

DDIB_TXBN_2

V29

DDIB_TXBP_2

U31

DDIB_TXBN_3

V31

DDIB_TXBP_3

T34

DDIC_TXCN_0

U34

DDIC_TXCP_0

U35

DDIC_TXCN_1

V35

DDIC_TXCP_1

U32

DDIC_TXCN_2

T32

DDIC_TXCP_2

U33

DDIC_TXCN_3

V33

DDIC_TXCP_3

P29

DDID_TXDN_0

R29

DDID_TXDP_0

N28

DDID_TXDN_1

P28

DDID_TXDP_1

P31

DDID_TXDN_2

R31

DDID_TXDP_2

N30

DDID_TXDN_3

P30

DDID_TXDP_3

HSW_RPGA_EDS_PGA

eDP

EDP_AUXN EDP_AUXP

EDP_HPD

EDP_RCOMP

EDP_DISP_UTIL

EDP_TXN_0 EDP_TXP_0 EDP_TXN_1 EDP_TXP_1

FDI_TXN_0 FDI_TXP_0 FDI_TXN_1 FDI_TXP_1

DDI

8 OF 9

U23H

M27

INT_EDP_AUXN

N27

INT_EDP_AUXP

P27 E24

EDP_RCOMP

R27

P35

INT_EDP_TXN0

R35

INT_EDP_TXP0

N34

INT_EDP_TXN1

P34

INT_EDP_TXP1

P33

FDI_TXN0

R33

FDI_TXP0

N32

FDI_TXN1

P32

FDI_TXP1

<CPU>

INT_EDP_AUXN {26} INT_EDP_AUXP {26}

INT_EDP_HPD {29}

TP110

B2A

INT_EDP_TXN0 {26} INT_EDP_TXP0 {26} INT_EDP_TXN1 {26} INT_EDP_TXP1 {26} FDI_TXN0 {8} FDI_TXP0 {8} FDI_TXN1 {8} FDI_TXP1 {8}

R134 24.9/F_4

+VCCIOA_OUT

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

Haswell 3/5 (DDI/eDP)

Thursday, December 20, 2012

1

BD6

5 49

1A

5

Haswell Processor (POWER)

TP32 TP31 TP29 TP28

K27

RSVD

L27

RSVD

T27

RSVD

V27

RSVD

AB11

VDDQ

AB2

VDDQ

AB5

VDDQ

AB8

VDDQ

AE11

VDDQ

AE2

VDDQ

AE5

VDDQ

AE8

VDDQ

AH11

VDDQ

K11

VDDQ

N11

VDDQ

N8

VDDQ

T11

VDDQ

T2

VDDQ

T5

VDDQ

T8

VDDQ

W11

VDDQ

W2

VDDQ

W5

VDDQ

W8

VDDQ

N26

RSVD

K26

VCC

AL27

RSVD

AK27

RSVD

AL35

VCC_SENSE

E17

RSVD

AN35

VCCIO_OUT

A23

FC_A23

F22

VCOMP_OUT

W32

RSVD

AL16

RSVD

J27

RSVD

AL13

RSVD

AM28

VIDALERT

AM29

VIDSCLK

AL28

VIDSOUT

AP35

VSS

H27

PWR_DEBUG

AP34

VSS

AT35

RSVD_TP

AR35

RSVD_TP

AR32

RSVD_TP

AL26

RSVD_TP

AT34

VSS

AL22

VSS

AT33

VSS

AM21

VSS

AM25

VSS

AM22

VSS

AM20

VSS

AM24

VSS

AL19

VSS

AM23

VSS

AT32

VSS

Y25

VCC

Y26

VCC

Y27

VCC

Y28

VCC

Y29

VCC

Y30

VCC

Y31

VCC

Y32

VCC

Y33

VCC

Y34

VCC

Y35

VCC

HSW_RPGA_EDS_PGA

Haswell rPGA EDS

+1.35V_CPU 4.2A

+1.35V_CPU

D D

VDDQ Output Decoupling Recommendations

330uFx2 7343 22uFx11 10uFx10

C C

B B

C515 10U/6.3V_8X

+VCCIO_OUT_R

0805 0805

300mA 300mA

C511 10U/6.3V_8X

C122 10U/6.3V_8X

C516 10U/6.3V_8X

C101 10U/6.3V_8X

BOT socket side 5 onTOP, 6 on BOT inside socket cavity 5 onTOP, 5 on BOT inside socket cavity

+VCC_CORE

VCC_SENSE{44}

+VCCIOA_OUT

C728

0.1U/10V_4X

C518 10U/6.3V_8X

C527 10U/6.3V_8X

C519 10U/6.3V_8X

C512 10U/6.3V_8X

+VCCIO_OUT +VCCIO_PCH

B2A

C89 10U/6.3V_8X

C535 10U/6.3V_8X

C528 10U/6.3V_8X

C100 10U/6.3V_8X

R576 100_4 R575 0_4 R79 0_1206

R612 *0_1206 R611 0_1206

R88 0_4

C90 10U/6.3V_8X

C524 10U/6.3V_8X

C120 10U/6.3V_8X

C91 10U/6.3V_8X

C121 10U/6.3V_8X

C534 10U/6.3V_8X

C525 10U/6.3V_8X

C102 10U/6.3V_8X

+VCC_CORE

VCC_SENSE_R +VCCIO_OUT_R

+VCCIO_PCH_R +VCCIOA_OUT_R

H_CPU_SVIDART# H_CPU_SVIDCLK H_CPU_SVIDDAT

PWR_DEBUG_R

+VCC_CORE

TP30 TP5

TP10

TP25 TP4 TP33 TP3

TP18 TP17 TP2 TP11

4

<CPU>

U23E

AA26

VCC

AA28

VCC

AA34

VCC

5 OF 9

AA30

VCC

AA32

VCC

AB26

VCC

AB29

VCC

AB25

VCC

AB27

VCC

AB28

VCC

AB30

VCC

AB31

VCC

AB33

VCC

AB34

VCC

AB32

VCC

AC26

VCC

AB35

VCC

AC28

VCC

AD25

VCC

AC30

VCC

AD28

VCC

AC32

VCC

AD31

VCC

AC34

VCC

AD34

VCC

AD26

VCC

AD27

VCC

AD29

VCC

AD30

VCC

AD32

VCC

AD33

VCC

AD35

VCC

AE26

VCC

AE32

VCC

AE28

VCC

AE30

VCC

AG28

VCC

AG34

VCC

AE34

VCC

AF25

VCC

AF26

VCC

AF27

VCC

AF28

VCC

AF29

VCC

AF30

VCC

AF31

VCC

AF32

VCC

AF33

VCC

AF34

VCC

AF35

VCC

AG26

VCC

AH26

VCC

AH29

VCC

AG30

VCC

AG32

VCC

AH32

VCC

AH35

VCC

AH25

VCC

AH27

VCC

AH28

VCC

AH30

VCC

AH31

VCC

AH33

VCC

AH34

VCC

AJ25

VCC

AJ26

VCC

AJ27

VCC

AJ28

VCC

AJ29

VCC

AJ30

VCC

AJ31

VCC

AJ32

VCC

AJ33

VCC

AJ34

VCC

AJ35

VCC

G25

VCC

H25

VCC

J25

VCC

K25

VCC

L25

VCC

M25

VCC

N25

VCC

P25

VCC

R25

VCC

T25

VCC

U25

VCC

U26

VCC

V25

VCC

V26

VCC

W26

VCC

W27

VCC

PC533 22U/6.3V_8X

PC539 22U/6.3V_8X

PC545 22U/6.3V_8X

PC534 22U/6.3V_8X

PC540 22U/6.3V_8X

PC546 22U/6.3V_8X

PC535 22U/6.3V_8X

PC541 22U/6.3V_8X

PC547 22U/6.3V_8X

+VCC_CORE 85A

PC536 22U/6.3V_8X

PC542 22U/6.3V_8X

3

PC537 22U/6.3V_8X

PC543 22U/6.3V_8X

PC538 22U/6.3V_8X

PC544 22U/6.3V_8X

B2A

+VCC_CORE

2

1

06

Power Test Propose

+1.05V +VCCIO_OUT+1.05V

SVID

<CPU>

Place PU resistor close to CPU

H_CPU_SVIDDAT

Place PU resistor close to CPU

H_CPU_SVIDART#

H_CPU_SVIDCLK

R143 150_4

PWR_DEBUG_R

R139 *10K_4

+VCCIO_OUT

R112 130/F_4

<CPU>

R113 0_4

R107 43_4

R110 0_4

R65 *0_8

R614 0_6

+VCCIO_OUT

C729

0.1U/10V_4X

+VCCIO_OUT

+VCCIO_PCH+1.05V

Near R112

B2A

R108 75/F_4

C49 *4.7U/6.3V_6X

C588 *4.7U/6.3V_6X

VR_SVIDDAT {44}

VR_SVIDART# {44}

VR_SVIDCLK {44}

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

Haswell 4/5 (POWER)

Thursday, December 20, 2012

1

BD6

6 49

1A

5

4

3

2

1

Haswell Processor (GND) Haswell Processor (CFG,RSVD)

Haswell rPGA EDS

A10

VSS

A13

VSS

A16

VSS

A19

VSS

A22

VSS

A25

VSS

A27

VSS

A29

VSS

A3

VSS

D D

C C

B B

A31

VSS

A33

VSS

A4

VSS

A7

VSS

AA11

VSS

AA25

VSS

AA27

VSS

AA31

VSS

AA29

VSS

AB1

VSS

AB10

VSS

AA33

VSS

AA35

VSS

AB3

VSS

AC25

VSS

AC27

VSS

AB4

VSS

AB6

VSS

AB7

VSS

AB9

VSS

AC11

VSS

AD11

VSS

AC29

VSS

AC31

VSS

AC33

VSS

AC35

VSS

AD7

VSS

AE1

VSS

AE10

VSS

AE25

VSS

AE29

VSS

AE3

VSS

AE27

VSS

AE35

VSS

AE4

VSS

AE6

VSS

AE7

VSS

AE9

VSS

AF11

VSS

AF6

VSS

AF8

VSS

AG11

VSS

AG25

VSS

AE31

VSS

AG31

VSS

AE33

VSS

AG6

VSS

AH1

VSS

AH10

VSS

AH2

VSS

AG27

VSS

AG29

VSS

AH3

VSS

AG33

VSS

AG35

VSS

AH4

VSS

AH5

VSS

AH6

VSS

AH7

VSS

AH8

VSS

AH9

VSS

AJ11

VSS

AJ5

VSS

AK11

VSS

AK25

VSS

AK26

VSS

AK28

VSS

AK29

VSS

AK30

VSS

AK32

VSS

E19

VSS

HSW_RPGA_EDS_PGA

U23F

AK34

VSS

AK5

VSS

AL1

VSS

AL10

VSS

AL11

VSS

AL12

VSS

AL14

VSS

AL15

VSS

AL17

VSS

AL18

VSS

AL2

VSS

AL20

VSS

AL21

VSS

AL23

VSS

E22

VSS

AL3

VSS

AL4

VSS

AL5

VSS

AL6

VSS

AL7

VSS

AL8

VSS

AL9

VSS

AM10

VSS

AM13

VSS

AM16

VSS

AM19

VSS

E25

VSS

AM32

VSS

AM4

VSS

AM7

VSS

AN10

VSS

AN13

VSS

AN16

VSS

AN19

VSS

AN2

VSS

AN21

VSS

AN24

VSS

AN27

VSS

AN30

VSS

AN34

VSS

AN4

VSS

AN7

VSS

AP1

VSS

AP10

VSS

AP13

VSS

AP16

VSS

AP19

VSS

AP4

VSS

AP7

VSS

W25

VSS

AR10

VSS

AR13

VSS

AR16

VSS

AR19

VSS

AR2

VSS

AR22

VSS

AR25

VSS

AR28

VSS

AR31

VSS

AR34

VSS

AR4

VSS

AR7

VSS

AT10

VSS

AT13

VSS

AT16

VSS

AT19

VSS

AT21

VSS

AT24

VSS

AT27

VSS

AT3

VSS

AT30

VSS

AT4

VSS

AT7

VSS

B10

VSS

B13

VSS

B16

VSS

B19

VSS

B2

VSS

B22

VSS

6 OF 9

Haswell rPGA EDS

B34

VSS

B4

VSS

B7

VSS

C1

VSS

C10

VSS

C13

VSS

C16

VSS

C19

VSS

C2

VSS

C22

VSS

C24

VSS

C26

VSS

C28

VSS

C30

VSS

C32

VSS

C34

VSS

C4

VSS

C7

VSS

D10

VSS

D13

VSS

D16

VSS

D19

VSS

D22

VSS

D25

VSS

D27

VSS

D29

VSS

D31

VSS

D33

VSS

D35

VSS

D4

VSS

D7

VSS

E1

VSS

E10

VSS

E13

VSS

E16

VSS

E4

VSS

E7

VSS

F10

VSS

F11

VSS

F12

VSS

F14

VSS

F15

VSS

F17

VSS

F18

VSS

F20

VSS

F21

VSS

F23

VSS

F24

VSS

F26

VSS

F28

VSS

F30

VSS

F32

VSS

F34

VSS

F4

VSS

F6

VSS

F7

VSS

F8

VSS

F9

VSS

G1

VSS

G11

VSS

G2

VSS

G27

VSS

G29

VSS

G3

VSS

G31

VSS

G33

VSS

G35

VSS

G4

VSS

G5

VSS

H10

VSS

H26

VSS

H6

VSS

H7

VSS

J11

VSS

J26

VSS

J28

VSS

J30

VSS

J32

VSS

J34

VSS

J6

VSS

K1

VSS

HSW_RPGA_EDS_PGA

Haswell rPGA EDS

AT1

RSVD_TP

AT2

RSVD_TP

AD10

RSVD

A34

RSVD_TP

A35

RSVD_TP

W29

RSVD_TP

W28

RSVD_TP

G26

RSVD30

TESTLO_G26

W33

RSVD

AL30

RSVD

AL29

RSVD

F25

VCC

C35

RSVD_TP

B35

RSVD_TP

AL25

RSVD_TP

W30

RSVD38

RSVD_TP

W31

RSVD39

RSVD_TP

W34

TESTLO

AT20

CFG_0

AR20

CFG_1

AP20

CFG2

CFG_2

AP22

CFG_3

AT22

CFG4

CFG_4

AN22

CFG5

CFG_5

AT25

CFG6

CFG_6

AN23

CFG7

CFG_7

AR24

CFG_8

AT23

CFG_9

AN20

CFG_10

AP24

CFG_11

AP26

CFG_12

AN25

CFG_13

AN26

CFG_14

AP25

CFG_15

HSW_RPGA_EDS_PGA

The CFG signals have a default value of '1' if not terminated on the board.

x1 = Normal operation x0 = Lane numbers reversed x1 = Disabled x0 = Enabled x00 = 1 x8 & 2 x4 PCI Express x01 = reserved x10 = 2 x8 PCI Express x11 = 1 x16 PCI Express x1 = PEG train follow RESETB de-asseted x0 = PEG wait for BIOS fro training

U23I

RSVD_TP RSVD_TP RSVD_TP RSVD_TP

CFG_RCOMP

CFG_16 CFG_18 CFG_17 CFG_19

RSVD RSVD RSVD RSVD RSVD RSVD RSVD

RSVD RSVD

RSVD

RSVD_TP RSVD_TP

RSVD_TP

RSVD RSVD

9 OF 9

NC

C23 B23 D24 D23

AT31 AR21 AR23 AP21 AP23

AR33 G6 AM27 AM26 F5 AM2 K6

E18 U10

P10 B1

A2 AR1

E21 E20

AP27 AR26

AL31 AL32

CFG2

CFG4

CFG6 CFG5

CFG7

CFG_RCOMP

R929 0_4 R930 0_4

R82 *EV@1K_4

R567 PIV@1K_4

R566 *EV@1K_4 R81 EV@1K_4

R83 *1K_4

7 OF 9

U23G

VSS_SENSE

RSVD

K10

VSS

K2

VSS

K29

VSS

K3

VSS

K31

VSS

K33

VSS

K35

VSS

K4

VSS

K5

VSS

K7

VSS

K8

VSS

K9

VSS

L11

VSS

L26

VSS

L6

VSS

M11

VSS

M26

VSS

M28

VSS

M30

VSS

M32

VSS

M34

VSS

M6

VSS

N1

VSS

N10

VSS

N2

VSS

N29

VSS

N3

VSS

N31

VSS

N33

VSS

N35

VSS

N4

VSS

N5

VSS

N6

VSS

N7

VSS

N9

VSS

P11

VSS

P26

VSS

P5

VSS

R11

VSS

R26

VSS

R28

VSS

R30

VSS

R32

VSS

R34

VSS

R5

VSS

T1

VSS

T10

VSS

T29

VSS

T3

VSS

T31

VSS

T33

VSS

T35

VSS

T4

VSS

T6

VSS

T7

VSS

T9

VSS

U11

VSS

U27

VSS

V11

VSS

V28

VSS

V30

VSS

V32

VSS

V34

VSS

W1

VSS

W10

VSS

W3

VSS

W35

VSS

W4

VSS

W6

VSS

W7

VSS

W9

VSS

Y11

VSS

H11

VSS

AL24

VSS

F19

VSS

T26

VSS

AK35

VSS_SENSE_R

AK33

R607 49.9/F_4

CFG[2] PCI Express Static Lane Reversal

CFG[4]

CFG[6:5]

CFG[7]

R582 0_4 R583 100_4

R135 49.9/F_4

+VCC_CORE

TP26 TP27

TP80 TP79

TP86

TP72 TP76 TP88 TP84 TP82 TP75 TP74 TP83

Configuration Signals:

eDP enable

PCI Express Bifurcation

PEG defer training

VSS_SENSE {44}

R565 49.9/F_4

TP87 TP85 TP78 TP77

R927 *2.2K_4

R928 *1K_4

B2A

SYS_PWROK_R

07

SYS_PWROK_R {8,27}

B2A

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

Haswell 5/5 (CFG/GND)

Thursday, December 20, 2012

1

BD6

7 49

1A

5

4

3

2

1

Lynx Point (DMI,FDI,PM)

(DSW)

(SUS)

(DSW)

LPT_PCH_M_EDS

DMI

System Power

Management

REV = 5

(SUS)

FDI

(SUS)

(SUS) (SUS)

U31B

DMI_IREF

DMI_RCOMP

SUSACK#_R

SYS_RESET# SYS_PWROK_R PCH_PWROK PCH_APWROK

PCH_SUSPWRACK PCH_PWRBTN# PCH_ACPRESENT PCH_BATLOW# PCH_RI#

PCH_SLP_WLAN#

B2A

AW22

DMI_RXN_0

AR20

DMI_RXN_1

AP17

DMI_RXN_2

AV20

DMI_RXN_3

AY22

DMI_RXP_0

AP20

DMI_RXP_1

AR17

DMI_RXP_2

AW20

DMI_RXP_3

BD21

DMI_TXN_0

BE20

DMI_TXN_1

BD17

DMI_TXN_2

BE18

DMI_TXN_3

BB21

DMI_TXP_0

BC20

DMI_TXP_1

BB17

DMI_TXP_2

BC18

DMI_TXP_3

BE16

DMI_IREF

AW17

TP12

AV17

TP7

AY17

DMI_RCOMP

R6

SUSACK#

AM1

SYS_RESET#

AD7

SYS_PWROK

F10

PWROK

AB7

APWROK

H3

DRAMPWROK

J2

RSMRST#

J4

SUSWARN#/SUSPW RNACK/GPIO30

K1

PWRBTN#

E6

ACPRESENT/GPIO31

K7

BATLOW#/GPIO72

N4

RI#

AB10

TP21

D2

SLP_WLAN#/GPIO29

LPT_PCH_M_EDS/BGA

DMI_RXN0{3} DMI_RXN1{3}

DMI_RXN2{3} DMI_RXN3{3}

D D

XDP_DBRST#{3,25}

PM_DRAM_PWRGD{27}

C C

DNBSWON#{37}

PCH_SLP_WLAN#{37}

DMI_RXP0{3} DMI_RXP1{3}

DMI_RXP2{3} DMI_RXP3{3}

DMI_TXN0{3} DMI_TXN1{3}

DMI_TXN2{3} DMI_TXN3{3}

DMI_TXP0{3} DMI_TXP1{3}

DMI_TXP2{3} DMI_TXP3{3}

R759 0_4

+1.5V

R772 7.5K/F_4

R796 0_4

RSMRST#{25,37}

R846 0_4

TP54

FDI_RXN_0 FDI_RXN_1 FDI_RXP_0 FDI_RXP_1

FDI_CSYNC

FDI_INT

FDI_IREF

FDI_RCOMP

DSWVRMEN

DPWROK

WAKE#

CLKRUN#

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_S4# SLP_S3#

SLP_A# SLP_SUS# PMSYNCH SLP_LAN#

4 OF 11

<CLG>

TP16

TP5 TP15 TP10

TP17 TP13

AJ35 AL35 AJ36 AL36 AV43 AY45 AV45 AW44 AL39 AL40 AT45 AU42 AU44 AR44

C8 L13 K3 AN7 U7 Y6 Y7 C6 H1 F3 F1 AY3 G5

FDI_IREF

FDI_RCOMP

DSWVREN

DPWROK

PCIE_WAKE# CLKRUN#

SUS_STAT#

PCH_SUSCLK

PCH_SLP_S5#

PCH_SLP_A# PCH_SLP_SUS#

PCH_SLP_LAN#

FDI_TXN0 {5} FDI_TXN1 {5} FDI_TXP0 {5} FDI_TXP1 {5}

FDI_CSYNC {3} FDI_INT {3}

R768 0_4

R767 7.5K/F_4

DSWVREN {9}

PCIE_WAKE# {30,35} CLKRUN# {37}

TP55

R358 0_4

TP53

SUSC# {37} SUSB# {37,40}

TP103

PM_SYNC {3}

B2A

+1.5V

SUSCLK {9,37}

C357 *E@10P/50V_4C

Lynx Point (CRT,PCI,DDI CNTL)

(CORE) (CORE) (CORE) (CORE) (CORE) (CORE)

LPT_PCH_M_EV

LVDSCRT

REV = 5

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPB_AUXN DDPC_AUXN DDPD_AUXN

DISPLAY

DDPB_AUXP DDPC_AUXP DDPD_AUXP

DDPB_HPD DDPC_HPD DDPD_HPD

PCI

(CORE)

PIRQE#/GPIO2

(CORE)

PIRQF#/GPIO3

(CORE)

PIRQG#/GPIO4

(CORE)

PIRQH#/GPIO5

PME#

PLTRST#

5 OF 11

<CLG>

DGPU_PWR_EN{20}

U31E

CRT_HSYNC_R CRT_VSYNC_R DAC_IREF

LVDS_BKLT_PCH

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

DGPU_HOLD_RST# GPIO52

BBS_BIT1 GPIO53 STP_A16OVR

T45

VGA_BLUE

U44

VGA_GREEN

V45

VGA_RED

M43

VGA_DDC_CLK

M45

VGA_DDC_DATA

N42

VGA_HSYNC

N44

VGA_VSYNC

U40

DAC_IREF

U39

VGA_IRTN

N36

EDP_BKLTCTL

K36

EDP_BKLTEN

G36

EDP_VDDEN

H20

PIRQA#

L20

PIRQB#

K17

PIRQC#

M20

PIRQD#

A12

GPIO50

B13

GPIO52

C12

GPIO54

C10

GPIO51

A10

GPIO53

AL6

GPIO55

LPT_PCH_M_EDS/BGA

INT_CRT_BLU{29} INT_CRT_GRN{29}

INT_CRT_RED{29} INT_CRT_DDCCLK{29} INT_CRT_DDCDAT{29}

INT_HSYNC{29} INT_VSYNC{29}

PCH_BRIGHT{26} LVDS_BKLT_PCH{26,29} INT_LVDS_DIGON{29}

GPIO52{11,38}

DGPU_HOLD_RST#{16}

R844 PICRT@33_4 R842 PICRT@33_4 R370 PICRT@649/F_4

R371 OEV@0_4

DGPU_PWR_EN

BBS_BIT1{9}

TP107

STP_A16OVR{9}

GPIO53 can not PD

R40 R39 R35 R36 N40 N38

H45 K43 J42 H43 K45 J44 K40 K38 H39

G17 F17 L15 M15 AD10 Y11

BOARD_ID14 BOARD_ID3 BOARD_ID0 PCI_PME# PCI_PLTRST#

<CLG>

DGPU_PWR_EN

HDMI_DDCCLK {28}

HDMI_DDCDATA {28}

HDMI_CON_HP_PCH {28}

ODD_MD# {33}

BOARD_ID14 {11} BOARD_ID3 {11} BOARD_ID0 {11}

TP52

+3V

R282 PX@1K_4

3

2

1

B2A

DGPU_PWR_EN_R

Q30 PX@ME2N7002E_200MA

DGPU_PWR_EN_R {47}

08

B B

PCH PWROK&APWROK CRT IMPEDANCE MATCHING

DELAY_VR_PWRGOOD{3,8,44}

A A

<CLG>

B2A

+3V

+3V_DS3

+VCCPDSW

PCH_PWROK

PCH_APWROK

B2A

PCI_PLTRST#

SYSPWOK DSW CircuitPCH PM PU/PD

SYS_PWROK_R{7,27}

R414 0_4

MPWROK

R416 *0_4 R400 *0_4

R417 0_4

SYS_RESET# CLKRUN#

PM_DRAM_PWRGD PCH_RI#

PCH_SUSPWRACK

SYS_PWROK_R

PCH_PWROK

RSMRST#

PCH_SLP_LAN# PCH_SLP_WLAN#

R799 1K_4 R790 8.2K_4

R854 *DS3@200/F_4 R843 10K_4

R855 10K_4

R348 10K_4 R415 10K_4 R853 10K_4

R862 *10K_4 R401 10K_4

5

+3V_DS3

C396 *0.1U/10V_4X

2 1

U14

3 5

*TC7SH08FU

R418 *SHORT_4

R460 0_4

SYS_PWROK_R

4

B2A

4

R454 100K_4

R419 EV@0_4

+3V_DS3

C398 *0.1U/10V_4X

2

4

1

U13 *TC7SH08FU(F)

3 5

PLTRST# {3,30,35,36,37,38}

B2A

MPWROK

C397 *E@10P/50V_4C

VGA_PLTRST# {16}

DELAY_VR_PWRGOOD {3,8,44}

MPWROK {25,37,44}

PCI PUPLTRST# Buffer

DGPU_HOLD_RST# DGPU_PWR_EN

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

ODD_MD#

R887 10K_4

R888 10K_4

R886 10K_4

R891 8.2K_4

R885 8.2K_4

R890 8.2K_4

R884 8.2K_4

+3V

<CLG>

PCH_ACPRESENT

SUSACK#_R

PCH_SUSPWRACK

DPWROK

PCH_SLP_SUS#

3

PCH WAKE EVENT

GPIO27{11,37}

R423 10K_4 R422 DS3@0_4

Reserve for DS3

R94 DS3@0_4

R848 0_4

R856 NDS3@0_4 R865 DS3@0_4 R861 DS3@100K_4 R859 DS3@0_4

PCH_BATLOW#

PCH_PWRBTN#

PCIE_WAKE#

GPIO27

+VCCPDSW

AC_PRESENT {37}

SUSACK# {37}

SUS_PWR_ACK {37}

RSMRST#

SYS_HWPG {37,41}

SLP_SUS# {12,37}

R425 8.2K_4

R412 *DS3@10K_4

R398 DS3@10K_4 R397 NDS3@10K_4

R404 DS3@10K_4 R405 NDS3@10K_4

B2A

2

+VCCPDSW

+VCCPDSW +3V_S5

Net Name

AC_PRESENT SUS_PWR_ACK SUSACK#_R DPWROK SLP_SUS

R840 PICRT@150/F_4 R836 PICRT@150/F_4 R826 PICRT@150/F_4

B2A

Deep Sx SupportVDeep Sx No Support

V NA

V

V NA

Size Document Number Rev

Date: Sheet of

NA

V

Quanta Computer Inc.

PROJECT :

LPT 1/6 (DMI/FDI/VGA)

Thursday, December 20, 2012

1

INT_CRT_BLU INT_CRT_GRN INT_CRT_RED

BD6

8 49

1A

23

Y4

32.768KHZ_10

4 1

<RTC>

D10 *RB500V-40_100MA D8

D9 *RB500V-4 0_100MA

<CLG>

+3V

R762 10K_4 R793 10K_4 R788 10K_4 R785 10K_4

5

<CLG>

BAT54C-7-F_200MA

B2A

RTC_X1

R864 10M_4

RTC_X2

SERIRQ SATA_LED# GPIO21 BBS_BIT0

R814 XDP@210/F_4

R813 XDP@100/F_4

+3V_DS3

+3V_RTC

R467 20K_4

C682 1U/6.3V_4X

G2

*SHORT PAD

Trace = 30mils for power

B2A

R466 20K_4

C408 1U/6.3V_4X

B2A

C407 1U/6.3V_4X

R818 XDP@210/F_4

PCH_JTAG_TDO_R PCH_JTAG_TDI_R PCH_JTAG_TMS_R

PCH_JTAG_TCK_R

R825

R820

XDP@51_4

XDP@100/F_4

RTC_RST#

G3

*SHORT PAD

SRTC_RST#

G1

*SHORT PAD

RTC Clock 32.768KHz (RTC)

C675 18P/50V_4C

C676 18P/50V_4C

RTC Circuitry (RTC)

D D

+3VPCU

+R_3VRTC_R

+R_3VRTC

R481 1K_4

12

CN14

AAA-BAT-054-K01

PU & Password Clear

C C

PCH JTAG

PCH_JTAG_TDO{25 }

PCH_JTAG_TDI{25} PCH_JTAG_TMS{ 25} PCH_JTAG_TCK{25}

<CLG>

JTAG_TCK,JTAG_TMS Trace Length < 9000mils

R819 XDP@0_4 R816 XDP@0_4 R821 XDP@0_4 R824 XDP@0_4

B2A

1

R485 *SHORT_4

U9

1

CE#

6

SCK

5

SI

2

SO

HOLD#

3

WP#

W25Q64FVSSIQ

U8

1

CE#

6

SCK

5

SI

2

SO

HOLD#

3

WP#

*W25Q16BVSSIG

+5V

R482 *33K/F_4

2

Q37 *2N7002K_300MA

PCH_SPI_CS0#_R2R PCH_SPI_CLK_R2R PCH_SPI_SO_RR PCH_SPI_SI_R2R

8

VDD

7

SPI_HOLD#

4

VSS

8

VDD

7

SPI_HOLD#

4

VSS

HDA

<CLG>

B B

ACZ_RST#_AUDIO{34}

ACZ_SDOUT_AUDIO{34}

BIT_CLK_AUDIO{34}

ACZ_SYNC_AUDIO{34}

ACZ_SDIN0_AUDIO{34}

PCH Dual SPI

EC+BIOS @4M

ME@2M

A A

<CLG>

PCH_SPI_CS0#_R2 PCH_SPI_CLK_R2 PCH_SPI_SI_R2 PCH_SPI_SO_R

+3V_DS3

B2A

PCH_SPI_CS1#_R2 PCH_SPI_CLK_R2 PCH_SPI_SI_R2 PCH_SPI_SO_R

R889 33_4 R883 33_4 R882 33_4

R484 33_4

PCH_SPI_IO2

5

HDA_RST#_R HDA_SDO_R HDA_BCLK_R

C674 *0.1U/16V_4Y

HDA_SYNC_R

ACZ_SDIN0_AUDIO

PCH_SPI_CS0#{37} PCH_SPI_CLK{37} PCH_SPI_SI{37} PCH_SPI_SO{37}

R21533_4 R20633_4

R20533_4 R217 3.3K/F_4 R214 *15_4

R191 *33_4 R216 *33_4 R211 *33_4 R200 *33_4

HDA_SYNC_R HDA_SYNC_Q

R483 *1M_4

R192 33_4 R199 33_4 R202 33_4 R212 33_4

PCH_SPI_CS0#_R2R PCH_SPI_CLK_R2R PCH_SPI_SI_R2R PCH_SPI_SO_RR

C232

*22P/50V_4N

PCH_SPI_CS1#_R2RR PCH_SPI_CLK_R2R_R PCH_SPI_SI_R2R_R PCH_SPI_SO_R1_R

C230

*22P/50V_4N

SPI_WP#

+3V_RTC

PM_TEST_RST#{25}

3

R878 1M_4

PCBEEP{34}

TP104

BOARD_ID16{11}

B2A

C420 *33P/50V_4N

R190 3.3K/F_4 R195 *15_4

4

Lynx Point (RTC,IHDA,SATA,JTAG)

U31A

B5

RTC_X1 RTC_X2 SRTC_RST# SM_INTRUDER# PCH_INVRMEN RTC_RST#

HDA_BCLK_R HDA_SYNC_Q

PCBEEP

HDA_RST#_R ACZ_SDIN0_AUDIO

HDA_SDO_R GPIO33

BOARD_ID16

PCH_JTAG_TCK_R PCH_JTAG_TMS_R PCH_JTAG_TDI_R PCH_JTAG_TDO_R

R387 *0_4

R354 *0_4

RTCX1

B4

RTCX2

B9

SRTCRST#

A8

INTRUDER#

G10

INTVRMEN

D9

RTCRST#

B25

HDA_BCLK

A22

HDA_SYNC

AL10

SPKR

C24

HDA_RST#

L22

HDA_SDI0

K22

HDA_SDI1

G22

HDA_SDI2

F22

HDA_SDI3

A24

HDA_SDO

B17

DOCKEN#/GPIO33

C22

HDA_DOCK_RST#/GPIO13

AB3

JTAG_TCK

AD1

JTAG_TMS

AE2

JTAG_TDI

AD3

JTAG_TDO

F8

TP25

C26

TP22

AB6

TP20

LPT_PCH_M_EDS/BGA

SMBus

(CORE)

JTAGRTC AZALIA

<CLG>

+3V_DS3

SMB_RUN_CLK{14,15,30,38 }

SMB_RUN_DAT{14,15,30,38}

LPT_PCH_M_EDS

(SUS)

+3V

PCH STRAPING

Pin Name

SPKR

GPIO62 / SUSCLK

B2A

C220

0.1U/16V_4Y

GPIO55

INTVRMEN

GPIO51

SATA1GP/GPIO19

HDA_SDO

GPIO36

SATA3GP/GPIO37

GPIO8

GPIO28

DSWVREN

+3V_DS3

PCH_SPI_IO3SPI_WP#

+3V_DS3

B2A

C223 *0.1U/16V_4Y

4

REV = 5

SATA

R392 10K_4 R863 10K_4

R474 2.2K_4 R476 2.2K_4

R369 2.2K_4 R384 2.2K_4

R480 2.2K_4 R492 2.2K_4

R486 4.7K_4

R487 4.7K_4

B2A

(CORE) (CORE)

1 OF 11

SATA_RXN_0 SATA_RXP_0

SATA_TXN_0 SATA_TXP_0

SATA_RXN_1 SATA_RXP_1

SATA_TXN_1 SATA_TXP_1

SATA_RXN_2 SATA_RXP_2

SATA_TXN_2 SATA_TXP_2

SATA_RXN_3 SATA_RXP_3

SATA_TXN_3 SATA_TXP_3

SATA_RXN4/PERN1 SATA_RXP4/PERP1

SATA_TXN4/PETN1

SATA_TXP4/PETP1

SATA_RXN5/PERN2 SATA_RXP5/PERP2

SATA_TXN5/PETN2

SATA_TXP5/PETP2

SATA_RCOMP

SATA0GP/GPIO21 SATA1GP/GPIO19

SMBALERT# PCH_TEMP_ALERT#

SCLK SDATA

SMB_ME0_CLK SMB_ME0_DAT

SMB_ME1_CLK SMB_ME1_DAT

Q38B 2N7002KDW_115MA

126

Q38A 2N700 2KDW_115MA

Usage

No Reboot

PLL On-Die Voltage Regulator Enable

Top-Block Swap Override

Integrated VRM Enable

Boot BIOS Strap bit 1

Boot BIOS Strap bit 0

Flash Descriptor Security Override / Intel ME Debug Mode

RSVD

TLS Confidentiality

RSVD RSMRST#

PLL on die VR enable RSMRST#

On Die DSW VR Enable

3

BC8

SATA0RXN SATA0RXP

SATA0TXN SATA0TXP

TP97 TP98

TP48 TP47

R774 7.5K/F_4

R789 0_4 R786 0_4 R773 0_4

B2A

SATA_RXN_ODD# {33} SATA_RXP_ODD {33}

SATA_TXN_ODD# {33} SATA_TXP_ODD {33}

SATA_RXN_1ST_HDD# {33} SATA_RXP_1ST_HDD {33}

SATA_TXN_1ST_HDD# {33} SATA_TXP_1ST_HDD {33}

+1.5V

XDP_FN8 {25 } XDP_FN9 {25 } +1.5V

SATALED#

SATA_IREF

BE8 AW8

AY8 BC10

BE10 AV10

AW10 BB9

BD9 AY13

AW13 BC12

BE12 AR13

AT13

BD13 BB13

AV15 AW15

BC14 BE14

AP15 AR15

AY5

SATA_RCOMP

AP3

SATA_LED#

AT1

GPIO21

AU2

BBS_BIT0

BD4

SATA_IREF

BA2

TP9

BB2

TP8

Lynx Point (LPC,SPI,SMBUS,C-LINK,THERMAL)

LAD0

LAD0{30,37}

LAD1

LAD1{30,37}

LAD2

LAD2{30,37}

LAD3

LAD3{30,37}

LFRAME#

LFRAME#{30,37}

PCH_DRQ#0

TP109

B2A

BOARD_ID17{11}

BOARD_ID17 SERIRQ

SERIRQ{37}

PCH_SPI_CLK_R2 PCH_SPI_CS0#_R2 PCH_SPI_CS1#_R2

PCH_SPI_SI_R2 PCH_SPI_SO_R PCH_SPI_IO2 PCH_SPI_IO3

2

U31D

A20

LAD_0

C20

LAD_1

A18

LAD_2

C18

LAD_3

B21

LFRAME#

D21

LDRQ0#

G20

LDRQ1#/GPIO23

AL11

SERIRQ

AJ11

SPI_CLK

AJ7

SPI_CS0#

AL7

SPI_CS1#

AJ10

SPI_CS2#

AH1

SPI_MOSI

AH3

SPI_MISO

AJ4

SPI_IO2

AJ2

SPI_IO3

LPT_PCH_M_EDS/BGA

(CORE)

SPILPC

LPT_PCH_M_EDS

REV = 5

SMBus

(SUS)

C-Link

Thermal

(SUS)

SMBALERT#/GPIO11

(SUS)

SML0ALERT#/GPIO60

SML1ALERT#/PCHHOT#/GPIO74

(SUS)

SML1CLK/GPIO58

(SUS)

SML1DATA/GPIO75

3 OF 11

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK CL_DATA CL_RST#

TD_IREF

EC 2nd_SMB read SML1 Bus of PCH temps

+3V_DS3

B2A

5

2ND_MBCLK{26,37}

34

SCLK

5

SDATA

2ND_MBDATA{26,37}

3 4

6

+3V_DS3

2

*2N7002KDW_115MA

SMB_ME1_CLK

Q40B *2N7002KDW_115MA

B2A

1

SMB_ME1_DAT

Q40A

B2A

Sampled

PWROK

RSMRST#

PWROK

Always

PWROK

Always Must be PU to VCCRTC

3

Configuration

0 = Disable (Int PD) 1 = Enable

0 = Disable 1 = Enable (Int PU)

0 = Top-Block Swap mode 1 = Default (Int PU)

0 = Disable 1 = Enable

Bit1 Bit0 1 0 Resvered 1 1 SPI 0 0 LPC

0 = Security Effect (Int PD) 1 = Can be Override

Internal PD 0 = TLS no confidentiality (Int PD)

1 = TLS with confidentiality

Internal PU 0 = Disable

1 = Enable (Int PU) 1 = Enable

0 = Disable

+3V

ACZ_SDOUT_R{37}

PCBEEP

SUSCLK{8,37}

STP_A16OVR{8}

PCH_INVRMEN

R871 10K_4

BBS_BIT1{8}

BBS_BIT0

GPIO36{11}

FDI_OVRVLTG{11}

GPIO8{11}

PLL_ODVR_EN{11}

DSWVREN{8}

HDA_SDO_R

Circuitry

R345 *1K_4

R357 *1K_4

R340 *1K_4

R403 330K_4R19833_4

R870 *1K_4 R784 *1K_4

R874 *1K_4

R791 *1K_4

R804 1K_4

R827 10K_4

R352 *1K_4 R876 330K_4

R877 *330K_4

+3V

+3V_RTC

+VCC_HDA_IO

+3V

+3V_RTC

2

1

N7

SMBALERT#

R10

SCLK

U11

SDATA

N8

DRAMRST_CNTRL_PCH

U8

SMB_ME0_CLK

R7

SMB_ME0_DAT

H6

PCH_TEMP_ALERT#

K6

SMB_ME1_CLK

N11

SMB_ME1_DAT

AF11

CL_CLK

AF10

CL_DAT

AF7

CL_RST#

BA45

TP1

BC45

TP2

BE43

TP4

BE44

TP3

AY43

TD_IREF

Size Document Number Rev

Date: Sheet of

Thursday, December 20, 2012

Date: Sheet of

Thursday, December 20, 2012

Date: Sheet of

Thursday, December 20, 2012

SCLK {25,30} SDATA {25,30} DRAMRST_CNTRL_PCH {10,27}

TP51 TP49 TP50

R769 8.2K_4

Quanta Computer Inc.

PROJECT :

LPT 2/6 (SATA/HDA/SPI)

1

B2A

BD6

09

9 49

1A

5

4

3

2

1

10

D D

Lynx Point (PCIE,USB3.0,USB2.0)

U31I

AW31

PERN1/USB3RN3

AY31

PERP1/USB3RP3

BE32

PETN1/USB3TN3

BC32

PETP1/USB3TP3

AT31

PERN2/USB3RN4

AR31

PERP2/USB3RP4

BD33

PETN2/USB3TN4

BB33

PETP2/USB3TP4

PCIE_IREF

PCIE_RCOMP

AW33

AY33 BE34

BC34

AT33

AR33 BE36

BC36

AW36

AV36 BD37

BB37 AY38

AW38

BC38 BE38

AT40 AT39

BE40 BC40

AN38 AN39

BD42 BD41

BE30

BC30

BB29

BD29

Co-Lay

PERN_3 PERP_3

PETN_3 PETP_3

PERN_4 PERP_4

PETN_4 PETP_4

PERN_5 PERP_5

PETN_5 PETP_5

PERN_6 PERP_6

PETN_6 PETP_6

PERN_7 PERP_7

PETN_7 PETP_7

PERN_8 PERP_8

PETN_8 PETP_8

PCIE_IREF

TP11

TP6

PCIE_RCOMP

LPT_PCH_M_EDS/BGA

Q60A DS3@2N7002KDW_115MA

Q60B DS3@2N7002KDW_115MA

Q59A DS3@2N7002KDW_115MA

Q59B DS3@2N7002KDW_115MA

PCIE_RXN_WLAN#{30} PCIE_RXP_WLAN{30}

WLAN

PCIE_TXN_WLAN#{30} PCIE_TXP_WLAN{30}

PCIE_RXN_LAN#{35}

LAN

PCIE_RXP_LAN{35}

PCIE_TXN_LAN#{35} PCIE_TXP_LAN{35}

C C

B B

A A

C665 0.1U/10V_4X C664 0.1U/10V_4X

C662 LAN@0.1U/10V_4X C663 LAN@0.1U/10V_4X

R770 0_4

+1.5V

R771 7.5K/F_4

PCIE_TXN_WLAN#_C PCIE_TXP_WLAN_C

PCIE_TXN_LAN#_C PCIE_TXP_LAN_C USB_CCD

USB_SC_OC#_R

USB_OC1#

USB_Normal_OC#_L_Q

SCI#_R

+3V_DS3

126

R897 NDS3@0_4 R901 NS3@0_4

+3V_DS3

5

34

R364 NDS3@0_4 R902 NS3@0_4

+3V_DS3

126

R903 NDS3@0_4 R905 NS3@0_4

+3V_DS3

5

34

R898 NDS3@0_4 R906 NS3@0_4

LPT_PCH_M_EDS

PCIe

USB

9 OF 11

(SUS) (SUS) (SUS) (SUS) (SUS) (SUS) (SUS) (SUS)

B37

USB2N0

D37

USB2P0

A38

USB2N1

C38

USB2P1

A36

USB2N2

C36

USB2P2

A34

USB2N3

C34

USB2P3

B33

USB2N4

D33

USB2P4

F31

USB2N5

G31

USB2P5

K31

USB2N6

L31

USB2P6

G29

USB2N7

H29

USB2P7

A32

USB2N8

C32

USB2P8

A30

USB2N9

C30

USB2P9

B29

USB2N10

D29

USB2P10

A28

USB2N11

C28

USB2P11

G26

USB2N12

F26

USB2P12

F24

USB2N13

G24

USB2P13

AR26

USB3RN1

AP26

USB3RP1

BE24

USB3TN1

BD23

USB3TP1

AW26

USB3RN2

AV26

USB3RP2

BD25

USB3TN2

BC24

USB3TP2

AW29

USB3RN5

AV29

USB3RP5

BE26

USB3TN5

BC26

USB3TP5

AR29

USB3RN6

AP29

USB3RP6

BD27

USB3TN6

BE28

USB3TP6

K24

USBRBIAS#

K26

USBRBIAS

M33

TP24

L33

TP23

P3

OC0#/GPIO59

V1

OC1#/GPIO40

U2

OC2#/GPIO41

P1

OC3#/GPIO42

M3

OC4#/GPIO43

T1

OC5#/GPIO9

N2

OC6#/GPIO10

M1

OC7#/GPIO14

USB_SC_OC# {31,37}

USB_Normal_OC#_R {31,37}

USB_Normal_OC#_L {31,37}

SCI# {37}

Co-Lay B2A

5

4

USBP3N USBP3P

USB_WLAN# USB_WLAN USB_CCD#

USBCOMP

USB_SC_OC#_R USB_OC1# GPIO41 GPIO42 USB_OC4# USB30_SMI# GPIO10 SCI#_R

R362 0_4 R366 0_4

<CLG,U3B,MNW>

USB20#_R1 {31}

USB 2.0(R1)

USB20_R1 {31}

USB20#_R2 {31}

USB 2.0(R2)

USB20_R2 {31} USB20#_L1 {31}

USB 2.0(L1)

USB20_L1 {31} USBP3N {38}

USB Touch

USBP3P {38}

B2A

USB_CARD# {36}

(CARD READER)

USB_CARD {36} USB20#_L2 {31}

(USB2.0 L2)

USB20_L2 {31} USB_WLAN# {30}

(WLAN)

USB_WLAN {30} USB_CCD# {29}

(CCD)

USB_CCD {29}

USB30_RXN1_R {31} USB30_RXP1_R {31} USB30_TXN1_R {31}

USB30_TXP1_R {31} USB30_RXN2_R {31} USB30_RXP2_R {31} USB30_TXN2_R {31} USB30_TXP2_R {31}

R391 22.6/F_4

USB_Normal_OC#_L_Q USB_Normal_OC#_L_Q

USB_OC1# USB_OC4#

GPIO42

USB 3.0(R1)

USB 3.0(R2)

B2A

USB 3.0 Combo Port

+3V_DS3

RP18

10

9 8 7 4

10KX8

EHCI1 EHCI2 xHCI

1 2 3

56

LAN

WLAN

USB 2.0_S&C_OC0#(R1) USB 2.0_Normal_OC#(R2)

USB 2.0_Normal_OC#(L1&L2)

PCH Intenal ClockUSB Overcurrent PCH XDP Signal

PCIE_CLK_LAN_REQ# CLK_PCIE_REQ4# CLK_PCIE_REQ5#

B2A

CLK_PCIE_REQ6# GPIO46

CLK_PCIE_REQ1# CLK_PCIE_REQ2#

CLK_PEGA_REQ#

GPIO10 USB_SC_OC#_R SCI#_R USB30_SMI#GPIO41

3

Lynx Point (CLOCK)

XTAL25_IN

XTAL25_OUT

+3V_DS3

B2A

DRAMRST_CNTRL_PCH

LPT_PCH_M_EDS

(SUS)

(CORE)

(SUS)

PEGA_CLKRQ#/GPIO47

(SUS)

PEGB_CLKRQ#/GPIO56

CLKIN_33MHZLOOPBACK

(CORE)

CLKOUTFLEX0/GPIO64

(CORE)

CLKOUTFLEX1/GPIO65

(CORE)

CLKOUTFLEX2/GPIO66

(CORE)

CLKOUTFLEX3/GPIO67

2 OF 11

R797 1M_4

R386 1K_4 R385 *10K_4

R812 LAN@0X2

2

1

CLK_PCIE_LAN#{35} CLK_PCIE_LAN{35}

PCIE_CLK_LAN_REQ#{35} CLK_PEGA_REQ# {16}

CLK_PCIE_WLAN#{30}

CLK_PCIE_WLAN{30}

PCIE_CLK_WLAN_REQ#{30}

TP100 TP101

PCLK_591{37}

C678 E@4.7P/50V_4C

CLK_PCI_FB

PCLK_DEBUG{30}

4

3

PCIE_CLK_LAN_REQ#

R807 0X2

2

1

CLK_PCIE_WLAN#_R

4

3

CLK_PCIE_WLAN_R

PCIE_CLK_WLAN_REQ#

TP59 TP102

CLK_PCH_PCI2

R866 22_4 R393 NMP@22_4 R867 22_4

CLK_PCH_PCI4

C677 E@4.7P/50V_4C

CLK_PCIE_LAN#_R CLK_PCIE_LAN_R

CLK_PCIE_REQ1#

CLK_PCIE_REQ2#

CLK_PCIE_REQ4#

CLK_PCIE_REQ5#

CLK_PCIE_REQ6#

GPIO46 CLK_PCIE_XDPN CLK_PCIE_XDPP CLK_PCH_PCI0 CLK_PCH_PCI1

CLK_PCH_PCI3

B2A

R841 10K_4 R829 10K_4 R839 10K_4 R828 10K_4 R815 10K_4 R835 10K_4

R806 10K_4 R399 XDP@0_4 R810 10K_4

R346 10K_4 R347 *10K_4

+3V_DS3

+3V

+3V_DS3

B2A

CLK_BUF_EXPN CLK_BUF_EXPPPCIE_CLK_WLAN_REQ# CLK_BUF_CPYCKN CLK_BUF_CPYCKP CLK_BUF_DOT96N CLK_BUF_DOT96P CLK_BUF_CKSSCDN CLK_BUF_CKSSCDP CLK_BUF_REF14

S3_STRAP

B2A

R374 NDS3@10K_4 R375 DS3@10K_4

DRAMRST_CNTRL_PCH{9,27}

U31C

Y43

CLKOUT_PCIE_N_0

Y45

CLKOUT_PCIE_P_0

AB1

PCIECLKRQ0#/GPIO73

AA44

CLKOUT_PCIE_N_1

AA42

CLKOUT_PCIE_P_1

AF1

PCIECLKRQ1#/GPIO18

AB43

CLKOUT_PCIE_N_2

AB45

CLKOUT_PCIE_P_2

AF3

PCIECLKRQ2#/GPIO20/SMI#

AD43

CLKOUT_PCIE_N_3

AD45

CLKOUT_PCIE_P_3

T3

PCIECLKRQ3#/GPIO25

AF43

CLKOUT_PCIE_N_4

AF45

CLKOUT_PCIE_P_4

V3

PCIECLKRQ4#/GPIO26

AE44

CLKOUT_PCIE_N5

AE42

CLKOUT_PCIE_P_5

AA2

PCIECLKRQ5#/GPIO44

AB40

CLKOUT_PCIE_N_6

AB39

CLKOUT_PCIE_P_6

AE4

PCIECLKRQ6#/GPIO45

AJ44

CLKOUT_PCIE_N_7

AJ42

CLKOUT_PCIE_P_7

Y3

PCIECLKRQ7#/GPIO46

AH43

CLKOUT_ITPXDP

AH45

CLKOUT_ITPXDP_P

D44

CLKOUT_33MHZ0

E44

CLKOUT_33MHZ1

B42

CLKOUT_33MHZ2

F41

CLKOUT_33MHZ3

A40

CLKOUT_33MHZ4

CLOCK SIGNAL

LPT_PCH_M_EDS/BGA

R335 10K_4 R334 10K_4 R337 10K_4 R336 10K_4 R388 10K_4 R394 10K_4 R776 10K_4 R775 10K_4 R857 10K_4

2

CLKOUT_PEG_A

CLKOUT_PEG_A_P

CLKOUT_PEG_B

CLKOUT_PEG_B_P

CLKOUT_DMI

CLKOUT_DMI_P

CLKOUT_DP

CLKOUT_DP_P CLKOUT_DPNS

CLKOUT_DPNS_P

CLKIN_DMI

CLKIN_DMI_P

CLKIN_GND

CLKIN_GND_P

CLKIN_DOT96N CLKIN_DOT96P

CLKIN_SATA

CLKIN_SATA_P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

ICLK_IREF

DIFFCLK_BIASREF

C667 15P/50V_4C

23

Y3 25MHZ_30

4 1

C668 15P/50V_4C

+3V_DS3

<CLG>

R327

EV@0X2

2

XTAL25_IN XTAL25_OUT

ICLK_IREF

1 3

R324

3 1

R325

3 1

1 3

R326

TP108 TP58 TP60

R873 *10K_4 R787 0_4

R765 *7.5K/F_4 R783 7.5K/F_4

4

4 2

2 4

TP19 TP18

AB35

CLK_PCIE_VGAN_R

AB36

CLK_PCIE_VGAP_R

AF6

CLK_PEGA_REQ#

Y39 Y38 U4

S3_STRAP

AF39

CLK_CPU_BCLKN_R

AF40

CLK_CPU_BCLKP_R

AJ40

CLK_DPLL_SSCLKN_R

AJ39

CLK_DPLL_SSCLKP_R

AF35

CLK_DPLL_NSCLKN_R

AF36

CLK_DPLL_NSCLKP_R

AY24

CLK_BUF_EXPN

AW24

CLK_BUF_EXPP

AR24

CLK_BUF_CPYCKN

AT24

CLK_BUF_CPYCKP

H33

CLK_BUF_DOT96N

G33

CLK_BUF_DOT96P

BE6

CLK_BUF_CKSSCDN

BC6

CLK_BUF_CKSSCDP

F45

CLK_BUF_REF14

D17

CLK_PCI_FB

AM43 AL44

C40

CLK_FLEX0

F38

CLK_FLEX1

F36

CLK_FLEX2

F39

CLK_FLEX3

AM45 AD39

AD38 AN44

ICLK_BIAS

<CLG>

R395 XDP@0_4

USB_SC_OC#

R516 XDP@0_4

USB_OC1#

B2A

GPIO41

R363 XDP@0_4 R378 XDP@0_4

GPIO42 USB_OC4#

R365 XDP@0_4 R383 XDP@0_4

USB30_SMI# GPIO10 SCI#

R396 XDP@0_4 R805 XDP@0_4

CLK_PCIE_REQ1#

B2A

CLK_PCIE_REQ2#

R808 XDP@0_4

B2A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

LPT 3/6 (PCIE/USB/CLK)

Tuesday, December 25, 2012

1

0X2

PIV@0X2

+3V +1.5V

+VCCAXCK_VRM

Routed by 50 ohm

CLK_PCIE_VGAN {16} CLK_PCIE_VGAP {16}

CLK_CPU_BCLKN {3} CLK_CPU_BCLKP {3}

CLK_DPLL_SSCLKN {3} CLK_DPLL_SSCLKP {3}

CLK_DPLL_NSCLKN {3} CLK_DPLL_NSCLKP {3}

B2A

BD6

10 49

XDP_FN0 {25} XDP_FN1 {25} XDP_FN2 {25} XDP_FN3 {25} XDP_FN4 {25} XDP_FN5 {25} XDP_FN6 {25} XDP_FN7 {25} XDP_FN14 {25} XDP_FN15 {25}

1A

5

Lynx Point (GPIO,CPU/MISC,NCTF)

LPT_PCH_M_EDS

U31F

AT8

BOARD_ID4

F13

BOARD_ID5

A14

BOARD_ID6

G15

BOARD_ID2

Box_Vendor

Y1

K13

AB11

AN2 C14 BB4 Y10 R11

AD11

AN6 AP1 AT3 AK1 AT7 AM3 AN4 AK3 U12 C16 D13 G13 H15

BE41

BE5 C45

A5

GPIO8

D D

C C

B B

A A

B2A

TP111

GPIO8{9}

ODD_PRSNT#{33}

DGPU_PWROK{16,22,37}

GPIO27{8,37}

PLL_ODVR_EN{9}

GPIO36{9}

FDI_OVRVLTG{9}

TEMP_ALERT#{37}

PCH_ODD_EN{33}

5

B2A

BOARD_ID15

R760 0_4

BOARD_ID10 GPIO24 GPIO27

BOARD_ID9 BOARD_ID7

GPIO36

FDI_OVRVLTG

BOARD_ID1 BOARD_ID8

TEMP_ALERT#

ID_Detect

PCH_ODD_EN

BOARD_ID13 BOARD_ID11 BOARD_ID12

TP_VSS_NCTF2

(CORE)

BMBUSY#/GPIO0

(CORE)

TACH1/GPIO1

(CORE)

TACH2/GPIO6

(CORE)

TACH3/GPIO7

(SUS)

GPIO8 LAN_PHY_PWR_CTRL/GPIO12

(SUS)

GPIO15

(CORE)

SATA4GP/GPIO16

(CORE)

TACH0/GPIO17

(CORE)

SCLOCK/GPIO22

(SUS)

GPIO24

(DSW)

GPIO27

(SUS)

GPIO28

(CORE)

GPIO34

(CORE)

GPIO35/NMI#

(CORE)

SATA2GP/GPIO36

(CORE)

SATA3GP/GPIO37

(CORE)

SLOAD/GPIO38 SDATAOUT0/GPIO39 SDATAOUT1/GPIO48 SATA5GP/GPIO49 GPIO57 TACH4/GPIO68 TACH5/GPIO69 TACH6/GPIO70 TACH7/GPIO71

VSS VSS VSS VSS

LPT_PCH_M_EDS/BGA

(SUS)

(CORE) (CORE)

(CORE)

(CORE) (CORE) (CORE) (CORE)

(SUS)

GPIO

4

<CLG>

CPU/Misc

AN10

TP14

AY1

PCH_PECI

PECI

AT6

RCIN#

AV3

PROCPWRGD

AV1

PCH_THRMTRIP#

THRMTRIP#

AU4

PLTRST_PROC#

N10

VSS

A2

VSS

A41

VSS

A43

VSS

A44

VSS

B1

VSS

B2

VSS

B44

VSS

B45

VSS

BA1

VSS

BC1

VSS

BD1

VSS

BD2

VSS

BD44

VSS

BD45

VSS

BE2

VSS

BE3

VSS

D1

VSS

6 OF 11

E1

VSS

E45

VSS

A4

VSS

4

NCTF

TP99

R782 390_4

GATEA20 {37}

RCIN# {37}

H_PWRGOOD {3}

B2A

PM_THRMTRIP# {3}

CPU_PLTRST# {3}

XDP Signal

XDP_FN_CLK1{25} XDP_FN_CLK2{25}

XDP_FN10{25} XDP_FN11{25} XDP_FN12{25} XDP_FN13{25}

PCH MISC PU/PD

PCH GPIO PU/PD

GPIO16 TEMP_ALERT#

ODD_PRSNT# PCH_ODD_EN

+3V

R380 Metal_IMR@10K_4

ID_Detect Box_Vendor

R379 TEXTURE@10K_4

ID_Detect Speaker

H

Metal/IMR

L TEXTURE

3

BOARD ID SETTING

Board ID

HM87

HM86

UMA SKU

VGA SKU

VRAM-1000MHz

VRAM-900MHz

Standard

ULV

17"

14"

GV2

GL

W/ 4K2K

W/O 4K2K

W/ HDMI

W/O HDMI

W/ CRT

W/O CRT

Only VGA

Optimus

WIN7

WIN8

Reserve

EDP

LVDS

Celeron

I3/I5/I7

47W

37W

+3V_DS3

B2A

R360 10K_4 R421

R838 XDP@0_4 R344 XDP@0_4 R341 XDP@0_4 R803 XDP@0_4 R506 XDP@0_4 R350 XDP@0_4

GPIO24

R368 *10K_4

GPIO8

BOARD_ID7 GPIO36

FDI_OVRVLTG GPIO16

TEMP_ALERT#

B2A

+3V

B2A

GPIO12GPIO57

Box Vendor

ONKYO

3

R779 8.2K_4 R778 10K_4

R780 *1K_4

GPIO36 FDI_OVRVLTG

B2A

Box_Vendor {34}

+1.05V

R792 *10K_4 R802 *10K_4

+3V

R868 10K_4

GPIO52

W/O KB Backlight

Touch Pad

3.3V(IDTP)other

5V(NMTP)

GPIO52 {8,38}

GPIO52

H

LW KB Backlight

GPIO52

KB Backlight

X

Metal(Y) IMR(X)

B2A

GATEA20 RCIN#

PCH_THRMTRIP#

R505 *10K_4 R801 10K_4

R800 10K_4 R875 10K_4

+3V_DS3

R451 10K_4

R426 *10K_4

Box

Boxless

+3V

R407 87@10K_4

BOARD_ID0

R408 86@10K_4

+3V +3V +3V

R777 10K_4

+3V

R342 U3_2@10K_4

BOARD_ID9

R343 U2_2@10K_4

B2A

R910 EDP@10K_4

R911 LDS@10K_4

R448 OEV@10K_4

BOARD_ID12 BOARD_ID13 BOARD_ID14

R450 PX@10K_4

2

ID0 ID3

ID1 ID2

H

L

H

L

BOARD_ID0 {8}

B2A

R428 GV2@10K_4

R431 GL@10K_4

+3V

R766 S&C@10K_4

BOARD_ID10 BOARD_ID11

R761 NS&C@10K_4

C3A

R912 70@10K_4

R913 76@10K_4

R881 W7@10K_4

R869 W8@10K_4

2

<CLG>

ID4

ID5

H

L

H

L

H

L

H

L

H

L

+3V

R879 *10K_4

R880 10K_4

+3V

R427 10K_4

BOARD_ID16 {9} BOARD_ID17 {9}

+3V

R430 1000M@10K_4

BOARD_ID2

R449 900M@10K_4

R794 HM@10K_4

R795 NHM@10K_4

R764 IV@10K_4

BOARD_ID1 BOARD_ID3

R763 EV@10K_4

B2A B2A

+3V+3V_DS3+3V

R909 47W@10K_4

BOARD_ID17BOARD_ID15 BOARD_ID16

R908 37W@10K_4

+3V+3V +3V

R468 10K_4

R479 *10K_4

ID7

ID8

H

L

H

L

USB3.0*2 H

USB3.0*1&USB2.0*1

Non S&C

Reserve

ID12

H

L

+3V

10K_4

R420 *10K_4

+3V

R907 CRT@10K_4

BOARD_ID8BOARD_ID7BOARD_ID5BOARD_ID4 BOARD_ID6

R349 NCRT@10K_4

S&C

BOARD_ID14 {8}

1

ID13 ID14ID6

ID15 ID16 ID17

H

L

H

L

H

L

H

L

H

L

BOARD_ID3 {8}

ID9 ID11ID10Description

L

H

L

H

L

B2A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

LPT 4/6 (GPIO/MISC)

Wednesday, January 09, 2013

1

BD6

11 49

11

1A

5

Lynx Point (Power)

1.312A (80mils)

B2A

R373 5.11/F_4

+V1.05S_PCH_VCC

C340 10U/6.3V_8X

C358 1U/6.3V_4X

+PCH_VCCDSW

670mA (60mils)

+V1.05M_VCCASW

C412 10U/6.3V_8X

C356 1U/6.3V_4X

C359 1U/6.3V_4X

C366 1U/6.3V_4X

C374 1U/6.3V_4X

R338 0_1206

+1.05V

D D

C386 1U/6.3V_4X

R461 0_1206

+1.05V

C C

U31G

AA24

VCC

AA26

VCC

AD20

VCC

AD22

VCC

AD24

VCC

AD26

VCC

AD28

VCC

AE18

VCC

AE20

VCC

AE22

VCC

AE24

VCC

AE26

VCC

AG18

VCC

AG20

VCC

AG22

VCC

AG24

VCC

Y26

VCC

U14

DCPSUSBYP

AA18

VCCASW

U18

VCCASW

U20

VCCASW

U22

VCCASW

U24

VCCASW

V18

VCCASW

V20

VCCASW

V22

VCCASW

V24

VCCASW

Y18

VCCASW

Y20

VCCASW

Y22

VCCASW

LPT_PCH_M_EDS/BGA

LPT_PCH_M_EDS

CRT DAC

FDI

HVCMOS

Core

USB3

PCIe/DMI

SATA

VCCMPHY

7 OF 11

<CLG>

VCCADAC1_5

VCCADACBG3_3

VCCVRM

VCC3_3_R30 VCC3_3_R32

DCPSUS1

VCCSUS3_3 VCCSUS3_3

DCPSUS3 DCPSUS3

VCCVRM VCCVRM

VCCVRM

VCCIO VCCIO

VCCIO

VCCIO VCCIO

VCCIO VCCIO VCCIO VCCIO VCCIO

4

70mA (20mils)

+VCCA_DAC_1_2

C381

R377

PICRT@0.01U/25V_4X

OEV@0_4

P45 P43

VSS

M31

13.3mA (10mils)

BB44

+V1.05S_VCCAPLL_FDI

AN34

+V1.05S_VCC_EXP +3V

AN35

3.629A (160mils)

R30 R32

Y12

109mA (20mils)

AJ30

+3V_DS3

AJ32 AJ26

AJ28 AK20

+V1.05S_VCC_EXP

AK26

+VCCAPLL_USB3

AK28 BE22

+V1.05S_VCCAPLL_EXP

AK18

+V1.05S_VCC_EXP

AN11

+V1.05S_VCCAPLL_SATA3

AK22

+V1.05S_VCC_EXP

AM18 AM20 AM22 AP22 AR22 AT22

261mA (20mils)

+VCCA_USBSUS

+V3.3S_ADACBG

183mA (20mils)

+V3.3S_VCC_GIO

+V1.05M_VCCSUS

C384

PICRT@0.1U/10V_4X

C348 *1U/6.3V_4X

183mA (20mils)

L21 PICRT@HCB1608KF-181T15_1.5A

C385

PICRT@10U/6.3V_8X

R424 OEV@0_4 R444 PICRT@0_6 R443 *PICRT@0_6

R446 0_6

C379

0.1U/10V_4X

C373 *1U/6.3V_4X

C659 *10U/6.3V_8X

+3V_DS3

+3V +3V_BG

3

R452 0_8

B2A

+1.5V

R817 0_6

+1.05V

R439 0_6

+3V

R409 0_8

+1.05V

R445 0_6

+3V

R441 0_6

+3V

R440 0_6

+3V

R447 0_6

+3V

R809 0_6

+1.05V

261mA (20mils)

+V3.3A_VCCPUSB

C367

0.1U/10V_4X

+V1.05S_VCCAUSB

C380

0.1U/10V_4X

+V3.3S_VCCAUBG

C388

0.1U/10V_4X

+V1.05S_VCCUSBCORE

C371

0.1U/10V_4X

+V1.05M_VCCDUSBSUS

C368 *1U/6.3V_4X

+V3.3S_VCC_FLEX0

C378 1U/6.3V_4X

+V3.3S_VCC_FLEX1

C383 1U/6.3V_4X

+V3.3S_VCC_FLEX23

C382 1U/6.3V_4X

+V3.3S_VCC_ASEPCI

C372 1U/6.3V_4X

+VCCCLKF135

C360 1U/6.3V_4X

133mA (20mils)

B2A

55mA (28mils)

183mA (20mils)

+VCCAXCK_VRM

+V1.05S_VCC_AXCK_DCB

1.312A (80mils) 261mA (20mils)

+V1.05S_VCC_SSCFF

55mA (20mils)

306mA (20mils)

+V1.05S_VCC_SSCFF

+V1.05S_VCCCLKF100 +V1.05S_VCCSSCF100

Lynx Point (Power)

U31H

R24

VCCSUS3_3

R26

VCCSUS3_3

R28

VCCSUS3_3

U26

VCCSUS3_3

M24

VSS

U35

VCCUSBPLL

L24

VCC3_3

U30

VCCIO

V28

VCCIO

V30

VCCIO

Y30

VCCIO

Y35

DCPSUS2

AF34

VCCVRM

AP45

VCC

Y32

VCCCLK

M29

VCCCLK3_3

L29

VCCCLK3_3

L26

VCCCLK3_3

M26

VCCCLK3_3

U32

VCCCLK3_3

V32

VCCCLK3_3

AD34

VCCCLK

AA30

VCCCLK

AA32

VCCCLK

AD35

VCCCLK

AG30

VCCCLK

AG32

VCCCLK

AD36

VCCCLK

AE30

VCCCLK

AE32

VCCCLK

LPT_PCH_M_EDS/BGA

LPT_PCH_M_EDS

2

R435 0_6

<CLG>

261mA (20mils)

R20

VCCSUS3_3

GPIO/LPC

USB

RTC

ICC

Fuse

Thermal

VCCSUS3_3

VCCDSW3_3

DCPSST

VCC3_3 VCC3_3 VCC3_3

8 OF 11

VCCIO

VCCSUSHDA

VCCSUS3_3

VCCRTC DCPRTC

DCPRTC

V_PROC_IO V_PROC_IO

VCCSPI

VCCASW VCCASW

VCCVRM

VCC3_3 VCC3_3

Azalia

CPU

SPI

+3V_DS3

R22

A16

+VCCPDSW_PCH

AA14

+VCCSST

AE14

+V3.3S_VCCPCORE

AF12 AG14

U36

+V1.05S_VCCAUX

10mA (20mils)

A26

+VCC_HDA_IO

K8

+VCCPRTCSUS_3P3

A6 P14

+VCCRTCEXT

P16

4mA (20mils)

AJ12

+V1.05S_VCCPCPU

AJ14

22mA (20mils)

AD12

+V3.3M_VCCPSPI

P18

+V3.3S_VCCPFUSE

VCC

P20

VCC

L17 R18

AW40 AK30 AK32

133mA (20mils)

3.629A (160mils)

B2A

C377

0.1U/10V_4X

1.312A (80mils)

670mA (60mils)

183mA (20mils)

133mA (20mils)

+VCCPDSW

C394

0.1U/10V_4X

C365

0.1U/10V_4X

R359 0_8

C355

0.01U/25V_4X

R823 0_6 R434 0_6

C393 1U/6.3V_4X

C681

0.1U/10V_4X

C349

0.1U/10V_4X

1

+PCH_VCC_1_1_20 +PCH_VCC_1_1_21 +V1.5S_VCCATS +V3.3S_VCCPTS

+3V

+1.05V +3V_DS3

C679

0.1U/10V_4X

C354

0.1U/10V_4X

B2A

C680 1U/6.3V_4X

C346 1U/6.3V_4X

R356 0_6

C363 1U/6.3V_4X

R438 0_6 R437 *0_6

C376 1U/6.3V_4X

R464 0_6 R463 0_6 R331 0_6 R321 0_6

C344

0.1U/10V_4X

R351 0_6

+3V_DS3

+3V +1.05V

12

+3V_RTC

+VCCIO_PCH

B2A

+1.05V +1.05V +1.5V +3V

B B

PCH VRM Power

0.179A (20mils)

+1.05V +V1.05S_VCCAPLL_FDI

L17 *1uh_6_25MA

+1.5V

R332 0_8

+1.05V

L19 *10uh_8_100MA

+1.5V

R376 0_8

L37 *1uh_6_25MA

+1.5V

R758 0_8

A A

L16 *10uh_8_100MA

+1.5V

R329 0_8

+VCCAPLL_USB3

+V1.05S_VCCAPLL_EXP+1.05V

+V1.05S_VCCAPLL_SATA3+1.05V

C338 *10U/6.3V_8X

C369 *10U/6.3V_8X

C658 *10U/6.3V_8X

C336 *10U/6.3V_8X

5

PCH VCCIO Power

R328 0_1206

B2A

PCH band gap Power

+VCCAXCK_VRM_R +VCCAXCK_VRM+1.05V

R355 *1/F_4

+1.5V

R372 0_8

+V1.05S_VCC_EXP+1.05V

C329 10U/6.3V_8X

3

2

MAIND{27,41,45}

L20 *10uh_8_100MA

B2A

C345 1U/6.3V_4X

+3V_BG+3V_DS3

1

Q35 *PICRT@2N7002K_300MA

C370 10U/6.3V_8X

3.629A (160mils)

C351 1U/6.3V_4X

4

C347 1U/6.3V_4X

B2A

R339 0_8

C350 1U/6.3V_4X

+VCC_AXCK_DCB +V1.05S_VCC_AXCK_DCB+1.05V

C341 1U/6.3V_4X

L18 0_6

C343 *10U/6.3V_8X

C342 1U/6.3V_4X

PCH DS3 VCCSUS

C411

*DS3@0.33U/6.3V_4X

R475 DS3@100K_4

+3V_S5

R462 NDS3@0_8

1

B2A

R469 DS3@0_4

Q36

B2A

R442 0_6

3

2

0.01A (10mils)

C390

0.1U/10V_4X

DS3@DTC144EUA

1 3

R411 0_8

SLP_SUS#{8,37}

PCH HDA Power

+3V_DS3 +VCC_HDA_IO +1.05V +V1.05S_VCCCLKF100

Q34

2

DS3@ME2303T1

3

+3V_DS3

C364 1U/6.3V_4X

C375

0.1U/10V_4X

PCH DSW3

+3VPCU

D11 DS3@RB500V-40_100MA

+3V_S5

R436 NDS3@0_8

+V1.05S_VCC_SSCFF+1.05V +1.05V +V1.05S_VCCSSCF100

R410 0_8

C362 1U/6.3V_4X

2

+VCCPDSW

R353 0_8

B2A

C361 1U/6.3V_4X

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

LPT 5/6 (POWER)

Thursday, December 20, 2012

1

BD6

12 49

1A

5

4

3

2

1

13

D D

Lynx Point (GND) Lynx Point (GND)

LPT_PCH_M_EDS

U31J

AL34

VSS

AL38

VSS

AL8

VSS

AM14

VSS

AM24

VSS

AM26

VSS

AM28

VSS

AM30

VSS

C C

B B

AM32 AM16

AN36 AN40 AN42

AN8 AP13 AP24 AP31 AP43

AR2 AK16 AT10 AT15 AT17 AT20 AT26 AT29 AT36 AT38

D42 AV13 AV22 AV24 AV31 AV33 BB25 AV40

AV6

AW2

F43 AY10 AY15 AY20 AY26 AY29

AY7

B11

B15

LPT_PCH_M_EDS/BGA

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

10 OF 11

LPT_PCH_M_EDS

K39

VSS

L2

VSS

L44

VSS

M17

VSS

M22

VSS

N12

VSS

N35

VSS

N39

VSS

N6

VSS

P22

VSS

P24

VSS

P26

VSS

P28

VSS

P30

VSS

P32

VSS

R12

VSS

R14

VSS

R16

VSS

R2

VSS

R34

VSS

R38

VSS

R44

VSS

R8

VSS

T43

VSS

U10

VSS

U16

VSS

U28

VSS

U34

VSS

U38

VSS

U42

VSS

U6

VSS

V14

VSS

V16

VSS

V26

VSS

V43

VSS

W2

VSS

W44

VSS

Y14

VSS

Y16

VSS

Y24

VSS

Y28

VSS

Y34

VSS

Y36

VSS

Y40

VSS

Y8

VSS

U31K

AA16

VSS

AA20

VSS

AA22

VSS

AA28

VSS

AA4

VSS

AB12

VSS

AB34

VSS

AB38

VSS

AB8

VSS

AC2

VSS

AC44

VSS

AD14

VSS

AD16

VSS

AD18

VSS

AD30

VSS

AD32

VSS

AD40

VSS

AD6

VSS

AD8

VSS

AE16

VSS

AE28

VSS

AF38

VSS

AF8

VSS

AG16

VSS

AG2

VSS

AG26

VSS

AG28

VSS

AG44

VSS

AJ16

VSS

AJ18

VSS

AJ20

VSS

AJ22

VSS

AJ24

VSS

AJ34

VSS

AJ38

VSS

AJ6

VSS

AJ8

VSS

AK14

VSS

AK24

VSS

AK43

VSS

AK45

VSS

AL12

VSS

AL2

VSS

BC22

VSS

BB42

VSS

LPT_PCH_M_EDS/BGA

11 OF 11

B19

VSS

B23

VSS

B27

VSS

B31

VSS

B35

VSS

B39

VSS

B7

VSS

BA40

VSS

BD11

VSS

BD15

VSS

BD19

VSS

AY36

VSS

AT43

VSS

BD31

VSS

BD35

VSS

BD39

VSS

BD7

VSS

D25

VSS

AV7

VSS

F15

VSS

F20

VSS

F29

VSS

F33

VSS

BC16

VSS

D4

VSS

G2

VSS

G38

VSS

G44

VSS

G8

VSS

H10

VSS

H13

VSS

H17

VSS

H22

VSS

H24

VSS

H26

VSS

H31

VSS

H36

VSS

H40

VSS

H7

VSS

K10

VSS

K15

VSS

K20

VSS

K29

VSS

K33

VSS

BC28

VSS

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

LPT 6/6 (GND)

Thursday, December 20, 2012

1

BD6

13 49

1A

5

4

3

2

1

<DDR>

H=8 (Rev)

D D

R176 10K_4 R177 10K_4

C C

M_A_A[15:0]{4}

M_A_BS#0{4} M_A_BS#1{4} M_A_BS#2{4} M_A_CS#0{4} M_A_CS#1{4} M_A_CLKP0{4} M_A_CLKN0{4} M_A_CLKP1{4} M_A_CLKN1{4} M_A_CKE0{4} M_A_CKE1{4} M_A_CAS#{4} M_A_RAS#{4} M_A_WE#{4}

SMB_RUN_CLK{9,15,30,38} SMB_RUN_DAT{9,15,30,38}

M_A_ODT0{4} M_A_ODT1{4}

M_A_DQSP[7:0]{4}

M_A_DQSN[7:0]{4}

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIMM0_SA0 DIMM0_SA1

SMB_RUN_CLK SMB_RUN_DAT

M_A_DM1

M_A_DM2

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

JDIM1A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDRSK-20401-TP8D

5

M_A_DQ4

DQ0

7

M_A_DQ5

DQ1

15

M_A_DQ7

DQ2

17

M_A_DQ6

DQ3

4

M_A_DQ1

DQ4

6

M_A_DQ0

DQ5

16

M_A_DQ3

DQ6

18

M_A_DQ2

DQ7

21

M_A_DQ9

DQ8

23

M_A_DQ8

DQ9

33

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

PC2100 DDR3 SDRAM SO-DIMM

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

M_A_DQ15

35

M_A_DQ10

22

M_A_DQ12

24

M_A_DQ13

34

M_A_DQ14

36

M_A_DQ11

39

M_A_DQ21

41

M_A_DQ16

51

M_A_DQ19

53

M_A_DQ18

40

M_A_DQ20

42

M_A_DQ17

50

M_A_DQ23

52

M_A_DQ22

57

M_A_DQ25

59

M_A_DQ24

67

M_A_DQ30

69

M_A_DQ26

56

M_A_DQ28

58

M_A_DQ29

68

M_A_DQ31

70

M_A_DQ27

129

M_A_DQ36

131

M_A_DQ37

141

M_A_DQ34

143

M_A_DQ38

130

M_A_DQ32

132

M_A_DQ33

140

M_A_DQ35

142

M_A_DQ39

147

M_A_DQ41

149

M_A_DQ45

157

M_A_DQ47

159

M_A_DQ46

146

M_A_DQ40

148

M_A_DQ44

158

M_A_DQ42

160

M_A_DQ43

163

M_A_DQ49

165

M_A_DQ48

175

M_A_DQ54

177

M_A_DQ55

164

M_A_DQ53

166

M_A_DQ52

174

M_A_DQ50

176

M_A_DQ51

181

M_A_DQ61

183

M_A_DQ60

191

M_A_DQ62

193

M_A_DQ63

180

M_A_DQ56

182

M_A_DQ57

192

M_A_DQ59

194

M_A_DQ58

M_A_DQ[63:0] {4}

+3V

R178 *10K_4

DDR3_DRAMRST#{15,27}

+SMDDR_VREF_DQ0

+SMDDR_VREF_DIMM

2.48A

+3V

PM_EXTTS#0

+SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM

+1.35VSUS

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDRSK-20401-TP8D

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

PC2100 DDR3 SDRAM SO-DIMM

203

VTT1 VTT2

GND GND

+SMDDR_VTERM

204 205

206

14

B B

Place these Caps near So-Dimm0.

A A

5

+1.35VSUS

C96 0.1U/10V_4X C77 0.1U/10V_4X C88 0.1U/10V_4X C78 0.1U/10V_4X C85 *4.7U/6.3V_6X C106 4.7U/6.3V_6X C95 *4.7U/6.3V_6X C72 *4.7U/6.3V_6X C98 4.7U/6.3V_6X C71 4.7U/6.3V_6X C84 *4.7U/6.3V_6X C115 *4.7U/10V_8Y C116 *4.7U/10V_8Y

+

C61

*220U/2.5V_3528P_E35b C193 0.1U/10V_4X

+SMDDR_VTERM

+SMDDR_VREF_DIMM

+SMDDR_VREF_DQ0

+3V

C201 1U/6.3V_4X C205 1U/6.3V_4X C196 1U/6.3V_4X C206 1U/6.3V_4X C208 *10U/6.3V_6X C204 *10U/6.3V_6X

C124 0.1U/10V_4X C127 *2.2U/6.3V_6X

C35 0.1U/10V_4X C36 *2.2U/6.3V_6X

C192 2.2U/6.3V_4X

4

C3A

VREF DQ0 M1 Solution

+1.35VSUS +VREFDQ_SA_M3

R42

+SMDDR_VREF_DQ0

+SMDDR_VREF_DIMM

1K/F_4

+SMDDR_VREF_DQ0_M1

R41 1K/F_4

R40 0_6

C734 0.022U/16V_4X

C735 0.022U/16V_4X

3

VREF CA M1 Solution

+1.35VSUS

R117 1K/F_4

R118 1K/F_4

2

+VREF_CA_CPU

R125 0_6

C126 470P/50V_4X

+SMDDR_VREF_DIMM

+SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM

R47 0_6

+SMDDR_VREF_DQ0

R30 *0_6

B2A B2A

R933 24.9/F_4

R934 24.9/F_4

B2A

R124 *0_6

+SMDDR_VREF+SMDDR_VREF

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

System Memory 1/2 (5.2H)

Thursday, December 20, 2012

1

BD6

14 49

1A

5

<DDR>

H=4 (Rev)

M_B_A[15:0]{4}

D D

M_B_BS#0{4} M_B_BS#1{4} M_B_BS#2{4} M_B_CS#0{4} M_B_CS#1{4} M_B_CLKP0{4} M_B_CLKN0{4} M_B_CLKP1{4} M_B_CLKN1{4} M_B_CKE0{4} M_B_CKE1{4} M_B_CAS#{4} M_B_RAS#{4}

R173 10K_4 R172 10K_4

+3V

C C

B B

M_B_WE#{4}

SMB_RUN_CLK{9,14,30,38} SMB_RUN_DAT{9,14,30,38}

M_B_ODT0{4} M_B_ODT1{4}

M_B_DQSP[7:0]{4}

M_B_DQSN[7:0]{4}

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

DIMM1_SA0 DIMM1_SA1

M_B_DM1

M_B_DM2

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

JDIM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDRSK-20401-TP4B

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

PC2100 DDR3 SDRAM SO-DIMM

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

4

5

M_B_DQ5

7

M_B_DQ4

15

M_B_DQ3

17

M_B_DQ2

4

M_B_DQ0

6

M_B_DQ1

16

M_B_DQ6

18

M_B_DQ7

21

M_B_DQ12

23

M_B_DQ13

33

M_B_DQ14

35

M_B_DQ10

22

M_B_DQ8

24

M_B_DQ9

34

M_B_DQ11

36

M_B_DQ15

39

M_B_DQ20

41

M_B_DQ21

51

M_B_DQ18

53

M_B_DQ22

40

M_B_DQ17

42

M_B_DQ16

50

M_B_DQ19

52

M_B_DQ23

57

M_B_DQ25

59

M_B_DQ29

67

M_B_DQ27

69

M_B_DQ26

56

M_B_DQ28

58

M_B_DQ24

68

M_B_DQ31

70

M_B_DQ30

129

M_B_DQ36

131

M_B_DQ37

141

M_B_DQ35

143

M_B_DQ34

130

M_B_DQ33

132

M_B_DQ32

140

M_B_DQ39

142

M_B_DQ38

147

M_B_DQ44

149

M_B_DQ40

157

M_B_DQ42

159

M_B_DQ43

146

M_B_DQ45

148

M_B_DQ41

158

M_B_DQ46

160

M_B_DQ47

163

M_B_DQ49

165

M_B_DQ48

175

M_B_DQ54

177

M_B_DQ55

164

M_B_DQ52

166

M_B_DQ53

174

M_B_DQ50

176

M_B_DQ51

181

M_B_DQ61

183

M_B_DQ56

191

M_B_DQ62

193

M_B_DQ63

180

M_B_DQ57

182

M_B_DQ60

192

M_B_DQ59

194

M_B_DQ58

VREF DQ1 M1 Solution

R18 1K/F_4

R21 1K/F_4

M_B_DQ[63:0] {4}

R29 0_6

+VREFDQ_SB_M3+1.35VSUS

+SMDDR_VREF

R45 0_6

+SMDDR_VREF_DQ1+SMDDR_VREF_DQ1_M1

R31 *0_6

R175 *10K_4

+3V

DDR3_DRAMRST#{14,27}

+SMDDR_VREF_DQ1

+SMDDR_VREF_DIMM

+SMDDR_VREF_DQ1

+1.35VSUS

2.48A

+3V

PM_EXTTS#1

+SMDDR_VREF_DQ1 +SMDDR_VREF_DIMM

3

2

1

15

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDRSK-20401-TP4B

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

PC2100 DDR3 SDRAM SO-DIMM

203

VTT1 VTT2

GND GND

+SMDDR_VTERM

204

205

206

+1.35VSUS +SMDDR_VTERM

+SMDDR_VREF_DIMM

C97 0.1U/10V_4X C83 0.1U/10V_4X C73 0.1U/10V_4X C75 0.1U/10V_4X C76 4.7U/6.3V_6X C94 *4.7U/6.3V_6X C69 4.7U/6.3V_6X C86 *4.7U/6.3V_6X C103 *4.7U/6.3V_6X C99 4.7U/6.3V_6X C87 *4.7U/6.3V_6X C114 *4.7U/10V_8Y C117 *4.7U/10V_8Y

+

C63

*220U/2.5V_3528P_E35b

+SMDDR_VREF_DQ1

C736 0.022U/16V_4X

C737 *0.022U/16V_4X

C200 1U/6.3V_4X C199 1U/6.3V_4X C197 1U/6.3V_4X C198 1U/6.3V_4X C202 *10U/6.3V_6X C203 *10U/6.3V_6X

+3V

C189 *0.1U/10V_4X C188 2.2U/6.3V_4X

+SMDDR_VREF_DIMM

C128 0.1U/10V_4X C129 *2.2U/6.3V_6X

+SMDDR_VREF_DQ1

C39 0.1U/10V_4X C34 *2.2U/6.3V_6X

R935 24.9/F_4

R936 *24.9/F_4

B2A

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

System Memory 2/2 (9.2H)

Thursday, December 20, 2012

1

BD6

15 49

1A

1

+1.05V_GPU

A A

PEX_IOVDD + PEX_IOVDDQ = 3.3A

+1.05V_GPU

PEX_PLL_HVDD + PEX_SVDD_3V3 = 210mA

+3V_GPU

B B

VGA_VCCSENSE{46}

VGA_VSSSENSE{46}

C C

R615 *EV@200/F_4

PEX_PLLVDD = 150mA

+1.05V_GPU

D D

L29 EV@HCB1608KF-181T15_1.5A

C580 EV@4.7U/6.3V_6X C249 EV@1U/6.3V_4X C591 EV@0.1U/10V_4X

R616 EV@10K_4

R613 EV@2.49K/F_4

2

C561 EV@10U/6.3V_6X C560 EV@10U/6.3V_6X C164 EV@10U/6.3V_6X C559 EV@10U/6.3V_6X C163 EV@4.7U/6.3V_6X C251 EV@1U/6.3V_4X C241 EV@1U/6.3V_4X

C161 EV@10U/6.3V_6X C156 EV@10U/6.3V_6X C162 EV@10U/6.3V_6X C157 EV@10U/6.3V_6X C231 EV@4.7U/6.3V_6X C250 EV@1U/6.3V_4X C242 EV@1U/6.3V_4X

C254 EV@0.1U/10V_4X C322 EV@4.7U/6.3V_6X C248 EV@4.7U/6.3V_6X

PEX_TSTCLK

PEX_TSTCLK#

PEX_PLLVDD

TESTMODE

PEX_TERMP

AA22 AB23 AC24 AD25 AE26 AE27

AA10 AA12 AA13 AA16 AA18 AA19 AA20 AA21 AB22 AC23 AD24 AE25 AF26 AF27

AF22 AE22

AA14 AA15

AF25

AA8 AA9

AB8

AD9

F2

F1

U29A

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

PEX_PLL_HVDD PEX_PLL_HVDD

PEX_SVDD_3V3

VDD_SENSE

GND_SENSE

PEX_TSTCLK_OUT PEX_TSTCLK_OUT

PEX_PLLVDD PEX_PLLVDD

TESTMODE

PEX_TERMP

3

NC

PCI_EXPRESS

N14P_GV2

NC NC

GK208

GF119N14M_GLGK208N14P_GV2

PEX_WAKE

PEX_RST

PEX_CLKREQ

PEX_REFCLK PEX_REFCLK

PEX_TX0 PEX_TX0

PEX_RX0 PEX_RX0

PEX_TX1 PEX_TX1

PEX_RX1 PEX_RX1

PEX_TX2 PEX_TX2

PEX_RX2 PEX_RX2

PEX_TX3 PEX_TX3

PEX_RX3 PEX_RX3

PEX_TX4 PEX_TX4

PEX_RX4 PEX_RX4

PEX_TX5 PEX_TX5

PEX_RX5 PEX_RX5

PEX_TX6 PEX_TX6

PEX_RX6 PEX_RX6

PEX_TX7 PEX_TX7

PEX_RX7 PEX_RX7

PEX_TX8 PEX_TX8

PEX_RX8 PEX_RX8

PEX_TX9 PEX_TX9

PEX_RX9 PEX_RX9

PEX_TX10 PEX_TX10

PEX_RX10 PEX_RX10

PEX_TX11 PEX_TX11

PEX_RX11 PEX_RX11

PEX_TX12 PEX_TX12

PEX_RX12 PEX_RX12

PEX_TX13 PEX_TX13

PEX_RX13 PEX_RX13

PEX_TX14 PEX_TX14

PEX_RX14 PEX_RX14

PEX_TX15 PEX_TX15

PEX_RX15 PEX_RX15

GF119

N14M_GL

COMMONbga595-nvidia-n13p-g v2-s-a2

4

AB6

AC7 AC6 AE8

AD8 AC9

AB9 AG6

AG7 AB10

AC10 AF7

AE7 AD11

AC11 AE9

AF9 AC12

AB12 AG9

AG10 AB13

AC13 AF10

AE10 AD14

AC14 AE12

AF12 AC15

AB15 AG12

AG13 AB16

AC16 AF13

AE13 AD17

AC17 AE15

AF15 AC18

AB18 AG15

AG16 AB19

AC19 AF16

AE16 AD20

AC20 AE18

AF18 AC21

AB21 AG18

AG19 AD23

AE23 AF19

AE19 AF24

AE24 AE21

AF21 AG24

AG25 AG21

AG22

VGA_RST# PEX_CLKREQ#

C_PEG_RX0 C_PEG_RX#0

C_PEG_RX1 C_PEG_RX#1

C_PEG_RX2 C_PEG_RX#2

C_PEG_RX3 C_PEG_RX#3

C_PEG_RX4 C_PEG_RX#4

C_PEG_RX5 C_PEG_RX#5

C_PEG_RX6 C_PEG_RX#6

C_PEG_RX7 C_PEG_RX#7

5

C600 *EV@0.1U/10V_4X

R627 EV@100_4 R207 EV@10K_4

C181 EV@0.22U/10V_4X C180 EV@0.22U/10V_4X

C166 EV@0.22U/10V_4X C167 EV@0.22U/10V_4X

C169 EV@0.22U/10V_4X C168 EV@0.22U/10V_4X

C183 EV@0.22U/10V_4X C182 EV@0.22U/10V_4X

C185 EV@0.22U/10V_4X C184 EV@0.22U/10V_4X

C170 EV@0.22U/10V_4X C171 EV@0.22U/10V_4X

C186 EV@0.22U/10V_4X C187 EV@0.22U/10V_4X

C173 EV@0.22U/10V_4X C172 EV@0.22U/10V_4X

PCIE (RESET)

PCIE (CLK_REQ)

DGPU_PWROK{11,22,37}

PEGX_RST#

+3V_GPU

DGPU_HOLD_RST#{8}

6

CLK_PCIE_VGAP {10} CLK_PCIE_VGAN {10}

PEG_RXP0 {3} PEG_RXN0 {3}

PEG_TXP0 {3} PEG_TXN0 {3}

PEG_RXP1 {3} PEG_RXN1 {3}

PEG_TXP1 {3} PEG_TXN1 {3}

PEG_RXP2 {3} PEG_RXN2 {3}

PEG_TXP2 {3} PEG_TXN2 {3}

PEG_RXP3 {3} PEG_RXN3 {3}

PEG_TXP3 {3} PEG_TXN3 {3}

PEG_RXP4 {3} PEG_RXN4 {3}

PEG_TXP4 {3} PEG_TXN4 {3}

PEG_RXP5 {3} PEG_RXN5 {3}

PEG_TXP5 {3} PEG_TXN5 {3}

PEG_RXP6 {3} PEG_RXN6 {3}

PEG_TXP6 {3} PEG_TXN6 {3}

PEG_RXP7 {3} PEG_RXN7 {3}

PEG_TXP7 {3} PEG_TXN7 {3}

VGA_PLTRST#{8}

R196 *EV@0_4

PEX_CLKREQ#

Q23 *EV@LTC044EUBFS8TL_30MA

2

+3V

2 1

R229 OEV@0_4

+3V_GPU

R201 *EV@4.7K_4

1 3

U10 PX@TC7SH08FU(F)

3 5

CLKREQ_C1

+3V_GPU

1

Q61

7

4

2

EV@2N7002K_300MA

C257 PX@0.1U/10V_4X

R230 PX@100K_4

2

3

CLK_PEGA_REQ#PEX_CLKREQ#

PEGX_RST#

B2A

Q24 *EV@LTC044EUBFS8TL_30MA

1 3

8

16

PEGX_RST# {20}

CLK_PEGA_REQ# {10}

B2A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Thursday, December 20, 2012

Date: Sheet of

Thursday, December 20, 2012

Date: Sheet of

1

2

3

4

5

6

Thursday, December 20, 2012

PROJECT :

N14x (PCIE I/F)

7

Chief River

16 49

8

A1A

1

F3

R659 EV@10K_4

FB_CLAMP{20,37,47}

A A

B B

+1.5V_GPU

FB_PLLAVDD = 62mA *2

C C

+1.05V_GPU

R660 GC6@0_4

TP89

FBA_CMD31

R263 *EV@60.4/F_4 R241 *EV@60.4/F_4

L12 EV@HCB1608KF-181T15_1.5A

C297 EV@10U/6.3V_6X C307 EV@0.1U/10V_4X C288 EV@0.1U/10V_4X C289 EV@0.1U/10V_4X

FB_CLAMP_R

FBA_DEBUG FBA_DEBUG1

+FB_PLLAVDD

C27 C26 E24 F24 D27 D26 F25 F26

F23 G22 G23 G24

F27 G25 G27 G26 M24 M23

K24

K23 M27 M26 M25

K26

K22

J23

J25

J24

K27

K25

J27

J26

F22

J22

D24

D25

N22 M22

D18

C18

D17

D16

T24

U24

V24

V25

F16

P22

H22

FBA_CMD0{23,24} FBA_CMD1{24} FBA_CMD2{23} FBA_CMD3{23,24} FBA_CMD4{23,24} FBA_CMD5{23,24} FBA_CMD6{23,24} FBA_CMD7{23,24} FBA_CMD8{23,24}

FBA_CMD9{23,24} FBA_CMD10{23,24} FBA_CMD11{23,24} FBA_CMD12{23,24} FBA_CMD13{23,24} FBA_CMD14{23,24} FBA_CMD15{23,24} FBA_CMD16{23,24} FBA_CMD17{24} FBA_CMD18{23} FBA_CMD19{23,24} FBA_CMD20{23,24} FBA_CMD21{23,24} FBA_CMD22{23,24} FBA_CMD23{23,24} FBA_CMD24{23,24} FBA_CMD25{23,24} FBA_CMD26{23,24} FBA_CMD27{23} FBA_CMD28{23,24} FBA_CMD29{23,24} FBA_CMD30{24}

VMA_CLK0{23,24}

VMA_CLK0#{23,24}

VMA_CLK1{23,24}

VMA_CLK1#{23,24}

FB_DLLAVDD = 35mA

2

U29B

FB_CLAMP

DUAL RANK (Mode E)

Rank 0/1 [31:0] ODT

FBA_CMD0

Rank1 [31:0] CS1#

FBA_CMD1

Rank0 [31:0] CS0#

FBA_CMD2

Rank 0/1 [31:0] CKE

FBA_CMD3

[Rank0:A9],[Rank1:A11]

FBA_CMD4

[Rank0:A6],[Rank1:A7]

FBA_CMD5

[Rank0:A3],[Rank1:BA1]

FBA_CMD6

[Rank0:A0],[Rank1:A12]

FBA_CMD7

[Rank0:A8],[Rank1:A8]

FBA_CMD8

[Rank0:A12],[Rank1:A0]

FBA_CMD9

[Rank0:A1],[Rank1:A2]

FBA_CMD10

[Rank0:RAS#],[Rank1:RAS#]

FBA_CMD11

[Rank0:A13],[Rank1:A14]

FBA_CMD12

[Rank0:BA1],[Rank1:A3]

FBA_CMD13

[Rank0:A14],[Rank1:A13]

FBA_CMD14

[Rank0:CAS#],[Rank1:CAS#]

FBA_CMD15

Rank 0/1 [63:32] ODT

FBA_CMD16

Rank1 [63:32] CS1#

FBA_CMD17

Rank0 [63:32] CS0#

FBA_CMD18

Rank 0/1 [63:32] CKE

FBA_CMD19

[Rank0:RST],[Rank1:RST]

FBA_CMD20

[Rank0:A7],[Rank1:A6]

FBA_CMD21

[Rank0:A4],[Rank1:A5]

FBA_CMD22

[Rank0:A11],[Rank1:A9]

FBA_CMD23

[Rank0:A2],[Rank1:A1]

FBA_CMD24

[Rank0:A10],[Rank1:WE#]

FBA_CMD25

[Rank0:A5],[Rank1:A4]

FBA_CMD26 FBA_CMD27

[Rank0:WE#],[Rank1:A10]

FBA_CMD28

[Rank0:BA0],[Rank1:BA0]

FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DEBUG0 FBA_DEBUG1

FBA_CLK0 FBA_CLK0 FBA_CLK1 FBA_CLK1

FBA_WCK01 FBA_WCK01 FBA_WCK23 FBA_WCK23 FBA_WCK45 FBA_WCK45 FBA_WCK67 FBA_WCK67

FB_PLLAVDD

FB_DLLAVDD

bga595-nvidia-n13p-gv2-s-a2

FBA

Rank0 BA2

Rank1 BA2

3

E18

VMA_DQ0

FBA_D0

F18

VMA_DQ1

FBA_D1

E16

VMA_DQ2

FBA_D2

F17

VMA_DQ3

FBA_D3

D20

VMA_DQ4

FBA_D4

D21

VMA_DQ5

FBA_D5

F20

VMA_DQ6

FBA_D6

E21

VMA_DQ7

FBA_D7

E15

VMA_DQ8

FBA_D8

D15

VMA_DQ9

FBA_D9

F15

VMA_DQ10

FBA_D10

F13

VMA_DQ11

FBA_D11

C13

VMA_DQ12

FBA_D12

B13

VMA_DQ13

FBA_D13

E13

VMA_DQ14

FBA_D14

D13

VMA_DQ15

FBA_D15

B15

VMA_DQ16

FBA_D16

C16

VMA_DQ17

FBA_D17

A13

VMA_DQ18

FBA_D18

A15

VMA_DQ19

FBA_D19

B18

VMA_DQ20

FBA_D20

A18

VMA_DQ21

FBA_D21

A19

VMA_DQ22

FBA_D22

C19

VMA_DQ23

FBA_D23

B24

VMA_DQ24

FBA_D24

C23

VMA_DQ25

FBA_D25

A25

VMA_DQ26

FBA_D26

A24

VMA_DQ27

FBA_D27

A21

VMA_DQ28

FBA_D28

B21

VMA_DQ29

FBA_D29

C20

VMA_DQ30

FBA_D30

C21

VMA_DQ31

FBA_D31

R22

VMA_DQ32

FBA_D32

R24

VMA_DQ33

FBA_D33

T22

VMA_DQ34

FBA_D34

R23

VMA_DQ35

FBA_D35

N25

VMA_DQ36

FBA_D36

N26

VMA_DQ37

FBA_D37

N23

VMA_DQ38

FBA_D38

N24

VMA_DQ39

FBA_D39

V23

VMA_DQ40

FBA_D40

V22

VMA_DQ41

FBA_D41

T23

VMA_DQ42

FBA_D42

U22

VMA_DQ43

FBA_D43

Y24

VMA_DQ44

FBA_D44

AA24

VMA_DQ45

FBA_D45

Y22

VMA_DQ46

FBA_D46

AA23

VMA_DQ47

FBA_D47

AD27

VMA_DQ48

FBA_D48

AB25

VMA_DQ49

FBA_D49

AD26

VMA_DQ50

FBA_D50

AC25

VMA_DQ51

FBA_D51

AA27

VMA_DQ52

FBA_D52

AA26

VMA_DQ53

FBA_D53

W26

VMA_DQ54

FBA_D54

Y25

VMA_DQ55

FBA_D55

R26

VMA_DQ56

FBA_D56

T25

VMA_DQ57

FBA_D57

N27

VMA_DQ58

FBA_D58

R27

VMA_DQ59

FBA_D59

V26

VMA_DQ60

FBA_D60

V27

VMA_DQ61

FBA_D61

W27

VMA_DQ62

FBA_D62

W25

VMA_DQ63

N/A

FBA_D63

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FB_VREF_PROBE

COMMON

D19 D14 C17 C22 P24 W24 AA25 U25

E19 C15 B16 B22 R25 W23 AB26 T26

F19 C14 A16 A22 P25 W22 AB27 T27

D23

VMA_WDQS0 VMA_WDQS1 VMA_WDQS2 VMA_WDQS3 VMA_WDQS4 VMA_WDQS5 VMA_WDQS6 VMA_WDQS7

VMA_DM0 VMA_DM1 VMA_DM2 VMA_DM3 VMA_DM4 VMA_DM5 VMA_DM6 VMA_DM7

VMA_RDQS0 VMA_RDQS1 VMA_RDQS2 VMA_RDQS3 VMA_RDQS4 VMA_RDQS5 VMA_RDQS6 VMA_RDQS7

FB_VREF_PROBE

VMA_DM[7:0] {23,24}

VMA_WDQS[7:0] {23,24}

VMA_RDQS[7:0] {23,24}

TP41

VMA_DQ[63:0]

FBVDDQ + FBVDD = 4.88A

C298 EV@0.1U/10V_4X C269 EV@0.1U/10V_4X C284 EV@1U/10V_6X C261 EV@1U/10V_6X C614 EV@4.7U/6.3V_6X C296 EV@4.7U/6.3V_6X C294 EV@10U/6.3V_6X C295 EV@10U/6.3V_6X

+1.5V_GPU +1.5V_GPU

4

VMA_DQ[63:0] {23,24}

+1.5V_GPU

U29D

B26

FBVDDQ

C25

FBVDDQ

E23

FBVDDQ

E26

FBVDDQ

F14

FBVDDQ

F21

FBVDDQ

G13

FBVDDQ

G14

FBVDDQ

G15

FBVDDQ

G16

FBVDDQ

G18

FBVDDQ

G19

FBVDDQ

G20

FBVDDQ

G21

FBVDDQ

H24

FBVDDQ

H26

FBVDDQ

J21

FBVDDQ

K21

FBVDDQ

L22

FBVDDQ

L24

FBVDDQ

L26

FBVDDQ

M21

FBVDDQ

N21

FBVDDQ

R21

FBVDDQ

T21

FBVDDQ

V21

FBVDDQ

W21

FBVDDQ

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CALTERM_GND

bga595-nvidia-n13p-gv2-s-a2 COMMON

ODTx, CKEx,RST (Termination)

FBA_ODT_L FBA_ODT_H FBA_RST# FBA_CKE_L FBA_CKE_H

D22

FB_CAL_PD_VDDQ

C24

FB_CAL_PU_GND

B25

FB_CAL_TERM_GND

FBA_CMD0 FBA_CMD16 FBA_CMD20 FBA_CMD3 FBA_CMD19

5

R276 EV@40.2/F_4

R681 EV@42.2/F_4

R678 EV@51.1/F_4

R306 EV@10K_4 R623 EV@10K_4 R236 EV@10K_4 R307 EV@10K_4 R187 EV@10K_4

+1.5V_GPU

FBA_CMD28 FBA_CMD11

FBA_CMD23 FBA_CMD24

FBA_CMD21 FBA_CMD22

FBA_CMD27 FBA_CMD13

6

R244 EV@100_4

R245 EV@100_4

R231 EV@100_4

R232 EV@100_4

R234 EV@100_4

R235 EV@100_4

R273 EV@100_4

R274 EV@100_4

R668 EV@100_4

R667 EV@100_4

R647 EV@100_4

R646 EV@100_4

R649 EV@100_4

R648 EV@100_4

R264 EV@100_4

R265 EV@100_4

+1.5V_GPU

C544 EV@0.1U/10V_4X

C219 EV@0.1U/10V_4X

C247 EV@0.1U/10V_4X

C601 EV@0.1U/10V_4X

FBA_CMD26 FBA_CMD30

FBA_CMD9 FBA_CMD15

FBA_CMD8 FBA_CMD4

FBA_CMD10 FBA_CMD6

7

R654 EV@100_4

R653 EV@100_4

R250 EV@100_4

R251 EV@100_4

R242 EV@100_4

R243 EV@100_4

R673 EV@100_4

R672 EV@100_4

R644 EV@100_4

R643 EV@100_4

R246 EV@100_4

R247 EV@100_4

R662 EV@100_4

R661 EV@100_4

R256 EV@100_4

R257 EV@100_4

+1.5V_GPU

C618 EV@0.1U/10V_4X

C655 EV@0.1U/10V_4X

C608 EV@0.1U/10V_4X

C212 EV@0.1U/10V_4X

8

17

R225

R651

R658

EV@100_4

FBA_CMD12 FBA_CMD7

D D

1

2

EV@100_4

R650

R657

EV@100_4

3

C270 EV@0.1U/10V_4X

FBA_CMD25 FBA_CMD5

R642

R677

EV@100_4

C332

R676

R641 EV@100_4

4

EV@100_4

EV@0.1U/10V_4X

FBA_CMD29 FBA_CMD14

5

EV@100_4

R226 EV@100_4

R261 EV@100_4

R262 EV@100_4

C615 EV@0.1U/10V_4X

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

6

7

Date: Sheet of

PROJECT :

N14x (Memory I/F)

Thursday, December 20, 2012

Chief River

17 49

8

A1A

1

2

3

4

5

6

7

8

R213 *EV@1K/F_4

+3V_GPU

A A

B B

C C

125mA

L10 OEVLDS@HCB1608KF-181T15_1.5A

C234 OEVLDS@4.7U/6.3V_6X C259 OEVLDS@1U/6.3V_4X C260 OEVLDS@0.1U/10V_4X

+1.05V_GPU

115mA *2

L7 OEVLDS@HCB1608KF-181T15_1.5A

C227 OEVLDS@1U/6.3V_4X C229 OEVLDS@0.1U/10V_4X C228 OEVLDS@0.1U/10V_4X

R252 OEHM@1K/F_4

+3V_GPU

100mA

L15 OEHM@HCB1608KF-181T15_1.5A

C313 OEHM@4.7U/6.3V_6X C312 OEHM@1U/6.3V_4X C283 OEHM@0.1U/10V_4X C278 OEHM@0.1U/10V_4X C311 OEHM@0.1U/10V_4X

+1.05V_GPU

72mA

L11 OEHM@HCB1608KF-181T15_1.5A

C235 OEHM@4.7U/6.3V_6X C236 OEHM@1U/6.3V_4X C265 OEHM@0.1U/10V_4X C275 OEHM@0.1U/10V_4X

IFPAB_PLLVDD

IFPAB_IOVDD

IFPC_PLLVDD

IFPC_IOVDD

U29G

AA6

IFPAB_RSET

V7

IFPAB_PLLVDD

W7

IFPAB_PLLVDD

W6

IFPA_IOVDD

Y6

IFPB_IOVDD

bga595-nvidia-n13p-gv2-s-a2

M7 N7

P6

U29H

T6

IFPC_RSET

IFPC_PLLVDD IFPC_PLLVDD

IFPC_IOVDD

bga595-nvidia-n13p-gv2-s-a2

IFPAB

LVDS A

LVDS B

IFPC

AC4

IFPA_TXC

AC3

IFPA_TXC

Y3

IFPA_TXD0

Y4

IFPA_TXD0

AA2

IFPA_TXD1

AA3

IFPA_TXD1

AA1

IFPA_TXD2

AB1

IFPA_TXD2

AA5

IFPA_TXD3

AA4

IFPA_TXD3

AB4

IFPB_TXC

AB5

IFPB_TXC

AB2

IFPB_TXD4

AB3

IFPB_TXD4

AD2

IFPB_TXD5

AD3

IFPB_TXD5

AD1

IFPB_TXD6

AE1

IFPB_TXD6

AD5

IFPB_TXD7

AD4

IFPB_TXD7

HPD_A

GPIO14

B3

COMMON

EV_TXLCLKOUT- {26} EV_TXLCLKOUT+ {26}

EV_TXLOUT0- {26} EV_TXLOUT0+ {26}

EV_TXLOUT1- {26} EV_TXLOUT1+ {26}

EV_TXLOUT2- {26} EV_TXLOUT2+ {26}

EV_TXUCLKOUT- {26} EV_TXUCLKOUT+ {26}

EV_TXUOUT0- {26} EV_TXUOUT0+ {26}

EV_TXUOUT1- {26} EV_TXUOUT1+ {26}

EV_TXUOUT2- {26} EV_TXUOUT2+ {26}

HDMI

N5

IFPC_AUX

DDC DATA DDC CLK

TX CLKTX CLK+

TX Data0 TX Data0 +

TX Data1 TX Data1 +

TX Data2 TX Data2 +

HPD_C

IFPC_AUX

IFPC_L3 IFPC_L3

IFPC_L2 IFPC_L2

IFPC_L1 IFPC_L1

IFPC_L0 IFPC_L0

GPIO15

COMMON

N4

N3 N2

R3 R2

R1 T1

T3 T2

C3

EV_HDMI_DDCDAT {28} EV_HDMI_DDCCLK {28}

EXT_HDMICLK- {28} EXT_HDMICLK+ {28}

EXT_HDMITX0N {28} EXT_HDMITX0P {28}

EXT_HDMITX1N {28} EXT_HDMITX1P {28}

EXT_HDMITX2N {28} EXT_HDMITX2P {28}

EXT_HDMI_HPD {28}

R253 OEVEDP@1K/F_4

+3V_GPU

L32 OEVEDP@HCB1608KF-181T15_1.5A

C602 OEVEDP@4.7U/6.3V_6X C606 OEVEDP@1U/6.3V_4X C605 OEVEDP@0.1U/10V_4X C725 OEVEDP@0.1U/10V_4X C726 OEVEDP@0.1U/10V_4X

+1.05V_GPU

L36 OEVEDP@HCB1608KF-181T15_1.5A

C613 OEVEDP@4.7U/6.3V_6XC224 OEVLDS@4.7U/6.3V_6X C612 OEVEDP@1U/6.3V_4X C611 OEVEDP@0.1U/10V_4X C727 OEVEDP@0.1U/10V_4X

IFPD_PLLVDD

B2A

IFPD_IOVDD

B2A

TP40

TP38

TP39

U29I

U6

IFPD_RSET

T7

IFPD_PLLVDD

R7

IFPD_PLLVDD

R6

IFPD_IOVDD

U29J

GF119

(N14M-GL)

J7

IFPEF_PLLVDD

K7

IFPEF_PLLVDD

K6

IFPEF_RSET

GF119

(N14M-GL) (N14P-GV2)

H6

IFPE_IOVDD

J6

IFPF_IOVDD

IFPE

GK208

NC

IFPF

GK208

(N14P-GV2)

NC

IFPD

GK208

(N14P-GV2)

NC NC

NC

GK208(N14P-GV2)

NC NC

NC

DVI-DL

I2CY_SDA I2CY_SCL

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

HPD_E

DVI-DL

TXD3 TXD3

TXD4 TXD4

TXD5 TXD5

P4

EV_EDP_AUXN

IFPD_AUX

P3

EV_EDP_AUXP

IFPD_AUX

R5

IFPD_L3

R4

IFPD_L3

T5

IFPD_L2

T4

IFPD_L2

U4

IFPD_L1

U3

IFPD_L1

V4

IFPD_L0

V3

IFPD_L0

D4

GPIO17

HPD_D

COMMONbga595-nvidia-n13p-gv2-s-a2

R626 OEVEDP@100K_4

GF119

(N14M-GL)

DVI-SL/HDMI

DP

J3

IFPE_AUX

I2CY_SDA I2CY_SCL

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

HPD_E

GF119

(N14M-GL)

DVI-SL/HDMI I2CZ_SDA

I2CZ_SCL

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

HPD_F

IFPE_AUX

IFPE_L3 IFPE_L3

IFPE_L2 IFPE_L2

IFPE_L1 IFPE_L1

IFPE_L0 IFPE_L0

GPIO18

DP

IFPF_AUX IFPF_AUX

IFPF_L3 IFPF_L3

IFPF_L2 IFPF_L2

IFPF_L1 IFPF_L1

IFPF_L0 IFPF_L0

GPIO19

J2

J1 K1

K3 K2

M3 M2

M1 N1

C2

H4 H3

J5 J4

K5 K4

L4 L3

M5 M4

F7

EV_EDP_TXN3 {26}

EV_EDP_TXP3 {26}

EV_EDP_TXN2 {26}

EV_EDP_TXP2 {26}

EV_EDP_TXN1 {26}

EV_EDP_TXP1 {26}

EV_EDP_TXN0 {26}

EV_EDP_TXP0 {26}

EV_EDP_HPD {29}

EV_EDP_AUXN EV_EDP_AUXP

R622 OEVEDP@100K_4

EV_EDP_AUXN {18,26} EV_EDP_AUXP {18,26}

B2A

18

bga595-nvidia-n13p-gv2-s-a2

D D

1

2

3

4

5

6

7

COMMON

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

N14x (Display I/F)

Thursday, December 20, 2012

Chief River

18 49

8

A1A

+1.05V_GPU

+3V_GPU

PLLVDD = 52mA

L14 EV@HCB1608KF-181T15_1.5A

C287 EV@0.1U/10V_4X

C310 EV@10U/6.3V_6X

SP_PLLVDD = 71mA VID_PLLVDD = 41mA

L13 EV@HCB1608KF-181T15_1.5A

C277 EV@0.1U/10V_4X C282 EV@0.1U/10V_4X C305 EV@4.7U/6.3V_6X C306 EV@10U/6.3V_6X

R725 EV@10K_4

120mA

L9 OECRT@HCB1608KF-181T15_1.5A

C233 OECRT@4.7U/6.3V_6X C239 OECRT@1U/6.3V_4X C258 OECRT@0.1U/10V_4X C238 OECRT@0.1U/10V_4X C237 OECRT@0.1U/10V_4X C592 OECRT@0.1U/10V_4X

R621 OECRT@124/F_4

SP_PLLVDD

CLK_27M_XTAL_IN CLK_27M_XTAL_OUT

DACA_VDD DACA_VREF DACA_RESET

NV_PLLVDD

XTAL_SSIN

U29M

L6

PLLVDD

M6

SP_PLLVDD

N6

VID_PLLVDD

A10

XTALSSIN

C11

XTALIN

bga595-nvidia-n13p-gv2-s-a2

U29K

W5

DACA_VDD

AE2

DACA_VREF

AF2

DACA_RSET

bga595-nvidia-n13p-gv2-s-a2

XTAL_PLL

CRT

XTALOUTBUFF

XTALOUT

COMMON

I2CA_SCL

I2CA_SDA

DACA_HSYNC

DACA_VSYNC

DACA_RED

DACA_GREEN

DACA_BLUE

COMMON

C10

B10

B7 A7

AE3 AE4

AG3 AF4 AF3

BXTALOUT

R297 EV@10K_4

R914 EV@0_4

EV_CRTDCLK {29}

EV_CRTDDAT {29}

EXT_HSYNC {29} EXT_VSYNC {29}

EXT_CRT_RED {29} EXT_CRT_GRN {29} EXT_CRT_BLU {29}

CLK_27M_XTAL_IN

CLK_27M_XTAL_OUT_R

EXT_CRT_RED EXT_CRT_GRN EXT_CRT_BLU

R704 OECRT@2.2K_4

EV_CRTDCLK EV_CRTDDAT

23

Y2 EV@27MHZ_10

4 1

R619 OECRT@150/F_4 R618 OECRT@150/F_4 R620 OECRT@150/F_4

+3V_GPU

R291 PIV@2.2K_4

C631 EV@12P/50V_4C

C632 EV@12P/50V_4C

R727 OECRT@2.2K_4

R292 PIV@2.2K_4

19

B2A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Thursday, December 20, 2012

Date: Sheet of

Thursday, December 20, 2012

Date: Sheet of

Thursday, December 20, 2012

PROJECT :

N14x (XTAL/CRT I/F)

Chief River

19 49

A1A

1

2

3

4

5

6

7

8

U29N

D9

I2CS_SCL

GPIO

I2CS_SDA

I2CC_SCL I2CC_SDA

I2CB_SCL

I2CB_SDA

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13

GPIO16 GPIO20 GPIO21

COMMON

PEGX_RST# {16}

S5_ON {3,37,41}

2

MISC1

FB_CLAMP_MON MEM_VDD_CLT LCD_BL_PWM LCD_VCC LCD_BLEN Reserved FB_CLAMP_TGL_REQ 3DVision OVERT ALERT MEM_VREF_CTRL PWM_VID PWM_LEVEL PSI

FRM_CLK Reserved

Reserved

3

A A

TP44 TP45

B B

C C

THERMTHERM+

JTAG_TRST#

E12 F12

AE5 AD6 AE6 AF6 AG4

bga595-nvidia-n13p-gv2-s-a2

VGA_OVT#

THERMDN

THERMDP

JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST

1

Q52 *EV@ME2N7002E_200MA

SMBUS [Thermal]

R312

2

3ND_MBCLK{31,37} 3ND_MBDATA{31,37}

6

Q31A EV@2N7002KDW_115MA

EV@10K_4

1

GFx_SCL GFx_SDA

GFx_SCL

D8

GFx_SDA

A9

EV_LVDS_DDCCLK

B9

EV_LVDS_DDCDAT

C9

N12E_SCL

C8

N12E_SDA

C6

FB_CLAMP_RR

B2 D6

EV_LVDS_BRIGHT

C7

EV_LVDS_DIGON

F9

DGPU_BLON

A3 A4

FB_CLAMP_TGL_REQ#_Q

B6 A6

VGA_OVT#

F8

VGA_ALERT

C5 E7 D7

VGA_PWR_LEVEL

B4

VGA_PSI

D5

GPU_GPIO16

E6 C4

R726 EV@2.2K_4 R703 EV@2.2K_4

R656 GC6@0_4

TP90

R705 *EV@0_4

3DVision

NV_MEM_VERF_CTRL

R730 EV@10K_4

TP42 TP43 TP91

B2A

+3V_GPU+3V_GPU

5

3 4

Q31B EV@2N7002KDW_115MA

R311 EV@10K_4

EV_LVDS_DDCCLK {26} EV_LVDS_DDCDAT {26}

FB_CLAMP {17,37,47}

B2B

EV_LVDS_BRIGHT {29} EV_LVDS_DIGON {29}

DGPU_BLON {29}

VGA_STBY {46}

B2A

GPU_VID0 {46} VGA_PWR_LEVEL {37}

+3V_GPU

GPU_PSI {46}

FB_CLAMP_RR

FB_CLAMP_TGL_REQ#_Q

R701 OEVLDS@2.2K_4

EV_LVDS_DDCCLK EV_LVDS_DDCDAT

DGPU_PWR_EN {8}

2

3

1

Q53 GC6@ME2N7002E_200MA

+3V_GPU

2

1

GC6@ME2303T1 Q54

3

FB_CLAMP

FB_CLAMP_TGL_REQ# {37}

R283 PIV@2.2K_4

+3V_GPU+3V_GPU

R702 OEVLDS@2.2K_4

R287 PIV@2.2K_4

GPIO PU/PD

FB_CLAMP_TGL_REQ#_Q

B2A

VGA_PWR_LEVEL VGA_OVT# VGA_ALERT

EV_LVDS_BRIGHT EV_LVDS_DIGON

DGPU_BLON

JTAG_TRST#

FB_CLAMP_RR

3DVision NV_MEM_VERF_CTRL

R293 EV@100K_4 R728 EV@100K_4 R294 EV@100K_4 R729 GC6@10K_4

R289 OEV@10K_4 R296 *OEV@10K_4 R298 *OEV@10K_4 R617 EV@10K_4

R742 GC6@10K_4

R915 *EV@100K_4 R916 *EV@100K_4

20

+3V_GPU

D D

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Friday, December 28, 2012

Date: Sheet of

Friday, December 28, 2012

Date: Sheet of

1

2

3

4

5

6

Friday, December 28, 2012

7

PROJECT :

N14x (GPIO)

Chief River

20 49

8

A1A

5

U29L

(N14M_GL) (N14P_GV2)GK208GF119

E10

VMON_IN0

F10

VMON_IN1

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

D D

D1

STRAP0

D2

STRAP1

E4

STRAP2

E3

STRAP3

D3

STRAP4

GF119

C1

STRAP5

F6

MULTISTRAP_REF0_GND

GF119

F4

MULTISTRAP_REF1_GND

F5

MULTISTRAP_REF2_GND

bga595-nvidia-n13p-gv2-s-a2 COMMON

Vendor P/N

H5TQ2G63DFR-N0C (128M*16)

H1H2S1S2M1M2M3S3H3H4

H5TQ2G63DFR-11C (128M*16)

C C

B B

A A

HynixSamsungMicronMicronSamsungHynix

K4W2G1646E-BC1A (128M*16)

K4W2G1646E-BC11 (128M*16)

128M (2G bit)256M (4Gbit)

MT41J128M16JT-107G:K (128M*16)

MT41J128M16JT-093G:K (128M*16)

MT41K256M16HA-107G:E (256M*16)

K4W4G1646B-HC11 (256M*16)

H5TQ4G63MFR-11C (256M*16)

H5TQ4G63AFR-11C (256M*16)

NC NC

MISC 2

(N14M_GL)

GK208

(N14P_GV2)

NC

(N14M_GL) GK208(N14P_GV2)

NC NC

GL/GV2

GL

D12

ROM_CS ROM_SI

ROM_SO ROM_SCLK

NV_PWGMSTRAP_REF0_GND

TP46 TP93

TP94 TP95

NC

GK208 (N14P_GV2)

NC

GK208 (N14P_GV2)

ROM_CS

ROM_SI

ROM_SO

ROM_SCLK

BUFRST

PGOOD

GF119 (N14M_GL)

B12 A12 C12

D11 D10

E9

CEC

STN B/S P/N Size Strap Note

GL:0x06

x4=1GB

x8=2GB

x4=1GB

x8=2GB

x4=1GB

x8=2GB

x4=1GB

x8=2GB

x4=1GB

x8=2GB

x4=1GB

x8=2GB

x4=2GB

x8=4GB

x4=2GB

x8=4GB

x4=2GB

N/A

x4=2GB

N/A

GV2:0x06

0110

GV2:0x06

0110

0101

0001

1101

1011

0011

0100

0110

GV2:0x06

0110

GV2:0x06

0110

GV2:0x07

0111

GV2:0x07

0111

GV2:0x07

0111

GV2:0x07

0111

GV2:0x05

0101

GV2:0x05

0101

GV2:0x05

0101

GV2:0x05

0101

0001

GV2:0x01

0001

0011

GV2:0x03

0011

GL:0x06

GL:0x05

GL:0x01

GL:0x0D GV2:0x01

GL:0x0B GV2:0x03

GL:0x03

GL:0x04

R299 EV@10K_4

1000MHz

900MHz

1000MHz

900MHz

1000MHz

900MHz

4

PCI_DEVID STRAP

RAM_CFG

SUB_VENDOR

FB[1:0] VGA_DEVICE

I2CS_Slave Address

USER STRAP

Strap Pin name Strapping Bits 3

ROM_SCLK

PCI_DEVID[4] SUB_VENDER PCI_DEVID[5] PEX_PLL_EN_TERM

ROM_SI

RAM_CFG[3] RAM_CFG[2] RAM_CFG[1] RAM_CFG[0]

ROM_SO

FB[1] FB[0] SMB_ALT_ADDR VGA_DEVICE

STRAP0

USER[3] USER[2] USER[1] USER[0]

STRAP1

3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0]

STRAP2

PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]

STRAP3

SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED

STRAP4

RESERVED PCIE_SPEED_CHAN

4.99K

1000

10K

1001

15K

1010

20K

1011 VDD33 GND VDD33 GNDResistor Value Resistor Value

Strap Pin name Strap Mapping Polarity

ROM_SCLK SMB_ALT_ADDR

ROM_SI SUB_VENDER

ROM_SO

VGA_DEVICE

STRAP0

RAMCFG[0]

STRAP1

RAMCFG[1]

STRAP2

RAMCFG[2]

STRAP3

RAMCFG[3]

STRAP4

PCIE_MAX_SPEED

3

MULT STRIP [N14P_GV2]

PCI DEVICE ID

RAM_CFG[3:0] for memory configuration

0:No VBIOS ROM ; 1 BIOS ROM [Default]

[1:0] --> 256MB

0:3D Device ; 1:VGA Device

0:9E [Default] ; 1:9C

Panel EDID Support

Strapping Bits 2 Strapping Bits 1 Strapping Bits 0

CE_GEN3 0000 0001 0010 0011

0x1292 -->QS 0x12AD -->ES

PCIE_MAX_SPEEDDP_PLL_VDD33V

24.9K

1100

30.1K

1101

34.8K

1110

45.3K

1111

0100 0101 0110 0111

Binary Strap [N14M_GL]

Pull-down to GND

Pull-UP to 3V3 if VBIOS ROM Exists Pull-down to GND if no VBIO ROM

Pull-down to GND ( no dispaly )

USER defined

Pull-down to GND

+3V_GPU

R739 *10K_4

R734 *10K_4

R737 *10K_4

R690 Strap_GL@10K_4

R709 Strap_GL@10K_4

R671 Strap_GL@10K_4

R680 Strap_GL@10K_4

DP_PLL_VDD33

PEX_PLL_EN_TERM

3GIO_PADCFG

PCIE_MAX_SPEED PCIE_SPEED_CHANG_ GEN3

SORx_EXPOSED

SETTING NOTE

ROM_SCLK

R738 GV2@4.99K/F_4

ROM_SCLK

ROM_SI

ROM_SO

STRAP0

STRAP1

STRAP2

STRAP3

+3V_GPU

+3V_GPU +3V_GPU

+3V_GPU

R735 *15K/F_4

R917 PIV_GV2@4.99K/F_4 R736 OEV_GV2@10K/F_4

R693 GV2@45.3K/F_4

R698 *15K/F_4

R666 *15K/F_4

R675 *15K/F_4

R685 *15K/F_4

R720 *15K/F_4

MSTRAP_REF0_GND

SETTING

STRAP4

ROM_SI

ROM_SO

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

1 [Default] PCIE PLL termination

0:Disable [Default] ; 1:Enable

[0000] --> Gen3 support

[1] -->Allow boot to PCIE Gen3

[1] -->Enable Gen3 SOR0_EXP=0,SOR1_EXP=1

[IFPA/B:LVDS] ; [IFPC:HDMI]

R717 *15K/F_4

R714 Strap_GV2@15K/F_4

B2A Co-Lay

R715 *15K/F_4

R692 *15K/F_4

R697 GV2@45.3K/F_4

R670 GV2@15K/F_4

R674 OEV_GV2@15K/F_4

R684 PIV_GV2@4.99K/F_4

R723 GV2@45.3K/F_4

R260 GV2@40.2K/F_4

R718 GL@10K_4

R713 GL@10K_4

R716 GL@10K_4

A0A1

R689 Strap_GL@10K_4

B0B1

R708 Strap_GL@10K_4

C0C1

R665 Strap_GL@10K_4

D0D1

R679 Strap_GL@10K_4

R719 GL@10K_4

2

1

21

N14P_GV2

ROM_SI

N14M_GL

H1/H2

34.8K

H1 D0 C1 B1

H2 D0 C1 B1 A0

H3 D0 C0 B1 A1

H4 D0 C1 B0 A0

S1 D0 C1 B0 A1

S2 D0 C1 B0

S3 D1 C0 B1

M1 D0

M2

M3

S1/S2

45.3K

CS34532FB18CS33482FB22 CS33012FB18 CS32002FB29

D0

D1

M1/M2

30.1K

C0

C0 B0

C1

Strap1Strap2Strap3

B0 A1

B0

S3

20K

Strap0

A0

A1

M3

10K

CS31002FB26

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

MSIC & STRAP

1

Chief River

21 49Thursday, December 20, 2012

A1A

+VGPU_CORE

K10 K12 K14 K16 K18 L11 L13 L15

L17 M10 M12 M14 M16 M18

N11

N13

N15

N17

P10

P12

P14

P16

P18

R11

R13

R15

R17

T10

T12

T14

T16

T18

U11

U13

U15

U17

V10

V12

V14

V16

V18

B2A

NVDD = 34~55 A

C256 EV@0.1U/10V_4X C279 *EV@0.1U/10V_4X C255 EV@0.1U/10V_4X C285 EV@0.1U/10V_4X C290 EV@0.1U/10V_4X C263 EV@4.7U/6.3V_6X C643 EV@4.7U/6.3V_6X C326 EV@4.7U/6.3V_6X C644 EV@4.7U/6.3V_6X C328 EV@4.7U/6.3V_6X C266 EV@4.7U/6.3V_6X C262 EV@4.7U/6.3V_6X C268 EV@4.7U/6.3V_6X C264 EV@4.7U/6.3V_6X C286 EV@4.7U/6.3V_6X

C327 EV@10U/6.3V_6X C647 EV@10U/6.3V_8X

C280 EV@4.7U/10V_6X C645 EV@4.7U/10V_6X C276 EV@4.7U/10V_6X C324 EV@4.7U/10V_6X C267 EV@4.7U/10V_6X

for meet Power down sequence for +3V_GFX

D2 EV@RB500V-40_100MA

+VGPU_CORE

D3 NGC6@RB500V-40_100MA

+1.5V_GPU

GC6 no stuff

U29E

VDD VDD VDD

NVVDD

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

bga595-nvidia-n13p-gv2-s-a2 COMMON

B2B

+3V_GPU

U29C

XVDD/VDD33

AD10

NC

AD7

NC

B19

NC

F11

3V3AUX

V5

NC_V5

V6

NC_V6

GF119 GK208 (N14M-GL)

* nc on substrate

G1

NC_G1

G2

NC_G2

G3

NC_G3

G4

NC_G4

G5

NC_G5

G6

NC_G6

G7

NC_G7

V1

NC_V1

V2

NC_V2

W1

NC_W1

W2

NC_W2

W3

NC_W3

W4

NC_W4

bga595-nvidia-n13p-gv2-s-a2 COMMON

Power down sequence

NC

(N14P-GV2)

VDD33 VDD33 VDD33 VDD33

G10 G12 G8 G9

VDD33 = 85mA

C323 EV@4.7U/6.3V_6X C603 EV@1U/10V_6X

C293 EV@0.1U/10V_4X C304 EV@0.1U/10V_4X C604 *EV@0.1U/10V_4X C292 EV@0.1U/10V_4X

+3V_GPU

B2A

U29F

A2

GND

AB17

GND

AB20

GND

AB24

GND

AC2

GND

AC22

GND

AC26

GND

AC5

GND

AC8

GND

AD12

GND

AD13

GND

A26

GND

AD15

GND

AD16

GND

AD18

GND

AD19

GND

AD21

GND

AD22

GND

AE11

GND

AE14

GND

AE17

GND

AE20

GND

AB11

GND

AF1

GND

AF11

GND

AF14

GND

AF17

GND

AF20

GND

AF23

GND

AF5

GND

AF8

GND

AG2

GND

AG26

GND

AB14

GND

B1

GND

B11

GND

B14

GND

B17

GND

B20

GND

B23

GND

B27

GND

B5

GND

B8

GND

E11

GND

E14

GND

E17

GND

E2

GND

E20

GND

E22

GND

E25

GND

E5

GND

E8

GND

H2

GND

H23

GND

H25

GND

H5

GND

K11

GND

K13

GND

K15

GND

K17

GND

L10

GND

L12

GND

L14

GND

L16

GND

L18

GND

L2

GND

L23

GND

L25

GND

L5

GND

M11

GND

bga595-nvidia-n13p-gv2-s-a2 COMMON

GND

M13

GND

M15

GND

M17

GND

N10

GND

N12

GND

N14

GND

N16

GND

N18

GND

P11

GND

P13

GND

P15

GND

P17

GND

P2

GND

P23

GND

P26

GND

P5

GND

R10

GND

R12

GND

R14

GND

R16

GND

R18

GND

T11

GND

T13

GND

T15

GND

T17

GND

U10

GND

U12

GND

U14

GND

U16

GND

U18

GND

U2

GND

U23

GND

U26

GND

U5

GND

V11

GND

V13

GND

V15

GND

V17

GND

Y2

GND

Y23

GND

Y26

GND

Y5

GND

AA7

GND

AB7

GND

22

+1.5V_GPU

R154 *EV@4.7K_4

+1.05V_GPU

R155 EV@4.7K_4

DGPU_POK4

C159 *EV@1000P/50V_4X

DGPU_POK2

C160 *EV@1000P/50V_4X

DGPU_PGOK-1

2

Q15 *EV@METR3904-G_200MA

1 3

2

Q16 EV@METR3904-G_200MA

1 3

R140 EV@0_4

+3V +3V_GPU

EV@4.7K_4

2

C158 EV@1000P/50V_4X

1 3

R141 EV@4.7K_4R151

Q14 EV@LTC044EUBFS8TL_30MA

DGPU_PWROK {11,16,37}

R142 EV@100K/F_4

VDD33 +3.3V_GFX

+VCC_DGFX_CORE

FBVDDQ +1.5V_GFX

PEX_VDD +1.05V_GFX

IFP(CDEF)_IOVDD +1.05V_GFX

Power up sequence

t>0NVVDD

t>0

t>=0

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Thursday, January 03, 2013

Date: Sheet of

Thursday, January 03, 2013

Date: Sheet of

Thursday, January 03, 2013

PROJECT :

N14x (Power/GND)

Chief River

22 49

A1A

5

4

3

2

1

VMA_DQ[63..0]{17,24}

VMA_DM[7..0]{17,24}

VMA_WDQS[7..0]{17,24}

VMA_RDQS[7..0]{17,24}

VRAM7

VREFC_VMA1{24}

D D

C C

B B

VREFD_VMA1{24}

FBA_CMD7{17,24} FBA_CMD10{17,24} FBA_CMD24{17,24} FBA_CMD6{17,24} FBA_CMD22{17,24} FBA_CMD26{17,24} FBA_CMD5{17,24} FBA_CMD21{17,24} FBA_CMD8{17,24} FBA_CMD4{17,24} FBA_CMD25{17,24} FBA_CMD23{17,24} FBA_CMD9{17,24} FBA_CMD12{17,24} FBA_CMD14{17,24}

FBA_CMD29{17,24} FBA_CMD13{17,24} FBA_CMD27{17}

VMA_CLK0{17,24}

VMA_CLK0#{17,24}

FBA_CMD3{17,24}

FBA_CMD0{17,24} FBA_CMD2{17} FBA_CMD11{17,24} FBA_CMD15{17,24} FBA_CMD28{17,24}

FBA_CMD20{17,24}

Should be 240 Ohms +-1%

VREFC_VMA1 VREFD_VMA1

VMA_WDQS1 VMA_RDQS1

VMA_DM1 VMA_DM0

VMA_WDQS0 VMA_RDQS0

CLK-A0 Termination

VMA_CLK0

R249 *EV@121/F_4

VMA_CLK0#

R254 EV@162/F_4

R248 *EV@121/F_4

C291 *EV@0.01U/25V_4X

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

VMA_ZQ1

R740 EV@243/F_4

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL SDRAM DDR3

EV@VRAM _DDR3_HYNIX_128MX16

MEM Reference Voltage (Low) MEM Reference Voltage (High Bus)

+1.5V_GPU

DataBus [0:31] DataBus [64:32]

E3

VMA_DQ13

DQL0

F7

VMA_DQ9

DQL1

F2

VMA_DQ14

DQL2

F8

VMA_DQ8

DQL3

H3

VMA_DQ12

DQL4

H8

VMA_DQ10

DQL5

G2

VMA_DQ15

DQL6

H7

VMA_DQ11

DQL7

D7

VMA_DQ5 VMA_DQ16

DQU0

C3

VMA_DQ1

DQU1

C8

VMA_DQ6

DQU2

C2

VMA_DQ2

DQU3

A7

VMA_DQ4

DQU4

A2

VMA_DQ3

DQU5

B8

VMA_DQ7

DQU6

A3

VMA_DQ0

DQU7

B2

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1

VSSQ#B9 VSSQ#D1 VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

R755 EV@1.33K/F_4

R756 EV@1.33K/F_4

+1.5V_GPU

D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VREFC_VMA1 VREFD_VMA1

C621 EV@0.1U/10V_4X

Should be 240 Ohms +-1%

VREFC_VMA1 VREFD_VMA1

FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD14

FBA_CMD29 FBA_CMD13 FBA_CMD27

VMA_CLK0 VMA_CLK0# FBA_CMD3

FBA_CMD0 FBA_CMD2 FBA_CMD11 FBA_CMD15 FBA_CMD28

VMA_WDQS3 VMA_RDQS3

VMA_DM3 VMA_DM2

VMA_WDQS2 VMA_RDQS2

FBA_CMD20

M8 H1

N3 P7 P3 N2 P8 P2 R8 R2

T8

R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 G3

E7 D3

C7

B7

T2

L8

VMA_ZQ2 VMA_ZQ3

R757 EV@243/F_4

J1

L1

J9

L9

+1.5V_GPU

EV@1.33K/F_4

R323 EV@1.33K/F_4

RANK0: 256MB/512MB DDR3

VRAM8

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSL

DML DMU

DQSU DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

96-BALL SDRAM DDR3

EV@VRAM _DDR3_HYNIX_128MX16

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1

VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2

VDDQ#E9

VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

C637 EV@0.1U/10V_4X

E3

VMA_DQ25

F7

VMA_DQ28

F2

VMA_DQ27

F8

VMA_DQ29

H3

VMA_DQ26

H8

VMA_DQ31

G2

VMA_DQ24

H7

VMA_DQ30

D7 C3

VMA_DQ23

C8

VMA_DQ17

C2

VMA_DQ21

A7

VMA_DQ18

A2

VMA_DQ22

B8

VMA_DQ19

A3

VMA_DQ20

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

CLK-A1 Termination

R233 EV@162/F_4

R237 *EV@121/F_4

C281 *EV@0.01U/25V_4X

VREFC_VMA3{24} VREFD_VMA3{24}

VMA_CLK1{17,24}

VMA_CLK1#{17,24}

FBA_CMD19{17,24}

FBA_CMD16{17,24} FBA_CMD18{17}

Should be 240 Ohms +-1%

R238 *EV@121/F_4

VREFC_VMA3 VREFD_VMA3

FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD14

FBA_CMD29 FBA_CMD13 FBA_CMD27

FBA_CMD11 FBA_CMD15 FBA_CMD28

VMA_WDQS5 VMA_RDQS5

VMA_DM5 VMA_DM4

VMA_WDQS4 VMA_RDQS4

FBA_CMD20

R645 EV@243/F_4

VMA_CLK1

VMA_CLK1#

VRAM6

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

EV@VRAM _DDR3_HYNIX_128MX16

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

VMA_ZQ4

R625 EV@243/F_4

M8

H1 N3

P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7

M7

M2

N8

M3

J7 K7 K9

K1 L2 J3 K3 L3

F3

G3

E7 D3

C7 B7

T2 L8

J1 L1 J9 L9

+1.5V_GPU

R624 EV@1.33K/F_4R322

R186 EV@1.33K/F_4

E3

VMA_DQ40

F7

VMA_DQ45

F2

VMA_DQ42

F8

VMA_DQ46

H3

VMA_DQ43

H8

VMA_DQ47

G2

VMA_DQ41

H7

VMA_DQ44

D7

VMA_DQ34

C3

VMA_DQ36

C8

VMA_DQ32

C2

VMA_DQ38

A7

VMA_DQ33

A2

VMA_DQ37

B8

VMA_DQ35

A3

VMA_DQ39

B2

+1.5V_GPU

D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

+1.5V_GPU

R146 EV@1.33K/F_4

VREFC_VMA3 VREFD_VMA3

R145 EV@1.33K/F_4

Should be 240 Ohms +-1%

C595 EV@0.1U/10V_4X

VREFC_VMA3 VREFD_VMA3

FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD14

FBA_CMD29 FBA_CMD13 FBA_CMD27

VMA_CLK1 VMA_CLK1# FBA_CMD19

FBA_CMD16 FBA_CMD18 FBA_CMD11 FBA_CMD15 FBA_CMD28

VMA_WDQS7 VMA_RDQS7

VMA_DM7 VMA_DM6

VMA_WDQS6 VMA_RDQS6

FBA_CMD20

VRAM5

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSL

DML DMU

DQSU DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

96-BALL SDRAM DDR3

EV@VRAM _DDR3_HYNIX_128MX16

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7

VDD#K2

VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1

VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9

VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

C273 EV@0.1U/10V_4X

VMA_DQ62 VMA_DQ59 VMA_DQ60 VMA_DQ56 VMA_DQ61 VMA_DQ58 VMA_DQ63 VMA_DQ57

VMA_DQ54 VMA_DQ48 VMA_DQ55 VMA_DQ51 VMA_DQ53 VMA_DQ50 VMA_DQ52 VMA_DQ49

+1.5V_GPU

23

VRAM De-Coupling

A A

+1.5V_GPU

5

C622 EV@1U/6.3V_4X C624 EV@1U/6.3V_4X C639 EV@1U/6.3V_4X C623 EV@0.1U/10V_4X C650 EV@0.1U/10V_4X

+1.5V_GPU

C638 EV@1U/6.3V_4X C563 EV@1U/6.3V_4X C625 EV@1U/6.3V_4X C657 EV@1U/6.3V_4X C656 EV@0.1U/10V_4X C654 EV@0.1U/10V_4X

+1.5V_GPU +1.5V_GPU

C542 EV@1U/6.3V_4XC620 EV@1U/6.3V_4X C648 EV@1U/6.3V_4X C596 EV@1U/6.3V_4X C540 EV@1U/6.3V_4X C616 EV@0.1U/10V_4X C617 EV@0.1U/10V_4X

4

3

C539 EV@1U/6.3V_4X C543 EV@1U/6.3V_4X C545 EV@1U/6.3V_4X C597 EV@1U/6.3V_4X C541 EV@0.1U/10V_4X C577 EV@0.1U/10V_4X

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Thursday, December 20, 2012

Date: Sheet of

Thursday, December 20, 2012

Date: Sheet of

2

Thursday, December 20, 2012

PROJECT :

N14x (DDR/Rank0)

1

Chief River

23 49

A1A

VMA_DQ[63..0]{17,23}

VMA_DM[7..0]{17,23} VMA_WDQS[7..0]{17,23} VMA_RDQS[7..0]{17,23}

DataBus [0:31] DataBus [64:32]

RANK1: 256MB/512MB DDR3

24

VREFC_VMA1{23} VREFD_VMA1{23}

FBA_CMD9{17,23} FBA_CMD24{17,23} FBA_CMD10{17,23} FBA_CMD13{17,23} FBA_CMD26{17,23} FBA_CMD22{17,23} FBA_CMD21{17,23} FBA_CMD5{17,23} FBA_CMD8{17,23} FBA_CMD23{17,23} FBA_CMD28{17,23} FBA_CMD4{17,23} FBA_CMD7{17,23} FBA_CMD14{17,23} FBA_CMD12{17,23}

FBA_CMD29{17,23} FBA_CMD6{17,23} FBA_CMD30{17}

VMA_CLK0{17,23}

VMA_CLK0#{17,23}

FBA_CMD3{17,23}

FBA_CMD0{17,23} FBA_CMD1{17} FBA_CMD11{17,23} FBA_CMD15{17,23} FBA_CMD25{17,23}

FBA_CMD20{17,23}

Should be 240 Ohms +-1%

VREFC_VMA1 VREFD_VMA1

VMA_WDQS1 VMA_RDQS1

VMA_DM1 VMA_DM0

VMA_WDQS0 VMA_RDQS0

VMA_ZQ5

R255 GV2_8@243/F_4

VRAM3

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

GV2_8@VRAM _DDR3_HYNIX_128MX16

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1

VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9

VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

VRAM4

E3

VMA_DQ13

F7

VMA_DQ9

F2

VMA_DQ14

F8

VMA_DQ8

H3

VMA_DQ12

H8

VMA_DQ10

G2

VMA_DQ15

H7

VMA_DQ11

D7

VMA_DQ5

C3

VMA_DQ1

C8

VMA_DQ6

C2

VMA_DQ2

A7

VMA_DQ4

A2

VMA_DQ3

B8

VMA_DQ7

A3

VMA_DQ0

B2

+1.5V_GPU

D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

Should be 240 Ohms +-1%

VREFC_VMA1 VREFD_VMA1

FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD12

FBA_CMD29 FBA_CMD6 FBA_CMD30

VMA_CLK0 VMA_CLK0# FBA_CMD3

FBA_CMD0 FBA_CMD1 FBA_CMD11 FBA_CMD15 FBA_CMD25

VMA_WDQS3 VMA_RDQS3

VMA_DM3 VMA_DM2

VMA_WDQS2 VMA_RDQS2

FBA_CMD20

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

VMA_ZQ6 VMA_ZQ7

R305 GV2_8@243/F_4

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL SDRAM DDR3

GV2_8@VRAM _DDR3_HYNIX_128MX16

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

E3

VMA_DQ25

F7

VMA_DQ28

F2

VMA_DQ27

F8

VMA_DQ29

H3

VMA_DQ26

H8

VMA_DQ31

G2

VMA_DQ24

H7

VMA_DQ30

D7

VMA_DQ16

C3

VMA_DQ23

C8

VMA_DQ17

C2

VMA_DQ21

A7

VMA_DQ18

A2

VMA_DQ22

B8

VMA_DQ19

A3

VMA_DQ20

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VREFC_VMA3{23} VREFD_VMA3{23}

VMA_CLK1{17,23}

VMA_CLK1#{17,23}

FBA_CMD19{17,23}

FBA_CMD16{17,23} FBA_CMD17{17}

Should be 240 Ohms +-1%

VREFC_VMA3 VREFD_VMA3

FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD12

FBA_CMD29 FBA_CMD6 FBA_CMD30

FBA_CMD11 FBA_CMD15 FBA_CMD25

VMA_WDQS5 VMA_RDQS5

VMA_DM5 VMA_DM4

VMA_WDQS4 VMA_RDQS4

FBA_CMD20

R185 GV2_8@243/F_4

VRAM2

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 G3

E7 D3

C7

B7

T2

L8

J1

L1

J9

L9

GV2_8@VRAM _DDR3_HYNIX_128MX16

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSL

DML DMU

DQSU DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2 VSS#J8

VSS#M1 VSS#M9

VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

E3

VMA_DQ40

F7

VMA_DQ45

F2

VMA_DQ42

F8

VMA_DQ46

H3

VMA_DQ43

H8

VMA_DQ47

G2

VMA_DQ41

H7

VMA_DQ44

D7

VMA_DQ34

C3

VMA_DQ36

C8

VMA_DQ32

C2

VMA_DQ38

A7

VMA_DQ33

A2

VMA_DQ37

B8

VMA_DQ35

A3

VMA_DQ39

B2

+1.5V_GPU

D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

Should be 240 Ohms +-1%

VREFC_VMA3 VREFD_VMA3

FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD12

FBA_CMD29 FBA_CMD6 FBA_CMD30

VMA_CLK1 VMA_CLK1# FBA_CMD19

FBA_CMD16 FBA_CMD17 FBA_CMD11 FBA_CMD15 FBA_CMD25

VMA_WDQS7 VMA_RDQS7

VMA_DM7 VMA_DM6

VMA_WDQS6 VMA_RDQS6

FBA_CMD20

VMA_ZQ8

R144 GV2_8@243/F_4

VRAM1

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 G3

E7 D3

C7

B7

T2

L8

J1

L1

J9

L9

GV2_8@VRAM _DDR3_HYNIX_128MX16

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSL

DML DMU

DQSU DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7

VDD#K2

VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9

VSS#T1

VSS#T9

VSSQ#B1

VSSQ#B9 VSSQ#D1 VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

E3

VMA_DQ62

F7

VMA_DQ59

F2

VMA_DQ60

F8

VMA_DQ56

H3

VMA_DQ61

H8

VMA_DQ58

G2

VMA_DQ63

H7

VMA_DQ57

D7

VMA_DQ54

C3

VMA_DQ48

C8

VMA_DQ55

C2

VMA_DQ51

A7

VMA_DQ53

A2

VMA_DQ50

B8

VMA_DQ52

A3

VMA_DQ49

B2 D9 G7 K2 K8 N1 N9 R1

+1.5V_GPU

R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VRAM De-Coupling

+1.5V_GPU +1.5V_GPU +1.5V_GPU+1.5V_GPU

C302 GV2_8@1U/6.3V_4X C303 GV2_8@1U/6.3V_4X C640 GV2_8@1U/6.3V_4X C319 GV2_8@0.1U/10V_4X C331 GV2_8@0.1U/10V_4X C320 GV2_8@0.1U/10V_4X

C333 GV2_8@1U/6.3V_4X C299 GV2_8@1U/6.3V_4X C211 GV2_8@1U/6.3V_4X C330 GV2_8@1U/6.3V_4X

C334 GV2_8@0.1U/10V_4X

C153 GV2_8@1U/6.3V_4X C325 GV2_8@1U/6.3V_4X

C301 GV2_8@1U/6.3V_4X C274 GV2_8@0.1U/10V_4X C271 GV2_8@0.1U/10V_4X

C272 GV2_8@1U/6.3V_4XC321 GV2_8@1U/6.3V_4XC300 GV2_8@1U/6.3V_4X C190 GV2_8@1U/6.3V_4X C210 GV2_8@1U/6.3V_4X C155 GV2_8@1U/6.3V_4X C152 GV2_8@0.1U/10V_4X C154 GV2_8@0.1U/10V_4X

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Thursday, December 20, 2012

Date: Sheet of

Thursday, December 20, 2012

Date: Sheet of

Thursday, December 20, 2012

PROJECT :

N14x (DDR/Rank1)

Chief River

24 49

A1A

5

4

3

2

1

25

D D

C C

SCLK

SDATA

R503 XDP@0_4 R500 XDP@0_4

XDP@ME2N7002E_200MA

Q58

3

Q57

PCH_JTAG_TDO

NBSWON#{37,38}

XDP_DBRST#{3,8}

SCLK{9,30}

SDATA{9,30}

B B

A A

5

1

R496 XDP@4.7K_4

2 2

R499 XDP@4.7K_4

1

XDP@ME2N7002E_200MA

+3V_DS3

R497 XDP@210/F_4

R498 XDP@100/F_4

PCH_HOOK1 PCH_HOOK7

SMB_XDP_CLK

SMB_XDP_DAT

B2A

PCH XDP

CN8

+3V

PCH_JTAG_TDO{9}

PM_TEST_RST#{9}

PCH_JTAG_TDI{9} PCH_JTAG_TMS{9} PCH_JTAG_TCK{9}

XDP_FN0

XDP_FN0{10}

XDP_FN1

XDP_FN1{10}

XDP_FN2

XDP_FN2{10}

XDP_FN3

XDP_FN3{10} XDP_FN4{10}

XDP_FN5 XDP_FN9

XDP_FN5{10}

XDP_FN6

XDP_FN6{10}

XDP_FN7

XDP_FN7{10}

PCH_HOOK1

+1.05V

PCH_HOOK7 SMB_XDP_DAT SMB_XDP_CLK PCH_JTAG_TDO PM_TEST_RST# PCH_JTAG_TDI PCH_JTAG_TMS PCH_JTAG_TCK

4

3

OBSFN_A0

5

OBSFN_A1

9

OBSDATA_A0

11

OBSDATA_A1

15

OBSDATA_A2

17

OBSDATA_A3

27

OBSDATA_B0

29

OBSDATA_B1

33

OBSDATA_B2

35

OBSDATA_B3

41

HOOK1

45

HOOK2

40

ITPCLK/HOOK4

42

ITPCLK#/HOOK5

48

DBR#/HOOK7

51

SDA

53

SCL

52

TDO

54

TRSTN

56

TDI

58

TMS

57

TCK0

60

GND17

59

GND16

50

GND15

49

GND14

38

GND13

37

GND12

32

GND11

31

GND10

XDP@Samtec BSH-030-01

XDP

PWRGOOD/HOOK0

VCC_OBS_CD

VCC_OBS_AB

OBSFN_B0 OBSFN_B1 OBSFN_C0

OBSFN_C1 OBSDATA_C0 OBSDATA_C1 OBSDATA_C2 OBSDATA_C3

OBSFN_D0

OBSFN_D1 OBSDATA_D0 OBSDATA_D1 OBSDATA_D2 OBSDATA_D3

HOOK3

RESET#/HOOK6

GND0 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9

44 43 21 23 4 6 10 12 16 18 22 24 28 30 34 36 47 55

TCK1

39 46 1 2 7 8 13 14 19 20 25 26

+3V_DS3+VCC_PCH_XDP

R502

XDP@0_4

XDP_FN_CLK1 XDP_FN_CLK2 XDP_FN8XDP_FN4

XDP_FN10 XDP_FN11

XDP_FN12 XDP_FN13 XDP_FN14 XDP_FN15

R504 XDP@1K_4 R501 XDP@1K_4

3

B2A

XDP_FN_CLK1 {11} XDP_FN_CLK2 {11} XDP_FN8 {9} XDP_FN9 {9} XDP_FN10 {11} XDP_FN11 {11}

XDP_FN12 {11} XDP_FN13 {11} XDP_FN14 {10} XDP_FN15 {10}

RSMRST# {8,37} MPWROK {8,37,44}

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

PROJECT :

VRAM_B: DDR3*4PCS

1

BD6

A1A

25 49Tuesday, December 18, 2012

5

EV_TXLOUT0+{18} EV_TXLOUT0-{18}

EV_EDP_TXP0{18} EV_EDP_TXN0{18}

EV_TXLOUT1+{18}

EV_TXLOUT1-{18}

EV_EDP_TXP1{18} EV_EDP_TXN1{18}

EV_TXLOUT2+{18}

EV_TXLOUT2-{18}

EV_EDP_TXP2{18} EV_EDP_TXN2{18}

EV_TXLCLKOUT+{18}

EV_TXLCLKOUT-{18}

EV_EDP_TXP3{18} EV_EDP_TXN3{18}

EV_EDP_AUXP{18} EV_EDP_AUXN{ 18}

EV_TXUOUT0+{18}

EV_TXUOUT0-{18}

EV_TXUOUT1+{18}

EV_TXUOUT1-{18}

EV_TXUOUT2+{18}

EV_TXUOUT2-{18}

EV_TXUCLKOUT+{18}

EV_TXUCLKOUT-{18}

EV_TXLOUT0+ EV_TXLOUT0-

EV_EDP_TXP0 EV_EDP_TXN0

EV_TXLOUT1+ EV_TXLOUT1-

EV_EDP_TXP1 EV_EDP_TXN1

EV_TXLOUT2+ EV_TXLOUT2-

EV_EDP_TXP2 EV_EDP_TXN2

EV_TXLCLKOUT+ EV_TXLCLKOUT-

EV_EDP_TXP3 EV_EDP_TXN3

EV_EDP_AUXP EV_EDP_AUXN

EV_TXUOUT0+ EV_TXUOUT0-

EV_TXUOUT1+ EV_TXUOUT1-

EV_TXUOUT2+ EV_TXUOUT2-

EV_TXUCLKOUT+ EV_TXUCLKOUT-

RP15 OEVLDS@0X2

RP30 OEVEDP@0X2

RP14 OEVLDS@0X2

RP31 OEVEDP@0X2

RP13 OEVLDS@0X2

RP32 OEVEDP@0X2

RP16 OEVLDS@0X2

RP29 OEVEDP@0X2

RP33 OEVLDS@0X2

RP12 OEVLDS@0X2

3 3

1

1 3

3 1

241 3

1

241 3

1

3 1

1 3

4 4

2

2 4

4 2

3

4 2

3

4 2

2 4

2

1

LCD_TXLOUT0+_L_R R LCD_TXLOUT0-_L_ RR

LCD_TXLOUT1+_L_R R LCD_TXLOUT1-_L_ RR

LCD_TXLOUT2+_L_R R LCD_TXLOUT2-_L_ RR

LCD_TXLCLKOUT+_L_ RR LCD_TXLCLKOUT-_ L_RR

LCD_TXUOUT0+_L_R R LCD_TXUOUT0-_L _RR

INT_EDP_TXP0 INT_EDP_TXN0

INT_EDP_TXP1 INT_EDP_TXN1

INT_EDP_AUXP INT_EDP_AUXP_RR INT_EDP_AUXN

LVDS-Down

D D

LVDS-Up

C C

<LDS>

49

U18

B B

1

DP_HPD

TEST_MODE EDP_AUXN EDP_AUXP +AVC33

EDP_TXP0 EDP_TXN0 EDP_TXP1 EDP_TXN1 +VCCK_V12 DP_REXT

R574 PIVLDS@12K/F_4

2 3 4 5 6 7 8

9 10 11 12

DP_HPD TEST_MODE AUX_CH_N AUX_CH_P DP_V33 DP_GND LANE0_P LANE0_N LANE1_P LANE1_N DP_V12 DP_REXT

INT_EDP_AUXN INT_EDP_AUXP

INT_EDP_TXP0 INT_EDP_TXN0 INT_EDP_TXP1 INT_EDP_TXN1

R573 PIVLDS@1K_4 R572 PIVLDS@100 K_4

C500 PIVLDS@0.1U/10V_4X C501 PIVLDS@0.1U/10V_4X

C502 PIVLDS@0.1U/10V_4X C503 PIVLDS@0.1U/10V_4X C504 PIVLDS@0.1U/10V_4X C505 PIVLDS@0.1U/10V_4X

C47 PIVLDS@0.1U/10V_4X

EDP_PHD_R{ 29}

INT_EDP_AUXN{5} INT_EDP_AUXP{ 5}

INT_EDP_TXP0{5} INT_EDP_TXN0{5} INT_EDP_TXP1{5} INT_EDP_TXN1{5}

A A

5

4

RP27 PIVEDP@0 X2

RP28 PIVEDP@0 X2

RP26 PIVEDP@0 X2

MODE_CFG1

EPAD_GND

MODE_CFG148MODE_CFG0

MODE_CFG0

47

423

241

MIICSCL

MIICSDA

46

45

MIICSCL

MIICSDA

1

3

BL_EN

+VCCK_V12

44

43

VCCK

BL_EN

RTD2136R

CIICSCL13CIICSDA14SWR_VCCK/LDO_VCCK15GND16SWR_LX/LDO_FB17SWR_VDD/LDO_VDD18PWMOUT19PANEL_VCC20PWMIN21PVCC22TXE3+23TXE3-

CIICSCL

+DVC33

CIICSDA

+VCCK_V12

+PIN17

4

42

41

TXO0-

TXO0+

PWM_OUT

+PANEL_VCC

INT_EDP_TXP0_RR INT_EDP_TXN0_RR

INT_EDP_TXP1_RR INT_EDP_TXN1_RR

INT_EDP_AUXN_RR

R547 0_4 R548 0_4

40

39

38

37

TXO1-

TXO2-

TXO1+

TXO2+

24

+DVC33

PWM_IN

R546 PIVLDS@0_4

RP25 OEV@0X2

241

RP11 PIVEDP@0X2

423

RP24 OEV@0X2

241

RP10 PIVEDP@0X2

423

RP22 OEV@0X2

241

RP21 OEV@0X2

241

RP20 OEV@0X2

241

RP6 PIVEDP@0 X2

423

RP9 O EV@0X2

241

RP8 O EV@0X2

241

RP7 O EV@0X2

241

INT_LVDS_EDIDCLK INT_LVDS_EDIDDATA

INT_TXLOUT0INT_TXLOUT0+ INT_TXLOUT1INT_TXLOUT1+ INT_TXLOUT2INT_TXLOUT2+

36

INT_TXLCLKOUT-

TXOC-

35

TXO3-

TXE0+

TXE1+

TXE2+ TXEC-

INT_TXLCLKOUT+

34 33 32

INT_TXUOUT0-

TXE0-

31

INT_TXUOUT0+

30

LCD_TXUOUT1-

TXE1-

29

LCD_TXUOUT1+

28

LCD_TXUOUT2-

TXE2-

27

LCD_TXUOUT2+

26

LCD_TXUCLKOUT-

25

LCD_TXUCLKOUT+

R545 PIVLDS@100K_4

TXOC+

TXO3+

TXEC+

3

1

3

1

3

1

3

EV_LVDS_DDCCLK{20} EV_LVDS_DDCDAT{20}

PCH_BRIGHT {8}

INT_LVDS_EDIDCLK INT_LVDS_EDIDDATA

INT_TXLOUT0+ INT_TXLOUT0-

INT_TXLOUT1+ INT_TXLOUT1-

INT_TXLOUT2+ INT_TXLOUT2-

INT_TXLCLKOUT+ INT_TXLCLKOUT-

INT_TXUOUT0+ INT_TXUOUT0-

LVDS-Down

LVDS-Up

3

EV_LVDS_DDCCLK EV_LVDS_DDCDAT

3

RP23 PIVLD S@0X2

RP17 O EVLDS@0X2

RP1 LDS@0X2

RP2 LDS@0X2

RP3 LDS@0X2

RP4 LDS@0X2

RP5 LDS@0X2

3

241

3

241

3

241

C479 EDP@0 .1U/10V_4X C478 EDP@0 .1U/10V_4X

2

1

4

3

C481 EDP@0 .1U/10V_4X C480 EDP@0 .1U/10V_4X

2

1

4

3

C484 EDP@0 .1U/10V_4X C482 EDP@0 .1U/10V_4X

2

1

4

3

C487 EDP@0 .1U/10V_4X C486 EDP@0 .1U/10V_4X

3

241

C489 EDP@0 .1U/10V_4X C488 EDP@0 .1U/10V_4X

BL_EN

PWM_OUT

+PANEL_VCC

R542 PIVLDS@1K_4

LVDS_BKLT_PCH{8,29}

EP Mode

External device connect to DP2LVDS by Pin13/Pin14, I2C protocol is used

CIICSCL

+3V

CIICSDA

R555 *PIVLDS@100K_4

R544 PIVLDS@100K_4

R538 PIVLDS@0_1 206

C490 PIVLDS@4.7U/6.3V_6X

BL_EN LVDS_BKLT_PCH

R570 *PIVLDS@0_4

126

Q43A PIVLDS@2N7 002KDW_115MA

R577 PIVLDS@4.7K_4

R569 PIVLDS@4.7K_4

5

Q43B PIVLDS@2N7 002KDW_115MA

R578 *0_4

34

LCD_EDIDCLK_L LCD_EDIDDATA_L

LCD_TXLOUT0+_L LCD_TXLOUT0-_L

LCD_TXLOUT1+_L LCD_TXLOUT1-_L

LCD_TXLOUT2+_L LCD_TXLOUT2-_L

LCD_TXLCLKOUT+_L LCD_TXLCLKOUT-_ L

LCD_TXUOUT0+ LCD_TXUOUT0-

LCD_TXUOUT1+ LCD_TXUOUT1-

LCD_TXUOUT2+ LCD_TXUOUT2-

LCD_TXUCLKOUT+ LCD_TXUCLKOUT-

INT_LVDS_PWM {29}

+LCDVCC

+3V

C738 *PIVLDS@0.1U/10V_4X

2

4

1

U33

3 5

*PIVLDS@TC7SH08FU

R938 PIVLDS@0_4

2ND_MBCLK {9,37}

2ND_MBDATA {9,37}

2

LCD_EDIDCLK_L {29} LCD_EDIDDATA_L {29}

LCD_TXLOUT0+_L {29} LCD_TXLOUT0-_L {29}

LCD_TXLOUT1+_L {29} LCD_TXLOUT1-_L {29}

LCD_TXLOUT2+_L {29} LCD_TXLOUT2-_L {29}

LCD_TXLCLKOUT+_L {2 9} LCD_TXLCLKOUT-_ L {29}

LCD_TXUOUT0+ {29} LCD_TXUOUT0- {29}

LCD_TXUOUT1+ {29} LCD_TXUOUT1- {29}

LCD_TXUOUT2+ {29} LCD_TXUOUT2- {29}

LCD_TXUCLKOUT+ { 29} LCD_TXUCLKOUT- {29}

+PIN17

LVDS_BRIGHT_I {29}

RTD2136R

RTD2136S

2

Note:

1. C1,C4,C7,C8,C9,C16 should be closed to chip

2. C9 should be X5R material

3. R8 should be 12K olm with +/- 1% 4 Entire trace of Panel VCC should be wider than 80-mil

+3V

PIVLDS@HCB1608KF-181T1 5_1.5A

+AVC33

L2

+3V

PIVLDS@HCB1608KF-121T2 0_2A

L1

C53 PIVLDS@10U/6.3V_6X

+DVC33

C40 PIVLDS@10U/6.3V_6X

C52 PIVLDS@0.1U/10V_4X

C46 PIVLDS@0.1U/10V_4X

Mode Configure Table(Power On Latch)

CFG1

ROM ONLY Mode EP Mode EEPROM Mode

L28 *PIVLDS@2.2UH_5X5

R554 PIVLDS@0_4

Dual Mode Regulator Configuration

2.2-uH 0 Olm

Connect NC

SWR

NC Connect

LDO

+VCCK_V12

B2A

EEPROM Mode

In EEPROM mode, an additional EEPROM is needed. EEPROM should configure with following condition.

1- EEPROM with a size 8K-Byte 2- EEPROM device should be 2-byte addressing device 3- Slave address should configure as 0xA8

R551 *PIVLD S@0_4

MIICSDA MIICSCL

R550 *PIVLD S@0_4 R553 *PIVLD S@0_4

MODE_CFG0 MODE_CFG1

R552 *PIVLD S@0_4

0

ROM ONLY MODE

1

: CFG0 4.7K pull low, CFG1 4.7K pull high : CFG0 4.7K pull high, CFG1 4.7K pull low : CFG0 4.7K pull high, CFG1 4.7K pull high

+VCCK_V12

C496 PIVLDS@10U/6.3V_6X

0918 FAE suggest reserve SMbus connect to FCH

+3V

U19

8

VCC

WP

5

SDA

A2

6

SCL

A1

4

GND

A0

*PIVLDS@M24C64

I2C address=0xA8

1

C51 PIVLDS@0.1U/10V_4X

C43 PIVLDS@0.1U/10V_4X

C41 PIVLDS@10U/6.3V_6X

CFG0

0 1

X

SWR MODE

LDO MODE

C50 PIVLDS@0.1U/10V_4X

C498 *PIVLDS@0 .1U/10V_4X

7 3 2 1

EP MODE

EEPROM MODE

R557

MODE_CFG0 MODE_CFG1

Size Do cument Number Rev

Date: Sheet of

*PIVLDS@4.7K_4

R558 PIVLDS@4.7K_4

C493 PIVLDS@0.1U/10V_4X

Quanta Computer Inc.

PROJECT :

EDP to LVDS

1

26

C44 PIVLDS@0.1U/10V_4X

+3V+3V

R560 PIVLDS@4.7K_4

R559

*PIVLDS@4.7K_4

BD6

26 49Thursday, December 20, 2012

A1A

5

S3 power Reduction (SM_DRAMRST#)

+1.35VSUS

R159 *NDS3@1K/F_4

D D

+3VPCU

DRAMRST_CNTRL_PCH{9,10}

EC_DRAMRST_CTRL{37}

R165 *1K_4

DRAMRST_CNTRL{4}

EC_DRAMRST_CTRL

R158 0_4

R167 *0_4

R166 *0_4

DDR3_DRAMRST#_R

<S3P>

DRAMRST_CNTRL

R156 0_4

3

Q17 *ME2N7002E_200MA

2

C177 *0.047U/10V_4X

4

1

R168 *4.99K/F_4

CPU_DRAMRST# {3}DDR3_DRAMRST#{14,15}

3

S3 power Reduction (SM_DRAMPWROK)

SYS_PWROK_R{7,8}

PM_DRAM_PWRGD{8}

+VCCPDSW+VCCPDSW

R939

U34

DS3@10K_4

1

HWPG_1.35V{37,42}

2

IN GND3OUT

DS3@74LVC1G07GW

C739

VCC5NC

DS3@0.1U/10V_4X

4

+3V_S5

C194 *0.1U/10V_4X

2 1

U7 *TC7SH08FU(F)

3 5

R184 NDS3@0_4

2

1

<S3P>

27

+1.35V_CPU

R180

4

1.8K/F_4

R179

3.3K/F_4

R182 *39/F_4

PM_DRAM_PWRGD_RPM_DRAM_PWRGD_Q

R183 0_4

3

Q21 *2N7002K_300MA

2

PM_DRAM_PWRGD_R {3}

1

MAINON_ON_G {27}

B2A

For S3 power Reduction Sequence

R5 0_6

+3V_S5

2

S3_1.35V{42}

C C

R10 *100K_4

6

2

Q3A *2N7002KDW_115MA

1

4

1

U1 *TC7SH08FU(F)

3 5

<S3P>

MAINON {37,42,43,45}

MAINON_ON_G {27}

+3V_S5 +1.35V_CPU

R14 *10K_4

34

5

Q3B *2N7002KDW_115MA

R15 *10K_4

3

Q5 *FDV301N_200MA

1

2

R13 *1K_4

C30 *0.1U/10V_4X

S3 power Reduction (CPU Power)

+VDDR_REF_CPU+SMDDR_VREF +1.35V_CPU+1.35VSUS

R19 0_8

3 4

Q6B *2N7002KDW_115MA

5

MAIND{12,41,45}

MAIND MAIND

R26 *100K_4

<S3P>

MAINON_ON_G{27}

R128 0_1206 R114 0_1206

6 524

1

Q12 *AO6402A

3

C147 *470P/50V_4X

2

R132 *220_8

3

Q13 *ME2N7002E_200MA

1

+1.35VSUS

+1.35V_CPU

C109 *0.1U/10V_4X

C104 *0.1U/10V_4X

C123 *0.1U/10V_4X

C118 *0.1U/10V_4X

For S3 power Reduction VTT discharge

+SMDDR_VTERM

R27

B B

MAINON_ON_G{27}

*2N7002KDW_115MA

A A

5

*22_4

6

2

Q6A

1

<S3P>

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

4

3

2

Date: Sheet of

PROJECT :

S3 power Reduction

1

BD6

A1A

27 49Thursday, December 20, 2012

5

HDMI Conn

D D

+5V

C C

HDMI-passive level shift

+3V_HDMI

B B

HDMI-HPD

HDMI_CON_HP_PCH{8}

EXT_HDMI_HPD{18}

<HDM>

from PCH from NV

R918 HM@0_6

F3 *HM@SMD1206P110TFT

R754 N4K@0_6

R753 N4K@100K_4

<HDM>

R663 PIHM@0_4

R664 OEHM@0_4

IV_HDMITX2{5} IV_HDMITX2#{5} EXT_HDMITX2P{18} EXT_HDMITX2N{18}

IV_HDMITX1{5} IV_HDMITX1#{5} EXT_HDMITX1P{18} EXT_HDMITX1N{18}

IV_HDMITX0{5} IV_HDMITX0#{5} EXT_HDMITX0P{18} EXT_HDMITX0N{18}

IV_HDMICLK{5} IV_HDMICLK#{5} EXT_HDMICLK+{18} EXT_HDMICLK-{18}

<HDM>

2

3

Q55

N4K@2N7002K_300MA

1

HDMI_CON_HP_PCH_R

IV_HDMITX2 IV_HDMITX2# EXT_HDMITX2P EXT_HDMITX2N

IV_HDMITX1 IV_HDMITX1# EXT_HDMITX1P EXT_HDMITX1N

IV_HDMITX0 IV_HDMITX0# EXT_HDMITX0P EXT_HDMITX0N

IV_HDMICLK IV_HDMICLK# EXT_HDMICLK+ EXT_HDMICLK-

C649 *HM@0.1U/16V_4Y

R669 N4K@1M_4

R752 PIHM@0_4 R751 PIHM@0_4 R313 OEHM@0_4 R314 OEHM@0_4

R750 PIHM@0_4 R749 PIHM@0_4 R315 OEHM@0_4 R316 OEHM@0_4

R748 PIHM@0_4 R747 PIHM@0_4 R317 OEHM@0_4 R318 OEHM@0_4

R746 PIHM@0_4 R745 PIHM@0_4 R319 OEHM@0_4 R320 OEHM@0_4

U30

1

3

OUT

IN

2

GND

HM@AP2337

R721 PIVN4K@680_4

HDMITX0#_R1 HDMITX0_R1

R711 PIVN4K@680_4 R722 OEHM@499/F_4 R710 OEHM@499/F_4

HDMITX1#_R1

R699 PIVN4K@680_4 R694 PIVN4K@680_4

HDMITX1_R1

R700 OEHM@499/F_4 R695 OEHM@499/F_4

R687 PIVN4K@680_4

HDMITX2#_R1

R683 PIVN4K@680_4

HDMITX2_R1

R688 OEHM@499/F_4 R682 OEHM@499/F_4

R744 PIVN4K@680_4

HDMICLK#_R1 HDMICLK_R1

R733 PIVN4K@680_4 R743 OEHM@499/F_4 R732 OEHM@499/F_4

+3V_HDMI+3V_HDMI

2

Q51 N4K@2N7002K_300MA

3

1

HDMITX2_RR HDMITX2#_RR

HDMITX1_RR HDMITX1#_RR

HDMITX0_RR HDMITX0#_RR

HDMICLK_RR HDMICLK#_RR

+DDC5V

C646 *HM@0.1U/16V_4Y

0.5A

D19

2 1

*HM@AZ5125-01J

HDMITX0#_C_R_PAS HDMITX0_C_R_PAS

HDMITX1#_C_R_PAS HDMITX1_C_R_PAS

HDMITX2#_C_R_PAS HDMITX2_C_R_PAS

HDMICLK#_C_R_PAS HDMICLK_C_R_PAS

C3A

HDMI_CON_HP

R652

PIVN4K@20K_4

D18

4

*HM@B220LFA-13-F_2A

C642 *HM@220P/50V_4X

R655

OEHM@100K_4

B2A

+5V_HDMI

FOR EMI

<EMC>

HDMITX2_R

HDMITX2#_R HDMITX0_R

HDMITX0#_R

HDMITX2_R HDMITX2#_R

HDMITX1_R HDMITX1#_R

HDMITX0_R HDMITX0#_R

HDMICLK_R HDMICLK#_R

HDMI_CON_DDCCLK HDMI_CON_DDCDATA

HDMI_CON_HP

C619 HM@0.1U/16V_4Y

R277 *E@120/F_4

R286 *E@120/F_4

HDMITX1_R

HDMITX1#_R HDMICLK_R

HDMICLK#_R

3

CN17

1

D2+

2

D2 Shield

3

D2-

4

D1+

5

D1 Shield

6

D1-

7

D0+

8

D0 Shield

9

D0-

10

CK+

11

CK Shield

12

CK-

13

CE Remote

14

NC

15

DDC CLK

16

DDC DATA

17

GND

18

+5V

19

HP DET

HM@2HE1655-000111F

R280 *E@120/F_4

R309 *E@120/F_4

SHELL1

SHELL2

2

<HDM>

+3V

C315 PIV4K@0.1U/10V_4X

C628 HM@0.1U/10V_4X C629 HM@0.1U/10V_4X

C630 HM@0.1U/10V_4X C633 HM@0.1U/10V_4X

C634 HM@0.1U/10V_4X C635 HM@0.1U/10V_4X

C636 HM@0.1U/10V_4X C641 HM@0.1U/10V_4X

R285 *PIV4K@0_4

HDMITX0_C_R HDMITX0#_C_R

HDMITX1_C_R HDMITX1#_C_R

HDMITX2_C_R HDMITX2#_C_R

HDMICLK_C_R HDMICLK#_C_R

+3V

C308 PIV4K@0.01U/25V_4X

HDMI4K2K_PRE HDMI4K2K_ISET HDMI4K2K_EQ HDMI4K2K_CFG HDMI4K2K_DDCBUF HDMI4K2K_EN

HDMITX2_RR HDMITX2#_RR

HDMITX1_RR HDMITX1#_RR

HDMITX0_RR HDMITX0#_RR

HDMICLK_RR HDMICLK#_RR

HDMI_CON_HP_PCH_R

20

23

GND

22

GND

21

B2A

U11

HDMITX2_C_R HDMITX2#_C_R

HDMITX1_C_R HDMITX1#_C_R

HDMITX0_C_R HDMITX0#_C_R

HDMICLK_C_R HDMICLK#_C_R

HDMI_DDCCLK_ACT HDMI_DDCDATA_ACT

HDMI4K2K_PRE HDMI4K2K_ISET

HDMI4K2K_DDCBUF HDMI4K2K_EN

HDMI4K2K_EQ HDMI4K2K_CFG

R304 PIV4K@4.99K/F_4

1

IN_D2+

2

IN_D2-

4

IN_D1+

5

IN_D1-

6

IN_D0+

7

IN_D0-

9

IN_CLK+

10

IN_CLK-

38

SCL_SRC

39

SDA_SRC

3

HPD_SRC

36

PD#

8

I2C_STL_EN

16

PRE

34

ISET

14

DDCBUF/SDA_CTL

13

DCIN_EN/SCL_CTL

17

EQ/I2C_ADDR0

23

CFG/I2C_ADDR1

18

REXT

OUT_D2+

OUT_D2-

OUT_D1+

OUT_D1-

OUT_D0+

OUT_D0-

OUT_CLK+

OUT_CLKSCL_SINK

SDA_SINK

HPD_SINK

VCC33[1] VCC33[2]

VCCTX15[1] VCCTX15[2] VCCRX15[1] VCCRX15[2] VCCTA15[1]

GND1] GND[2]

GND_PAD[1] GND_PAD[2] GND_PAD[3] GND_PAD[4] GND_PAD[5] GND_PAD[6] GND_PAD[7] GND_PAD[8] GND_PAD[9]

GND_PAD[10]

PIV4K@PS8401

C317 PIV4K@0.1U/10V_4X

R303

*PIV4K@4.7K_4

R284 N4K@0_4 R288 N4K@0_4

R279 N4K@0_4 R281 N4K@0_4

R275 N4K@0_4 R278 N4K@0_4

R295 N4K@0_4 R310 N4K@0_4

+1.5V

C627 PIV4K@0.1U/10V_4X

R706

*PIV4K@4.7K_4

R712 N4K@0_4 R724 N4K@0_4

R696 N4K@0_4 R707 N4K@0_4

R686 N4K@0_4 R691 N4K@0_4

R731 N4K@0_4 R741 N4K@0_4

C316 PIV4K@0.1U/10V_4X

+3V +3V +3V +3V +3V +3V

R302

*PIV4K@4.7K_4

HDMITX0_C_R_PAS HDMITX0#_C_R_PAS

HDMITX1_C_R_PAS HDMITX1#_C_R_PAS

HDMITX2_C_R_PAS HDMITX2#_C_R_PAS

HDMICLK_C_R_PAS HDMICLK#_C_R_PAS

C309 PIV4K@0.1U/10V_4X

R272

*PIV4K@4.7K_4

30 29

27 26

25 24

22 21

32 33

28 11

37

20 31 12 40 19

15 35

41 42 43 44 45 46 47 48 49 50

1

HDMITX2_R HDMITX2#_R

HDMITX1_R HDMITX1#_R

HDMITX0_R HDMITX0#_R

HDMICLK_R HDMICLK#_R

HDMI_CON_DDCCLK HDMI_CON_DDCDATA

HDMI_CON_HP

460mA (30mils)

HDMITX0_R HDMITX0#_R

HDMITX1_R HDMITX1#_R

HDMITX2_R HDMITX2#_R

HDMICLK_R HDMICLK#_R

C318 PIV4K@0.01U/25V_4X

R301

PIV4K@4.7K_4

+3V

+1.5V

C626 PIV4K@0.01U/25V_4X

R300

*PIV4K@4.7K_4

28

C3A

HDMI-SMBus

A A

+3V_GPU

EV_HDMI_DDCCLK{18} EV_HDMI_DDCDAT{18}

<HDM>

R269 PIHM@0_4

+3V

R268 OEHM@0_4

HDMI_DDCCLK{8} HDMI_DDCDATA{8}

HDMI_DDCCLK

EV_HDMI_DDCCLK

+3V_HDMI

R271 PIHM@0_4

R270 OEHM@0_4

5

R259 N4K@2.2K_4

+3V_HDMI

D5 HM@RB500V-40_100MA

R240 HM@2.2K_4

2

3

1

Q29 N4K@FDV301N_200MA

HDMI_CON_DDCCLK HDMI_CON_DDCDATAHDMI_DDCCLK_ACT HDMI_DDCDATA_ACT

4

HDMI_DDCDATA

EV_HDMI_DDCDAT

R266 PIHM@0_4

R267 OEHM@0_4

R258 N4K@2.2K_4

+3V_HDMI+5V +5V

2

3

1

Q28 N4K@FDV301N_200MA

3

D4 HM@RB500V-40_100MA

R239 HM@2.2K_4

NC(Low) 1(High)

M

1.6

2.5

Pre 0

dB dB dB

ISET

default

Pre ISET EQ CFG DDCBUF DCIN_EN

EQ CFG

12.4

HDMI ID disable

+13%

-13%

2

dB

4.3

HDMI ID enable

dB

8.6

dB

Output pre-emphasis setting TMDS output swing adjustment Receiver equalization setting Configuration pin enable active DDC buffer DC coupling enable

N/A

DDCBUF DCIN_EN

default

active DDC buffer with default threshold

active DDC buffer without internal pull up resistor

Pin 12 15 34 37

Size Document Number Rev

Date: Sheet of

default,AC coupling input

PS8401A VDDRX GND ISET VDD33

Quanta Computer Inc.

PROJECT :

HDMI CONN

1

DC coupling input

N/A

PS8201A

NC NC NC NC

BD6

1A

28 49Friday, December 28, 2012

5

<LDS>Panel backlight control <LDS>

LVDS_BRIGHT

DISPON_O

D D

CRT

<CRT>

INT_CRT_RED{8} INT_CRT_GRN{8} INT_CRT_BLU{8}

EXT_CRT_RED{19} EXT_CRT_GRN{19} EXT_CRT_BLU{19}

INT_CRT_DDCCLK{8} INT_CRT_DDCDAT{8}

INT_HSYNC{8}

C C

INT_VSYNC{8}

EV_CRTDCLK{19} EV_CRTDDAT{19}

EXT_HSYNC{19} EXT_VSYNC{19}

R636 PICRT@0_4 R634 PICRT@0_4 R632 PICRT@0_4

R635 OECRT@0_4 R633 OECRT@0_4 R631 OECRT@0_4

R223 PICRT@0_4 R222 PICRT@0_4 R221 PICRT@0_4 R220 PICRT@0_4

R637 OECRT@0_4 R638 OECRT@0_4 R639 OECRT@0_4 R640 OECRT@0_4

R7 *100K_4

CRT_R CRT_G CRT_B

DDCCLK DDCDAT HSYNC VSYNC

DISPON_O {37}

R937 PIVEDP@0_4

R64 PIVLDS@0_4

R62 OEV@0_4

R629 CRT@150/F_4

C610 CRT@6.8P/50V_4N

LVDS_BKLT_PCH {8,26}

LVDS_BRIGHT_I {26}LVDS_BRIGHT{37}

DGPU_BLON {20}

+5V_CRT

+5V

+3V

4

LCD POWER SWITCH

B2A

R628 CRT@150/F_4

C598 CRT@0.1U/16V_4Y C216 *CRT@0.1U/16V_4Y C217 CRT@0.22U/10V_4X

C24 *CRT@0.1U/16V_4Y

INT_LVDS_DIGON{8}

EV_LVDS_DIGON{20}

C609 CRT@6.8P/50V_4N

R17 EDP@0_8

+5V

R23 LDS@0_8

+3V

R630 CRT@150/F_4

CRT_R1 CRT_G1 CRT_B1

C31

OEV@1U/6.3V_4X

R11 PIVEDP@0_4

R12 OEV@0_4

R8 PIVEDP@100K_4

L35 CRT@BLM18BA470SN1D_300MA L34 CRT@BLM18BA470SN1D_300MA L33 CRT@BLM18BA470SN1D_300MA

C607 CRT@6.8P/50V_4N

U28

1

VCC_SYNC

SYNC_OUT2 SYNC_OUT1

7

VCC_DDC

8

BYP

SYNC_IN2

2

VCC_VIDEO

SYNC_IN1

3

VIDEO_1

DDC_IN1

4

VIDEO_2

DDC_IN2

5

VIDEO_3

DDC_OUT1

6

GND

DDC_OUT2

CRT@CM2009-02QR

R9 OEV@100K_4

16 14

15 13

10 11

9 12

6 4 3

C593 CRT@6.8P/50V_4N

VSYNC HSYNC

DDCCLK DDCDAT

CRTDCLK CRTDDAT

3

U2

IN IN ON/OFF

OEV@AP2821KTR-G1

B2A

C245 *CRT@10P/50V_4C

OUT GND GND

C590 CRT@6.8P/50V_4N

1 2 5

C246 *CRT@10P/50V_4C

C26 OEV@0.1U/16V_4Y

CRT_R1 CRT_G1 CRT_B1

C581 CRT@6.8P/50V_4N

DDCCLK DDCDAT

CRTDCLK CRTDDAT

C28 *OEV@0.01U/25V_4X

C243 CRT@10P/50V_4C

R210 PICRT@2.2K_4 R209 PICRT@2.2K_4

R224 CRT@2.7K_4 R208 CRT@2.7K_4

+5V

+LCDVCC

C29

*OEV@10U/6.3V_6X

2mA

CRTVSYNC

CRTHSYNC

C244 CRT@10P/50V_4C

2

B2A

D16 CRT@SS14L_1A

+3V

+5V_CRT

F2 CRT@SMD1206P110TFT

+5V_CRT1

+3VPCU

<HSR>HALL Sensor

R526 100K_4

1

C469

3

0.1U/16V_4Y

CRT_R1 CRT_G1

+5V_CRT

CRT_B1

D17 *CRT@AZ5125-01J

2

LID591#

MR1 APX9132H AI-TRG

B2A

1

10

B2A

6 7

2 8 3 9 4

5

LID591# {37}

1617

111 12 13 14 15

CN16 CRT@10256-00011

29

CRTDDAT CRTHSYNC CRTVSYNC CRTDCLK

LCD Panel Module

B B

A A

<LDS>

LVDS-Down

LVDS-Up

5

CCD

<CCD>

USB_CCD_R

CN9

LCD_TXUCLKOUT+ LCD_TXUCLKOUT-

LCD_TXUOUT2+ LCD_TXUOUT2-

LCD_TXUOUT1+ LCD_TXUOUT1-

LCD_TXUOUT0+ LCD_TXUOUT0-

LCD_TXLCLKOUT+_L

LCD_EDIDCLK_L{26}

LCD_EDIDDATA_L{26}

LCD_TXLOUT0+_L{26}

LCD_TXLOUT0-_L{26}

LCD_TXLOUT1+_L{26}

LCD_TXLOUT1-_L{26}

LCD_TXLOUT2+_L{26}

LCD_TXLOUT2-_L{26}

LCD_TXLCLKOUT+_L{26}

LCD_TXLCLKOUT-_L{26}

LCD_TXUOUT0+{26}

LCD_TXUOUT0-{26}

LCD_TXUOUT1+{26}

LCD_TXUOUT1-{26}

LCD_TXUOUT2+{26}

LCD_TXUOUT2-{26}

LCD_TXUCLKOUT+{26}

LCD_TXUCLKOUT-{26}

LCD_EDIDCLK_L LCD_EDIDDATA_L

LCD_TXLOUT0+_L LCD_TXLOUT0-_L

LCD_TXLOUT1+_L LCD_TXLOUT1-_L

LCD_TXLOUT2+_L LCD_TXLOUT2-_L

LCD_TXLCLKOUT+_L LCD_TXLCLKOUT-_L

LCD_TXUOUT0+ LCD_TXUOUT0-

LCD_TXUOUT1+ LCD_TXUOUT1-

LCD_TXUOUT2+ LCD_TXUOUT2-

LCD_TXUCLKOUT+ LCD_TXUCLKOUT-

INT_DMIC_CLK{34} INT_DMIC_DATA{34}

+3V

EV_LVDS_BRIGHT{20}

INT_LVDS_PWM{26}

EDP_PHD_R

R3 LDS@0_6 R2 EDP@0_6

R290 OEV@0_4 R308 PIVLDS@0_4

LCD_TXLCLKOUT-_L LCD_TXLOUT2+_L

LCD_TXLOUT2-_L LCD_TXLOUT1+_L

LCD_TXLOUT1-_L LCD_TXLOUT0+_L

LCD_TXLOUT0-_L USB_CCD_R

USB_CCD#_R LCD_EDIDDATA_L LCD_EDIDCLK_L

R6 1.2K/F_4 L27 FCM1005KF-221T03_300MA

L26 FCM1005KF-221T03_300MA

+LCDVCC

VIN

+LCDVCC

LVDS_VADJ

DISPON_O_RDISPON_O LVDS_VADJ

+CCD_POWER

G_5

40 39 38 37 36 35 34 33 32

G_4

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

G_1 9 8 7 6 5 4 3 2 1

G_0

7300L40-000000-G4

USB_CCD#_R

F1 LITTLE-0603-2A-32V

+3V

0.15A

LCD_EDIDCLK_L LCD_EDIDDATA_L

C471

*2200P/50V_4X

EDP HPD

<EDP>

EDP_PHD_R{26}

EDP_PHD_R

R16 100K_4

B2A

EDP PU/PD SMBus

+3V

R539 *OEVEDP@100K_4

B2A

R25 OEVEDP@100K_4

4

3

2

R531 0_4 R529 0_4

12

Check

C472

*2200P/50V_4X

C23 *10U/6.3V_6X

+

+VCCIO_OUT

R24 PIV@10K_4 R28 PIV@0_4

3

Q4 PIV@2N7002K_300MA

2

1

R32 OEVEDP@0_4

+CCD_POWER

+

C470 *10U/25V_1206X

B2A

+3VVIN

R527 PIVLDS@2.2K_4

+3V

R536 OEVEDP@100K_4

LCD_TXUOUT0+ LCD_TXUOUT0-

R22 *OEVEDP@100K_4

B2A

R528 PIVLDS@2.2K_4

Size Document Number Rev

LCD/CRT/CCD

Date: Sheet of

USB_CCD {10} USB_CCD# {10}

DISPON_O_R

EV_EDP_HPD {18}

D1 LCP0G050M0R2R

LCD_EDIDCLK_L LCD_EDIDDATA_L

BD6

29 49Thursday, December 20, 2012

C25 *47P/50V_4N

INT_EDP_HPD {5}

Quanta Computer Inc.

PROJECT :

1

1A

5

<MNW>MINI Card Slot#1(WiFi / Wimax / Combo)

+WIMAX_P +WIMAX_P

R549

BT_DISABLE#_INTEL

BT_DISABLE#_OTHER

10K_4

PCIE_CLK_WLAN_REQ#_R

PCLK_DEBUG{10}

B2A

PLTRST# PLTRST#_debug

PLTRST#{3,8,35,36,37,38}

+WIMAX_P +WIMAX_P

3

Q41 AOAC@ME2N7002E_200MA

R533 *AOAC@0_4

D D

PCIE_CLK_WLAN_REQ#{10}

+WIMAX_P

C C

BT_RFCTRL{37}

BT_RFCTRL_BT

2

1 3

3

Q42 ME2N7002E_200MA

R543 *0_4

R579 10K_4

R580 0_4 R942 *0_4

Q45 LTC044EUBFS8TL_30MA

2

1

PCIE_WAKE#{8,35}

R571 NMP@0_4 R568 NMP@0_4

2

1

4

0.5A 2.75A

C492

PCIE_TXP_WLAN{10} PCIE_TXN_WLAN#{10}

PCIE_RXP_WLAN{10} PCIE_RXN_WLAN#{10}

CLK_PCIE_WLAN{10} CLK_PCIE_WLAN#{10}

B2A

C485 *47P/50V_4N

BT_DISABLE#_INTEL

PCLK__debug_R

PCIE_CLK_WLAN_REQ#_R BT_DISABLE#_OTHER

PCIE_WAKE#_MINI

R532 AOAC@10K_4

PCIE_WAKE#_MINI

*0.01U/25V_4X

CN10

51

NC

49

C-Link_RST

47

C-Link_DAT

45

C-Link_CLK

43

GND

41

NC

39

NC

37

GND

35

GND

33

PETp0

31

PETn0

29

GND

27

GND

25

PERp0

23

PERn0

21

GND

19

NC

17

NC

15

GND

13

REFCLK+

11

REFCLK-

9

GND

7

CLKREQ#

5

BT_CHCLK

3

BT_DATA

1

WAKE#

AAA-PCI-052-P01

C499 *0.1U/16V_4Y

LED_WPAN#

W_DISABLE#

+3.3V +1.5V

LED_WLAN#

USB_D+

USB_D-

SMB_DATA

SMB_CLK

+1.5V

+3.3Vaux

PERST#

+1.5V +3.3V

GND

NC NC

GND

NC NC NC NC NC

GND

C497

*10U/6.3V_6X

52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18

16 14 12 10 8 6 4 2

3

+1.5V +WIMAX_P

LFRAME#_PCIE LAD3_PCIE LAD2_PCIE LAD1_PCIE LAD0_PCIE

PLTRST# RF_EN

C483

0.1U/16V_4Y

C495

0.1U/16V_4Y

SDATA_WLAN SCLK_WLAN

R541 NMP@0_4 R540 NMP@0_4 R537 NMP@0_4 R535 NMP@0_4 R534 NMP@0_4

C491

0.1U/16V_4Y

USB_WLAN {10} USB_WLAN# {10}

RF_EN {37}

LFRAME# {9,37} LAD3 {9,37} LAD2 {9,37} LAD1 {9,37} LAD0 {9,37}

C494

*10U/6.3V_6X

2

AOAC

<MNW>

+3V +WIMAX_P

+3V_S5

C506 *47P/50V_4N

AOAC@0.01U/25V_4X

SMBus(DDR3/WLAN/3G)

SDATA{9,25}

SMB_RUN_DAT{9,14,15,38}

SCLK{9,25}

SMB_RUN_CLK{9,14,15,38}

R556 NAOAC@0_8

R561 NAOAC@0_8

C509

Q8A AOAC@2N7002KDW_115MA

R76 NAOAC@0_4

B2A

Q8B AOAC@2N7002KDW_115MA R77 NAOAC@0_4

B2A

3

1

Q44 AOAC@ME1303_3A

2

*AOAC@0.01U/25V_4X

+WIMAX_P

2

1

6

+WIMAX_P

5

3 4

C507

R585 AOAC@3.01K/F_4

R75 AOAC@4.7K_4

1

R69 AOAC@4.7K_4

+3V_S5

R584 AOAC@4.7K_4

Q46

AOAC@LTC044EUBFS8TL_30MA

1 3

SDATA_WLAN

SCLK_WLAN

2

30

WMAX_P {37}

B2A

B B

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

MINI CARD(WLAN)

1

BD5

1A

30 49Thursday, December 20, 2012

5

USB CONNECT RIGHT1

USB30_RXN1_R{10}

USB30_RXP1_R{10}

USB30_TXN1_R{10} USB30_TXP1_R{10}

USB20#_R1{ 10} USB20_R1{10 }

+5V_S5 +3V_S5

from PCH

D D

from PCH

USB20#_R1 USB20_R1

USB30_RXN1_R USB30_RXP1_R

USB30_TXN1_R USB30_TXP1_R

USB_BUS_SW4{37}

USB_BUS_SW3{37}

USB_BUS_SW2{37}

B2A

R822 *S&C@10K_4

SC_SCL

+5V_S5

R811

C C

USB CONNECT Right2

from PCH

B B

*S&C@10K_4

SC_SDA

<U3B>

from PCH

USB CONNECT Left1/Left2

A A

USB_Normal_EN#

126

Q56A *S&C @2N7002KDW_1 15MA

+3V_S5

B2A

5

3 4

Q56B *S&C @2N7002KDW_1 15MA

<U2B>

+3V_S5

R586 10K_4

from PCH

USB 2.0(L2)-Up port2

from PCH

USB 2.0(L1)-Down port9

5

3ND_MBCLK {20 ,37}

3ND_MBDATA {20,3 7}

2012 Chief River/Brazos

2013 Shark bay / Kabini

USB20#_R2{ 10} USB20_R2{10 }

USB30_RXN2_R{10}

USB30_RXP2_R{10 }

USB30_TXN2_R{1 0} USB30_TXP2_R{10}

USB20_L1{10} USB20#_L1{10}

USB20_L2{10}

USB20#_L2{10}

USB_Normal_OC#_L{ 10,37}

4

R5

R1 R2 R6

R7

USB_BUS_SW3

R8

SC_SDA

14566 14600

14617(with CB2)

14617(no CB2)

14641/14642/14644 VV

14640 V V

14600

SW3SW2

CB0 CB10Status

0 0 1 1 0 1

SW2 SW3

0

1

142

RN15 E@MCM2012B900GBE

142

RN14 E@MCM2012B900GBE

Auto mode Force dedicated charger mode Pass-Through(USB) mode pass-through(USB) with CDP

1

Emulation

14641

CB0CB1

Status 2A Auto mode for Apple device

0

Force 1A for Apple device

01

Pass-Through(USB) mode

10

pass-through(USB) with CDP

1

Emulation

142

RN13 U3_2@MCM2012B900GBE

3

C335 U3 _2@0.1U/10V_4X C337 U3 _2@0.1U/10V_4X

3

C3A

4

+5V_S5

C670

0.1U/16V_4Y

R831 *S&C@0 _4

R830 *S&C@0 _4

R832 *S&C@0 _4

R834 S&C@0 _4

R833 *S&C@0 _4

R837 *S&C@0 _4

USB20P_L1 USB20N_L1

USB20P_L2 USB20N_L2

USB_Normal_OC#_L USB_Normal_EN#

U32

5

1 8

9

R1 R2 R3 R4 R5 R6 R7 R8 R9

V V

C3A

USB30_TX2-_C1 USB30_TX2+_C1

TDP

VCC

TDM

CEN# / INT CB0 / SDA

DP DM

CB1 / SCL

GND

S&C@MAX14641ETA+T

V

V V

+5VSUS_USBP1 USB20N_CONN_R 2 USB20P_CONN_R2 +5VSUS_USBP1

+5V_S5

CN12

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

88511-200N

6

USB20_R1

7

USB20#_R1

3 2

R852 *S&C@0_4

4

R3

R851 S&C@0_4

R9

R845 *S&C@0_4

R4

R850 *S&C@0_4

V V V

Charger , AM Charger , FM USB , PM USB , CM

Charger , AM2 Charger , AP1 USB , PM USB , CM

CN18

1

VBUS

1

2

D-

2

3

D+

3

4

GND

5

SSRX-

5

6

SSRX+

7

GND

8

SSTX-

9

SSTX+

9

11111010131312

12

3

R389 N S&C@0_4 R381 N S&C@0_4

SW2 SW3

U3_2@C19066-90 905-L

B2A

3

2

+3V_S5

+5V_S5

R432

USB20P_CONN_R USB20N_CONN_R

USB_SC_EN#

USB20N_CONN_R USB20P_CONN_R

USB30_RXN1_R USB30_RXP1_R

USB30_TXN1_R USB30_TXP1_R

USB_Normal_EN#

USB_SC_EN#{37}

USB_BUS_SW2

SC_SCL

14644

CB0CB1

Status

0

1

X

1

2A Auto mode for Apple device

0

Force dedicated charger mode

01

Pass-Through(USB) mode

10

pass-through(USB) with CDP

1

Emulation

14642

CB0CB1

Status 2A Auto mode for Apple device

0

Pass-Through(USB) mode

10

pass-through(USB) with CDP

1

Emulation

USB_Normal_EN#{37}

USB_Normal_OC#_R{10,37}

USB_SC_OC#{10,37}

D6 *AZ5125-01J

+3V_S5

USB_Normal_OC#_R

C3AB2A

10K_4

R367 10K_4

1U/6.3V_4X

C410 1U/6.3V_4X

USB_SC_OC#

USB20N_CONN_R2 USB20P_CONN_R2

+5V_S5

C352

Charger , AM2 Charger , FM USB , PM USB , CM

Charger , AM2 USB , PM USB , CM

U15

2

IN1

OUT3

IN23OUT2

OUT1

4

EN#

1

GND

9

GND-C

BD82025FVJ-E2

142

RN12 U3@MCM2012B900GBE

C387 U3 @0.1U/10V_4X C389 U3 @0.1U/10V_4X

+5VSUS_USBP0

CN19

1

VBUS

1

2

D-

2

3

D+

3

4

GND

5

SSRX-

5

6

SSRX+

7

GND

8

SSTX-

9

SSTX+

9

11111010131312

12

U2_2@UARC8-4K19 86

U12

2

IN1

OUT3

IN23OUT2

OUT1

4

EN#

1

GND

9

GND-C

BD82025FVJ-E2

8 7 6

5

OC#

USB30_RXN1_R

USB30_RXN2_R

C3A

8 7 6

5

OC#

2.5A

+5VSUS_USBP0

C392

C391

*470P/50V_4X

*10U/6.3V_6X

+5VSUS_USBP0USB_BUS_SW3

3

D22

*U3@TVUFB0201AD0

2 1

D31

*U3_2@TVUFB0201AD0

2 1

2.5A

USB20N_CONN USB20P_CONN

C3A

USB30_TX1-_C1 USB30_TX1+_C1

USB20N_CONN

2 1

+5VSUS_USBP1

C339 *470P/50V_4X

USB20P_CONN

D23

*U3@TVUFB0201AD0

D30

*U3_2@TVUFB0201AD0

C353 *10U/6.3V_6X

D7 *AZ5125-01J

USB30_RXP1_R U SB30_TX1-_C1 USB30_T X1+_C1 USB20N_CONN USB20P_CONN

USB30_RXP2_R U SB30_TX2-_C1 USB30_T X2+_C1 USB20N_CONN_R2 USB2 0P_CONN_R2

1 2 3 4 5 6 7 8 9

D24

*U3@TVUFB0201AD0

2 1

D32

*U3_2@TVUFB0201AD0

2 1

C673 220U/6.3V_105CS_E18e

CN21

VBUS

1

D-

2

D+

3 4

GND SSRX-

5 6

SSRX+

7

GND

8

SSTXSSTX+

9

CN22

VBUS

1

D-

2

D+

3 4

GND SSRX-

5 6

SSRX+

7

GND

8

SSTXSSTX+

9

C666 220U/6.3V_105CS_E18e

11111010131312

12

U3@C19066-9090 5-L

11111010131312

12

*U2@UARC8-4K1986

D25

*U3@TVUFB0201AD0

2 1

D33

*U3_2@TVUFB0201AD0

2 1

ME2N7002E_200MA

1

C3A

2

2 1

2

31

R453 470/F_4

3

Q33

ME2N7002E_200MA

1

D28 *TVUFB0201AD0

D34 *TVUFB0201AD0

R361 470/F_4

3

Q32

1

D29 *TVUFB0201AD0

2 1

D35 *TVUFB0201AD0

2 1

C3A

B2A

Quanta Computer Inc.

PROJECT :

Size Do cument Number Rev

Date: Sheet of

2

Date: Sheet of

PROJECT :

USB3 S&C(R)&(Right)/USB2 (Left)

1

BD5

1A

31 49Wednesday, January 09, 2013

5

4

3

2

1

32

D D

C C

B B

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

NC

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

1

BD5

32 49Tuesday, December 18, 2012

1A

5

GND1

GND2

GND3

RSVD

<HDD>

CN20

7 6

RXP RXN

TXN TXP

3.3V

3.3V GND GND GND

5V 5V 5V

GND GND

12V 12V 12V

SATA_TXP_1ST_HDD_C

5

SATA_TXN_1ST_HDD#_C

4 3

SATA_RXN_1ST_HDD#_C

2

SATA_RXP_1ST_HDD_C

1

22 21 20 19 18 17 16 15 14 13 12 11 10 9 8

+5V_HDD1

C669 *0.1U/16V_4Y

C651 0.01U/25V_4X C653 0.01U/25V_4X

C660 0.01U/25V_4X C661 0.01U/25V_4X

C672 *10U/6.3V_6X

R858 0_8

+

C671 *100U/6.3V_3528P_E45b

SATA_TXP_1ST_HDD {9} SATA_TXN_1ST_HDD# {9}

SATA_RXN_1ST_HDD# {9}

SATA_RXP_1ST_HDD {9}

1A 1.6A

+5V

SATA HDD

23

GND

D D

24

GND

6030H-22G05

C C

4

CN15

GND14

GND15

10300-00001

GND1

GND2

GND3

GND GND

RXP

RXN

TXN TXP

DP +5V +5V

MD

<ODD>

14 1

2 3 4 5 6 7

8 9 10 11 12 13

15

SATA_TXP_ODD_C SATA_TXN_ODD#_C

SATA_RXN_ODD#_C SATA_RXP_ODD_C

+5V_ODD

SATA ODD

B2A

3

C546 0.01U/25V_4X C547 0.01U/25V_4X

C550 0.01U/25V_4X C562 0.01U/25V_4X

ODD_PRSNT# {11}

ODD_MD# {8}

SATA_TXP_ODD {9} SATA_TXN_ODD# {9}

SATA_RXN_ODD# {9} SATA_RXP_ODD {9}

C221 ZRP@0.1U/16V_4Y

C222 *10U/6.3V_6X

+

C253 *100U/6.3V_3528P_E45b

+5V_ODD

2

+5V

C252 ZRP@0.01U/25V_4X

L8 ZRP-N@0_1206

3

1

Q22

2

ZRP@ME1303_3A

+5V_ODD

C240 *ZRP@0.01U/25V_4X

+5V_ODD

R197 ZRP@22_8

3

2

Q25 ZRP@ME2N7002E_200MA

1

<OZP>ODD Zero power . (Only for Intel)

R227 ZRP@3.01K/F_4

1

+5V

R228 ZRP@4.7K_4

Q27

1 3

ZRP@LTC044EUBFS8TL_30MA

33

2

PCH_ODD_EN {11}

B B

A A

Quanta Computer Inc.

PROJECT :

HDD/ODD

PROJECT :

1

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

BD5

1A

33 49Thursday, December 20, 2012

5

ACZ_RST#_AUDIO{9}

BIT_CLK_AUDIO{9} ACZ_SYNC_AUDIO{9} ACZ_SDIN0_AUDIO{9}

ACZ_SDOUT_AUDIO{9}

AMP_MUTE#{37}

INT_DMIC_DATA{29}

INT_DMIC_CLK{29}

GND

<ADO>

+3V

+3V_S5

GND

PCBEEP{9}

C432 *0.47U/6.3V_4X C430 *0.47U/6.3V_4X C457 *10P/50V_4C C447 *10P/50V_4C C446 *10P/50V_4C

R895 0_6

R523 0_6

R514 0_6

C453 *0.1U/16V_4Y

R510 0_4 R513 33_4

C460 0.1U/16V_4Y

R488 33_4

DMIC_CLK INT_DMIC_DATA ACZ_RST#_AUDIO BIT_CLK_AUDIO ACZ_SDOUT_AUDIO

C437

C439

0.1U/16V_4Y

1U/6.3V_4X

ADOGND

1.2mA(20mils)

C435

C685

*4.7U/6.3V_6X

0.1U/16V_4Y

GND

C463 1U/6.3V_4X

GND

0.061mA(15mils)

C452

C449

*10U/6.3V_8X

0.1U/16V_4Y

GND

48.7mA(20mils) 1A(100mils)

C686

C688

0.1U/16V_4Y

*10U/6.3V_8X

GND

C440

C441

4.7U/6.3V_6X

0.1U/16V_4Y

GND

ACZ_BITCLK_RR SDATA_IN

AMP_MUTE# PCBEEP_C

INT_DMIC_DATA DMIC_CLK

+FILT_1.65V

+3AVDD

C436 *0.1U/16V_4Y

+3V_VDDIO

+3AVDD_S5

+3AVDD

+FILT_1.8V

U17

9

RESET#

5

BIT_CLK

8

SYNC

6

SDATA_IN

4

SDATA_OUT

39

SPKR_MUTE#

10

PCBEEP

1

DMIC_DAT/GPIO1

40

DMIC_CLK/MUSIC_REQ/GPIO0

37

TP61 TP62

GPIO1/PORTC_R_MIC

36

MUSIC_REQ/GPIO0/PORTC_L_MIC

CX20756-11Z

Codec (CX20756-11Z)

D D

C C

B B

4

+AVDD_3.3

ADOGND

+5AVDD

GND

+CLASSD_5V

C465

0.1U/16V_4Y

2

3

7

18

VDD_IO

DVDD33

VDDO33

FILT_1.8V

LEFT+

LEFT-14RIGHT-

12

13

24

AVDD_HP

16

27

28

29

AVDD_5V

LPWR_5.0

RPWR_5.0

FILT_1.65V

AVDD_3.3V

JSENSE MICBIASC MICBIASB

PORTB_R_LINE

PORTB_L_LINE

PORTD_B_MIC PORTD_A_MIC

PORTA_R

PORTA_L

RIGHT+

15

17

GND

11

CLASS-D_REF

38

SENSE_A

35 34

33

MIC1-RR MIC1_R1

32 26

R509 0_4

HGNDB

25

R512 0_4

HGNDA

31 30

23 22

21

AVEE

20

FLY_N

19

FLY_P

EP_GND

41

C422 0.1U/16V_4Y C458 0.1U/16V_4Y C459 *0.1U/16V_4Y C400 *0.1U/16V_4Y

GND

SPK_R+ SPK_RSPK_LSPK_L+

C444

C442

0.1U/16V_4Y

2.2U/6.3V_4X

B2A

C684

C683

0.1U/16V_4Y

*10U/6.3V_8X

(40mils)

C462

0.1U/16V_4Y

R493

5.11K/F_4

R494 39.2K/F_4 R495 20K/F_4

R491 0_4

R489 100/F_6 R490 100/F_6

ADOGND

C467

4.7U/6.3V_6X

C461

0.1U/16V_4Y

+3AVDD

TP63

+MIC1-VREFO_B +MIC1-VREFO

TP65 TP69

C456 1U/6.3V_4X

ADOGND

R894 0_6

R522 0_1206

C466

4.7U/6.3V_6X

Port_A# Port_B#

MIC1_L1MIC1-LL

HPOUT-R HPOUT-L

C450 *0.1U/16V_4Y

GND

3

C451

2.2U/6.3V_4X

MIC1-RR MIC1-LL

B2A

+5V

C433 *0.47U/6.3V_4X C434 *0.47U/6.3V_4X

2

External MIC

+MIC1-VREFO

MIC1_L1 MIC1_L3

C418 1U/10V_6X

C415 1U/10V_6X

MIC1_L3 MIC1_R3

D36 *TVUFB0201AD0

2 1

Headphone

R511 5.1/F_6

HPOUT-L HPOUT-L3

R508 5.1/F_6

HPOUT-L3 HPOUT-R3

D38 *TVUFB0201AD0

2 1

<ADO>

R892

2.2K_4

MIC1_L2

MIC1_R2

2 1

<ADO>

HPOUT-L2

HPOUT-R2

2 1

D37 *TVUFB0201AD0

D39 *TVUFB0201AD0

R893

2.2K_4

L23 HCB1608KF-121T20_2A

L22 HCB1608KF-121T20_2A

C409

100P/50V_4N

B2A

L25 HCB1608KF-121T20_2A

L24 HCB1608KF-121T20_2A

C443 *100P/50V_4N

C425

100P/50V_4N

C454 *100P/50V_4N

C428

*0.1U/16V_4Y

Port_A#

C427 *0.1U/16V_4Y

Port_B# MIC1_R3MIC1_R1

MIC1_L3 MIC1_R3

HPOUT-R3HPOUT-R

HPOUT-L3 HPOUT-R3

1

CN6

3 1

5 6 2 4

2SJ3061-003111F

Normal Open Jack

ADOGND

C424 *0.1U/10V_4X C413 *0.1U/10V_4X

CN7

3 1

5 6 2 4

2SJ3061-003111F

Normal Open Jack

ADOGND

C448 *0.1U/10V_4X C438 *0.1U/10V_4X

34

7

Shield_GND

7

Shield_GND

B2A

Internal Speaker

Box_Vendor{11}

GND

INSPKL-N INSPKL+N INSPKR-N INSPKR+N

D40 *TVUFB0201AD0

2 1

<ADO>

D41 *TVUFB0201AD0

2 1

R123 BLM18PG471SN1D_1A R122 BLM18PG471SN1D_1A R121 BLM18PG471SN1D_1A R120 BLM18PG471SN1D_1A

INSPKL-N INSPKL+N INSPKR-N INSPKR+N

D42 *TVUFB0201AD0

2 1

C113 E@1000P/50V_4X

2 1

C112 E@1000P/50V_4X

D43 *TVUFB0201AD0

INSPKR+NSPK_R+ INSPKR-NSPK_RINSPKL-NSPK_LINSPKL+NSPK_L+

C110 E@1000P/50V_4X

CN3

7 1 2 3 4 5 6

8

50281-0060N-001

C111 E@1000P/50V_4X

B2A

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

Audio Codec (CX20671)

1

BD5

A1A

34 49Thursday, December 20, 2012

5

Atheros Lan

<LAN>

L1

AVDDVCO AVDDL DVDDL

L31 LAN@HCB1608KF-601T10_1A

D D

+3V_S5 +LAN_VDD33

R115 *LAN@0_6

3

1

C125 LAN@0.01U/25V_4X

C C

PCIE_WAKE#{8,30}

B B

PCIE_CLK_LAN_REQ#{10}

A A

Q10

2

LAN@ME1303_3A

C105 *LAN@0.01U/25V_4X

2

6

Q26A LAN@2N7002KDW_115MA

R218 *LAN@0_4

+LAN_VDD33 +LAN_VDD33

5

3 4

Q26B LAN@2N7002KDW_115MA

R204 *LAN@0_4

5

R116 LAN@3.01K/F_4

1

L30 LAN@HCB1608KF-601T10_1A

Switch mode

LDO mode

+3V_S5

+LAN_VDD33+LAN_VDD33

R219 LAN@10K_4

PCIE_LAN_WAKE#

R203 LAN@4.7K_4

CKREQ_G#

L1

Mount NC

R119

LAN@4.7K_4

2

Q11

LAN@LTC044EUBFS8TL_30MA

13

T

T R

R

R A

A

A N

N

N S

S

LAN@0.1U/16V_4YC151

F

LAN@0.1U/16V_4YC145

O

O R

R

61LAN@0.1U/16V_4YC139

M

61LAN@0.1U/16V_4YC138

E

E R

R

AVDD_CEN_T TX0P X-TX0P TX0N X-TX0N

AVDD_CEN_T TX1P X-TX1P TX1N X-TX1N

AVDD_CEN_T TX2N X-TX2N AVDD_CEN_T

TX3P

TERM1 TERM2 TERM3 TERM4

D44 *GDT_BS401N

2 1

LAN_P {37}

B2A

4

+LAN_VDD33

C567 LAN@0.1U/16V_4Y

C578 LAN@1U/6.3V_4X

MCT1 MX1+

MCT2 MX2+

MCT3 MX3+

MCT4 MX4+

1 2 3

4 5 6

7 8 9

10 11 12

24 23 22

MX1-

21 20 19

MX2-

18 17 16

MX3-

15 14 13

MX4-

2 1

AVDD_CEN_T TX0P TX0N

AVDD_CEN_T TX1P TX1N

AVDD_CEN_T TX2P TX2N

AVDD_CEN_T TX3P TX3N

U25

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+

6

TD2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

62LAN@TST1284ALF

D45 *GDT_BS401N

2 1

Quanta P/N : CYBS401N201

4

C589 LAN@10U/6.3V_6X

U26

TCT1

MCT1

TD1+

MX1+

TD1-

MX1-

TCT2

MCT2

TD2+

MX2+

TD2-

MX2-

TCT3

MCT3

TD3+

MX3+

TD3-

MX3-

TCT4

MCT4

TD4+

MX4+

TD4-

MX4-

61LAN@GST5009BLF

TERM1

TERM2

TERM3

X-TX2PTX2P

TERM4

X-TX3P X-TX3NTX3N

D46 *GDT_BS401N

3

LDO mode

1 2 3 4 5 6 7 8 9

10

C146 LAN@0.01U/100V_6X

R137 LAN@75/F_8

L2,C1,C2,C3

Mount

NC

41

U6

GND

GND142GND243GND344GND445GND546GND647GND748GND849GND9

VDD33 PERSTn WAKEn CLKREQn DEBUGMODE[0] AVDDL_REG XTLO XTLI AVDDH_REG RBIAS

61_62LAN@AR8161-A

C150 LAN@0.01U/100V_6X

TERM1_C

R138 LAN@75/F_8

X-TX0P X-TX0N

X-TX1P X-TX1N

X-TX2P X-TX2N

X-TX3P X-TX3N

50

Switch mode

LAN@15P/50V_4CC195

LAN@15P/50V_4CC179

C119 *LAN@10U/6.3V_6X

23

4 1

0.163A(20mils)

C131 *LAN@1000P/50V_4X

PLTRST#{3,8,30,36,37,38}

+LAN_VDD33

Y1 LAN@25MHZ_30

+LAN_VDD33

C132 LAN@1U/6.3V_4X

R181 LAN@30K/F_4

C568

C178

LAN@1U/6.3V_4X

LAN@0.1U/16V_4Y

C579 LAN@0.1U/16V_4Y

PCIE_LAN_WAKE# CKREQ_G#

AVDDL

LAN_XTLO LAN_XTLI

AVDDH

RBIAS

R157 LAN@2.37K/F_4

B2A

24

TERM1

23 22

21

TERM2

20 19

18

TERM3

17 16

15

TERM4

14 13

C134 LAN@0.01U/100V_6X

TERM4_C TERM3_C

R130 61LAN@75/F_8

TERM9

C107 61LAN@10P/3KV_1808N

D47 *GDT_BS401N

2 1

R126 62LAN@0_8

TX0P TX0N TX1P TX1N

TX2P TX2N TX3P TX3N

C140 LAN@0.01U/100V_6X

R131 61LAN@75/F_8

*E@6.8P/50V_4NC548 *E@6.8P/50V_4NC549 *E@6.8P/50V_4NC536 *E@6.8P/50V_4NC537

*E@6.8P/50V_4NC530 *E@6.8P/50V_4NC529 *E@6.8P/50V_4NC521 *E@6.8P/50V_4NC520

R136 62LAN@0_8

TERM9

C108 62LAN@220P/3KV_1808X

TERM2_C

B2A

3

2

LX DVDDL

L6 LAN@4.7uh_C_1A

L2 C1 C2 C3

LAN_LED1# LAN_LED0#

C583 LAN@1U/6.3V_4X

DVDDL

AVDDVCO

AVDDL

40

38

37

36

35

34

33

32

31

LX

LED139LED0

RX_P

RX_N

AVDDL

REFCLK_P

REFCLK_N

DVDDL_REG

Atheros

AR8161/8162

TRXP011TRXN012AVDDL13TRXP114TRXN115AVDD3316TRXP217TRXN218AVDDL19TRXP3

20

TX3P

TX1P

TX2P

TX0P

TX1N

TX2N

TX0N

AVDDL

AVDDH_C

AVDDL

U27

1

CH1

CH4

2

VDD

GND CH23CH3

*LAN@AZ1013-04S.R7G

U24

1

CH1

CH4

2

VDD

GND CH23CH3

*LAN@AZ1013-04S.R7G

6

TX1P

5 4

TX1N

6

TX3N

5 4

TX3P

TX0P

TX0N

TX2N

TX2P

2

LAN@0.1U/16V_4YC582

LAN@0.1U/16V_4YC587

+LAN_VDD33

C225 *LAN@1000P/50V_4X

TESTMODE[2] TESTMODE[1] TESTMODE[0]

AVDDH TRXN3

61LAN@0.1U/16V_4YC586

LAN@0.1U/16V_4YC564

R

R J

J

J 4

4

4 5

5

LED0 = LAN_ACTLED

LED1 = LAN_LINKLED#

LED2

C218 LAN@10U/6.3V_6X

PCIE_TXN_LAN# {10} PCIE_TXP_LAN {10}

CLK_PCIE_LAN {10}

CLK_PCIE_LAN# {10}

30

TX_P

29

TX_N

28

NC

27 26 25 24

PPS

23

LED2

22 21

<LAN>

+LAN_VDD33

1

C226 LAN@0.1U/16V_4Y

LAN@0.1U/16V_4YC584

C585 *LAN@1U/6.3V_4X

C599 *LAN@4.7U/6.3V_6X

PCIE_RXP6_C PCIE_RXN6_C

LAN_LED2#

AVDDH TX3N

C566 LAN@1U/6.3V_4X

R609 LAN@0_6

X-TX3N X-TX3P X-TX1N X-TX2N X-TX2P X-TX1P X-TX0N X-TX0P

R194 *LAN@10K_4 R193 *LAN@10K_4 R610 *LAN@10K_4

Size Document Number Rev

Date: Sheet of

LAN@0.1U/10V_4XC214

LAN@0.1U/10V_4XC213 TP37 TP36

TP35 TP34

LAN@0.1U/16V_4YC565

1

0 1

0

1 0

Atheros LAN (AR8161B/62B)

LAN@0.1U/16V_4YC176

+LAN_VDD33

CN13

8

NC4/3-

7

NC/3+

6

RX-/1-

5

NC2/2-

4

NC1/2+

3

RX+/1+

2

TX-/0-

1

TX+/0+

9

GND

10

GND

LAN@2RJ3057-008211F

R189 *LAN@10K_4

LAN_LED1# LAN_LED0#

R188 *LAN@10K_4 R174 *LAN@10K_4

LAN_LED2#

High core voltage(default=1)

Low core voltage Switch mode regulator (SWR) select

Linear regulator (LDO) select

25 MHz external clock input 48 MHz external clock input

Quanta Computer Inc.

PROJECT :

1

BD5

35

PCIE_RXP_LAN {10} PCIE_RXN_LAN# {10}

35 49Thursday, December 20, 2012

A1A

5

4

3

2

2 IN 1 Card Reader

<MMC>

1

36

EMI

R515 E@0_4

CTRL3

EMI

R471 E@0_4

B2A

+VCC_XD

D D

DATA2

R459 E@BLM15BD121SN1D_300MA R455 E@BLM15BD121SN1D_300MA

DATA1 DATA0

R456 E@BLM15BD121SN1D_300MA R457 E@BLM15BD121SN1D_300MA

CTRL0

R465 E@0_4

CTRL2 SD_CMD DATA3

R458 E@BLM15BD121SN1D_300MA

SD_D2 SD_D1 SD_D0

SD_CLK

SD_D3

SD_WPCTRL1 SD_CD#

11WP12

4

CN23

W/P(GND) DATA2 DATA1 DATA0 VSS2 CLK VSS1 CMD DATA3

PSDBT0-09GLBS1N14H1

C/D

VDD

GND4 GND3

GND113GND2

14

16 15

10

9 8 7 6 5 3 2 1

Card Reader (GL834L) <MMC>

C423

0.1U/16V_4Y

C414 0.1U/16V_4Y

C C

+3V

R477 0_8

R507 0_8

+3V_DVDD33_Card

C419

4.7U/6.3V_6X

+3V_AVDD33_Card

C429

2.2U/6.3V_4X

C416

0.1U/16V_4Y

C426

0.1U/16V_4Y

USB_CARD#{10}

USB_CARD{10}

TP66 TP64

B2A

+3V

B B

PLTRST#{3,8,30,35,37,38}

R470 0_4

Card_PLTRST#

C417 *0.1U/16V_4Y

R472 *1K_4

R473 *100K_4

+VCC_XD

+3V_DVDD33_Card

CTRL3

SD_GPIO0

+3V_DVDD33_Card

Card_PLTRST#

20

21

22

23

24

G1

25

RSTZ

PMOS

DVDD33

GL834L QFN24-3.3V

SB17SB38SB49SB510MS_BS11SB8

CTRL1

TP68

TP67

TP70

SD_CDZ

19

GPIO0

DVDD33

12

DATA1

VDD18

SB13 SB12

SD_CMD

SD_CLK

SB9

GL834L-OGY03

18

+1.8V_Card

17

DATA2

16

DATA3

15 14 13

SD_GPIO0

CTRL2 CTRL0 DATA0

SB0

SD_D7

SB1

SD_D6

SB3

SD_D5

SB4

SD_D4

SB5

SD_WP

SB8

SD_D1

SB9

SD_D0

SB12

SD_D3

SB13

SD_D2

R478 *10K_4

C421 1U/6.3V_4X

U16

1

DVDD33

2

DM

3

DP

4

AVDD33

5

MS_INS

6

SB0

B2A

R478

NC

Power Saving Mode (default)

10K Normal Mode

SD_D0 SD_D1 SD_D2 SD_D3

C403 E@4.7P/50V_4C

SD_CLK +VCC_XD

B2A

C402 E@12P/50V_4C

C401 E@12P/50V_4C

C406

4.7U/6.3V_6X

C405 E@12P/50V_4C

C399

0.1U/16V_4Y

C404 E@12P/50V_4C

B2A

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

Card Reader(GL834L)

1

BD5

A1A

36 49Thursday, January 03, 2013

5

EC

<KBC>

+3VPCU

R111

2.2_6

35mA

C79

C64

10U/6.3V_6X

D D

C C

B B

0.1U/16V_4Y

LFRAME#{9,30}

LAD0{9,30} LAD1{9,30} LAD2{9,30} LAD3{9,30}

PCLK_591{10}

CLKRUN#{8} GATEA20{11}

RCIN#{11}

SCI#{10}

GPIO27{8,11}

PLTRST#{3,8,30,35,36,38}

USB_Normal_EN#{31}

SERIRQ{9}

USB_Normal_OC#_R{10,31}

MX0{38} MX1{38} MX2{38} MX3{38} MX4{38} MX5{38} MX6{38} MX7{38}

MY0{38} MY1{38} MY2{38} MY3{38} MY4{38} MY5{38} MY6{38} MY7{38} MY8{38} MY9{38} MY10{38} MY11{38} MY12{38} MY13{38} MY14{38} MY15{38} MY16{38} MY17{38}

MBCLK{40}

MBDATA{40}

2ND_MBCLK{9,26}

2ND_MBDATA{9,26} 3ND_MBDATA{20,31}

TPCLK{38}

TPDATA{38}

AC_PRESENT{8}

USB_SC_EN#{31}

SUSCLK{8,9}

EC_PECI{3}

PCLK_591 +1.05V

R86 *22_4

C60 *10P/50V_4C

C37

0.1U/16V_4Y

R98 *DS3@0_4

MBCLK MBDATA 2ND_MBCLK 2ND_MBDATA 3ND_MBCLK 3ND_MBDATA

TPCLK TPDATA

R72 43_4

C54 *0.1U/16V_4Y

+A3VPCU_R

C55

0.1U/16V_4Y

B2A

+1.05V

C48

0.1U/16V_4Y

B2A

C740 *47P/50V_4N

R104 HCB1608KF-181T15_1.5A

C45 *0.1U/16V_4Y

126 127 128

CLKRUN#

121 122

29

SCI#_uR

124

123 125

54 55 56 57 58 59 60 61

53 52 51 50 49 48 47 43 42 41 40 39 38 37 36 35 34 33

70 69 67

68 119 120

72

71

10

11

77

12

EC_PECR_R

13

EC_PECR_R

B2A

19

46

76

88

115

U4

VCC1

VCC2

VCC3

VCC4

VCC5

3

LFRAME/GPIOF6 LAD0/GPIOF1 LAD1/GPIOF2 LAD2/GPIOF3

1

LAD3/GPIOF4

2

LCLK/GPIOF5

8

GPIO11/CLKRUN GPIO85/GA20 KBRST/GPIO86 ECSCI/GPIO54

GPIO10/LPCPD

7

LREST/GPIOF7 GPIO67/N2TMS SERIRQ/GPIOF0

9

GPIO65/SMI

KBSIN0/GPIOA0/N2TCK KBSIN1/GPIOA1/N2TMS KBSIN2/GPIOA2 KBSIN3/GPIOA3 KBSIN4/GPIOA4 KBSIN5/GPIOA5 KBSIN6/GPIOA6 KBSIN7/GPIOA7

KBSOUT0/GPIOB0/SOUT_CR/JENK KBSOUT1/GPIOB1/TCK KBSOUT2/GPIOB2/TMS KBSOUT3/GPIOB3/TDI KBSOUT4/GPIOB4/JENO KBSOUT5/GPIOB5/TDO KBSOUT6/GPIOB6/RDY KBSOUT7/GPIOB7 KBSOUT8/GPIOC0 KBSOUT9/GPIOC1/SDP_VIS KBSOUT10&P80_CLK/GPIOC2 KBSOUT11&P80_DAT/GPIOC3 KBSOUT12/GPO64/TEST KBSOUT13/GPIO63/TRIST KBSOUT14/GPIO62/XORTR KBSOUT15/GPIO61/XOR_OUT GPIO60/KBSOUT16 GPIO57/KBSOUT17

GPIO17/SCL1/N2TCK GPIO22/SDA1/N2TMS GPIO73/SCL2/N2TCK GPIO74/SDA2/N2TMS GPIO23/SCL3/N2TCK GPIO31/SDA3/N2TMS

GPIO37/PSCLK1 GPIO35/PSDAT1 GPIO26/PSCLK2 GPIO27PSDAT2

GPIO00/EXTCLK/F_SDIO3

VTT PECI

NPCE985LA0DX

<KBC>Power Button

C56 *0.1U/16V_4Y

DNBSWON#

A A

NBSWON#_R

C59 *0.1U/16V_4Y

5

102

AVCC

LPC

SMB

PS/2

GND1

GND2

GND3

5

18

45

78

L3 *short_6

8769AGND

4

+A3VPCU

C62

0.1U/16V_4Y

8769AGND

H=1.6mm

A/D

D/A

GPIO

GPO82/IOX_LDSH/VD_OUT1

GPO84/IOX_SCLK/VD_OUT2

KB

TIMER

GPIO20/TA2/IOX_DIN_DIO

TIMER

IR

FIU

GPIO55/CLKOUT/IOX_DIN_DIO

GND4

GND5

AGND

GND6

89

103

116

4

C68 10U/6.3V_6X

GPIO90/AD0 GPIO91/AD1 GPIO92/AD2 GPIO93/AD3 GPIO05/AD4 GPIO04/AD5 GPIO03/AD6

GPIO07/AD7/VD_IN2

GPIO94/DA0 GPIO95/DA1 GPIO96/DA2

GPIO24

GPIO01/TB2

GPIO02/SPI_CS

GPIO06/IOX_DOUT

GPIO16

GPIO30/F_WP

GPIO36

GPIO41/F_WP

GPIO42/TCK

GPIO43/TMS

GPIO44/TDI

GPO47/SCL4/N2TCK

GPIO50/PSCLK3/TDO

GPIO51/N2TCK GPIO52/PSDAT3/RDY GPIO53/SDA4/N2TMS

GPIO70 GPIO71

GPIO72 GPIO75/SPI_SCK GPO76/SPI_MOSI

GPIO77/SPI_MISO

GPIO81/FW_P/F_SDIO2

GPIO97/DA3

GPIO56/TA1 GPIO14/TB1

GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM GPIO32/D_PWM GPIO45/E_PWM

GPIO40/F_PWM/1_WIRE

GPIO66/G_PWM

GPO33/H_PWM/VD1_EN

GPIO34

GPIO87/SIN_CR

GPIO46/TRST

GPIO83/SOUT_CR

F_SDI&F_SDIO1

F_SDIO&F_SDIO0

F_CS0 F_SCK

EST_RST

GPIO80/VD_IN1

VCORF

44

VCORF_uR

C38 1U/6.3V_4X

4

VDD

+3V_VDD_EC

C57

0.1U/16V_4Y

97 98 99 100 108 96 95 94

101 105 106

6 64 79 93 114 109 15 80 17 20 21 24 25 26 27 28 73 74 75 82 83 84 91 110 112 107

31 117 63

32 118 62 65 22 16 81 66

14

113 23 111

86 87 90 92

30 85 104

C58 10U/6.3V_6X

ICMNT AC SET_EC

SKU_STRAP_4

NBSWON#_R

SKU_STRAP_2

PWRLED# SKU_STRAP_3

H_PROCHOT_EC

HWPG

RF_EN DNBSWON#

EC_PXSTATE

SKU_STRAP_1

RF_LED# SUSLED_EC# BAT_SAT0# BAT_SAT1#

SPI_SDI_uR SPI_SDO_uR SPI_CS0#_uR SPI_SCK_uR

VCC_POR#

R85 2.2_6

R99 *100K/F_4

R92 0_4

R63 1K_4

R78 *100K/F_4

R73 4.7K_4 R91 *0_4 R103 0_4

SKU_STRAP_1

SKU_STRAP_2

SKU_STRAP_3

SKU_STRAP_4

H

Shark Bay

L Chief River

+3V

1mA

+3VPCU

TEMP_MBAT {40} ICMNT {40} AC SET_EC {40}

USB_SC_OC# {10,31}

USB_BUS_SW2 {31}

SUSB# {8,40}

USB_BUS_SW3 {31}

VFAN1 {3} LAN_P {35}

DISPON_O {29} ACIN {40}

LID591# {29} GFX_MAINON {47}

VRON {44} H_PROCHOT_EC {3}

AMP_MUTE# {34} WMAX_P {30}

D/C# {40} S5_ON {3,20,41} LVDS_BRIGHT {29}

SUSC# {8} MPWROK {8,25,44} RSMRST# {8,25}

SLP_SUS# {8,12}

RF_EN {30} DNBSWON# {8}

DGPU_PWROK {11,16,22,37}

TEMP_ALERT# {11} FANSIG1 {3}

RF_LED# {39} SUSLED_EC# {39} BAT_SAT0# {39} BAT_SAT1# {39}

SUSON {42}

MAINON {27,42,43,45}

BT_RFCTRL {30}

FB_CLAMP {17,20,47}

EC_DRAMRST_CTRL {27}

SUS_PWR_ACK {8}

+3VPCU

+A3VPCUVREF_uR

R53 *10K_4

R56 *10K_4

R67 *10K_4

R68 10K_4

R70 EV@10K_4

R71 IV@10K_4

R943 10K_4

R798 *10K_4

3

R931 *0_4 R932 *0_4

R87 1.2K/F_4

R66 *10K_4

B2A

USB_Normal_OC#_L

3

+3VPCU

B2A

TEMP_MBAT

ICMNT

AC SET_EC

PWRLED# {38}

FB_CLAMP_TGL_REQ# {20}

ID {40}

NUMLED {38}

SUSACK# {8}

KB_LED {38} CAPSLED {38}

ACZ_SDOUT_R {9}3ND_MBCLK{20,31}

+3VPCU

USB_Normal_OC#_L {10,31}

C65 *10U/6.3V_6X

C66 *10U/6.3V_6X

C67 *10U/6.3V_6X

USB_BUS_SW4 {31} PCH_SLP_WLAN# {8}

NBSWON# {25,38}

B2A

MS Strap

14'' Capetown UMA

14'' Capetown DIS

17'' Aswan UMA

17'' Aswan DIS

SKU_STRAP_1

B2A

Capetown@/Aswan@ EV@ / IV@

SKU_STRAP_2 SKU_STRAP_3

3

Q7

2

EV@ME2N7002E_200MA

1

2

SM BUS PU/Address <KBC>

MBCLK MBDATA 2ND_MBCLK 2ND_MBDATA

3ND_MBCLK 3ND_MBDATA

1

0

VGA_PWR_LEVEL {20}

0

1

0

1

B2A

2

SMBUS

Battery(A)

1

R61 4.7K_4 R57 4.7K_4 R49 4.7K_4 R55 4.7K_4

R96 4.7K_4 R97 4.7K_4

+3VPCU

TP <KBC>

R95 10K_4

SUSLED_EC# BAT_SAT0#

R34 10K_4 R46 10K_4

BAT_SAT1# PWRLED#

R93 10K_4 R919 *10K_4

Strap(795) <KBC>

SHBM

INTERNAL KEYBOARD STRIP SET <KBC>

ID EEPROM <KBC>

PCH(S5) G-sensor(S0)

2

IDROM(A)

VGA Thermal(S0) CEC(A)

3

TPCLK TPDATA

+5VPCU

<LED>LED PU/PD

2ND_MBCLK 2ND_MBDATA

MY0

RF_LED#

+5V

B2A

R35 10K_4

U5

6

SCL

5

SDA

7

WP

M24C08-WMN6TP

ADDRESS: A0H

SPI FLASH <KBC>

SPI_SDI_uR SPI_SDO_uR SPI_SCK_uR SPI_CS0#_uR

R80 10K_4

+3V_S5

HWPG circuit <KBC>

DGPU_PWROK{11,16,22,37}

HWPG_VTT{43}

HWPG_1.35V{27,42}

SYS_HWPG{8,41}

HWPG_1.5V{42}

R60 OEV@0_4

R38 *SHORT_4

R940 DS3@0_4

R54 *SHORT_4

R48 *SHORT_4

Size Document Number Rev

EC-NPCE795L

Date: Sheet of

1

AddressDevices

+3VPCU

3mA

C74

0.1U/16V_4Y

PCH_SPI_SI {9} PCH_SPI_SO {9} PCH_SPI_CLK {9} PCH_SPI_CS0# {9}

+3VPCU

BD5

+TP_PWR

R59 10K_4

R150 10K_4 R149 10K_4

R36 NAOAC@10K_4 R37 AOAC@10K_4

RF_EN

R74 10K_4

1

A0

2

A1

3

A2

8

VCC

4

GND

Quanta Computer Inc.

PROJECT :

1

37

HWPG

B2A

37 49Thursday, December 20, 2012

+5V +5V_S5

1A

5

CN1

36

K_LED_P

1

MY16

K_LED_P CAPSLED

NUMLED

MY16 {37}

MY17

MY17 {37}

MY2

MY2 {37}

MY1

MY1 {37}

MY0

MY0 {37}

MY4

MY4 {37}

MY3

MY3 {37}

MY5

MY5 {37}

MY14

MY14 {37}

MY6

MY6 {37}

MY7

MY7 {37}

MY13

MY13 {37}

MY8

MY8 {37}

MY9

MY9 {37}

MY10

MY10 {37}

MY11

MY11 {37}

MY12

MY12 {37}

MY15

MY15 {37}

MX7

MX7 {37}

MX2

MX2 {37}

MX3

MX3 {37}

MX4

MX4 {37}

MX0

MX0 {37}

MX5

MX5 {37}

MX6

MX6 {37}

MX1

MX1 {37} CAPSLED {37}

NUMLED {37}

2 3 4

B2A

35

91504-340N

5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34

+3VPCU

RP19

10

1

MX7

10KX8

9 8 7 4

2 3

MX3

56

MX7 MX2 MX3 MX4

MX0 MX5 MX6 MX1

MY7 MY13 MY12 MY15

MY3 MY5 MY14 MY6

MY2 MY1 MY0 MY4

MY17

MY16

K_LED_P

MX1 MX2 MX6 MX5 MX4 MX0

D D

C12 *220P/50V_4X C13 *220P/50V_4X C14 *220P/50V_4X C15 *220P/50V_4X

C16 *220P/50V_4X C17 *220P/50V_4X C18 *220P/50V_4X C19 *220P/50V_4X

C8 *220P/50V_4X C9 *220P/50V_4X C10 *220P/50V_4X C11 *220P/50V_4X

C4 *220P/50V_4X C5 *220P/50V_4X C6 *220P/50V_4X C7 *220P/50V_4X

C475 *220P/50V_4X C474 *220P/50V_4X C473 *220P/50V_4X C3 *220P/50V_4X

C476 *100P/50V_4N

C C

C477 *100P/50V_4N

R530 150_4

+3V

TP board <TPD>

L5 NMTP@0_6

+5V

L4 IDTP@0_6

+3V

4

+TP_PWR

C165

E@1000P/16V_4X

3

<PSW>Power board w LEDINT KeyBoard <KBC>

PWRLED#_Q

KB_LED{37}

CN4

50503-0040N-001

GPIO52{8,11}

1 2 3 4

+5V

NBSWON#{25,37}

GPIO52

<KBP>K/B LED power

C21 *KBP@220P/50V_4X

B2A

CN5

6

5

4

3

2

1

50503-0060N-001

+5V

C22 *KBP@1000P/50V_4X

3mA

B2A

TPCLK

SMB_RUN_CLK{9,14,15,30}

SMB_RUN_DAT{9,14,15,30}

C175 *E@10P/50V_4C

TPDATA{37}

TPCLK{37}

TPDATA TPCLK

SMB_RUN_CLK SMB_RUN_DAT

C174 *E@10P/50V_4C

B2A

+5V

R1 KBP@300_4

2

1

38

PWRLED#_Q

3

R102 *0_4

2

PWRLED#{37}

GPIO52

KB_LED_DET#

C2 *KBP@1U/6.3V_4X

2

1 3

PWRLED#

B2A

KBP@87060-0040N

KB_LED_ON#

Q1 KBP@MMBT2222A_600MA

Q9

ME2N7002E_200MA

1

B2A

CN2

1 2 3

6

4 5

KB_LEDKB_LED

R4 *KBP@300_4

C27 *KBP@1U/6.3V_4X

2

Q2

1 3

*KBP@MMBT2222A_600MA

C741 *KBP@680P/50V_4X

B2A

HOLE

HOLE17

*PAD

HOLE5

67 5

8

4

9

123

*EMI-PAD

HOLE16

67 5

8

4

9

123

*EMI-PAD

HOLE18

1

*PAD

1

HOLE15

B B

A A

1

*PAD

B2A

HOLE3

*PAD

1

HOLE10

1

*PAD

HOLE8

1

*PAD

5

HOLE1

67 5

8

4

9

123

*EMI-PAD

HOLE9

67 5

8

4

9

123

*EMI-PAD

HOLE13

1

*PAD

HOLE2

67 5

8

4

9

123

*EMI-PAD

HOLE12

67 5

8

4

9

123

*EMI-PAD

HOLE11

67 5

8

4

9

123

*EMI-PAD

CPU HOLEVGA HOLE

34

HOLE7

*AMD-APU-BRACKET

1 2

4

HOLE6

67 5

8

4

9

123

*EMI-PAD

HOLE14

67 5

8

4

9

123

*EMI-PAD

MINI Card NUT

1

TOUCH PANEL <TPP>

HOLE19

*PAD

B2A

3

+TPP_PWR

L41 *TPP@0_6

+5V

L42 TPP@0_6

+3V

TOUCH_RST# TOUCH_PA4

C724

TPP@0.1U/10V_4X

+TPP_PWR

CN2021

1

2

3

4

5

6

TPP@50208-00601-001

C723 TPP@4.7U/6.3V_6X

USBP3N{10}

USBP3P{10}

PLTRST#{3,8,30,35,36,37}

R923 TPP@0_4 R922 TPP@0_4

R921 *TPP@0_4 R920 *TPP@0_4

USB_Touch#_R USB_Touch_R

B2A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

PROJECT :

KB/TP/PB/HOLE

1

BD5

1A

38 49Thursday, December 20, 2012

5

4

3

LED-Power<LED><W+A>LED-Battery

2

1

39

0.05A

LED1

+5VPCU

D D

<LED>LED-WiFi

R519 NAOAC@1.2K/F_4

+5V

R520 AOAC@1.2K/F_4

+5V_S5

EMI

EMIEMI

<EMC>

C C

B B

C1 *E@0.1U/10V_4X

C130 *E@0.1U/10V_4X

2

1

12-12Z/S2ST3D-C31/2C(QN)

3

0.025A

LED3 12-21/S2C-AQ2R2B/2C

C20 *E@0.1U/10V_4X

C468 *E@0.1U/10V_4X

C538 *E@0.1U/10V_4X C33

3

C395 *E@0.1U/10V_4X

C464 *E@0.1U/10V_4X

C594 *E@0.1U/10V_4X

12

-BATLED0

R517 2.2K_4

-BATLED1

R524 1.2K/F_4

RF_LED_R

VIN +3V

C81 *E@0.1U/10V_4X

C314 *E@0.1U/10V_4X

+1.5V_GPU

C687 *E@0.1U/10V_4X

C144 *E@0.1U/10V_4X

C652 *E@0.1U/10V_4X

R521 0_4

C209 *E@0.1U/10V_4X

C445 *E@0.1U/10V_4X

*E@0.1U/10V_4X

C431 *E@0.1U/10V_4X

C191 *E@0.1U/10V_4X

C82 *E@0.1U/10V_4X

+5V+5V_S5

+1.35VSUS

C32 *E@0.1U/10V_4X

C455 *E@0.1U/10V_4X

C215 *E@0.1U/10V_4X

RF_LED# {37}

BAT_SAT0# {37}

BAT_SAT1# {37}

0.05A

LED2 12-11Z/T3D-CP2Q2B12Y/2C(QN)

+5VPCU

ESD Protect

<EMC>

2

31

FOR BATTERY LED

-BATLED1

-BATLED0

D13

*PJMBZ5V6

B2A

R525 1.2K/F_4

FOR POWER LED

1

3

2

B2A

D14

1

-SUSLED RF_LED_R

3

2

*PJMBZ5V6

SUSLED_EC#-SUSLED

FOR RF LED

D12

SUSLED_EC# {37}

1

3

2

*PJMBZ5V6

A A

Quanta Computer Inc.

PROJECT :

LED/EMI

PROJECT :

1

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

BD5

1A

39 49Thursday, December 20, 2012

5

PCN2

6

DC_JACK

5 4

3 2 1

50302-00641-001

D D

B2A

AC SET_EC{37}

PCN1

10 12

13 11

+3VPCU

1 2 3 4 5 6 7 8 9

PR76

*100K_4

ID

BAT-GND M-DATA

M-CLOCK

PR97

100/F_4

C C

BTJ-09BJAB

B B

A A

PF2

F1206HA15V024TM

1 2

PC99

E@2200P/50V_4X

PR88 *SHORT_4

MBAT+ BAT-V-1

TEMP_MBAT_C

PC94

PR90

100/F_4

47P/50V_4N

PC30

10U/6.3V_6X

PD2 TVLST2304AD0

1 2

PR75 1K_4

5

VA0

E@0.1U/25V_4X

CH1 VN CH23CH3

PC86 47P/50V_4N

MBDATA {37,40}

MBCLK {37,40}

PR38 10K/F_4

CH4

VP

PC122

PR31

82.5K/F_6

ACIN{37}

6

MBDATA

5

4

MBCLKTEMP_MBAT

F1206HA15V024TM

1 2

+3VPCU

PF1

VA1 VIN

+5V_PTC

12

+3VPCU

PR30

82.5K/F_6

*1U/6.3V_4X

PR141

100K/F_4

PR142

17.4K/F_4

SBR1045SP5-13

PR42 10K/F_4

PR37

49.9/F_6

PR34

22K/F_6

PC36

TEMP_MBAT {37}

12

PC124 E@1U/25V_6X

PD1

1SS355_100MA

ACIN

ID {37}

+3VPCU

12

PC89

0.01U/25V_4X

H_PROCHOT#{3,44}

PR89 100K_4

1K_4

PR96

PD4

1 2

3.2V

1 2

PC134

0.01U/25V_4X

12

PR147

*0_4

PQ14

2N7002K_300MA

4

3

TVS_SMAJ20A

PC43 0.1U/10V_4X

MBDATA{37,40}

MBCLK{37,40}

PC35

0.1U/25V_6X

88732AVREF

12

ICMNT

PC129

0.01U/25V_4X

3

1

4

1 2

VA2VA2

PD3

PR125

2 1

10/F_6

( Near by sense R side)

+3VPCU

DCIN

88732ACIN

PC39

2200P/50V_4X

12

PR137

PR140 *0_4

1.5M_4

12

PC128 100P/50V_4N

12

PC133 100P/50V_4N

0.01U/25V_4X

2

PC137

0.1U/10V_4X

PR148 220K/F_4

0.01_3720 PR117

R1

PR124 10/F_6

CSIP

( Near by IC side)

1

GND33GND32GND31GND

ACLIM

11

VDDSMB

9

SDA

10

SCL

13

ACOK

22

DCIN

2

ACIN

3

VREF

4

ICOMP

5

CCLIM

6

VCOMP

PR39

2.21K/F_6 PC41

12

0.01U/25V_4X

+5V_PTC

84

3

+

2

-

12

PC138

12

0.1U/25V_6X

PC26

0.1U/10V_4X

28

30

CSSP

ALERT#

7

12

PC130

0.01U/25V_4X

1

PU7A BA10393F-GE2

7

6 5

PC117

220K/F_4

CSIN

27

CSSN

PU2

ISL88732HRTZ-T

ICM

8

PR41

100_4

+5V_PTC

84

VA3

PR127 220K/F_4

PR104

21

26

VCC

VDDP

BOOT

UGATE

PHASE

LGATE

PGND

CSOP

CSON

VBF GND GND

NC

12

14

12

PC131 100P/50V_4N

PU8

SN74LVC2G00DCUR

1 6 2 3

PC25 1U/6.3V _4X

1 2

PR21

4.7_6

25

24

23

20

19

18

17

16

NC

15 29

PC42

10U/6.3V_6X

SUSB#{8,37}

+5V_PTC

1 2

3

5 4

PQ2

IMD2AT108

PC34 1U/6.3V_4X

PR22

0.1U/25V_6X

2.7_6

88732A_U_GATE

88732A_PHASE

88732A_L_GATE

PC38

0.1U/10V_4X

( Near by IC side)

ICMNT {37}

PR152

*0_4

12

PR149

100K/F_4

PD6

1SS355_100MA

2 1

1SS355_100MA PD5

3

1 2

PC24

PR153

100K_4

2

PQ7 AOD403

1

CSOPCSOP CSON

+5VPCU

43

12

6

1

E@1U/25V_6X

VIN

4

3

4

3

PR151

100K_4

5

PQ16A

*2N7002KDW_115MA

BA10393F-GE2

PU7B

7

PR35

1.5M_4

PC91

52

1

52

1

+15V

PC135 100P/50V_4N

PC97

PC110

*0.1U/25V_4X

PQ8

AON7410

PQ6

AON7410

12

34

PQ16B *2N7002KDW_115MA

-

6

+

5

12

2

PQ10 AP4439GMT

1 3

PR111 33K_6

PC96

E@2200P/50V_4X

D/C#{37}

PC15

PC92

PC109

10U/25V_8X

2.2/F_6

PR5

PC1

*10U/25V_8X

PL1

3.3UH_7X7_TOK

*2200P/50V_4X

1000P/50V_4X

(Please place this R near by battery pack side)

+5V_S5

PR150 *0_8

1 2

6 524

1

PQ15 AO6402A

3

12

2

PC93

*10U/25V_8X

1 2

PR114 10/F_6

( Near by sense R side)

PR40 100_4

+5V_PTC

12

PC139

0.1U/25V_4X

PC140 *4700P/25V_4X

B2B

12

PR33

100K/F_4

12

PC37 100P/50V_4N

12

PR28 91K_4

2

4

10K/F_6

3

1

0.01_3720 PR99

*0.1U/25V_4X

+5V_PTC

52

PR106

PQ1

2N7002K_300MA

PR113 10/F_6

BAT-V-1

PC125

PR108

BAT-V-1

*0_4

12

6

1

OUT

REF

BAT-V-2

1 2

12

INA199A2DCKR

PU6

PC88

10U/25V_8X

0.01_3720 PR112

PC121 *0.1U/25V_4X

1 2

5

IN-

2

1

PC87

10U/25V_8X

BAT-V-2BAT-V-1

12

PR107 *0_4

12

PC120

*0.1U/25V_4X

4

IN+

V+3GND

PR130

*0_6

12

+5V_PTC

PC123

0.1U/25V_4X

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

CHARGER-ISL88731C A1A

1

P1

BD6

40 49Monday, January 07, 2013

5

VIN

D D

PC72

*2200P/50V_4X

PC70

0.1U/25V_6X

PC202

10U/25V_8X

4

3

VIN

+5VPCU

PC74

PR60

2.2/F_8

1 2

10U/6.3V_6X

+2VREF+3VPCU

2

PC71

0.1U/25V_6X

PC203

10U/25V_8X

1

VIN

P2

PC73

*2200P/50V_4X

10U/6.3V_6X

17

VREG5

EMC18GND

PR67 *0_4/S

TOP Side

3

14

4

REF

TONSEL UGATE2

BOOT2

PHASE2

LGATE2

GND

15

25

12

OUT2

FB2

+3V_S5

3

PC81 1U/6.3V_4X

4 10 9

11 12

7 5

52

1

3V_UGATE2

1 2

3V_LGATE2

3V_FB2

PR219 0_6

PQ25 AON7406

PR68 *0_2/S

PR64

2.2_6

PR72

10K/F_4

PC79

0.1U/25V_6X

52

4

3

1

52

4

PQ32

3

AON7752

1

Rds(on) 14.5m ohm

PR73

6.8K/F_4

+3VPCU

DDPWRGD_R

PQ33 AON7410

PR66 *10K_4

PL11

2.2UH_7X7_TOK

PR59 *2.2/F_6

*0_2/S

PC69 *1000P/50V_4X

+3.3V_1

PR192

SYS_HWPG {8,37}

OCP:9.2A

(Peak 11.426A, AVG 7.998A)

+

PR191 *0_2/S

PC183

220U/6.3V_105CS_E18e

( Near by Output cap side)

+3V_S5+5V_S5

16

EN UGATE1 BOOT1

PHASE1 LGATE1 VOUT1

FB1 PGOOD

200K/F_4

147K/F_4

PR62 *SHORT_4

PC80

VIN

1

MAIND

12

8

VREG3

RT8223P

TOP Side

ENTRIP1

ENTRIP26SKIPSEL

PC75

TP112

MAIND{12,27,45}

0.1U/25V_6X

PU3

13

5V_FB1

PR61 10K_4

5V_BST1

21 22

20 19 24

23

PR69

PR74

2

5V_UGATE1

PR65

1 2

2.2_6

5V_PHASE1 3V_PHASE2

5V_LGATE1

DDPWRGD_R

+3VPCU

12

PQ30

52

OCP:12A

(Peak 12.068A ,AVG 8.447A)

PR189 *0_2/S

+15V

PL10

2.2UH_10X10 PR210

*2.2/F_6

PC200

*1000P/50V_4X

PC205

0.1U/25V_6X

PR218

22_8

+15V_ALWP

+5V_1

MAIND

+

PC182

( Near by Output

220U/6.3V_105CS_E18e

cap side)

+5V_S5

52

4

3

PR190 *0_2/S

PQ26 AON7406

1

C C

B B

A A

AON7410

4

3

1

52

4

PQ31

3

1

AON7752

Rds(on) 14.5m ohm

PD8 BAV99W-7-F_150MA

PD9 BAV99W-7-F_150MA

PC204

PR70

15.4K/F_4

3

PC77

0.1U/25V_6X

PC76

0.1U/25V_6X

2

1

2

1

0.1U/25V_6X

B2A

PC78 0.1U/25V_6X

PR71

10K/F_4

S5_ON{3,20,37}

(Peak 6.568A, AVG 4.598A)

+5V

5

(Peak 6.652A, AVG 4.656A)

+3V

Size Document Number Rev

Date: Sheet of

4

3

2

Date: Sheet of

Quanta Computer Inc.

BD6

PROJECT :

System 3V/5V(TPS51123A) A1A

BD6

41 49Monday, January 07, 2013

1

5

4

3

2

1

Be careful to this two net name.

PR20100K/F_4

PU1

VTTSNS VLDOIN VTT VTTGND VTTREF

PC28

PR27

*100K_4

21

23

PwPad-122PwPad-2

TPS51216RUKR

PwPad-324PwPad-425PwPad-5

26

PR25

10K/F_4

PR18

30.1K/F_4

PR26 200K_4

20

19

18S317S516

TRIP

MODE

PwPad

PGOOD

VREF6GND7REFIN8VDDQSNS9PGND

R1

PC23

0.01U/25V_4X

R2

4

VBST DRVH

V5IN

DRVL

10

Vout = (R1/R2) X 0.75 + 0.75

MAINON{27,37,43,45}

+3VPCU

D D

( Near by Output cap side)

+SMDDR_VTERM

C C

+SMDDR_VREF

+1.35VSUS_1_LOD

PC32

PR32 0_8

(Peak 0.1A, AVG 0.07A)

B B

A A

5

HWPG_1.35V{27,37}

PR29

*0_2/S

PC31

10U/6.3V_6X

PC29

0.22U/10V_4X

1 2 3 4 5

0.1U/10V_4X

S3_1.35V_1

SW

S5_1.35V

15 14 13 12 11

PR19 0_4

PR16 0_4

1.35SUS_PHASE

1 2

PC19 1U/6.3V_4X

PR221 0_4

S3_1.35V {27}

PR13

2.2/F_6

+5V_S5

SUSON {37}

PC18 0.1U/25V_6X

1.35SUS_HG

1.35SUS_LG

RDSon=2.8m ohm

PC210

0.1U/10V_4X

+3V_S5

PC207

10U/6.3V_6X

PC209

0.1U/10V_4X

Vout =0.8(1+R1/R2) =1.5V

PQ35

AON7410

PQ34

AON7752

PC206

*0.1U/10V_4X

3

4

+5V_S5

52

3

1

52

3

1

PU12 G9661-25ADJF12U

4

VPP

2

VEN

3

VIN

8

GND

9

GND

PGOOD

ADJ

7

VO

NC

PC104

*2200P/50V_4X

1017 CHANGE

PL2

2.2UH_7X7_TOK

PR94

2.2/F_6

PC90

1000P/50V_4X

+1.35VSUS_1_VDDQSNS

+3V_S5

1 6

5

PR220 *100K_4

PR222 30K/F_4

PR223 34K/F_4

PR120

0.1U/25V_6X

*0_2/S

PR116

+1.35VSUS_1_LOD

PC119

*0_8/S

PC14

*0.1U/10V_4X

HWPG_1.5V {37}

+1.5V

(Peak 0.503A)

PC208

10U/6.3V_6X

+1.35VSUS_1

+

PC106

( Near by Output cap side)

2

VIN

PC116

10U/25V_8X

OCP:10.5A

(Peak 8.62A, AVG 6.034A)

ESR : 9mΩ f : 400k Hz

390U/2.5V_105CS_E10f

PC13 *10U/6.3V_6X

1012 modify

P3

+1.35VSUS

Quanta Computer Inc.

BD6

PROJECT :

Size Document Number Rev

Date: Sheet of

DDR1.5V

PROJECT :

BD6

42 49Monday, January 07, 2013

1

42 49Monday, January 07, 2013

A1A

5

4

3

2

VIN

1

+5V_S5

52

4

3

52

4

3

PR180

PR178

4.99K/F_4 PC174

12

1 2

R1

PC175

1U/6.3V_4X

100K/F_4

12

PR177 470K/F_4

PU10 TPS51211DSCR

7

V5IN

2

TRIP

3

EN

4

VFB

5

TST

16

GND

GND12GND13GND14GND

VBST DRVH

SW

PGOOD

DRVL

GND

15

10 9 8 1 6 11

+1.05V_DRVH +1.05V_SW

+1.05V_DRVL

PR181

2.2_6

1 2

PC176

0.1U/25V_6X

HWPG_VTT {37}

+3V_S5

PR184*10K_4

RDSon=13m ohm

D D

1012 modify

MAINON{27,37,42,45}

C C

PR182

0_4 *1U/6.3V_4X

PR179

10K/F_4

PC177

R2

PR183 91K/F_4

1 2

12

*39P/50V_4N

PQ23

AON7410

1012 modify

PQ22

AON7752

0.1U/25V_4X

1

PC60

PR176 *2.2/F_6

PC172 *1000P/50V_4X

PC173

10U/25V_8X

PL7

2.2UH_7X7_TOK

PR43

Vout=0.704V*(R1+R2)/R2

PC61

+

PC167

*0_2/S

( Near by Output cap side)

P4

*2200P/50V_4X

OCP:10.5A

(Peak 9.421A, AVG 6.595A)

Total capacitor : 400uF

F: 320k Hz

PC168 0.1U/10V_4X

390U/2.5V_105CS_E10f

PC213 10U/6.3V_6X

+1.05V

B B

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

PROJECT :

Size Document Number Rev

+1.05V_A(TPS51211DSCR)

Date: Sheet of

5

4

3

2

Date: Sheet of

1

BD6

A1A

43 49Monday, January 07, 2013

5

CPU Core : Loadline =

CPU Core : Loadline =CPU Core : Loadline =

-1.5mV/A

-1.5mV/A-1.5mV/A TDC = 33A ICCMAX=85A

TDC = 33A ICCMAX=85A

TDC = 33A ICCMAX=85A TDC = 33A ICCMAX=85A



 O

O

O 



 

D D

C C

B B

A A



 



 



 



 



PC85 0.1 U/10V_4X

A

MPWROK{8,25 ,37}

VRON{37}

+3V_S5

DELAY_VR_ PWRGOO D{3,8}

PR93

27.4K/F_4

PR138

NTC_470K_4

( Near by MOS side)

PR1

PR85 0_4

PR84 *0_4

PR224

47W@1.82K/F_4

PC7

PC211

47W@8200P/50V_4X

PR81

PR95

3.83K/F_4

37W@4.02K/F_4

37W@3300P/50V_4X

+3V_S5

PR83 100K/F_4

PR82

*100K/F_4

1.91K/F_4

0.01U/50V_4X

PR80 100K/F_4

H_PROCHOT#{3,40}

PR225

37W@1K/F_4

PR4

47W@1K/F_4

PR2 *2K/F_4

PC6

PC3

56P/50V_4N

*330P/50 V_4X

5

CPU Core : Loadline =

CPU Core : Loadline =CPU Core : Loadline =

-1.5mV/A

-1.5mV/A-1.5mV/A TDC = 26A ICCMAX=55A

TDC = 26A ICCMAX=55A

TDC = 26A ICCMAX=55A TDC = 26A ICCMAX=55A



 O

O

O 



 



 



 



 



+VCCIO_OUT

A

VR_SVIDDA T{6}

VR_SVIDART#{6}

VR_SVIDCL K{6}

PR78

PC84

PR79 0_4

1 2

PC83

47P/50V_4N

PC212

37W@390P/50V_ 4X

PC4

47W@220P/50V_ 4X

PR226 37W @1.65K/ F_4

PR3 47W@2.74K/F_4

VCC_SENSE{6} VSS_SENSE{7}

PR8 0_4 PR7 0_4

ISEN1 ISEN2 ISEN3

PC82

0.1U/10V_4X

*499/F_4

H_PROCHOT#_ VR

4

PR86

54.9/F_4

1

2

3

4

5

6

7

8

33

PR92

6.04K/F_4

PC11

*330P/50 V_4X

PC10

0.01U/25V_4X

PC9

0.1U/10V_4X

4

PR87 130/F_4

SCLK

VR_ON

PGOOD

IMON

VR_HOT#

NTC

COMP

FB

PAD

PR91 102K/F_4

PR98 3.24K/F_4

PR102 49.9K/F_4

BOOT_2

UGATE_2

32

30

PROGE1

ISL95812HRZ-T

ISEN211ISEN3

PC5

0.022U/50V_6X

28

PROG329PROG2

PU5

ISEN1

12

PC8

0.022U/50V_6X

31

SDA

ALERT#

SLOPE

9

10

PC2

47W@0.022U/50V_6X

PHASE_2

27

26

25

BOOT2

UGATE2

RTN13ISUMN14ISUMP15VDD

PR227

37W@511/F_4

PR109

47W@523/F_4

PC101

2200P/50V_4X

PHASE2

16

12

LGATE2

LGATE1

PHASE1

UGATE1

BOOT1

PC114 1U/10V_4 X

24

23

VDDP

22

PWM3

21

20

19

18

17

VIN

PR122 1/F_4

PC12

0.1U/10V_4X

PR110

47W@1.5K/F_4

PR228

37W@2K/F_4

PR119

0_4

C3A

UGATE_3

PC98

PR101

BOOT_3

47W@0.22U/25V_ 6X

47W@2.2/F_6

PWM3

PR77

*75/F_4

LGATE_2

PWM3

LGATE_1

PHASE_1

UGATE_1

BOOT_1

PC105

*0.22U/25V_6X

3

UGATE_1

PR121 2.2/F_6

BOOT_1

PHASE_1

LGATE_1

PR118

37W@0_6

PR123 0_4

PC112

0.22U/25V_6X

+5V_S5

PC108

0.1U/10V_4X

PR6 11K/F_4

* PR135 PLACE NEAR PL8

( Near by Choke side)

PU4 47W@IS L6208BCRZ-T

1

UGATE

PHASE

2

BOOT

FCCM

3

PWM

4

LGATE

GND

PAD

9

3

VCC

PR10

2.61K/F_4

PR145 NTC_10K_4

8 7 6 5

PC113

0.22U/25V_6X

VIN

ISUMP

ISUMN

PR115

47W@0_6

+5V_S5

12

PHASE_3

PC107 1U/10V_4 X

+5V_S5

12

LGATE_3

HP8S36TB

PC102

47W@1U/6.3V_4X

PQ13

2

12

+

PC126

10U/25V_8X

1000P/50V_4X

PC100

0.22U/25V_6X

PC50

22U/6.3V_8X

PC33

22U/6.3V_8X

PC22

PR36

PR126

3.65K/F_6

HP8S36TB

2

0.1U/25V_4X

2.2/F_6

PQ12

0.22UH_7X7X4

PR143

S1/D2

9

PC27

1

2

G1

S1/D2

9

G2

765

8

UGATE_2

BOOT_2

PHASE_2

LGATE_2

PC46

10U/25V_8X

D1D1D1

S2S2S2

ISUMP

ISEN1

PR105

2.2/F_6

PC157

PC141

22U/6.3V_8X

VIN

PC95

100U/25V _105CE_ f

PL5

Max. DCR=1.1m

PR146

*0_2/S

( Near by Choke side)

PR128 10_4

PR129 100K/F_4

PR103 100K /F_4 PR100 47W @100K/F _4

( Near by Choke side)

1

2

D1D1D1

G1

G2

S2S2S2

765

8

ISEN2

UGATE_3

PQ11

47W@HP8S36TB

9

PHASE_3

LGATE_3

+VCC_CORE

+

PC44

PC40

PC132

22U/6.3V_8X

47W@330U/2V_7343P_E9c

ISUMN ISEN2 ISEN3

C3A

PC20

PC16

PC111

10U/25V_8X

PC21

1000P/50V_4X

PR134

3.65K/F_6

10U/25V_8X

PR24

2.2/F_6

PL4

0.22UH_7X7X4

PR136*0_2/S

PR133 100K/F_4

0.1U/25V_4X

PR144*0_2/S

( Near by IC side)

1

2

D1D1D1

G1

S1/D2

G2

S2S2S2

765

8

ISUMP

ISEN3

PC17

47W@10U/25V_8X

PR131

47W@2.2/F_6

PC118

47W@1000P/50V_4X

PR17

47W@3.65K/F_6

PR23

47W@100K/F_4

Size Document Number Rev

+VCCIN (ISL95812) 47/57W

Date: Sheet of

1

P7

PC146

PC145

PC127

22U/6.3V_8X

Max. DCR=1.1m

( Near by Choke side)

PR132 10_4 PR12 100K/F_4 PR14 47W@100K/F_4

PC115

47W@10U/25V_8X

47W@0.22UH_7X7 X4

PR135*0_2/S

22U/6.3V_8X

VIN

PC51

PC150

22U/6.3V_8X

ISUMNISUMP

PC103

47W@0.1U/25V_4X

PL3

Max. DCR=1.1m

PR139*0_2/S PC52

( Near by Choke side)

PR15 47W@10_4 PR11 47W@100K/F_4 PR9 47W@100K/F_4

( Near by IC side)

Quanta Computer Inc.

PROJECT :

1

1016 ADD

+VCC_CORE

+

PC136

PC149

22U/6.3V_8X

330U/2V_7343P_E9c

+VCC_CORE

PC45

ISEN1

22U/6.3V_8X

ISEN3

PC49

22U/6.3V_8X

PC142

C3A

VIN

+VCC_CORE

PC162

PC163

PC143

22U/6.3V_8X

ISUMN ISEN1 ISEN2

C3A

BD6

44 49Monday, January 07, 2013

A1A

5

4

3

2

1

VIN

D D

C C

MAINON{27,37,42,43}

B B

2

PQ18 PR163

100K_4

LTC044EUBFS8TL_30MA

PR166 1M_4

PR167 1M_4

1 3

6

2

1

PR168 22_8

PQ19A

2N7002KDW_115MA

5

PR165 22_8

34

PQ19B

2N7002KDW_115MA

PR170 22_8

6

2

PQ20A

2N7002KDW_115MA

1

+15V+5V+3V +1.5V

34

5

PR164 1M_4

PQ20B

2N7002KDW_115MA

PC166 2200P/50V_4X

P7

MAIND {12,27,41}

1012 del

Quanta Computer Inc.

BD6

PROJECT :

A A

5

4

3

Size Document Number Rev

+1.8V/Discharge

Date: Sheet of

2

PROJECT :

BD6

A1A

45 49Monday, January 07, 2013

1

5

D D

8812A-VREF

Fsw setting=300KHz

1 2

EV@0.01U/25V_4X

PR211

R1

EV@1/F_4

PC189

8812A-RGND

EV@0_4

12

GV2EV@2700P/50V_4X

DGPU_PWR_EN_RC{47}

C C

Single Phase Operation

8812A-PSI

B B

A A

PR196EV@0_4

1 2

PC186 *EV@0.1U/10V_4X

GPU_VID0{20}

8812A-RGND

PR198

*EV@0_4

5

PR55 GLEV@39K/F_4 PR200 GV2EV@20K/F_4

PC193

PR197

PC66

8812A-RGND

*EV@43K/F_4

EV@475K/F_4

GPU_PSI{20}

PC190

1 2

EV@0.1U/10V_4X

R2

12

R3

GLEV@1800P/50V_4X

R4

R5

8812A-RGND

PR206

PR208

8812A-VID

PR203

GV2EV@20K/F_4

PR202

GV2EV@2K/F_4

PR195

GV2EV@18K/F_4

PR193

GV2EV@0_4

PR58

GLEV@30K/F_4

PR56

GLEV@3K/F_4

PR54

GLEV@24K/F_4

PR53

GLEV@3K/F_4

*EV@82.5K/F_4

8812A-TON

8812A-EN

8812A-PSI

8812A-VREF

8812A-REFADJ

8812A-REFIN

3

1

8812A-RGND

PR205

PC187

8812A-RGND

PR194 *EV@5.1K/F_4

B2B

2

PQ28

EV@2N7002K_300MA

PU11

9

TON

3

EN

4

PSI

5

VID

8

VREF

6

REFADJ

7

REFIN

*E@0.01U/25V_4X

PC201

4

0924

18

EV@RT8812A

SS

11

8812A-SS

12

PR212

*EV@0_4

PC197

12

PR185

*EV@22P/50V_4N

1 2

EV@82.5/F_4

12

PC181

EV@1U/10V_4X

4

3

12

PC184

PR215

PR214

PC179

EV@0.1U/25V_6X

EV@0.22UH_7X7X4

EV@0_4

PC63

EV@10U/25V_8X

PL8

VGA_VCCSENSE {16}

VGA_VSSSENSE {16}

PC64

+5V_S5

PR207

EV@0_6

PC191

1 2

EV@1U/10V_4X

8812A-PVCC

1

8812A-BOOT1

BOOT1

2

UGATE1 PHASE1 LGATE1

BOOT2 UGATE2 PHASE2 LGATE2

VSNS RGND

PR57

*EV@0_8

PG

8812A-UGATE1

20

8812A-PHASE1

19

8812A-LGATE1

15

8812A-BOOT2

14

8812A-UGATE2

16 17

8812A-LGATE2

13

8812A-PG

12

8812A-VSNS

10

8812A-RGND

PC195

PVCC

GND

21

B2B

8812A-RGND

0924

EV@22P/50V_4N

VGA_STBY {20}

PR201

PC188

EV@2.2/F_6

EV@0.1U/25V_6X

PC192

PR213

EV@0.1U/25V_6X

EV@2.2/F_6

PR217 EV@10K_4

1 2

PR216

EV@0_4

12

PC198

*EV@47P/50V_4N

PC196

1 2

*EV@47P/50V_4N

( Near by sense IC pin side)

PQ27 EV@HP8S36TB

1

G1

S1/D2

9

G2

765

8

PR204

EV@11.5K/F_6

C3A

PR209 *EV@0_4

GPU_PWR_GD {47}

PR186

PR187

EV@100/F_4

0924

EV@100/F_4

CORE-PHASE2

+3V_S5

( Near by putput cap side)

3

*EV@2200P/50V_4X

2

D1D1D1

S2S2S2

CORE-PHASE1

PR188 EV@2.2/F_6

EV@1500P/50V_4X

( Near by sense IC pin side)

2

VIN

1

P7

PC180

EV@10U/25V_8X



 O

O

M

M 



A

A 





 



 



+VGPU_CORE

5

5 





 A

A

+

PC65

EV@330U/2V_7343P_E6b

2

EV@330U/2V_7343P_E6b

PC185

EV@1500P/50V_4X

CORE-PHASE2

PR199

EV@2.2/F_6

PC62

PC178

8812A-UGATE2

PQ29 EV@HP8S36TB

CORE-PHASE2

8812A-LGATE2

PL9

EV@0.22UH_7X7X4

1

2

D1D1D1

G1

S1/D2

9

G2

S2S2S2

765

8

PC58

PC57

EV@22U/6.3V_8X

1016 CHANGE

Size Document Number Rev

GPU Core (RT8812A)

Date: Sheet of

12

PC67

PC199

*EV@2200P/50V_4X

PC59

PC169

EV@22U/6.3V_8X

Quanta Computer Inc.

PROJECT :

1

VIN

PC68

PC194

EV@0.1U/25V_6X

PC54

EV@22U/6.3V_8X

BD6

EV@10U/25V_8X

+VGPU_CORE

PC170

EV@22U/6.3V_8X

46 49Tuesday, January 08, 2013

EV@10U/25V_8X

A1A

1.Level 1 Environment-related Substances Should Never be Used.

2.Recycled Resin and Coated Wire should be procured from Green Partners.

5

D D

PR154

EV@300K/F_4

PR169 NGC6@0_4

GPU_PWR_GD{46,47}

FB_CLAMP{17,20,37}

C C

B2B

PD7 GC6@BAT54C-7-F_200MA

EV@100K/F_4

+3VPCU

GFXPG_1.5V_EN

PR158

PC144

EV@1U/10V_6X

PR157

*EV@100K_4

PR156 EV@0_4

+3VPCU

GFXPG_1.5V_PGD

4

R=don't care

PR155

*EV@100K_4

1022 change

PC147

EV@0.01U/25V_4X

+1.5V_GPU_VSNS +1.5V_GPU_GSNS

24

REFIN2

25

REFIN

26

VREF

27

RA

28

EN

29

PWPD

+5V_S5

PC148

PR160

EV@2.2U/6.3V_6X

EV@0_4

17V518

19

20

21

22

23

GND

TRIP

VSNS

SLEW

GSNS

PU9

EV@TPS51363RVER

PGOOD1LP#2MODE3NC4BST5SW6SW7SW8SW

PR229

*EV@0_4

PC151

EV@0.1U/25V_6X

PR159 EV@5.1/F_6

3

+5V_S5

VIN15VIN16VIN

PGND PGND PGND PGND PGND

9

PL6

EV@1.0UH_7X7_TOK

2

VIN

PC48

PC156

PC155

14

EV@10U/25V_8X

13 12 11 10

PC158

PC161

EV@22U/6.3V_6X

PC47

EV@10U/25V_8X

PR162

0_4

12

+1.5V_GPU_GSNS

PR161

0_4

12

+1.5V_GPU_VSNS

PC159

PC154

PC160

EV@22U/6.3V_6X

PC153

EV@22U/6.3V_6X

PC152 EV@0.1U/25V_6X

1

P9

(OCP 12A) (Peak 7.3A)

+1.5V_GPU

GC6 Enable +1.5V_GPU

GFXPG_1.5V_PGD

GPU_PWR_GD{46,47}

B B

DGPU_PW R_EN_RC{46}

PR230 EV@0_4

PR174 *EV@0_4

PC171

*EV@0.1U/10V_4X

+3V_GPU

PR231 EV@10K_4

PR175 *EV@100K_4

2

PQ21 EV@LTC044EUBFS8TL_30MA

From FCH

DGPU_PW R_EN_R{8}

GFX_MAINON{37}

A A

BD5 : R380 NC

PR45 PIV@0_4

PR46 OEV@0_4

PR44

OEV@100K_4

BD6 : PR16001 pin6 NC

VIN

1 3

2

PC53 *EV@1U/10V_4X

EV@LTC044EUBFS8TL_30MA

PR173 EV@1M_4

PR172 EV@1M_4

PQ3

PQ17

3

4

+1.05V

52

3

1

+3V_S5

65241

PQ24 EV@AO6402A

PC55 *EV@10U/6.3V_6X

(Peak 3.5A)

Total capacitor : 22uF

+1.05V_GPU

PC164

EV@10U/6.3V_6X

(Peak 0.794A)

+3V_GPU

PC165

EV@10U/6.3V_6X

34

5

+15V

PR50 EV@1M_4

6

2

1

PQ5A EV@2N7002KDW_115MA

PR52 EV@22_8

PQ4B EV@2N7002KDW_115MA

PC56 EV@2200P/50V_4X

+15V+3V_GPU

PR49 EV@1M_4

6

2

1

PQ4A EV@2N7002KDW_115MA

1012 modify

EV@AON7406

PR51

EV@0_4

+1.05V_GPU

PR171 EV@22_8

PQ5B

EV@2N7002KDW_115MA

34

5

VIN

PR48 EV@1M_4

PR47 EV@1M_4

1 3

and change to Risister

Quanta Computer Inc.

These is initial low, for sure that dGPU power Off

5

4

Size Document Number Rev

Date: Sheet of

Monday, January 07, 2013

Date: Sheet of

Monday, January 07, 2013

Date: Sheet of

3

2

Monday, January 07, 2013

Quanta Computer Inc.

PROJECT :

+VGACORE

BD6

47 49

1

A1A

5

D D

AC

System Charger

C C

DC

ISL88731C

PWM

4

SYSTEM POWER

RT8223P

PWM

+5V_S5

(Peak 12.068A ,AVG 8.447A)

SYS_SHDN#

3

MAIND enable

AON7406

low switch

+5V

(Peak 6.568A, AVG 4.598A)

2

+3V_S5

AC/DC Insert enable

+3V_S5

AC/DC Insert enable

+3V_S5

(Peak 11.426A, AVG 7.998A) (Peak 6.652A, AVG 4.656A)

SYS_SHDN#

+SMDDR_VTERM

AO6402A

low switch

G9661-25ADJ

LDO

MAIND enable+3V

+1.5V

(Peak 0.753A, AVG 0.527A)

MAINON enable

1

S3_1.5V enable

TPS51216

PWM

+SMDDR_VREF

SUSON enable

AO6402A

low switch

DGPU_PWR_EN_R enable+3V_GPU

(Peak 0.794A, AVG 0.556A)

SUSON enable+1.35VSUS

(Peak 8.62A, AVG 6.034A)

B B

TPS51211

PWM

(Peak 9.421A, AVG 6.595A) (Peak 3.500A, AVG 2.450A)

MAINON enable+1.05V

AON7406

low switch

GPU_PWR_GD enable+1.05V_GPU

VRON enableISL95812HRZ-T VCC_CORE

PWM

RT8812A

PWM

TPS51362RVER

A A

5

PWM

4

(Peak 85A, AVG 33A)

+VGPU_CORE

(Peak 50A, AVG 35A)

+1.5V_GPU

(Peak 7.3A, AVG 5.11A)

DGPU_PWR_EN_RC enable

GPU_PWR_GD enable

Quanta Computer Inc.

BD6

PROJECT :

Size Document Number Rev

POWER TREE TABLE

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

BD6

1A

48 49Monday, January 07, 2013

1

1A

5

Model

BD6 MB

D D

C C

B B

REV

First Release

A1A

PAGE 3: Change C510,C508 size and stuff R926,add R148,R152

B2A

PAGE 6: add C728,C729 PAGE 7: add R929,R930,demount R927,R928,R82,R566,R81 PAGE 8: modify R425,R412,R398,R397,R404,R405,R414,R146,R854,R862 value to DS3 PAGE 9: change GPIO13 to BOARD_ID16,GPIO23 to BOARD_ID17,change R819,R816,R821,R824,R814,R818,R813,R823 value dor XDP PAGE 10: add USB port3 for Touch Panel function,add R897,R901,R364,R902,R903,R905,R898,R906,Q60,Q59 for DS3,change C667,C668 to 12PF PAGE 11: change R407,R408,R879,R880,R907,R349,R342,R343,R910,R911,R912,R913,R908,R909 for BOARD_ID select PAGE 12: change R338,R328 size,change C411,D11,R436,Q35 value and add R434,R435 for DS3 PAGE 15: Change C188 size to 0402. PAGE 16: Change R201,R196,Q23,Q61,Q24 value PAGE 18: change C725,C726,C727 value PAGE 19: add R914 for XTAL,and change R291,R292 value PAGE 20: change R293,R728,R294,R915,R916 value PAGE 21: add R917 for co-lay PAGE 22: change C279,C604 value PAGE 26: add U33,R938,C738 PAGE 27: add R939,C739,U34 for DS3 PAGE 28: change R918,F3,U30,D19,C628,C629,C630,C633,C634,C635,C636,C641 value for HDMI PAGE 29: change R937,R64,R9,C26,C28,C29,MR1,F1,R24,R539,R25,R536,R22 value PAGE 30: change R58,R942,Q41,R533 value for AOAC PAGE 31: add D6,D22,D23,D24,D25,D28,D29,D31,D30,D32,D33,D34,D35 for ESD,change C339,C353,R361,R367,U12,C666,C335,C337,Q32 value PAGE 33: change CN15 value PAGE 34: add D36,D37,D38,D39,D40,D41,D42,D43 for ESD PAGE 35: change C195,C179,C151,C145,C139,C138 value,add D44,D45,D46,D47 for ESD PAGE 36: change R459,R455,R456,R457,R465,R458,R478,C403,C402,C401,C405,C404 value PAGE 37: change R91,Q7 value,add R943,R798 for STRAP select PAGE 38: change CN1,CN2,CN5,CN4,R102,Q9 value and change C165 value for EMI,and add L41,L42,C723,C724,CN2021,R920,R921,R922,R923 for Touch PAD Panel function PAGE 39: change LED2 symbol PAGE 20: change R656 value

B2B

PAGE 22: change D4 value PAGE 14: change C192 size to 0402,chaneg C734,C735,R933,R934 value for DS3

C3A

PAGE 28: change Q55,R754,R753,R721,R711,R694,R699,R678,R683,R744,R733,R652 value for HDMI 4K2K PAGE 31: change RN12,RN13,RN14,RN15 pin define PAGE 34: change C490,C501 size to 0402 PAGE 36: change C476 size to 0402

4

CHANGE LIST

3

2

1

MODEL

PAGE FROM To

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

BD6

A A

Quanta Computer Inc.

DOC NO. 204

PROJECT MODEL : BD6 APPROVED BY:

5

4

PART NUMBER:

DRAWING BY: REVISON:

3

Kent Su Kent Su

DATE:

2

2012/12/14

Size Document Nu mber Rev

Change list

Date: Sheet of

Quanta Computer Inc.

BD6

PROJECT :

1

BD6

50 5 0Thursday, January 03, 2013

D2A

QUANTA BD6 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual