QUANTA BD6 Schematics
1
2
3
4
5
6
7
8
BD6 Shark Bay Block Diagram
USB-11
A A
DDR3L-SODIMM1
DDR3L-SODIMM2
P14,15
SATA - HDD
B B
SATA - ODD
Touch Panel
Card Reader
Daughter Board
USB 2.0 L1 Con.
USB 2.0 L2 Con.
P38
P36
P31
USB-3
USB-8
USB-2
USB-9
P33
P33
Dual Channel DDR3L
SATA 5
SATA4
Haswell
37W/47W
rPGA 946
P3, 4, 5, 6, 7
DDR3L SYSTEM MEMORY
FDI
FDI(x2)
FDI
SATA0
SATA1
Lynx Point
FCBGA 708
USB2.0
RTC
PEGX16 Gen 3
DP_B
eDP
DMI
DMI(x4)
DMI
PCIe 2.0
USB3.0
PEG x8
HDMI
eDP
CRT
dGPU
nVIDIA N14P-GV2
nVIDIA N14M-GL
P16, 17, 18, 19, 20, 21, 22
VRAM DDR3-64M*16
VRAM DDR3-128M*16
HDMI Level Shift
eDP to LVDS
PCIE-3
USB-10
PCIE-4
P28
P26
BATTERY
C C
P9
IHDA
P8, 9, 10, 11, 12, 13
LPC
SPI
SPI Flash
P9
Azalia
EXT_LVDS
EXT_CRT
EXT_HDMI
LCD
USB-11
WLAN
Giga/10/100 Lan
P30
P35
USB-0
USB-1
HDMI Level Shift
HDMI Con.
LCD/CCD Con.
CRT Con.
USB 3.0 R1
Port1
USB 3.0 R2
Port2
P28
P28
P29
P29
P31
P31
LCD/CCD Con.
CRT Con.
HDMI Con.
P29
P29
P28
01
LPC
Audio Codec
P34
HP SPK Con.MIC JACK
P34 P34 P34
D D
1
2
3
FAN
4
K/B Con.
P38 P38P3 P38
EC
HALL Sensor
P29
5
Touch Pad /B
Con.
6
Power /B
Con.
P37
POWER SYSTEM
ISL88732HRTZ-T
RT8223P
TPS51216RUKR
TPS51211DSCR
ISL95812HRZ-T (+VCC_CORE)
RT8812A (NV_VGPU_CORE)
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Block Diagram
Block Diagram
Block Diagram
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
(Charge)
(System 5V/3V)
(DDR 1.35V)
(+1.05V)
(other GPU)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
8
BD6
BD6
BD6
P40
P41
P42
P43
P44
P46
P47
1A
1A
1 49Thursday, January 03 , 2013
1 49Thursday, January 03 , 2013
1 49Thursday, January 03 , 2013
1A
5
4
3
2
1
02
Table of Contents
D D
C C
B B
PAGE DESCRIPTION
Schematic Block Diagram
1
Front Page
2
Processor
3 - 7
8 - 13
PCH
14 - 15
DDRIII SO-DIMM DDR
16 - 22
N14P-GV2/N14M-GL
23 - 24
VRAM - DDR3
PCH XDP CLG
25
26
EDP to LVDS LDS
HDMI comm part HDM
28
VGA Connector
29
LCD Panel
CRT & CRT BUS SWITCH
CCD
HALL SENSOR&BACK LIGHT SWITCH
30
MINI Card (Wi-Fi & WIMAX)
31
USB Connector
USB Sleep Charger
HDD HDD
33
ODD
34
Audio Codec
35
Atheros LAN
36
Card reader MMC
37
EC
38
KeyBoard
TP&FP board
Power SW
LED
39
40
Charger
41
System 5V/3V
42
DDR 1.35V
43
+1.05V
45
+VCORE
Discharge
46
47
GPU_CORE
48
other GPU
BOI-FUNCTIONS
CPU
CLG
VGA
VGA
VGA
LDS
CRT
CCD
HSR
MNW
USB
SLC
ODD
ADO
LAN
KBC
KBC
TPD,FPD
PSW
LED
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
POWER PLANE
+VIN
+3V_RTC
+3V
+3V_S5
+3VPCU
+5V
+5V_S5
+5VPCU
+1.35VSUS
+1.5V
VOLTAGE
10V~+19V
+3.0V~+3.3V
+3.3V
+3.3V
+3.3V
+5V
+5V
+1.5V S5_ON
+1.5V MAIN_ON
CONTROL
SIGNAL
MAIN_ON
S5_ON
MAIN_ON S0
S5_ON S0~S5
AC/DC Insert enable
Power States
+1.05V +1.05V MAIN_ON
~ S0MPWROK+VCORE
+3V_GPU +3.3V DGPU_PWR_EN_R
+VGPU_CORE
DGPU_PWR_EN_RC S0~
+1.5V_GPU +1.5V GPU_PWR_GD
+1.05V_GPU GPU_PWR_GD S0
+1.05V
ACTIVE IN
S0~S5
S0~S5
S0
S0~S5
S0~S5AC/DC Insert enable
S0~S5+5V
S0~S3
S0
S0
S0
S0
GND PLANE PAGE
GND_SIGNAL
8769GND
GND
ADOGND
A A
5
4
3
32
37
ALL
34
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
POWER STAGE & BOI-FUNCTION
POWER STAGE & BOI-FUNCTION
POWER STAGE & BOI-FUNCTION
Date: Sheet of
Tuesday, December 18, 2012
Date: Sheet of
Tuesday, December 18, 2012
Date: Sheet of
2
Tuesday, December 18, 2012
PROJECT :
Chief River
Chief River
Chief River
2 49
2 49
2 49
1
1A
1A
1A
5
Haswell Processor (DMI,PEG,FDI)
Haswell rPGA EDS
FDI_CSYNC_R
FDI_INT_R
D21
DMI_RXN_0
C21
DMI_RXN_1
B21
DMI_RXN_2
A21
DMI_RXN_3
D20
DMI_RXP_0
C20
DMI_RXP_1
B20
DMI_RXP_2
A20
DMI_RXP_3
D18
DMI_TXN_0
C17
DMI_TXN_1
B17
DMI_TXN_2
A17
DMI_TXN_3
D17
DMI_TXP_0
C18
DMI_TXP_1
B18
DMI_TXP_2
A18
DMI_TXP_3
H29
FDI_CSYNC
J29
DISP_INT
HSW_RPGA_EDS_PGA
PEG
DMI FDI
DMI_TXN0{8}
DMI_TXN1{8}
DMI_TXN2{8}
D D
DMI_TXN3{8}
DMI_TXP0{8}
DMI_TXP1{8}
DMI_TXP2{8}
DMI_TXP3{8}
DMI_RXN0{8}
DMI_RXN1{8}
DMI_RXN2{8}
DMI_RXN3{8}
DMI_RXP0{8}
DMI_RXP1{8}
DMI_RXP2{8}
DMI_RXP3{8}
R152 0_4
FDI_CSYNC{8}
R148 0_4
FDI_INT{8}
C C
B B
B2A
<CPU/VGA>
U23A
PEG_RCOMP
PEG_RXN_0
PEG_RXN_1
PEG_RXN_2
PEG_RXN_3
PEG_RXN_4
PEG_RXN_5
PEG_RXN_6
PEG_RXN_7
PEG_RXN_8
PEG_RXN_9
PEG_RXN_10
PEG_RXN_11
PEG_RXN_12
PEG_RXN_13
PEG_RXN_14
PEG_RXN_15
PEG_RXP_0
PEG_RXP_1
PEG_RXP_2
PEG_RXP_3
PEG_RXP_4
PEG_RXP_5
PEG_RXP_6
PEG_RXP_7
PEG_RXP_8
PEG_RXP_9
PEG_RXP_10
PEG_RXP_11
PEG_RXP_12
PEG_RXP_13
PEG_RXP_14
PEG_RXP_15
PEG_TXN_0
PEG_TXN_1
PEG_TXN_2
PEG_TXN_3
PEG_TXN_4
PEG_TXN_5
PEG_TXN_6
PEG_TXN_7
PEG_TXN_8
PEG_TXN_9
PEG_TXN_10
PEG_TXN_11
PEG_TXN_12
PEG_TXN_13
PEG_TXN_14
PEG_TXN_15
PEG_TXP_0
PEG_TXP_1
PEG_TXP_2
PEG_TXP_3
PEG_TXP_4
PEG_TXP_5
PEG_TXP_6
PEG_TXP_7
PEG_TXP_8
PEG_TXP_9
PEG_TXP_10
PEG_TXP_11
PEG_TXP_12
PEG_TXP_13
PEG_TXP_14
PEG_TXP_15
1 OF 9
E23
M29
K28
M31
L30
M33
L32
M35
L34
E29
D28
E31
D30
E35
D34
E33
E32
L29
L28
L31
K30
L33
K32
L35
K34
F29
E28
F31
E30
F35
E34
F33
D32
H35
H34
J33
H32
J31
G30
C33
B32
B31
A30
B29
A28
B27
A26
B25
A24
J35
G34
H33
G32
H31
H30
B33
A32
C31
B30
C29
B28
C27
B26
C25
B24
PEG_RCOMP
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_TXN0_C
PEG_TXN1_C
PEG_TXN2_C
PEG_TXN3_C
PEG_TXN4_C
PEG_TXN5_C
PEG_TXN6_C
PEG_TXN7_C
PEG_TXP0_C
PEG_TXP1_C
PEG_TXP2_C
PEG_TXP3_C
PEG_TXP4_C
PEG_TXP5_C
PEG_TXP6_C
PEG_TXP7_C
+VCCIOA_OUT
C575 EV@0.22U/10V_4X
C557 EV@0.22U/10V_4X
C573 EV@0.22U/10V_4X
C555 EV@0.22U/10V_4X
C571 EV@0.22U/10V_4X
C553 EV@0.22U/10V_4X
C569 EV@0.22U/10V_4X
C551 EV@0.22U/10V_4X
C576 EV@0.22U/10V_4X
C558 EV@0.22U/10V_4X
C574 EV@0.22U/10V_4X
C556 EV@0.22U/10V_4X
C572 EV@0.22U/10V_4X
C554 EV@0.22U/10V_4X
C570 EV@0.22U/10V_4X
C552 EV@0.22U/10V_4X
<THC>
4
R133
24.9/F_4
PEG_RXN[0..7] {16}
PEG_RXP[0..7] {16 }
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
FDI Disable(Discrete Only)
FDI_CSYNC_R
FDI_INT_R
R147
OEV@1K_4
PEG_TXN[0..7] {16}
PEG_TXP[0..7] {16}
<OEV>
R153
OEV@1K_4
3
R109 *0_4
C730
*4.7U/6.3V_6X
+VCCST+1.05V
C80
*0.1U/10V_4X
B2A
Thermal Trip & Process HOT
DELAY_VR_PWRGOOD{8,44}
PM_THRMTRIP#_R
PU/PD of CPU
XDP PU/PD
B2A
H_PROCHOT#
H_PWRGOOD_R
XDP_TDO
XDP_TCLK
XDP_TRST#
<CPU>
<CPU>
R106 62_4
R101 10K_4
R926 51_4
R89 51_4
R100 51_4
PM_DRAM_PWRGD_R{27}
2
1 3
H_PROCHOT#{40,44}
PM_THRMTRIP#{3,11}
H_PWRGOOD{11}
CPU_PLTRST#{11}
CLK_DPLL_NSCLKN{10}
CLK_DPLL_NSCLKP{10}
CLK_DPLL_SSCLKN{10}
CLK_DPLL_SSCLKP{10}
CLK_CPU_BCLKN{1 0}
CLK_CPU_BCLKP{10}
+1.05V
6
Q49A
2N7002KDW_115MA
1
R603 100K_4
R599
1K_4
Q48
2
METR3904-G_200MA
+VCCIO_OUT
+1.05V
B2A
EC_PECI{37}
PM_SYNC{8}
FAN Control-->For one FAN solution <THC>
SKTOCC#
TP19
CATERR#
R105 56_4
R84 0_4
R90 0_4
R39 0_4
TP1
H_PROCHOT#_RH_PROCHOT#
PM_SYNC_R
H_PWRGOOD_R
PM_DRAM_PWRGD_R
CPU_RST#_R
EC_PECI
Intel Turbo mode only<CPU> <CPU>
5
H_PROCHOT_EC{37}
B2A
S5_ON
PM_THRMTRIP# {3,11}
EDP Disable(Discrete Only)
CLK_DPLL_SSCLKN
CLK_DPLL_NSCLKN
CLK_DPLL_NSCLKP
H_PROCHOT_EC
R608
100K_4
R170 OEV@10K_4
R925 *OEV@10K_4
R924 *OEV@10K_4
+VCCIO_OUT
+VCCIO_OUT
CLK_DPLL_SSCLKP
2
Haswell Processor (CLK,MISC,JTAG)
H_PROCHOT#
34
Q49B
2N7002KDW_115MA
<OEV>
+VCCIO_OUT
AP32
SKTOCC
AN32
CATERR
AR27
PECI
AK31
FC_AK31
AM30
PROCHOT
AM35
THERMTRIP
AT28
PM_SYNC
AL34
PWRGOOD
AC10
SM_DRAMPWROK
AT26
PLTRSTIN
G28
DPLL_REF_CLKN
H28
DPLL_REF_CLKP
F27
SSC_DPLL_REF_CLKN
E27
SSC_DPLL_REF_CLKP
D26
BCLKN
E26
BCLKP
HSW_RPGA_EDS_PGA
C70
*47P/50V_4N
R941
OEV@10K_4
R171
*OEV@10K_4
Haswell rPGA EDS
MISC
THERMAL
PWR
Reserved For buffer reset of PLTRSRIN#
B2A
CPU Thermal sensor / MB Local TEMP <THP/UGA/VGA>
CLOCK
DDR3
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
SM_DRAMRST
JTAG
2 OF 9
BPM_N_0
BPM_N_1
BPM_N_2
BPM_N_3
BPM_N_4
BPM_N_5
BPM_N_6
BPM_N_7
PLTRST#{8,30,35,36,37,38}
U23B
PRDY
PREQ
TRST
AP3
SM_RCOMP_0
AR3
SM_RCOMP_1
AP2
SM_RCOMP_2
AN3
CPU_DRAMRST#
AR29
XDP_PRDY#
AT29
XDP_PREQ#
AM34
XDP_TCLK
TCK
AN33
XDP_TMS
TMS
AM33
XDP_TRST#
AM31
XDP_TDI
TDI
AL33
XDP_TDO
TDO
AP33
XDP_DBRST#
DBR
AR30
XDP_BPM#0
AN31
XDP_BPM#1
AN29
XDP_BPM#2
AP31
XDP_BPM#3
AP30
XDP_BPM#4
AN28
XDP_BPM#5
AP29
XDP_BPM#6
AP28
XDP_BPM#7
1
2
R33 *1.5K/F_4
R563 100/F_4
R562 75/F_4
R564 100/F_4
CPU_DRAMRST# {27}
TP71
TP73
TP21
TP20
TP22
TP7
TP6
XDP_DBRST# {8,25}
TP9
TP16
TP13
TP8
TP15
TP12
TP14
TP81
U3
VCC5NC
IN
4
GND3OUT
*74LVC1G07GW
<CPU>
<CPU>
+3V
C42
*0.1U/10V_4X
+1.05V
R58
*1K_4
R44 *43_4
R52
*20K_4
R51
*750/F_4
1
03
CPU_RST#_RCPU_PLTRST#_Q
CPU_RST#_R
Rset(Kohm)=0.0012T*T-0.9308T+96.147
+5V VIN +5VPCU
2
Q47
1 3
*MMBT2222A_600MA
TH_FAN_POWER1
A A
R590 *100K_4
R588
*100K_4
R592
*162K/F_4
VFAN1
U22
1
1 OUT
2
1 IN-
3
1 IN+
GND42 IN+
*LM358
2 OUT
VCC
2 IN-
R601
*IV@NTC_470K_4
8
7
6
5
R598
*48.7K/F_4
R602
*EV@NTC_470K_4
R605
*499K/F_4
R606
*499K/F_4
5
2
S5_ON
34
Q50B
*2N7002KDW_115MA
R604
*IV@1M_4
6
Q50A
*2N7002KDW_115MA
1
B2A
R600
*EV@1M_4
+5V
C510 2.2U/6.3V_4X
B2A
VFAN1{37}
1
4
U20
VIN2VO
/FON
VSET
APE8872M
R594 150_4
+3V
R581
*10K_4
3
TH_FAN_POWER1
5
GND
6
GND
7
GND
8
C508
GND
2.2U/6.3V_4X
FANSIG1{37}
B2A
FANSIG1
CN11
85205-0300L
B2A
+3VPCU
1
2
3
C513
0.1U/16V_4Y
HYST=VCC for 10
degree Hys.
HYST=GND for 30
degree Hys.
+3VPCU_HW_SD
5
4
U21
VCC
HYST
G708T1U
1
SET
2
GND
3
OT#
R597 EV@24.9K/F_4
R596 IV@24.9K/F_4
R896 0_4
SYS_SHDN#
R595 *470K_4
S5_ON
D15 *1SS355_100 MA
B2A
S5_ON {20,37,41}
+3VPCU
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
BD6
PROJECT :
BD6
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Haswell 1/5 (PEG/DMI/FDI)
Haswell 1/5 (PEG/DMI/FDI)
Haswell 1/5 (PEG/DMI/FDI)
Date: Sheet of
Thursday, December 20, 2012
Date: Sheet of
Thursday, December 20, 2012
Date: Sheet of
5
4
3
2
Thursday, December 20, 2012
1
BD6
3 49
3 49
3 49
1A
1A
1A
5
4
3
2
1
04
Haswell Processor (DDR3)
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
Haswell rPGA EDS
AC7
RSVD_AC7
U4
SA_CK_N_0
V4
SA_CK_P_0
AD9
SA_CKE_0
U3
SA_CK_N_1
V3
SA_CK_P_1
AC9
SA_CKE_1
U2
SA_CK_N_2
V2
SA_CK_P_2
AD8
SA_CKE_2
U1
SA_CK_N_3
V1
SA_CK_P_3
AC8
SA_CKE_3
M7
SA_CS_N_0
L9
SA_CS_N_1
M9
SA_CS_N_2
M10
SA_CS_N_3
M8
SA_ODT_0
L7
SA_ODT_1
L8
SA_ODT_2
L10
SA_ODT_3
V5
SA_BS_0
U5
SA_BS_1
AD1
SA_BS_2
V10
VSS
U6
SA_RAS
U7
SA_WE
U8
SA_CAS
V8
SA_MA_0
AC6
SA_MA_1
V9
SA_MA_2
U9
SA_MA_3
AC5
SA_MA_4
AC4
SA_MA_5
AD6
SA_MA_6
AC3
SA_MA_7
AD5
SA_MA_8
AC2
SA_MA_9
V6
SA_MA_10
AC1
SA_MA_11
AD4
SA_MA_12
V7
SA_MA_13
AD3
SA_MA_14
AD2
SA_MA_15
AP15
SA_DQS_N_0
AP8
SA_DQS_N_1
AJ8
SA_DQS_N_2
AF3
SA_DQS_N_3
J3
SA_DQS_N_4
E2
SA_DQS_N_5
C5
SA_DQS_N_6
C11
SA_DQS_N_7
AP14
SA_DQS_P_0
AP9
SA_DQS_P_1
AK8
SA_DQS_P_2
AG3
SA_DQS_P_3
H3
SA_DQS_P_4
E3
SA_DQS_P_5
C6
SA_DQS_P_6
C12
SA_DQS_P_7
HSW_RPGA_EDS_PGA
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
3 OF 9
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SM_VREF
D D
C C
B B
M_A_CLKN0{14}
M_A_CLKP0{14}
M_A_CKE0{14}
M_A_CLKN1{14}
M_A_CLKP1{14}
M_A_CKE1{14}
M_A_CS#0{14}
M_A_CS#1{14}
M_A_ODT0{14}
M_A_ODT1{14}
M_A_BS#0{14}
M_A_BS#1{14}
M_A_BS#2{14}
M_A_RAS#{14}
M_A_WE#{14}
M_A_CAS#{14}
M_A_A[15:0]{14}
M_A_DQSN[7:0]{14}
M_A_DQSP[7:0]{14}
TP24
R127 0_4
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
<CPU>
U23C
AR15
M_A_DQ0
AT14
M_A_DQ1
AM14
M_A_DQ2
AN14
M_A_DQ3
AT15
M_A_DQ4
AR14
M_A_DQ5
AN15
M_A_DQ6
AM15
M_A_DQ7
AM9
M_A_DQ8
AN9
M_A_DQ9
AM8
M_A_DQ10
AN8
M_A_DQ11
AR9
M_A_DQ12
AT9
M_A_DQ13
AR8
M_A_DQ14
AT8
M_A_DQ15
AJ9
M_A_DQ16
AK9
M_A_DQ17
AJ6
M_A_DQ18
AK6
M_A_DQ19
AJ10
M_A_DQ20
AK10
M_A_DQ21
AJ7
M_A_DQ22
AK7
M_A_DQ23
AF4
M_A_DQ24
AF5
M_A_DQ25
AF1
M_A_DQ26
AF2
M_A_DQ27
AG4
M_A_DQ28
AG5
M_A_DQ29
AG1
M_A_DQ30
AG2
M_A_DQ31
J1
M_A_DQ32
J2
M_A_DQ33
J5
M_A_DQ34
H5
M_A_DQ35
H2
M_A_DQ36
H1
M_A_DQ37
J4
M_A_DQ38
H4
M_A_DQ39
F2
M_A_DQ40
F1
M_A_DQ41
D2
M_A_DQ42
D3
M_A_DQ43
D1
M_A_DQ44
F3
M_A_DQ45
C3
M_A_DQ46
B3
M_A_DQ47
B5
M_A_DQ48
E6
M_A_DQ49
A5
M_A_DQ50
D6
M_A_DQ51
D5
M_A_DQ52
E5
M_A_DQ53
B6
M_A_DQ54
A6
M_A_DQ55
E12
M_A_DQ56
D12
M_A_DQ57
B11
M_A_DQ58
A11
M_A_DQ59
E11
M_A_DQ60
D11
M_A_DQ61
B12
M_A_DQ62
A12
M_A_DQ63
AM3
+SM_VREF
F16
+VREFDQ_SA_CPU
F13
+VREFDQ_SB_CPU
M_A_DQ[63:0] {14}
+SM_VREF
+VREFDQ_SA_CPU
+VREFDQ_SB_CPU
M_B_CLKN0{15}
M_B_CLKP0{15}
M_B_CKE0{15}
M_B_CLKN1{15}
M_B_CLKP1{15}
M_B_CKE1{15}
M_B_CS#0{15}
M_B_CS#1{15}
M_B_ODT0{15}
M_B_ODT1{15}
M_B_BS#0{15}
M_B_BS#1{15}
M_B_BS#2{15}
M_B_RAS#{15}
M_B_WE#{15}
M_B_CAS#{15}
M_B_A[15:0]{15}
M_B_DQSN[7:0]{15}
M_B_DQSP[7:0]{15}
Haswell Processor (DDR3)
Haswell rPGA EDS
AG8
TP23
R129 0_4
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
RSVD
Y4
SB_CKN0
AA4
SB_CK0
AF10
SB_CKE_0
Y3
SB_CKN1
AA3
SB_CK1
AG10
SB_CKE_1
Y2
SB_CKN2
AA2
SB_CK2
AG9
SB_CKE_2
Y1
SB_CKN3
AA1
SB_CK3
AF9
SB_CKE_3
P4
SB_CS_N_0
R2
SB_CS_N_1
P3
SB_CS_N_2
P1
SB_CS_N_3
R4
SB_ODT_0
R3
SB_ODT_1
R1
SB_ODT_2
P2
SB_ODT_3
R7
SB_BS_0
P8
SB_BS_1
AA9
SB_BS_2
R10
VSS
R6
SB_RAS
P6
SB_WE
P7
SB_CAS
R8
SB_MA_0
Y5
SB_MA_1
Y10
SB_MA_2
AA5
SB_MA_3
Y7
SB_MA_4
AA6
SB_MA_5
Y6
SB_MA_6
AA7
SB_MA_7
Y8
SB_MA_8
AA10
SB_MA_9
R9
SB_MA_10
Y9
SB_MA_11
AF7
SB_MA_12
P9
SB_MA_13
AA8
SB_MA_14
AG7
SB_MA_15
AP18
SB_DQS_N_0
AP11
SB_DQS_N_1
AP5
SB_DQS_N_2
AJ3
SB_DQS_N_3
L3
SB_DQS_N_4
H9
SB_DQS_N_5
C8
SB_DQS_N_6
C14
SB_DQS_N_7
AP17
SB_DQS_P_0
AP12
SB_DQS_P_1
AP6
SB_DQS_P_2
AK3
SB_DQS_P_3
M3
SB_DQS_P_4
H8
SB_DQS_P_5
C9
SB_DQS_P_6
C15
SB_DQS_P_7
HSW_RPGA_EDS_PGA
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
4 OF 9
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
<CPU>
U23D
AR18
M_B_DQ0
AT18
M_B_DQ1
AM17
M_B_DQ2
AM18
M_B_DQ3
AR17
M_B_DQ4
AT17
M_B_DQ5
AN17
M_B_DQ6
AN18
M_B_DQ7
AT12
M_B_DQ8
AR12
M_B_DQ9
AN12
M_B_DQ10
AM11
M_B_DQ11
AT11
M_B_DQ12
AR11
M_B_DQ13
AM12
M_B_DQ14
AN11
M_B_DQ15
AR5
M_B_DQ16
AR6
M_B_DQ17
AM5
M_B_DQ18
AM6
M_B_DQ19
AT5
M_B_DQ20
AT6
M_B_DQ21
AN5
M_B_DQ22
AN6
M_B_DQ23
AJ4
M_B_DQ24
AK4
M_B_DQ25
AJ1
M_B_DQ26
AJ2
M_B_DQ27
AM1
M_B_DQ28
AN1
M_B_DQ29
AK2
M_B_DQ30
AK1
M_B_DQ31
L2
M_B_DQ32
M2
M_B_DQ33
L4
M_B_DQ34
M4
M_B_DQ35
L1
M_B_DQ36
M1
M_B_DQ37
L5
M_B_DQ38
M5
M_B_DQ39
G7
M_B_DQ40
J8
M_B_DQ41
G8
M_B_DQ42
G9
M_B_DQ43
J7
M_B_DQ44
J9
M_B_DQ45
G10
M_B_DQ46
J10
M_B_DQ47
A8
M_B_DQ48
B8
M_B_DQ49
A9
M_B_DQ50
B9
M_B_DQ51
D8
M_B_DQ52
E8
M_B_DQ53
D9
M_B_DQ54
E9
M_B_DQ55
E15
M_B_DQ56
D15
M_B_DQ57
A15
M_B_DQ58
B15
M_B_DQ59
E14
M_B_DQ60
D14
M_B_DQ61
A14
M_B_DQ62
B14
M_B_DQ63
M_B_DQ[63:0] {15}
CPU SM_VREF M3 CPU VREFDQ M3
+SM_VREF
A A
5
+SM_VREF
C207
*0.1U/10V_4X
4
<CPU> <CPU>
+VREFDQ_SA_CPU
+VREFDQ_SA_CPU
+VREFDQ_SB_CPU
+VREFDQ_SB_CPU
R162
*1K_4
R161
*1K_4
3
R160
*1K_4
R169 0_6
1
Q18
2
*AP2302GN
DRAMRST_CNTRL
3
+VREF_CA_CPU
R164 0_6
1
1
R163 0_6
Q20
2
*AP2302GN
DRAMRST_CNTRL
Q19
2
*AP2302GN
3
+VREFDQ_SA_M3
DRAMRST_CNTRL {27}
3
+VREFDQ_SB_M3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Haswell 2/5 (DDR3 I/F)
Haswell 2/5 (DDR3 I/F)
Haswell 2/5 (DDR3 I/F)
Thursday, December 20, 2012
Thursday, December 20, 2012
Thursday, December 20, 2012
1
BD6
BD6
BD6
4 49
4 49
4 49
1A
1A
1A
5
4
3
2
1
05
D D
Haswell Processor (DDI,eDP,FDI)
Haswell rPGA EDS
IV_HDMITX2#{28}
IV_HDMITX2{28}
IV_HDMITX1#{28}
IV_HDMITX1{28}
IV_HDMITX0#{28}
IV_HDMITX0{28}
IV_HDMICLK#{28}
IV_HDMICLK{28}
C C
B B
T28
DDIB_TXBN_0
U28
DDIB_TXBP_0
T30
DDIB_TXBN_1
U30
DDIB_TXBP_1
U29
DDIB_TXBN_2
V29
DDIB_TXBP_2
U31
DDIB_TXBN_3
V31
DDIB_TXBP_3
T34
DDIC_TXCN_0
U34
DDIC_TXCP_0
U35
DDIC_TXCN_1
V35
DDIC_TXCP_1
U32
DDIC_TXCN_2
T32
DDIC_TXCP_2
U33
DDIC_TXCN_3
V33
DDIC_TXCP_3
P29
DDID_TXDN_0
R29
DDID_TXDP_0
N28
DDID_TXDN_1
P28
DDID_TXDP_1
P31
DDID_TXDN_2
R31
DDID_TXDP_2
N30
DDID_TXDN_3
P30
DDID_TXDP_3
HSW_RPGA_EDS_PGA
eDP
EDP_AUXN
EDP_AUXP
EDP_HPD
EDP_RCOMP
EDP_DISP_UTIL
EDP_TXN_0
EDP_TXP_0
EDP_TXN_1
EDP_TXP_1
FDI_TXN_0
FDI_TXP_0
FDI_TXN_1
FDI_TXP_1
DDI
8 OF 9
U23H
M27
INT_EDP_AUXN
N27
INT_EDP_AUXP
P27
E24
EDP_RCOMP
R27
P35
INT_EDP_TXN0
R35
INT_EDP_TXP0
N34
INT_EDP_TXN1
P34
INT_EDP_TXP1
P33
FDI_TXN0
R33
FDI_TXP0
N32
FDI_TXN1
P32
FDI_TXP1
<CPU>
INT_EDP_AUXN {26}
INT_EDP_AUXP {26}
INT_EDP_HPD {29}
TP110
B2A
INT_EDP_TXN0 {26}
INT_EDP_TXP0 {26}
INT_EDP_TXN1 {26}
INT_EDP_TXP1 {26}
FDI_TXN0 {8}
FDI_TXP0 {8}
FDI_TXN1 {8}
FDI_TXP1 {8}
R134 24.9/F_4
+VCCIOA_OUT
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
Haswell 3/5 (DDI/eDP)
Haswell 3/5 (DDI/eDP)
Haswell 3/5 (DDI/eDP)
Thursday, December 20, 2012
Thursday, December 20, 2012
Thursday, December 20, 2012
1
BD6
BD6
BD6
5 49
5 49
5 49
1A
1A
1A
5
Haswell Processor (POWER)
TP32
TP31
TP29
TP28
K27
RSVD
L27
RSVD
T27
RSVD
V27
RSVD
AB11
VDDQ
AB2
VDDQ
AB5
VDDQ
AB8
VDDQ
AE11
VDDQ
AE2
VDDQ
AE5
VDDQ
AE8
VDDQ
AH11
VDDQ
K11
VDDQ
N11
VDDQ
N8
VDDQ
T11
VDDQ
T2
VDDQ
T5
VDDQ
T8
VDDQ
W11
VDDQ
W2
VDDQ
W5
VDDQ
W8
VDDQ
N26
RSVD
K26
VCC
AL27
RSVD
AK27
RSVD
AL35
VCC_SENSE
E17
RSVD
AN35
VCCIO_OUT
A23
FC_A23
F22
VCOMP_OUT
W32
RSVD
AL16
RSVD
J27
RSVD
AL13
RSVD
AM28
VIDALERT
AM29
VIDSCLK
AL28
VIDSOUT
AP35
VSS
H27
PWR_DEBUG
AP34
VSS
AT35
RSVD_TP
AR35
RSVD_TP
AR32
RSVD_TP
AL26
RSVD_TP
AT34
VSS
AL22
VSS
AT33
VSS
AM21
VSS
AM25
VSS
AM22
VSS
AM20
VSS
AM24
VSS
AL19
VSS
AM23
VSS
AT32
VSS
Y25
VCC
Y26
VCC
Y27
VCC
Y28
VCC
Y29
VCC
Y30
VCC
Y31
VCC
Y32
VCC
Y33
VCC
Y34
VCC
Y35
VCC
HSW_RPGA_EDS_PGA
Haswell rPGA EDS
+1.35V_CPU 4.2A
+1.35V_CPU
D D
VDDQ Output Decoupling Recommendations
330uFx2 7343
22uFx11
10uFx10
C C
B B
C515
10U/6.3V_8X
+VCCIO_OUT_R
0805
0805
300mA
300mA
C511
10U/6.3V_8X
C122
10U/6.3V_8X
C516
10U/6.3V_8X
C101
10U/6.3V_8X
BOT socket side
5 onTOP, 6 on BOT inside socket cavity
5 onTOP, 5 on BOT inside socket cavity
+VCC_CORE
VCC_SENSE{44}
+VCCIOA_OUT
C728
0.1U/10V_4X
C518
10U/6.3V_8X
C527
10U/6.3V_8X
C519
10U/6.3V_8X
C512
10U/6.3V_8X
+VCCIO_OUT
+VCCIO_PCH
B2A
C89
10U/6.3V_8X
C535
10U/6.3V_8X
C528
10U/6.3V_8X
C100
10U/6.3V_8X
R576 100_4
R575 0_4
R79 0_1206
R612 *0_1206
R611 0_1206
R88 0_4
C90
10U/6.3V_8X
C524
10U/6.3V_8X
C120
10U/6.3V_8X
C91
10U/6.3V_8X
C121
10U/6.3V_8X
C534
10U/6.3V_8X
C525
10U/6.3V_8X
C102
10U/6.3V_8X
+VCC_CORE
VCC_SENSE_R
+VCCIO_OUT_R
+VCCIO_PCH_R
+VCCIOA_OUT_R
H_CPU_SVIDART#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
PWR_DEBUG_R
+VCC_CORE
TP30
TP5
TP10
TP25
TP4
TP33
TP3
TP18
TP17
TP2
TP11
4
<CPU>
U23E
AA26
VCC
AA28
VCC
AA34
VCC
5 OF 9
AA30
VCC
AA32
VCC
AB26
VCC
AB29
VCC
AB25
VCC
AB27
VCC
AB28
VCC
AB30
VCC
AB31
VCC
AB33
VCC
AB34
VCC
AB32
VCC
AC26
VCC
AB35
VCC
AC28
VCC
AD25
VCC
AC30
VCC
AD28
VCC
AC32
VCC
AD31
VCC
AC34
VCC
AD34
VCC
AD26
VCC
AD27
VCC
AD29
VCC
AD30
VCC
AD32
VCC
AD33
VCC
AD35
VCC
AE26
VCC
AE32
VCC
AE28
VCC
AE30
VCC
AG28
VCC
AG34
VCC
AE34
VCC
AF25
VCC
AF26
VCC
AF27
VCC
AF28
VCC
AF29
VCC
AF30
VCC
AF31
VCC
AF32
VCC
AF33
VCC
AF34
VCC
AF35
VCC
AG26
VCC
AH26
VCC
AH29
VCC
AG30
VCC
AG32
VCC
AH32
VCC
AH35
VCC
AH25
VCC
AH27
VCC
AH28
VCC
AH30
VCC
AH31
VCC
AH33
VCC
AH34
VCC
AJ25
VCC
AJ26
VCC
AJ27
VCC
AJ28
VCC
AJ29
VCC
AJ30
VCC
AJ31
VCC
AJ32
VCC
AJ33
VCC
AJ34
VCC
AJ35
VCC
G25
VCC
H25
VCC
J25
VCC
K25
VCC
L25
VCC
M25
VCC
N25
VCC
P25
VCC
R25
VCC
T25
VCC
U25
VCC
U26
VCC
V25
VCC
V26
VCC
W26
VCC
W27
VCC
PC533
22U/6.3V_8X
PC539
22U/6.3V_8X
PC545
22U/6.3V_8X
PC534
22U/6.3V_8X
PC540
22U/6.3V_8X
PC546
22U/6.3V_8X
PC535
22U/6.3V_8X
PC541
22U/6.3V_8X
PC547
22U/6.3V_8X
+VCC_CORE 85A
PC536
22U/6.3V_8X
PC542
22U/6.3V_8X
3
PC537
22U/6.3V_8X
PC543
22U/6.3V_8X
PC538
22U/6.3V_8X
PC544
22U/6.3V_8X
B2A
+VCC_CORE
2
1
06
Power Test Propose
+1.05V +VCCIO_OUT+1.05V
SVID
<CPU>
Place PU resistor
close to CPU
H_CPU_SVIDDAT
Place PU resistor
close to CPU
H_CPU_SVIDART#
H_CPU_SVIDCLK
R143
150_4
PWR_DEBUG_R
R139
*10K_4
+VCCIO_OUT
R112
130/F_4
<CPU>
R113 0_4
R107 43_4
R110 0_4
R65 *0_8
R614 0_6
+VCCIO_OUT
C729
0.1U/10V_4X
+VCCIO_OUT
+VCCIO_PCH+1.05V
Near R112
B2A
R108
75/F_4
C49
*4.7U/6.3V_6X
C588
*4.7U/6.3V_6X
VR_SVIDDAT {44}
VR_SVIDART# {44}
VR_SVIDCLK {44}
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
Haswell 4/5 (POWER)
Haswell 4/5 (POWER)
Haswell 4/5 (POWER)
Thursday, December 20, 2012
Thursday, December 20, 2012
Thursday, December 20, 2012
1
BD6
BD6
BD6
6 49
6 49
6 49
1A
1A
1A
5
4
3
2
1
Haswell Processor (GND) Haswell Processor (CFG,RSVD)
Haswell rPGA EDS
A10
VSS
A13
VSS
A16
VSS
A19
VSS
A22
VSS
A25
VSS
A27
VSS
A29
VSS
A3
VSS
D D
C C
B B
A31
VSS
A33
VSS
A4
VSS
A7
VSS
AA11
VSS
AA25
VSS
AA27
VSS
AA31
VSS
AA29
VSS
AB1
VSS
AB10
VSS
AA33
VSS
AA35
VSS
AB3
VSS
AC25
VSS
AC27
VSS
AB4
VSS
AB6
VSS
AB7
VSS
AB9
VSS
AC11
VSS
AD11
VSS
AC29
VSS
AC31
VSS
AC33
VSS
AC35
VSS
AD7
VSS
AE1
VSS
AE10
VSS
AE25
VSS
AE29
VSS
AE3
VSS
AE27
VSS
AE35
VSS
AE4
VSS
AE6
VSS
AE7
VSS
AE9
VSS
AF11
VSS
AF6
VSS
AF8
VSS
AG11
VSS
AG25
VSS
AE31
VSS
AG31
VSS
AE33
VSS
AG6
VSS
AH1
VSS
AH10
VSS
AH2
VSS
AG27
VSS
AG29
VSS
AH3
VSS
AG33
VSS
AG35
VSS
AH4
VSS
AH5
VSS
AH6
VSS
AH7
VSS
AH8
VSS
AH9
VSS
AJ11
VSS
AJ5
VSS
AK11
VSS
AK25
VSS
AK26
VSS
AK28
VSS
AK29
VSS
AK30
VSS
AK32
VSS
E19
VSS
HSW_RPGA_EDS_PGA
U23F
AK34
VSS
AK5
VSS
AL1
VSS
AL10
VSS
AL11
VSS
AL12
VSS
AL14
VSS
AL15
VSS
AL17
VSS
AL18
VSS
AL2
VSS
AL20
VSS
AL21
VSS
AL23
VSS
E22
VSS
AL3
VSS
AL4
VSS
AL5
VSS
AL6
VSS
AL7
VSS
AL8
VSS
AL9
VSS
AM10
VSS
AM13
VSS
AM16
VSS
AM19
VSS
E25
VSS
AM32
VSS
AM4
VSS
AM7
VSS
AN10
VSS
AN13
VSS
AN16
VSS
AN19
VSS
AN2
VSS
AN21
VSS
AN24
VSS
AN27
VSS
AN30
VSS
AN34
VSS
AN4
VSS
AN7
VSS
AP1
VSS
AP10
VSS
AP13
VSS
AP16
VSS
AP19
VSS
AP4
VSS
AP7
VSS
W25
VSS
AR10
VSS
AR13
VSS
AR16
VSS
AR19
VSS
AR2
VSS
AR22
VSS
AR25
VSS
AR28
VSS
AR31
VSS
AR34
VSS
AR4
VSS
AR7
VSS
AT10
VSS
AT13
VSS
AT16
VSS
AT19
VSS
AT21
VSS
AT24
VSS
AT27
VSS
AT3
VSS
AT30
VSS
AT4
VSS
AT7
VSS
B10
VSS
B13
VSS
B16
VSS
B19
VSS
B2
VSS
B22
VSS
6 OF 9
Haswell rPGA EDS
B34
VSS
B4
VSS
B7
VSS
C1
VSS
C10
VSS
C13
VSS
C16
VSS
C19
VSS
C2
VSS
C22
VSS
C24
VSS
C26
VSS
C28
VSS
C30
VSS
C32
VSS
C34
VSS
C4
VSS
C7
VSS
D10
VSS
D13
VSS
D16
VSS
D19
VSS
D22
VSS
D25
VSS
D27
VSS
D29
VSS
D31
VSS
D33
VSS
D35
VSS
D4
VSS
D7
VSS
E1
VSS
E10
VSS
E13
VSS
E16
VSS
E4
VSS
E7
VSS
F10
VSS
F11
VSS
F12
VSS
F14
VSS
F15
VSS
F17
VSS
F18
VSS
F20
VSS
F21
VSS
F23
VSS
F24
VSS
F26
VSS
F28
VSS
F30
VSS
F32
VSS
F34
VSS
F4
VSS
F6
VSS
F7
VSS
F8
VSS
F9
VSS
G1
VSS
G11
VSS
G2
VSS
G27
VSS
G29
VSS
G3
VSS
G31
VSS
G33
VSS
G35
VSS
G4
VSS
G5
VSS
H10
VSS
H26
VSS
H6
VSS
H7
VSS
J11
VSS
J26
VSS
J28
VSS
J30
VSS
J32
VSS
J34
VSS
J6
VSS
K1
VSS
HSW_RPGA_EDS_PGA
<CPU> <CPU>
Haswell rPGA EDS
AT1
RSVD_TP
AT2
RSVD_TP
AD10
RSVD
A34
RSVD_TP
A35
RSVD_TP
W29
RSVD_TP
W28
RSVD_TP
G26
RSVD30
TESTLO_G26
W33
RSVD
AL30
RSVD
AL29
RSVD
F25
VCC
C35
RSVD_TP
B35
RSVD_TP
AL25
RSVD_TP
W30
RSVD38
RSVD_TP
W31
RSVD39
RSVD_TP
W34
TESTLO
TESTLO
AT20
CFG_0
AR20
CFG_1
AP20
CFG2
CFG_2
AP22
CFG_3
AT22
CFG4
CFG_4
AN22
CFG5
CFG_5
AT25
CFG6
CFG_6
AN23
CFG7
CFG_7
AR24
CFG_8
AT23
CFG_9
AN20
CFG_10
AP24
CFG_11
AP26
CFG_12
AN25
CFG_13
AN26
CFG_14
AP25
CFG_15
HSW_RPGA_EDS_PGA
The CFG signals have a default value of '1' if not terminated on the board.
x1 = Normal operation
x0 = Lane numbers reversed
x1 = Disabled
x0 = Enabled
x00 = 1 x8 & 2 x4 PCI Express
x01 = reserved
x10 = 2 x8 PCI Express
x11 = 1 x16 PCI Express
x1 = PEG train follow RESETB de-asseted
x0 = PEG wait for BIOS fro training
U23I
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
CFG_RCOMP
CFG_16
CFG_18
CFG_17
CFG_19
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
9 OF 9
NC
C23
B23
D24
D23
AT31
AR21
AR23
AP21
AP23
AR33
G6
AM27
AM26
F5
AM2
K6
E18
U10
P10
B1
A2
AR1
E21
E20
AP27
AR26
AL31
AL32
CFG2
CFG4
CFG6
CFG5
CFG7
CFG_RCOMP
R929 0_4
R930 0_4
R82 *EV@1K_4
R567 PIV@1K_4
R566 *EV@1K_4
R81 EV@1K_4
R83 *1K_4
7 OF 9
U23G
VSS_SENSE
RSVD
K10
VSS
K2
VSS
K29
VSS
K3
VSS
K31
VSS
K33
VSS
K35
VSS
K4
VSS
K5
VSS
K7
VSS
K8
VSS
K9
VSS
L11
VSS
L26
VSS
L6
VSS
M11
VSS
M26
VSS
M28
VSS
M30
VSS
M32
VSS
M34
VSS
M6
VSS
N1
VSS
N10
VSS
N2
VSS
N29
VSS
N3
VSS
N31
VSS
N33
VSS
N35
VSS
N4
VSS
N5
VSS
N6
VSS
N7
VSS
N9
VSS
P11
VSS
P26
VSS
P5
VSS
R11
VSS
R26
VSS
R28
VSS
R30
VSS
R32
VSS
R34
VSS
R5
VSS
T1
VSS
T10
VSS
T29
VSS
T3
VSS
T31
VSS
T33
VSS
T35
VSS
T4
VSS
T6
VSS
T7
VSS
T9
VSS
U11
VSS
U27
VSS
V11
VSS
V28
VSS
V30
VSS
V32
VSS
V34
VSS
W1
VSS
W10
VSS
W3
VSS
W35
VSS
W4
VSS
W6
VSS
W7
VSS
W9
VSS
Y11
VSS
H11
VSS
AL24
VSS
F19
VSS
T26
VSS
AK35
VSS_SENSE_R
AK33
R607 49.9/F_4
CFG[2] PCI Express Static Lane Reversal
CFG[4]
CFG[6:5]
CFG[7]
R582 0_4
R583 100_4
R135 49.9/F_4
+VCC_CORE
TP26
TP27
TP80
TP79
TP86
TP72
TP76
TP88
TP84
TP82
TP75
TP74
TP83
Configuration Signals:
eDP enable
PCI Express Bifurcation
PEG defer training
VSS_SENSE {44}
R565 49.9/F_4
TP87
TP85
TP78
TP77
R927 *2.2K_4
R928
*1K_4
B2A
B2A
B2A
SYS_PWROK_R
07
SYS_PWROK_R {8,27}
B2A
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
Haswell 5/5 (CFG/GND)
Haswell 5/5 (CFG/GND)
Haswell 5/5 (CFG/GND)
Thursday, December 20, 2012
Thursday, December 20, 2012
Thursday, December 20, 2012
1
BD6
BD6
BD6
7 49
7 49
7 49
1A
1A
1A
5
4
3
2
1
Lynx Point (DMI,FDI,PM)
(DSW)
(SUS)
(DSW)
LPT_PCH_M_EDS
DMI
System Power
Management
REV = 5
(SUS)
FDI
(SUS)
(SUS)
(SUS)
U31B
DMI_IREF
DMI_RCOMP
SUSACK#_R
SYS_RESET#
SYS_PWROK_R
PCH_PWROK
PCH_APWROK
PCH_SUSPWRACK
PCH_PWRBTN#
PCH_ACPRESENT
PCH_BATLOW#
PCH_RI#
PCH_SLP_WLAN#
B2A
AW22
DMI_RXN_0
AR20
DMI_RXN_1
AP17
DMI_RXN_2
AV20
DMI_RXN_3
AY22
DMI_RXP_0
AP20
DMI_RXP_1
AR17
DMI_RXP_2
AW20
DMI_RXP_3
BD21
DMI_TXN_0
BE20
DMI_TXN_1
BD17
DMI_TXN_2
BE18
DMI_TXN_3
BB21
DMI_TXP_0
BC20
DMI_TXP_1
BB17
DMI_TXP_2
BC18
DMI_TXP_3
BE16
DMI_IREF
AW17
TP12
AV17
TP7
AY17
DMI_RCOMP
R6
SUSACK#
AM1
SYS_RESET#
AD7
SYS_PWROK
F10
PWROK
AB7
APWROK
H3
DRAMPWROK
J2
RSMRST#
J4
SUSWARN#/SUSPW RNACK/GPIO30
K1
PWRBTN#
E6
ACPRESENT/GPIO31
K7
BATLOW#/GPIO72
N4
RI#
AB10
TP21
D2
SLP_WLAN#/GPIO29
LPT_PCH_M_EDS/BGA
DMI_RXN0{3}
DMI_RXN1{3}
DMI_RXN2{3}
DMI_RXN3{3}
D D
XDP_DBRST#{3,25}
PM_DRAM_PWRGD{27}
C C
DNBSWON#{37}
PCH_SLP_WLAN#{37}
DMI_RXP0{3}
DMI_RXP1{3}
DMI_RXP2{3}
DMI_RXP3{3}
DMI_TXN0{3}
DMI_TXN1{3}
DMI_TXN2{3}
DMI_TXN3{3}
DMI_TXP0{3}
DMI_TXP1{3}
DMI_TXP2{3}
DMI_TXP3{3}
R759 0_4
+1.5V
R772 7.5K/F_4
R796 0_4
RSMRST#{25,37}
R846 0_4
TP54
FDI_RXN_0
FDI_RXN_1
FDI_RXP_0
FDI_RXP_1
FDI_CSYNC
FDI_INT
FDI_IREF
FDI_RCOMP
DSWVRMEN
DPWROK
WAKE#
CLKRUN#
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN#
4 OF 11
<CLG>
TP16
TP5
TP15
TP10
TP17
TP13
AJ35
AL35
AJ36
AL36
AV43
AY45
AV45
AW44
AL39
AL40
AT45
AU42
AU44
AR44
C8
L13
K3
AN7
U7
Y6
Y7
C6
H1
F3
F1
AY3
G5
FDI_IREF
FDI_RCOMP
DSWVREN
DPWROK
PCIE_WAKE#
CLKRUN#
SUS_STAT#
PCH_SUSCLK
PCH_SLP_S5#
PCH_SLP_A#
PCH_SLP_SUS#
PCH_SLP_LAN#
FDI_TXN0 {5}
FDI_TXN1 {5}
FDI_TXP0 {5}
FDI_TXP1 {5}
FDI_CSYNC {3}
FDI_INT {3}
R768 0_4
R767 7.5K/F_4
DSWVREN {9}
PCIE_WAKE# {30,35}
CLKRUN# {37}
TP55
R358 0_4
TP53
SUSC# {37}
SUSB# {37,40}
TP103
PM_SYNC {3}
B2A
+1.5V
SUSCLK {9,37}
C357
*E@10P/50V_4C
Lynx Point (CRT,PCI,DDI CNTL)
(CORE)
(CORE)
(CORE)
(CORE)
(CORE)
(CORE)
LPT_PCH_M_EV
LVDSCRT
REV = 5
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPB_AUXN
DDPC_AUXN
DDPD_AUXN
DISPLAY
DDPB_AUXP
DDPC_AUXP
DDPD_AUXP
DDPB_HPD
DDPC_HPD
DDPD_HPD
PCI
(CORE)
PIRQE#/GPIO2
(CORE)
PIRQF#/GPIO3
(CORE)
PIRQG#/GPIO4
(CORE)
PIRQH#/GPIO5
PME#
PLTRST#
5 OF 11
<CLG>
DGPU_PWR_EN{20}
U31E
CRT_HSYNC_R
CRT_VSYNC_R
DAC_IREF
LVDS_BKLT_PCH
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
DGPU_HOLD_RST#
GPIO52
BBS_BIT1
GPIO53
STP_A16OVR
T45
VGA_BLUE
U44
VGA_GREEN
V45
VGA_RED
M43
VGA_DDC_CLK
M45
VGA_DDC_DATA
N42
VGA_HSYNC
N44
VGA_VSYNC
U40
DAC_IREF
U39
VGA_IRTN
N36
EDP_BKLTCTL
K36
EDP_BKLTEN
G36
EDP_VDDEN
H20
PIRQA#
L20
PIRQB#
K17
PIRQC#
M20
PIRQD#
A12
GPIO50
B13
GPIO52
C12
GPIO54
C10
GPIO51
A10
GPIO53
AL6
GPIO55
LPT_PCH_M_EDS/BGA
INT_CRT_BLU{29}
INT_CRT_GRN{29}
INT_CRT_RED{29}
INT_CRT_DDCCLK{29}
INT_CRT_DDCDAT{29}
INT_HSYNC{29}
INT_VSYNC{29}
PCH_BRIGHT{26}
LVDS_BKLT_PCH{26,29}
INT_LVDS_DIGON{29}
GPIO52{11,38}
DGPU_HOLD_RST#{16}
R844 PICRT@33_4
R842 PICRT@33_4
R370 PICRT@649/F_4
R371 OEV@0_4
DGPU_PWR_EN
BBS_BIT1{9}
TP107
STP_A16OVR{9}
GPIO53 can not PD
R40
R39
R35
R36
N40
N38
H45
K43
J42
H43
K45
J44
K40
K38
H39
G17
F17
L15
M15
AD10
Y11
BOARD_ID14
BOARD_ID3
BOARD_ID0
PCI_PME#
PCI_PLTRST#
<CLG>
DGPU_PWR_EN
HDMI_DDCCLK {28}
HDMI_DDCDATA {28}
HDMI_CON_HP_PCH {28}
ODD_MD# {33}
BOARD_ID14 {11}
BOARD_ID3 {11}
BOARD_ID0 {11}
TP52
+3V
R282
PX@1K_4
3
2
1
B2A
DGPU_PWR_EN_R
Q30
PX@ME2N7002E_200MA
DGPU_PWR_EN_R {47}
08
B B
PCH PWROK&APWROK CRT IMPEDANCE MATCHING
DELAY_VR_PWRGOOD{3,8,44}
A A
<CLG>
<CLG>
B2A
+3V
+3V_DS3
+VCCPDSW
PCH_PWROK
PCH_APWROK
B2A
PCI_PLTRST#
SYSPWOK DSW CircuitPCH PM PU/PD
SYS_PWROK_R{7,27}
R414 0_4
MPWROK
R416 *0_4
R400 *0_4
R417 0_4
<CLG> <CLG>
SYS_RESET#
CLKRUN#
PM_DRAM_PWRGD
PCH_RI#
PCH_SUSPWRACK
SYS_PWROK_R
PCH_PWROK
RSMRST#
PCH_SLP_LAN#
PCH_SLP_WLAN#
R799 1K_4
R790 8.2K_4
R854 *DS3@200/F_4
R843 10K_4
R855 10K_4
R348 10K_4
R415 10K_4
R853 10K_4
R862 *10K_4
R401 10K_4
5
+3V_DS3
C396 *0.1U/10V_4X
2
1
U14
3 5
*TC7SH08FU
R418 *SHORT_4
R460 0_4
SYS_PWROK_R
4
B2A
4
R454
100K_4
R419 EV@0_4
+3V_DS3
C398
*0.1U/10V_4X
2
4
1
U13 *TC7SH08FU(F)
3 5
PLTRST# {3,30,35,36,37,38}
B2A
MPWROK
C397
*E@10P/50V_4C
VGA_PLTRST# {16}
DELAY_VR_PWRGOOD {3,8,44}
MPWROK {25,37,44}
PCI PUPLTRST# Buffer
<CLG> <CLG> <CLG>
DGPU_HOLD_RST#
DGPU_PWR_EN
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
ODD_MD#
R887 10K_4
R888 10K_4
R886 10K_4
R891 8.2K_4
R885 8.2K_4
R890 8.2K_4
R884 8.2K_4
+3V
<CLG>
PCH_ACPRESENT
SUSACK#_R
PCH_SUSPWRACK
DPWROK
PCH_SLP_SUS#
3
PCH WAKE EVENT
GPIO27{11,37}
R423 10K_4
R422 DS3@0_4
Reserve for DS3
R94 DS3@0_4
R848 0_4
R856 NDS3@0_4
R865 DS3@0_4
R861 DS3@100K_4
R859 DS3@0_4
PCH_BATLOW#
PCH_PWRBTN#
PCIE_WAKE#
GPIO27
+VCCPDSW
AC_PRESENT {37}
SUSACK# {37}
SUS_PWR_ACK {37}
RSMRST#
SYS_HWPG {37,41}
SLP_SUS# {12,37}
R425 8.2K_4
R412 *DS3@10K_4
R398 DS3@10K_4
R397 NDS3@10K_4
R404 DS3@10K_4
R405 NDS3@10K_4
B2A
2
+VCCPDSW
+VCCPDSW
+VCCPDSW
+3V_S5
+VCCPDSW
+3V_S5
Net Name
AC_PRESENT
SUS_PWR_ACK
SUSACK#_R
DPWROK
SLP_SUS
R840 PICRT@150/F_4
R836 PICRT@150/F_4
R826 PICRT@150/F_4
B2A
Deep Sx SupportVDeep Sx No Support
V NA
V
V NA
V NA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
NA
V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 1/6 (DMI/FDI/VGA)
LPT 1/6 (DMI/FDI/VGA)
LPT 1/6 (DMI/FDI/VGA)
Thursday, December 20, 2012
Thursday, December 20, 2012
Thursday, December 20, 2012
1
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
BD6
BD6
BD6
8 49
8 49
8 49
1A
1A
1A
23
Y4
32.768KHZ_10
4 1
<RTC>
D10 *RB500V-40_100MA
D8
D9 *RB500V-4 0_100MA
<CLG>
+3V
R762 10K_4
R793 10K_4
R788 10K_4
R785 10K_4
5
<CLG>
BAT54C-7-F_200MA
B2A
RTC_X1
R864
10M_4
RTC_X2
SERIRQ
SATA_LED#
GPIO21
BBS_BIT0
R814
XDP@210/F_4
R813
XDP@100/F_4
+3V_DS3
+3V_RTC
R467 20K_4
C682
1U/6.3V_4X
G2
*SHORT PAD
Trace = 30mils for power
B2A
R466 20K_4
C408
1U/6.3V_4X
B2A
C407
1U/6.3V_4X
R818
XDP@210/F_4
PCH_JTAG_TDO_R
PCH_JTAG_TDI_R
PCH_JTAG_TMS_R
PCH_JTAG_TCK_R
R825
R820
XDP@51_4
XDP@100/F_4
RTC_RST#
G3
*SHORT PAD
SRTC_RST#
G1
*SHORT PAD
RTC Clock 32.768KHz (RTC)
C675 18P/50V_4C
C676 18P/50V_4C
RTC Circuitry (RTC)
D D
+3VPCU
+R_3VRTC_R
+R_3VRTC
R481
1K_4
12
CN14
AAA-BAT-054-K01
PU & Password Clear
C C
PCH JTAG
PCH_JTAG_TDO{25 }
PCH_JTAG_TDI{25}
PCH_JTAG_TMS{ 25}
PCH_JTAG_TCK{25}
<CLG>
JTAG_TCK,JTAG_TMS
Trace Length < 9000mils
R819 XDP@0_4
R816 XDP@0_4
R821 XDP@0_4
R824 XDP@0_4
B2A
1
R485 *SHORT_4
U9
1
CE#
6
SCK
5
SI
2
SO
HOLD#
3
WP#
W25Q64FVSSIQ
U8
1
CE#
6
SCK
5
SI
2
SO
HOLD#
3
WP#
*W25Q16BVSSIG
+5V
R482
*33K/F_4
2
Q37
*2N7002K_300MA
PCH_SPI_CS0#_R2R
PCH_SPI_CLK_R2R
PCH_SPI_SO_RR
PCH_SPI_SI_R2R
8
VDD
7
SPI_HOLD#
4
VSS
8
VDD
7
SPI_HOLD#
4
VSS
HDA
<CLG>
B B
ACZ_RST#_AUDIO{34}
ACZ_SDOUT_AUDIO{34}
BIT_CLK_AUDIO{34}
ACZ_SYNC_AUDIO{34}
ACZ_SDIN0_AUDIO{34}
PCH Dual SPI
EC+BIOS @4M
ME@2M
A A
<CLG>
PCH_SPI_CS0#_R2
PCH_SPI_CLK_R2
PCH_SPI_SI_R2
PCH_SPI_SO_R
+3V_DS3
B2A
PCH_SPI_CS1#_R2
PCH_SPI_CLK_R2
PCH_SPI_SI_R2
PCH_SPI_SO_R
R889 33_4
R883 33_4
R882 33_4
R484 33_4
PCH_SPI_IO2
5
HDA_RST#_R
HDA_SDO_R
HDA_BCLK_R
C674 *0.1U/16V_4Y
HDA_SYNC_R
ACZ_SDIN0_AUDIO
PCH_SPI_CS0#{37}
PCH_SPI_CLK{37}
PCH_SPI_SI{37}
PCH_SPI_SO{37}
R21533_4
R20633_4
R20533_4
R217 3.3K/F_4
R214 *15_4
R191 *33_4
R216 *33_4
R211 *33_4
R200 *33_4
HDA_SYNC_R HDA_SYNC_Q
R483
*1M_4
R192 33_4
R199 33_4
R202 33_4
R212 33_4
PCH_SPI_CS0#_R2R
PCH_SPI_CLK_R2R
PCH_SPI_SI_R2R
PCH_SPI_SO_RR
C232
*22P/50V_4N
PCH_SPI_CS1#_R2RR
PCH_SPI_CLK_R2R_R
PCH_SPI_SI_R2R_R
PCH_SPI_SO_R1_R
C230
*22P/50V_4N
SPI_WP#
+3V_RTC
PM_TEST_RST#{25}
3
R878 1M_4
PCBEEP{34}
TP104
BOARD_ID16{11}
B2A
C420
*33P/50V_4N
R190 3.3K/F_4
R195 *15_4
4
Lynx Point (RTC,IHDA,SATA,JTAG)
U31A
B5
RTC_X1
RTC_X2
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
RTC_RST#
HDA_BCLK_R
HDA_SYNC_Q
PCBEEP
HDA_RST#_R
ACZ_SDIN0_AUDIO
HDA_SDO_R
GPIO33
BOARD_ID16
PCH_JTAG_TCK_R
PCH_JTAG_TMS_R
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
R387 *0_4
R354 *0_4
RTCX1
B4
RTCX2
B9
SRTCRST#
A8
INTRUDER#
G10
INTVRMEN
D9
RTCRST#
B25
HDA_BCLK
A22
HDA_SYNC
AL10
SPKR
C24
HDA_RST#
L22
HDA_SDI0
K22
HDA_SDI1
G22
HDA_SDI2
F22
HDA_SDI3
A24
HDA_SDO
B17
DOCKEN#/GPIO33
C22
HDA_DOCK_RST#/GPIO13
AB3
JTAG_TCK
AD1
JTAG_TMS
AE2
JTAG_TDI
AD3
JTAG_TDO
F8
TP25
C26
TP22
AB6
TP20
LPT_PCH_M_EDS/BGA
SMBus
(CORE)
JTAGRTC AZALIA
<CLG>
+3V_DS3
SMB_RUN_CLK{14,15,30,38 }
SMB_RUN_DAT{14,15,30,38}
LPT_PCH_M_EDS
(SUS)
+3V
PCH STRAPING
Pin Name
SPKR
GPIO62 / SUSCLK
B2A
C220
0.1U/16V_4Y
GPIO55
INTVRMEN
GPIO51
SATA1GP/GPIO19
HDA_SDO
GPIO36
SATA3GP/GPIO37
GPIO8
GPIO28
DSWVREN
+3V_DS3
PCH_SPI_IO3SPI_WP#
+3V_DS3
B2A
C223
*0.1U/16V_4Y
4
REV = 5
SATA
R392 10K_4
R863 10K_4
R474 2.2K_4
R476 2.2K_4
R369 2.2K_4
R384 2.2K_4
R480 2.2K_4
R492 2.2K_4
R486 4.7K_4
R487 4.7K_4
B2A
(CORE)
(CORE)
1 OF 11
SATA_RXN_0
SATA_RXP_0
SATA_TXN_0
SATA_TXP_0
SATA_RXN_1
SATA_RXP_1
SATA_TXN_1
SATA_TXP_1
SATA_RXN_2
SATA_RXP_2
SATA_TXN_2
SATA_TXP_2
SATA_RXN_3
SATA_RXP_3
SATA_TXN_3
SATA_TXP_3
SATA_RXN4/PERN1
SATA_RXP4/PERP1
SATA_TXN4/PETN1
SATA_TXP4/PETP1
SATA_RXN5/PERN2
SATA_RXP5/PERP2
SATA_TXN5/PETN2
SATA_TXP5/PETP2
SATA_RCOMP
SATA0GP/GPIO21
SATA1GP/GPIO19
SMBALERT#
PCH_TEMP_ALERT#
SCLK
SDATA
SMB_ME0_CLK
SMB_ME0_DAT
SMB_ME1_CLK
SMB_ME1_DAT
Q38B 2N7002KDW_115MA
126
Q38A 2N700 2KDW_115MA
Usage
No Reboot
PLL On-Die Voltage
Regulator Enable
Top-Block Swap Override
Integrated VRM Enable
Boot BIOS Strap bit 1
Boot BIOS Strap bit 0
Flash Descriptor Security
Override / Intel ME Debug Mode
RSVD
TLS Confidentiality
RSVD RSMRST#
PLL on die VR enable RSMRST#
On Die DSW VR Enable
3
<CLG> <CLG>
BC8
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
TP97
TP98
TP48
TP47
R774 7.5K/F_4
R789 0_4
R786 0_4
R773 0_4
B2A
SATA_RXN_ODD# {33}
SATA_RXP_ODD {33}
SATA_TXN_ODD# {33}
SATA_TXP_ODD {33}
SATA_RXN_1ST_HDD# {33}
SATA_RXP_1ST_HDD {33}
SATA_TXN_1ST_HDD# {33}
SATA_TXP_1ST_HDD {33}
+1.5V
XDP_FN8 {25 }
XDP_FN9 {25 }
+1.5V
SATALED#
SATA_IREF
BE8
AW8
AY8
BC10
BE10
AV10
AW10
BB9
BD9
AY13
AW13
BC12
BE12
AR13
AT13
BD13
BB13
AV15
AW15
BC14
BE14
AP15
AR15
AY5
SATA_RCOMP
AP3
SATA_LED#
AT1
GPIO21
AU2
BBS_BIT0
BD4
SATA_IREF
BA2
TP9
BB2
TP8
Lynx Point (LPC,SPI,SMBUS,C-LINK,THERMAL)
LAD0
LAD0{30,37}
LAD1
LAD1{30,37}
LAD2
LAD2{30,37}
LAD3
LAD3{30,37}
LFRAME#
LFRAME#{30,37}
PCH_DRQ#0
TP109
B2A
BOARD_ID17{11}
BOARD_ID17
SERIRQ
SERIRQ{37}
PCH_SPI_CLK_R2
PCH_SPI_CS0#_R2
PCH_SPI_CS1#_R2
PCH_SPI_SI_R2
PCH_SPI_SO_R
PCH_SPI_IO2
PCH_SPI_IO3
2
U31D
A20
LAD_0
C20
LAD_1
A18
LAD_2
C18
LAD_3
B21
LFRAME#
D21
LDRQ0#
G20
LDRQ1#/GPIO23
AL11
SERIRQ
AJ11
SPI_CLK
AJ7
SPI_CS0#
AL7
SPI_CS1#
AJ10
SPI_CS2#
AH1
SPI_MOSI
AH3
SPI_MISO
AJ4
SPI_IO2
AJ2
SPI_IO3
LPT_PCH_M_EDS/BGA
(CORE)
SPILPC
LPT_PCH_M_EDS
REV = 5
SMBus
(SUS)
C-Link
Thermal
(SUS)
SMBALERT#/GPIO11
(SUS)
SML0ALERT#/GPIO60
SML1ALERT#/PCHHOT#/GPIO74
(SUS)
SML1CLK/GPIO58
(SUS)
SML1DATA/GPIO75
3 OF 11
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK
CL_DATA
CL_RST#
TD_IREF
EC 2nd_SMB read SML1 Bus of PCH temps
+3V_DS3
B2A
5
2ND_MBCLK{26,37}
34
SCLK
5
SDATA
2ND_MBDATA{26,37}
3 4
6
+3V_DS3
2
*2N7002KDW_115MA
SMB_ME1_CLK
Q40B
*2N7002KDW_115MA
B2A
1
SMB_ME1_DAT
Q40A
B2A
Sampled
PWROK
RSMRST#
PWROK
Always
PWROK
PWROK
PWROK
PWROK
PWROK
Always Must be PU to VCCRTC
3
Configuration
0 = Disable (Int PD)
1 = Enable
0 = Disable
1 = Enable (Int PU)
0 = Top-Block Swap mode
1 = Default (Int PU)
0 = Disable
1 = Enable
Bit1 Bit0
1 0 Resvered
1 1 SPI
0 0 LPC
0 = Security Effect (Int PD)
1 = Can be Override
Internal PD
0 = TLS no confidentiality (Int PD)
1 = TLS with confidentiality
Internal PU
0 = Disable
1 = Enable (Int PU)
1 = Enable
0 = Disable
+3V
ACZ_SDOUT_R{37}
PCBEEP
SUSCLK{8,37}
STP_A16OVR{8}
PCH_INVRMEN
R871 10K_4
BBS_BIT1{8}
BBS_BIT0
GPIO36{11}
FDI_OVRVLTG{11}
GPIO8{11}
PLL_ODVR_EN{11}
DSWVREN{8}
HDA_SDO_R
Circuitry
R345 *1K_4
R357 *1K_4
R340 *1K_4
R403 330K_4R19833_4
R870 *1K_4
R784 *1K_4
R874 *1K_4
R791 *1K_4
R804 1K_4
R827 10K_4
R352 *1K_4
R876 330K_4
R877 *330K_4
+3V
+3V_RTC
+VCC_HDA_IO
+3V
+3V
+3V_RTC
2
1
N7
SMBALERT#
R10
SCLK
U11
SDATA
N8
DRAMRST_CNTRL_PCH
U8
SMB_ME0_CLK
R7
SMB_ME0_DAT
H6
PCH_TEMP_ALERT#
K6
SMB_ME1_CLK
N11
SMB_ME1_DAT
AF11
CL_CLK
AF10
CL_DAT
AF7
CL_RST#
BA45
TP1
BC45
TP2
BE43
TP4
BE44
TP3
AY43
TD_IREF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, December 20, 2012
Date: Sheet of
Thursday, December 20, 2012
Date: Sheet of
Thursday, December 20, 2012
SCLK {25,30}
SDATA {25,30}
DRAMRST_CNTRL_PCH {10,27}
TP51
TP49
TP50
R769 8.2K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LPT 2/6 (SATA/HDA/SPI)
LPT 2/6 (SATA/HDA/SPI)
LPT 2/6 (SATA/HDA/SPI)
1
B2A
BD6
BD6
BD6
09
9 49
9 49
9 49
1A
1A
1A
5
4
3
2
1
10
D D
Lynx Point (PCIE,USB3.0,USB2.0)
U31I
AW31
PERN1/USB3RN3
AY31
PERP1/USB3RP3
BE32
PETN1/USB3TN3
BC32
PETP1/USB3TP3
AT31
PERN2/USB3RN4
AR31
PERP2/USB3RP4
BD33
PETN2/USB3TN4
BB33
PETP2/USB3TP4
PCIE_IREF
PCIE_RCOMP
AW33
AY33
BE34
BC34
AT33
AR33
BE36
BC36
AW36
AV36
BD37
BB37
AY38
AW38
BC38
BE38
AT40
AT39
BE40
BC40
AN38
AN39
BD42
BD41
BE30
BC30
BB29
BD29
Co-Lay
Co-Lay
Co-Lay
PERN_3
PERP_3
PETN_3
PETP_3
PERN_4
PERP_4
PETN_4
PETP_4
PERN_5
PERP_5
PETN_5
PETP_5
PERN_6
PERP_6
PETN_6
PETP_6
PERN_7
PERP_7
PETN_7
PETP_7
PERN_8
PERP_8
PETN_8
PETP_8
PCIE_IREF
TP11
TP6
PCIE_RCOMP
LPT_PCH_M_EDS/BGA
Q60A DS3@2N7002KDW_115MA
Q60B DS3@2N7002KDW_115MA
Q59A DS3@2N7002KDW_115MA
Q59B DS3@2N7002KDW_115MA
PCIE_RXN_WLAN#{30}
PCIE_RXP_WLAN{30}
WLAN
PCIE_TXN_WLAN#{30}
PCIE_TXP_WLAN{30}
PCIE_RXN_LAN#{35}
LAN
PCIE_RXP_LAN{35}
PCIE_TXN_LAN#{35}
PCIE_TXP_LAN{35}
C C
B B
A A
C665 0.1U/10V_4X
C664 0.1U/10V_4X
C662 LAN@0.1U/10V_4X
C663 LAN@0.1U/10V_4X
R770 0_4
+1.5V
R771 7.5K/F_4
PCIE_TXN_WLAN#_C
PCIE_TXP_WLAN_C
PCIE_TXN_LAN#_C
PCIE_TXP_LAN_C USB_CCD
USB_SC_OC#_R
USB_OC1#
USB_Normal_OC#_L_Q
SCI#_R
+3V_DS3
126
R897 NDS3@0_4
R901 NS3@0_4
+3V_DS3
5
34
R364 NDS3@0_4
R902 NS3@0_4
+3V_DS3
126
R903 NDS3@0_4
R905 NS3@0_4
+3V_DS3
5
34
R898 NDS3@0_4
R906 NS3@0_4
LPT_PCH_M_EDS
PCIe
USB
9 OF 11
(SUS)
(SUS)
(SUS)
(SUS)
(SUS)
(SUS)
(SUS)
(SUS)
B37
USB2N0
D37
USB2P0
A38
USB2N1
C38
USB2P1
A36
USB2N2
C36
USB2P2
A34
USB2N3
C34
USB2P3
B33
USB2N4
D33
USB2P4
F31
USB2N5
G31
USB2P5
K31
USB2N6
L31
USB2P6
G29
USB2N7
H29
USB2P7
A32
USB2N8
C32
USB2P8
A30
USB2N9
C30
USB2P9
B29
USB2N10
D29
USB2P10
A28
USB2N11
C28
USB2P11
G26
USB2N12
F26
USB2P12
F24
USB2N13
G24
USB2P13
AR26
USB3RN1
AP26
USB3RP1
BE24
USB3TN1
BD23
USB3TP1
AW26
USB3RN2
AV26
USB3RP2
BD25
USB3TN2
BC24
USB3TP2
AW29
USB3RN5
AV29
USB3RP5
BE26
USB3TN5
BC26
USB3TP5
AR29
USB3RN6
AP29
USB3RP6
BD27
USB3TN6
BE28
USB3TP6
K24
USBRBIAS#
K26
USBRBIAS
M33
TP24
L33
TP23
P3
OC0#/GPIO59
V1
OC1#/GPIO40
U2
OC2#/GPIO41
P1
OC3#/GPIO42
M3
OC4#/GPIO43
T1
OC5#/GPIO9
N2
OC6#/GPIO10
M1
OC7#/GPIO14
USB_SC_OC# {31,37}
USB_Normal_OC#_R {31,37}
USB_Normal_OC#_L {31,37}
SCI# {37}
Co-Lay B2A
5
4
USBP3N
USBP3P
USB_WLAN#
USB_WLAN
USB_CCD#
USBCOMP
USB_SC_OC#_R
USB_OC1#
GPIO41
GPIO42
USB_OC4#
USB30_SMI#
GPIO10
SCI#_R
R362 0_4
R366 0_4
<CLG,U3B,MNW>
USB20#_R1 {31}
USB 2.0(R1)
USB20_R1 {31}
USB20#_R2 {31}
USB 2.0(R2)
USB20_R2 {31}
USB20#_L1 {31}
USB 2.0(L1)
USB20_L1 {31}
USBP3N {38}
USB Touch
USBP3P {38}
B2A
USB_CARD# {36}
(CARD READER)
USB_CARD {36}
USB20#_L2 {31}
(USB2.0 L2)
USB20_L2 {31}
USB_WLAN# {30}
(WLAN)
USB_WLAN {30}
USB_CCD# {29}
(CCD)
USB_CCD {29}
USB30_RXN1_R {31}
USB30_RXP1_R {31}
USB30_TXN1_R {31}
USB30_TXP1_R {31}
USB30_RXN2_R {31}
USB30_RXP2_R {31}
USB30_TXN2_R {31}
USB30_TXP2_R {31}
R391 22.6/F_4
USB_Normal_OC#_L_Q
USB_Normal_OC#_L_Q
USB_OC1#
USB_OC4#
GPIO42
USB 3.0(R1)
USB 3.0(R2)
B2A
USB 3.0 Combo Port
+3V_DS3
RP18
10
9
8
7 4
10KX8
EHCI1 EHCI2 xHCI
1
2
3
56
LAN
WLAN
USB 2.0_S&C_OC0#(R1)
USB 2.0_Normal_OC#(R2)
USB 2.0_Normal_OC#(L1&L2)
PCH Intenal ClockUSB Overcurrent PCH XDP Signal
PCIE_CLK_LAN_REQ#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
B2A
CLK_PCIE_REQ6#
GPIO46
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PEGA_REQ#
GPIO10
USB_SC_OC#_R
SCI#_R
USB30_SMI#GPIO41
3
Lynx Point (CLOCK)
XTAL25_IN
XTAL25_OUT
+3V_DS3
B2A
DRAMRST_CNTRL_PCH
LPT_PCH_M_EDS
(SUS)
(CORE)
(CORE)
(SUS)
(SUS)
(SUS)
(SUS)
(SUS)
(SUS)
PEGA_CLKRQ#/GPIO47
(SUS)
PEGB_CLKRQ#/GPIO56
CLKIN_33MHZLOOPBACK
(CORE)
CLKOUTFLEX0/GPIO64
(CORE)
CLKOUTFLEX1/GPIO65
(CORE)
CLKOUTFLEX2/GPIO66
(CORE)
CLKOUTFLEX3/GPIO67
2 OF 11
R797
1M_4
R386 1K_4
R385 *10K_4
R812 LAN@0X2
2
1
CLK_PCIE_LAN#{35}
CLK_PCIE_LAN{35}
PCIE_CLK_LAN_REQ#{35} CLK_PEGA_REQ# {16}
CLK_PCIE_WLAN#{30}
CLK_PCIE_WLAN{30}
PCIE_CLK_WLAN_REQ#{30}
TP100
TP101
PCLK_591{37}
C678
E@4.7P/50V_4C
CLK_PCI_FB
PCLK_DEBUG{30}
4
3
PCIE_CLK_LAN_REQ#
R807 0X2
2
1
CLK_PCIE_WLAN#_R
4
3
CLK_PCIE_WLAN_R
PCIE_CLK_WLAN_REQ#
TP59
TP102
CLK_PCH_PCI2
R866 22_4
R393 NMP@22_4
R867 22_4
CLK_PCH_PCI4
C677
E@4.7P/50V_4C
CLK_PCIE_LAN#_R
CLK_PCIE_LAN_R
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
CLK_PCIE_REQ6#
GPIO46
CLK_PCIE_XDPN
CLK_PCIE_XDPP
CLK_PCH_PCI0
CLK_PCH_PCI1
CLK_PCH_PCI3
B2A
<CLG><CLG>
R841 10K_4
R829 10K_4
R839 10K_4
R828 10K_4
R815 10K_4
R835 10K_4
R806 10K_4 R399 XDP@0_4
R810 10K_4
R346 10K_4
R347 *10K_4
+3V_DS3
+3V
+3V_DS3
B2A
CLK_BUF_EXPN
CLK_BUF_EXPPPCIE_CLK_WLAN_REQ#
CLK_BUF_CPYCKN
CLK_BUF_CPYCKP
CLK_BUF_DOT96N
CLK_BUF_DOT96P
CLK_BUF_CKSSCDN
CLK_BUF_CKSSCDP
CLK_BUF_REF14
S3_STRAP
B2A
R374 NDS3@10K_4
R375 DS3@10K_4
DRAMRST_CNTRL_PCH{9,27}
U31C
Y43
CLKOUT_PCIE_N_0
Y45
CLKOUT_PCIE_P_0
AB1
PCIECLKRQ0#/GPIO73
AA44
CLKOUT_PCIE_N_1
AA42
CLKOUT_PCIE_P_1
AF1
PCIECLKRQ1#/GPIO18
AB43
CLKOUT_PCIE_N_2
AB45
CLKOUT_PCIE_P_2
AF3
PCIECLKRQ2#/GPIO20/SMI#
AD43
CLKOUT_PCIE_N_3
AD45
CLKOUT_PCIE_P_3
T3
PCIECLKRQ3#/GPIO25
AF43
CLKOUT_PCIE_N_4
AF45
CLKOUT_PCIE_P_4
V3
PCIECLKRQ4#/GPIO26
AE44
CLKOUT_PCIE_N5
AE42
CLKOUT_PCIE_P_5
AA2
PCIECLKRQ5#/GPIO44
AB40
CLKOUT_PCIE_N_6
AB39
CLKOUT_PCIE_P_6
AE4
PCIECLKRQ6#/GPIO45
AJ44
CLKOUT_PCIE_N_7
AJ42
CLKOUT_PCIE_P_7
Y3
PCIECLKRQ7#/GPIO46
AH43
CLKOUT_ITPXDP
AH45
CLKOUT_ITPXDP_P
D44
CLKOUT_33MHZ0
E44
CLKOUT_33MHZ1
B42
CLKOUT_33MHZ2
F41
CLKOUT_33MHZ3
A40
CLKOUT_33MHZ4
CLOCK SIGNAL
LPT_PCH_M_EDS/BGA
R335 10K_4
R334 10K_4
R337 10K_4
R336 10K_4
R388 10K_4
R394 10K_4
R776 10K_4
R775 10K_4
R857 10K_4
2
CLKOUT_PEG_A
CLKOUT_PEG_A_P
CLKOUT_PEG_B
CLKOUT_PEG_B_P
CLKOUT_DMI
CLKOUT_DMI_P
CLKOUT_DP
CLKOUT_DP_P
CLKOUT_DPNS
CLKOUT_DPNS_P
CLKIN_DMI
CLKIN_DMI_P
CLKIN_GND
CLKIN_GND_P
CLKIN_DOT96N
CLKIN_DOT96P
CLKIN_SATA
CLKIN_SATA_P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
ICLK_IREF
DIFFCLK_BIASREF
C667 15P/50V_4C
23
Y3
25MHZ_30
4 1
C668 15P/50V_4C
+3V_DS3
<CLG>
R327
EV@0X2
2
XTAL25_IN
XTAL25_OUT
ICLK_IREF
1
3
R324
3
1
R325
3
1
1
3
R326
TP108
TP58
TP60
R873 *10K_4
R787 0_4
R765 *7.5K/F_4
R783 7.5K/F_4
4
4
2
4
2
2
4
TP19
TP18
AB35
CLK_PCIE_VGAN_R
AB36
CLK_PCIE_VGAP_R
AF6
CLK_PEGA_REQ#
Y39
Y38
U4
S3_STRAP
AF39
CLK_CPU_BCLKN_R
AF40
CLK_CPU_BCLKP_R
AJ40
CLK_DPLL_SSCLKN_R
AJ39
CLK_DPLL_SSCLKP_R
AF35
CLK_DPLL_NSCLKN_R
AF36
CLK_DPLL_NSCLKP_R
AY24
CLK_BUF_EXPN
AW24
CLK_BUF_EXPP
AR24
CLK_BUF_CPYCKN
AT24
CLK_BUF_CPYCKP
H33
CLK_BUF_DOT96N
G33
CLK_BUF_DOT96P
BE6
CLK_BUF_CKSSCDN
BC6
CLK_BUF_CKSSCDP
F45
CLK_BUF_REF14
D17
CLK_PCI_FB
AM43
AL44
C40
CLK_FLEX0
F38
CLK_FLEX1
F36
CLK_FLEX2
F39
CLK_FLEX3
AM45
AD39
AD38
AN44
ICLK_BIAS
<CLG>
R395 XDP@0_4
USB_SC_OC#
R516 XDP@0_4
USB_OC1#
B2A
GPIO41
R363 XDP@0_4
R378 XDP@0_4
GPIO42
USB_OC4#
R365 XDP@0_4
R383 XDP@0_4
USB30_SMI#
GPIO10
SCI#
R396 XDP@0_4
R805 XDP@0_4
CLK_PCIE_REQ1#
B2A
CLK_PCIE_REQ2#
R808 XDP@0_4
B2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
LPT 3/6 (PCIE/USB/CLK)
LPT 3/6 (PCIE/USB/CLK)
LPT 3/6 (PCIE/USB/CLK)
Tuesday, December 25, 2012
Tuesday, December 25, 2012
Tuesday, December 25, 2012
1
0X2
PIV@0X2
PIV@0X2
+3V
+1.5V
+VCCAXCK_VRM
Routed by 50 ohm
CLK_PCIE_VGAN {16}
CLK_PCIE_VGAP {16}
CLK_CPU_BCLKN {3}
CLK_CPU_BCLKP {3}
CLK_DPLL_SSCLKN {3}
CLK_DPLL_SSCLKP {3}
CLK_DPLL_NSCLKN {3}
CLK_DPLL_NSCLKP {3}
B2A
BD6
BD6
BD6
10 49
10 49
10 49
XDP_FN0 {25}
XDP_FN1 {25}
XDP_FN2 {25}
XDP_FN3 {25}
XDP_FN4 {25}
XDP_FN5 {25}
XDP_FN6 {25}
XDP_FN7 {25}
XDP_FN14 {25}
XDP_FN15 {25}
1A
1A
1A
5
Lynx Point (GPIO,CPU/MISC,NCTF)
LPT_PCH_M_EDS
U31F
AT8
BOARD_ID4
F13
BOARD_ID5
A14
BOARD_ID6
G15
BOARD_ID2
Box_Vendor
Y1
K13
AB11
AN2
C14
BB4
Y10
R11
AD11
AN6
AP1
AT3
AK1
AT7
AM3
AN4
AK3
U12
C16
D13
G13
H15
BE41
BE5
C45
A5
GPIO8
D D
C C
B B
A A
B2A
TP111
GPIO8{9}
ODD_PRSNT#{33}
DGPU_PWROK{16,22,37}
GPIO27{8,37}
PLL_ODVR_EN{9}
GPIO36{9}
FDI_OVRVLTG{9}
TEMP_ALERT#{37}
PCH_ODD_EN{33}
5
B2A
BOARD_ID15
R760 0_4
BOARD_ID10
GPIO24
GPIO27
BOARD_ID9
BOARD_ID7
GPIO36
FDI_OVRVLTG
BOARD_ID1
BOARD_ID8
TEMP_ALERT#
ID_Detect
PCH_ODD_EN
BOARD_ID13
BOARD_ID11
BOARD_ID12
TP_VSS_NCTF2
(CORE)
BMBUSY#/GPIO0
(CORE)
TACH1/GPIO1
(CORE)
TACH2/GPIO6
(CORE)
TACH3/GPIO7
(SUS)
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
(SUS)
GPIO15
(CORE)
SATA4GP/GPIO16
(CORE)
TACH0/GPIO17
(CORE)
SCLOCK/GPIO22
(SUS)
GPIO24
(DSW)
GPIO27
(SUS)
GPIO28
(CORE)
GPIO34
(CORE)
GPIO35/NMI#
(CORE)
SATA2GP/GPIO36
(CORE)
SATA3GP/GPIO37
(CORE)
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
SATA5GP/GPIO49
GPIO57
TACH4/GPIO68
TACH5/GPIO69
TACH6/GPIO70
TACH7/GPIO71
VSS
VSS
VSS
VSS
LPT_PCH_M_EDS/BGA
(SUS)
(CORE)
(CORE)
(CORE)
(CORE)
(CORE)
(CORE)
(CORE)
(SUS)
GPIO
4
<CLG>
CPU/Misc
AN10
TP14
AY1
PCH_PECI
PECI
AT6
RCIN#
RCIN#
AV3
PROCPWRGD
AV1
PCH_THRMTRIP#
THRMTRIP#
AU4
PLTRST_PROC#
N10
VSS
A2
VSS
A41
VSS
A43
VSS
A44
VSS
B1
VSS
B2
VSS
B44
VSS
B45
VSS
BA1
VSS
BC1
VSS
BD1
VSS
BD2
VSS
BD44
VSS
BD45
VSS
BE2
VSS
BE3
VSS
D1
VSS
6 OF 11
E1
VSS
E45
VSS
A4
VSS
4
NCTF
TP99
R782 390_4
GATEA20 {37}
RCIN# {37}
H_PWRGOOD {3}
B2A
PM_THRMTRIP# {3}
CPU_PLTRST# {3}
XDP Signal
XDP_FN_CLK1{25}
XDP_FN_CLK2{25}
XDP_FN10{25}
XDP_FN11{25}
XDP_FN12{25}
XDP_FN13{25}
PCH MISC PU/PD
PCH GPIO PU/PD
GPIO16
TEMP_ALERT#
ODD_PRSNT#
PCH_ODD_EN
+3V
R380
Metal_IMR@10K_4
ID_Detect Box_Vendor
R379
TEXTURE@10K_4
ID_Detect Speaker
H
Metal/IMR
L TEXTURE
3
BOARD ID SETTING
Board ID
HM87
HM86
UMA SKU
VGA SKU
VRAM-1000MHz
VRAM-900MHz
Standard
ULV
17"
14"
GV2
GL
W/ 4K2K
W/O 4K2K
W/ HDMI
W/O HDMI
W/ CRT
W/O CRT
Only VGA
Optimus
WIN7
WIN8
Reserve
EDP
LVDS
Celeron
I3/I5/I7
47W
37W
+3V_DS3
B2A
R360 10K_4 R421
R838 XDP@0_4
R344 XDP@0_4
R341 XDP@0_4
R803 XDP@0_4
R506 XDP@0_4
R350 XDP@0_4
GPIO24
R368 *10K_4
GPIO8
BOARD_ID7
GPIO36
FDI_OVRVLTG
GPIO16
TEMP_ALERT#
B2A
+3V
+3V
B2A
GPIO12GPIO57
Box Vendor
ONKYO
3
R779 8.2K_4
R778 10K_4
R780 *1K_4
GPIO36
FDI_OVRVLTG
B2A
Box_Vendor {34}
+1.05V
R792 *10K_4
R802 *10K_4
+3V
R868
10K_4
GPIO52
W/O KB Backlight
Touch Pad
3.3V(IDTP)other
5V(NMTP)
GPIO52 {8,38}
GPIO52
H
LW KB Backlight
GPIO52
KB Backlight
X
Metal(Y)
IMR(X)
B2A
GATEA20
RCIN#
PCH_THRMTRIP#
R505 *10K_4
R801 10K_4
R800 10K_4
R875 10K_4
+3V_DS3
R451
10K_4
R426
*10K_4
Box
Boxless
+3V
R407
87@10K_4
BOARD_ID0
R408
86@10K_4
+3V +3V +3V
R777
10K_4
+3V
R342
U3_2@10K_4
BOARD_ID9
R343
U2_2@10K_4
B2A
R910
EDP@10K_4
R911
LDS@10K_4
R448
OEV@10K_4
BOARD_ID12 BOARD_ID13 BOARD_ID14
R450
PX@10K_4
2
ID0 ID3
ID1 ID2
H
L
H
L
BOARD_ID0 {8}
B2A
R428
GV2@10K_4
R431
GL@10K_4
+3V
R766
S&C@10K_4
BOARD_ID10 BOARD_ID11
R761
NS&C@10K_4
C3A
R912
70@10K_4
R913
76@10K_4
R881
W7@10K_4
R869
W8@10K_4
2
<CLG>
ID4
ID5
H
L
H
L
H
L
H
L
H
L
+3V
R879
*10K_4
R880
10K_4
+3V
R427
10K_4
BOARD_ID16 {9} BOARD_ID17 {9}
+3V
+3V
R430
1000M@10K_4
BOARD_ID2
R449
900M@10K_4
R794
HM@10K_4
R795
NHM@10K_4
R764
IV@10K_4
BOARD_ID1 BOARD_ID3
R763
EV@10K_4
B2A B2A
+3V+3V_DS3+3V
R909
47W@10K_4
BOARD_ID17BOARD_ID15 BOARD_ID16
R908
37W@10K_4
+3V+3V +3V
R468
10K_4
R479
*10K_4
ID7
ID8
H
L
H
L
USB3.0*2 H
USB3.0*1&USB2.0*1
Non S&C
Reserve
ID12
H
L
+3V
10K_4
R420
*10K_4
+3V
R907
CRT@10K_4
BOARD_ID8BOARD_ID7BOARD_ID5BOARD_ID4 BOARD_ID6
R349
NCRT@10K_4
S&C
BOARD_ID14 {8}
1
ID13 ID14ID6
ID15 ID16 ID17
H
L
H
L
H
L
H
L
H
L
BOARD_ID3 {8}
ID9 ID11ID10Description
L
H
L
H
L
B2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
LPT 4/6 (GPIO/MISC)
LPT 4/6 (GPIO/MISC)
LPT 4/6 (GPIO/MISC)
Wednesday, January 09, 2013
Wednesday, January 09, 2013
Wednesday, January 09, 2013
1
BD6
BD6
BD6
11 49
11 49
11 49
11
1A
1A
1A
5
Lynx Point (Power)
1.312A (80mils)
B2A
B2A
R373 5.11/F_4
+V1.05S_PCH_VCC
C340
10U/6.3V_8X
C358
1U/6.3V_4X
+PCH_VCCDSW
670mA (60mils)
+V1.05M_VCCASW
C412
10U/6.3V_8X
C356
1U/6.3V_4X
C359
1U/6.3V_4X
C366
1U/6.3V_4X
C374
1U/6.3V_4X
R338 0_1206
+1.05V
D D
C386
1U/6.3V_4X
R461 0_1206
+1.05V
C C
U31G
AA24
VCC
AA26
VCC
AD20
VCC
AD22
VCC
AD24
VCC
AD26
VCC
AD28
VCC
AE18
VCC
AE20
VCC
AE22
VCC
AE24
VCC
AE26
VCC
AG18
VCC
AG20
VCC
AG22
VCC
AG24
VCC
Y26
VCC
U14
DCPSUSBYP
AA18
VCCASW
U18
VCCASW
U20
VCCASW
U22
VCCASW
U24
VCCASW
V18
VCCASW
V20
VCCASW
V22
VCCASW
V24
VCCASW
Y18
VCCASW
Y20
VCCASW
Y22
VCCASW
LPT_PCH_M_EDS/BGA
LPT_PCH_M_EDS
CRT DAC
FDI
HVCMOS
Core
USB3
PCIe/DMI
SATA
VCCMPHY
7 OF 11
<CLG>
VCCADAC1_5
VCCADACBG3_3
VCCVRM
VCC3_3_R30
VCC3_3_R32
DCPSUS1
VCCSUS3_3
VCCSUS3_3
DCPSUS3
DCPSUS3
VCCVRM
VCCVRM
VCCVRM
VCCVRM
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
4
70mA (20mils)
+VCCA_DAC_1_2
C381
R377
PICRT@0.01U/25V_4X
OEV@0_4
P45
P43
VSS
M31
13.3mA (10mils)
BB44
+V1.05S_VCCAPLL_FDI
AN34
+V1.05S_VCC_EXP +3V
AN35
3.629A (160mils)
R30
R32
Y12
109mA (20mils)
AJ30
+3V_DS3
AJ32
AJ26
AJ28
AK20
+V1.05S_VCC_EXP
AK26
+VCCAPLL_USB3
AK28
BE22
+V1.05S_VCCAPLL_EXP
AK18
+V1.05S_VCC_EXP
AN11
+V1.05S_VCCAPLL_SATA3
AK22
+V1.05S_VCC_EXP
AM18
AM20
AM22
AP22
AR22
AT22
261mA (20mils)
+VCCA_USBSUS
+V3.3S_ADACBG
183mA (20mils)
+V3.3S_VCC_GIO
+V1.05M_VCCSUS
C384
PICRT@0.1U/10V_4X
C348
*1U/6.3V_4X
183mA (20mils)
L21 PICRT@HCB1608KF-181T15_1.5A
C385
PICRT@10U/6.3V_8X
R424 OEV@0_4
R444 PICRT@0_6
R443 *PICRT@0_6
R446 0_6
C379
0.1U/10V_4X
C373
*1U/6.3V_4X
C659
*10U/6.3V_8X
+3V_DS3
+3V
+3V_BG
3
R452 0_8
B2A
+1.5V
R817 0_6
+1.05V
R439 0_6
+3V
R409 0_8
+1.05V
R445 0_6
+3V
R441 0_6
+3V
R440 0_6
+3V
R447 0_6
+3V
R809 0_6
+1.05V
261mA (20mils)
+V3.3A_VCCPUSB
C367
0.1U/10V_4X
+V1.05S_VCCAUSB
C380
0.1U/10V_4X
+V3.3S_VCCAUBG
C388
0.1U/10V_4X
+V1.05S_VCCUSBCORE
C371
0.1U/10V_4X
+V1.05M_VCCDUSBSUS
C368
*1U/6.3V_4X
+V3.3S_VCC_FLEX0
C378
1U/6.3V_4X
+V3.3S_VCC_FLEX1
C383
1U/6.3V_4X
+V3.3S_VCC_FLEX23
C382
1U/6.3V_4X
+V3.3S_VCC_ASEPCI
C372
1U/6.3V_4X
+VCCCLKF135
C360
1U/6.3V_4X
133mA (20mils)
B2A
55mA (28mils)
183mA (20mils)
+VCCAXCK_VRM
+V1.05S_VCC_AXCK_DCB
1.312A (80mils) 261mA (20mils)
+V1.05S_VCC_SSCFF
55mA (20mils)
306mA (20mils)
+V1.05S_VCC_SSCFF
+V1.05S_VCCCLKF100
+V1.05S_VCCSSCF100
+V1.05S_VCCCLKF100
+V1.05S_VCCSSCF100
Lynx Point (Power)
U31H
R24
VCCSUS3_3
R26
VCCSUS3_3
R28
VCCSUS3_3
U26
VCCSUS3_3
M24
VSS
U35
VCCUSBPLL
L24
VCC3_3
U30
VCCIO
V28
VCCIO
V30
VCCIO
Y30
VCCIO
Y35
DCPSUS2
AF34
VCCVRM
AP45
VCC
Y32
VCCCLK
M29
VCCCLK3_3
L29
VCCCLK3_3
L26
VCCCLK3_3
M26
VCCCLK3_3
U32
VCCCLK3_3
V32
VCCCLK3_3
AD34
VCCCLK
AA30
VCCCLK
AA32
VCCCLK
AD35
VCCCLK
AG30
VCCCLK
AG32
VCCCLK
AD36
VCCCLK
AE30
VCCCLK
AE32
VCCCLK
LPT_PCH_M_EDS/BGA
LPT_PCH_M_EDS
2
R435 0_6
<CLG>
261mA (20mils)
R20
VCCSUS3_3
GPIO/LPC
USB
RTC
ICC
Fuse
Thermal
VCCSUS3_3
VCCDSW3_3
DCPSST
VCC3_3
VCC3_3
VCC3_3
8 OF 11
VCCIO
VCCSUSHDA
VCCSUS3_3
VCCRTC
DCPRTC
DCPRTC
V_PROC_IO
V_PROC_IO
VCCSPI
VCCASW
VCCASW
VCCVRM
VCC3_3
VCC3_3
Azalia
CPU
SPI
+3V_DS3
R22
A16
+VCCPDSW_PCH
AA14
+VCCSST
AE14
+V3.3S_VCCPCORE
AF12
AG14
U36
+V1.05S_VCCAUX
10mA (20mils)
A26
+VCC_HDA_IO
K8
+VCCPRTCSUS_3P3
A6
P14
+VCCRTCEXT
P16
4mA (20mils)
AJ12
+V1.05S_VCCPCPU
AJ14
22mA (20mils)
AD12
+V3.3M_VCCPSPI
P18
+V3.3S_VCCPFUSE
VCC
P20
VCC
L17
R18
AW40
AK30
AK32
133mA (20mils)
3.629A (160mils)
B2A
C377
0.1U/10V_4X
1.312A (80mils)
670mA (60mils)
670mA (60mils)
183mA (20mils)
133mA (20mils)
+VCCPDSW
C394
0.1U/10V_4X
C365
0.1U/10V_4X
R359 0_8
C355
0.01U/25V_4X
R823 0_6
R434 0_6
C393
1U/6.3V_4X
C681
0.1U/10V_4X
C349
0.1U/10V_4X
1
+PCH_VCC_1_1_20
+PCH_VCC_1_1_21
+V1.5S_VCCATS
+V3.3S_VCCPTS
+3V
+1.05V
+3V_DS3
C679
0.1U/10V_4X
C354
0.1U/10V_4X
B2A
B2A
C680
1U/6.3V_4X
C346
1U/6.3V_4X
R356 0_6
C363
1U/6.3V_4X
R438 0_6
R437 *0_6
C376
1U/6.3V_4X
R464 0_6
R463 0_6
R331 0_6
R321 0_6
C344
0.1U/10V_4X
R351 0_6
+3V_DS3
+3V
+1.05V
12
+3V_RTC
+VCCIO_PCH
B2A
+1.05V
+1.05V
+1.5V
+3V
B B
PCH VRM Power
0.179A (20mils)
+1.05V +V1.05S_VCCAPLL_FDI
L17 *1uh_6_25MA
+1.5V
R332 0_8
+1.05V
L19 *10uh_8_100MA
+1.5V
R376 0_8
L37 *1uh_6_25MA
+1.5V
R758 0_8
A A
L16 *10uh_8_100MA
+1.5V
R329 0_8
+VCCAPLL_USB3
+V1.05S_VCCAPLL_EXP+1.05V
+V1.05S_VCCAPLL_SATA3+1.05V
C338
*10U/6.3V_8X
C369
*10U/6.3V_8X
C658
*10U/6.3V_8X
C336
*10U/6.3V_8X
5
PCH VCCIO Power
R328 0_1206
B2A
PCH band gap Power
+VCCAXCK_VRM_R +VCCAXCK_VRM+1.05V
R355 *1/F_4
+1.5V
R372 0_8
+V1.05S_VCC_EXP+1.05V
C329
10U/6.3V_8X
3
2
MAIND{27,41,45}
L20 *10uh_8_100MA
B2A
C345
1U/6.3V_4X
+3V_BG+3V_DS3
1
Q35
*PICRT@2N7002K_300MA
C370
10U/6.3V_8X
3.629A (160mils)
C351
1U/6.3V_4X
4
C347
1U/6.3V_4X
B2A
R339 0_8
C350
1U/6.3V_4X
+VCC_AXCK_DCB +V1.05S_VCC_AXCK_DCB+1.05V
C341
1U/6.3V_4X
L18 0_6
C343
*10U/6.3V_8X
C342
1U/6.3V_4X
PCH DS3 VCCSUS
C411
*DS3@0.33U/6.3V_4X
R475
DS3@100K_4
+3V_S5
R462 NDS3@0_8
1
B2A
R469 DS3@0_4
Q36
B2A
R442 0_6
3
2
0.01A (10mils)
C390
0.1U/10V_4X
DS3@DTC144EUA
1 3
R411 0_8
SLP_SUS#{8,37}
PCH HDA Power
+3V_DS3 +VCC_HDA_IO +1.05V +V1.05S_VCCCLKF100
Q34
2
DS3@ME2303T1
3
+3V_DS3
C364
1U/6.3V_4X
C375
0.1U/10V_4X
PCH DSW3
+3VPCU
D11 DS3@RB500V-40_100MA
+3V_S5
R436 NDS3@0_8
+V1.05S_VCC_SSCFF+1.05V +1.05V +V1.05S_VCCSSCF100
R410 0_8
C362
1U/6.3V_4X
2
+VCCPDSW
R353 0_8
B2A
C361
1U/6.3V_4X
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
LPT 5/6 (POWER)
LPT 5/6 (POWER)
LPT 5/6 (POWER)
Thursday, December 20, 2012
Thursday, December 20, 2012
Thursday, December 20, 2012
1
BD6
BD6
BD6
12 49
12 49
12 49
1A
1A
1A
5
4
3
2
1
13
D D
Lynx Point (GND) Lynx Point (GND)
LPT_PCH_M_EDS
U31J
AL34
VSS
AL38
VSS
AL8
VSS
AM14
VSS
AM24
VSS
AM26
VSS
AM28
VSS
AM30
VSS
C C
B B
AM32
AM16
AN36
AN40
AN42
AN8
AP13
AP24
AP31
AP43
AR2
AK16
AT10
AT15
AT17
AT20
AT26
AT29
AT36
AT38
D42
AV13
AV22
AV24
AV31
AV33
BB25
AV40
AV6
AW2
F43
AY10
AY15
AY20
AY26
AY29
AY7
B11
B15
LPT_PCH_M_EDS/BGA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
10 OF 11
<CLG> <CLG>
LPT_PCH_M_EDS
K39
VSS
L2
VSS
L44
VSS
M17
VSS
M22
VSS
N12
VSS
N35
VSS
N39
VSS
N6
VSS
P22
VSS
P24
VSS
P26
VSS
P28
VSS
P30
VSS
P32
VSS
R12
VSS
R14
VSS
R16
VSS
R2
VSS
R34
VSS
R38
VSS
R44
VSS
R8
VSS
T43
VSS
U10
VSS
U16
VSS
U28
VSS
U34
VSS
U38
VSS
U42
VSS
U6
VSS
V14
VSS
V16
VSS
V26
VSS
V43
VSS
W2
VSS
W44
VSS
Y14
VSS
Y16
VSS
Y24
VSS
Y28
VSS
Y34
VSS
Y36
VSS
Y40
VSS
Y8
VSS
U31K
AA16
VSS
AA20
VSS
AA22
VSS
AA28
VSS
AA4
VSS
AB12
VSS
AB34
VSS
AB38
VSS
AB8
VSS
AC2
VSS
AC44
VSS
AD14
VSS
AD16
VSS
AD18
VSS
AD30
VSS
AD32
VSS
AD40
VSS
AD6
VSS
AD8
VSS
AE16
VSS
AE28
VSS
AF38
VSS
AF8
VSS
AG16
VSS
AG2
VSS
AG26
VSS
AG28
VSS
AG44
VSS
AJ16
VSS
AJ18
VSS
AJ20
VSS
AJ22
VSS
AJ24
VSS
AJ34
VSS
AJ38
VSS
AJ6
VSS
AJ8
VSS
AK14
VSS
AK24
VSS
AK43
VSS
AK45
VSS
AL12
VSS
AL2
VSS
BC22
VSS
BB42
VSS
LPT_PCH_M_EDS/BGA
11 OF 11
B19
VSS
B23
VSS
B27
VSS
B31
VSS
B35
VSS
B39
VSS
B7
VSS
BA40
VSS
BD11
VSS
BD15
VSS
BD19
VSS
AY36
VSS
AT43
VSS
BD31
VSS
BD35
VSS
BD39
VSS
BD7
VSS
D25
VSS
AV7
VSS
F15
VSS
F20
VSS
F29
VSS
F33
VSS
BC16
VSS
D4
VSS
G2
VSS
G38
VSS
G44
VSS
G8
VSS
H10
VSS
H13
VSS
H17
VSS
H22
VSS
H24
VSS
H26
VSS
H31
VSS
H36
VSS
H40
VSS
H7
VSS
K10
VSS
K15
VSS
K20
VSS
K29
VSS
K33
VSS
BC28
VSS
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
LPT 6/6 (GND)
LPT 6/6 (GND)
LPT 6/6 (GND)
Thursday, December 20, 2012
Thursday, December 20, 2012
Thursday, December 20, 2012
1
BD6
BD6
BD6
13 49
13 49
13 49
1A
1A
1A
5
4
3
2
1
<DDR>
H=8 (Rev)
D D
R176 10K_4
R177 10K_4
C C
M_A_A[15:0]{4}
M_A_BS#0{4}
M_A_BS#1{4}
M_A_BS#2{4}
M_A_CS#0{4}
M_A_CS#1{4}
M_A_CLKP0{4}
M_A_CLKN0{4}
M_A_CLKP1{4}
M_A_CLKN1{4}
M_A_CKE0{4}
M_A_CKE1{4}
M_A_CAS#{4}
M_A_RAS#{4}
M_A_WE#{4}
SMB_RUN_CLK{9,15,30,38}
SMB_RUN_DAT{9,15,30,38}
M_A_ODT0{4}
M_A_ODT1{4}
M_A_DQSP[7:0]{4}
M_A_DQSN[7:0]{4}
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
SMB_RUN_CLK
SMB_RUN_DAT
M_A_DM1
M_A_DM2
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDRSK-20401-TP8D
5
M_A_DQ4
DQ0
7
M_A_DQ5
DQ1
15
M_A_DQ7
DQ2
17
M_A_DQ6
DQ3
4
M_A_DQ1
DQ4
6
M_A_DQ0
DQ5
16
M_A_DQ3
DQ6
18
M_A_DQ2
DQ7
21
M_A_DQ9
DQ8
23
M_A_DQ8
DQ9
33
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
PC2100 DDR3 SDRAM SO-DIMM
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_A_DQ15
35
M_A_DQ10
22
M_A_DQ12
24
M_A_DQ13
34
M_A_DQ14
36
M_A_DQ11
39
M_A_DQ21
41
M_A_DQ16
51
M_A_DQ19
53
M_A_DQ18
40
M_A_DQ20
42
M_A_DQ17
50
M_A_DQ23
52
M_A_DQ22
57
M_A_DQ25
59
M_A_DQ24
67
M_A_DQ30
69
M_A_DQ26
56
M_A_DQ28
58
M_A_DQ29
68
M_A_DQ31
70
M_A_DQ27
129
M_A_DQ36
131
M_A_DQ37
141
M_A_DQ34
143
M_A_DQ38
130
M_A_DQ32
132
M_A_DQ33
140
M_A_DQ35
142
M_A_DQ39
147
M_A_DQ41
149
M_A_DQ45
157
M_A_DQ47
159
M_A_DQ46
146
M_A_DQ40
148
M_A_DQ44
158
M_A_DQ42
160
M_A_DQ43
163
M_A_DQ49
165
M_A_DQ48
175
M_A_DQ54
177
M_A_DQ55
164
M_A_DQ53
166
M_A_DQ52
174
M_A_DQ50
176
M_A_DQ51
181
M_A_DQ61
183
M_A_DQ60
191
M_A_DQ62
193
M_A_DQ63
180
M_A_DQ56
182
M_A_DQ57
192
M_A_DQ59
194
M_A_DQ58
M_A_DQ[63:0] {4}
+3V
R178 *10K_4
DDR3_DRAMRST#{15,27}
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
2.48A
+3V
PM_EXTTS#0
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
+1.35VSUS
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDRSK-20401-TP8D
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
PC2100 DDR3 SDRAM SO-DIMM
203
VTT1
VTT2
GND
GND
+SMDDR_VTERM
204
205
206
14
B B
Place these Caps near So-Dimm0.
A A
5
+1.35VSUS
C96 0.1U/10V_4X
C77 0.1U/10V_4X
C88 0.1U/10V_4X
C78 0.1U/10V_4X
C85 *4.7U/6.3V_6X
C106 4.7U/6.3V_6X
C95 *4.7U/6.3V_6X
C72 *4.7U/6.3V_6X
C98 4.7U/6.3V_6X
C71 4.7U/6.3V_6X
C84 *4.7U/6.3V_6X
C115 *4.7U/10V_8Y
C116 *4.7U/10V_8Y
+
C61
*220U/2.5V_3528P_E35b C193 0.1U/10V_4X
+SMDDR_VTERM
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
+3V
C201 1U/6.3V_4X
C205 1U/6.3V_4X
C196 1U/6.3V_4X
C206 1U/6.3V_4X
C208 *10U/6.3V_6X
C204 *10U/6.3V_6X
C124 0.1U/10V_4X
C127 *2.2U/6.3V_6X
C35 0.1U/10V_4X
C36 *2.2U/6.3V_6X
C192 2.2U/6.3V_4X
4
C3A
VREF DQ0 M1 Solution
+1.35VSUS +VREFDQ_SA_M3
R42
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
1K/F_4
+SMDDR_VREF_DQ0_M1
R41
1K/F_4
R40 0_6
C734 0.022U/16V_4X
C735 0.022U/16V_4X
3
VREF CA M1 Solution
+1.35VSUS
R117
1K/F_4
R118
1K/F_4
2
+VREF_CA_CPU
R125
0_6
C126
470P/50V_4X
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM
R47
0_6
+SMDDR_VREF_DQ0
R30
*0_6
B2A B2A
R933 24.9/F_4
R934 24.9/F_4
B2A
R124
*0_6
+SMDDR_VREF+SMDDR_VREF
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
System Memory 1/2 (5.2H)
System Memory 1/2 (5.2H)
System Memory 1/2 (5.2H)
Thursday, December 20, 2012
Thursday, December 20, 2012
Thursday, December 20, 2012
1
BD6
BD6
BD6
14 49
14 49
14 49
1A
1A
1A
5
<DDR>
H=4 (Rev)
M_B_A[15:0]{4}
D D
M_B_BS#0{4}
M_B_BS#1{4}
M_B_BS#2{4}
M_B_CS#0{4}
M_B_CS#1{4}
M_B_CLKP0{4}
M_B_CLKN0{4}
M_B_CLKP1{4}
M_B_CLKN1{4}
M_B_CKE0{4}
M_B_CKE1{4}
M_B_CAS#{4}
M_B_RAS#{4}
R173 10K_4
R172 10K_4
+3V
C C
B B
M_B_WE#{4}
SMB_RUN_CLK{9,14,30,38}
SMB_RUN_DAT{9,14,30,38}
M_B_ODT0{4}
M_B_ODT1{4}
M_B_DQSP[7:0]{4}
M_B_DQSN[7:0]{4}
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DM1
M_B_DM2
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
JDIM2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDRSK-20401-TP4B
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
PC2100 DDR3 SDRAM SO-DIMM
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
4
5
M_B_DQ5
7
M_B_DQ4
15
M_B_DQ3
17
M_B_DQ2
4
M_B_DQ0
6
M_B_DQ1
16
M_B_DQ6
18
M_B_DQ7
21
M_B_DQ12
23
M_B_DQ13
33
M_B_DQ14
35
M_B_DQ10
22
M_B_DQ8
24
M_B_DQ9
34
M_B_DQ11
36
M_B_DQ15
39
M_B_DQ20
41
M_B_DQ21
51
M_B_DQ18
53
M_B_DQ22
40
M_B_DQ17
42
M_B_DQ16
50
M_B_DQ19
52
M_B_DQ23
57
M_B_DQ25
59
M_B_DQ29
67
M_B_DQ27
69
M_B_DQ26
56
M_B_DQ28
58
M_B_DQ24
68
M_B_DQ31
70
M_B_DQ30
129
M_B_DQ36
131
M_B_DQ37
141
M_B_DQ35
143
M_B_DQ34
130
M_B_DQ33
132
M_B_DQ32
140
M_B_DQ39
142
M_B_DQ38
147
M_B_DQ44
149
M_B_DQ40
157
M_B_DQ42
159
M_B_DQ43
146
M_B_DQ45
148
M_B_DQ41
158
M_B_DQ46
160
M_B_DQ47
163
M_B_DQ49
165
M_B_DQ48
175
M_B_DQ54
177
M_B_DQ55
164
M_B_DQ52
166
M_B_DQ53
174
M_B_DQ50
176
M_B_DQ51
181
M_B_DQ61
183
M_B_DQ56
191
M_B_DQ62
193
M_B_DQ63
180
M_B_DQ57
182
M_B_DQ60
192
M_B_DQ59
194
M_B_DQ58
VREF DQ1 M1 Solution
R18
1K/F_4
R21
1K/F_4
M_B_DQ[63:0] {4}
R29 0_6
+VREFDQ_SB_M3+1.35VSUS
+SMDDR_VREF
R45
0_6
+SMDDR_VREF_DQ1+SMDDR_VREF_DQ1_M1
R31
*0_6
R175 *10K_4
+3V
DDR3_DRAMRST#{14,27}
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ1
+1.35VSUS
2.48A
+3V
PM_EXTTS#1
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
3
2
1
15
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDRSK-20401-TP4B
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
PC2100 DDR3 SDRAM SO-DIMM
203
VTT1
VTT2
GND
GND
+SMDDR_VTERM
204
205
206
+1.35VSUS +SMDDR_VTERM
+SMDDR_VREF_DIMM
C97 0.1U/10V_4X
C83 0.1U/10V_4X
C73 0.1U/10V_4X
C75 0.1U/10V_4X
C76 4.7U/6.3V_6X
C94 *4.7U/6.3V_6X
C69 4.7U/6.3V_6X
C86 *4.7U/6.3V_6X
C103 *4.7U/6.3V_6X
C99 4.7U/6.3V_6X
C87 *4.7U/6.3V_6X
C114 *4.7U/10V_8Y
C117 *4.7U/10V_8Y
+
C63
*220U/2.5V_3528P_E35b
+SMDDR_VREF_DQ1
C736 0.022U/16V_4X
C737 *0.022U/16V_4X
C200 1U/6.3V_4X
C199 1U/6.3V_4X
C197 1U/6.3V_4X
C198 1U/6.3V_4X
C202 *10U/6.3V_6X
C203 *10U/6.3V_6X
+3V
C189 *0.1U/10V_4X
C188 2.2U/6.3V_4X
+SMDDR_VREF_DIMM
C128 0.1U/10V_4X
C129 *2.2U/6.3V_6X
+SMDDR_VREF_DQ1
C39 0.1U/10V_4X
C34 *2.2U/6.3V_6X
R935 24.9/F_4
R936 *24.9/F_4
B2A
B2A
B2A
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
System Memory 2/2 (9.2H)
System Memory 2/2 (9.2H)
System Memory 2/2 (9.2H)
Thursday, December 20, 2012
Thursday, December 20, 2012
Thursday, December 20, 2012
1
BD6
BD6
BD6
15 49
15 49
15 49
1A
1A
1A
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