QUANTA BD5 Schematics

1

2

3

4

5

6

7

8

BD5 Block Diagram

USB-11

A A

DDRIII-SODIMM1 DDRIII-SODIMM2

SATA - HDD

P14,15

P33

Dual Channel DDR III

Ivy Bridge(UMA+VGA)

35W/45W

rPGA 989

P3, 4, 5, 6

DDR SYSTEM MEMORY

FDI

DMI

PCI-E

PCI-E x8

VGA NVIDIA N14P-GV2 VGA NVIDIA N14M-GL

P16, 17, 18, 19, 20, 21, 22

VRAM DDR3-64M*16 VRAM DDR3-128M*16

EXT_LVDS

EXT_CRT

EXT_HDMI

HDMI Level Shift

P28

LCD/CCD Con.

CRT Con.

HDMI Con.

P29

P28

01

DMI(x4)

SATA 0

B B

C C

SATA - ODD

Touch Panel

Card Reader

Daughter Board

USB 2.0 L1 Con.

USB 2.0 L2 Con.

P38

P36

P31

P33

USB-3

USB-8

USB-2 USB-9

SATA 4

BATTERY

P7

Azalia

SATA

USB2

RTC

IHDA

FDI

PantherPoint

P8, 9, 10, 11, 12, 13

PCH

LPC

DMI

VIDEO

PCI-E

USB3

SPI

LCD

CRT

HDMI

HDMI Level Shift

PCIE-3

PCIE-4

SPI Flash

P9

P28

USB-10

USB-11

WLAN

Giga/10/100 Lan

P30

P35

USB-0

USB-1

LCD/CCD Con.

CRT Con.

HDMI Con.

USB 3.0 R1

Port1

USB 3.0 R2

Port2

P29

P28

P31

LPC

Audio Codec

P34

HP SPK Con.MIC JACK

P34 P34 P34

D D

FAN

K/B Con.

P38 P38P3 P38

For XiangYun Layout House Use

1

2

3

4

EC

HALL Sensor

P29

5

Touch Pad /B Con.

6

Power /B Con.

P33

POWER SYSTEM

ISL88732HRTZ-T RT8223P TPS51216RUKR RT8240BZQW TPS51462RGER (+VCCSA) ISL95836HRZ-T (+VCC_CORE) G9661-25ADJF12U RT8812A

Size Document Nu mber Rev

Block Diagram

Date: Sheet of

7

(Charge) (System 5V/3V) (DDR 1.5V) (+VCCIO)

(+1.8V) (NV_GPU_CORE) (other GPU)

Quanta Computer Inc.

PROJECT :

8

BD5

P40 P41 P42 P43 P44 P45 P46 P47 P48

1A

1 50Wednesday, J anuary 16, 2013

1A

5

4

3

2

1

02

Table of Contents

D D

C C

B B

PAGE DESCRIPTION

Schematic Block Diagram

1

Front Page

2

Processor

3 - 6 8 - 13

PCH

14 - 15

DDRIII SO-DIMM DDR

16 - 22

N14P-GV2/N14M-GL

23 - 24

VRAM - DDR3 HDMI comm part

28

VGA Connector

29

LCD Panel CRT & CRT BUS SWITCH CCD HALL SENSOR&BACK LIGHT SWITCH

3031MINI Card (Wi-Fi & WIMAX) MNW

USB Connector USB Sleep Charger SLC HDD HDD

33

ODD Audio Codec

34 35

Atheros LAN LAN

36

Card reader MMC

37

KeyBoard

38

TP&FP board TPD,FPD Power SW PSW LED LED

39 40

Charger

41

System 5V/3V

42

DDR 1.5V

43

+VCCIO

44

+VCCSA

45

+VCORE+VGFX +1.8V / Discharge

46 47

GPU_CORE

48

other GPU PWM

BOI-FUNCTIONS

CPU CLG

VGA VGA HDM VGA LDS CRT CCD HSR

USB

ODD ADO

KBCEC KBC

PWM PWM PWM PWM PWM PWM PWM PWM

POWER PLANE

+VIN +3V_RTC +3V +3V_S5 +3VPCU +5V +5V_S5 +5VPCU

+1.5VSUS +1.5V +VCCIO +1.05V MAIN_ON +VCCSA +VCORE+VGFX

+3V_GPU +3.3V DGPU_PWR_EN_R S0

+VGPU_CORE DGPU_PWR_EN_RC S0~ +1.5V_GPU +1.5V GPU_PWR_GD S0

VOLTAGE

10V~+19V

+3.0V~+3.3V

+3.3V +3.3V +3.3V +5V +5V

+1.5V S5_ON +1.5V

~ HWPG_VCCIO S0 ~

CONTROL SIGNAL

MAIN_ON S5_ON

MAIN_ON S0 S5_ON S0~S5 AC/DC Insert enable

MAIN_ON

MPWROK

GPU_PWR_GD S0+1.05V_GPU +1.05V

Power States

ACTIVE IN

S0~S5 S0~S5 S0 S0~S5 S0~S5AC/DC Insert enable

S0~S5+5V

S0~S3 S0 S0

S0

GND PLANE PAGE

GND_SIGNAL 8769GND GND ADOGND

A A

32 37 ALL 34

For XiangYun Layout House Use

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

POWER STAGE & BOI-FUNCTION

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

5

4

3

2

Wednesday, January 16, 2013

PROJECT :

Chief River

2 50

1

1A

5

Ivy Bridge Processor (DMI,PEG,FDI) Ivy Bridge Processor (CLK,MISC,JTAG)

DMI_TXN0{ 8} DMI_TXN1{ 8} DMI_TXN2{ 8} DMI_TXN3{ 8}

DMI_TXP0{8} DMI_TXP1{8} DMI_TXP2{8} DMI_TXP3{8}

DMI_RXN0{8} DMI_RXN1{8}

D D

C C

INT_EDP_HPD{29}

INT_EDP_AUXP{29} INT_EDP_AUXN{29}

INT_EDP_TXP0{29} INT_EDP_TXP1{29} INT_EDP_TXP2{29} INT_EDP_TXP3{29}

INT_EDP_TXN0{ 29} INT_EDP_TXN1{ 29} INT_EDP_TXN2{ 29} INT_EDP_TXN3{ 29}

FDI Disabling (Discrete Only)

<OEV>

R122 OEV@1K_4 R120 OEV@1K_4 R119 OEV@1K_4 R121 OEV@1K_4

B B

R118 OEV@1K_4

DMI_RXN2{8} DMI_RXN3{8}

DMI_RXP0{8} DMI_RXP1{8} DMI_RXP2{8} DMI_RXP3{8}

FDI_TXN0{8} FDI_TXN1{8} FDI_TXN2{8} FDI_TXN3{8} FDI_TXN4{8} FDI_TXN5{8} FDI_TXN6{8} FDI_TXN7{8}

FDI_TXP0{ 8} FDI_TXP1{ 8} FDI_TXP2{ 8} FDI_TXP3{ 8} FDI_TXP4{ 8} FDI_TXP5{ 8} FDI_TXP6{ 8} FDI_TXP7{ 8}

FDI_FSYNC0{8} FDI_FSYNC1{8}

FDI_INT{8}

FDI_LSYNC0{8} FDI_LSYNC1{8}

eDP_COMP

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

B27 B25 A25 B24

B28 B26 A24 B23

G21 E22 F21 D21

G22 D22 F20 C21

A21 H19 E19 F18 B21 C20 D18 E17

A22 G19 E20 G18 B20 C19 D19 F17

J18 J17

H20 J19

H17

A18 A17 B16

C15 D15

C17 F16 C16 G15

C18 E16 D16 F15

U18A

DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]

DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3]

DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3]

DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]

FDI0_TX#[0] FDI0_TX#[1] FDI0_TX#[2] FDI0_TX#[3] FDI1_TX#[0] FDI1_TX#[1] FDI1_TX#[2] FDI1_TX#[3]

FDI0_TX[0] FDI0_TX[1] FDI0_TX[2] FDI0_TX[3] FDI1_TX[0] FDI1_TX[1] FDI1_TX[2] FDI1_TX[3]

FDI0_FSYNC FDI1_FSYNC

FDI_INT FDI0_LSYNC

FDI1_LSYNC

eDP_COMPIO eDP_ICOMPO eDP_HPD

eDP_AUX eDP_AUX#

eDP_TX[0] eDP_TX[1] eDP_TX[2] eDP_TX[3]

eDP_TX#[0] eDP_TX#[1] eDP_TX#[2] eDP_TX#[3]

ACA-ZIF-069-K01

+VTT

DMI

Intel(R) FDI

eDP

R523 24.9/F_4

R514 24.9/F_4

J22

PEG_ICOMPI

J21

PEG_ICOMPO

H22

PEG_RCOMPO

K33

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9]

PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9]

M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7

PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7

PEG_TXN0_C PEG_TXN1_C PEG_TXN2_C PEG_TXN3_C PEG_TXN4_C PEG_TXN5_C PEG_TXN6_C PEG_TXN7_C

PEG_TXP0_C PEG_TXP1_C PEG_TXP2_C PEG_TXP3_C PEG_TXP4_C PEG_TXP5_C PEG_TXP6_C PEG_TXP7_C

PCI EXPRESS* - GRAPHICS

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[10]

PEG_RX[11]

PEG_RX[12]

PEG_RX[13]

PEG_RX[14]

PEG_RX[15]

PEG_TX#[0]

PEG_TX#[1]

PEG_TX#[2]

PEG_TX#[3]

PEG_TX#[4]

PEG_TX#[5]

PEG_TX#[6]

PEG_TX#[7]

PEG_TX#[8]

PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[10]

PEG_TX[11]

PEG_TX[12]

PEG_TX[13]

PEG_TX[14]

PEG_TX[15]

eDP_COMP

PEG_COMP

<THC>

+5V VIN +5VPCU

U17

VFAN1

1

1 OUT

2

1 IN-

3

1 IN+ GND42 IN+

*LM358

2 OUT

VCC

2 IN-

2

Q45

1 3

*MMBT2222A_600MA

TH_FAN_POWER1

A A

R497 *100K_4

R498 *100K_4

R496 *162K/F_4

R481 *IV@NTC_470K_4

8 7 6 5

R482 *48.7K/F_4

R483 *EV@NTC_470K_4

PEG_COMP

C605 EV@0.22U/10V_4X C586 EV@0.22U/10V_4X C607 EV@0.22U/10V_4X C588 EV@0.22U/10V_4X C609 EV@0.22U/10V_4X C590 EV@0.22U/10V_4X C611 EV@0.22U/10V_4X C592 EV@0.22U/10V_4X

C604 EV@0.22U/10V_4X C585 EV@0.22U/10V_4X C606 EV@0.22U/10V_4X C587 EV@0.22U/10V_4X C608 EV@0.22U/10V_4X C589 EV@0.22U/10V_4X C610 EV@0.22U/10V_4X C591 EV@0.22U/10V_4X

Processor pull-upDP & PEG Compensation

H_PROCHOT# XDP_TMS

XDP_TDI_R XDP_TDO_R XDP_TCLK XDP_TRST#

R485 *499K/F_4

R484 *499K/F_4

4

R94 62_4 R491 51_4

R489 51_4 R488 *51_4 R493 51_4 R70 51_4

PEG_RXN[0..7] {16}

PEG_RXP[0..7] {16 }

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7

34

Q43B

5

*2N7002KDW_115MA

R486 *IV@1M_4

6

Q43A

2

*2N7002KDW_115MA

1

3

2

1

<CPU>

CLK_CPU_BCLKP {10} CLK_CPU_BCLKN {10}

CLK_CPU_DPP {10} CLK_CPU_DPN {10}

CPU_DRAMRST# {27}

5

R69 100K_4

03

H_PROCHOT#

34

Q9B 2N7002KDW_115MA

C71 *47P/50V_4N

U18B

A28

CLK_CPU_BCLKP_R

BCLK

H_SNB_IVB#{9}

C90 *10P/50V_4C

EC_PECI{37}

R93 56_4

R50 *75/F_4

U3

1 2

IN GND3OUT

*74LVC1G07GW

H_PROCHOT#

PM_SYNC{8}

C85 *E@0.1U/25V_4X

R78 10K_4

C253 *E@0.1U/25V_4X

R72 *43_4

+3V_S5

C69 *0.1U/10V_4X

VCC5NC

4

R75 750/F_4

H_PROCHOT#{45}

PEG_TXN[0..7] {16}

H_PWRGOOD{11}

PM_DRAM_PWRGD_R{27}

+VTT

CPU_PLTRST#

PEG_TXP[0..7] {16}

Level Shift

+VTT

PLTRST#{10,30,35,36,37,38}

R71 1.5K/F_4

TP54

TP4

R76 E@0_4

CPU_PLTRST#CPU_PLTRST#

CPU_PLTRST#_R

SKTOCC#

TP_CATERR#

H_PROCHOT#_R

PM_THRMTRIP#_R

CPU_PLTRST#_R

C82

*39P/50V_4N

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

C81 *0.1U/10V_4X

ACA-ZIF-069-K01

Thermal Trip & Process HOT

DELAY_VR_PWRGOOD{8,45}

PM_THRMTRIP#_R

2

1 3

MISCTHERMALPWR MANAGEMENT

+VTT

6

Q9A 2N7002KDW_115MA

1

R58 100K_4

R65 1K_4 Q8

2

METR3904-G_200MA

CLOCKS

DDR3

JTAG & BPM

MISC

<CPU>

BCLK#

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PRDY#

PREQ#

TRST#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

S5_ON

PM_THRMTRIP# {11}

A27

CLK_CPU_BCLKN_R

A16

CLK_DPLL_SSCLKP_R

A15

CLK_DPLL_SSCLKN_R

R8

AK1

SM_RCOMP_0

A5

SM_RCOMP_1

A4

SM_RCOMP_2

AP29

XDP_PRDY#_R

AP27

XDP_PREQ#

AR26

XDP_TCLK

TCK

AR27

XDP_TMS

TMS

AP30

XDP_TRST#

AR28

XDP_TDI_R

TDI

AP26

XDP_TDO_R

TDO

AL35

XDP_DBR#_R

DBR#

AT28

XDP_OBS0

AR29

XDP_OBS1

AR30

XDP_OBS2

AT30

XDP_OBS3

AP32

XDP_OBS4

AR31

XDP_OBS5

AT31

XDP_OBS6

AR32

XDP_OBS7

B2A

RP28 0X2

R522 LDS@1K_4 RP9 PIVEDP@0X2

R521 LDS@1K_4

R92 140/F_4 R525 25.5/F_4 R518 200/F_4

TP47 C539 *E@0.1U/25V_4X

R511 *SHORT_4

TP46 TP48 TP50 TP49 TP55 TP52 TP51 TP53

4

3

2

1

2

1

4

3

XDP_DBRST# {8}

Intel Turbo mode only

H_PROCHOT_EC{37}

+VTT

<CPU>

H_PROCHOT_EC

CPU Thermal sensor / MB Local TEMP <THP/UGA/VGA>

S5_ON

R487 *EV@1M_4

B2A

FAN Control-->For one FAN solution <THC>

0.5A

+5V

C538 2.2U/6.3V_4X

B2A

VFAN1{37}

1 4

U16

APE8872M

VIN2VO /FON VSET

0.5A

3

TH_FAN_POWER1

5

GND

6

GND

7

GND GND

C537

8

2.2U/6.3V_4X

B2A

+3V

R502 *10K_4

85205-0300L

CN10

1 2 3

FANSIG1{37}

FANSIG1

+3VPCU

55uA

R108 150_4

HYST=VCC for 10 degree Hys. HYST=GND for 30 degree Hys.

+3VPCU_HW_SD

C123

0.1U/16V_4Y

U4

5

VCC

4

HYST

G708T1U

Rset(Kohm)=0.0012T*T-0.9308T+96.147

R105 EV@24.9K/F_4

1

R107 IV@24.9K/F_4

SET

2

GND

3

R761 0_4

OT#

R104 *470K_4

S5_ON

S5_ON {20,37,41}

D2 *1SS355_100MA

B2A

+3VPCU

B2A

Quanta Computer Inc.

PROJECT :

BD5

PROJECT :

BD5

PROJECT :

Size Document Number Rev

Ivy Bridge 1/4

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

5

4

3

2

Wednesday, January 16, 2013

1

BD5

3 50

A1A

For XiangYun Layout House Use

5

4

3

2

1

04

Ivy Bridge Processor (DDR3)

D D

U18C

AB6

SA_CLK[0]

M_A_DQ[63:0]{14}

C C

B B

M_A_BS#0{14} M_A_BS#1{14} M_A_BS#2{14}

M_A_CAS#{14} M_A_RAS#{14} M_A_WE#{14}

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

C5 D5 D3 D2 D6 C6 C2 C3

F10

F8

G10

G9 F9 F7 G8 G7 K4 K5 K1 J1 J5 J4 J2 K2 M8

N10

N8 N7

M10

M9 N9

M7 AG6 AG5 AK6 AK5 AH5 AH6 AJ5 AJ6 AJ8 AK8 AJ9 AK9 AH8 AH9 AL9 AL8

AP11 AN11 AL12 AM12 AM11 AL11 AP12 AN12 AJ14 AH14 AL15 AK15 AL14 AK14 AJ15 AH15

AE10 AF10

V6

AE8 AD9 AF9

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

ACA-ZIF-069-K01

DDR SYSTEM MEMORY A

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1] RSVD_TP[2] RSVD_TP[3]

RSVD_TP[4] RSVD_TP[5] RSVD_TP[6]

SA_CS#[0]

SA_CS#[1] RSVD_TP[7] RSVD_TP[8]

SA_ODT[0]

SA_ODT[1] RSVD_TP[9]

RSVD_TP[10]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0]

SA_DQS[1]

SA_DQS[2]

SA_DQS[3]

SA_DQS[4]

SA_DQS[5]

SA_DQS[6]

SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AA6 V9

AA5 AB5 V10

AB4 AA4 W9

AB3 AA3 W10

AK3 AL3 AG1 AH1

AH3 AG3 AG2 AH2

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_CLKP0 {14} M_A_CLKN0 {14} M_A_CKE0 {14}

M_A_CLKP1 {14} M_A_CLKN1 {14} M_A_CKE1 {14}

M_A_CS#0 {14} M_A_CS#1 {14}

M_A_ODT0 {14} M_A_ODT1 {14}

M_A_DQSN[7:0] {14}

M_A_DQSP[7:0] {14}

M_A_A[15:0] {14}

<CPU>

U18D

M_B_DQ[63:0]{15}

M_B_BS#0{15} M_B_BS#1{15} M_B_BS#2{15}

M_B_CAS#{15} M_B_RAS#{15} M_B_WE#{15}

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

C9 A7

D10

C8 A9 A8 D9 D8 G4 F4 F1 G1 G5 F5 F2 G2 J7 J8

K10

K9 J9

J10

K8

K7 M5 N4 N2 N1 M4 N5 M2 M1

AM5 AM6 AR3 AP3 AN3 AN2 AN1 AP2 AP5 AN9 AT5 AT6 AP6 AN8 AR6 AR5 AR9

AJ11

AT8 AT9

AH11

AR8 AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA9

AA7

R6

AA10

AB8

AB9

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

ACA-ZIF-069-K01

DDR SYSTEM MEMORY B

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

RSVD_TP[11] RSVD_TP[12] RSVD_TP[13]

RSVD_TP[14] RSVD_TP[15] RSVD_TP[16]

SB_CS#[0]

SB_CS#[1] RSVD_TP[17] RSVD_TP[18]

SB_ODT[0]

SB_ODT[1] RSVD_TP[19] RSVD_TP[20]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0]

SB_DQS[1]

SB_DQS[2]

SB_DQS[3]

SB_DQS[4]

SB_DQS[5]

SB_DQS[6]

SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AE2 AD2 R9

AE1 AD1 R10

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_CLKP0 {15} M_B_CLKN0 {15} M_B_CKE0 {15}

M_B_CLKP1 {15} M_B_CLKN1 {15} M_B_CKE1 {15}

M_B_CS#0 {15} M_B_CS#1 {15}

M_B_ODT0 {15} M_B_ODT1 {15}

M_B_DQSN[7:0] {15}

M_B_DQSP[7:0] {15}

M_B_A[15:0] {15}

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

Ivy Bridge 2/4

Wednesday, January 16, 2013

1

BD5

4 50

A1A

For XiangYun Layout House Use

5

4

3

2

1

C180 10U/6.3V_6X

+

C169 *330U/2.5V_3528P_E9b

70@0.01_3720 PR257

1 2

05

+VAXG

VCC_AXG_SENSE {4 5} VSS_AXG_SENSE {45}

+1.5V_CPU

B2A

+VCCSA

B2A

Ivy Bridge Processor (POWER)

POWER

U18F

+VCC_CORE

D D

VCC:94A

C559 10U/6.3V_6X

C161 10U/6.3V_6X

C551 10U/6.3V_6X

C134 10U/6.3V_6X

C146 39P/50V_4N

C557 10U/6.3V_6X

C563 10U/6.3V_6X

C561 10U/6.3V_6X

C549 *10U/6.3V_6X

C122 10U/6.3V_6X

C121 39P/50V_4N

C550 10U/6.3V_6X

C553

C132

10U/6.3V_6X

C554

C558

10U/6.3V_6X

C C

C158

C552

10U/6.3V_6X

B B

C562 10U/6.3V_6X

C555 *10U/6.3V_6X

C556 10U/6.3V_6X

C129 10U/6.3V_6X

C156 10U/6.3V_6X

C159 10U/6.3V_6X

C155 10U/6.3V_6X

C151 10U/6.3V_6X

C560 10U/6.3V_6X

C133 10U/6.3V_6X

C565 10U/6.3V_6X

C131 10U/6.3V_6X

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

CORE SUPPLY

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30

PEG AND DDR

VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE VSSIO_SENSE

SENSE LINES SVID

AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

AJ29 AJ30 AJ28

AJ35 AJ34

B10 A10

<CPU>

+VCCIO40_R

H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT

VCCIO:8.5A

+

C564 *330U/2.5V_3528P_E9b

C125 10U/6.3V_6X

C112 10U/6.3V_6X

R515 0_4

C135 10U/6.3V_6X

C120 10U/6.3V_6X

+VTT

C566 10U/6.3V_6X

C568 10U/6.3V_6X

+VTT

R507 100_4

R506 100_4 R520 10_4

R519 10_4

C150 10U/6.3V_6X

C181 10U/6.3V_6X

C163 10U/6.3V_6X

C154 10U/6.3V_6X

+VCC_CORE VCC_SENSE {45 } VSS_SENSE {45}

+VTT VCCP_SENSE { 43} VSSP_SENSE {43}

C569 *10U/6.3V_6X

C567 10U/6.3V_6X

+1.8V

C74 PIV@10U/6.3V_6X

C547 PIV@10U/6.3V_6X

C109 PIV@10U/6.3V_6X

C118 OEV@0_6

VCCPLL:1.2A

C200 *10U/6.3V_6X

+VAXG

C75 PIV@10U/6.3V_6X

C548 PIV@10U/6.3V_6X

C542 PIV@10U/6.3V_6X

C201 1U/6.3V_4X

Ivy Bridge Processor (GRAPHIC POWER)

POWER

U18G

C541 PIV@10U/6.3V_6X

C113 PIV@10U/6.3V_6X

C540 PIV@10U/6.3V_6X

C76 PIV@10U/6.3V_6X

C116 PIV@10U/6.3V_6X

C108 PIV@10U/6.3V_6X

AT24

VAXG1

AT23

VAXG2

AT21

VAXG3

AT20

VAXG4

AT18

VAXG5

AT17

VAXG6

AR24

VAXG7

AR23

VAXG8

AR21

VAXG9

AR20

VAXG10

AR18

VAXG11

AR17

VAXG12

AP24

VAXG13

AP23

VAXG14

AP21

VAXG15

AP20

VAXG16

AP18

VAXG17

AP17

VAXG18

AN24

VAXG19

AN23

VAXG20

AN21

VAXG21

AN20

VAXG22

AN18

VAXG23

AN17

VAXG24

AM24

VAXG25

AM23

VAXG26

AM21

VAXG27

AM20

VAXG28

AM18

VAXG29

AM17

VAXG30

AL24

VAXG31

AL23

VAXG32

AL21

VAXG33

AL20

VAXG34

AL18

VAXG35

AL17

VAXG36

AK24

VAXG37

AK23

VAXG38

AK21

VAXG39

AK20

VAXG40

AK18

VAXG41

AK17

VAXG42

AJ24

VAXG43

AJ23

VAXG44

AJ21

VAXG45

AJ20

VAXG46

AJ18

VAXG47

AJ17

VAXG48

AH24

VAXG49

AH23

VAXG50

AH21

VAXG51

AH20

VAXG52

AH18

VAXG53

AH17

VAXG54

GRAPHICS

SENSE

VREFMISC

DDR3 -1.5V RAILS

VAXG_SENSE

VSSAXG_SENSE

LINES

SM_VREF

SA RAIL

B6

C202 1U/6.3V_4X

+

C615 *330U/2V_7343P_E9c

A6 A2

H_CPU_SVIDCLK

H_CPU_SVIDDAT

H_CPU_SVIDALRT#

VCCPLL1 VCCPLL2 VCCPLL3

ACA-ZIF-069-K01

+VTT

R103 130/F_4

1.8V RAIL

R100 0_4

R102 * SHORT_4

R98 43 _4

VCCSA_SENSE

VCCSA_VID1

+VTT

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

FC_C22

R99 75/F_4

AK35 AK34

AL1

AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1

M27 M26 L26 J26 J25 J24 H26 H25

H23

C22 C24

VAXG:46A

+VDDR_REF_CPU

C178 10U/6.3V_6X

C104 10U/6.3V_6X

C172 *10U/6.3V_6X

VR_SVID_CLK {45}

VR_SVID_DATA {45}

VR_SVID_ALERT# {45}

R504 PIV@100_4

R505 PIV@100_4

+VDDR_REF_CPU

VDDQ:5A

C176

C177

*10U/6.3V_6X

+

C179

C91

10U/6.3V_6X

*330U/2V_7343P_E9c

VCCSA:6A

C171

C570

*10U/6.3V_6X

10U/6.3V_6X

VCCSA_VCCSSENSE { 44}

VCCSA_VID0 {44} VCCSA_VID1 {44}

+VCCSA +VTT

ACA-ZIF-069-K01

A A

Quanta Computer Inc.

PROJECT :

BD5

PROJECT :

BD5

PROJECT :

Size Document Number Rev

Ivy Bridge 3/4

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

5

4

3

2

Wednesday, January 16, 2013

1

BD5

5 50

A1A

For XiangYun Layout House Use

5

4

3

2

1

Ivy Bridge Processor (GND)

U18H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

D D

C C

B B

Processor Strapping DDR3 VREF DQ (M3)

AT13 AT10

AT7 AT4

AT3 AR25 AR22 AR19 AR16 AR13 AR10

AR7 AR4

AR2 AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10

AP7

AP4

AP1 AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10

AN7

AN4

AM29 AM25 AM22 AM19 AM16 AM13 AM10

AM7

AM4

AM3

AM2

AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

AL7

AL4

AL2

AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AK7

AK4 AJ25

VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

ACA-ZIF-069-K01

VSS

CPU/VGA

The CFG signals have a default value of '1' if not terminated on the board.

Pin Name

CFG2 (PEG Static Lane Reversal --> 16 Lane)

CFG3 (Reserved)

CFG4 (DP Presence Strap)

CFG5 CFG6 (PCIE Bifurction)

A A

CFG7 (PEG Defer Training)

1=Normal Operation 0=Lane Reversed

1=Disable; No physical DP attached to eDP 0=Enable; An ext DP device is connected to eDP

00=x8,x4,x4 - Device 1 function 1 and 2 enable 01=Reserved - (Device 1 function 1 disable ; function 2 enable) 10=x8,x8 -Device 1 function 1 enable ; function 2 enable 11=(Default) x16 -Device 1 function 1 and 2 disable

1=PEG train immediately following xxRESETB de assertion 0=PEG wait for BIOS training

AJ22

VSS81

AJ19

VSS82

AJ16

VSS83

AJ13

VSS84

AJ10

VSS85

AJ7

VSS86

AJ4

VSS87

AJ3

VSS88

AJ2

VSS89

AJ1

VSS90

AH35

VSS91

AH34

VSS92

AH32

VSS93

AH30

VSS94

AH29

VSS95

AH28

VSS96

AH26

VSS97

AH25

VSS98

AH22

VSS99

AH19

VSS100

AH16

VSS101

AH7

VSS102

AH4

VSS103

AG9

VSS104

AG8

VSS105

AG4

VSS106

AF6

VSS107

AF5

VSS108

AF3

VSS109

AF2

VSS110

AE35

VSS111

AE34

VSS112

AE33

VSS113

AE32

VSS114

AE31

VSS115

AE30

VSS116

AE29

VSS117

AE28

VSS118

AE27

VSS119

AE26

VSS120

AE9

VSS121

AD7

VSS122

AC9

VSS123

AC8

VSS124

AC6

VSS125

AC5

VSS126

AC3

VSS127

AC2

VSS128

AB35

VSS129

AB34

VSS130

AB33

VSS131

AB32

VSS132

AB31

VSS133

AB30

VSS134

AB29

VSS135

AB28

VSS136

AB27

VSS137

AB26

VSS138

Y9

VSS139

Y8

VSS140

Y6

VSS141

Y5

VSS142

Y3

VSS143

Y2

VSS144

W35

VSS145

W34

VSS146

W33

VSS147

W32

VSS148

W31

VSS149

W30

VSS150

W29

VSS151

W28

VSS152

W27

VSS153

W26

VSS154

U9

VSS155

U8

VSS156

U6

VSS157

U5

VSS158

U3

VSS159

U2

VSS160

Configuration

T35 T34 T33 T32 T31 T30 T29 T28 T27 T26

P9 P8 P6 P5 P3

P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26

M34

L33 L30 L27

L9

L8

L6

L5

L4

L3

L2

L1

K35 K32 K29 K26

J34 J31

H33 H30 H27 H24 H21 H18 H15 H13 H10

H9

H8

H7

H6

H5

H4

H3

H2

H1

G35 G32 G29 G26 G23 G20 G17 G11

F34 F31 F29

U18I

VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233

ACA-ZIF-069-K01

<CPU>

VSS

CFG2

R64 *EV@1K_4

R54 PIVEDP@1K_4

CFG4

CFG5

CFG6

CFG7

R89 EV@1K_4

R90 *EV@1K_4

R79 *1K_4

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

Ivy Bridge Processor (RESERVED, CFG)

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

TP2 TP3

TP1

SMDDR_VREF_DQ0_M3_R SMDDR_VREF_DQ1_M3_R

+3V

R524 *10K_4

U18E

AK28

CFG0 CFG1

CFG2

CFG3

CFG4CFG4

CFG5 CFG6

CFG7CFG7

AK29 AL26 AL27 AK26 AL29

AL30 AM31 AM32 AM30 AM28 AM26 AN28 AN31 AN26 AM27

AK31 AN29

AJ31 AH31

AJ33 AH33

AJ26

F25 F24

F23

D24 G25 G24 E23

D23

C30

A31

B30

B29

D30

B31

A30

C29

J20 B18 A19

J15

B4 D1

ACA-ZIF-069-K01

CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17]

VAXG_VAL_SENSE VSSAXG_VAL_SENSE VCC_VAL_SENSE VSS_VAL_SENSE

RSVD5

RSVD6 RSVD7

RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23

RSVD24 RSVD25 VCCIO_SEL

RSVD27

RESERVED

RSVD28 RSVD29 RSVD30 RSVD31 RSVD32

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44 RSVD45

RSVD46 RSVD47 RSVD48 RSVD49 RSVD50

RSVD51 RSVD52

VCC_DIE_SENSE

RSVD54 RSVD55

RSVD56 RSVD57 RSVD58

L7 AG7 AE7 AK2 W8

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AH27

AN35

CLK_XDP_ITPP

AM35

CLK_XDP_ITPN

AT2 AT1 AR1

B1

KEY

<CPU>

TP56 TP57

06

S3P

R142 NM3@0_4

3

SMDDR_VREF_DQ0_M3_R

DRAMRST_CNTRL{27}

SMDDR_VREF_DQ1_M3_R

B2A

1

R145 *M3@1K_4

DRAMRST_CNTRL

R141 NM3@0_4

1

R144 *M3@1K_4

DRAMRST_CNTRL

Q19 *M3@ME2N7002E_200MA

2

3

Q20 *M3@ME2N7002E_200MA

2

+SMDDR_VREF_DQ0_M3 {14}

+SMDDR_VREF_DQ1_M3 {15}

B2A

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

Ivy Bridge 4/4

Wednesday, January 16, 2013

1

BD5

6 50

A1A

For XiangYun Layout House Use

07

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

PROJECT :

Thames_M2/ GND

Chief River

7 50Wednesday, January 16, 2013

A1A

For XiangYun Layout House Use

5

4

3

2

1

08

Panther Point (DMI,FDI,PM)

U26C

DMI_COMP DMI2RBIAS

SUSACK#_R

XDP_DBRST#_R

EC_PWROK_R

PM_DRAM_PWRGD

RSMRST#

SUS_PWR_ACK_R

AC_PRESENT_R

PM_BATLOW#

PM_RI#

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPW RDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

CougarPoint_R1P0

+3V_S5

DSW

+3V_S5

DMI

FDI

+3V

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

SLP_LAN# / GPIO29

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

DSWVRMEN

DPWROK

+3V_S5

SLP_SUS#

PMSYNCH

FDI_INT

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

DMI_RXN0{3} DMI_RXN1{3} DMI_RXN2{3}

SYS_PWROK_R

MPWROK

RSMRST#{37}

DNBSWON#{37}

DMI_RXN3{3}

DMI_RXP0{3} DMI_RXP1{3} DMI_RXP2{3} DMI_RXP3{3}

DMI_TXN0{3} DMI_TXN1{3} DMI_TXN2{3} DMI_TXN3{3}

DMI_TXP0{3} DMI_TXP1{3} DMI_TXP2{3} DMI_TXP3{3}

R656 49.9/F_4

+1.05V

R655 750/F_4

R696 E@0_4 C711 *E@0.1U/25V_4X

C698 *E@0.1U/25V_4X

R399 0_4

C710 *E@0.1U/25V_4X

D D

XDP_DBRST#{3}

C C

C450 *E@0.1U/25V_4X

PM_DRAM_PWRGD{27}

B B

BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9

BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9

AW16 AV12 BC10 AV14 BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

DPWROK_R

PCIE_WAKE#

CLKRUN#

SUS_STAT#

SLP_S5#

SLP_A#

SLP_SUS#_R

GPIO29

<CLG>

T4

T6

T5

FDI_TXN0 {3} FDI_TXN1 {3} FDI_TXN2 {3} FDI_TXN3 {3} FDI_TXN4 {3} FDI_TXN5 {3} FDI_TXN6 {3} FDI_TXN7 {3}

FDI_TXP0 {3} FDI_TXP1 {3} FDI_TXP2 {3} FDI_TXP3 {3} FDI_TXP4 {3} FDI_TXP5 {3} FDI_TXP6 {3} FDI_TXP7 {3}

FDI_INT {3} FDI_FSYNC0 {3} FDI_FSYNC1 {3} FDI_LSYNC0 {3} FDI_LSYNC1 {3}

DSWVREN {9}

PCIE_WAKE# {30,35}

CLKRUN# {37}

SUSCLK {37}

SUSC# {37}

SUSB# {37}

PM_SYNC {3}

Panther Point (LVDS,DDI)

U26D

L_CTRL_CLK L_CTRL_DATA

LVD_IBG

DAC_IREF

R328 1K/D_4

J47

M45

P45 T40

K47 T45

P39

AF37 AF36

AE48 AE47

AK39 AK40

AN48 AM47

AK47 AJ48

AN47 AM49

AK49 AJ47

AF40 AF39

AH45 AH47

AF49 AF45

AH43 AH49

AF47 AF43

N48 P49

T49

T39

M40

M47 M49

T43 T42

L_BKLTEN L_VDD_EN

L_BKLTCTL L_DDC_CLK

L_DDC_DATA L_CTRL_CLK

L_CTRL_DATA LVD_IBG

LVD_VBG LVD_VREFH

LVD_VREFL

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

CougarPoint_R1P0

LVDS

Digital Display Interface

CRT

LVDS_BRIGHT_I{29}

INT_LVDS_DIGON{29}

INT_LVDS_PWM{29}

INT_LVDS_EDIDCLK{29} INT_LVDS_EDIDDATA{29}

INT_TXLCLKOUT-{29} INT_TXLCLKOUT+{29}

INT_TXUCLKOUT-{29} INT_TXUCLKOUT+{29}

INT_CRT_DDCCLK{29} INT_CRT_DDCDAT{29}

INT_HSYNC{29} INT_VSYNC{29}

INT_TXLOUT0-{29} INT_TXLOUT1-{29} INT_TXLOUT2-{29}

INT_TXLOUT0+{29} INT_TXLOUT1+{29} INT_TXLOUT2+{29}

INT_TXUOUT0-{29} INT_TXUOUT1-{29} INT_TXUOUT2-{29}

INT_TXUOUT0+{29} INT_TXUOUT1+{29} INT_TXUOUT2+{29}

INT_CRT_BLU{29} INT_CRT_GRN{29} INT_CRT_RED{29}

R699 PIVLDS@2.2K_4

+3V

R323 PIVLDS@2.2K_4

R305 PIVLDS@2.37K/F_4

R706 PICRT@33_4 R702 PICRT@33_4

T3

TP66

TP67

TP25

TP24

INT_CRT_BLU INT_CRT_GRN INT_CRT_RED

INT_CRT_DDCCLK INT_CRT_DDCDAT

INT_TXLCLKOUTINT_TXLCLKOUT+

INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2-

INT_TXLOUT0+ INT_TXLOUT1+ INT_TXLOUT2+

INT_TXUCLKOUTINT_TXUCLKOUT+

INT_TXUOUT0INT_TXUOUT1INT_TXUOUT2-

INT_TXUOUT0+ INT_TXUOUT1+ INT_TXUOUT2+

INT_HSYNC_R INT_VSYNC_R

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

HDMI_DDCCLK {28} HDMI_DDCDATA {28}

HDMI_CON_HP_PCH {28} IV_HDMITX2# {28}

IV_HDMITX2 {28} IV_HDMITX1# {28} IV_HDMITX1 {28} IV_HDMITX0# {28} IV_HDMITX0 {28} IV_HDMICLK# {28} IV_HDMICLK {28}

L_DDC_DATA

SDVO_CTRLDATA

1 -- LVDS ENABLE

0 -- LVDS DISABLE

1 -- PORT B Detected

0 -- PORT B Disable

CRT IMPEDANCE MATCHING

R693 PICRT@150/F_4 R690 PICRT@150/F_4 R685 PICRT@150/F_4

INT_CRT_BLU INT_CRT_GRN INT_CRT_RED

<CLG>

3

Deep Sx <CLG>

SUSACK#_R

SUS_PWR_ACK_R

AC_PRESENT_R

DPWROK_R

SLP_SUS#_R

Co-Lay

R762 NDS3@10K_4 R427 NS3@10K_4 R426 DS3@10K_4 R417 DS3@0_4

Reserve for DS3

R736 DS3@0_4 R763 *DS3@0_4

Co-Lay

R764 NDS3@0_4 R724 NS3@0_4 R380 DS3@0_4

R376 DS3@0_4

R377 0_4

C713 *E@0.1U/25V_4X

RSMRST#

Rf

B2A

+3V_S5 +3V_S5 +VCCPDSW

2

AC_PRESENT {37}

SUSACK# {37} SUS_PWR_ACK {37}

SYS_HWPG {37,41}

SLP_SUS# {12,37}

B2A

Net Name

AC_PRESENT SUS_PWR_ACK SUSACK#_R DPWROK SLP_SUS

Deep Sx SupportVDeep Sx No Support

V NA

V

V NA

Size Document Numb er Rev

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

NA

V

Quanta Computer Inc.

PROJECT :

Panther Point 1/6

1

BD5

8 50

1A

System PWR_OK <CLG>PCH Pull-high/low <CLG>

+3V

CLKRUN# XDP_DBRST#_R

PM_RI#

PCIE_WAKE# GPIO29

A A

PM_BATLOW# SUS_PWR_ACK_R PM_DRAM_PWRGD

RSMRST# SYS_PWROK_R LVDS_BRIGHT_I

R692 8.2K_4 R697 1K_4

R735 10K_4

R715 10K_4 R395 10K_4

R369 8.2K_4 R397 10K_4 R720 S3@200/F_4

R725 10K_4 R422 100K_4 R339 *PIV@100K_4

5

+V3A

+VCCPDSW

B2A

R751 *SHORT_4

+V3A

B2A

C716 *0.1U/10V_4X

SYS_PWROK_R{27}

SYS_PWROK_R

1

U29 *TC7SH08FU(F)

3 5

4

R738 *100K_4

MPWROK

2

4

DELAY_VR_PWRGOOD {3,45}

MPWROK {37,45}

For XiangYun Layout House Use

5

B2A

+3V_RTC

R350 *210/F_4

PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TCK

R351 *100/F_4

PCH_SPI_CS0#_R2R PCH_SPI_CLK_R2R PCH_SPI_SI_R2R PCH_SPI_SO_R2R

PCH_SPI_CS1#_R2R PCH_SPI_CLK_R2R_R PCH_SPI_SI_R2R_R PCH_SPI_SO_R2R_R

R432 20K_4

R433 20K_4 C466 1U/6.3V_4X

GPIO21

ACZ_SYNC_R1

R541 33_4 R540 33_4 R538 33_4 R539 33_4

*E@22P/50V_4N

SPI_WP#

*E@22P/50V_4N

SPI_WP1#

B2A

C265

C269

C481 1U/6.3V_4X

B2A

C482 1U/6.3V_4X

R307 10K_4

G2

*SHORT_ PAD

R423 *1M_4

PCH_SPI_CS0#_R2R PCH_SPI_CLK_R2R PCH_SPI_SI_R2R

PCH_SPI_SO_R2R

G3

*SHORT_ PAD1

SRTC_RST#

G1

*SHORT_ PAD1

1

Q36

R414 0_4

8M

U11

1

CE#

6

SCK

5

SI

2

SO

3

WP#

W25Q64FVSSIG

2M

U10

1

CE#

6

SCK

5

SI

2

SO

3

WP#

*W25Q16BVSSIG

RTC_RST#

+3V

+5V

R424 *33K/F_4

2

*2N7002K_300MA

VDD

HOLD#

VSS

VDD

HOLD#

VSS

RTC Circuitry <RTC>

R318 8.2K_4 R682 10K_4

R362 33_4 R415 33_4 R363 33_4 R727 33_4

<CLG>

PCH_SPI_CS0#_R2 PCH_SPI_CLK_R2 PCH_SPI_SI_R2 PCH_SPI_SO_R2

+V3A

PCH_SPI_CS1#_R2 PCH_SPI_CLK_R2 PCH_SPI_SI_R2 PCH_SPI_SO_R2

+V3A

D14 *RB500V-40_100MA

D11

BAT54C-7-F_200MA

D12 *RB500V-40_100MA

<CLG>

+3V

*33P/50V_4NC446

ACZ_BITCLK_R ACZ_SYNC_R1 ACZ_RST#_R ACZ_SDOUT_R ACZ_SDIN0_AUDIO

+V3A

R341 *210/F_4

R348

R340

*51_4

*100/F_4

PCH_SPI_CS0#{37} PCH_SPI_CLK{37} PCH_SPI_SO{37} PCH_SPI_SI{37}

R196 33_4 R182 33_4 R178 33_4 R190 33_4

R185 3.3K/F_4

B2A

R195 *0_4 R181 *33_4 R177 *33_4 R191 *33_4

R186 *3.3K/F_4

B2A

+3VPCU

+R_3VRTC_R

D D

+R_3VRTC

R443 1K_4

12

CN13

AAA-BAT-054-K01

PU & Password Clear

SERIRQ GPIO19

HDA Bus

C C

<CLG>

BIT_CLK_AUDIO{34}

ACZ_SYNC_AUDIO{34}

ACZ_RST#_AUDIO{34}

ACZ_SDOUT_AUDIO{34}

ACZ_SDIN0_AUDIO{34}

PCH JTAG Debug

PCH Dual SPI

EC+BIOS @4M

B B

<CLG>

ME@2M

A A

For XiangYun Layout House Use

5

3

8

7 4

8

7 4

SPI_HOLD#

SPI_HOLD1#

4

C457

*33P/50V_4N

ACZ_SYNC_R

18mA

R189 3.3K/F_4

18mA

R192 *3.3K/F_4

4

0.1U/16V_4Y

B2A

*0.1U/16V_4Y

C715 15P/50V_4C

C714 15P/50V_4C

PCBEEP{34}

+3V_RTC

B2A

23

4 1

Y4

32.768KHZ_10

R378 1M_4

BOARD_ID16{11}

B2A

3

Panther Point (HDA,JTAG,SATA)

R710

RTC_X1

10M_4

RTC_X2

RTC_RST# SRTC_RST#

SM_INTRUDER#

PCH_INVRMEN

ACZ_BITCLK_R ACZ_SYNC_R PCBEEP ACZ_RST#_R

ACZ_SDIN0_AUDIO

ACZ_SDOUT_R

TP71

BOARD_ID16

PCH_JTAG_TCK PCH_JTAG_TMS

TP70

PCH_JTAG_TDO

PCH_SPI_CLK_R2 PCH_SPI_CS0#_R2 PCH_SPI_CS1#_R2

PCH_SPI_SI_R2 PCH_SPI_SO_R2

U26A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

CougarPoint_R1P0

RTCIHDA

JTAG

SPI

+3V

+3V +3V_S5

+3V +3V

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

FWH4 / LFRAME#

LDRQ1# / GPIO23

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP

SATA 6G

SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA LPC

SATA4TXP SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED# SATA0GP / GPIO21 SATA1GP / GPIO19

LDRQ0#

SERIRQ

2

C38 A38 B37 C37

D36 E36

PCH_DRQ#0

K36 V5

SERIRQ

AM3 AM1 AP7 AP5

AM10 AM8 AP11

HM70 don't support SATA1

AP10 AD7

SATA2RXN

AD5

SATA2RXP

AH5

SATA2TXN

AH4

SATA2TXP

AB8 AB10 AF3

HM70 don't support SATA3

AF1 Y7

Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11 Y10

SATA_COMPPCH_JTAG_TDI

AB12 AB13

SATA3_COMP

AH1

SATA3_RBIAS

P3

SATA_LED#

V14

GPIO21

P1

GPIO19

<CLG>

TP35

TP22 TP23 TP21 TP20

R319 37.4/F_4

R312 49.9/F_4

R663 750/F_4

R680 10K_4

LAD0 {30,37} LAD1 {30,37} LAD2 {30,37} LAD3 {30,37}

LFRAME# {30,37}

SERIRQ {37}

+3V

SATA_RXN_1ST_HDD# {33} SATA_RXP_1ST_HDD {33} SATA_TXN_1ST_HDD# {33} SATA_TXP_1ST_HDD {33}

SATA_RXN_ODD# {33} SATA_RXP_ODD {33} SATA_TXN_ODD# {33} SATA_TXP_ODD {33}

+1.05V

BOARD_ID17

1

09

BOARD_ID17 {11}

B2A

SATA HDD/SSD

SATA ODD

PCH Strap Table

Pin Name

SPKR

Strap description

No reboot mode setting PWROK

GNT3# / GPIO55 Top-Block Swap Override

INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up

GNT1# / GPIO51

GPIO19

B2A

HDA_SDO

DF_TVS

GPIO28

HDA_SYNC

INIT3_3V#

GNT2#/ GPIO53

+V3A

C271

+V3A

GPIO15

C275

L_DDC_DATA

SDVO_CTRLDATA

DDPC_CTRLDATA

DDPD_CTRLDATA

SATA3GP/ GPIO37

SATA2GP/ GPIO36

DSWVRMEN

Boot BIOS Selection 1 [bit-1]

Boot BIOS Selection 0 [bit-0]

Flash Descriptor Security

DMI/FDI Termination voltage

On-die PLL Voltage Regulator

On-Die PLL VR Voltage Select

Reserved

ESI Strap (Server Only)

TLS Confidentiality LVDS Detected

Port B Detected

Port C Detected

Port D Detected

Reserved

Deep S4/S5 Well On -Die Voltage Regulator Enable

Sampled

Configuration

0 = Default (weak pull-down 20K) 1 = Setting to No-Reboot mode

0 = "top-block swap" mode

PWROK

1 = Default (weak pull-up 20K)

PWROK

RSMRST

PWROK

RSMRST#

RSMRST

PWROK

PWROK Should not pull low for desktop and mobile

RSMRST

PWROK

ALWAYS

3

GPIO19

GNT1#

0 = Override 1 = Default (weak pull-up 20K)

0 = Set to Vss 1 = Set to Vcc (weak pull-down 20K)

0 = Disable 1 = Enable (Default)

0 = Support by 1.8V (weak pull-down) 1 = Support by 1.5V

Boot Location

11

SPI

LPC

*

00

1 = Default (weak pull-up 20K) 1 = Default. Should not be pulled low

for desktop and mobile 0 = Default. TLS no Confidentiality

1 = TLS Confidentiality 0 = Default. Not Detected

1 = Detected 0 = Default. Not Detected

1 = Detected

0 = Default

0 = Default 0 = Disable

1 = Enable

R325 *1K_4

+3V

R352 *1K_4

R723 330K_4

+3V_RTC

R695 *1K_4 R681 *1K_4

R728 *1K_4

+3V_S5

B2A

+V3A

+3V_S5

R660 2.2K_4 R661 1K_4

R338 *10K_4 R337 *1K_4

R418 1K_4

Should not pull low. leave as No Connect

R708 1K_4

+V3A

B2A

1= PU to 3V

0=NC

Should not be pulled high when strap is sampled

R722 330K_4

+3V_RTC

2

ACZ_SDOUT_R

PCBEEP

PCI_GNT3# {10}

PCH_INVRMEN

GNT1# {10}

GPIO19

ACZ_SDOUT_R {37}

+1.8V

DF_TVS {11}

H_SNB_IVB# {3}

PLL_ODVR_EN {11}

ACZ_SYNC_R

GPIO15 {11}

DSWVREN {8}

R721 *330K_4

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

PROJECT :

Panther Point 2/6

Wednesday, January 16, 2013

1

BD5

9 50

1A

5

4

3

2

1

Panther Point-M (PCI,USB,NVRAM)

U26E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

D D

HM70 don't support USB3-port3/4

USB 3.0(R2)

USB30_RXN2_R{31}

USB30_RXP2_R{31}

USB30_TXN2_R{31}

USB30_TXP2_R{31}

C C

DGPU_HOLD_RST#{16} GPIO52{11,38}

CLK_PCI_FB

PCLK_DEBUG{30}

PCLK_591{37}

C447

E@4.7P/50V_4C

B B

PLTRST# <CLG,VGA>

PCI_PLTRST#

A A

2 1

R746 0_4

DGPU_PWR_EN{20}

PCI_GNT3#{9}

ODD_MD#{33} BOARD_ID14{11} BOARD_ID3{11} BOARD_ID0{11}

+V3A

GNT1#{9}

R346 22_4 R365 NMP@22_4 R364 22_4

C429 E@4.7P/50V_4C

U28

3 5

*TC7SH08FU(F)

DGPU_PWR_EN

USB 3.0(R1)

USB30_RXN1_R{31}

USB30_RXP1_R{31}

USB30_TXN1_R{31}

USB30_TXP1_R{31}

TP33

TP69 TP29

C717 *0.1U/10V_4X

4

B2A

PCI_PLTRST#_R

2

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

DGPU_HOLD_RST#

GPIO52

DGPU_PWR_EN

GNT1#

GNT2#

PCI_GNT3#

ODD_MD#

PCI_PME#

PCI_PLTRST#

CLKOUT_PCI0 CLKOUT_PCI1 CLK_PCI_FB_R PCLK_DEBUG_R PCLK_591_R

R757 100K_4

+3V

R758 PX@1K_4

DGPU_PWR_EN_R

3

Q54 PX@ME2N7002E_200MA

1

R745 EV@0_4

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

CougarPoint_R1P0

PLTRST# {3,30,35,36,37,38}

DGPU_PWR_EN_R {48}

RSVD

USB30_RX1N USB30_RX2N USB30_RX3N USB30_RX4N USB30_RX1P USB30_RX2P USB30_RX3P USB30_RX4P USB30_TX1N USB30_TX2N USB30_TX3N USB30_TX4N USB30_TX1P USB30_TX2P USB30_TX3P USB30_TX4P

+3V +3V +3V

+3V +3V +3V +3V

VGA_PLTRST# {16}

PCI

USB

+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5

PCI/USBOC# Pull-up <CLG>

B2A

SCI#_R USB_OC1# USB_OC4# USB_SC_OC#_R

For XiangYun Layout House Use

5

RSVD1 RSVD2 RSVD3 RSVD4

RSVD5 RSVD6

RSVD7 RSVD8

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22

RSVD23 RSVD24

RSVD25 RSVD26

RSVD27 RSVD28

RSVD29

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5 AV10

AT8 AY5

BA2 AT12

BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14

USB_SC_OC#_R

K20

USB_OC1#

B17

GPIO41

C16

GPIO42

L16

USB_OC4#

A16

USB30_SMI#

D14

GPIO10

C14

SCI#_R

+V3A

R748

10

9 8 7 4

10KX8

USB_SC_OC#_R

USB_OC1#

USB_Normal_OC#_L_Q

SCI#_R

NV_ALE

USBP3N USBP3P

HM70 don't support USB4USB5USB6USB7

HM70 don't support USB12USB13

USB_BIAS

<CLG>

TP18

USB30 Combo Port

USB20#_R1 {31}

USB 2.0(R1)

USB20_R1 {31} USB20#_R2 {31}

USB 2.0(R2)

USB20_R2 {31} USB20#_L1 {31}

USB 2.0(L1)

USB20_L1 {31} USBP3N {38}

USB Touch

USBP3P {38}

B2A

USB_CARD# {36} USB_CARD {36}

USB20#_L2 {31} USB20_L2 {31} USB_WLAN# {30} USB_WLAN {30} USB_CCD# {29} USB_CCD {29}

B2A

1 2 3

56

Co-Lay

Co-Lay B2A

4

CARD READER USB 2.0(L2) WLAN CCD

R726 22.6/F_4

USB_Normal_OC#_L_Q

R754 0_4 R752 0_4

USB_Normal_OC#_L_Q

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC#

GPIO42

USB30_SMI#

GPIO41

GPIO10

Q55A DS3@2N7002KDW_115MA

126

R766 NDS3@0_4 R768 NS3@0_4

Q55B DS3@2N7002KDW_115MA

R755 NDS3@0_4 R769 NS3@0_4

Q56A DS3@2N7002KDW_115MA

126

R770 NDS3@0_4 R772 NS3@0_4

Q56B DS3@2N7002KDW_115MA

R767 NDS3@0_4 R773 NS3@0_4

PCI_PIRQD# DGPU_PWR_EN

DGPU_HOLD_RST# ODD_MD#

GNT2#

+V3A

5

34

+V3A

5

34

USB 2.0(R1) USB 2.0(R2)

USB 2.0(L1)(L2)

B2A

R709 8.2K_4 R739 8.2K_4 R403 8.2K_4 R402 8.2K_4

R404 10K_4 R703 10K_4 R707 10K_4

R407 *10K_4

EHCI1

EHCI2

USB_SC_OC# {31,37}

USB_Normal_OC#_R {31,37}

USB_Normal_OC#_L {31,37}

SCI# {37}

WLAN

LAN

WLAN

EHCI1

EHCI2

PCIE_RXN_WLAN#{30} PCIE_RXP_WLAN{30}

PCIE_TXN_WLAN#{30} PCIE_TXP_WLAN{30}

PCIE_RXN_LAN#{35}

PCIE_RXP_LAN{35} PCIE_TXN_LAN#{35} PCIE_TXP_LAN{35}

CLK_PCIE_LAN#{35}

CLK_PCIE_LAN{35}

PCIE_CLK_LAN_REQ#{35}

CLK_PCIE_WLAN#{30} CLK_PCIE_WLAN{30}

PCIE_CLK_WLAN_REQ#{30}

+3V

C532 0.1U/10V_4X C533 0.1U/10V_4X

C379 LAN@0.1U/10V_4X C378 LAN@0.1U/10V_4X

PCIE_TXN_WLAN#_C PCIE_TXP_WLAN_C

PCIE_TXN_LAN#_C PCIE_TXP_LAN_C

HM70 don't support PCIE-5

HM70 don't support PCIE-6

HM70 don't support PCIE-7

HM70 don't support PCIE-8

RP23 LAN@0X2

2

1 3

RP22

1 3

GPIO46{11}

CLK_REQ/Strap Pin

+V3A

+3V

+V3A

CLK_BUF_DREFCLKP CLK_BUF_DREFSSCLKN CLK_BUF_DREFSSCLKP CLK_BUF_BCLKN CLK_BUF_BCLKP CLK_BUF_PCIE_3GPLLN CLK_BUF_PCIE_3GPLLP

CLK_PCH_14M

B2A

R705 10K_4 R714 10K_4 R398 10K_4 R368 10K_4 R326 10K_4

R311 10K_4 R694 10K_4

R355 NS3@10K_4 R356 S3@10K_4 R747

R353 10K_4 R354 *10K_4

PCIE_CLK_LAN_REQ#

PCIE_CLK_MINI_REQ# PCIE_CLK_USB30_REQ# GPIO44 GPIO45

PCIECLKRQ2# PCIE_CLK_3G_REQ#

B2A

S3_STRAP

B2A

CLK_PEGA_REQ#

R345 10K_4 R344 10K_4 R302 10K_4 R300 10K_4 R657 10K_4 R658 10K_4 R290 10K_4 R291 10K_4

R334 10K_4

3

CLK_PCIE_LAN#_R

4

CLK_PCIE_LAN_R

PCIE_CLK_LAN_REQ#

CLKOUT_PCIE1N

T7

CLKOUT_PCIE1P

T8

PCIE_CLK_3G_REQ#

PCIECLKRQ2#

2

CLKOUT_PCIE3N

0X2

4

CLKOUT_PCIE3P

PCIE_CLK_MINI_REQ#

PCIE_CLK_USB30_REQ#

GPIO44

S3_STRAP

GPIO45

GPIO46

CLKOUT_ITPXDP_N

T1

CLKOUT_ITPXDP_P CLK_FLEX3

T2

<CLG,VGA>

Panther Point-M (PCI-E,SMBUS,CLK)

U26B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

CougarPoint_R1P0

+3V_S5

PCI-E*

+3V_S5

+3V

+3V_S5

CLOCKS

SMBus/Pull-up <CLG>

2ND_MBCLK{37}

2ND_MBDATA{37}

+V3A

B2A

R370 10K_4 R737 10K_4

R396 2.2K_4 R734 2.2K_4 R713 2.2K_4 R373 2.2K_4

R719 1K_4 R718 *10K_4

Q53A *2N7002KDW_115MA

Q53B *2N7002KDW_115MA

2

+3V_S5

SMBALERT# / GPIO11

+3V_S5

SML0ALERT# / GPIO60

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

+3V_S5 +3V_S5

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

+3V

CLKOUTFLEX0 / GPIO64

+3V

CLKOUTFLEX1 / GPIO65

+3V

CLKOUTFLEX2 / GPIO66

+3V

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

+V3A

B2A

R756

2.2K_4

2

1

6

3 4

+V3A

5

SMBALERT# SML1ALERT#_RCLK_BUF_DREFCLKN

SCLK SDATA SMB_ME0_CLK SMB_ME0_DAT

DRAMRST_CNTRL_PCH

SMB_ME1_CLK

B2A

2.2K_4

SMB_ME1_DAT

SMBCLK

SMBDATA

SML0CLK

CL_CLK1

CL_DATA1

CL_RST1#

<CLG,U3B,MNW>

E12

SMBALERT#

H14

SCLK

C9

SDATA

A12

DRAMRST_CNTRL_PCH

C8

SMB_ME0_CLK

G12

SMB_ME0_DAT

C13

SML1ALERT#_R

E14

SMB_ME1_CLK

M16

SMB_ME1_DAT

M7

T11

P10

M10

CLK_PEGA_REQ#

AB37

CLK_PCIE_VGAN_R

AB38

CLK_PCIE_VGAP_R

AV22 AU22

AM12

CLK_CPU_DPN_R

AM13

CLK_CPU_DPP_R

BF18

CLK_BUF_PCIE_3GPLLN

BE18

CLK_BUF_PCIE_3GPLLP

BJ30

CLK_BUF_BCLKN

BG30

CLK_BUF_BCLKP

G24

CLK_BUF_DREFCLKN

E24

CLK_BUF_DREFCLKP

AK7

CLK_BUF_DREFSSCLKN

AK5

CLK_BUF_DREFSSCLKP

K45

CLK_PCH_14M

H45

CLK_PCI_FB

V47

XTAL25_IN

V49

XTAL25_OUT

Y47

XCLK_RCOMP

R667 90.9/F_4

K43

CLK_FLEX0 CLK_FLEX1 CLK_FLEX2

TP27 TP34 TP32 TP68

F47 H47 K49

SCLK {14,30} SDATA {14,30}

DRAMRST_CNTRL_PCH {27}

DDR / PCIE Mini Card/LAN

PCH Temp

R303 EV@0X2

R294 PIVEDP@0X2

CLK_PEGA_REQ# {16}

2

1

4

3

2

1

4

3

R677 1M_4

+1.05V

33MHz

27MHz 48/24MHz 14.318MHz 25MHz

CLK_PCIE_VGAN {16} CLK_PCIE_VGAP {16}

CLK_CPU_BCLKN {3} CLK_CPU_BCLKP {3}

CLK_CPU_DPN {3} CLK_CPU_DPP {3}

23

Y3 25MHZ_30

4 1

CLK_FLEX0

CLK_FLEX1

CLK_FLEX2

CLK_FLEX3

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

PROJECT :

Panther Point 3/6

Wednesday, January 16, 2013

1

C704 12P/50V_4C

C708 12P/50V_4C

BD5

10

B2A

10 50

1A

5

4

3

2

1

ID15 ID16 ID17

H

L

BOARD_ID3 {10}BOARD_ID0 {10}

ID9 ID10Description

L

BD5

11

H

L

H

L

H

L

B2A

11 50

1A

BOARD ID SETTING

ID1 ID2

ID0 ID3

Board ID

H

HM70

L

HM76

UMA SKU

VGA SKU

VRAM-1000MHz

GPIO52 {10,38}

GPIO52

H

LW KB Backlight

VRAM-900MHz

Standard

ULV

17"

14"

GV2

GL

W/ 4K2K

W/O 4K2K

W/ HDMI

W/O HDMI

W/ CRT

W/O CRT

Only VGA

Optimus

WIN7

WIN8

HM75_76

NM70

EDP

LVDS

Celeron

I3/I5/I7

45W

35W

B2A

+VCCPDSW

B2A

2

+V3A

+3V

D D

U26F

BOARD_ID4 BOARD_ID5 BOARD_ID6 BOARD_ID2 GPIO8 Box_Vendor

GPIO15{9}

ODD_PRSNT#{33}

DGPU_PWROK{16,22,37}

GPIO27{37}

PLL_ODVR_EN{9}

C C

TEMP_ALERT#{37}

B B

A A

GPIO15

ODD_PRSNT#

BOARD_ID10 GPIO24 GPIO27

PLL_ODVR_EN

BOARD_ID9 BOARD_ID7 GPIO36 GPIO37 BOARD_ID1 BOARD_ID8 BOARD_ID15 TEMP_ALERT# ID_Detect

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

+3V_S5

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

+3V_S5

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

+3V

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

+3V_S5

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

CougarPoint_R1P0

DSW +3V_S5

+3V +3V +3V +3V

+3V

+3V_S5

+3V

+3V +3V

+3V

Harman-Kardon

+3V +3V +3V +3V

+3V_S5

GPIO

NCTF

+3V

R749 10K_4

BOARD_ID11

ONKYO

Non-brand

TACH4 / GPIO68 TACH5 / GPIO69 TACH6 / GPIO70 TACH7 / GPIO71

A20GATE

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

TS_VSS1 TS_VSS2 TS_VSS3 TS_VSS4

VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 VSS_NCTF_32

Box Vendor

PECI

NC_1

GPIO12

C40 B41 C41 A40

P4 AU16 P5 AY11 AY10 T14 AY1

AH8 AK11 AH10 AK10

P37

BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49

L L H H

For XiangYun Layout House Use

Panther Point (GPIO,VSS_NCTF,RSVD)

5

4

PCH_ODD_EN BOARD_ID13 BOARD_ID11 BOARD_ID12

RCIN#

PCH_THRMTRIP#

BOARD_ID11 {34}

Board_ID11 GPIO70

<CLG>

TP19

TP26

C3A

L H L H

R293 390_4

B2A B2A

C3A

C383 *E@0.1U/25V_4X

+V3A+V3A

R358 Metal_IMR@10K_4

ID_Detect Box_Vendor

R357 TEXTURE@10K_4

R712 10K_4

R711 *10K_4

ID_Detect Speaker

H

Metal/IMR

L TEXTURE

3

PCH_ODD_EN {33}

GATEA20 {37}

RCIN# {37} H_PWRGOOD {3} PM_THRMTRIP# {3}

DF_TVS {9}

DSW

GPIO27

R375 10K_4

GPIO46{10}

R716 *10K_4 R360 10K_4

GPIO8 GPIO24

R371 10K_4R372 *10K_4 R717 10K_4

R361 *10K_4

GPIO Pull-up/Pull-down <CLG>

GPIO57

Box_Vendor {34}

Box

Boxless

PCH_ODD_EN

ODD_PRSNT# TEMP_ALERT# RCIN# GATEA20

GPIO36 GPIO37

+3V

W/O KB Backlight

Touch Pad

3.3V (IDTP)

5V(NMTP)

R733 10K_4

GPIO52

R740 10K_4

R679 10K_4 R670 10K_4 R333 10K_4 R332 10K_4

R310 10K_4 R347 10K_4

KB Backlight Metal(Y)

IMR(X)

X

H

L

+3V +3V

R406 70@10K_4

BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3

R385 76@10K_4

+3V +3V

R317 10K_4

BOARD_ID4 BOARD_ID5

+3V

R700 U3_2@10K_4

BOARD_ID9

R698 U2_2@10K_4

B2A

+3V +3V

R306 EDP@10K_4

R779 LDS@10K_4

+3V +3V +3V

R741 OEV@10K_4

BOARD_ID12

R729 PX@10K_4

<CLG>

ID6

ID4 ID8

H

L

H

L

H

L

B2A

+3V

R743 GV2@10K_4

R731 GL@10K_4

B2A

+3V

R322 S&C@10K_4

BOARD_ID10

R321 NS&C@10K_4

C3A

+V3A

R780

BOARD_ID15 BOARD_ID16 BOARD_ID17

70@10K_4

R781 76@10K_4

R742 W7@10K_4

BOARD_ID13

R730 W8@10K_4

ID7

ID5

H

L

H

L

R686 IV@10K_4

R683 EV@10K_4R374 *10K_4

R401 *10K_4

BOARD_ID6

R381 10K_4

B2A

BOARD_ID16 {9} BOARD_ID17 {9}

R405 76@10K_4

R384 NM70@10K_4

ID12

H

L

H

L

H

L

+3V

R383 1000M@10K_4

R382 900M@10K_4

+3V

R704

R778

HM@10K_4

CRT@10K_4

BOARD_ID7

BOARD_ID8

R691

R701

NCRT@10K_4

NHM@10K_4

USB3.0*2 H

USB3.0*1&USB2.0*1

S&C

Non S&C

R782 45W@10K_4

R783 35W@10K_4

BOARD_ID14 {10}

Size Document Numb er Rev

Panther Point 4/6

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

1

ID13 ID14

H

L

H

L

+3V

R744

10K_4

R732

*10K_4

B2A

Quanta Computer Inc.

PROJECT :

5

4

3

2

1

+1.05V +1.05V_PCH_VCC

R662 0_6 R308 0_1206

D D

+1.05V +1.05V_VCCAPLL_EXP

+1.05V

C C

B B

R301 0_6

R285 0_8 R281 0_1206

+1.05V

+1.05V_PCH_VCCDPLL_EXP+1.05V

+1.05V_VCCIO

R653 *0_4

R286 0_6

C400 1U/6.3V_4X

C688 *10U/6.3V_6X

C393 1U/6.3V_4X

C385 1U/6.3V_4X

R649 0_8

VccCORE =1.73A

C405

C396

1U/6.3V_4X

VccIO =3.799 A

C390

C387

1U/6.3V_4X

C389 10U/6.3V_6X

+3V_VCC_EXP+3V

VccVRM =0.147 A

+VCCAFDI_VRM

+1.1V_VCC_DMI

+

C369 *220U/2.5V_3528P_E35b

C692

0.1U/10V_4X

+VCCAFDI_VRM

+1.05V_VCCAPLL_FDI

+1.05V_VCCDPLL_FDI

C700 10U/6.3V_6X

AA23 AC23 AD21 AD23

AF21

AF23 AG21 AG23 AG24 AG26 AG27 AG29

AJ23

AJ26

AJ27

AJ29

AJ31

AN19

BJ22

AN16 AN17

AN21 AN26 AN27

AP21

AP23

AP24

AP26

AT24

AN33 AN34

BH29

AP16

BG6

AP17

AU20

Internal PLL and VRMs Display PLL A/B Analog Power

L35 PIV@10uh_ 8_100MA

+1.5V

A A

+VCCAFDI_VRM

R309 0_6

C404 *10U/6.3V_6X

D13 DS3@RB500V-40_100MA

5

+VCCPDSW+3VPCU

+1.05V

L34 OEV@0_8

Clock power on core wellDeep Sx power well

+3V

B2A

U26G

VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15] VCCCORE[16] VCCCORE[17]

VCCIO[28]

VCCAPLLEXP

VCCIO[15] VCCIO[16]

VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20] VCCIO[21] VCCIO[22] VCCIO[23] VCCIO[24]

VCCIO[25] VCCIO[26]

VCC3_3[3]

VCCVRM[2]

VccAFDIPLL

VCCIO[27]

VCCDMI[2]

CougarPoint_R1P0

R366 *0_6 R379 1/F_4

POWER

CRTLVDS

VCC CORE

DMI

VCCIO

DFT / SPI HVCMOS

FDI

L17 10uh _8_100MA

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

+

C695 *PIV@220U/2.5V_3528P_E35b

+

C682 *PIV@220U/2.5V_3528P_E35b

4

Panther POINT (POWER) Panther Point-M (POWER)

VccADAC =63mA

U48

U47

VccALVDS=1mA

AK36 AK37

VccTX_LVDS=40mA

AM37 AM38

C377

AP36

PIVLDS@0.01U/25V_4X

AP37

VCCSPI

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

+VCCAFDI_VRM

C427 1U/6.3V_4X

C418

0.1U/10V_4X

R304 0_8

C399

0.1U/10V_4X

C705 1U/6.3V_4X

R343 0_6

C428 *10U/6.3V_6X

R678 0_6

C436

0.01U/25V_4X

C388

PIVLDS@0.01U/25V_4X

+VCCAFDI_VRM

+VCCA_DAC_1_2

C435

0.1U/10V_4X

+VCCALVDS +3V

+VCC_TX_LVDS

+3V+3V_VCC_GIO

L16 FCM1608 KF-102T01_100MA

C420

C433

22U/6.3V_8X

*10U/6.3V_8X

R296 PIVLDS@0_4 R295 OEV@0_4

R784 PIVEDP@0_4

L14 PIVLDS@0.1uh_8 _250MA R288 OEV@0_4

R785 PIVEDP@0_4 C376 *PIVLDS@10U/6.3V_8X

VCCDMI = 47mA

R284 0_4

C375 1U/6.3V_4X

VCCCLKDMI = 75mA

+VCC_DMI_CCI

L15 *10uh _8_100MA

+1.8V+VCCP_NAND

VccDFTERM = 2 mA

+V3A+3V_VCCME_SPI

VCCSPI = 10mA

B2A

R349 *1/F_4 R342 0_4

B2A

Co-Lay B2A

+VTT+1.1V_VCC_DMI

+1.05V+1.1V_VCC_DMI_CCI

2mA

VCCRTC<1mA VCCSUSHDA= 10mA

3

C439 10U/6.3V_6X

C697 1U/6.3V_4X

C694 1U/6.3V_4X

+3V_SUS_CLKF33

C415 1U/6.3V_4X

+1.05V_VCCA_A_DPL

R659 0_6

+1.05V_VCCA_B_DPL

+3V

R313 *0_4

+1.05V

+VCCPDSW

AD49

75mA 75mA

C690 *0.1U/10V_4X

C467 *0.1U/10V_4X

C416 *0.1U/10V_4X

+VCCDPLL_CPY

C392 *1U/6.3V_4X

+

C401 *220U/2.5V_3528P_E35b

+VCCRTCEXT

+VCCAFDI_VRM

+1.05V_VCCA_A_DPL +1.05V_VCCA_B_DPL

+VCCDIFFCLK +VCCDIFFCLKN

+V1.05V_SSCVCC

+VCCSST

+V1.05M_VCCSUS

+VTT_VCCPCPU

+VCCACLK

+VCCPDSW

+PCH_VCCDSW

+3V_SUS_CLKF33

+VCCSUS1

C469

*DS3@0.33U/6.3V_4X

T16

V12

T38

BH23

AL29

AL24

AA19 AA21 AA24 AA26 AA27 AA29 AA31 AC26 AC27 AC29 AC31 AD29 AD31

W21 W23 W24 W26 W29 W31 W33

N16

Y49

BD47

BF47

AF17 AF33 AF34

AG34

AG33

V16

T17 V19

BJ8

A22

R416 NDS3@0_4

+3V_S5

R796 NS3@0_4

B2A

+1.8V

+1.05V

B2A B2A

+VCCAPLL_CPY_PCH

L32 *10uh _8_100MAL33 *1uh_ 6_25MA

+1.05V_VCCEPW

R314 0_1206

+1.05V

+VTT

+3V_RTC

+3V_S5 +5V_S5+V3A +V5A

C470

*DS3@0.33U/6.3V_4X

C408 1U/6.3V_4X

C402 10U/6.3V_8X

R292 0_6

C382 1U/6.3V_4X

R668 0_6

C702 1U/6.3V_4X

R299 0_6

C386 1U/6.3V_4X

R327 *0_6

C417 *1U/6.3V_4X

R654 0_4

C687

4.7U/6.3V_6X

C437 1U/6.3V_4X

Co-Lay Co-Lay

B2A B2A

R786 NS3@0_6 R420 NDS3@0_6

R434 DS3@100K_4

SLP_SUS#{8 ,37}

VCCDSW3_3= 1mA

C414

0.1U/10V_4X

R298 0_4

+1.05V

C689 *10U/6.3V_6X

VccASW =0.803 A

C403 1U/6.3V_4X

C409 10U/6.3V_8X

VCCDIFFCLKN= 50mA VCCSSC= 95mA

C691

0.1U/10V_4X

C438

0.1U/10V_4X

1

Q38 DS3@ME13 03_3A

2

R429 DS3@0_4

6

2

1

C406 1U/6.3V_4X

C423 0.1U/10V_4 X

+VCCAFDI_VRM

C411 0.1U/10V_4 X

3

Q40A DS3@2N7002KDW_115MA

U26J

VCCACLK

VCCDSW3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2 VCCIO[14]

DCPSUS[3]

VCCASW[1] VCCASW[2] VCCASW[3] VCCASW[4] VCCASW[5] VCCASW[6] VCCASW[7] VCCASW[8] VCCASW[9] VCCASW[10] VCCASW[11] VCCASW[12] VCCASW[13] VCCASW[14] VCCASW[15] VCCASW[16] VCCASW[17] VCCASW[18] VCCASW[19] VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA VCCADPLLB

VCCIO[7] VCCDIFFCLKN[1] VCCDIFFCLKN[2] VCCDIFFCLKN[3]

VCCSSC

DCPSST

DCPSUS[1] DCPSUS[2]

V_PROC_IO

VCCRTC

CougarPoint_R1P0

R787 NS3@0_6 R421 NDS3@0_6

R431 DS3@100K_4

2

POWER

Clock and Miscellaneous

CPURTC

1

Q37 DS3@ME13 03_3A

5

VCCSUS3_3[10]

VCCSUS3_3[1]

PCI/GPIO/LPCMISC

VCCAPLLSATA

SATA USB

HDA

3

2

R430 DS3@0_4

34

Q39B DS3@2N7002KDW_115MA

VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33]

VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

V5REF

VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5]

VCC3_3[1] VCC3_3[8] VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12] VCCIO[13]

VCCIO[6]

VCCVRM[1]

VCCIO[2] VCCIO[3] VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

N26 P26 P28 T27 T29

T23 T24 V23 V24 P24

T26

M26

AN23 AN24

P34

N20 N22 P20 P22

AA16 W16 T34

AJ2

AF13

AH13 AH14

AF14 AK1

+V1.1LAN_VCCAPLL

AF11

+VCCAFDI_VRM

AC16

+VCC_SATA

AC17 AD17

T21

V21

T19

P32

+V3.3A_1.5A_HDA_IO

+3V_VCCPUSB

+3V_VCCAUBG

+VCCAUPLL

+5V_PCH_VCC5REFSUS

+VCCA_USBSUS +3V_VCCPSUS

+5V_PCH_VCC5REF

+3V_VCCPSUS

+3V_VCCPCORE

+3V

C434

0.1U/10V_4X

+V1.05S_SATA3

C407 1U/6.3V_4X

+1.05V_VCCEPW

C452 *1U/6.3V_4X

R297 0_8

C413 1U/6.3V_4X

C410

0.1U/10V_4X

C425

0.1U/10V_4X

C412 *1U/6.3V_4X

C460

0.1U/10V_4X

C391 *1U/6.3V_4X

C421 1U/6.3V_4X

C424 1U/6.3V_4X

C419

0.1U/10V_4X

C397

0.1U/10V_4X

C394 1U/6.3V_4X

L36 *10uh _8_100MA C701

*10U/6.3V_6X

R320 0_6

R388 0_6

R387 0_6

R331 0_6

R419 10/F_4

D10 RB500V-4 0_100MA

V5REF= 1mA

R408 10/F_4

D9 RB500V-4 0_100MA

R386 0_6

VCCSUS3_3 = 65mA

Vcc3_3 =0.178 A

R324 0_6

Vcc3_3 =0.178 A

R664 0_8

+1.05V

+1.05V+1.05V_VCCUSBCORE

+V3A

12

VCCSUS3_3 = 65mA

+1.05V

VCC5REFSUS=1mA

+V5A +V3A

+5V +3V

+V3A

+3V

+1.05V

VccVRM =0.147 A

R400 0_4

C422

0.1U/10V_4X

Size Document Number Rev

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

+V3A

B2A

Quanta Computer Inc.

PROJECT :

BD5

PROJECT :

BD5

PROJECT :

Panther Point 5/6

1

BD5

12 50

1A

For XiangYun Layout House Use

5

4

3

2

1

13

U26I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15 B19 B23 B27 B31 B35 B39

B7

F45 BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38

BB4 BB46 BC14 BC18

BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46

BD5 BE22 BE26 BE40 BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28

BD3 BF30 BF38 BF40

BF8 BG17 BG21 BG33 BG44

BG8 BH11 BH15 BH17 BH19

H10 BH27 BH31 BH33 BH35 BH39 BH43

BH7

D3 D12 D16 D18 D22 D24 D26 D30 D32 D34 D38 D42

D8 E18 E26 G18 G20 G26 G28 G36 G48 H12 H18 H22 H24 H26 H30 H32 H34

F3

VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258]

CougarPoint_R1P0

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

<CLG>

D D

C C

B B

Panther Point-M (GND)

U26H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

CougarPoint_R1P0

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

A A

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

Panther Point 6/6

Wednesday, January 16, 2013

1

BD5

13 50

1A

For XiangYun Layout House Use

1

2

3

4

5

6

7

8

<DDR>

H=8 (Rev)

M_A_A[15:0]{4}

A A

M_A_BS#0{4} M_A_BS#1{4} M_A_BS#2{4} M_A_CS#0{4} M_A_CS#1{4}

M_A_CLKP0{4}

M_A_CLKN0{4}

M_A_CLKP1{4}

M_A_CLKN1{4}

M_A_CKE0{4} M_A_CKE1{4} M_A_CAS#{4} M_A_RAS#{4}

M_A_WE#{4}

R468 10K_4

CGCLK_SMB{15,30,38} CGDAT_SMB{15,30,38}

M_A_ODT0{4} M_A_ODT1{4}

B B

M_A_DQSP[7:0]{4}

M_A_DQSN[7:0]{4}

R467 10K_4

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIMM0_SA0 DIMM0_SA1

CGCLK_SMB CGDAT_SMB

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

JDIM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDRRK-20401-TP8D

5

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47

(204P)

PC2100 DDR3 SDRAM SO-DIMM

DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

M_A_DQ4

7

M_A_DQ5

15

M_A_DQ3

17

M_A_DQ7

4

M_A_DQ0

6

M_A_DQ1

16

M_A_DQ6

18

M_A_DQ2

21

M_A_DQ9

23

M_A_DQ13

33

M_A_DQ15

35

M_A_DQ8

22

M_A_DQ12

24

M_A_DQ10

34

M_A_DQ11

36

M_A_DQ14

39

M_A_DQ17

41

M_A_DQ20

51

M_A_DQ19

53

M_A_DQ22

40

M_A_DQ16

42

M_A_DQ21

50

M_A_DQ23

52

M_A_DQ18

57

M_A_DQ31

59

M_A_DQ30

67

M_A_DQ25

69

M_A_DQ27

56

M_A_DQ28

58

M_A_DQ26

68

M_A_DQ24

70

M_A_DQ29

129

M_A_DQ36

131

M_A_DQ37

141

M_A_DQ35

143

M_A_DQ34

130

M_A_DQ32

132

M_A_DQ33

140

M_A_DQ39

142

M_A_DQ38

147

M_A_DQ45

149

M_A_DQ44

157

M_A_DQ47

159

M_A_DQ46

146

M_A_DQ40

148

M_A_DQ41

158

M_A_DQ42

160

M_A_DQ43

163

M_A_DQ48

165

M_A_DQ53

175

M_A_DQ55

177

M_A_DQ54

164

M_A_DQ52

166

M_A_DQ49

174

M_A_DQ51

176

M_A_DQ50

181

M_A_DQ57

183

M_A_DQ60

191

M_A_DQ59

193

M_A_DQ62

180

M_A_DQ61

182

M_A_DQ56

192

M_A_DQ63

194

M_A_DQ58

M_A_DQ[63:0] {4}

+1.5VSUS

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

R480 *10K_4

+3V

DDR3_DRAMRST#{15,27}

+SMDDR_VREF_DQ0_M3{6}

+SMDDR_VREF_DQ0_M1

C203 *E@0.1U/25V_4X

R166 0_4 R165 0_4

+3V

PM_EXTTS#0

+SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDRRK-20401-TP8D

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

PC2100 DDR3 SDRAM SO-DIMM

203

VTT1

204

VTT2

GND

206

205

+SMDDR_VTERM

14

C C

DDR Power Decoupling DDR3 VREF CA

+1.5VSUS

C110 *4.7U/6.3V_6X C103 4.7U/6.3V_6X C137 4.7U/6.3V_6X C160 *4.7U/6.3V_6X C115 *4.7U/6.3V_6X C100 *4.7U/6.3V_6X C102 0.1U/10V_4X C149 0.1U/10V_4X C126 0.1U/10V_4X C128 0.1U/10V_4X

D D

1

+SMDDR_VREF_DQ0

C241 0.1U/10V_4X C236 *2.2U/6.3V_6X

+SMDDR_VREF_DIMM

C96 0.1U/10V_4X C88 *2.2U/6.3V_6X

+3V

C66 *2.2U/6.3V_6X C63 0.1U/10V_4X

2

+SMDDR_VTERM

C61 1U/6.3V_4X C59 1U/6.3V_4X C60 1U/6.3V_4X C62 1U/6.3V_4X

3

DDR3 VREF DQ (M1)

C83 0.1U/10V_4X

R73 *1K/F_4

+1.5VSUS

R164 1K/F_4

R172

1K/F_4

+SMDDR_VREF_DQ0_M1

C254

0.1U/10V_4X

4

+SMDDR_VREF_DIMM

R67 0_4

R91 *1K/F_4

<DDR>

C255 *0.047U/10V_4X

+SMDDR_VREF

+1.5VSUS

+

C164 *220U/2.5V_3528P_E35b

+SMDDR_VREF_DIMM {15}

5

SMBUS ISOLATE

SDATA{10,30}

SCLK{10,30}

+3V

2

1

6

Q6A 2N7002KDW_115MA

+3V

5

3 4

Q6B 2N7002KDW_115MA

6

R63

4.7K_4

CGDAT_SMB

R43

4.7K_4

CGCLK_SMB

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

7

Date: Sheet of

PROJECT :

DDR3 DIMM-0

Wednesday, January 16, 2013

8

BD5

14 50

1A

For XiangYun Layout House Use

1

2

3

4

5

6

7

8

15

<DDR>

A A

M_B_A[15:0]{4}

M_B_BS#0{4} M_B_BS#1{4}

M_B_BS#2{4} M_B_CS#0{4} M_B_CS#1{4}

M_B_CLKP0{4}

M_B_CLKN0{4}

M_B_CLKP1{4}

M_B_CLKN1{4}

M_B_CKE0{4} M_B_CKE1{4} M_B_CAS#{4} M_B_RAS#{4}

M_B_WE#{4}

+3V

B B

CGCLK_SMB{14,30,38} CGDAT_SMB{14,30,38}

M_B_ODT0{4} M_B_ODT1{4}

M_B_DQSP[7:0]{4}

M_B_DQSN[7:0]{4}

R19 10K_4 R22 10K_4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

DIMM1_SA0 DIMM1_SA1

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

JDIM1A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDRRK-20401-TP4B

H=4 (Rev)

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

(204P)

163

PC2100 DDR3 SDRAM SO-DIMM

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_B_DQ4 M_B_DQ1 M_B_DQ2 M_B_DQ6 M_B_DQ5 M_B_DQ0 M_B_DQ3 M_B_DQ7 M_B_DQ13 M_B_DQ8 M_B_DQ14 M_B_DQ15 M_B_DQ12 M_B_DQ9 M_B_DQ11 M_B_DQ10 M_B_DQ21 M_B_DQ22 M_B_DQ19 M_B_DQ17 M_B_DQ20 M_B_DQ16 M_B_DQ18 M_B_DQ23 M_B_DQ25 M_B_DQ29 M_B_DQ30 M_B_DQ27 M_B_DQ28 M_B_DQ24 M_B_DQ26 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ47 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ42 M_B_DQ52 M_B_DQ53 M_B_DQ50 M_B_DQ51 M_B_DQ49 M_B_DQ48 M_B_DQ55 M_B_DQ54 M_B_DQ61 M_B_DQ60 M_B_DQ63 M_B_DQ59 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ62

M_B_DQ[63:0] {4}

DDR3_DRAMRST#{14,27}

+SMDDR_VREF_DQ1_M3{6}

+SMDDR_VREF_DIMM{14}

+3V

C199 *E@0.1U/25V_4X

+SMDDR_VREF_DQ1_M1

R23 *10K_4

R149 0_4 R156 0_4

+1.5VSUS

+3V

PM_EXTTS#1

+SMDDR_VREF_DQ1

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDRRK-20401-TP4B

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

(204P)

PC2100 DDR3 SDRAM SO-DIMM

203

VTT1 VTT2

GND

205

+SMDDR_VTERM

204

GND

206

C C

<DDR> DDR Power Decoupling

+1.5VSUS

C99 4.7U/6.3V_6X C114 *4.7U/6.3V_6X C127 *4.7U/6.3V_6X C106 4.7U/6.3V_6X C136 4.7U/6.3V_6X C153 4.7U/6.3V_6X C107 0.1U/10V_4X

D D

1

C117 0.1U/10V_4X C124 0.1U/10V_4X C152 0.1U/10V_4X

+SMDDR_VREF_DIMM

C87 0.1U/10V_4X C86 *2.2U/6.3V_6X

+SMDDR_VREF_DQ1

+3V

C65 2.2U/6.3V_4X C64 *0.1U/10V_4X

2

+SMDDR_VTERM

C56 1U/6.3V_4XC240 0.1U/10V_4X C54 1U/6.3V_4XC244 *2.2U/6.3V_6X C53 1U/6.3V_4X C242 C55 1U/6.3V_4X

C3A

3

+1.5VSUS

R158 1K/F_4

+SMDDR_VREF_DQ1_M1

R157

1K/F_4

4

C243

*0.047U/10V_4X

<DDR>DDR3 VREF DQ (M1)

+1.5VSUS

+

C98

0.1U/10V_4X

*220U/2.5V_3528P_E35b

5

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

6

7

Date: Sheet of

PROJECT :

DDR3 DIMM-1

Wednesday, January 16, 2013

8

BD5

15 50

1A

For XiangYun Layout House Use

1

+1.05V_GPU

A A

PEX_IOVDD + PEX_IOVDDQ = 3.3A

+1.05V_GPU

PEX_PLL_HVDD + PEX_SVDD_3V3 = 210mA

+3V_GPU

B B

VGA_VCCSENSE{47}

VGA_VSSSENSE{47}

C C

R527 *EV@200/F_4

PEX_PLLVDD = 150mA

+1.05V_GPU

D D

L24 EV@HCB1608KF-181T15_1.5A

C616 EV@4.7U/6.3V_6X C285 EV@1U/6.3V_4X C627 EV@0.1U/10V_4X

R533 EV@10K_4

R526 EV@2.49K/F_4

1

2

C594 EV@10U/6.3V_6X C595 EV@10U/6.3V_6X C217 EV@10U/6.3V_6X C596 EV@10U/6.3V_6X C216 EV@4.7U/6.3V_6X C287 EV@1U/6.3V_4X C277 EV@1U/6.3V_4X

C214 EV@10U/6.3V_6X C593 EV@10U/6.3V_6X C215 EV@10U/6.3V_6X C213 EV@10U/6.3V_6X C270 EV@4.7U/6.3V_6X C286 EV@1U/6.3V_4X C278 EV@1U/6.3V_4X

C288 EV@0.1U/10V_4X C359 EV@4.7U/6.3V_6X C284 EV@4.7U/6.3V_6X

PEX_TSTCLK

PEX_TSTCLK#

PEX_PLLVDD

TESTMODE

PEX_TERMP

AA22 AB23 AC24 AD25 AE26 AE27

AA10 AA12 AA13 AA16 AA18 AA19 AA20 AA21 AB22 AC23 AD24 AE25

AF26 AF27

AF22

AE22

AA14 AA15

AF25

AA8 AA9

AB8

F2

F1

AD9

For XiangYun Layout House Use

2

U24A

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

PEX_PLL_HVDD PEX_PLL_HVDD

PEX_SVDD_3V3

VDD_SENSE

GND_SENSE

PEX_TSTCLK_OUT PEX_TSTCLK_OUT

PEX_PLLVDD PEX_PLLVDD

TESTMODE

PEX_TERMP

3

NC

PCI_EXPRESS

N14P_GV2

3

NC NC

GK208

GF119N14M_GLGK208N14P_GV2

PEX_WAKE

PEX_RST

PEX_CLKREQ

PEX_REFCLK PEX_REFCLK

PEX_TX0 PEX_TX0

PEX_RX0 PEX_RX0

PEX_TX1 PEX_TX1

PEX_RX1 PEX_RX1

PEX_TX2 PEX_TX2

PEX_RX2 PEX_RX2

PEX_TX3 PEX_TX3

PEX_RX3 PEX_RX3

PEX_TX4 PEX_TX4

PEX_RX4 PEX_RX4

PEX_TX5 PEX_TX5

PEX_RX5 PEX_RX5

PEX_TX6 PEX_TX6

PEX_RX6 PEX_RX6

PEX_TX7 PEX_TX7

PEX_RX7 PEX_RX7

PEX_TX8 PEX_TX8

PEX_RX8 PEX_RX8

PEX_TX9 PEX_TX9

PEX_RX9 PEX_RX9

PEX_TX10 PEX_TX10

PEX_RX10 PEX_RX10

PEX_TX11 PEX_TX11

PEX_RX11 PEX_RX11

PEX_TX12 PEX_TX12

PEX_RX12 PEX_RX12

PEX_TX13 PEX_TX13

PEX_RX13 PEX_RX13

PEX_TX14 PEX_TX14

PEX_RX14 PEX_RX14

PEX_TX15 PEX_TX15

PEX_RX15 PEX_RX15

GF119

N14M_GL

COMMONbga595-nvidia-n13p-g v2-s-a2

4

AB6

AC7 AC6 AE8

AD8 AC9

AB9 AG6

AG7 AB10

AC10 AF7

AE7 AD11

AC11 AE9

AF9 AC12

AB12 AG9

AG10 AB13

AC13 AF10

AE10 AD14

AC14 AE12

AF12 AC15

AB15 AG12

AG13 AB16

AC16 AF13

AE13 AD17

AC17 AE15

AF15 AC18

AB18 AG15

AG16 AB19

AC19 AF16

AE16 AD20

AC20 AE18

AF18 AC21

AB21 AG18

AG19 AD23

AE23 AF19

AE19 AF24

AE24 AE21

AF21 AG24

AG25 AG21

AG22

VGA_RST# PEX_CLKREQ#

C_PEG_RX0 C_PEG_RX#0

C_PEG_RX1 C_PEG_RX#1

C_PEG_RX2 C_PEG_RX#2

C_PEG_RX3 C_PEG_RX#3

C_PEG_RX4 C_PEG_RX#4

C_PEG_RX5 C_PEG_RX#5

C_PEG_RX6 C_PEG_RX#6

C_PEG_RX7 C_PEG_RX#7

5

C636 *EV@0.1U/10V_4X

R537 EV@100_4 R188 EV@10K_4

C223 EV@0.22U/10V_4X C222 EV@0.22U/10V_4X

C205 EV@0.22U/10V_4X C206 EV@0.22U/10V_4X

C208 EV@0.22U/10V_4X C207 EV@0.22U/10V_4X

C225 EV@0.22U/10V_4X C224 EV@0.22U/10V_4X

C227 EV@0.22U/10V_4X C226 EV@0.22U/10V_4X

C210 EV@0.22U/10V_4X C209 EV@0.22U/10V_4X

C228 EV@0.22U/10V_4X C229 EV@0.22U/10V_4X

C212 EV@0.22U/10V_4X C211 EV@0.22U/10V_4X

PCIE (RESET)

PCIE (CLK_REQ)

DGPU_PWROK{11,22,37}

5

PEGX_RST#

+3V_GPU

CLK_PCIE_VGAP {10} CLK_PCIE_VGAN {10}

PEG_RXP0 {3} PEG_RXN0 {3}

PEG_TXP0 {3} PEG_TXN0 {3}

PEG_RXP1 {3} PEG_RXN1 {3}

PEG_TXP1 {3} PEG_TXN1 {3}

PEG_RXP2 {3} PEG_RXN2 {3}

PEG_TXP2 {3} PEG_TXN2 {3}

PEG_RXP3 {3} PEG_RXN3 {3}

PEG_TXP3 {3} PEG_TXN3 {3}

PEG_RXP4 {3} PEG_RXN4 {3}

PEG_TXP4 {3} PEG_TXN4 {3}

PEG_RXP5 {3} PEG_RXN5 {3}

PEG_TXP5 {3} PEG_TXN5 {3}

PEG_RXP6 {3} PEG_RXN6 {3}

PEG_TXP6 {3} PEG_TXN6 {3}

PEG_RXP7 {3} PEG_RXN7 {3}

PEG_TXP7 {3} PEG_TXN7 {3}

VGA_PLTRST#{10}

DGPU_HOLD_RST#{10}

PEX_CLKREQ#

Q25 *EV@LTC044EUBFS8TL_30MA

6

R179 *EV@0_4

2

1

6

+3V

2 1

R163 OEV@0_4

+3V_GPU

R180 *EV@4.7K_4

1 3

+3V_GPU

2

EV@2N7002K_300MA

Q57

7

8

16

U9 PX@TC7SH08FU(F)

3 5

3

CLK_PEGA_REQ#PEX_CLKREQ#

Size Document Number Rev

Date: Sheet of

C248 PX@0.1U/10V_4X

4

R160 PX@100K_4

CLKREQ_C1

2

N14x (PCIE I/F)

Wednesday, January 16, 2013

7

PEGX_RST#

PEGX_RST# {20}

B2A

CLK_PEGA_REQ# {10}

Q24 *EV@LTC044EUBFS8TL_30MA

1 3

Quanta Computer Inc.

PROJECT :

Chief River

16 50

8

B2A

A1A

1

F3

R575 EV@10K_4

FB_CLAMP{20,37,48}

A A

B B

+1.5V_GPU

FB_PLLAVDD = 62mA *2

C C

+1.05V_GPU

R574 GC6@0_4

TP58

FBA_CMD31

R238 *EV@60.4/F_4 R220 *EV@60.4/F_4

L10 EV@HCB1608KF-181T15_1.5A

C330 EV@10U/6.3V_6X C340 EV@0.1U/10V_4X C322 EV@0.1U/10V_4X C321 EV@0.1U/10V_4X

FB_CLAMP_R

FBA_DEBUG FBA_DEBUG1

+FB_PLLAVDD

C27 C26 E24 F24 D27 D26 F25 F26 F23 G22 G23 G24 F27 G25 G27

G26 M24 M23

K24

K23 M27 M26 M25

K26

K22

J23

J25

J24

K27

K25

J27

J26

F22

J22

D24

D25

N22 M22

D18

C18

D17

D16

T24

U24

V24

V25

F16

P22

H22

FBA_CMD0{23,24} FBA_CMD1{24} FBA_CMD2{23} FBA_CMD3{23,24} FBA_CMD4{23,24} FBA_CMD5{23,24} FBA_CMD6{23,24} FBA_CMD7{23,24} FBA_CMD8{23,24}

FBA_CMD9{23,24} FBA_CMD10{23,24} FBA_CMD11{23,24} FBA_CMD12{23,24} FBA_CMD13{23,24} FBA_CMD14{23,24} FBA_CMD15{23,24} FBA_CMD16{23,24} FBA_CMD17{24} FBA_CMD18{23} FBA_CMD19{23,24} FBA_CMD20{23,24} FBA_CMD21{23,24} FBA_CMD22{23,24} FBA_CMD23{23,24} FBA_CMD24{23,24} FBA_CMD25{23,24} FBA_CMD26{23,24} FBA_CMD27{23} FBA_CMD28{23,24} FBA_CMD29{23,24} FBA_CMD30{24}

VMA_CLK0{23,24}

VMA_CLK0#{23,24}

VMA_CLK1{23,24}

VMA_CLK1#{23,24}

FB_DLLAVDD = 35mA

2

U24B

FB_CLAMP

DUAL RANK (Mode E)

Rank 0/1 [31:0] ODT

FBA_CMD0

Rank1 [31:0] CS1#

FBA_CMD1

Rank0 [31:0] CS0#

FBA_CMD2

Rank 0/1 [31:0] CKE

FBA_CMD3

[Rank0:A9],[Rank1:A11]

FBA_CMD4

[Rank0:A6],[Rank1:A7]

FBA_CMD5

[Rank0:A3],[Rank1:BA1]

FBA_CMD6

[Rank0:A0],[Rank1:A12]

FBA_CMD7

[Rank0:A8],[Rank1:A8]

FBA_CMD8

[Rank0:A12],[Rank1:A0]

FBA_CMD9

[Rank0:A1],[Rank1:A2]

FBA_CMD10

[Rank0:RAS#],[Rank1:RAS#]

FBA_CMD11

[Rank0:A13],[Rank1:A14]

FBA_CMD12

[Rank0:BA1],[Rank1:A3]

FBA_CMD13

[Rank0:A14],[Rank1:A13]

FBA_CMD14

[Rank0:CAS#],[Rank1:CAS#]

FBA_CMD15

Rank 0/1 [63:32] ODT

FBA_CMD16

Rank1 [63:32] CS1#

FBA_CMD17

Rank0 [63:32] CS0#

FBA_CMD18

Rank 0/1 [63:32] CKE

FBA_CMD19

[Rank0:RST],[Rank1:RST]

FBA_CMD20

[Rank0:A7],[Rank1:A6]

FBA_CMD21

[Rank0:A4],[Rank1:A5]

FBA_CMD22

[Rank0:A11],[Rank1:A9]

FBA_CMD23

[Rank0:A2],[Rank1:A1]

FBA_CMD24

[Rank0:A10],[Rank1:WE#]

FBA_CMD25

[Rank0:A5],[Rank1:A4]

FBA_CMD26 FBA_CMD27

[Rank0:WE#],[Rank1:A10]

FBA_CMD28

[Rank0:BA0],[Rank1:BA0]

FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DEBUG0 FBA_DEBUG1

FBA_CLK0 FBA_CLK0 FBA_CLK1 FBA_CLK1

FBA_WCK01 FBA_WCK01 FBA_WCK23 FBA_WCK23 FBA_WCK45 FBA_WCK45 FBA_WCK67 FBA_WCK67

FB_PLLAVDD

FB_DLLAVDD

bga595-nvidia-n13p-gv2-s-a2

FBA

Rank0 BA2

Rank1 BA2

3

E18

VMA_DQ0

FBA_D0

F18

VMA_DQ1

FBA_D1

E16

VMA_DQ2

FBA_D2

F17

VMA_DQ3

FBA_D3

D20

VMA_DQ4

FBA_D4

D21

VMA_DQ5

FBA_D5

F20

VMA_DQ6

FBA_D6

E21

VMA_DQ7

FBA_D7

E15

VMA_DQ8

FBA_D8

D15

VMA_DQ9

FBA_D9

F15

VMA_DQ10

FBA_D10

F13

VMA_DQ11

FBA_D11

C13

VMA_DQ12

FBA_D12

B13

VMA_DQ13

FBA_D13

E13

VMA_DQ14

FBA_D14

D13

VMA_DQ15

FBA_D15

B15

VMA_DQ16

FBA_D16

C16

VMA_DQ17

FBA_D17

A13

VMA_DQ18

FBA_D18

A15

VMA_DQ19

FBA_D19

B18

VMA_DQ20

FBA_D20

A18

VMA_DQ21

FBA_D21

A19

VMA_DQ22

FBA_D22

C19

VMA_DQ23

FBA_D23

B24

VMA_DQ24

FBA_D24

C23

VMA_DQ25

FBA_D25

A25

VMA_DQ26

FBA_D26

A24

VMA_DQ27

FBA_D27

A21

VMA_DQ28

FBA_D28

B21

VMA_DQ29

FBA_D29

C20

VMA_DQ30

FBA_D30

C21

VMA_DQ31

FBA_D31

R22

VMA_DQ32

FBA_D32

R24

VMA_DQ33

FBA_D33

T22

VMA_DQ34

FBA_D34

R23

VMA_DQ35

FBA_D35

N25

VMA_DQ36

FBA_D36

N26

VMA_DQ37

FBA_D37

N23

VMA_DQ38

FBA_D38

N24

VMA_DQ39

FBA_D39

V23

VMA_DQ40

FBA_D40

V22

VMA_DQ41

FBA_D41

T23

VMA_DQ42

FBA_D42

U22

VMA_DQ43

FBA_D43

Y24

VMA_DQ44

FBA_D44

AA24

VMA_DQ45

FBA_D45

Y22

VMA_DQ46

FBA_D46

AA23

VMA_DQ47

FBA_D47

AD27

VMA_DQ48

FBA_D48

AB25

VMA_DQ49

FBA_D49

AD26

VMA_DQ50

FBA_D50

AC25

VMA_DQ51

FBA_D51

AA27

VMA_DQ52

FBA_D52

AA26

VMA_DQ53

FBA_D53

W26

VMA_DQ54

FBA_D54

Y25

VMA_DQ55

FBA_D55

R26

VMA_DQ56

FBA_D56

T25

VMA_DQ57

FBA_D57

N27

VMA_DQ58

FBA_D58

R27

VMA_DQ59

FBA_D59

V26

VMA_DQ60

FBA_D60

V27

VMA_DQ61

FBA_D61

W27

VMA_DQ62

FBA_D62

W25

VMA_DQ63

N/A

FBA_D63

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FB_VREF_PROBE

COMMON

D19 D14 C17 C22 P24 W24 AA25 U25

E19 C15 B16 B22 R25 W23 AB26 T26

F19 C14 A16 A22 P25 W22 AB27 T27

D23

VMA_DM0 VMA_DM1 VMA_DM2 VMA_DM3 VMA_DM4 VMA_DM5 VMA_DM6 VMA_DM7

VMA_WDQS0 VMA_WDQS1 VMA_WDQS2 VMA_WDQS3 VMA_WDQS4 VMA_WDQS5 VMA_WDQS6 VMA_WDQS7

VMA_RDQS0 VMA_RDQS1 VMA_RDQS2 VMA_RDQS3 VMA_RDQS4 VMA_RDQS5 VMA_RDQS6 VMA_RDQS7

FB_VREF_PROBE

VMA_DM[7:0] {23,24}

VMA_WDQS[7:0] {23,24}

VMA_RDQS[7:0] {23,24}

TP12

VMA_DQ[63:0]

FBVDDQ + FBVDD = 4.88A

C331 EV@0.1U/10V_4X C303 EV@0.1U/10V_4X C317 EV@1U/10V_6X C295 EV@1U/10V_6X C649 EV@4.7U/6.3V_6X C329 EV@4.7U/6.3V_6X C327 EV@10U/6.3V_6X C328 EV@10U/6.3V_6X

+1.5V_GPU +1.5V_GPU

4

VMA_DQ[63:0] {23,24}

+1.5V_GPU

U24D

B26

FBVDDQ

C25

FBVDDQ

E23

FBVDDQ

E26

FBVDDQ

F14

FBVDDQ

F21

FBVDDQ

G13

FBVDDQ

G14

FBVDDQ

G15

FBVDDQ

G16

FBVDDQ

G18

FBVDDQ

G19

FBVDDQ

G20

FBVDDQ

G21

FBVDDQ

H24

FBVDDQ

H26

FBVDDQ

J21

FBVDDQ

K21

FBVDDQ

L22

FBVDDQ

L24

FBVDDQ

L26

FBVDDQ

M21

FBVDDQ

N21

FBVDDQ

R21

FBVDDQ

T21

FBVDDQ

V21

FBVDDQ

W21

FBVDDQ

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CALTERM_GND

bga595-nvidia-n13p-gv2-s-a2 COMMON

ODTx, CKEx,RST (Termination)

FBA_ODT_L FBA_ODT_H FBA_RST# FBA_CKE_L FBA_CKE_H

D22

FB_CAL_PD_VDDQ

C24

FB_CAL_PU_GND

B25

FB_CAL_TERM_GND

FBA_CMD0 FBA_CMD16 FBA_CMD20 FBA_CMD3 FBA_CMD19

5

R244 EV@40.2/F_4

R594 EV@42.2/F_4

R591 EV@51.1/F_4

R259 EV@10K_4 R536 EV@10K_4 R217 EV@10K_4 R260 EV@10K_4 R170 EV@10K_4

+1.5V_GPU

FBA_CMD28 FBA_CMD11

FBA_CMD23 FBA_CMD24

FBA_CMD21 FBA_CMD22

FBA_CMD27 FBA_CMD13

6

R223 EV@100_4

R224 EV@100_4

R212 EV@100_4

R213 EV@100_4

R215 EV@100_4

R216 EV@100_4

R241 EV@100_4

R242 EV@100_4

R580 EV@100_4

R581 EV@100_4

R562 EV@100_4

R563 EV@100_4

R564 EV@100_4

R565 EV@100_4

R239 EV@100_4

EV@100_4

+1.5V_GPU

C575 EV@0.1U/10V_4X

C349 EV@0.1U/10V_4X

C283 EV@0.1U/10V_4X

C664 EV@0.1U/10V_4X

FBA_CMD26 FBA_CMD30

FBA_CMD9 FBA_CMD15

FBA_CMD8 FBA_CMD4

FBA_CMD10 FBA_CMD6

7

R568 EV@100_4

R569 EV@100_4

R229 EV@100_4

R230 EV@100_4

R221 EV@100_4

R222 EV@100_4

R585 EV@100_4

R586 EV@100_4

R559 EV@100_4

R560 EV@100_4

R225 EV@100_4

R226 EV@100_4

R576 EV@100_4

R577 EV@100_4

R233 EV@100_4

R234 EV@100_4

+1.5V_GPU

C650 EV@0.1U/10V_4X

C685 EV@0.1U/10V_4X

C643 EV@0.1U/10V_4X

C251 EV@0.1U/10V_4XR240

8

17

R208

R572

R566

EV@100_4

R573 EV@100_4

EV@100_4

R567 EV@100_4

C304 EV@0.1U/10V_4X

FBA_CMD25 FBA_CMD5

4

FBA_CMD12 FBA_CMD7

D D

1

2

3

R557 EV@100_4

R558 EV@100_4

R589 EV@100_4

R590 EV@100_4

C372 EV@0.1U/10V_4X

FBA_CMD29 FBA_CMD14

5

EV@100_4

R209 EV@100_4

R236 EV@100_4

R237 EV@100_4

C653 EV@0.1U/10V_4X

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

6

7

Date: Sheet of

PROJECT :

N14x (Memory I/F)

Wednesday, January 16, 2013

Chief River

17 50

8

A1A

For XiangYun Layout House Use

1

2

3

4

5

6

7

8

R200 *EV@1K/F_4

+3V_GPU

A A

B B

C C

125mA

L6 OEVLDS@HCB1608KF-181T15_1.5A

C261 OEVLDS@4.7U/6.3V_6X C293 OEVLDS@1U/6.3V_4X C294 OEVLDS@0.1U/10V_4X

+1.05V_GPU

115mA *2

L4 OEVLDS@HCB1608KF-181T15_1.5A

C237 OEVLDS@4.7U/6.3V_6X C238 OEVLDS@1U/6.3V_4X C646 OEVEDP@1U/6.3V_4X C252 OEVLDS@0.1U/10V_4X C245 OEVLDS@0.1U/10V_4X

R544 OEHM@1K/F_4

+3V_GPU

100mA

L13 OEHM@HCB1608KF-181T15_1.5A

C347 OEHM@4.7U/6.3V_6X C345 OEHM@1U/6.3V_4X C316 OEHM@0.1U/10V_4X C351 OEHM@0.1U/10V_4X C344 OEHM@0.1U/10V_4X

+1.05V_GPU

72mA

L9 OEHM@HCB1608KF-181T15_1.5A

C273 OEHM@4.7U/6.3V_6X C276 OEHM@1U/6.3V_4X C299 OEHM@0.1U/10V_4X C309 OEHM@0.1U/10V_4X

IFPAB_PLLVDD

IFPAB_IOVDD

IFPC_PLLVDD

IFPC_IOVDD

U24G

AA6

IFPAB_RSET

V7

IFPAB_PLLVDD

W7

IFPAB_PLLVDD

W6

IFPA_IOVDD

Y6

IFPB_IOVDD

bga595-nvidia-n13p-gv2-s-a2

U24H

T6

IFPC_RSET

M7

IFPC_PLLVDD

N7

IFPC_PLLVDD

P6

IFPC_IOVDD

bga595-nvidia-n13p-gv2-s-a2

IFPAB

LVDS A

LVDS B

IFPC

AC4

IFPA_TXC

AC3

IFPA_TXC

Y3

IFPA_TXD0

Y4

IFPA_TXD0

AA2

IFPA_TXD1

AA3

IFPA_TXD1

AA1

IFPA_TXD2

AB1

IFPA_TXD2

AA5

IFPA_TXD3

AA4

IFPA_TXD3

AB4

IFPB_TXC

AB5

IFPB_TXC

AB2

IFPB_TXD4

AB3

IFPB_TXD4

AD2

IFPB_TXD5

AD3

IFPB_TXD5

AD1

IFPB_TXD6

AE1

IFPB_TXD6

AD5

IFPB_TXD7

AD4

IFPB_TXD7

HPD_A

GPIO14

B3

COMMON

EV_TXLCLKOUT- {29} EV_TXLCLKOUT+ {29}

EV_TXLOUT0- {29} EV_TXLOUT0+ {29}

EV_TXLOUT1- {29} EV_TXLOUT1+ {29}

EV_TXLOUT2- {29} EV_TXLOUT2+ {29}

EV_TXUCLKOUT- {29} EV_TXUCLKOUT+ {29}

EV_TXUOUT0- {29} EV_TXUOUT0+ {29}

EV_TXUOUT1- {29} EV_TXUOUT1+ {29}

EV_TXUOUT2- {29} EV_TXUOUT2+ {29}

HDMI

N5

IFPC_AUX

DDC DATA DDC CLK

TX CLKTX CLK+

TX Data0 TX Data0 +

TX Data1 TX Data1 +

TX Data2 TX Data2 +

HPD_C

IFPC_AUX

IFPC_L3 IFPC_L3

IFPC_L2 IFPC_L2

IFPC_L1 IFPC_L1

IFPC_L0 IFPC_L0

GPIO15

COMMON

N4

N3 N2

R3 R2

R1 T1

T3 T2

C3

EV_HDMI_DDCDAT {28} EV_HDMI_DDCCLK {28}

EXT_HDMICLK- {28} EXT_HDMICLK+ {28}

EXT_HDMITX0N {28} EXT_HDMITX0P {28}

EXT_HDMITX1N {28} EXT_HDMITX1P {28}

EXT_HDMITX2N {28} EXT_HDMITX2P {28}

EXT_HDMI_HPD {28}

R546 OEVEDP@1K/F_4

+3V_GPU

110mA *2

L30 OEVEDP@HCB1608KF-181T15_1.5A

C638 OEVEDP@4.7U/6.3V_6X C640 OEVEDP@1U/6.3V_4X C641 OEVEDP@0.1U/10V_4X C725 OEVEDP@0.1U/10V_4X C726 OEVEDP@0.1U/10V_4X

+1.05V_GPU

88mA

L31 OEVEDP@HCB1608KF-181T15_1.5A

C648 OEVEDP@4.7U/6.3V_6X

C647 OEVEDP@0.1U/10V_4X C727 OEVEDP@0.1U/10V_4X

IFPD_PLLVDD

B2A

IFPD_IOVDD

B2A

TP11

TP10

TP9

U24I

U6

IFPD_RSET

T7

IFPD_PLLVDD

R7

IFPD_PLLVDD

R6

IFPD_IOVDD

U24J

GF119

(N14M-GL)

J7

IFPEF_PLLVDD

K7

IFPEF_PLLVDD

K6

IFPEF_RSET

GF119

(N14M-GL) (N14P-GV2)

H6

IFPE_IOVDD

J6

IFPF_IOVDD

IFPE

GK208

NC

IFPF

GK208

(N14P-GV2) NC

NC

IFPD

GK208

(N14P-GV2)

NC NC

NC

GK208(N14P-GV2)

NC NC

NC

DVI-DL

I2CY_SDA I2CY_SCL

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

HPD_E

DVI-DL

TXD3 TXD3

TXD4 TXD4

TXD5 TXD5

P4

IFPD_L3 IFPD_L3

IFPD_L2 IFPD_L2

IFPD_L1 IFPD_L1

IFPD_L0 IFPD_L0

GPIO17

COMMONbga595-nvidia-n13p-gv2-s-a2

EV_EDP_AUXN

P3

EV_EDP_AUXP

R5 R4

T5 T4

U4 U3

V4 V3

D4

R788 OEVEDP@100K_4

EV_EDP_TXN3 {29} EV_EDP_TXP3 {29}

EV_EDP_TXN2 {29} EV_EDP_TXP2 {29}

EV_EDP_TXN1 {29} EV_EDP_TXP1 {29}

EV_EDP_TXN0 {29} EV_EDP_TXP0 {29}

EV_EDP_HPD {29}

EV_EDP_AUXN EV_EDP_AUXP

R789 OEVEDP@100K_4

EV_EDP_AUXN {29} EV_EDP_AUXP {29}

B2A

IFPD_AUX IFPD_AUX

HPD_D

B2A

GF119

(N14M-GL)

DVI-SL/HDMI

DP

J3

IFPE_AUX

I2CY_SDA I2CY_SCL

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

HPD_E

GF119

(N14M-GL)

DVI-SL/HDMI I2CZ_SDA

I2CZ_SCL

TXC TXC

TXD0 TXD0

TXD1 TXD1

TXD2 TXD2

HPD_F

IFPE_AUX

IFPE_L3 IFPE_L3

IFPE_L2 IFPE_L2

IFPE_L1 IFPE_L1

IFPE_L0 IFPE_L0

GPIO18

DP

IFPF_AUX IFPF_AUX

IFPF_L3 IFPF_L3

IFPF_L2 IFPF_L2

IFPF_L1 IFPF_L1

IFPF_L0 IFPF_L0

GPIO19

J2

J1 K1

K3 K2

M3 M2

M1 N1

C2

H4 H3

J5 J4

K5 K4

L4 L3

M5 M4

F7

18

bga595-nvidia-n13p-gv2-s-a2

D D

1

2

3

4

5

6

7

COMMON

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

PROJECT :

N14x (Display I/F)

Wednesday, January 16, 2013

Chief River

18 50

8

A1A

For XiangYun Layout House Use

+1.05V_GPU

PLLVDD = 52mA

L12 EV@HCB1608KF-181T15_1.5A

C320 EV@0.1U/10V_4X

C341 EV@10U/6.3V_6X

SP_PLLVDD = 71mA VID_PLLVDD = 41mA

L11 EV@HCB1608KF-181T15_1.5A

C311 EV@0.1U/10V_4X C315 EV@0.1U/10V_4X C338 EV@4.7U/6.3V_6X C339 EV@10U/6.3V_6X

R635 EV@10K_4

+3V_GPU

120mA

L7 OECRT@HCB1608KF-181T15_1.5A

C262 OECRT@4.7U/6.3V_6X C268 OECRT@1U/6.3V_4X C292 OECRT@0.1U/10V_4X C267 OECRT@0.1U/10V_4X C266 OECRT@0.1U/10V_4X C628 OECRT@0.1U/10V_4X

R528 OECRT@124/F_4

NV_PLLVDD

SP_PLLVDD

XTAL_SSIN

CLK_27M_XTAL_IN CLK_27M_XTAL_OUT

DACA_VDD DACA_VREF DACA_RESET

U24M

L6

PLLVDD

M6

SP_PLLVDD

N6

VID_PLLVDD

A10

XTALSSIN

C11

XTALIN

bga595-nvidia-n13p-gv2-s-a2

U24K

W5

DACA_VDD

AE2

DACA_VREF

AF2

DACA_RSET

bga595-nvidia-n13p-gv2-s-a2

XTAL_PLL

CRT

XTALOUTBUFF

XTALOUT

COMMON

I2CA_SCL

I2CA_SDA

DACA_HSYNC

DACA_VSYNC

DACA_RED

DACA_GREEN

DACA_BLUE

COMMON

C10

B10

B7 A7

AE3 AE4

AG3 AF4 AF3

BXTALOUT

EXT_HSYNC {29} EXT_VSYNC {29}

EXT_CRT_RED {29} EXT_CRT_GRN {29} EXT_CRT_BLU {29}

R255 EV@10K_4

R790 EV@0_4

EV_CRTDCLK {29} EV_CRTDDAT {29}

CLK_27M_XTAL_IN

CLK_27M_XTAL_OUT_R

EXT_CRT_RED EXT_CRT_GRN EXT_CRT_BLU

EV_CRTDCLK EV_CRTDDAT

23

Y2 EV@27MHZ_10

4 1

R530 OECRT@150/F_4 R531 OECRT@150/F_4 R529 OECRT@150/F_4

R632 OECRT@2.2K_4

R249 PIV@2.2K_4

C666 EV@12P/50V_4C

C665 EV@12P/50V_4C

+3V_GPU

R633 OECRT@2.2K_4

R250 PIV@2.2K_4

19

B2A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

PROJECT :

N14x (XTAL/CRT I/F)

Chief River

19 50

A1A

For XiangYun Layout House Use

1

2

3

4

5

6

7

8

U24N

D9

I2CS_SCL I2CS_SDA

I2CC_SCL

I2CC_SDA

I2CB_SCL I2CB_SDA

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13

GPIO16 GPIO20 GPIO21

COMMON

PEGX_RST# {16}

S5_ON {3,37,41}

B2A

2

MISC1

FB_CLAMP_MON MEM_VDD_CLT LCD_BL_PWM LCD_VCC LCD_BLEN

Reserved FB_CLAMP_TGL_REQ

3DVision

OVERT ALERT

MEM_VREF_CTRL PWM_VID PWM_LEVEL

PSI

FRM_CLK

Reserved

3

GPIO

A A

TP14 TP15

B B

C C

THERMTHERM+

JTAG_TRST#

E12 F12

AE5 AD6

AE6 AF6

AG4

VGA_OVT#

THERMDN

THERMDP

JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST

bga595-nvidia-n13p-gv2-s-a2

1

Q49 *EV@ME2N7002E_200MA

SMBUS [Thermal]

R268

2

3ND_MBCLK{31,37} 3ND_MBDATA{31,37}

6

Q30A EV@2N7002KDW_115MA

EV@10K_4

1

GFx_SCL GFx_SDA

GFx_SCL

D8

GFx_SDA

A9

EV_LVDS_DDCCLK

B9

EV_LVDS_DDCDAT

C9

N12E_SCL

C8

N12E_SDA

C6

FB_CLAMP_RR

B2 D6

EV_LVDS_BRIGHT

C7

EV_LVDS_DIGON

F9

DGPU_BLON

A3 A4

FB_CLAMP_TGL_REQ#_Q

B6 A6

VGA_OVT#

F8

VGA_ALERT

C5 E7 D7

VGA_PWR_LEVEL

B4

VGA_PSI

D5

GPU_GPIO16

E6 C4

Q30B EV@2N7002KDW_115MA

R634 EV@2.2K_4 R613 EV@2.2K_4

R570 GC6@0_4

R611 *EV@0_4

+3V_GPU+3V_GPU

5

3 4

TP59

3DVision

NV_MEM_VERF_CTRL

R631 EV@10K_4

TP13 TP17 TP60

R267 EV@10K_4

EV_LVDS_DDCCLK {29} EV_LVDS_DDCDAT {29}

FB_CLAMP {17,37,48}

B2A

EV_LVDS_BRIGHT {29} EV_LVDS_DIGON {29}

DGPU_BLON {29}

VGA_STBY {47}

B2A

GPU_VID0 {47} VGA_PWR_LEVEL {37}

+3V_GPU

GPU_PSI {47}

FB_CLAMP_RR

FB_CLAMP_TGL_REQ#_Q

R615 OEVLDS@2.2K_4

EV_LVDS_DDCCLK EV_LVDS_DDCDAT

R248 PIV@2.2K_4

DGPU_PWR_EN {10}

2

3

1

Q51 GC6@ME2N7002E_200MA

+3V_GPU

2

1

GC6@ME2303T1 Q50

3

FB_CLAMP

FB_CLAMP_TGL_REQ# {37}

+3V_GPU+3V_GPU

R614 OEVLDS@2.2K_4

R247 PIV@2.2K_4

GPIO PU/PD

FB_CLAMP_TGL_REQ#_Q

B2A

VGA_PWR_LEVEL VGA_OVT# VGA_ALERT

EV_LVDS_BRIGHT EV_LVDS_DIGON

DGPU_BLON

JTAG_TRST#

FB_CLAMP_RR

3DVision NV_MEM_VERF_CTRL

R251 EV@100K_4 R612 EV@100K_4 R252 EV@100K_4 R646 GC6@10K_4

R262 OEV@100K_4 R254 *OEV@100K_4 R256 *OEV@100K_4 R532 EV@10K_4

R648 GC6@10K_4 R791 *EV@100K_4

R792 *EV@100K_4

20

+3V_GPU

D D

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

1

2

3

4

5

6

Wednesday, January 16, 2013

7

PROJECT :

N14x (GPIO)

Chief River

20 50

8

A1A

For XiangYun Layout House Use

5

U24L

(N14M_GL) (N14P_GV2)GK208GF119

E10

VMON_IN0

F10

VMON_IN1

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

D D

D1

STRAP0

D2

STRAP1

E4

STRAP2

E3

STRAP3

D3

STRAP4

GF119

C1

STRAP5

F6

MULTISTRAP_REF0_GND

GF119

F4

MULTISTRAP_REF1_GND

F5

MULTISTRAP_REF2_GND

bga595-nvidia-n13p-gv2-s-a2 COMMON

Vendor P/N

H5TQ2G63DFR-N0C (128M*16)

H1H2S1S2M1M2M3S3H3H4

H5TQ2G63DFR-11C (128M*16)

C C

B B

A A

HynixSamsungMicronMicronSamsungHynix

K4W2G1646E-BC1A (128M*16)

K4W2G1646E-BC11 (128M*16)

128M (2G bit)256M (4Gbit)

MT41J128M16JT-107G:K (128M*16)

MT41J128M16JT-093G:K (128M*16)

MT41K256M16HA-107G:E (256M*16)

K4W4G1646B-HC11 (256M*16)

H5TQ4G63MFR-11C (256M*16)

H5TQ4G63AFR-11C (256M*16)

NC NC

MISC 2

(N14M_GL)

GK208

(N14P_GV2)

NC

(N14M_GL) GK208(N14P_GV2)

NC NC

STN B/S P/N Size Strap Note

GL/GV2

GL

NC GK208

(N14P_GV2) NC

GK208 (N14P_GV2)

x8=2GB

x8=4GB

N/A

x4=1GB

x4=2GB

ROM_CS

ROM_SI

ROM_SO

ROM_SCLK

BUFRST

PGOOD

GF119 (N14M_GL)

CEC

D12

ROM_CS

B12

ROM_SI

A12

ROM_SO

C12

ROM_SCLK

D11 D10

NV_PWGMSTRAP_REF0_GND

E9

GL:0x06

GV2:0x06

0110

GV2:0x06

0110

GL:0x06

GV2:0x06

0110

GV2:0x06

0110

GL:0x05

GV2:0x07

0101

0111

GV2:0x07

0111

GL:0x05

GV2:0x07

0101

0111

GV2:0x07

0111

GL:0x01

GV2:0x05

0001

0101

GV2:0x05

0101

GL:0x01

GV2:0x05

0001

0101

GV2:0x05

0101

GL:0x0D GV2:0x01

1101

0001

GV2:0x01

0001

GL:0x0B GV2:0x03

1011

0011

GV2:0x03

0011

GL:0x03

0011

GL:0x04

0100

TP16 TP64

TP63 TP62

R257 EV@10K_4

1000MHz

900MHz

1000MHz

900MHz

1000MHz

900MHz

4

PCI_DEVID STRAP

RAM_CFG

SUB_VENDOR

FB[1:0] VGA_DEVICE

I2CS_Slave Address

USER STRAP

Strap Pin name Strapping Bits 3

ROM_SCLK

PCI_DEVID[4] SUB_VENDER PCI_DEVID[5] PEX_PLL_EN_TERM

ROM_SI

RAM_CFG[3] RAM_CFG[2] RAM_CFG[1] RAM_CFG[0]

ROM_SO

FB[1] FB[0] SMB_ALT_ADDR VGA_DEVICE

STRAP0

USER[3] USER[2] USER[1] USER[0]

STRAP1

3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0]

STRAP2

PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]

STRAP3

SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED

STRAP4

RESERVED PCIE_SPEED_CHAN

4.99K 10K 15K 20K

Strap Pin name Strap Mapping Polarity

ROM_SCLK SMB_ALT_ADDR

ROM_SI SUB_VENDER

ROM_SO

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

1000 1001 1010 1011 VDD33 GND VDD33 GNDResistor Value Resistor Value

VGA_DEVICE

RAMCFG[0]

RAMCFG[1]

RAMCFG[2]

RAMCFG[3]

PCIE_MAX_SPEED

3

MULT STRIP [N14P_GV2]

PCI DEVICE ID

RAM_CFG[3:0] for memory configuration

0:No VBIOS ROM ; 1 BIOS ROM [Default]

[1:0] --> 256MB

0:3D Device ; 1:VGA Device

0:9E [Default] ; 1:9C

Panel EDID Support

Strapping Bits 2 Strapping Bits 1 Strapping Bits 0

CE_GEN3 0000 0001 0010 0011

0x1292 -->QS 0x12AD -->ES

PCIE_MAX_SPEEDDP_PLL_VDD33V

24.9K

1100

30.1K

1101

34.8K

1110

45.3K

1111

0100 0101 0110 0111

Binary Strap [N14M_GL]

Pull-down to GND

Pull-UP to 3V3 if VBIOS ROM Exists Pull-down to GND if no VBIO ROM

Pull-down to GND ( no dispaly )

USER defined

Pull-down to GND

+3V_GPU

R638 *10K_4

R643 *10K_4

R640 *10K_4

R601 Strap_GL@10K_4

R616 Strap_GL@10K_4

R583 Strap_GL@10K_4

R592 Strap_GL@10K_4

DP_PLL_VDD33

PEX_PLL_EN_TERM

3GIO_PADCFG

PCIE_MAX_SPEED PCIE_SPEED_CHANG_ GEN3

SORx_EXPOSED

SETTING NOTE

ROM_SCLK

R639 GV2@4.99K/F_4

ROM_SCLK

ROM_SI

ROM_SO

STRAP0

STRAP1

STRAP2

STRAP3

+3V_GPU

+3V_GPU +3V_GPU

+3V_GPU

R642 *15K/F_4

R793 PIV_GV2@4.99K/F_4 R641 OEV_GV2@10K/F_4

R605 GV2@45.3K/F_4

R609 *15K/F_4

R578 *15K/F_4

R587 *15K/F_4

R597 *15K/F_4

R620 *15K/F_4

MSTRAP_REF0_GND

SETTING

STRAP4

ROM_SI

ROM_SO

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

1 [Default] PCIE PLL termination

0:Disable [Default] ; 1:Enable

[0000] --> Gen3 support

[1] -->Allow boot to PCIE Gen3

[1] -->Enable Gen3 SOR0_EXP=0,SOR1_EXP=1

[IFPA/B:LVDS] ; [IFPC:HDMI]

R623 *15K/F_4

R626 Strap_GV2@15K/F_4

B2A Co-Lay

R625 *15K/F_4

R606 *15K/F_4

R610 GV2@45.3K/F_4

R584 GV2@15K/F_4

R588 OEV_GV2@15K/F_4

R598 PIV_GV2@4.99K/F_4

R630 GV2@45.3K/F_4

R235 GV2@40.2K/F_4

R622 GL@10K_4

R627 GL@10K_4

R624 GL@10K_4

A0A1

R602 Strap_GL@10K_4

B0B1

R617 Strap_GL@10K_4

C0C1

R579 Strap_GL@10K_4

D0D1

R593 Strap_GL@10K_4

R621 GL@10K_4

2

1

21

N14P_GV2

ROM_SI

H1/H2

34.8K

N14M_GL

H1 D0 C1 B1

H2 D0 C1 B1 A0

H3 D0 C0 B1 A1

H4 D0 C1 B0 A0

S1 D0 C1 B0 A1

S2 D0 C1 B0

S3 D1 C0 B1

M1 D0

M2

M3

S1/S2

45.3K

CS34532FB18CS33482FB22 CS33012FB18 CS32002FB29

D0

D1

M1/M2

30.1K

C0

C0 B0

C1

Strap1Strap2Strap3

B0 A1

B0

S3

20K

Strap0

A0

A1

M3

10K

CS31002FB26

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

MSIC & STRAP

1

Chief River

21 50Wednesday, January 16, 2013

A1A

For XiangYun Layout House Use

+VGPU_CORE

B2A

NVDD = 34~55 A

C290 EV@0.1U/10V_4X C312 *EV@0.1U/10V_4X C289 EV@0.1U/10V_4X C318 EV@0.1U/10V_4X C323 EV@0.1U/10V_4X C297 EV@4.7U/6.3V_6X C363 EV@4.7U/6.3V_6X C368 EV@4.7U/6.3V_6X C362 EV@4.7U/6.3V_6X C366 EV@4.7U/6.3V_6X C300 EV@4.7U/6.3V_6X C296 EV@4.7U/6.3V_6X C302 EV@4.7U/6.3V_6X C298 EV@4.7U/6.3V_6X C319 EV@4.7U/6.3V_6X

C367 EV@10U/6.3V_6X C230 EV@10U/6.3V_8X

C313 EV@4.7U/10V_6X C232 EV@4.7U/10V_6X C310 EV@4.7U/10V_6X C364 EV@4.7U/10V_6X C301 EV@4.7U/10V_6X

for meet Power down sequence for +3V_GFX

+VGPU_CORE

D3 EV@RB500V-40_100MA

D4 NGC6@RB500V-40_100MA

+1.5V_GPU

GC6 no stuff

U24E

K10

VDD

K12

VDD

K14

VDD

K16

VDD

K18

VDD

L11

VDD

L13

VDD

L15

VDD

L17

VDD

M10

VDD

M12

VDD

M14

VDD

M16

VDD

M18

VDD

N11

VDD

N13

VDD

N15

VDD

N17

VDD

P10

VDD

P12

VDD

P14

VDD

P16

VDD

P18

VDD

R11

VDD

R13

VDD

R15

VDD

R17

VDD

T10

VDD

T12

VDD

T14

VDD

T16

VDD

T18

VDD

U11

VDD

U13

VDD

U15

VDD

U17

VDD

V10

VDD

V12

VDD

V14

VDD

V16

VDD

V18

VDD

bga595-nvidia-n13p-gv2-s-a2 COMMON

NVVDD

B2B

+3V_GPU

U24C

AD10

NC

AD7

NC

B19

NC

F11

3V3AUX

V5

NC_V5

V6

NC_V6

GF119 GK208 (N14M-GL)

* nc on substrate

G1

NC_G1

G2

NC_G2

G3

NC_G3

G4

NC_G4

G5

NC_G5

G6

NC_G6

G7

NC_G7

V1

NC_V1

V2

NC_V2

W1

NC_W1

W2

NC_W2

W3

NC_W3

W4

NC_W4

bga595-nvidia-n13p-gv2-s-a2 COMMON

Power down sequence

XVDD/VDD33

NC

(N14P-GV2)

VDD33 VDD33 VDD33 VDD33

VDD33 = 85mA

G10 G12 G8 G9

C360 EV@4.7U/6.3V_6X C637 EV@1U/10V_6X

C326 EV@0.1U/10V_4X C337 EV@0.1U/10V_4X C639 *EV@0.1U/10V_4X C325 EV@0.1U/10V_4X

+3V_GPU

B2A

U24F

A2

GND

AB17

GND

AB20

GND

AB24

GND

AC2

GND

AC22

GND

AC26

GND

AC5

GND

AC8

GND

AD12

GND

AD13

GND

A26

GND

AD15

GND

AD16

GND

AD18

GND

AD19

GND

AD21

GND

AD22

GND

AE11

GND

AE14

GND

AE17

GND

AE20

GND

AB11

GND

AF1

GND

AF11

GND

AF14

GND

AF17

GND

AF20

GND

AF23

GND

AF5

GND

AF8

GND

AG2

GND

AG26

GND

AB14

GND

B1

GND

B11

GND

B14

GND

B17

GND

B20

GND

B23

GND

B27

GND

B5

GND

B8

GND

E11

GND

E14

GND

E17

GND

E2

GND

E20

GND

E22

GND

E25

GND

E5

GND

E8

GND

H2

GND

H23

GND

H25

GND

H5

GND

K11

GND

K13

GND

K15

GND

K17

GND

L10

GND

L12

GND

L14

GND

L16

GND

L18

GND

L2

GND

L23

GND

L25

GND

L5

GND

M11

GND

bga595-nvidia-n13p-gv2-s-a2 COMMON

M13

GND

M15

GND

M17

GND

N10

GND

N12

GND

N14

GND

N16

GND

N18

GND

P11

GND

P13

GND

P15

GND

P17

GND

P2

GND

P23

GND

P26

GND

P5

GND

R10

GND

R12

GND

R14

GND

R16

GND

R18

GND

T11

GND

T13

GND

T15

GND

T17

GND

U10

GND

U12

GND

U14

GND

U16

GND

U18

GND

U2

GND

U23

GND

U26

GND

U5

GND

V11

GND

V13

GND

V15

GND

V17

GND

Y2

GND

Y23

GND

Y26

GND

Y5

GND

AA7

GND

AB7

GND

22

+1.5V_GPU

R131 *EV@4.7K_4

+1.05V_GPU

R132 EV@4.7K_4

DGPU_POK4

C191 *EV@1000P/50V_4X

DGPU_POK2

C192 *EV@1000P/50V_4X

Power up sequence

+3V +3V_GPU

DGPU_PGOK-1

2

Q16 *EV@METR3904-G_200MA

1 3

2

Q15 EV@METR3904-G_200MA

1 3

R124 EV@0_4

R136 EV@4.7K_4

C198 EV@1000P/50V_4X

2

R127 EV@4.7K_4

Q14 EV@LTC044EUBFS8TL_30MA

1 3

DGPU_PWROK {11,16,37}

R128 EV@100K/F_4

For XiangYun Layout House Use

VDD33 +3.3V_GFX

+VCC_DGFX_CORE

FBVDDQ +1.5V_GFX

PEX_VDD +1.05V_GFX

IFP(CDEF)_IOVDD +1.05V_GFX

t>0NVVDD

t>0

t>=0

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

PROJECT :

N14x (Power/GND)

Chief River

22 50

A1A

5

4

3

2

1

VMA_DQ[63..0]{17,24}

VMA_DM[7..0]{17,24}

VMA_WDQS[7..0]{17,24}

VMA_RDQS[7..0]{17,24}

VRAM7

VREFC_VMA1{24}

D D

C C

B B

VREFD_VMA1{24}

FBA_CMD7{17,24} FBA_CMD10{17,24} FBA_CMD24{17,24} FBA_CMD6{17,24} FBA_CMD22{17,24} FBA_CMD26{17,24} FBA_CMD5{17,24} FBA_CMD21{17,24} FBA_CMD8{17,24} FBA_CMD4{17,24} FBA_CMD25{17,24} FBA_CMD23{17,24} FBA_CMD9{17,24} FBA_CMD12{17,24} FBA_CMD14{17,24}

FBA_CMD29{17,24} FBA_CMD13{17,24} FBA_CMD27{17}

VMA_CLK0{17,24}

VMA_CLK0#{17,24}

FBA_CMD3{17,24}

FBA_CMD0{17,24} FBA_CMD2{17} FBA_CMD11{17,24} FBA_CMD15{17,24} FBA_CMD28{17,24}

FBA_CMD20{17,24}

Should be 240 Ohms +-1%

VREFC_VMA1 VREFD_VMA1

VMA_WDQS1 VMA_RDQS1

VMA_DM1 VMA_DM0

VMA_WDQS0 VMA_RDQS0

CLK-A0 Termination

VMA_CLK0

R228 *EV@121/F_4

VMA_CLK0#

R231 EV@162/F_4

R227 *EV@121/F_4

C324 *EV@0.01U/25V_4X

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

VMA_ZQ1

R647 EV@243/F_4

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

96-BALL SDRAM DDR3

EV@VRAM _DDR3_HYNIX_128MX16

MEM Reference Voltage (Low) MEM Reference Voltage (High Bus)

+1.5V_GPU

DataBus [0:31] DataBus [64:32]

E3

VMA_DQ13

DQL0

F7

VMA_DQ9

DQL1

F2

VMA_DQ14

DQL2

F8

VMA_DQ8

DQL3

H3

VMA_DQ12

DQL4

H8

VMA_DQ10

DQL5

G2

VMA_DQ15

DQL6

H7

VMA_DQ11

DQL7

D7

VMA_DQ5 VMA_DQ16

DQU0

C3

VMA_DQ1

DQU1

C8

VMA_DQ6

DQU2

C2

VMA_DQ2

DQU3

A7

VMA_DQ4

DQU4

A2

VMA_DQ3

DQU5

B8

VMA_DQ7

DQU6

A3

VMA_DQ0

DQU7

B2

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9

VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

R652 EV@1.33K/F_4

R651 EV@1.33K/F_4

+1.5V_GPU

D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VREFC_VMA1 VREFD_VMA1

C658 EV@0.1U/10V_4X

Should be 240 Ohms +-1%

VREFC_VMA1 VREFD_VMA1

FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD14

FBA_CMD29 FBA_CMD13 FBA_CMD27

VMA_CLK0 VMA_CLK0# FBA_CMD3

FBA_CMD0 FBA_CMD2 FBA_CMD11 FBA_CMD15 FBA_CMD28

VMA_WDQS3 VMA_RDQS3

VMA_DM3 VMA_DM2

VMA_WDQS2 VMA_RDQS2

FBA_CMD20

M8

H1 N3

P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7

M7

M2

N8

M3

J7 K7 K9

K1 L2 J3 K3 L3

F3

G3

E7 D3

C7 B7

T2 L8

VMA_ZQ2 VMA_ZQ3

R650 EV@243/F_4

J1 L1 J9 L9

+1.5V_GPU

R282 EV@1.33K/F_4

R283 EV@1.33K/F_4

RANK0: 256MB/512MB DDR3

VRAM8

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSL

DML DMU

DQSU DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

96-BALL SDRAM DDR3

EV@VRAM _DDR3_HYNIX_128MX16

C674 EV@0.1U/10V_4X

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9

VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

E3

VMA_DQ25

F7

VMA_DQ28

F2

VMA_DQ27

F8

VMA_DQ29

H3

VMA_DQ26

H8

VMA_DQ31

G2

VMA_DQ24

H7

VMA_DQ30

D7 C3

VMA_DQ23

C8

VMA_DQ17

C2

VMA_DQ21

A7

VMA_DQ18

A2

VMA_DQ22

B8

VMA_DQ19

A3

VMA_DQ20

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

CLK-A1 Termination

R214 EV@162/F_4

R218 *EV@121/F_4

C314 *EV@0.01U/25V_4X

VREFC_VMA3{24} VREFD_VMA3{24}

VMA_CLK1{17,24}

VMA_CLK1#{17,24}

FBA_CMD19{17,24}

FBA_CMD16{17,24} FBA_CMD18{17}

Should be 240 Ohms +-1%

R219 *EV@121/F_4

VREFC_VMA3 VREFD_VMA3

FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD14

FBA_CMD29 FBA_CMD13 FBA_CMD27

FBA_CMD11 FBA_CMD15 FBA_CMD28

VMA_WDQS5 VMA_RDQS5

VMA_DM5 VMA_DM4

VMA_WDQS4 VMA_RDQS4

FBA_CMD20

R561 EV@243/F_4

VMA_CLK1

VMA_CLK1#

VRAM6

M8 H1

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3

L7 R7 N7 T3 T7 M7

M2 N8 M3

J7 K7 K9

K1

L2

J3 K3

L3

F3 G3

E7 D3

C7 B7

T2

L8

J1

L1

J9

L9

EV@VRAM _DDR3_HYNIX_128MX16

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSL

DML DMU

DQSU DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

E3

VMA_DQ40

F7

VMA_DQ45

F2

VMA_DQ42

F8

VMA_DQ46

H3

VMA_DQ43

H8

VMA_DQ47

G2

VMA_DQ41

H7

VMA_DQ44

D7

VMA_DQ34

C3

VMA_DQ36

C8

VMA_DQ32

C2

VMA_DQ38

A7

VMA_DQ33

A2

VMA_DQ37

B8

VMA_DQ35

A3

VMA_DQ39

B2

+1.5V_GPU

D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

+1.5V_GPU

R135 EV@1.33K/F_4

VREFC_VMA3 VREFD_VMA3

R134 EV@1.33K/F_4

Should be 240 Ohms +-1%

C632 EV@0.1U/10V_4X

VREFC_VMA3 VREFD_VMA3

FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD14

FBA_CMD29 FBA_CMD13 FBA_CMD27

VMA_CLK1 VMA_CLK1# FBA_CMD19

FBA_CMD16 FBA_CMD18 FBA_CMD11 FBA_CMD15 FBA_CMD28

VMA_WDQS7 VMA_RDQS7

VMA_DM7 VMA_DM6

VMA_WDQS6 VMA_RDQS6

FBA_CMD20

VMA_ZQ4

R534 EV@243/F_4

M8 H1

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3

L7 R7 N7 T3 T7 M7

M2 N8 M3

J7 K7 K9

K1

L2

J3 K3

L3

F3 G3

E7 D3

C7 B7

T2

L8

J1

L1

J9

L9

+1.5V_GPU

VRAM5

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1

VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9

VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9

VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

C307 EV@0.1U/10V_4X

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSL

DML DMU

DQSU DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

EV@VRAM _DDR3_HYNIX_128MX16

R535 EV@1.33K/F_4

R169 EV@1.33K/F_4

23

E3

VMA_DQ62

F7

VMA_DQ59

F2

VMA_DQ60

F8

VMA_DQ56

H3

VMA_DQ61

H8

VMA_DQ58

G2

VMA_DQ63

H7

VMA_DQ57

D7

VMA_DQ54

C3

VMA_DQ48

C8

VMA_DQ55

C2

VMA_DQ51

A7

VMA_DQ53

A2

VMA_DQ50

B8

VMA_DQ52

A3

VMA_DQ49

B2 D9 G7 K2 K8 N1 N9 R1

+1.5V_GPU

R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VRAM De-Coupling

A A

+1.5V_GPU

C659 EV@1U/6.3V_4X C657 EV@1U/6.3V_4X C655 EV@1U/6.3V_4X C672 EV@1U/6.3V_4X C656 EV@0.1U/10V_4X C679 EV@0.1U/10V_4X

For XiangYun Layout House Use

5

+1.5V_GPU

C673 EV@1U/6.3V_4X C598 EV@1U/6.3V_4X C654 EV@1U/6.3V_4X C683 EV@1U/6.3V_4X C684 EV@0.1U/10V_4X C686 EV@0.1U/10V_4X

+1.5V_GPU +1.5V_GPU

C577 EV@1U/6.3V_4X C677 EV@1U/6.3V_4X C631 EV@1U/6.3V_4X C579 EV@1U/6.3V_4X C652 EV@0.1U/10V_4X C651 EV@0.1U/10V_4X

4

3

C580 EV@1U/6.3V_4X C576 EV@1U/6.3V_4X C574 EV@1U/6.3V_4X C630 EV@1U/6.3V_4X C578 EV@0.1U/10V_4X C612 EV@0.1U/10V_4X

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

2

Wednesday, January 16, 2013

PROJECT :

N14x (DDR/Rank0)

1

Chief River

23 50

A1A

VMA_DQ[63..0]{17,23}

VMA_DM[7..0]{17,23}

VMA_WDQS[7..0]{17,23}

VMA_RDQS[7..0]{17,23}

DataBus [0:31] DataBus [64:32]

RANK1: 256MB/512MB DDR3

24

VREFC_VMA1{23} VREFD_VMA1{23}

FBA_CMD9{17,23} FBA_CMD24{17,23} FBA_CMD10{17,23} FBA_CMD13{17,23} FBA_CMD26{17,23} FBA_CMD22{17,23} FBA_CMD21{17,23} FBA_CMD5{17,23} FBA_CMD8{17,23} FBA_CMD23{17,23} FBA_CMD28{17,23} FBA_CMD4{17,23} FBA_CMD7{17,23} FBA_CMD14{17,23} FBA_CMD12{17,23}

FBA_CMD29{17,23} FBA_CMD6{17,23} FBA_CMD30{17}

VMA_CLK0{17,23}

VMA_CLK0#{17,23}

FBA_CMD3{17,23}

FBA_CMD0{17,23} FBA_CMD1{17} FBA_CMD11{17,23} FBA_CMD15{17,23} FBA_CMD25{17,23}

FBA_CMD20{17,23}

Should be 240 Ohms +-1%

VREFC_VMA1 VREFD_VMA1

VMA_WDQS1 VMA_RDQS1

VMA_DM1 VMA_DM0

VMA_WDQS0 VMA_RDQS0

VMA_ZQ5

R232 GV2_8@243/F_4

VRAM3

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

GV2_8@VRAM _DDR3_HYNIX_128MX16

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9

VSS#T1

VSS#T9

VSSQ#B1

VSSQ#B9 VSSQ#D1 VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

E3

VMA_DQ13

F7

VMA_DQ9

F2

VMA_DQ14

F8

VMA_DQ8

H3

VMA_DQ12

H8

VMA_DQ10

G2

VMA_DQ15

H7

VMA_DQ11

D7

VMA_DQ5

C3

VMA_DQ1

C8

VMA_DQ6

C2

VMA_DQ2

A7

VMA_DQ4

A2

VMA_DQ3

B8

VMA_DQ7

A3

VMA_DQ0

B2

+1.5V_GPU

D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

Should be 240 Ohms +-1%

VREFC_VMA1 VREFD_VMA1

FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD12

FBA_CMD29 FBA_CMD6 FBA_CMD30

VMA_CLK0 VMA_CLK0# FBA_CMD3

FBA_CMD0 FBA_CMD1 FBA_CMD11 FBA_CMD15 FBA_CMD25

VMA_WDQS3 VMA_RDQS3

VMA_DM3 VMA_DM2

VMA_WDQS2 VMA_RDQS2

FBA_CMD20

VMA_ZQ6 VMA_ZQ7

R258 GV2_8@243/F_4

VRAM4

M8 H1

N3 P7 P3 N2 P8 P2 R8 R2

T8

R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7 K7 K9

K1

L2

J3 K3

L3

F3 G3

E7 D3

C7 B7

T2

L8

J1

L1

J9

L9

GV2_8@VRAM _DDR3_HYNIX_128MX16

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSL

DML DMU

DQSU DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1

VSSQ#B9 VSSQ#D1 VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

E3

VMA_DQ25

F7

VMA_DQ28

F2

VMA_DQ27

F8

VMA_DQ29

H3

VMA_DQ26

H8

VMA_DQ31

G2

VMA_DQ24

H7

VMA_DQ30

D7

VMA_DQ16

C3

VMA_DQ23

C8

VMA_DQ17

C2

VMA_DQ21

A7

VMA_DQ18

A2

VMA_DQ22

B8

VMA_DQ19

A3

VMA_DQ20

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VREFC_VMA3{23} VREFD_VMA3{23}

VMA_CLK1{17,23}

VMA_CLK1#{17,23}

FBA_CMD19{17,23}

FBA_CMD16{17,23} FBA_CMD17{17}

Should be 240 Ohms +-1%

VREFC_VMA3 VREFD_VMA3

FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD12

FBA_CMD29 FBA_CMD6 FBA_CMD30

FBA_CMD11 FBA_CMD15 FBA_CMD25

VMA_WDQS5 VMA_RDQS5

VMA_DM5 VMA_DM4

VMA_WDQS4 VMA_RDQS4

FBA_CMD20

R168 GV2_8@243/F_4

VRAM2

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

G3

DQSL

E7

DML

D3

DMU

C7

DQSU

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

GV2_8@VRAM _DDR3_HYNIX_128MX16

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7

VDD#K2

VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9

VSS#B3

VSS#E1

VSS#G8

VSS#J2

VSS#J8

VSS#M1 VSS#M9 VSS#P1 VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

E3

VMA_DQ40

F7

VMA_DQ45

F2

VMA_DQ42

F8

VMA_DQ46

H3

VMA_DQ43

H8

VMA_DQ47

G2

VMA_DQ41

H7

VMA_DQ44

D7

VMA_DQ34

C3

VMA_DQ36

C8

VMA_DQ32

C2

VMA_DQ38

A7

VMA_DQ33

A2

VMA_DQ37

B8

VMA_DQ35

A3

VMA_DQ39

B2

+1.5V_GPU

D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

Should be 240 Ohms +-1%

VREFC_VMA3 VREFD_VMA3

FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD12

FBA_CMD29 FBA_CMD6 FBA_CMD30

VMA_CLK1 VMA_CLK1# FBA_CMD19

FBA_CMD16 FBA_CMD17 FBA_CMD11 FBA_CMD15 FBA_CMD25

VMA_WDQS7 VMA_RDQS7

VMA_DM7 VMA_DM6

VMA_WDQS6 VMA_RDQS6

FBA_CMD20

VMA_ZQ8

R133 GV2_8@243/F_4

VRAM1

M8 H1

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

M2 N8 M3

J7 K7 K9

K1 L2

J3 K3 L3

F3 G3

E7 D3

C7 B7

T2 L8

J1 L1

J9 L9

GV2_8@VRAM _DDR3_HYNIX_128MX16

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSL

DML DMU

DQSU DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

96-BALL SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1

VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9

VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

E3

VMA_DQ62

F7

VMA_DQ59

F2

VMA_DQ60

F8

VMA_DQ56

H3

VMA_DQ61

H8

VMA_DQ58

G2

VMA_DQ63

H7

VMA_DQ57

D7

VMA_DQ54

C3

VMA_DQ48

C8

VMA_DQ55

C2

VMA_DQ51

A7

VMA_DQ53

A2

VMA_DQ50

B8

VMA_DQ52

A3

VMA_DQ49

B2 D9 G7 K2 K8 N1 N9 R1

+1.5V_GPU

R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VRAM De-Coupling

+1.5V_GPU +1.5V_GPU +1.5V_GPU+1.5V_GPU

C333 GV2_8@1U/6.3V_4X C335 GV2_8@1U/6.3V_4X C336 GV2_8@1U/6.3V_4X C671 GV2_8@1U/6.3V_4X C355 GV2_8@0.1U/10V_4X C356 GV2_8@0.1U/10V_4X

C357 GV2_8@1U/6.3V_4X C373 GV2_8@1U/6.3V_4X C332 GV2_8@1U/6.3V_4X C370 GV2_8@1U/6.3V_4X C371 GV2_8@0.1U/10V_4X C374 GV2_8@0.1U/10V_4X

For XiangYun Layout House Use

C194 GV2_8@1U/6.3V_4X C365 GV2_8@1U/6.3V_4X C250 GV2_8@1U/6.3V_4X C334 GV2_8@1U/6.3V_4X C308 GV2_8@0.1U/10V_4X C305 GV2_8@0.1U/10V_4X

C306 GV2_8@1U/6.3V_4X C231 GV2_8@1U/6.3V_4X C249 GV2_8@1U/6.3V_4X C196 GV2_8@1U/6.3V_4X C193 GV2_8@0.1U/10V_4X C195 GV2_8@0.1U/10V_4X

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

PROJECT :

N14x (DDR/Rank1)

Chief River

24 50

A1A

25

For XiangYun Layout House Use

Size Document Number Rev

Date: Sheet of

Quanta Computer Inc.

PROJECT :

Thames_M2/ MEM Interface

Chief River

25 50Wednesday, January 16, 2013

A1A

5

4

3

2

1

26

D D

C C

B B

A A

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

VRAM_A: DDR3*4PCS

1

Chief River

26 50Wednesday, January 16, 2013

A1A

For XiangYun Layout House Use

5

4

3

2

1

S3 power Reduction (SM_DRAMRST#)

+1.5VSUS

D D

+3VPCU

DDR3_DRAMRST#{14,15}

DRAMRST_CNTRL{6}

DRAMRST_CNTRL_PCH{10}

EC_DRAMRST_CTRL{37}

R154 DS3@1K_4

EC_DRAMRST_CTRL

R150 1K/F_4

R171 NDS3@0_4

R162 DS3@0_4

R151 1K/F_4

DDR3_DRAMRST#_R

DRAMRST_CNTRL

R161 NS3@0_4

3

Q22 S3@ME2N7002E_200MA

2

C239 S3@0.047U/10V_4X

1

R173 S3@4.99K/F_4

CPU_DRAMRST# {3}

For S3 power Reduction Sequence

C C

S3_1.5V{42}

For S3 power Reduction VTT discharge

B B

R159 S3@100K_4

6

2

Q18A S3@2N7002KDW_115MA

1

R167 NS3@0_6

+3V_S5

2

4

1

3 5

U8 S3@TC7SH08FU(F)

+SMDDR_VTERM

R49 S3@22_4

MAINON {37,43,46}

MAINON_ON_G {27,46}

<S3P>

+3V_S5 +1.5V_CPU

R155 S3@10K_4

34

5

Q18B S3@2N7002KDW_115MA

R148 S3@10K_4

3

2

Q21 S3@FDV301N_200MA

1

R139 S3@1K_4

C204 *S3@0.1U/10V_4X

S3 power Reduction (SM_DRAMPWROK)

+3V_S5

C235 S3@0.1U/10V_4X

U7

SYS_PWROK_R{8}

PM_DRAM_PWRGD{8}

2 1

S3@TC7SH08FU(F)

3 5

R176 NS3@0_4

4

S3 power Reduction (CPU Power)

+VDDR_REF_CPU+SMDDR_VREF +1.5V_CPU+1.5VSUS

R62 NS3@0_8

Q7B

3 4

S3@2N7002KDW_115MA

5

MAIND{41,42,46}

MAIND

27

+1.5V_CPU

R143 200/F_4

R147 130/F_4

R153 *S3@39/F_4

R53 100K_4

PM_DRAM_PWRGD_RPM_DRAM_PWRGD_Q

3

Q23 *S3@2N7002K_300MA

2

5A

R96 NS3@0_1206 R101 NS3@0_1206

C148 S3@0.1U/10V_4X C119 S3@0.1U/10V_4X C139 S3@0.1U/10V_4X C130 S3@0.1U/10V_4X

6 524

1

3

MAIND

MAINON_ON_G{27,46}

1

Q13

S3@AO6402A

C170

*S3@470P/50V_4X

PM_DRAM_PWRGD_R {3}

MAINON_ON_G {27,46}

R130 S3@220_8

3

2

Q17 S3@ME2N7002E_200MA

1

6

Q7A

MAINON_ON_G{27,46}

A A

5

2

S3@2N7002KDW_115MA

1

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

4

3

2

Date: Sheet of

PROJECT :

S3 power Reduction

1

BD5

1A

27 50Wednesday, January 16, 2013

For XiangYun Layout House Use

HDMI Conn

5

<HDM>

4

3

2

1

28

IV_HDMITX2

from PCH from NV

+5V

from PCH from NV

D D

C C

IV_HDMITX2{8} IV_HDMITX2#{8} EXT_HDMITX2P{18} EXT_HDMITX2N{18}

IV_HDMITX1{8} IV_HDMITX1#{8} EXT_HDMITX1P{18} EXT_HDMITX1N{18}

IV_HDMITX0{8} IV_HDMITX0#{8} EXT_HDMITX0P{18} EXT_HDMITX0N{18}

IV_HDMICLK{8} IV_HDMICLK#{8} EXT_HDMICLK+{18} EXT_HDMICLK-{18}

R794 HM@0_6

F3 *HM@SMD1206P110TFT

IV_HDMITX2# EXT_HDMITX2P EXT_HDMITX2N

IV_HDMITX1 IV_HDMITX1# EXT_HDMITX1P EXT_HDMITX1N

IV_HDMITX0 IV_HDMITX0# EXT_HDMITX0P EXT_HDMITX0N

IV_HDMICLK IV_HDMICLK# EXT_HDMICLK+ EXT_HDMICLK-

C678 *HM@0.1U/16V_4Y

C342 PIHM@0.1U/10V_4X C343 PIHM@0.1U/10V_4X C660 OEHM@0.1U/10V_4X C661 OEHM@0.1U/10V_4X

C350 PIHM@0.1U/10V_4X C352 PIHM@0.1U/10V_4X C667 OEHM@0.1U/10V_4X C668 OEHM@0.1U/10V_4X

C346 PIHM@0.1U/10V_4X C348 PIHM@0.1U/10V_4X C662 OEHM@0.1U/10V_4X C663 OEHM@0.1U/10V_4X

C353 PIHM@0.1U/10V_4X C354 PIHM@0.1U/10V_4X C669 OEHM@0.1U/10V_4X C670 OEHM@0.1U/10V_4X

U25

3

OUT

IN

GND

HM@AP2337

HDMITX2_R HDMITX2#_R

HDMITX1_R HDMITX1#_R

HDMITX0_R HDMITX0#_R

HDMICLK_R HDMICLK#_R

0.5A

+DDC5V +5V_HDMI

C676 *HM@0.1U/16V_4Y

D21

1 2

2 1

D20

*HM@AZ5125-01J

*HM@B220LFA-13-F_2A

C675 *HM@220P/50V_4X

B2A

HDMITX2_R HDMITX2#_R

HDMITX1_R HDMITX1#_R

HDMITX0_R HDMITX0#_R

HDMICLK_R HDMICLK#_R

HDMI_CON_DDCCLK HDMI_CON_DDCDATA

HDMI_CON_HP

C361 HM@0.1U/16V_4Y

CN16

1

D2+

2

D2 Shield

3

D2-

4

D1+

5

D1 Shield

6

D1-

7

D0+

8

D0 Shield

9

D0-

10

CK+

11

CK Shield

12

CK-

13

CE Remote

14

NC

15

DDC CLK

16

DDC DATA

17

GND

18

+5V

19

HP DET

HM@2HE1655-000111F

SHELL1

SHELL2

20

23

GND

22

GND

21

HDMI-passive level shift

+3V_HDMI

R571 HM@0_6

R582 HM@100K_4

B B

HDMI-HPD

HDMI-SMBus

A A

HDMI_CON_HP_PCH{8}

EXT_HDMI_HPD{18}

<HDM>

R278 PIHM@0_4

+3V

R277 OEHM@0_4

+3V_GPU

HDMI_DDCCLK{8} HDMI_DDCDATA{8}

EV_HDMI_DDCCLK{18} EV_HDMI_DDCDAT{18}

3

2

1

R273 PIHM@0_4

R274 OEHM@0_4

HDMI_DDCCLK

EV_HDMI_DDCCLK

5

Q48

HM@2N7002K_300MA

R272 HM@1M_4

HDMI_CON_HP_PCH_R

+3V_HDMI

R276 PIHM@0_4

R275 OEHM@0_4

R608 PIHM@680_4

HDMITX0#_R1 HDMITX0_R1

R604 PIHM@680_4 R607 OEHM@499/F_4 R603 OEHM@499/F_4

HDMITX1#_R1

R629 PIHM@680_4 R619 PIHM@680_4

HDMITX1_R1

R628 OEHM@499/F_4 R618 OEHM@499/F_4

R599 PIHM@680_4

HDMITX2#_R1

R595 PIHM@680_4

HDMITX2_R1

R600 OEHM@499/F_4 R596 OEHM@499/F_4

R644 PIHM@680_4

HDMICLK#_R1 HDMICLK_R1

R636 PIHM@680_4 R645 OEHM@499/F_4 R637 OEHM@499/F_4

+3V_HDMI+3V_HDMI

2

Q33 HM@2N7002K_300MA

1

R270 HM@2.2K_4

3

HDMI_CON_HP

R269

PIHM@20K_4

+3V_HDMI

D5 HM@RB500V-40_100MA

R264 HM@2.2K_4

2

3

1

Q31 HM@FDV301N_200MA

HDMITX0#_R HDMITX0_R

HDMITX1#_R HDMITX1_R

HDMITX2#_R HDMITX2_R

HDMICLK#_R HDMICLK_R

FOR EMI

R266

OEHM@100K_4

HDMI_CON_DDCCLK HDMI_CON_DDCDATAHDMI_DDCCLK_ACT HDMI_DDCDATA_ACT

4

<EMC>

HDMITX2_R

HDMITX2#_R HDMITX0_R

HDMITX0#_R

HDMI_DDCDATA

EV_HDMI_DDCDAT

R243 *E@120/F_4

R245 *E@120/F_4

R279 PIHM@0_4

R280 OEHM@0_4

HDMITX1_R

HDMITX1#_R HDMICLK_R

HDMICLK#_R

R271 HM@2.2K_4

R246 *E@120/F_4

R253 *E@120/F_4

+3V_HDMI+5V +5V

2

1

Q32 HM@FDV301N_200MA

3

D6 HM@RB500V-40_100MA

R265 HM@2.2K_4

Quanta Computer Inc.

PROJECT :

HDMI CONN

PROJECT :

1

Size Document Numb er Rev

Date: Sheet of

2

Date: Sheet of

BD5

1A

28 50Wednesday, January 16, 2013

For XiangYun Layout House Use

5

<LDS>Panel backlight control <LDS>

LVDS_BRIGHT

DISPON_O

D D

CRT

<CRT>

INT_CRT_RED{8} INT_CRT_GRN{8} INT_CRT_BLU{8}

EXT_CRT_RED{19} EXT_CRT_GRN{19} EXT_CRT_BLU{19}

INT_CRT_DDCCLK{8} INT_CRT_DDCDAT{8}

INT_HSYNC{8}

C C

INT_VSYNC{8}

EV_CRTDCLK{19} EV_CRTDDAT{19}

EXT_HSYNC{19} EXT_VSYNC{19}

R4 *100K_4

R547 PICRT@0_4 R549 PICRT@0_4 R551 PICRT@0_4

R548 OECRT@0_4 R550 OECRT@0_4 R552 OECRT@0_4

R206 PICRT@0_4 R205 PICRT@0_4 R204 PICRT@0_4 R203 PICRT@0_4

R556 OECRT@0_4 R555 OECRT@0_4 R554 OECRT@0_4 R553 OECRT@0_4

R32 PIV@0_4

R36 OEV@0_4

CRT_R CRT_G CRT_B

DDCCLK DDCDAT HSYNC VSYNC

R542 CRT@150/F_4

LVDS_BRIGHT_I {8}LVDS_BRIGHT{37}

DGPU_BLON {20}DISPON_O {37}

C644 CRT@6.8P/50V_4N

4

LCD POWER SWITCH

R543 CRT@150/F_4

+5V_CRT

+5V

+3V

INT_LVDS_DIGON{8}

EV_LVDS_DIGON{20}

C645 CRT@6.8P/50V_4N

C633 CRT@0.1U/16V_4Y C258 *CRT@0.1U/16V_4Y C259 CRT@0.22U/10V_4X

C28 *CRT@0.1U/16V_4Y

+5V +3V

B2A

R545 CRT@150/F_4

R16 EDP@0_8 R14 LDS@0_8

R9 PIV@0_4

R10 OEV@0_4

C642 CRT@6.8P/50V_4N

CRT_R1 CRT_G1 CRT_B1

+LDS_IN

C45 1U/6.3V_4X

R6

PIV@100K_4

L27 CRT@BLM18BA470SN1D_300MA L28 CRT@BLM18BA470SN1D_300MA L29 CRT@BLM18BA470SN1D_300MA

U23

1

VCC_SYNC

SYNC_OUT2 SYNC_OUT1

7

VCC_DDC

8

BYP

SYNC_IN2

2

VCC_VIDEO

SYNC_IN1

3

VIDEO_1

DDC_IN1

4

VIDEO_2

DDC_IN2

5

VIDEO_3

DDC_OUT1

6

GND

DDC_OUT2

CRT@CM2009-02QR

R7 OEV@100K_4

16 14

15 13

10 11

9 12

6 4 3

B2A

C629 CRT@6.8P/50V_4N

VSYNC HSYNC

DDCCLK DDCDAT

CRTDCLK CRTDDAT

3

U1

IN IN ON/OFF

AP2821KTR-G1

C281 *CRT@10P/50V_4C

OUT GND GND

C626 CRT@6.8P/50V_4N

1 2 5

C282 *CRT@10P/50V_4C

C32

0.1U/16V_4Y

CRT_R1 CRT_G1 CRT_B1

C617 CRT@6.8P/50V_4N

DDCCLK DDCDAT

CRTDCLK CRTDDAT

C34 *0.01U/25V_4X

C279 CRT@10P/50V_4C

R199 PICRT@2.2K_4 R198 PICRT@2.2K_4

R207 CRT@2.7K_4 R197 CRT@2.7K_4

+5V

+LCDVCC

C35

*10U/6.3V_6X

2mA

CRTVSYNC

CRTHSYNC

C280 CRT@10P/50V_4C

2

D18 CRT@SS14L_1A

+3V

+5V_CRT

F2 CRT@SMD1206P110TFT

+5V_CRT1

+3VPCU

<HSR>HALL Sensor

R461 100K_4

1

C517

3

0.1U/16V_4Y

CRT_R1 CRT_G1

+5V_CRT

CRT_B1

D19 *CRT@AZ5125-01J

2

LID591#

MR1 APX9132H AI-TRG

B2A

1

29

LID591# {37}

1617

6

111

7

12

2 8 3 9 4

10

5

13 14 15

CN15 CRT@10256-00011

CRTDDAT CRTHSYNC CRTVSYNC CRTDCLK

LCD Panel Module

LVDS-Down

B B

A A

LVDS-Up

<LDS>

INT_LVDS_EDIDCLK{8}

INT_LVDS_EDIDDATA{8}

EV_LVDS_DDCCLK{20} EV_LVDS_DDCDAT{20}

INT_TXLOUT0+{8}

INT_TXLOUT0-{8}

EV_TXLOUT0+{18}

EV_TXLOUT0-{18}

EV_EDP_TXP0{18} EV_EDP_TXN0{18}

INT_TXLOUT1+{8}

INT_TXLOUT1-{8}

EV_TXLOUT1+{18}

EV_TXLOUT1-{18}

EV_EDP_TXP1{18} EV_EDP_TXN1{18}

INT_TXLOUT2+{8}

INT_TXLOUT2-{8}

EV_TXLOUT2+{18}

EV_TXLOUT2-{18}

EV_EDP_TXP2{18} EV_EDP_TXN2{18}

INT_TXLCLKOUT+{8}

INT_TXLCLKOUT-{8}

EV_TXLCLKOUT+{18} EV_TXLCLKOUT-{18}

EV_EDP_TXP3{18} EV_EDP_TXN3{18}

INT_TXUOUT0+{8} INT_TXUOUT0-{8}

EV_EDP_AUXP{18} EV_EDP_AUXN{18}

EV_TXUOUT0+{18}

EV_TXUOUT0-{18}

INT_TXUOUT1+{8} INT_TXUOUT1-{8}

EV_TXUOUT1+{18}

EV_TXUOUT1-{18}

INT_TXUOUT2+{8} INT_TXUOUT2-{8}

EV_TXUOUT2+{18}

EV_TXUOUT2-{18}

INT_TXUCLKOUT+{8} INT_TXUCLKOUT-{8}

EV_TXUCLKOUT+{18} EV_TXUCLKOUT-{18}

INT_LVDS_EDIDCLK INT_LVDS_EDIDDATA

EV_LVDS_DDCCLK EV_LVDS_DDCDAT

INT_TXLOUT0+ INT_TXLOUT0-

EV_TXLOUT0+ EV_TXLOUT0-

EV_EDP_TXP0 EV_EDP_TXN0

INT_TXLOUT1+ INT_TXLOUT1-

EV_TXLOUT1+ EV_TXLOUT1-

EV_EDP_TXP1 EV_EDP_TXN1

INT_TXLOUT2+ INT_TXLOUT2-

EV_TXLOUT2+ EV_TXLOUT2-

EV_EDP_TXP2 EV_EDP_TXN2

INT_TXLCLKOUT+ INT_TXLCLKOUT-

EV_TXLCLKOUT+ EV_TXLCLKOUT-

EV_EDP_TXP3 EV_EDP_TXN3

INT_TXUOUT0+ INT_TXUOUT0-

EV_EDP_AUXP EV_EDP_AUXN

EV_TXUOUT0+ EV_TXUOUT0-

INT_TXUOUT1+ INT_TXUOUT1-

EV_TXUOUT1+ EV_TXUOUT1-

INT_TXUOUT2+ INT_TXUOUT2-

EV_TXUOUT2+ EV_TXUOUT2-

INT_TXUCLKOUT+ INT_TXUCLKOUT-

EV_TXUCLKOUT+ EV_TXUCLKOUT-

5

For XiangYun Layout House Use

RP20 PIVLDS@0X2

RP14 OEVLDS@0X2

RP19 PIVLDS@0X2

RP13 OEVLDS@0X2

RP32 OEVEDP@0X2

RP18 PIVLDS@0X2

RP12 OEVLDS@0X2

RP31 OEVEDP@0X2

RP17 PIVLDS@0X2

RP11 OEVLDS@0X2

RP30 OEVEDP@0X2

RP16 PIVLDS@0X2

RP10 OEVLDS@0X2

RP29 OEVEDP@0X2

RP21 PIVLDS@0X2

RP33 OEVEDP@0X2

RP15 OEVLDS@0X2

RP25 PIVLDS@0X2

RP6 OEVLDS@0X2

RP27 PIVLDS@0X2

RP7 OEVLDS@0X2

RP26 PIVLDS@0X2

RP8 OEVLDS@0X2

241

423

241 3

1 1

3

1 3

3 1

1 3

423 1

3

1 3

423 1

3

1 3

3 1

423 1

3

423

241

423

241

3

1

3

4 2

2 4

4 2

2 4

1

2 4

1

2 4

4 2

1

2 4

1

3

1

3

LCD_TXLOUT0+_L_RR LCD_TXLOUT0-_L_RR

INT_EDP_TXP0{3} INT_EDP_TXN0{3}

LCD_TXLOUT1+_L_RR LCD_TXLOUT1-_L_RR

INT_EDP_TXP1{3} INT_EDP_TXN1{3}

LCD_TXLOUT2+_L_RR LCD_TXLOUT2-_L_RR

INT_EDP_TXP2{3} INT_EDP_TXN2{3}

LCD_TXLCLKOUT+_L_RR LCD_TXLCLKOUT-_L_RR

INT_EDP_TXP3{3} INT_EDP_TXN3{3}

LCD_TXUOUT0+_L_RR LCD_TXUOUT0-_L_RR

INT_EDP_AUXP{3} INT_EDP_AUXN{3}

RP1 LDS@0X2

C521 OEVEDP@0.1U/10V_4X C520 OEVEDP@0.1U/10V_4X

C37 PIVEDP@0.1U/10V_4X C36 PIVEDP@0.1U/10V_4X

RP2 LDS@0X2

C523 OEVEDP@0.1U/10V_4X C522 OEVEDP@0.1U/10V_4X

C40 PIVEDP@0.1U/10V_4X C38 PIVEDP@0.1U/10V_4X

RP3 LDS@0X2

C525 OEVEDP@0.1U/10V_4X C524 OEVEDP@0.1U/10V_4X

C43 PIVEDP@0.1U/10V_4X C41 PIVEDP@0.1U/10V_4X

RP4 LDS@0X2

C527 OEVEDP@0.1U/10V_4X C526 OEVEDP@0.1U/10V_4X

C48 PIVEDP@0.1U/10V_4X C46 PIVEDP@0.1U/10V_4X

RP5 LDS@0X2

4

3

241

2

1

4

3

2

1

4

3

2

1

4

3

241

C529 OEVEDP@0.1U/10V_4X C528 OEVEDP@0.1U/10V_4X

C52 PIVEDP@0.1U/10V_4X C49 PIVEDP@0.1U/10V_4X

LCD_EDIDCLK_L LCD_EDIDDATA_L

LCD_TXLOUT0+_L LCD_TXLOUT0-_L

LCD_TXLOUT1+_L LCD_TXLOUT1-_L

LCD_TXLOUT2+_L LCD_TXLOUT2-_L

LCD_TXLCLKOUT+_L LCD_TXLCLKOUT-_L

LCD_TXUOUT0+ LCD_TXUOUT0-

LCD_TXUOUT1+ LCD_TXUOUT1-

LCD_TXUOUT2+ LCD_TXUOUT2-

LCD_TXUCLKOUT+ LCD_TXUCLKOUT-

CN8

LCD_TXUCLKOUT+ LCD_TXUCLKOUT-

LCD_TXUOUT2+ LCD_TXUOUT2-

LCD_TXUOUT1+ LCD_TXUOUT1-

LCD_TXUOUT0+ LCD_TXUOUT0-

LCD_TXLCLKOUT+_L LCD_TXLCLKOUT-_L

LCD_TXLOUT2+_L LCD_TXLOUT2-_L

LCD_TXLOUT1+_L LCD_TXLOUT1-_L

LCD_TXLOUT0+_L LCD_TXLOUT0-_L

USB_CCD_R USB_CCD#_R LCD_EDIDDATA_L LCD_EDIDCLK_L

INT_DMIC_CLK{34} INT_DMIC_DATA{34}

L23 FCM1005KF-221T03_300MA L22 FCM1005KF-221T03_300MA

+3V

EV_LVDS_BRIGHT{20}

INT_LVDS_PWM{8}

3

EDP_PHD_R

R261 OEV@0_4 R263 PIV@0_4

INT_DMIC_CLK_R INT_DMIC_DATA_R

*E@15P/50V_4C

R3 LDS@0_6 R2 EDP@0_6

C31

R5 1.2K/F_4

INT_DMIC_CLK_R INT_DMIC_DATA_R

+LCDVCC

LVDS_VADJ

C27

*E@15P/50V_4C

DISPON_O_RDISPON_O LVDS_VADJ

+CCD_POWER

+LCDVCC

VIN

G_5

40 39 38 37 36 35 34 33 32

G_4

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

G_1 9 8 7 6 5 4 3 2 1

G_0

7300L40-000000-G4

2

CCD

<CCD>

12

Check

C30

*2200P/50V_4X

+VTT

R470 OEVEDP@100K_4

LCD_TXUOUT0+ LCD_TXUOUT0-

R471 *OEVEDP@100K_4

R465 0_4 R464 0_4

R17 LDS@10K_4

2

USB_CCD_R USB_CCD#_R

F1 LITTLE-0603-2A-32V

+3V

0.15A

LCD_EDIDCLK_L LCD_EDIDDATA_L

C26

*2200P/50V_4X

EDP HPD

EDP_PHD_R

R11 EDP@100K_4

B2A

EDP PU/PD SMBus

+3V

R472

*OEVEDP@100K_4

R473 OEVEDP@100K_4

B2A

USB_CCD {10}

+CCD_POWER

+

C33 *10U/6.3V_6X

+3VVIN

C519

+

*10U/25V_1206X

+VTT

R18 PIVEDP@1K_4

3

Q1 PIVEDP@2N7002K_300MA

1

R15 OEVEDP@0_4

R462 PIVLDS@2.2K_4

+3V

R463 PIVLDS@2.2K_4

Size Document Numb er Rev

LCD/CRT/CCD

Date: Sheet of

USB_CCD# {10}

C29

*47P/50V_4N

INT_EDP_HPD {3}

EV_EDP_HPD {18}

Quanta Computer Inc.

PROJECT :

1

DISPON_O_R

D1 LCP0G050M0R2R

LCD_EDIDCLK_L LCD_EDIDDATA_L

BD5

29 50Wednesday, January 16, 2013

1A

5

<MNW>MINI Card Slot#1(WiFi / Wimax / Combo)

+WIMAX_P +WIMAX_P

R477

BT_DISABLE#_INTEL

BT_DISABLE#_OTHER

10K_4

PCIE_CLK_WLAN_REQ#_R

PCLK_DEBUG{10}

B2A

PLTRST# PLTRST#_debug

PLTRST#{3,10,35,36,37,38}

+WIMAX_P +WIMAX_P

3

Q41 AOAC@ME2N7002E_200MA

R466 *AOAC@0_4

D D

PCIE_CLK_WLAN_REQ#{10}

+WIMAX_P

C C

BT_RFCTRL{37}

BT_RFCTRL_BT

2

1 3

2

3

1

Q42 ME2N7002E_200MA

R474 *0_4 R503 AOAC@3.01K/F_4

R500 10K_4

R499 0_4 R797 *0_4

Q46 LTC044EUBFS8TL_30MA

PCIE_WAKE#{8,35}

R495 NMP@0_4 R494 NMP@0_4

2

1

4

0.5A 2.75A

C531 *0.01U/25V_4X

CN9

51

NC

49

C-Link_RST

47

C-Link_DAT

45

C-Link_CLK

43

GND

41

NC

39

NC

37

GND

35

GND

33

PETp0

31

PETn0

29

GND

27

GND

25

PERp0

23

PERn0

21

GND

19

NC

17

NC

15

GND

13

REFCLK+

11

REFCLK-

9

GND

7

CLKREQ#

5

BT_CHCLK

3

BT_DATA

1

WAKE#

AAA-PCI-052-P01

C543 *0.1U/16V_4Y

LED_WPAN#

LED_WLAN#

W_DISABLE#

USB_D+ USB_D-

SMB_DATA

SMB_CLK

+3.3Vaux

PERST#

+3.3V +1.5V

+1.5V

+1.5V +3.3V

GND

NC NC

GND

NC NC NC NC NC

GND

PCIE_TXP_WLAN{10} PCIE_TXN_WLAN#{10}

PCIE_RXP_WLAN{10} PCIE_RXN_WLAN#{10}

CLK_PCIE_WLAN{10} CLK_PCIE_WLAN#{10}

B2A

C44 *47P/50V_4N

BT_DISABLE#_INTEL

PCLK__debug_R

PCIE_CLK_WLAN_REQ#_R BT_DISABLE#_OTHER

PCIE_WAKE#_MINI

R469 AOAC@10K_4

PCIE_WAKE#_MINI

C536

*10U/6.3V_6X

52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18

16 14 12 10 8 6 4 2

3

+1.5V +WIMAX_P

LFRAME#_PCIE LAD3_PCIE LAD2_PCIE LAD1_PCIE LAD0_PCIE

PLTRST# RF_EN

C42

0.1U/16V_4Y

C534

0.1U/16V_4Y

SDATA_WLAN SCLK_WLAN

R479 NMP@0_4 R478 NMP@0_4 R476 NMP@0_4 R475 NMP@0_4 R13 NMP@0_4

C530

0.1U/16V_4Y

USB_WLAN {10} USB_WLAN# {10}

RF_EN {37}

LFRAME# {9,37} LAD3 {9,37} LAD2 {9,37} LAD1 {9,37} LAD0 {9,37}

C535

*10U/6.3V_6X

2

AOAC

<MNW>

+3V +WIMAX_P

+3V_S5

C545 *47P/50V_4N

AOAC@0.01U/25V_4X

SMBus(DDR3/WLAN/3G)

SDATA{10,14}

CGDAT_SMB{14,15,38}

SCLK{10,14}

CGCLK_SMB{14,15,38}

R490 NAOAC@0_8

R492 NAOAC@0_8

C546

Q5A AOAC@2N7002KDW_115MA

R60 NAOAC@0_4

Q5B AOAC@2N7002KDW_115MA R59 NAOAC@0_4

3

1

Q44 AOAC@ME1303_3A

2

*AOAC@0.01U/25V_4X

+WIMAX_P

2

1

6

+WIMAX_P

5

3 4

1

30

+3V_S5

R47 AOAC@4.7K_4

R501 AOAC@4.7K_4

Q47

AOAC@LTC044EUBFS8TL_30MA

1 3

SDATA_WLAN

SCLK_WLAN

2

WMAX_P {37}

C544

R48 AOAC@4.7K_4

B2A

B B

A A

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

MINI CARD(WLAN)

1

BD5

1A

30 50Wednesday, January 16, 2013

For XiangYun Layout House Use

5

<U3B>

USB CONNECT RIGHT1

USB30_RXN1_R{10}

USB30_RXP1_R{10}

USB30_TXN1_R{10 } USB30_TXP1_R{10}

USB20#_R1{10} USB20_R1{10 }

+5V_S5 +3V_S5

R669 *S&C@10K_4

SC_SCL

+5V_S5

R665 *S&C@10K_4

SC_SDA

from PCH

D D

from PCH

C C

<USB>

B2A

126

Q52A *S&C @2N7002KDW_1 15MA

+3V_S5

B2A

5

3 4

Q52B *S&C @2N7002KDW_1 15MA

USB30_RXN1_R USB30_RXP1_R

USB30_TXN1_R USB30_TXP1_R

3ND_MBCLK {20,37}

3ND_MBDATA {20,37}

USB20#_R1 USB20_R1

2012 Chief River/Brazos

USB_BUS_SW4{37}

USB_BUS_SW3{37}

USB_BUS_SW2{37}

2013 Shark bay / Kabini

USB CONNECT Right2

from PCH

B B

from PCH

USB CONNECT Left1/Left2

A A

<U3B>

<U2B>

USB_Normal_EN#

5

+3V_S5

R508 10K_4

from PCH

USB 2.0(L2)-Up port2

USB 2.0(L1)-Down port9

USB20#_R2{10} USB20_R2{10 }

USB30_RXN2_R{10}

USB30_RXP2_R{10}

USB30_TXN2_R{10} USB30_TXP2_R{10 }

USB20_L1{10} USB20#_L1{ 10}

USB20_L2{10}

USB20#_L2{10}

USB_Normal_OC#_L{10,37}

4

R5

R1 R2 R6

R7

USB_BUS_SW3

R8

SC_SDA

14566 14600

14617(with CB2)

14617(no CB2)

14641/14642/14644 VV

14640 V V

SW3SW2

CB0 CB10Status

0 0 1 1 0 1

1

SW2 SW3

CB0CB1

0

01 10

1

142

RN13 U3_2@MCM2012B900GBE

3

C380 U3 _2@0.1U/10V_4X C381 U3 _2@0.1U/10V_4X

142

RN10 E@MCM2012B900GBE

3

142

RN11 E@MCM2012B900GBE

3

USB_Normal_OC#_L

4

+5V_S5

C709

0.1U/16V_4Y

R674 *S&C@0_4

R675 *S&C@0_4

R673 *S&C@0_4

R671 S&C@0_4

R672 *S&C@0_4

R676 *S&C@0_4

U27

5

VCC

1

CEN# / INT

8

CB0 / SDA

9

GND

S&C@MAX14641ETA+T

R1 R2 R3 R4 R5 R6 R7 R8 R9

V V

V

V V

14600

Auto mode Force dedicated charger mode Pass-Through(USB) mode pass-through(USB) with CDP

Emulation

14641 Status 2A Auto mode for Apple device Force 1A for Apple device Pass-Through(USB) mode pass-through(USB) with CDP

Emulation

+5VSUS_USBP1 USB20N_CONN_R 2 USB20P_CONN_R2 +5VSUS_U SBP1

C3A

USB30_TX2-_C1 USB30_TX2+_C1

B2A

+5V_S5

USB20P_L1 USB20N_L1

USB20P_L2 USB20N_L2

C3A

USB_Normal_EN#

88511-200N

CB1 / SCL

CN11

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

6

USB20_R1

TDP

7

USB20#_R1

TDM

3

DP

2

DM

4

V V V

Charger , AM Charger , FM USB , PM USB , CM

Charger , AM2 Charger , AP1 USB , PM USB , CM

1 2 3 4 5 6 7 8 9

R687 *S&C @0_4

R3

R688 S&C @0_4

R9

R684 *S&C @0_4

R4

R689 *S&C @0_4

CN18

VBUS

1

D-

2

D+

3 4

GND SSRX-

5 6

SSRX+

7

GND

8

SSTXSSTX+

9

11111010131312

12

U3_2@C19066-90 905-L

B2A

3

R335 NS&C@0_4 R329 NS&C@0_4

SW2 SW3

0

1

SW2 SW3

X

1

3

USB_SC_EN#{37}

USB20P_CONN_R USB20N_CONN_R

USB_BUS_SW2

USB_BUS_SW3

SC_SCL

14644

CB0CB1

Status 2A Auto mode for Apple device

0

Force dedicated charger mode

01

Pass-Through(USB) mode

10

pass-through(USB) with CDP

1

Emulation

14642

CB0CB1

Status 2A Auto mode for Apple device

0

Pass-Through(USB) mode

10

pass-through(USB) with CDP

1

Emulation

USB_Normal_EN#{37}

USB_Normal_OC#_R{10,37}

USB_SC_EN#

USB20N_CONN_R USB20P_CONN_R

USB30_RXN1_R USB30_RXP1_R

USB30_TXN1_R USB30_TXP1_R

D7 *AZ5125-01J

USB_Normal_EN#

USB_Normal_OC#_R

2

+3V_S5

+5V_S5

R359 10K_4

C453 1U/6.3V_4X

USB_SC_OC#{1 0,37}

USB_SC_OC#

Charger , AM2 Charger , FM USB , PM USB , CM

Charger , AM2 USB , PM USB , CM

U13

2

IN1

OUT3

IN23OUT2

OUT1

4

EN#

1

GND

9

GND-C

BD82035FVJ-E2

142

RN12 U3@MCM2012B900GBE

C426 U3 @0.1U/10V_4X C430 U3 @0.1U/10V_4X

USB30_RXN1_R

OC#

C3A

+5VSUS_USBP0

2.5A

8 7 6

5

2 1

+5VSUS_USBP0

C431

C432

*470P/50V_4X

*10U/6.3V_6X

+5VSUS_USBP0

3

USB30_RXP1_R USB30_TX1-_C1 USB30_ TX1+_C1 USB20N_CONN U SB20P_CONN

D22

*U3@TVUFB0201AD0

C3A

USB30_TX1-_C1 USB30_TX1+_C1

D8 *AZ5125-01J

D23

*U3@TVUFB0201AD0

2 1

USB20N_CONN USB20P_CONN

D24

*U3@TVUFB0201AD0

2 1

C712 220U/6.3V_105CS_E18e

CN21

1

2

3

4

5

6

7

8

9

1 2 3 4 5 6 7 8 9

VBUS DD+ GND SSRXSSRX+ GND SSTXSSTX+

11111010131312

12

U3@C19066-9090 5-L

CN20

VBUS

1

D-

2

D+

3 4

GND SSRX-

5 6

SSRX+

7

GND

8

SSTXSSTX+

9

11111010131312

12

C3A

D25

*U3@TVUFB0201AD0

2 1

1

2

*U2@UARC8-4K1986

*TVUFB0201AD0

2 1

31

R367 470/F_4

3

Q35

ME2N7002E_200MA

1

D28

D29

*TVUFB0201AD0

2 1

C3A

+3V_S5

C3A

USB20N_CONN_R2 USB20P_CONN_R2

R316 10K_4

C395 1U/6.3V_4X

+5V_S5

1 2 3 4 5 6 7 8 9

CN17

VBUS

1

D-

2

D+

3 4

GND SSRX-

5 6

SSRX+

7

GND

8

SSTXSSTX+

9

11111010131312

12

U2_2@UARC8-4K19 86

U12

2

IN1 IN23OUT2

4

EN#

1

GND

9

GND-C

BD82035FVJ-E2

USB30_RXN2_R

OUT3 OUT1

OC#

USB30_RXP2_R USB30_TX2-_C1 USB30_ TX2+_C1 USB20N_CONN_R2 U SB20P_CONN_R2

D31

*U3_2@TVUFB0201AD0

2 1

D30

*U3_2@TVUFB0201AD0

2 1

D32

*U3_2@TVUFB0201AD0

2 1

D33 *U3_2@TVUFB0201AD0

2 1

C3A

2.5A

8 7 6

5

C384 *470P/50V_4X

+5VSUS_USBP1

C398

*10U/6.3V_6X

C699 220U/6.3V_105CS_E18e

ME2N7002E_200MA

D34 *TVUFB0201AD0

2 1

2

D35 *TVUFB0201AD0

2 1

C3A

R315 470/F_4

3

Q34

1

C3A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

PROJECT :

USB3 S&C(R)&(Right)/USB2 (Left)

1

BD5

1A

31 50W ednesday, January 16, 2013

For XiangYun Layout House Use

5

4

3

2

1

32

D D

C C

B B

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

NC

1

BD5

32 50Wednesday, January 16, 2013

For XiangYun Layout House Use

1A

5

GND1

GND2

GND3

RSVD

<HDD>

CN19

7 6

RXP RXN

TXN TXP

3.3V

3.3V GND GND GND

5V 5V 5V

GND GND

12V 12V 12V

SATA_TXP_1ST_HDD_C

5

SATA_TXN_1ST_HDD#_C

4 3

SATA_RXN_1ST_HDD#_C

2

SATA_RXP_1ST_HDD_C

1

22 21 20 19 18 17 16 15 14 13 12 11 10 9 8

+5V_HDD1

C706 *0.1U/16V_4Y

C680 0.01U/25V_4X C681 0.01U/25V_4X

C693 0.01U/25V_4X C696 0.01U/25V_4X

C707 *10U/6.3V_6X

R666 0_8

+

C703 *100U/6.3V_3528P_E45b

SATA_TXP_1ST_HDD {9} SATA_TXN_1ST_HDD# {9}

SATA_RXN_1ST_HDD# {9} SATA_RXP_1ST_HDD {9}

1A 1.6A

+5V

SATA HDD

23

GND

D D

24

GND

6030H-22G05

C C

4

CN14

GND14

GND15

10300-00001

GND1

GND2

GND3

RXP

RXN

TXN TXP

DP +5V +5V

MD GND GND

<ODD>

14 1

2 3 4 5 6 7

8 9 10 11 12 13

15

SATA_TXP_ODD_C SATA_TXN_ODD#_C

SATA_RXN_ODD#_C SATA_RXP_ODD_C

+5V_ODD

SATA ODD

B2A

3

C573 0.01U/25V_4X C581 0.01U/25V_4X

C584 0.01U/25V_4X C597 0.01U/25V_4X

ODD_PRSNT# {11}

ODD_MD# {10}

SATA_TXP_ODD {9} SATA_TXN_ODD# {9}

SATA_RXN_ODD# {9} SATA_RXP_ODD {9}

C624 ZRP@0.1U/16V_4Y

C634 *10U/6.3V_6X

+

C272 *100U/6.3V_3528P_E45b

+5V_ODD

2

+5V

C291 ZRP@0.01U/25V_4X

L8 ZRP-N@0_1206

3

1

Q26

2

ZRP@ME1303_3A

+5V_ODD

C274 *ZRP@0.01U/25V_4X

+5V_ODD

R187 ZRP@22_8

3

2

Q27 ZRP@ME2N7002E_200MA

1

<OZP>ODD Zero power . (Only for Intel)

R210 ZRP@3.01K/F_4

1

+5V

R211 ZRP@4.7K_4

Q29

1 3

ZRP@LTC044EUBFS8TL_30MA

33

2

PCH_ODD_EN {11}

B B

A A

Quanta Computer Inc.

PROJECT :

HDD/ODD

PROJECT :

1

Size Document Numb er Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

BD5

1A

33 50Wednesday, January 16, 2013

For XiangYun Layout House Use

5

Codec (CX20756-11Z)

D D

C C

B B

<ADO>

C485

C487

0.1U/16V_4Y

1U/6.3V_4X

ADOGND

R760 0_6

+3V

R459 0_6

+3V

R450 0_6

+3V_S5

C503 *0.1U/16V_4Y

GND

ACZ_RST#_AUDIO{9}

BIT_CLK_AUDIO{9} ACZ_SYNC_AUDIO{9} ACZ_SDIN0_AUDIO{9}

ACZ_SDOUT_AUDIO{9}

AMP_MUTE#{37}

PCBEEP{9}

INT_DMIC_DATA{29}

INT_DMIC_CLK{29}

C478 *0.47U/6.3V_4X

C506 *10P/50V_4C C494 *10P/50V_4C C493 *10P/50V_4C C143

GND

R446 0_4 R449 33_4

C510 0.1U/16V_4Y

R435 33_4

1.2mA(20mils)

C721

C483

0.1U/16V_4Y

*4.7U/6.3V_6X

GND

C513 1U/6.3V_4X

GND

0.061mA(15mils)

C502

C497

*10U/6.3V_8X

0.1U/16V_4Y

GND

48.7mA(20mils) 1A(100mils)

C720

C722

0.1U/16V_4Y

*10U/6.3V_8X

GND

C488

C489

4.7U/6.3V_6X

0.1U/16V_4Y

GND

ACZ_BITCLK_RR SDATA_IN

AMP_MUTE# PCBEEP_C

INT_DMIC_DATA DMIC_CLK

TP36 TP37

DMIC_CLK INT_DMIC_DATA ACZ_RST#_AUDIO BIT_CLK_AUDIO ACZ_SDOUT_AUDIO

+FILT_1.65V

+3AVDD

C484 *0.1U/16V_4Y

+3V_VDDIO

+3AVDD

+FILT_1.8V

U15

9

RESET#

5

BIT_CLK

8

SYNC

6

SDATA_IN

4

SDATA_OUT

39

SPKR_MUTE#

10

PCBEEP

1

DMIC_DAT/GPIO1

40

DMIC_CLK/MUSIC_REQ/GPIO0

37

GPIO1/PORTC_R_MIC

36

MUSIC_REQ/GPIO0/PORTC_L_MIC

CX20756-11Z

4

+AVDD_3.3+3AVDD_S5

+5AVDD

+CLASSD_5V

C514

0.1U/16V_4Y

2

3

7

18

VDD_IO

DVDD33

VDDO33

FILT_1.8V

LEFT+

LEFT-14RIGHT-

12

13

16

27

17

AVDD_3.3V

RIGHT+

28

AVDD_5V

PORTB_R_LINE PORTB_L_LINE

PORTD_B_MIC PORTD_A_MIC

11

LPWR_5.0

RPWR_5.0

CLASS-D_REF

JSENSE MICBIASC MICBIASB

HGNDB HGNDA

PORTA_R

PORTA_L

AVEE FLY_N FLY_P

EP_GND

41

C464 0.1U/16V_4Y C508 0.1U/16V_4Y C509 *0.1U/16V_4Y C445 *0.1U/16V_4Y

GND

24

29

AVDD_HP

FILT_1.65V

15

C3A

C492

C490

0.1U/16V_4Y

2.2U/6.3V_4X

ADOGND

C718

C719

*10U/6.3V_8X

0.1U/16V_4Y

GND

(40mils)

C511

C512

0.1U/16V_4Y

R439

5.11K/F_4

R440 39.2K/F_4 R441 20K/F_4

R438 0_4

R436 100/F_6 R437 100/F_6

ADOGND

C516

4.7U/6.3V_6X

0.1U/16V_4Y

GND

+3AVDD

38

SENSE_A

TP38

35 34

+MIC1-VREFO_B +MIC1-VREFO

33

MIC1-RR MIC1_R1

32 26

R445 0_4

25

R448 0_4

31

TP40 TP44

30 23

22

21

AVEE

20

FLY_N

C505 1U/6.3V_4X

19

FLY_P

ADOGND

SPK_R+ SPK_RSPK_LSPK_L+

R759 0_6

R458 0_1206

C515

4.7U/6.3V_6X

Port_A# Port_B#

MIC1_L1MIC1-LL

HPOUT-R HPOUT-L

C498 *0.1U/16V_4Y

GND

3

C501

2.2U/6.3V_4X

C3A

MIC1-RR MIC1-LL

+5V

C479 *0.47U/6.3V_4X C480 *0.47U/6.3V_4XC477 *0.47U/6.3V_4X

2

D36 *TVUFB0201AD0

R447 5.1/F_6

R444 5.1/F_6

D38 *TVUFB0201AD0

<ADO>

R750

2.2K_4

MIC1_L2

MIC1_R2

2 1

<ADO>

HPOUT-L2

HPOUT-R2

2 1

D37 *TVUFB0201AD0

D39 *TVUFB0201AD0

R753

2.2K_4

L19 HCB1608KF-121T20_2A

L18 HCB1608KF-121T20_2A

C451

100P/50V_4N

B2A

L21 HCB1608KF-121T20_2A

L20 HCB1608KF-121T20_2A

C491 *100P/50V_4N

C471

100P/50V_4N

C504 *100P/50V_4N

C474

*0.1U/16V_4Y

Port_A#

C473 *0.1U/16V_4Y

External MIC

+MIC1-VREFO

MIC1_L1 MIC1_L3

C461 1U/10V_6X

C456 1U/10V_6X

MIC1_L3 MIC1_R3

2 1

Headphone

HPOUT-L HPOUT-L3

HPOUT-L3 HPOUT-R3

2 1

Port_B# MIC1_R3MIC1_R1

MIC1_L3 MIC1_R3

HPOUT-R3HPOUT-R

HPOUT-L3 HPOUT-R3

1

CN6

3 1

5 6 2 4

2SJ3061-003111F

Normal Open Jack

ADOGND

C468 *0.1U/10V_4X C454 *0.1U/10V_4X

CN7

3 1

5 6 2 4

2SJ3061-003111F

Normal Open Jack

ADOGND

C496 *0.1U/10V_4X C486 *0.1U/10V_4X

34

7

Shield_GND

7

Shield_GND

B2A

Internal Speaker

Box_Vendor{11} BOARD_ID11{11}

<ADO>

R112 BLM18PG471SN1D_1A R113 BLM18PG471SN1D_1A R114 BLM18PG471SN1D_1A R115 BLM18PG471SN1D_1A

88266-080L

10

9

8

INSPKL+NSPK_L+

8

7

INSPKL-NSPK_L-

7

6

INSPKR-NSPK_R-

6

5

INSPKR+NSPK_R+

5

4

3

2

GND

1

CN3

C3A

INSPKL-N INSPKL+N

GND

INSPKR-N INSPKR+N

INSPKL-N INSPKL+N INSPKR-N INSPKR+N

D40 *TVUFB0201AD0

2 1

D41 *TVUFB0201AD0

2 1

C145 E@1000P/50V_4X

C144 E@1000P/50V_4X

D42 *TVUFB0201AD0

2 1

C142 E@1000P/50V_4X

D43 *TVUFB0201AD0

2 1

E@1000P/50V_4X

B2A

A A

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

Audio Codec (CX20671)

1

BD5

A1A

34 50Wednesday, January 16, 2013

For XiangYun Layout House Use

5

Atheros Lan

L1

AVDDVCO AVDDL DVDDL

L25 LAN@HCB1608KF-601T10_1A

D D

+3V_S5 +LAN_VDD33

R109 *LAN@0_6

3

1

C157 LAN@0.01U/25V_4X

C C

PCIE_WAKE#{8,30}

B B

PCIE_CLK_LAN_REQ#{10}

A A

Q11

2

LAN@ME1303_3A

C138 *LAN@0.01U/25V_4X

2

6

Q28A LAN@2N7002KDW_115MA

R201 *LAN@0_4

+LAN_VDD33 +LAN_VDD33

5

3 4

Q28B LAN@2N7002KDW_115MA

R194 *LAN@0_4

R110 LAN@3.01K/F_4

1

L26 LAN@HCB1608KF-601T10_1A

Switch mode

LDO mode

+3V_S5

+LAN_VDD33+LAN_VDD33

R202 LAN@10K_4

PCIE_LAN_WAKE#

R193 LAN@4.7K_4

CKREQ_G#

L1

Mount NC

R111

LAN@4.7K_4

2

Q12

LAN@LTC044EUBFS8TL_30MA

13

T

T R

R

R A

A

A N

N

N S

S

LAN@0.1U/16V_4YC190

F

LAN@0.1U/16V_4YC184

O

O R

R

61LAN@0.1U/16V_4YC174

M

61LAN@0.1U/16V_4YC168

E

E R

R

AVDD_CEN_T TX0P X-TX0P TX0N X-TX0N

AVDD_CEN_T TX1P X-TX1P TX1N X-TX1N

AVDD_CEN_T TX2N X-TX2N AVDD_CEN_T

TX3P

LAN_P {37}

4

+LAN_VDD33

C599 LAN@0.1U/16V_4Y

AVDD_CEN_T TX0P TX0N

AVDD_CEN_T TX1P TX1N

AVDD_CEN_T TX2P TX2N

AVDD_CEN_T TX3P TX3N

B2A

U21

1

TCT1

MCT1

2

TD1+

MX1+

3

TD1-

MX1-

4

TCT2

MCT2

5

TD2+

MX2+

6

TD2-

MX2-

7

TCT3

MCT3

8

TD3+

MX3+

9

TD3-

MX3-

10

TCT4

MCT4

11

TD4+

MX4+

12

TD4-

MX4-

62LAN@TST1284ALF

LAN@1U/6.3V_4X

24 23 22

21 20 19

18 17 16

15 14 13

3

C625 LAN@10U/6.3V_6X

LAN@15P/50V_4CC234

LAN@15P/50V_4CC221

C147 *LAN@10U/6.3V_6X

23

4 1

0.163A(20mils)

C165 *LAN@1000P/50V_4X

PLTRST#{3,10,30,36,37,38}

+LAN_VDD33

Y1 LAN@25MHZ_30

+LAN_VDD33

C166 LAN@1U/6.3V_4X

R152 LAN@30K/F_4

C220 LAN@0.1U/16V_4Y

B2A

U20

1 2 3

4 5 6

7 8 9

10 11 12

24

TCT1 TD1+ TD1-

TCT2 TD2+ TD2-

TCT3 TD3+ TD3-

TCT4 TD4+ TD4-

61LAN@GST5009BLF

TERM1

TERM2

TERM3

X-TX2PTX2P

TERM4

X-TX3P X-TX3NTX3N

TERM1

MCT1

23

MX1+

22

MX1-

21

TERM2

MCT2

20

MX2+

19

MX2-

18

TERM3

MCT3

17

MX3+

16

MX3-

15

TERM4

MCT4

14

MX4+

13

MX4-

TERM1 TERM2 TERM3 TERM4

C167 LAN@0.01U/100V_6X

TERM4_C TERM3_C

R116

R117

62LAN@0_8

61LAN@75/F_8

TERM9

C141 61LAN@10P/3KV_1808N

TX0P TX0N TX1P TX1N

C182 LAN@0.01U/100V_6X

R123 61LAN@75/F_8

E@6.8P/50V_4NC583 E@6.8P/50V_4NC582 E@6.8P/50V_4NC572 E@6.8P/50V_4NC571

C614 LAN@0.1U/16V_4Y

PCIE_LAN_WAKE# CKREQ_G#

C603 LAN@1U/6.3V_4X

R125 62LAN@0_8

TERM9

C140 62LAN@220P/3KV_1808X

Switch mode

LDO mode

AVDDL

LAN_XTLO LAN_XTLI

AVDDH

RBIAS

R140 LAN@2.37K/F_4

C185 LAN@0.01U/100V_6X

TERM2_C

R126 LAN@75/F_8

TX2P TX2N TX3P TX3N

L2,C1,C2,C3

Mount

NC

U6

1

VDD33

2

PERSTn

3

WAKEn

4

CLKREQn

5

DEBUGMODE[0]

6

AVDDL_REG

7

XTLO

8

XTLI

9

AVDDH_REG

10

RBIAS

61_62LAN@AR8161-A

C189 LAN@0.01U/100V_6X

TERM1_C

R129 LAN@75/F_8

41

GND

GND142GND243GND344GND445GND546GND647GND748GND849GND9

*E@6.8P/50V_4NC730 *E@6.8P/50V_4NC728 *E@6.8P/50V_4NC729 *E@6.8P/50V_4NC731

50

Atheros

AR8161/8162

X-TX0P X-TX0N

X-TX1P X-TX1N

X-TX2P X-TX2N

X-TX3P X-TX3N

B2A

2

40

38

37

36

35

34

LX

LED139LED0

RX_P

RX_N

AVDDL

DVDDL_REG

TRXP011TRXN012AVDDL13TRXP114TRXN115AVDD3316TRXP217TRXN218AVDDL19TRXP3

TX1P

TX2P

TX0P

TX1N

TX0N

1

TX0P

2

TX0N

1

TX2N

2

TX2P

LX DVDDL

L5 LAN@4.7uh_C_1A

L2 C1 C2 C3

LAN_LED1# LAN_LED0#

DVDDL

AVDDVCO

AVDDL

33

32

31

AVDDL

REFCLK_P

REFCLK_N

20

TX3P

TX2N

AVDDL

AVDDH_C

AVDDL

U22

6

CH1

CH4

5

VDD

GND

4

CH23CH3

*LAN@AZ1013-04S.R7G

U19

6

CH1

CH4

5

VDD

GND

4

CH23CH3

*LAN@AZ1013-04S.R7G

C263 *LAN@1000P/50V_4X

C622 LAN@1U/6.3V_4X

LAN@0.1U/16V_4YC623

LAN@0.1U/16V_4YC618

61LAN@0.1U/16V_4YC619

LAN@0.1U/16V_4YC602

TX1P

+LAN_VDD33

TX1N

TX3N

+LAN_VDD33

TX3P

TESTMODE[2] TESTMODE[1] TESTMODE[0]

AVDDH TRXN3

PCIE_TXN_LAN# {10} PCIE_TXP_LAN {10}

CLK_PCIE_LAN {10}

CLK_PCIE_LAN# {10}

TX_P TX_N

NC

PPS

LED2

+LAN_VDD33

LED0 = LAN_ACTLED

LED1 = LAN_LINKLED#

LED2

C260 LAN@10U/6.3V_6X

30

PCIE_RXP6_C

29

PCIE_RXN6_C

28 27 26 25 24 23

LAN_LED2#

22

AVDDH

21

TX3N

C600 LAN@1U/6.3V_4X

R516 LAN@0_6

R

R J

J

J 4

4

4 5

5

R184 *LAN@10K_4 R183 *LAN@10K_4 R517 *LAN@10K_4

1

C264 LAN@0.1U/16V_4Y

LAN@0.1U/16V_4YC621

C620 *LAN@1U/6.3V_4X

C635 *LAN@4.7U/6.3V_6X

LAN@0.1U/10V_4XC257

LAN@0.1U/10V_4XC256 TP8 TP7

TP5

X-TX3N X-TX3P X-TX1N X-TX2N X-TX2P X-TX1P X-TX0N X-TX0P

TP6

LAN@0.1U/16V_4YC601

1

0 1

0

1 0

LAN@0.1U/16V_4YC219C613

+LAN_VDD33

<LAN>

CN12

8

NC4/3-

7

NC/3+

6

RX-/1-

5

NC2/2-

4

NC1/2+

3

RX+/1+

2

TX-/0-

1

TX+/0+

9

GND

10

GND

LAN@2RJ3057-008211F

R175 *LAN@10K_4

LAN_LED1# LAN_LED0#

R174 *LAN@10K_4 R146 *LAN@10K_4

LAN_LED2#

High core voltage(default=1)

Low core voltage Switch mode regulator (SWR) select

Linear regulator (LDO) select

25 MHz external clock input 48 MHz external clock input

35

PCIE_RXP_LAN {10} PCIE_RXN_LAN# {10}

D44 *GDT_BS401N

2 1

5

4

D45 *GDT_BS401N

2 1

Quanta P/N : CYBS401N201

3

D46 *GDT_BS401N

2 1

D47 *GDT_BS401N

B2A

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

2

Date: Sheet of

PROJECT :

Atheros LAN (AR8161B/62B)

1

BD5

A1A

35 50Wednesday, January 16, 2013

For XiangYun Layout House Use

5

4

3

2

2 IN 1 Card Reader

<MMC>

1

36

EMI

R452 E@0_4

CTRL3

+VCC_XD

D D

DATA2

R394 E@BLM15BD121SN1D_300MA R389 E@BLM15BD121SN1D_300MA

DATA1 DATA0

R390 E@BLM15BD121SN1D_300MA R391 E@BLM15BD121SN1D_300MA

CTRL0

R392 E@0_4

CTRL2 SD_CMD DATA3

R393 E@BLM15BD121SN1D_300MA

R428 E@0_4

EMI

SD_D2 SD_D1 SD_D0

SD_CLK

SD_D3

B2A

SD_WPCTRL1 SD_CD#

11WP12

4

CN22

W/P(GND) DATA2 DATA1 DATA0 VSS2 CLK VSS1 CMD DATA3

PSDBT0-09GLBS1N14H1

C/D

VDD

GND4 GND3

GND113GND2

14

16 15

10

9 8 7 6 5 3 2 1

Card Reader (GL834L) <MMC>

C465

0.1U/16V_4Y

C455 0.1U/16V_4Y

C C

B B

+3V

R412 0_8

+3V

R442 0_8

+3V_DVDD33_Card

C462

4.7U/6.3V_6X

PLTRST#{3,10,30,35,37,38}

+3V_AVDD33_Card

C476

2.2U/6.3V_4X

C3A

R409 0_4

C458

0.1U/16V_4Y

C472

0.1U/16V_4Y

USB_CARD#{10}

USB_CARD{10}

Card_PLTRST#

C459 *0.1U/16V_4Y

TP41 TP39

+3V

R410 *1K_4

R411 *100K_4

+VCC_XD

+3V_DVDD33_Card

CTRL3

SD_GPIO0

+3V_DVDD33_Card

Card_PLTRST#

20

21

22

23

24

G1

25

RSTZ

PMOS

DVDD33

GL834L QFN24-3.3V

SB17SB38SB49SB510MS_BS11SB8

CTRL1

TP43

TP45

TP42

SD_CDZ

19

GPIO0

DVDD33

12

DATA1

VDD18

SB13 SB12

SD_CMD

SD_CLK

SB9

GL834L-OGY03

18

+1.8V_Card

17

DATA2

16

DATA3

15 14 13

SD_GPIO0

CTRL2 CTRL0 DATA0

SB0

SD_D7

SB1

SD_D6

SB3

SD_D5

SB4

SD_D4

SB5

SD_WP

SB8

SD_D1

SB9

SD_D0

SB12

SD_D3

SB13

SD_D2

R413 *10K_4

C463 1U/6.3V_4X

U14

1

DVDD33

2

DM

3

DP

4

AVDD33

5

MS_INS

6

SB0

B2A

R413

NC

Power Saving Mode (default)

10K Normal Mode

SD_D0 SD_D1 SD_D2 SD_D3

C448 E@4.7P/50V_4C

SD_CLK +VCC_XD

B2A

C441 E@12P/50V_4C

C440 E@12P/50V_4C

C449

4.7U/6.3V_6X

C443 E@12P/50V_4C

C444

0.1U/16V_4Y

C442 E@12P/50V_4C

B2A

A A

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

Card Reader(GL834L)

1

BD5

A1A

36 50Wednesday, January 16, 2013

For XiangYun Layout House Use

5

EC

<KBC>

+3VPCU

R106

2.2_6

35mA

C105

C92

10U/6.3V_6X

D D

C C

B B

0.1U/16V_4Y

LFRAME#{9,30}

LAD0{9,30} LAD1{9,30} LAD2{9,30} LAD3{9,30}

PCLK_591{10}

CLKRUN#{8} GATEA20{11}

RCIN#{11}

SCI#{10}

GPIO27{11}

PLTRST#{3,10,30,35,36,38}

USB_Normal_EN#{31}

SERIRQ{9}

USB_Normal_OC#_R{10,31}

MX0{38} MX1{38} MX2{38} MX3{38} MX4{38} MX5{38} MX6{38} MX7{38}

MY0{38} MY1{38} MY2{38} MY3{38} MY4{38} MY5{38} MY6{38} MY7{38} MY8{38} MY9{38} MY10{38} MY11{38} MY12{38} MY13{38} MY14{38} MY15{38} MY16{38} MY17{38}

MBCLK{40}

MBDATA{40}

2ND_MBCLK{10}

2ND_MBDATA{10} 3ND_MBDATA{20,31}

TPCLK{38}

TPDATA{38}

AC_PRESENT{8}

USB_SC_EN#{31}

SUSCLK{8}

EC_PECI{3}

PCLK_591 +VTT

R77 *22_4

C84 *10P/50V_4C

C57

0.1U/16V_4Y

R87 *DS3@0_4

MBCLK MBDATA 2ND_MBCLK 2ND_MBDATA 3ND_MBCLK 3ND_MBDATA

TPCLK TPDATA

R55 43_4

C72 *0.1U/16V_4Y

+A3VPCU_R

C73

0.1U/16V_4Y

R97 HCB1608KF-181T15_1.5A

C68

C70

*0.1U/16V_4Y

0.1U/16V_4Y

+VTT

EC_PECR_R

CLKRUN#

SCI#_uR

19

46

76

88

115

U2

VCC1

VCC2

VCC3

VCC4

3

LFRAME/GPIOF6

126

LAD0/GPIOF1

127

LAD1/GPIOF2

128

LAD2/GPIOF3

1

LAD3/GPIOF4

2

LCLK/GPIOF5

8

GPIO11/CLKRUN

121

GPIO85/GA20

122

KBRST/GPIO86

29

ECSCI/GPIO54

124

GPIO10/LPCPD

7

LREST/GPIOF7

123

GPIO67/N2TMS

125

SERIRQ/GPIOF0

9

GPIO65/SMI

54

KBSIN0/GPIOA0/N2TCK

55

KBSIN1/GPIOA1/N2TMS

56

KBSIN2/GPIOA2

57

KBSIN3/GPIOA3

58

KBSIN4/GPIOA4

59

KBSIN5/GPIOA5

60

KBSIN6/GPIOA6

61

KBSIN7/GPIOA7

53

KBSOUT0/GPIOB0/SOUT_CR/JENK

52

KBSOUT1/GPIOB1/TCK

51

KBSOUT2/GPIOB2/TMS

50

KBSOUT3/GPIOB3/TDI

49

KBSOUT4/GPIOB4/JENO

48

KBSOUT5/GPIOB5/TDO

47

KBSOUT6/GPIOB6/RDY

43

KBSOUT7/GPIOB7

42

KBSOUT8/GPIOC0

41

KBSOUT9/GPIOC1/SDP_VIS

40

KBSOUT10&P80_CLK/GPIOC2

39

KBSOUT11&P80_DAT/GPIOC3

38

KBSOUT12/GPO64/TEST

37

KBSOUT13/GPIO63/TRIST

36

KBSOUT14/GPIO62/XORTR

35

KBSOUT15/GPIO61/XOR_OUT

34

GPIO60/KBSOUT16

33

GPIO57/KBSOUT17

70

GPIO17/SCL1/N2TCK

69

GPIO22/SDA1/N2TMS

67

GPIO73/SCL2/N2TCK

68

GPIO74/SDA2/N2TMS

119

GPIO23/SCL3/N2TCK

120

GPIO31/SDA3/N2TMS

72

GPIO37/PSCLK1

71

GPIO35/PSDAT1

10

GPIO26/PSCLK2

11

GPIO27PSDAT2

77

GPIO00/EXTCLK/F_SDIO3

12

VTT

13

PECI

NPCE985LA0DX

VCC5

<KBC>Power Button

C79 *0.1U/16V_4Y

DNBSWON#

A A

NBSWON#_R

C80 *0.1U/16V_4Y

5

102

AVCC

LPC

SMB

PS/2

GND1

GND2

GND3

5

18

45

78

L1 *short_6

8769AGND

4

+A3VPCU

C89

0.1U/16V_4Y

8769AGND

H=1.6mm

A/D

D/A

GPIO

GPO82/IOX_LDSH/VD_OUT1

GPO84/IOX_SCLK/VD_OUT2

KB

TIMER

GPIO20/TA2/IOX_DIN_DIO

TIMER

GPIO40/F_PWM/1_WIRE GPO33/H_PWM/VD1_EN

IR

FIU

GPIO55/CLKOUT/IOX_DIN_DIO

GND4

GND5

AGND

GND6

89

103

116

4

C97 10U/6.3V_6X

GPIO90/AD0 GPIO91/AD1 GPIO92/AD2 GPIO93/AD3 GPIO05/AD4 GPIO04/AD5 GPIO03/AD6

GPIO07/AD7/VD_IN2

GPIO94/DA0 GPIO95/DA1 GPIO96/DA2

GPIO24

GPIO01/TB2

GPIO02/SPI_CS

GPIO06/IOX_DOUT

GPIO16

GPIO30/F_WP

GPIO36

GPIO41/F_WP

GPIO42/TCK

GPIO43/TMS

GPIO44/TDI

GPO47/SCL4/N2TCK

GPIO50/PSCLK3/TDO

GPIO51/N2TCK GPIO52/PSDAT3/RDY GPIO53/SDA4/N2TMS

GPIO70 GPIO71

GPIO72 GPIO75/SPI_SCK GPO76/SPI_MOSI

GPIO77/SPI_MISO

GPIO81/FW_P/F_SDIO2

GPIO97/DA3

GPIO56/TA1 GPIO14/TB1

GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM GPIO32/D_PWM GPIO45/E_PWM

GPIO66/G_PWM

GPIO34

GPIO87/SIN_CR

GPIO46/TRST

GPIO83/SOUT_CR

F_SDI&F_SDIO1

F_SDIO&F_SDIO0

F_CS0 F_SCK

EST_RST

GPIO80/VD_IN1

VCORF

44

VCORF_uR

C58 1U/6.3V_4X

4

VDD

+3V_VDD_EC

C77

0.1U/16V_4Y

97 98

ICMNT

99

AC SET_EC

100

SKU_STRAP_4

108 96 95

NBSWON#_R

94

101 105 106

6 64 79

SKU_STRAP_2

93 114 109

PWRLED#

15 80

SKU_STRAP_3

17

H_PROCHOT_EC

20 21 24 25 26 27 28

HWPG

73 74 75 82 83

RF_EN

84 91

DNBSWON#

110 112 107

EC_PXSTATE

31

SKU_STRAP_1

117 63

32

RF_LED#

118

SUSLED_EC#

62

BAT_SAT0#

65

BAT_SAT1#

22 16 81 66

14

113 23 111

86

SPI_SDI_uR

87

SPI_SDO_uR

90

SPI_CS0#_uR

92

SPI_SCK_uR

30 85

VCC_POR#

104

3

2

SM BUS PU/Address <KBC>

+3V

1mA

R68 2.2_6 C78 10U/6.3V_6X

TEMP_MBAT

R88 *100K/F_4 R86 4.7K_4

R82 0_4

R44 1K_4

R61 *100K/F_4

R56 4.7K_4 R80 *0_4 R81 0_4

SKU_STRAP_1

SKU_STRAP_2

SKU_STRAP_3

SKU_STRAP_4

H

Shark Bay

L Chief River

+3VPCU

TEMP_MBAT {40} ICMNT {40} AC SET_EC {40}

USB_SC_OC# {10,31}

USB_BUS_SW2 {31}

SUSB# {8}

USB_BUS_SW3 {31}

VFAN1 {3} LAN_P {35}

DISPON_O {29} ACIN {40}

LID591# {29} GFX_MAINON {48}

VRON {45} H_PROCHOT_EC {3}

AMP_MUTE# {34} WMAX_P {30}

D/C# {40} S5_ON {3,20,41} LVDS_BRIGHT {29}

SUSC# {8} MPWROK {8,45} RSMRST# {8}

SLP_SUS# {8,12}

RF_EN {30} DNBSWON# {8}

DGPU_PWROK {11,16,22,37}

TEMP_ALERT# {11} FANSIG1 {3}

RF_LED# {39} SUSLED_EC# {39} BAT_SAT0# {39} BAT_SAT1# {39}

SUSON {42}

MAINON {27,43,46}

BT_RFCTRL {30}

FB_CLAMP {17,20,48}

EC_DRAMRST_CTRL {27}

SUS_PWR_ACK {8}

+3VPCU

+A3VPCUVREF_uR

R33 *10K_4

R37 *10K_4

R45 *10K_4

R46 10K_4

R51 EV@10K_4

R52 IV@10K_4

R799 *10K_4

R798 10K_4

R800 *0_4

R74 1.2K/F_4

R42 *10K_4

B2A

USB_Normal_OC#_L

3

+3VPCU

B2A

ICMNT

AC SET_EC

PWRLED# {38}

FB_CLAMP_TGL_REQ# {20}

ID {40}

NUMLED {38}

SUSACK# {8}

KB_LED {38} CAPSLED {38}

ACZ_SDOUT_R {9}3ND_MBCLK{20,31} +3VPCU

USB_Normal_OC#_L {10,31}

MS Strap

14'' Capetown UMA

14'' Capetown DIS

17'' Aswan UMA

17'' Aswan DIS

C93 *10U/6.3V_6X

C94 *10U/6.3V_6X

C95 *10U/6.3V_6X

USB_BUS_SW4 {31}

B2A

NBSWON# {38}

B2A

SKU_STRAP_1

Capetown@/Aswan@ EV@ / IV@

SKU_STRAP_2 SKU_STRAP_3

1

0

VGA_PWR_LEVEL {20}

3

Q4

2

EV@ME2N7002E_200MA

1

MBCLK

R41 4.7K_4 R38 4.7K_4

MBDATA

R30 4.7K_4

2ND_MBCLK 2ND_MBDATA

R35 4.7K_4

3ND_MBCLK

R85 4.7K_4

3ND_MBDATA

TP <KBC>

Strap(795) <KBC>

INTERNAL KEYBOARD STRIP SET <KBC>

ID EEPROM <KBC>

SPI FLASH <KBC>

HWPG circuit <KBC>

0

1

0

1

B2A

2

SUSLED_EC# BAT_SAT0# BAT_SAT1# PWRLED#

+3VPCU

R84 10K_4 R20 10K_4 R27 10K_4 R83 10K_4 R795 *10K_4

SHBM

DGPU_PWROK{11,16,22,37}

HWPG_VCCSA{44}

HWPG_1.8V{46}

HWPG_1.5V{42}

TPCLK TPDATA

RF_LED#

+5V

B2A

R21 10K_4

U5

6

SCL

5

SDA

7

WP

M24C08-WMN6TP

ADDRESS: A0H

R40 OEV@0_4

R24 *SHORT_4

R26 *SHORT_4

R34 *SHORT_4

R29 *SHORT_4

EC-NPCE795L

1

AddressDevices

R138 10K_4 R137 10K_4

R28 NAOAC@10K_4 R25 AOAC@10K_4

RF_EN

R57 10K_4

+3VPCU

1

A0

2

A1

3

A2

8

VCC

4

GND

Quanta Computer Inc.

PROJECT :

1

3mA

C101

0.1U/16V_4Y

PCH_SPI_SI {9} PCH_SPI_SO {9} PCH_SPI_CLK {9}

PCH_SPI_CS0# {9}

+3VPCU

BD5

+TP_PWR

R39 10K_4

37 50Wednesday, January 16, 2013

37

+5V +5V_S5

HWPG

1A

SMBUS

Battery(A)

1

PCH(S5) G-sensor(S0)

2

IDROM(A)

VGA Thermal(S0) CEC(A)

3

+5VPCU

<LED>LED PU/PD

MY0

2ND_MBCLK 2ND_MBDATA

SPI_SDI_uR SPI_SDO_uR SPI_SCK_uR SPI_CS0#_uR

R66 10K_4

+3V_S5

SYS_HWPG{8,41}

Size Document Numb er Rev

Date: Sheet of

For XiangYun Layout House Use

5

CN1

36

<KBC>

+3VPCU

RP24

10

1

MX7

10KX8

9 8 7 4

2 3

MX3

56

MX7 MX2 MX3 MX4

MX0 MX5 MX6 MX1

MY7 MY13 MY12 MY15

MY3 MY5 MY14 MY6

MY2 MY1 MY0 MY4

MY17

MY16

K_LED_P

91504-340N

B2A

MX1 MX2 MX6 MX5 MX4 MX0

D D

C15 *220P/50V_4X C16 *220P/50V_4X C17 *220P/50V_4X C18 *220P/50V_4X

C19 *220P/50V_4X C20 *220P/50V_4X C21 *220P/50V_4X C22 *220P/50V_4X

C11 *220P/50V_4X C12 *220P/50V_4X C13 *220P/50V_4X C14 *220P/50V_4X

C7 *220P/50V_4X C8 *220P/50V_4X C9 *220P/50V_4X C10 *220P/50V_4X

C3 *220P/50V_4X C4 *220P/50V_4X C5 *220P/50V_4X C6 *220P/50V_4X

C2 *100P/50V_4N

C C

C1 *100P/50V_4N

R1 150_4

+3V

K_LED_P

1

MY16

NUMLED

MY17

MY2 MY1 MY0 MY4 MY3 MY5 MY14 MY6 MY7 MY13 MY8 MY9 MY10 MY11 MY12 MY15 MX7 MX2 MX3 MX4 MX0 MX5 MX6

MX1 K_LED_P CAPSLED

MY16 {37} MY17 {37}

MY2 {37} MY1 {37} MY0 {37} MY4 {37} MY3 {37} MY5 {37} MY14 {37} MY6 {37} MY7 {37} MY13 {37} MY8 {37} MY9 {37} MY10 {37} MY11 {37} MY12 {37} MY15 {37} MX7 {37} MX2 {37} MX3 {37} MX4 {37} MX0 {37} MX5 {37} MX6 {37} MX1 {37}

CAPSLED {37}

NUMLED {37}

2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34

35

TP board <TPD>

L3 NMTP@0_6

+5V

L2 IDTP@0_6

+3V

4

+TP_PWR

3mA

C218

E@1000P/16V_4X

TPCLK

B2A

CGDAT_SMB{14,15,30}

C197 *E@10P/50V_4C

3

<PSW>Power board w LEDINT KeyBoard

PWRLED#_Q

CN4

1 2 3 4

50503-0040N-001

B2A

+5V

CN5

6

TPDATA{37}

TPCLK{37}

CGCLK_SMB{14,15,30}

TPDATA TPCLK

CGCLK_SMB CGDAT_SMB

C233 *E@10P/50V_4C

5

4

3

2

1

50503-0060N-001

B2A

NBSWON#{37}

2

1

38

PWRLED#_Q

3

R95 *0_4

2

PWRLED#{37}

PWRLED#

Q10

ME2N7002E_200MA

1

B2A

<KBP>K/B LED power

KBP@87060-0040N

KB_LED_ON#

Q3

1 3

KBP@MMBT2222A_600MA

CN2

1 2 3

6

4 5

B2A

KB_LEDKB_LED

R8 *KBP@300_4

C39 *KBP@1U/6.3V_4X

2

Q2

1 3

*KBP@MMBT2222A_600MA

C732 *KBP@680P/50V_4X

B2A

+5V

C23 *KBP@1000P/50V_4X

GPIO52

C24 *KBP@220P/50V_4X

+5V

GPIO52{10,11}

KB_LED{37}

R12 KBP@300_4

GPIO52

KB_LED_DET#

C47 *KBP@1U/6.3V_4X

2

TOUCH PANEL <TPP>

HOLE

HOLE14

B B

1

*PAD

HOLE15

*PAD

1

HOLE1

67 5

8

4

9

123

*EMI-PAD

HOLE7

67 5

8

4

9

123

*EMI-PAD

HOLE2

67 5

8

4

9

123

*EMI-PAD

HOLE10

67 5

8

4

9

123

*EMI-PAD

HOLE3

67 5

8

4

9

123

*EMI-PAD

HOLE9

67 5

8

4

9

123

*EMI-PAD

HOLE5

67 5

8

4

9

123

*EMI-PAD

HOLE12

67 5

8

4

9

123

*EMI-PAD

HOLE4

67 5

8

4

9

123

*EMI-PAD

HOLE13

67 5

8

4

9

123

*EMI-PAD

USBP3N{10}

L41 *TPP@0_6

+5V

L42 TPP@0_6

+3V

R777 TPP@0_4

USBP3P{10}

PLTRST#{3,10,30,35,36,37}

R776 TPP@0_4 R775 *TPP@0_4

R774 *TPP@0_4

C723 TPP@4.7U/6.3V_6X

USB_Touch#_R USB_Touch_R

TOUCH_RST# TOUCH_PA4

+TPP_PWR

TPP@0.1U/10V_4X

+TPP_PWR

C724

CN2021

1

2

3

4

5

6

TPP@50273-0060N-001

C3A

B2A

CPU HOLEVGA HOLE

HOLE8

A A

1

*PAD

HOLE6

1

*PAD

HOLE11

1

*PAD

34

HOLE17

*AMD-APU-BRACKET

1 2

B2A

5

4

MINI Card NUT

HOLE16

1

*PAD

Quanta Computer Inc.

PROJECT :

Size Document Numb er Rev

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

KB/TP/PB/HOLE

1

BD5

1A

38 50Wednesday, January 16, 2013

For XiangYun Layout House Use

5

4

3

LED-Power<LED><W+A>LED-Battery

2

1

39

0.05A

LED1

+5VPCU

D D

<LED>LED-WiFi

R454 NAOAC@1.2K/F_4

+5V

R455 AOAC@1.2K/F_4

+5V_S5

EMI

EMIEMI

C C

B B

C25 *E@0.1U/10V_4X

C111 *E@0.1U/10V_4X

2

1

C358 *E@0.1U/10V_4X

C173 *E@0.1U/10V_4X

12-12Z/S2ST3D-C31/2C(QN)

3

0.025A

LED3 12-21/S2C-AQ2R2B/2C

3

12

VIN VIN

C187

C67

*E@0.1U/10V_4X

C247

C51

*E@0.1U/10V_4X

-BATLED0

-BATLED1

R451 2.2K_4

R460 1.2K/F_4

RF_LED_R

C495 *E@0.1U/10V_4X

R456 0_4

C507 *E@0.1U/10V_4X

C499 *E@0.1U/10V_4X

C175 *E@150P/50V_4N

C500 *E@0.1U/10V_4X

C50 *E@150P/50V_4N

+1.5VSUS+1.5VSUS

C246 *E@150P/50V_4N

C475 *E@0.1U/10V_4X

RF_LED# {37}

BAT_SAT0# {37}

BAT_SAT1# {37}

0.05A

+5VPCU

ESD Protect

2

LED2 12-11Z/T3D-CP2Q2B12Y/2C(QN)

31

<EMC>

FOR BATTERY LED

D17

-BATLED1

1

-BATLED0

2

*PJMBZ5V6

R457 1.2K/F_4

SUSLED_EC#-SUSLED

SUSLED_EC# {37}

B2A

FOR POWER LED

3

B2A

D16

1

-SUSLED RF_LED_R

3

2

*PJMBZ5V6

FOR RF LED

D15

1

3

2

*PJMBZ5V6

A A

Quanta Computer Inc.

PROJECT :

LED/EMI

PROJECT :

1

Size Document Numb er Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

BD5

1A

39 50Wednesday, January 16, 2013

For XiangYun Layout House Use

5

B2A

PCN2

6

DC_JACK

5 4

50302-00641-001

+3VPCU

PC93 *E@0.1U/25V_4Y

10

1 2

12

3 4 5 6 7 8

13

9

11

BTJ-09BJAB

AC SET_EC{37}

3 2 1

ID

PR116

*100K_4

BAT-GND M-DATA

M-CLOCK

PR131

100/F_4

D D

C C

B B

PF2

F1206HA15V024TM

1 2

PC110

E@2200P/50V_4X

PR101 *SHORT_4

MBAT+ BAT-V

TEMP_MBAT_C

PC107

PR105

100/F_4

47P/50V_4N

VA0

PC24

10U/6.3V_6X

PD3 TVLST2304AD0

1

CH1

2

VN CH23CH3

PR95 1K_4

PC88 47P/50V_4N

MBDATA {37,40} MBCLK {37,40}

PC121 E@0.1U/25V_4X

PR32

82.5K/F_6

PR25 10K/F_4

ACIN{37}

6

CH4

5

VP

4

MBDATA

+3VPCU

MBCLKTEMP_MBAT

PF1

F1206HA15V024TM

1 2

VA1 VIN

PC116 E@1U/25V_6X

PD1

1SS355_100MA

ACIN

82.5K/F_6

ID {37}

+3VPCU

PR104 100K_4

1K_4

PR123

12

PC97

0.01U/25V_4X

+3VPCU

PR36

SBR1045SP5-13

PR42 10K/F_4

PR37

49.9/F_6

PR39

22K/F_6

TEMP_MBAT {37}

PD4

3.2V

4

1 2

PC40

*1U/6.3V_4X

3

VA2VA2

TVS_SMAJ20A

PC51 0.1U/10V_4X

MBDATA{37,40}

MBCLK{37,40}

PC39

0.1U/25V_6X

PC43

12

2200P/50V_4X

0.01_3720 PR132

1 2

PD2

PR23

2 1

10/F_6

( Near by sense R side)

( Near by IC side)

11

10

13

22

12

9

2

3

4

5

6

PR40

2.21K/F_6

1

VDDSMB

SDA

SCL

ACOK

DCIN

ACIN

VREF

ICOMP

NC

VCOMP

PC45

0.01U/25V_4X

+3VPCU

DCIN

88731ACIN

NC

PR24 10/F_6

R1

CSIP

GND33GND32GND31GND

0.1U/25V_6X

28

30

CSSP

NC

7

PC139

CSIN

PC29

0.1U/10V_4X

27

PU2

ISL88732HRTZ-T

ICM

8

220K/F_4

CSSN

PR41

100_4

VA3

PR162

14

26

VCC

NC

3

PR163 220K/F_4

PC26 1U/6.3V_4X

1 2

PR28

4.7_6

21

VDDP

BOOT

UGATE

PHASE

LGATE

PGND

CSOP

CSON

NC

VBF GND GND

12

PC50

10U/6.3V_6X

1 6 2 3

PQ14

IMD2AT108

PR29

2.7_6

25

24

88731A_U_GATE

23

88731A_PHASE

20

88731A_L_GATE

19

18

( Near by IC side)

17

16

15 29

ICMNT {37}

5 4

PC34 1U/6.3V_4X

0.1U/25V_6X

PC44

0.1U/10V_4X

1 2

PC25

PQ7 AOD403

1

CSOPCSOP CSON

2

B2A

PQ9 AP4439GMT

PR110 33K_6

1 3

43

PC87

PC89

E@1U/25V_6X

E@2200P/50V_4X

B2A

D/C#{37}

VIN

PC16

*10U/25V_8X

PL3

PR153 10/F_6

*10U/25V_8X

*2200P/50V_4X

PC21

PC136

10U/25V_8X

PR20

E@2.2/F_6

PC18

E@1000P/50V_4X

10U/25V_8X

3.3UH_7X7_TOK

PC135

PC20

PC130

*0.1U/25V_4X

52

PQ12

4

AON7410

3

1

52

PQ11

4

AON7410

3

1

4

10K/F_6

3

2

1

0.01_3720 PR148

1 2

52

PR115

PQ6

2N7002K_300MA

PR154 10/F_6

BAT-V

1

P1

PC126

PC125

10U/25V_8X

( Near by sense R side)

PR152 100_4PCN1

BAT-V

(Please place this R near by battery pack side)

A A

Quanta Computer Inc.

Chief River

1

Chief River

40 50Wednesday, January 16, 2013

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

CHARGER-ISL88731C A1A

For XiangYun Layout House Use

5

VIN

PC203

E@2200P/50V_4X

0.1U/25V_6X PC205

10U/25V_8X

D D

PC77

4

3

VIN

+5VPCU

PC79

PR69

2.2/F_8

1 2

10U/6.3V_6X

+2VREF+3VPCU

2

PC204

0.1U/25V_6X PC206

10U/25V_8X

1

VIN

P2

PC78

E@2200P/50V_4X

12

13 21 22

20 19 24

23

PR83

PR237

4

2

PU4

EN UGATE1 BOOT1

PHASE1 LGATE1 VOUT1

FB1 PGOOD

147K/F_4

124K/F_4

PR71 *SHORT_4

+3V_S5

52

3

16

VIN

1

PC83

RT8223P

ENTRIP1

1

PQ28 AON7410

8

VREG3

TOP Side

ENTRIP26SKIPSEL

+3V

B2A

PQ36 AON6414AL

Rds=5.6mOhm

PR84

2

1

2

1

0.1U/25V_6X

B2A

15.4K/F_4

0.1U/25V_6X

3

MAIND

PC212

PR85

10K/F_4

PC208

0.1U/25V_6X

TP72

PC81 0.1U/25V_6X

S5_ON{3,20,37}

B2A B2A

(Peak 13.16A ,AVG 9.52A) OCP:15.8A ~ 17.1A

C C

B B

A A

+

PC197

220U/6.3V_105CS_E18e

PR79 *0_2/S

B2A

DCR=19mOhm DCR=19mOhm

PL12

2.2UH_10X10 PR229

*E@2.2/F_6

PR77 *0_2/S

PC201 *E@1000P/50V_4X

PC209

0.1U/25V_6X

PR231

+15V

22_8

52

3

1

52

PQ37

3

1

AON6758

PD7 BAV99W-7-F_150MA

PD6 BAV99W-7-F_150MA

+15V_ALWP

PC207

MAIND{27,42,46}

4

PC80

0.1U/25V_6X

5V_UGATE1

PR72

1 2

5V_BST1

2.2_6

5V_PHASE1 3V_PHASE2

5V_LGATE1

5V_FB1

DDPWRGD_R

+3VPCU

12

PR70 10K_4

3V_LGATE2

B2A

MAIND

(Peak 5.6A ,AVG 3.9A) (Peak 6.6A ,AVG 4.6A)

5

4

3

10U/6.3V_6X

17

PR82 *0_4/S

3

REF

TONSEL

VREG5

UGATE2

PHASE2

LGATE2

EMC18GND

14

25

12

BOOT2

OUT2

FB2

GND

15

B2A

PC84 1U/6.3V_4X

4 10 9

11 12

7 5

MAIND

3V_UGATE2

PR73

1 2

2.2_6

3V_LGATE2

3V_FB2

PR238 0_6

PR236

10K/F_4

4

PR80 *0_2/S

PC82

0.1U/25V_6X

+5V_S5

52

3

1

B2A

PQ34 AON7752

PR86

6.8K/F_4

DDPWRGD_R

PQ30 AON7410

4

3

4

3

Rds=13mOhm

+5V

2

52

1

52

1

+3VPCU

PQ35 AON7410

PR74 *10K_4

(Peak 10.6A ,AVG 7.4A) OCP:12.7A ~ 13.8A

PL13

2.2UH_7X7_TOK

PR230 *E@2.2/F_6

PC202 *E@1000P/50V_4X

PR78

PR81

*0_2/S

SYS_HWPG {8,37}

Size Document Number Rev

Date: Sheet of

System 3V/5V(TPS51123A) A1A

+

PC198

220U/6.3V_105CS_E18e

Quanta Computer Inc.

Chief River

PROJECT :

Chief River

1

41 50Wednesday, January 16, 2013

+3V_S5+5V_S5

For XiangYun Layout House Use

5

1 2 3 4 5

23

PU1

VTTSNS VLDOIN VTT VTTGND VTTREF

PwPad-324PwPad-425PwPad-5

PR33

*100K_4

21

PwPad

PwPad-122PwPad-2

VREF6GND7REFIN8VDDQSNS9PGND

26

TPS51216RUKR

+3VPCU

D D

+1.5VSUS_SRC

+SMDDR_VTERM

PC36

+SMDDR_VREF

C C

(Peak 0.1A, AVG 0.07A)

PR34 0_8

HWPG_1.5V{37}

PR35

*0_2/S

PC35

10U/6.3V_6X

PC37

0.22U/10V_4X

4

B2A

PR3035.7K/F_4

PR31 200K_4

20

19

18S317S516

TRIP

MODE

PGOOD

Be careful to this two net name.

PR26 *SHORT_4

S5_1.5V

PR21 *SHORT_4

15

VBST

14

DRVH

13

SW

12

V5IN

11

DRVL

10

1 2

PC12 1U/6.3V_4X

PR19

2.2/F_6

1.5SUS_HG

1.5SUS_PHASE1.5SUS_PHASE

+5V_S5

3

S3_1.5V {27} SUSON {37}

PC14 0.1U/25V_6X

1.5SUS_LG

2

PC122

PC118

0.1U/25V_6X

E@2200P/50V_4X

PC128

10U/25V_8X

1

VIN

P3

B2A

Rds=2.8mOhm

PQ8 HP8S36TB

1

2

D1

G1

S1/D2

9

G2

8

S2

765

S2

PR96 *E@2.2/F_6

PC90 *E@1000P/50V_4X

DCR=4.2mOhm

PL1

1.5UH_10X10

*SHORT_4

PR155

B2A

PR161 *0_8/S

*0.1U/10V_4X

ESR=10mOhm

PC120

B2A

(Peak 16.7A ,AVG 11.7) OCP:20A ~ 21.7A

PC114

+

390U/2.5V_105CS_E10f

+1.5VSUS

PC119 *10U/6.3V_6X

B2A

PR27

10K/F_4

R1

B B

0.1U/10V_4X

PC27

PR22

52.3K/F_4

PC23

0.01U/25V_4X

+1.5VSUS_SRC

MAIND{27,41,46}

MAIND

+1.5VSUS

65241

3

R2

PQ1 AO6402A

B2A

Vout = 1.8 * (R2/R1+R2)

(Peak 1.1A ,AVG 0.78A)

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

DDR1.5V

PROJECT :

+1.5V

Chief River

42 50Wednesday, January 16, 2013

1

A1A

For XiangYun Layout House Use

5

4

+3V_S5

3

2

1

P4

D D

B2A

PR54

66.5K/F_4

PR55 10/F_6

PC70

1U/6.3V_4X

12

RT8240BVCC

5

10

CS

9

PGOOD

8

EN

13

PAD

12

+5V_S5

+3V_S5

PR62 10K_4

C C

HWPG_VCCIO{44}

PR61

MAINON{27,37,46}

B B

A A

5

0_4

PC71

0.1U/10V_4X

RT8240BTON

11

VCC

RT8240BZQW

GND

RGND

7

PR63

PU3

G0

6

RT8240BFB

PR48 10K_4

UGATE BOOST

PHASE LGATE

FB

3 4

2 1

PC73

*100P/50V_4N

PR65

0_4

R1

*10K/F_4

R2

PR50 *0_4

RT8240BDH RT8240BBST_1

RT8240BLX RT8240BDL

PR67 0_4

PR59 0_4

PR60 *0_4

VOUT=(1+R1/R2)*0.5

4

VIN

B2A

Rds=2.8mOhm

PQ24 HP8S36TB

1

S1/D2

8

G1

G2

2

D1

S2

765

D1

S2

PR57

100_4

2

PR45

2.2_6

3

PC65

0.1U/25V_6X

9

VCCP_SENSE {5}

VSSP_SENSE {5}

PC171

0.1U/25V_4X

PL9

1.0UH_10X10 PR196 *E@2.2/F_6

PC170 *E@1000P/50V_4X

PC172

PC64 *E@2200P/50V_4X

ESR=10mOhm

+

PC168 330U/2V_7343P_E9c

Size Document Number Rev

+VCCIO(RT8240BGQW)

Date: Sheet of

10U/25V_8X

(Peak 18.75A ,AVG 13,12A) OCP:22.5A ~ 24.4A

B2AB2A

+

PC166 10U/6.3V_6X

PC165 0.1U/10V_4X

PC224 *Celeron@330U/2V_7343P_E9c

Quanta Computer Inc.

PROJECT :

Chief River

1

+VTT +1.05V

43 50Wednesday, January 16, 2013

A1A

For XiangYun Layout House Use

1

HWPG_VCCSA{37}

A A

+5V_S5

2

VCCSA_VID1 {5}

VCCSA_VID0 {5}

3

PR177 76@2.2K_4

B2A

4

5

P5

PC60 76@1U/6.3V_4X

PC152 76@2.2U/10V_6X

B2A

13

14

15

16

17

18

EN

VID0

B B

0 0

PC62 76@10U/6.3V_6X

+5V_S5

VCCSA_VID1VCCSA_VID0

PC155 76@0.1U/10V_4X

0 1

+VCCSA

0.9V *0.8V

PC154

76@10U/6.3V_6X

C C

19

PGND

20

PGND

21

PGND

22

VIN

23

VIN

24

VIN

PC160 76@0.22U/10V_4X

V5FILT

V5DRV

GND1VREF2COMP3SLEW4VOUT5MODE

VID1

PGOOD

76@TPS51462RGER PU8

6

HWPG_VCCIO {43}

12

BST

SW

PR179 *76@33K/F_4

11

10

9

8

7

76@0.1U/25V_6X

R

PC153

0 1 *0.85V

PC158 76@0.01U/25V_4X

1

D D

1

*0.8V FOR SV TYPE *0.85V FOR LV/ULV TYPE

0 1

1

0.725V

0.675V

PR181 76@5.1K/F_4

PC159 76@3300P/50V_4X

2

3

PR178 76@2.2K_4

PC151 *76@0.033U/10V_4X

PL8

76@0.47UH_7X7

PC150

76@22U/6.3V_8X

+VCCSA

R

OPEN 33K

*0.85V

PC156

76@22U/6.3V_8X

*0.8V

PR180

*76@10K_4

PC59

76@22U/6.3V_8X

PC63 76@22U/6.3V_8X

4

(Peak 6A ,AVG 4.2A) OCP:7A ~ 8A

+VCCSA

B2A

PR43 76@100_4

VCCSA_VCCSSENSE_R

Size Document Number Rev

+VCCSA(TI51461)

Date: Sheet of

PR44 76@0_4

Quanta Computer Inc.

PROJECT :

VCCSA_VCCSSENSE {5}

Chief River

44 50Wednesday, January 16, 2013

5

A1A

For XiangYun Layout House Use

5

PC1

PR1

VR_SVID_CLK

*PIV@330P/50V_4X

VCC_AXG_SENSE_R VSS_AXG_SENSE_R

PC131

PIV@0.01U/25V_4X

+3V_S5+ 3V_S5

+1.05V

PR2

PR6

*1.91K/F_4

*499/F_4

1.91K/F_4

PC3

43P/50V_4N

PR166 PIV@NTC_470K_4

PR253

35W@20.5K/F_4

PR10 *SHORT_6

PC6

1U/6.3V_4X

PR140 100K_4

VR_SVID_CLK{5} VR_SVID_ALERT#{5} VR_SVID_DATA{5}

150P/50V_4N

PR103

45W@5.62K/F_4

PR13 PIV@27.4K/F_4

PR17 PIV@3.83K/F_4

PC92

68P/50V_4C

PC102

PIV@390P/50V_4X

PR252 35WPI V@2.55K/F_4

PR3 4 5WPIV@3.65K /F_4

PC2

+5V_S5

PR14 *SHORT_6

PC5 1U/6.3V_4X

95836_VCCP

95836_VDD

95836_VRON

95836_NTCG

95836_NTC

PR128 NTC_470K_4

PR133

267K/F_4

PR120 2K/F_4

PC98 1000P/50V_4 X

PR7 PIV@499/F_4

PR124

27.4K/F_4

PR106

3.83K/F_4

PR134

499/F_4

PR121 45W@3.57 K/F_4

PR254 35W@2K/F_ 4

PR4

PR137 0_4

PR127 *0_4

GFX_PWRGD

H_PROCHOT#{3}

+1.05V

PR8

130/F_4

PIV@0_4

PR5 PIV@0_4

*100K/F_4

PR114

PR9

PR11

*75/F_4

54.9/F_4

VR_SVID_ALERT#

VR_SVID_DATA

VCC_AXG_SENSE{5} VSS_AXG_SENSE{5}

D D

C518 0.1U/10V_4X

MPWROK{8,37}

VRON{37}

DELAY_VR_PWRGOOD{3,8}

Check pull up resister to

1.05V for H_PROCHOT#

B2A

C C

PC219

*1000P/50V_4X

B2A

PC105 *330P/50V_4X

95836_PHASE_3

+5V_S5

PR169

12

95836_LGATE_3

45W@0_6

PC143

PC101

0.01U/25V_4X

45W@1U/6.3V_4X

VCC_SENSE_R VSS_SENSE_R

95836_PW M3

PR129 0_4 PR125 0_4

PU7 45W@ISL6 208BCRZ-T

1

UGATE

PHASE

2

BOOT

FCCM

3

PWM

4

LGATE

GND

PAD

9

8

7

6

VCC

5

VCC_SENSE{5}

PR176 45W@2.2/F _6

VSS_SENSE{5 }

45W 󰵖󰵖󰵖󰵖󰵓󰵓󰵓󰵓󰸿󰸿󰸿󰸿 35W 󰵓󰵓󰵓󰵓󰸿󰸿󰸿󰸿

45W 󰵓󰵓󰵓󰵓󰸿󰸿󰸿󰸿 35W 󰵖󰵖󰵖󰵖󰵓󰵓󰵓󰵓󰸿󰸿󰸿󰸿

Only Discrete

35W & 45W Value󰵖󰵖󰵖󰵖󱍕󱍕󱍕󱍕

95836_UGATE_3 95836_BOOT_3

B B

35W@ 35WPIV@

45W@ 45WPIV@

OEV@

35W@ 45W@

PC144

A A

45W@0.22 U/25V_6X

For XiangYun Layout House Use

5

PIV@2K/F_4

26 25

9 36 19

8

5

6

7

4 10

95836_COMP

390P/50V_4X

PR16

PR18 PIV@267K/F_4

PIV@47P/50V_4N

VCCP VDD

VR_ON PGOODG PGOOD VR_HOT# SCKL ALERT# SDA NTCG NTC

PC104

95836_UGATE_3

95836_PHASE_3

95836_LGATE_3

4

B2A

PC11

PIV@1000P/50V_4 X

PC15

FB17COMP

18

4

PC17 PIV@150P/50V_4N

38

37

39

FBG

RTNG

COMPG

PU5 ISL95836HRZ-T

RTN

16

PR255 35W@442/ F_4

PR102 45W@576/ F_4

PC96 4700P/25V_4 X

B2A

PC148

*PIV@22U/6.3V_8X

B2A

PC227

PR251 35W@33.2 K/F_4

PR15 4 5W@40.2K /F_4

PC115

45WPIV@0.22U/10V_4X

3

1

2

40

ISEN2G

ISEN1G

ISUMPG

ISUMNG

BOOT1G UGATE1G PHASE1G LGATE1G

ISEN3/FB211ISEN212ISUMP14ISUMN15ISEN1

13

PC95

PC100

0.22U/10V_4X

PC85

0.1U/10V_4X

PR90 649/F_4

PC149

*PIV@22U/6.3V_8X

22U/6.3V_8X

PC225

PQ17

45W@HP8S36 TB

9

PC113

45WPIV@0.22U/10V_4X

PWM2G

BOOT2 UGATE2 PHASE2 LGATE2

BOOT1 UGATE1 PHASE1 LGATE1

PWM3

PAD

PC99 35W@10 P/50V_4C

PC91 45W@0.22 U/10V_4X

VSUM-

45W@0.15U/10V_4X

PC86

+VAXG

PC146

*PIV@22U/6.3V_8X

PC226

1

G1

S1/D2

G2

765

8

B2A

ISUMPG

ISUMNG VSUMG-

ISEN1G ISEN2G

PR145

35WPIV@1K/F _4

35

95836_PW M2G

31

95836_BOOT1G

32

95836_UGATE1G

33

95836_PHASE1G

34

95836_LGATE1G

30

95836_BOOT2

29

95836_UGATE2

28

95836_PHASE2

27

95836_LGATE2

20

95836_BOOT1

21

95836_UGATE1

22

95836_PHASE1

23

95836_LGATE1

24

95836_PW M3

41

35W@0.1U/10V_4X

PC231

0.1U/10V_4X

PC147

+VCC_CORE

22U/6.3V_8X

2

VSUM+

ISEN3

95836_COMP

PC94

*PIV@22U/6.3V_8X

D1D1D1

S2S2S2

+5V_S5

connect to +5V (disable AXG-2)

PR12 35W@1K/F_ 4

ISEN1 ISEN2 ISEN3

VSUM+

PR107

2.61K/F_4 PR91 11K/F_4

PR139 NTC_10K_4

VSUM-

PC55

PIV@22U/6.3V_8X

22U/6.3V_8X

PC228

PC229

PC49

45W@10U/25V_8X

B2A

PR170

*45W@2.2/F_6

PC142

*45W@1000P/50V_4X

PR126 45W @3.65K/F_ 6

+5V_S5

B2A

PC56

PC58

PIV@22U/6.3V_8X

22U/6.3V_8X

PC232

PC48

45W@10U/25V_8X

PL7 45W@0 .24UH_7X7

PR174 *0_2/S

PR113 45W@10K/ F_4

3

OEV@1K_4

ISUMNG

45WPIV@0.22 U/25V_6X PC124

45WPIV@2.2/ F_6

PC57

PIV@22U/6.3V_8X

B2A

PC218

PC47

45W@0.1U/25V_4X

*45W@2200P/50V_4X

B2A

PR175 *0_2/S

PR119 45W@1/F_ 4 PR117 45W@10K/ F_4 PR118 45W@10K/ F_4

3

PR158

B2A

PR150

VIN

PC61

+5V_S5

95836_UGATE2

95836_BOOT2

95836_PHASE2

95836_LGATE2

+

PR250 35WPIV@442/ F_4

PR136 45WPIV@392/ F_4

PC103 PIV@4700P/25V_4 X

95836_UGATE2G 95836_BOOT2G 95836_PW M2G

95836_UGATE1

95836_BOOT1

0.22U/25V_6X

95836_PHASE1

95836_LGATE1

0.22U/25V_6X

+

PC10

45W@330U/2V_7343P_E9c

95836_BOOT1G

95836_UGATE1G

95836_PHASE1G

95836_LGATE1G

PC112 PIV@0.1U/10V_4X

PR141

2.2/F_6

PC109

PR157

2.2/F_6

PC123

+VCC_CORE

45W@560U/2V_7343P_E4.5a_3pin

VSUMISEN1 ISEN2

PC111 45WPIV@0.1U/10V_4X

PR138 PIV@649/F_4

PU6 45WPIV@ISL6 208BCRZ-T

1

UGATE

PHASE

2

BOOT

FCCM

3

VCC

PWM

4

LGATE

GND

PAD

9

HP8S36TB

PQ16 HP8S36TB

VSUM+

ISEN2

VSUM-

PIV@0.22U/25V_6X

PC230 35WPIV@0.047U/10V_4X

8 7 6 5

PQ10

VSUM+

ISEN1

PR97 10K/F_4

VSUM-

PR135 1/F_4

PR159 PIV@2.2/F_6

PC134

PR143 PIV@2.61K/F_4

PR144 PIV@11K/F_4

PR172 PIV@NTC_10K_4

PC108 PIV@0.1U/10V_4X

95836_PHASE2G

+5V_S5

PR149

45WPIV@0_6

95836_LGATE2G

1

G1

S1/D2

9

G2

765

8

PR98 3.65K/F_6

1

2

G1

S1/D2

9

G2

765

8

PR111

3.65K/F_6

PR109 10K/F_4

PR92 1/F_4

12

PC117

2

D1D1D1

S2S2S2

PIV@HP8S36TB

45WPIV@1U/6.3V_4X

D1D1D1

S2S2S2

2

PQ15

9

B2A

ISUMPG

PR142 PIV@3.6 5K/F_6

ISEN1G

B2A

VSUMG-

95836_PHASE2G

B2A

PR156

PC129

( Near by IC side)

B2A

PR160

*2.2/F_6

PC133

*1000P/50V_4X

2

1

2

D1D1D1

G1

S1/D2

G2

S2S2S2

765

8

PR130 45W PIV@10K/F_4

PR88

PIV@1/F_4

95836_UGATE2G

PQ13

45WPIV@HP8S36 TB

9

95836_LGATE2G

ISUMPG

ISEN2G

VSUMG-

PC8

PC4

10U/25V_8X

0.1U/25V_4X

PL2 0 .24UH_7X7

*2.2/F_6

PR146*0_2/S

PR147*0_2/S

*1000P/50V_4X

PR122 10K/ F_4

PR108 45W @10K/F_4

PC30

0.1U/25V_4X

PL4 0.24UH_7X7

PR164*0_2/S

PR165*0_2/S

PR94 1 0K/F_4

PR93 4 5W@10K/F_ 4

PC19

PC138

*PIV@2200P/50V_4X

PL6 PI V@0.24UH_7X7

PR38

*PIV@2.2/F_6

PC38

*PIV@1000P/50V_4X

1

2

D1D1D1

G1

S1/D2

G2

S2S2S2

765

8

PR99 45WPIV@3.65 K/F_6

PR87 4 5WPIV@10K/F _4

PR100 45WPIV@1/F_ 4

B2A

PC216

PC7

10U/25V_8X

*2200P/50V_4X

ISEN2

ISEN3

PC32

PC31

10U/25V_8X

ISEN1

ISEN3

*PIV@0.1U/25V_4X

PC13

PC28

PC33

PIV@10U/25V_8X

*PIV@10U/25V_8X

B2A

+

PC141

PR168*0_2/S

B2A

PR173*0_2/S

45WPIV@10K/ F_4

PC9

B2A

PR151

*45WPIV@2.2/F_6

PC127

*45WPIV@1000P/50V_4X

12

+

100U/25V_105CE _f

PC217

*2200P/50V_4X

PC41

PC46

*PIV@0.1U/10V_4X

PR89

*45WPIV@2200P/50V_4X

PC106

+

PC52

PC42

*PIV@10U/10V_8X

*PIV@330U/2V_7343P_E9c

PIV@560U/2V_7343P_E4.5a_3pin

ISEN2G

B2A

PC22

PC132

PC140

45WPIV@10U/25V_8X

*45WPIV@0.1U/25V_4X

PL5 45WPI V@0.24UH_7X7

PR167*0_2/S

PR171*0_2/S

PC54

PC53

*45WPIV@0.1U/10V_4X

ISEN1G

PR112 45W PIV@10K/F_4

B2A

VIN

B2A

+

PC157

+

PC221

560U/2V_7343P_E4.5a_3pin

*330U/2V_7343P_E9c

VIN

+VCC_CORE

VCORE Load Line :

1.9mV/A

560U/2V_7343P_E4.5a_3pin

Size Document Number Rev

+VCC_CORE+VGFX (ISL95836) 35W

Date: Sheet of

Wednesday, J anuary 16, 201 3

Date: Sheet of

Wednesday, J anuary 16, 201 3

Date: Sheet of

Wednesday, J anuary 16, 201 3

1

VIN

P6

+VCC_AXG TDC : 38A PEAK : 46A OCP : 55A Width : 1840mil

GFX_CORE Load Line :

-3.9mV/A for GT2

VIN

PC137

*45WPIV@10U/25V_8X

+

PC145

*45WPIV@10U/10V_8X

45WPIV@560U/2V_7343P_E4.5a_3pin

+VCC_CORE TDC : 56A PEAK : 94A OCP : 112A Width : 3760mil

VCORE Load Line :

-1.9mV/A

+VCC_CORE

Quanta Computer Inc.

PROJECT :

Chief River

PROJECT :

Chief River

PROJECT :

Chief River

45 50

1

45 50

+VAXG

A1A

5

MAINON{27,37,43,46}

D D

+3V_S5

PC215 0.1U/10V_4X

PR233 0_4

PC213

10U/6.3V_6X

4

PC211

0.1U/10V_4X

+5V_S5

PC210 *0.1U/10V_4X

PU10 G9661-25ADJF12U

4 2 3

8 9

VPP VEN VIN

GND GND

PGOOD

7

3

+3V_S5

1 6

VO

5

NC

ADJ

R1

PR232 *10K_4

PR235

12.7K/F_4

+1.8V

PC214

10U/6.3V_6X

HWPG_1.8V {37}

(Peak 1.242A, AVG 0.869A)

2

1

P7

Vout =0.8(1+R1/R2)

R2

C C

VIN

PR47 1M_4

B B

A A

MAINON{27,37,43,46}

MAINON_ON_G{27}

2

PQ2 PR51

100K_4

LTC044EUBFS8TL_30MA

PR46 1M_4

1 3

MAINON_ON_G

2

PR64 22_8

6

PQ4A

2N7002KDW_115MA

1

5

PR68 22_8

34

PQ4B

2N7002KDW_115MA

PR234 10K/F_4

B2A

6

2

1

PR76 *22_8

PQ38A

*2N7002KDW_115MA

5

+1.8V+SMDDR_VTERM

PR245 *22_8

34

PQ38B

*2N7002KDW_115MA

6

2

1

PR75 22_8

PQ5A

2N7002KDW_115MA

5

+15V+5V+3V +1.5V

PR56 1M_4

34

PQ5B

2N7002KDW_115MA

Quanta Computer Inc.

MAIND{27,41,42}

PC67 2200P/50V_4X

Chief River

PROJECT :

Size Document Number Rev

+1.8V/Discharge

Date: Sheet of

5

4

3

Date: Sheet of

2

PROJECT :

Chief River

46 50Wednesday, January 16, 2013

1

A1A

For XiangYun Layout House Use

5

B2A

Single Phase Operation

D D

DGPU_PWR_EN_RC{48}

C C

B2A

B B

R1 R2 R3 R4

A A

R5 0K 3K C 2700pF

+3V_GPU

8812A-PSI

PR202

*EV@0_4

1 2

PC176 *EV@0.1U/10V_4X

GPU_VID0{20}

5

PR244 *EV@10K_4

1 2

PR200EV@0_4

8812A-RGND

R1

PR210 GV2@20K/F_4

PR239 GL@39K/F_4

GV2 GL 20K 39K 20K 2K 18K

EV@0.01U/25V_4X

EV@1/F_4

GPU_PSI{20}

12

PC220

GL@1800P/50V_4X

8812A-RGND

30K 3K 24K

1800pF

8812A-VREF

PC188

1 2

PR217

PR204

EV@0_4

C

12

*EV@43K/F_4

Fsw setting=300KHz

PR219 EV@499K/F_4

PR203 EV@0_4

PC184

1 2

EV@0.1U/10V_4X

PR240

GL@30K/F_4

PR241

GL@3K/F_4

PC185

EV@2700P/50V_4X

PR242

GL@24K/F_4

PR243

GL@3K/F_4

8812A-RGND

PR218

8812A-VID

PR213

PR211

PR214

PR215

R5

R2

GV2@20K/F_4

R3

GV2@2K/F_4

R4

GV2@18K/F_4

GV2@0_4

8812A-REFADJ

8812A-TON

8812A-EN

8812A-PSI

8812A-VREF

8812A-REFIN

8812A-RGND

3

EV@2N7002K_300MA

1

8812A-RGND

PR223 *EV@82.5K/F_4

PC182

B2B

PR208 *EV@5.1K/F_4 PQ27

2

PU9

9

TON

3

EN

4

PSI

5

VID

8

VREF

6

REFADJ

7

REFIN

*E@0.01U/25V_4X

PR226

PC193

4

0924

18

B2A

EV@RT8812A

SS

11

8812A-SS

12

*EV@0_4

12

PR199

*EV@22P/50V_4N

1 2

EV@82.5/F_4

12

PC177

EV@1U/10V_4X

4

3

B2A

12

+5V_S5

PR212

EV@0_6

PC183

1 2

EV@1U/10V_4X

8812A-PVCC

1

8812A-BOOT1

BOOT1

2

UGATE1 PHASE1 LGATE1

BOOT2 UGATE2 PHASE2 LGATE2

VSNS

RGND

PR221

*EV@0_8

PG

8812A-UGATE1

20

8812A-PHASE1

19

8812A-LGATE1

15

8812A-BOOT2

14

8812A-UGATE2

16 17

8812A-LGATE2

13

8812A-PG

12

8812A-VSNS

10

8812A-RGND

PC191

8812A-RGND

PVCC

GND

21

PC192

EV@22P/50V_4N

12

PC190

*EV@47P/50V_4N

VGA_STBY {20}

PR205

EV@2.2/F_6

PR222

EV@2.2/F_6

PR225 EV@10K_4

1 2

PR224 EV@0_4

12

*EV@47P/50V_4N

1 2

*EV@47P/50V_4N

PC178

EV@0.1U/25V_6X

PC187

EV@0.1U/25V_6X

PC189

B2A

PQ25 EV@HP8S36TB

Rds=2.8mOhm

B2A

CORE-PHASE2

+3V_S5

GPU_PWR_GD {48}

PR198

PR209

EV@11.5K/F_4

PR220 *EV@0_4

PR197

EV@100/F_4

3

1

2

D1D1D1

G1

S1/D2

9

G2

S2S2S2

765

8

EV@100/F_4

CORE-PHASE1

PR206 *EV@2.2/F_6

PC180

*EV@1000P/50V_4X

PR227

PR228

PC222

B2A

*EV@2200P/50V_4X

EV@0_4

PC199

EV@0.1U/25V_6X

PL10

EV@0.22UH_7X7X4

PC200

EV@10U/25V_8X

VGA_VCCSENSE {16}

VGA_VSSSENSE {16}

2

VIN

1

P7

PC76

EV@10U/25V_8X

+VGPU_CORE TDC : 35A PEAK : 50A OCP : 60A Width : 1400mil

+VGPU_CORE

+

PC75

B2A

2

EV@330U/2V_7343P_E6b

PC181

PC173

EV@330U/2V_7343P_E6b

PC186

*EV@1000P/50V_4X

CORE-PHASE2

PR216

*EV@2.2/F_6

8812A-UGATE2

B2A

PQ31 EV@HP8S36TB

Rds=2.8mOhm

CORE-PHASE2

8812A-LGATE2

PL11

EV@0.22UH_7X7X4

B2A

1

2

D1D1D1

G1

S1/D2

9

G2

S2S2S2

765

8

PC194

PC196

EV@22U/6.3V_6X

EV@22U/6.3V_8X

Size Document Number Rev

GPU Core (RT8812A)

Date: Sheet of

12

PC223

*EV@2200P/50V_4X

PC68

PC74

EV@22U/6.3V_8X

Quanta Computer Inc.

PROJECT :

1

VIN

PC175

PC174

EV@10U/25V_8X

EV@0.1U/25V_6X

+VGPU_CORE

PC72

PC195

EV@22U/6.3V_8X

2013_PROJECT

47 50Wednesday, January 16, 2013

PC69

EV@10U/25V_8X

A1A

For XiangYun Layout House Use

1.Level 1 Environment-related Substances Should Never be Used.

2.Recycled Resin and Coated Wire should be procured from Green Partners.

5

VIN

4

+1.05V_GPU

+15V

3

+1.05V

2

1

P9

D D

GPU_PWR_GD{47,48}

PR194 EV@1K_4

PC169

EV@0.1U/16V_4X

+3V_S5

PR195 *EV@10K_4

2

PR193 *EV@100K_4

1 3

PR192 EV@1M_4

PR191 EV@1M_4

PR190 EV@22_8

EV@2N7002KDW_115MA

34

5

PQ22B

PR189 EV@1M_4

6

2

1

PQ22A EV@2N7002KDW_115MA

PC167 EV@2200P/50V_4X

PQ21 EV@AON7406

52

4

3

1

+1.05V_GPU

PC164

*EV@10U/6.3V_6X

(Peak 3.5A ,AVG 2.45A)

PC163

EV@10U/6.3V_6X

B2A

PQ23 EV@LTC044EUBFS8TL_30MA

VIN

C C

+3V_S5

B2B

PR184 NGC6@0_4

GPU_PWR_GD{47,48}

FB_CLAMP{17,20,37}

B B

DGPU_PWR_EN_RC{47}

A A

PD5 GC6@BAT54C-7-F_200MA

DGPU_PWR_EN_R{10}

GFX_MAINON{37}

PR52 PIV@0_4

PR53 OEV@0_4

PR188 *EV@10K_4

PR187 *EV@100K_4

PR49

OEV@100K_4

2

1 3

PQ19 EV@LTC044EUBFS8TL_30MA

PC66 *EV@1U/10V_4X

PR185 EV@1M_4

PR186 EV@1M_4

2

1 3

PQ3 EV@LTC044EUBFS8TL_30MA

+1.5V_GPU

PR183 EV@22_8

PQ18B

EV@2N7002KDW_115MA

34

5

VIN

PR58 EV@1M_4

PR66 EV@1M_4

5

+15V

PR182 EV@1M_4

6

2

1

PQ18A EV@2N7002KDW_115MA

PR207 EV@22_8

34

PQ26B EV@2N7002KDW_115MA

PC161 EV@2200P/50V_4X

+15V+3V_GPU

2

+1.5VSUS

52

4

3

PR201 EV@1M_4

6

1

PQ26A EV@2N7002KDW_115MA

B2A

PQ20 EV@AON7516

1

PC162

EV@10U/6.3V_6X

+1.5V_GPU

(Peak 7.38A ,AVG 5.16A)

+3V_S5

65241

3

PQ29 EV@AO6402A

PC179 EV@10U/6.3V_6X

B2A

(Peak 0.794A ,AVG 0.566A)

+3V_GPU

Quanta Computer Inc.

PROJECT :

For XiangYun Layout House Use

5

4

3

2

Size Document Number Rev

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

Date: Sheet of

Wednesday, January 16, 2013

PROJECT :

+VGACORE

Chief River

48 50

1

A1A

5

AC

4

3

2

1

+5V_S5

AON7410

low switch

+5V

(Peak 6.6A ,AVG 4.6A)

B2A

MAIND enable

P10

S5_ON enable

(Peak 13.16A ,AVG 9.52A)

B2A

D D

System Charger

DC

ISL88732

SYSTEM POWER

RT8223

PWM

OCP:15.8A

+3V_S5

S5_ON enable

(Peak 10.6A ,AVG 7.4A)

B2A

OCP:12A

+SMDDR_VTERM

SUSON enable

TPS51216

C C

PWM

+SMDDR_VREF

SUSON enable

+1.5VSUS

SUSON enable

(Peak 16.7A ,AVG 11.7) OCP:20A

B2A

RT8240

PWM

B B

+VTT

MAINON enable

(Peak 18.75A ,AVG 13,12A) OCP:23A

+1.05V

TPS51462 HWPG_VCCIO enable+VCCSA

PWM

(Peak 6A ,AVG 4.2A) OCP:8.12A

AON7410

low switch

G9661-25AD

LDO

AON6402A

low switch

AO6402A

low switch

AON7516

low switch

AON7406

low switch

(Peak 5.6A ,AVG 3.9A)

B2A

+1.8V

(Peak 1.242A, AVG 0.869A)

+3V_GPU DGPU_PWR_EN_R

(Peak 0.794A ,AVG 0.566A)

(Peak 1.1A ,AVG 0.78A)

+1.5V_GPU

(Peak 7.38A ,AVG 5.16A)

+1.05V_GPU

(Peak 3.5A ,AVG 2.45A)

MAIND enable+3V

MAINON enable

MAIND enable+1.5V

B2A

GPU_PWR_GD

+VCC_CORE

VRON enable

(Peak 94A ,AVG 56A) OCP:112A

ISL95836HRZ-T

PWM

A A

RT8812A

PWM

5

+VAXG

VRON enable

(Peak 46A ,AVG 38A) OCP:55A

+VGPU_CORE

GFX_MAINON

(Peak 50A ,AVG 35A) OCP:60A

4

Quanta Computer Inc.

BU8E

PROJECT :

Size Document Number Rev

POWER TREE TABLE

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

BU8E

1A

49 50Wednesday, January 16, 2013

1

1A

For XiangYun Layout House Use

5

Model

BD5 MB

D D

C C

B B

REV

First Release

A1A

PAGE 3: Change C537,C538 size and stuff R761

B2A

PAGE 5: add PR257 PAGE 6: modify R142,Q19,R145,R141,Q20,R144 value for DDR3 VREF DQ (M3). PAGE 8: modify R735,R715,R395,R369,R397,R720 value to S3 PAGE 9: change GPIO13 to BOARD_ID16,GPIO23 to BOARD_ID17 PAGE 10: add USB port3 for Touch Panel function,add R766,R768,R755,R769,R770,R772,R767,R773,Q55,Q56 for S3,change C704,C708 to 12PF PAGE 11: change R406,R385,R743,R731,R401,R381,R778,R691,R700,R698,R306,R779,R780,R781,R405,R384 for BOARD_ID select PAGE 12: change C420,R295,R784,L14,R288,R785,R416,R796 value and change R786,R420,C470,R787,R421,C469 value for S3 PAGE 16: change R180,R179,Q25,Q24,Q57 value for CLK PEG PAGE 18: change C725,C726,C727 value,and add R788,R789 for EDP PD PAGE 19: add R790 for XTAL,and change R249,R250 value PAGE 20: change R251,R612,R252,R791,R792 value PAGE 21: add R793 for co-lay PAGE 22: change C312,C639 value PAGE 28: change R794,F3,U25,D21 value for HDMI PAGE 29: change R14,R16,R7,MR1,CN15,CN8,F1,R472,R470,R473,R471 value PAGE 30: change R499,R797,Q41,R466 value for AOAC PAGE 31: add D7,D22,D23,D24,D25,D28,D29,D31,D30,D32,D33,D34,D35 for ESD,change C380,C381,CN18,CN17,R316,R395,U12,C384,C398,C699,R315,Q34 value PAGE 33: change CN14 value PAGE 34: add D36,D37,D38,D39,D40,D41,D42,D43 for ESD PAGE 35: change C234,C221,C190,C184,C174,C168 value,and add C730,C728,C729,C731 for EMI,add D44,D45,D46,D47 for ESD PAGE 36: change R413,R394,R389,R390,R391,R392,R393,C448,C441,C440,C442,C443 value PAGE 37: change R80,Q4 value,add R799,R798 for STRAP select PAGE 38: change CN1,CN2,CN5,CN4,R95,Q10 value and change C218 value for EMI,and add L41,L42,C723,C724,CN2021,R777,R776,R775,R774 for Touch PAD Panel function PAGE 39: change LED2 symbol PAGE 20: change R570 value

B2B

PAGE 22: change D4 value PAGE 15: change C65 size to 0402

C3A

PAGE 31: change RN10,RN11,RN12,RN13 pin define PAGE 34: change C490,C501 size to 0402 PAGE 36: change C476 size to 0402

4

CHANGE LIST

3

2

1

MODEL

PAGE FROM To

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

BD5

A A

Quanta Computer Inc.

DOC NO. 204

PROJECT MODEL : BD5 APPROVED BY:

5

4

PART NUMBER:

For XiangYun Layout House Use

DRAWING BY: REVISON:

3

Kent Su Kent Su

DATE:

2

2012/12/14

Size Document Nu mber Rev

Change list

Date: Sheet of

Quanta Computer Inc.

BD5

PROJECT :

1

BD5

50 5 0Wednesday, Janu ary 16, 2013

D2A

QUANTA BD5 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual