QUANTA BD5 Schematics
1
2
3
4
5
6
7
8
BD5 Block Diagram
USB-11
A A
DDRIII-SODIMM1
DDRIII-SODIMM2
SATA - HDD
P14,15
P33
Dual Channel DDR III
Ivy Bridge(UMA+VGA)
35W/45W
rPGA 989
P3, 4, 5, 6
DDR SYSTEM MEMORY
FDI
DMI
PCI-E
PCI-E x8
VGA NVIDIA N14P-GV2
VGA NVIDIA N14M-GL
P16, 17, 18, 19, 20, 21, 22
VRAM DDR3-64M*16
VRAM DDR3-128M*16
EXT_LVDS
EXT_CRT
EXT_HDMI
HDMI Level Shift
P28
LCD/CCD Con.
CRT Con.
HDMI Con.
P29
P29
P28
01
DMI(x4)
SATA 0
B B
C C
SATA - ODD
Touch Panel
Card Reader
Daughter Board
USB 2.0 L1 Con.
USB 2.0 L2 Con.
P38
P36
P31
P33
USB-3
USB-8
USB-2
USB-9
SATA 4
BATTERY
P7
Azalia
SATA
USB2
RTC
IHDA
FDI
PantherPoint
P8, 9, 10, 11, 12, 13
PCH
LPC
DMI
VIDEO
PCI-E
USB3
SPI
LCD
CRT
HDMI
HDMI Level Shift
PCIE-3
PCIE-4
SPI Flash
P9
P28
USB-10
USB-11
WLAN
Giga/10/100 Lan
P30
P35
USB-0
USB-1
LCD/CCD Con.
CRT Con.
HDMI Con.
USB 3.0 R1
Port1
USB 3.0 R2
Port2
P29
P29
P28
P31
P31
LPC
Audio Codec
P34
HP SPK Con.MIC JACK
P34 P34 P34
D D
FAN
K/B Con.
P38 P38P3 P38
For XiangYun Layout House Use
1
2
3
4
EC
HALL Sensor
P29
5
Touch Pad /B
Con.
6
Power /B
Con.
P33
POWER SYSTEM
ISL88732HRTZ-T
RT8223P
TPS51216RUKR
RT8240BZQW
TPS51462RGER (+VCCSA)
ISL95836HRZ-T (+VCC_CORE)
G9661-25ADJF12U
RT8812A
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Block Diagram
Block Diagram
Block Diagram
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
(Charge)
(System 5V/3V)
(DDR 1.5V)
(+VCCIO)
(+1.8V)
(NV_GPU_CORE)
(other GPU)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
8
BD5
BD5
BD5
P40
P41
P42
P43
P44
P45
P46
P47
P48
1A
1A
1 50Wednesday, J anuary 16, 2013
1 50Wednesday, J anuary 16, 2013
1 50Wednesday, J anuary 16, 2013
1A
5
4
3
2
1
02
Table of Contents
D D
C C
B B
PAGE DESCRIPTION
Schematic Block Diagram
1
Front Page
2
Processor
3 - 6
8 - 13
PCH
14 - 15
DDRIII SO-DIMM DDR
16 - 22
N14P-GV2/N14M-GL
23 - 24
VRAM - DDR3
HDMI comm part
28
VGA Connector
29
LCD Panel
CRT & CRT BUS SWITCH
CCD
HALL SENSOR&BACK LIGHT SWITCH
3031MINI Card (Wi-Fi & WIMAX) MNW
USB Connector
USB Sleep Charger SLC
HDD HDD
33
ODD
Audio Codec
34
35
Atheros LAN LAN
36
Card reader MMC
37
KeyBoard
38
TP&FP board TPD,FPD
Power SW PSW
LED LED
39
40
Charger
41
System 5V/3V
42
DDR 1.5V
43
+VCCIO
44
+VCCSA
45
+VCORE+VGFX
+1.8V / Discharge
46
47
GPU_CORE
48
other GPU PWM
BOI-FUNCTIONS
CPU
CLG
VGA
VGA
HDM
VGA
LDS
CRT
CCD
HSR
USB
ODD
ADO
KBCEC
KBC
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
POWER PLANE
+VIN
+3V_RTC
+3V
+3V_S5
+3VPCU
+5V
+5V_S5
+5VPCU
+1.5VSUS
+1.5V
+VCCIO +1.05V MAIN_ON
+VCCSA
+VCORE+VGFX
+3V_GPU +3.3V DGPU_PWR_EN_R S0
+VGPU_CORE DGPU_PWR_EN_RC S0~
+1.5V_GPU +1.5V GPU_PWR_GD S0
VOLTAGE
10V~+19V
+3.0V~+3.3V
+3.3V
+3.3V
+3.3V
+5V
+5V
+1.5V S5_ON
+1.5V
~ HWPG_VCCIO S0
~
CONTROL
SIGNAL
MAIN_ON
S5_ON
MAIN_ON S0
S5_ON S0~S5
AC/DC Insert enable
MAIN_ON
MPWROK
GPU_PWR_GD S0+1.05V_GPU +1.05V
Power States
ACTIVE IN
S0~S5
S0~S5
S0
S0~S5
S0~S5AC/DC Insert enable
S0~S5+5V
S0~S3
S0
S0
S0
GND PLANE PAGE
GND_SIGNAL
8769GND
GND
ADOGND
A A
32
37
ALL
34
For XiangYun Layout House Use
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
POWER STAGE & BOI-FUNCTION
POWER STAGE & BOI-FUNCTION
POWER STAGE & BOI-FUNCTION
Date: Sheet of
Wednesday, January 16, 2013
Date: Sheet of
Wednesday, January 16, 2013
Date: Sheet of
5
4
3
2
Wednesday, January 16, 2013
PROJECT :
Chief River
Chief River
Chief River
2 50
2 50
2 50
1
1A
1A
1A
5
Ivy Bridge Processor (DMI,PEG,FDI) Ivy Bridge Processor (CLK,MISC,JTAG)
DMI_TXN0{ 8}
DMI_TXN1{ 8}
DMI_TXN2{ 8}
DMI_TXN3{ 8}
DMI_TXP0{8}
DMI_TXP1{8}
DMI_TXP2{8}
DMI_TXP3{8}
DMI_RXN0{8}
DMI_RXN1{8}
D D
C C
INT_EDP_HPD{29}
INT_EDP_AUXP{29}
INT_EDP_AUXN{29}
INT_EDP_TXP0{29}
INT_EDP_TXP1{29}
INT_EDP_TXP2{29}
INT_EDP_TXP3{29}
INT_EDP_TXN0{ 29}
INT_EDP_TXN1{ 29}
INT_EDP_TXN2{ 29}
INT_EDP_TXN3{ 29}
FDI Disabling (Discrete Only)
<OEV>
R122 OEV@1K_4
R120 OEV@1K_4
R119 OEV@1K_4
R121 OEV@1K_4
B B
R118 OEV@1K_4
DMI_RXN2{8}
DMI_RXN3{8}
DMI_RXP0{8}
DMI_RXP1{8}
DMI_RXP2{8}
DMI_RXP3{8}
FDI_TXN0{8}
FDI_TXN1{8}
FDI_TXN2{8}
FDI_TXN3{8}
FDI_TXN4{8}
FDI_TXN5{8}
FDI_TXN6{8}
FDI_TXN7{8}
FDI_TXP0{ 8}
FDI_TXP1{ 8}
FDI_TXP2{ 8}
FDI_TXP3{ 8}
FDI_TXP4{ 8}
FDI_TXP5{ 8}
FDI_TXP6{ 8}
FDI_TXP7{ 8}
FDI_FSYNC0{8}
FDI_FSYNC1{8}
FDI_INT{8}
FDI_LSYNC0{8}
FDI_LSYNC1{8}
eDP_COMP
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
B27
B25
A25
B24
B28
B26
A24
B23
G21
E22
F21
D21
G22
D22
F20
C21
A21
H19
E19
F18
B21
C20
D18
E17
A22
G19
E20
G18
B20
C19
D19
F17
J18
J17
H20
J19
H17
A18
A17
B16
C15
D15
C17
F16
C16
G15
C18
E16
D16
F15
U18A
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]
FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
eDP_COMPIO
eDP_ICOMPO
eDP_HPD
eDP_AUX
eDP_AUX#
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
ACA-ZIF-069-K01
+VTT
+VTT
DMI
Intel(R) FDI
eDP
R523 24.9/F_4
R514 24.9/F_4
J22
PEG_ICOMPI
J21
PEG_ICOMPO
H22
PEG_RCOMPO
K33
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_TXN0_C
PEG_TXN1_C
PEG_TXN2_C
PEG_TXN3_C
PEG_TXN4_C
PEG_TXN5_C
PEG_TXN6_C
PEG_TXN7_C
PEG_TXP0_C
PEG_TXP1_C
PEG_TXP2_C
PEG_TXP3_C
PEG_TXP4_C
PEG_TXP5_C
PEG_TXP6_C
PEG_TXP7_C
PCI EXPRESS* - GRAPHICS
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
<CPU> <CPU> <CPU>
eDP_COMP
PEG_COMP
<THC>
+5V VIN +5VPCU
U17
VFAN1
1
1 OUT
2
1 IN-
3
1 IN+
GND42 IN+
*LM358
2 OUT
VCC
2 IN-
2
Q45
1 3
*MMBT2222A_600MA
TH_FAN_POWER1
A A
R497 *100K_4
R498
*100K_4
R496
*162K/F_4
R481
*IV@NTC_470K_4
8
7
6
5
R482
*48.7K/F_4
R483
*EV@NTC_470K_4
PEG_COMP
C605 EV@0.22U/10V_4X
C586 EV@0.22U/10V_4X
C607 EV@0.22U/10V_4X
C588 EV@0.22U/10V_4X
C609 EV@0.22U/10V_4X
C590 EV@0.22U/10V_4X
C611 EV@0.22U/10V_4X
C592 EV@0.22U/10V_4X
C604 EV@0.22U/10V_4X
C585 EV@0.22U/10V_4X
C606 EV@0.22U/10V_4X
C587 EV@0.22U/10V_4X
C608 EV@0.22U/10V_4X
C589 EV@0.22U/10V_4X
C610 EV@0.22U/10V_4X
C591 EV@0.22U/10V_4X
Processor pull-upDP & PEG Compensation
H_PROCHOT#
XDP_TMS
XDP_TDI_R
XDP_TDO_R
XDP_TCLK
XDP_TRST#
R485
*499K/F_4
R484
*499K/F_4
4
<CPU/VGA>
R94 62_4
R491 51_4
R489 51_4
R488 *51_4
R493 51_4
R70 51_4
PEG_RXN[0..7] {16}
PEG_RXP[0..7] {16 }
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
34
Q43B
5
*2N7002KDW_115MA
R486
*IV@1M_4
6
Q43A
2
*2N7002KDW_115MA
1
3
2
1
<CPU>
CLK_CPU_BCLKP {10}
CLK_CPU_BCLKN {10}
CLK_CPU_DPP {10}
CLK_CPU_DPN {10}
CPU_DRAMRST# {27}
5
R69
100K_4
03
H_PROCHOT#
34
Q9B
2N7002KDW_115MA
C71
*47P/50V_4N
U18B
A28
CLK_CPU_BCLKP_R
BCLK
H_SNB_IVB#{9}
C90
*10P/50V_4C
EC_PECI{37}
R93 56_4
R50 *75/F_4
U3
1
2
IN
GND3OUT
*74LVC1G07GW
H_PROCHOT#
PM_SYNC{8}
C85 *E@0.1U/25V_4X
R78 10K_4
C253 *E@0.1U/25V_4X
R72 *43_4
+3V_S5
C69
*0.1U/10V_4X
VCC5NC
4
R75
750/F_4
H_PROCHOT#{45}
PEG_TXN[0..7] {16}
H_PWRGOOD{11}
PM_DRAM_PWRGD_R{27}
+VTT
CPU_PLTRST#
PEG_TXP[0..7] {16}
Level
Shift
+VTT
PLTRST#{10,30,35,36,37,38}
R71 1.5K/F_4
TP54
TP4
R76 E@0_4
CPU_PLTRST#CPU_PLTRST#
CPU_PLTRST#_R
SKTOCC#
TP_CATERR#
H_PROCHOT#_R
PM_THRMTRIP#_R
CPU_PLTRST#_R
C82
*39P/50V_4N
C26
PROC_SELECT#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
C81
*0.1U/10V_4X
ACA-ZIF-069-K01
Thermal Trip & Process HOT
DELAY_VR_PWRGOOD{8,45}
PM_THRMTRIP#_R
2
1 3
MISCTHERMALPWR MANAGEMENT
+VTT
6
Q9A
2N7002KDW_115MA
1
R58 100K_4
R65
1K_4
Q8
2
METR3904-G_200MA
CLOCKS
DDR3
JTAG & BPM
MISC
<CPU>
BCLK#
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PRDY#
PREQ#
TRST#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
S5_ON
PM_THRMTRIP# {11}
A27
CLK_CPU_BCLKN_R
A16
CLK_DPLL_SSCLKP_R
A15
CLK_DPLL_SSCLKN_R
R8
AK1
SM_RCOMP_0
A5
SM_RCOMP_1
A4
SM_RCOMP_2
AP29
XDP_PRDY#_R
AP27
XDP_PREQ#
AR26
XDP_TCLK
TCK
AR27
XDP_TMS
TMS
AP30
XDP_TRST#
AR28
XDP_TDI_R
TDI
AP26
XDP_TDO_R
TDO
AL35
XDP_DBR#_R
DBR#
AT28
XDP_OBS0
AR29
XDP_OBS1
AR30
XDP_OBS2
AT30
XDP_OBS3
AP32
XDP_OBS4
AR31
XDP_OBS5
AT31
XDP_OBS6
AR32
XDP_OBS7
B2A
RP28 0X2
R522 LDS@1K_4
RP9 PIVEDP@0X2
R521 LDS@1K_4
R92 140/F_4
R525 25.5/F_4
R518 200/F_4
TP47
C539 *E@0.1U/25V_4X
R511 *SHORT_4
TP46
TP48
TP50
TP49
TP55
TP52
TP51
TP53
4
3
2
1
2
1
4
3
XDP_DBRST# {8}
Intel Turbo mode only
H_PROCHOT_EC{37}
+VTT
<CPU>
H_PROCHOT_EC
CPU Thermal sensor / MB Local TEMP <THP/UGA/VGA>
S5_ON
R487
*EV@1M_4
B2A
FAN Control-->For one FAN solution <THC>
0.5A
+5V
C538 2.2U/6.3V_4X
B2A
VFAN1{37}
1
4
U16
APE8872M
VIN2VO
/FON
VSET
0.5A
3
TH_FAN_POWER1
5
GND
6
GND
7
GND
GND
C537
8
2.2U/6.3V_4X
B2A
+3V
R502
*10K_4
85205-0300L
CN10
1
2
3
FANSIG1{37}
FANSIG1
+3VPCU
55uA
R108 150_4
HYST=VCC for 10
degree Hys.
HYST=GND for 30
degree Hys.
+3VPCU_HW_SD
C123
0.1U/16V_4Y
U4
5
VCC
4
HYST
G708T1U
Rset(Kohm)=0.0012T*T-0.9308T+96.147
R105 EV@24.9K/F_4
1
R107 IV@24.9K/F_4
SET
2
GND
3
R761 0_4
OT#
R104 *470K_4
S5_ON
S5_ON {20,37,41}
D2 *1SS355_100MA
B2A
+3VPCU
B2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
BD5
PROJECT :
BD5
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Ivy Bridge 1/4
Ivy Bridge 1/4
Ivy Bridge 1/4
Date: Sheet of
Wednesday, January 16, 2013
Date: Sheet of
Wednesday, January 16, 2013
Date: Sheet of
5
4
3
2
Wednesday, January 16, 2013
1
BD5
3 50
3 50
3 50
A1A
A1A
A1A
For XiangYun Layout House Use
5
4
3
2
1
04
Ivy Bridge Processor (DDR3)
D D
U18C
AB6
SA_CLK[0]
M_A_DQ[63:0]{14}
C C
B B
M_A_BS#0{14}
M_A_BS#1{14}
M_A_BS#2{14}
M_A_CAS#{14}
M_A_RAS#{14}
M_A_WE#{14}
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G10
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N10
N8
N7
M10
M9
N9
M7
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
V6
AE8
AD9
AF9
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
ACA-ZIF-069-K01
DDR SYSTEM MEMORY A
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]
RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]
SA_CS#[0]
SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]
SA_ODT[0]
SA_ODT[1]
RSVD_TP[9]
RSVD_TP[10]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_CLKP0 {14}
M_A_CLKN0 {14}
M_A_CKE0 {14}
M_A_CLKP1 {14}
M_A_CLKN1 {14}
M_A_CKE1 {14}
M_A_CS#0 {14}
M_A_CS#1 {14}
M_A_ODT0 {14}
M_A_ODT1 {14}
M_A_DQSN[7:0] {14}
M_A_DQSP[7:0] {14}
M_A_A[15:0] {14}
<CPU>
U18D
M_B_DQ[63:0]{15}
M_B_BS#0{15}
M_B_BS#1{15}
M_B_BS#2{15}
M_B_CAS#{15}
M_B_RAS#{15}
M_B_WE#{15}
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
C9
A7
D10
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K10
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA9
AA7
R6
AA10
AB8
AB9
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
ACA-ZIF-069-K01
DDR SYSTEM MEMORY B
SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]
RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]
SB_CS#[0]
SB_CS#[1]
RSVD_TP[17]
RSVD_TP[18]
SB_ODT[0]
SB_ODT[1]
RSVD_TP[19]
RSVD_TP[20]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AE2
AD2
R9
AE1
AD1
R10
AB2
AA2
T9
AA1
AB1
T10
AD3
AE3
AD6
AE6
AE4
AD4
AD5
AE5
D7
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_CLKP0 {15}
M_B_CLKN0 {15}
M_B_CKE0 {15}
M_B_CLKP1 {15}
M_B_CLKN1 {15}
M_B_CKE1 {15}
M_B_CS#0 {15}
M_B_CS#1 {15}
M_B_ODT0 {15}
M_B_ODT1 {15}
M_B_DQSN[7:0] {15}
M_B_DQSP[7:0] {15}
M_B_A[15:0] {15}
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
Ivy Bridge 2/4
Ivy Bridge 2/4
Ivy Bridge 2/4
Wednesday, January 16, 2013
Wednesday, January 16, 2013
Wednesday, January 16, 2013
1
BD5
BD5
BD5
4 50
4 50
4 50
A1A
A1A
A1A
For XiangYun Layout House Use
5
4
3
2
1
C180
10U/6.3V_6X
+
C169
*330U/2.5V_3528P_E9b
70@0.01_3720
PR257
1 2
05
+VAXG
VCC_AXG_SENSE {4 5}
VSS_AXG_SENSE {45}
+1.5V_CPU
B2A
+VCCSA
B2A
Ivy Bridge Processor (POWER)
POWER
U18F
+VCC_CORE
D D
VCC:94A
C559
10U/6.3V_6X
C161
10U/6.3V_6X
C551
10U/6.3V_6X
C134
10U/6.3V_6X
C146
39P/50V_4N
C557
10U/6.3V_6X
C563
10U/6.3V_6X
C561
10U/6.3V_6X
C549
*10U/6.3V_6X
C122
10U/6.3V_6X
C121
39P/50V_4N
C550
10U/6.3V_6X
C553
C132
10U/6.3V_6X
10U/6.3V_6X
C554
C558
10U/6.3V_6X
10U/6.3V_6X
C C
C158
C552
10U/6.3V_6X
10U/6.3V_6X
B B
C562
10U/6.3V_6X
C555
*10U/6.3V_6X
C556
10U/6.3V_6X
C129
10U/6.3V_6X
C156
10U/6.3V_6X
C159
10U/6.3V_6X
C155
10U/6.3V_6X
C151
10U/6.3V_6X
C560
10U/6.3V_6X
C133
10U/6.3V_6X
C565
10U/6.3V_6X
C131
10U/6.3V_6X
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
CORE SUPPLY
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
PEG AND DDR
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
SENSE LINES SVID
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
<CPU>
+VCCIO40_R
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
VCCIO:8.5A
+
C564
*330U/2.5V_3528P_E9b
C125
10U/6.3V_6X
C112
10U/6.3V_6X
R515 0_4
C135
10U/6.3V_6X
C120
10U/6.3V_6X
+VTT
C566
10U/6.3V_6X
C568
10U/6.3V_6X
+VTT
R507 100_4
R506 100_4
R520 10_4
R519 10_4
C150
10U/6.3V_6X
C181
10U/6.3V_6X
C163
10U/6.3V_6X
C154
10U/6.3V_6X
+VCC_CORE
VCC_SENSE {45 }
VSS_SENSE {45}
+VTT
VCCP_SENSE { 43}
VSSP_SENSE {43}
C569
*10U/6.3V_6X
C567
10U/6.3V_6X
+1.8V
C74
PIV@10U/6.3V_6X
C547
PIV@10U/6.3V_6X
C109
PIV@10U/6.3V_6X
C118
OEV@0_6
VCCPLL:1.2A
C200
*10U/6.3V_6X
+VAXG
C75
PIV@10U/6.3V_6X
C548
PIV@10U/6.3V_6X
C542
PIV@10U/6.3V_6X
C201
1U/6.3V_4X
Ivy Bridge Processor (GRAPHIC POWER)
POWER
U18G
C541
PIV@10U/6.3V_6X
C113
PIV@10U/6.3V_6X
C540
PIV@10U/6.3V_6X
C76
PIV@10U/6.3V_6X
C116
PIV@10U/6.3V_6X
C108
PIV@10U/6.3V_6X
AT24
VAXG1
AT23
VAXG2
AT21
VAXG3
AT20
VAXG4
AT18
VAXG5
AT17
VAXG6
AR24
VAXG7
AR23
VAXG8
AR21
VAXG9
AR20
VAXG10
AR18
VAXG11
AR17
VAXG12
AP24
VAXG13
AP23
VAXG14
AP21
VAXG15
AP20
VAXG16
AP18
VAXG17
AP17
VAXG18
AN24
VAXG19
AN23
VAXG20
AN21
VAXG21
AN20
VAXG22
AN18
VAXG23
AN17
VAXG24
AM24
VAXG25
AM23
VAXG26
AM21
VAXG27
AM20
VAXG28
AM18
VAXG29
AM17
VAXG30
AL24
VAXG31
AL23
VAXG32
AL21
VAXG33
AL20
VAXG34
AL18
VAXG35
AL17
VAXG36
AK24
VAXG37
AK23
VAXG38
AK21
VAXG39
AK20
VAXG40
AK18
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
AJ21
VAXG45
AJ20
VAXG46
AJ18
VAXG47
AJ17
VAXG48
AH24
VAXG49
AH23
VAXG50
AH21
VAXG51
AH20
VAXG52
AH18
VAXG53
AH17
VAXG54
GRAPHICS
SENSE
VREFMISC
DDR3 -1.5V RAILS
VAXG_SENSE
VSSAXG_SENSE
LINES
SM_VREF
SA RAIL
B6
C202
1U/6.3V_4X
+
C615
*330U/2V_7343P_E9c
A6
A2
H_CPU_SVIDCLK
H_CPU_SVIDDAT
H_CPU_SVIDALRT#
VCCPLL1
VCCPLL2
VCCPLL3
ACA-ZIF-069-K01
+VTT
R103
130/F_4
1.8V RAIL
R100 0_4
R102 * SHORT_4
R98 43 _4
VCCSA_SENSE
VCCSA_VID1
+VTT
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
FC_C22
R99
75/F_4
AK35
AK34
AL1
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
M27
M26
L26
J26
J25
J24
H26
H25
H23
C22
C24
VAXG:46A
+VDDR_REF_CPU
C178
10U/6.3V_6X
C104
10U/6.3V_6X
C172
*10U/6.3V_6X
VR_SVID_CLK {45}
VR_SVID_DATA {45}
VR_SVID_ALERT# {45}
<CPU/OEV/PIV>
R504 PIV@100_4
R505 PIV@100_4
+VDDR_REF_CPU
VDDQ:5A
C176
C177
*10U/6.3V_6X
*10U/6.3V_6X
+
C179
C91
10U/6.3V_6X
*330U/2V_7343P_E9c
VCCSA:6A
C171
C570
*10U/6.3V_6X
10U/6.3V_6X
VCCSA_VCCSSENSE { 44}
VCCSA_VID0 {44}
VCCSA_VID1 {44}
+VCCSA +VTT
ACA-ZIF-069-K01
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
BD5
PROJECT :
BD5
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Ivy Bridge 3/4
Ivy Bridge 3/4
Ivy Bridge 3/4
Date: Sheet of
Wednesday, January 16, 2013
Date: Sheet of
Wednesday, January 16, 2013
Date: Sheet of
5
4
3
2
Wednesday, January 16, 2013
1
BD5
5 50
5 50
5 50
A1A
A1A
A1A
For XiangYun Layout House Use
5
4
3
2
1
Ivy Bridge Processor (GND)
U18H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
VSS7
AT16
VSS8
D D
C C
B B
Processor Strapping DDR3 VREF DQ (M3)
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
ACA-ZIF-069-K01
VSS
CPU/VGA
The CFG signals have a default value of '1' if not terminated on the board.
Pin Name
CFG2
(PEG Static Lane Reversal --> 16 Lane)
CFG3
(Reserved)
CFG4
(DP Presence Strap)
CFG5
CFG6
(PCIE Bifurction)
A A
CFG7
(PEG Defer Training)
1=Normal Operation
0=Lane Reversed
1=Disable; No physical DP attached to eDP
0=Enable; An ext DP device is connected to eDP
00=x8,x4,x4 - Device 1 function 1 and 2 enable
01=Reserved - (Device 1 function 1 disable ; function 2 enable)
10=x8,x8 -Device 1 function 1 enable ; function 2 enable
11=(Default) x16 -Device 1 function 1 and 2 disable
1=PEG train immediately following xxRESETB de assertion
0=PEG wait for BIOS training
AJ22
VSS81
AJ19
VSS82
AJ16
VSS83
AJ13
VSS84
AJ10
VSS85
AJ7
VSS86
AJ4
VSS87
AJ3
VSS88
AJ2
VSS89
AJ1
VSS90
AH35
VSS91
AH34
VSS92
AH32
VSS93
AH30
VSS94
AH29
VSS95
AH28
VSS96
AH26
VSS97
AH25
VSS98
AH22
VSS99
AH19
VSS100
AH16
VSS101
AH7
VSS102
AH4
VSS103
AG9
VSS104
AG8
VSS105
AG4
VSS106
AF6
VSS107
AF5
VSS108
AF3
VSS109
AF2
VSS110
AE35
VSS111
AE34
VSS112
AE33
VSS113
AE32
VSS114
AE31
VSS115
AE30
VSS116
AE29
VSS117
AE28
VSS118
AE27
VSS119
AE26
VSS120
AE9
VSS121
AD7
VSS122
AC9
VSS123
AC8
VSS124
AC6
VSS125
AC5
VSS126
AC3
VSS127
AC2
VSS128
AB35
VSS129
AB34
VSS130
AB33
VSS131
AB32
VSS132
AB31
VSS133
AB30
VSS134
AB29
VSS135
AB28
VSS136
AB27
VSS137
AB26
VSS138
Y9
VSS139
Y8
VSS140
Y6
VSS141
Y5
VSS142
Y3
VSS143
Y2
VSS144
W35
VSS145
W34
VSS146
W33
VSS147
W32
VSS148
W31
VSS149
W30
VSS150
W29
VSS151
W28
VSS152
W27
VSS153
W26
VSS154
U9
VSS155
U8
VSS156
U6
VSS157
U5
VSS158
U3
VSS159
U2
VSS160
Configuration
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
U18I
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
ACA-ZIF-069-K01
<CPU>
VSS
CFG2
R64 *EV@1K_4
R54 PIVEDP@1K_4
CFG4
CFG5
CFG6
CFG7
R89 EV@1K_4
R90 *EV@1K_4
R79 *1K_4
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
Ivy Bridge Processor (RESERVED, CFG)
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
TP2
TP3
TP1
SMDDR_VREF_DQ0_M3_R
SMDDR_VREF_DQ1_M3_R
+3V
R524
*10K_4
U18E
AK28
CFG0
CFG1
CFG2
CFG3
CFG4CFG4
CFG5
CFG6
CFG7CFG7
AK29
AL26
AL27
AK26
AL29
AL30
AM31
AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29
AJ31
AH31
AJ33
AH33
AJ26
F25
F24
F23
D24
G25
G24
E23
D23
C30
A31
B30
B29
D30
B31
A30
C29
J20
B18
A19
J15
B4
D1
ACA-ZIF-069-K01
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
VSS_VAL_SENSE
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
VCCIO_SEL
RSVD27
RESERVED
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
VCC_DIE_SENSE
RSVD54
RSVD55
RSVD56
RSVD57
RSVD58
L7
AG7
AE7
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AH27
AN35
CLK_XDP_ITPP
AM35
CLK_XDP_ITPN
AT2
AT1
AR1
B1
KEY
<CPU>
TP56
TP57
06
S3P
R142 NM3@0_4
3
SMDDR_VREF_DQ0_M3_R
DRAMRST_CNTRL{27}
SMDDR_VREF_DQ1_M3_R
B2A
1
R145
*M3@1K_4
DRAMRST_CNTRL
R141 NM3@0_4
1
R144
*M3@1K_4
DRAMRST_CNTRL
Q19
*M3@ME2N7002E_200MA
2
3
Q20
*M3@ME2N7002E_200MA
2
+SMDDR_VREF_DQ0_M3 {14}
+SMDDR_VREF_DQ1_M3 {15}
B2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
Ivy Bridge 4/4
Ivy Bridge 4/4
Ivy Bridge 4/4
Wednesday, January 16, 2013
Wednesday, January 16, 2013
Wednesday, January 16, 2013
1
BD5
BD5
BD5
6 50
6 50
6 50
A1A
A1A
A1A
For XiangYun Layout House Use
07
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
Thames_M2/ GND
Thames_M2/ GND
Thames_M2/ GND
Chief River
Chief River
Chief River
7 50Wednesday, January 16, 2013
7 50Wednesday, January 16, 2013
7 50Wednesday, January 16, 2013
A1A
A1A
A1A
For XiangYun Layout House Use
5
4
3
2
1
08
Panther Point (DMI,FDI,PM)
U26C
DMI_COMP
DMI2RBIAS
SUSACK#_R
XDP_DBRST#_R
EC_PWROK_R
PM_DRAM_PWRGD
RSMRST#
SUS_PWR_ACK_R
AC_PRESENT_R
PM_BATLOW#
PM_RI#
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPW RDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
CougarPoint_R1P0
+3V_S5
+3V_S5
+3V_S5
DSW
+3V_S5
+3V_S5
DMI
FDI
+3V
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
SLP_LAN# / GPIO29
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
+3V_S5
SLP_SUS#
PMSYNCH
FDI_INT
WAKE#
SLP_S4#
SLP_S3#
SLP_A#
DMI_RXN0{3}
DMI_RXN1{3}
DMI_RXN2{3}
SYS_PWROK_R
MPWROK
RSMRST#{37}
DNBSWON#{37}
DMI_RXN3{3}
DMI_RXP0{3}
DMI_RXP1{3}
DMI_RXP2{3}
DMI_RXP3{3}
DMI_TXN0{3}
DMI_TXN1{3}
DMI_TXN2{3}
DMI_TXN3{3}
DMI_TXP0{3}
DMI_TXP1{3}
DMI_TXP2{3}
DMI_TXP3{3}
R656 49.9/F_4
+1.05V
R655 750/F_4
R696 E@0_4
C711 *E@0.1U/25V_4X
C698 *E@0.1U/25V_4X
R399 0_4
C710 *E@0.1U/25V_4X
D D
XDP_DBRST#{3}
C C
C450 *E@0.1U/25V_4X
PM_DRAM_PWRGD{27}
B B
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
DPWROK_R
PCIE_WAKE#
CLKRUN#
SUS_STAT#
SLP_S5#
SLP_A#
SLP_SUS#_R
GPIO29
<CLG>
T4
T6
T5
FDI_TXN0 {3}
FDI_TXN1 {3}
FDI_TXN2 {3}
FDI_TXN3 {3}
FDI_TXN4 {3}
FDI_TXN5 {3}
FDI_TXN6 {3}
FDI_TXN7 {3}
FDI_TXP0 {3}
FDI_TXP1 {3}
FDI_TXP2 {3}
FDI_TXP3 {3}
FDI_TXP4 {3}
FDI_TXP5 {3}
FDI_TXP6 {3}
FDI_TXP7 {3}
FDI_INT {3}
FDI_FSYNC0 {3}
FDI_FSYNC1 {3}
FDI_LSYNC0 {3}
FDI_LSYNC1 {3}
DSWVREN {9}
PCIE_WAKE# {30,35}
CLKRUN# {37}
SUSCLK {37}
SUSC# {37}
SUSB# {37}
PM_SYNC {3}
Panther Point (LVDS,DDI)
U26D
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
DAC_IREF
R328
1K/D_4
J47
M45
P45
T40
K47
T45
P39
AF37
AF36
AE48
AE47
AK39
AK40
AN48
AM47
AK47
AJ48
AN47
AM49
AK49
AJ47
AF40
AF39
AH45
AH47
AF49
AF45
AH43
AH49
AF47
AF43
N48
P49
T49
T39
M40
M47
M49
T43
T42
L_BKLTEN
L_VDD_EN
L_BKLTCTL
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
CougarPoint_R1P0
LVDS
Digital Display Interface
CRT
LVDS_BRIGHT_I{29}
INT_LVDS_DIGON{29}
INT_LVDS_PWM{29}
INT_LVDS_EDIDCLK{29}
INT_LVDS_EDIDDATA{29}
INT_TXLCLKOUT-{29}
INT_TXLCLKOUT+{29}
INT_TXUCLKOUT-{29}
INT_TXUCLKOUT+{29}
INT_CRT_DDCCLK{29}
INT_CRT_DDCDAT{29}
INT_HSYNC{29}
INT_VSYNC{29}
INT_TXLOUT0-{29}
INT_TXLOUT1-{29}
INT_TXLOUT2-{29}
INT_TXLOUT0+{29}
INT_TXLOUT1+{29}
INT_TXLOUT2+{29}
INT_TXUOUT0-{29}
INT_TXUOUT1-{29}
INT_TXUOUT2-{29}
INT_TXUOUT0+{29}
INT_TXUOUT1+{29}
INT_TXUOUT2+{29}
INT_CRT_BLU{29}
INT_CRT_GRN{29}
INT_CRT_RED{29}
R699 PIVLDS@2.2K_4
+3V
R323 PIVLDS@2.2K_4
R305 PIVLDS@2.37K/F_4
R706 PICRT@33_4
R702 PICRT@33_4
T3
TP66
TP67
TP25
TP24
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
INT_CRT_DDCCLK
INT_CRT_DDCDAT
INT_TXLCLKOUTÂINT_TXLCLKOUT+
INT_TXLOUT0ÂINT_TXLOUT1ÂINT_TXLOUT2-
INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+
INT_TXUCLKOUTÂINT_TXUCLKOUT+
INT_TXUOUT0ÂINT_TXUOUT1ÂINT_TXUOUT2-
INT_TXUOUT0+
INT_TXUOUT1+
INT_TXUOUT2+
INT_HSYNC_R
INT_VSYNC_R
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
<CLG/UGA/HMG>
HDMI_DDCCLK {28}
HDMI_DDCDATA {28}
HDMI_CON_HP_PCH {28}
IV_HDMITX2# {28}
IV_HDMITX2 {28}
IV_HDMITX1# {28}
IV_HDMITX1 {28}
IV_HDMITX0# {28}
IV_HDMITX0 {28}
IV_HDMICLK# {28}
IV_HDMICLK {28}
L_DDC_DATA
SDVO_CTRLDATA
1 -- LVDS ENABLE
0 -- LVDS DISABLE
1 -- PORT B Detected
0 -- PORT B Disable
CRT IMPEDANCE MATCHING
R693 PICRT@150/F_4
R690 PICRT@150/F_4
R685 PICRT@150/F_4
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
<CLG>
3
Deep Sx <CLG>
SUSACK#_R
SUS_PWR_ACK_R
AC_PRESENT_R
DPWROK_R
SLP_SUS#_R
Co-Lay
R762 NDS3@10K_4
R427 NS3@10K_4
R426 DS3@10K_4
R417 DS3@0_4
Reserve for DS3
R736 DS3@0_4
R763 *DS3@0_4
Co-Lay
R764 NDS3@0_4
R724 NS3@0_4
R380 DS3@0_4
R376 DS3@0_4
R377 0_4
C713 *E@0.1U/25V_4X
RSMRST#
Rf
B2A
+3V_S5
+3V_S5
+VCCPDSW
2
AC_PRESENT {37}
SUSACK# {37}
SUS_PWR_ACK {37}
SYS_HWPG {37,41}
SLP_SUS# {12,37}
B2A
Net Name
AC_PRESENT
SUS_PWR_ACK
SUSACK#_R
DPWROK
SLP_SUS
Deep Sx SupportVDeep Sx No Support
V NA
V
V NA
V NA
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
Date: Sheet of
Wednesday, January 16, 2013
Date: Sheet of
Wednesday, January 16, 2013
Date: Sheet of
Wednesday, January 16, 2013
NA
V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Panther Point 1/6
Panther Point 1/6
Panther Point 1/6
1
BD5
BD5
BD5
8 50
8 50
8 50
1A
1A
1A
System PWR_OK <CLG>PCH Pull-high/low <CLG>
+3V
CLKRUN#
XDP_DBRST#_R
PM_RI#
PCIE_WAKE#
GPIO29
A A
PM_BATLOW#
SUS_PWR_ACK_R
PM_DRAM_PWRGD
RSMRST#
SYS_PWROK_R
LVDS_BRIGHT_I
R692 8.2K_4
R697 1K_4
R735 10K_4
R715 10K_4
R395 10K_4
R369 8.2K_4
R397 10K_4
R720 S3@200/F_4
R725 10K_4
R422 100K_4
R339 *PIV@100K_4
5
+V3A
+VCCPDSW
B2A
R751 *SHORT_4
+V3A
B2A
C716
*0.1U/10V_4X
SYS_PWROK_R{27}
SYS_PWROK_R
1
U29 *TC7SH08FU(F)
3 5
4
R738
*100K_4
MPWROK
2
4
DELAY_VR_PWRGOOD {3,45}
MPWROK {37,45}
For XiangYun Layout House Use
5
B2A
+3V_RTC
R350
*210/F_4
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TCK
R351
*100/F_4
PCH_SPI_CS0#_R2R
PCH_SPI_CLK_R2R
PCH_SPI_SI_R2R
PCH_SPI_SO_R2R
PCH_SPI_CS1#_R2R
PCH_SPI_CLK_R2R_R
PCH_SPI_SI_R2R_R
PCH_SPI_SO_R2R_R
R432 20K_4
R433 20K_4
C466
1U/6.3V_4X
GPIO21
ACZ_SYNC_R1
R541 33_4
R540 33_4
R538 33_4
R539 33_4
*E@22P/50V_4N
SPI_WP#
*E@22P/50V_4N
SPI_WP1#
B2A
C265
C269
C481
1U/6.3V_4X
B2A
C482
1U/6.3V_4X
R307 10K_4
G2
*SHORT_ PAD
R423
*1M_4
PCH_SPI_CS0#_R2R
PCH_SPI_CLK_R2R
PCH_SPI_SI_R2R
PCH_SPI_SO_R2R
G3
*SHORT_ PAD1
SRTC_RST#
G1
*SHORT_ PAD1
1
Q36
R414 0_4
8M
U11
1
CE#
6
SCK
5
SI
2
SO
3
WP#
W25Q64FVSSIG
2M
U10
1
CE#
6
SCK
5
SI
2
SO
3
WP#
*W25Q16BVSSIG
RTC_RST#
+3V
+5V
R424
*33K/F_4
2
*2N7002K_300MA
VDD
HOLD#
VSS
VDD
HOLD#
VSS
RTC Circuitry <RTC>
R318 8.2K_4
R682 10K_4
R362 33_4
R415 33_4
R363 33_4
R727 33_4
<CLG>
PCH_SPI_CS0#_R2
PCH_SPI_CLK_R2
PCH_SPI_SI_R2
PCH_SPI_SO_R2
+V3A
PCH_SPI_CS1#_R2
PCH_SPI_CLK_R2
PCH_SPI_SI_R2
PCH_SPI_SO_R2
+V3A
D14 *RB500V-40_100MA
D11
BAT54C-7-F_200MA
D12 *RB500V-40_100MA
<CLG>
+3V
*33P/50V_4NC446
ACZ_BITCLK_R
ACZ_SYNC_R1
ACZ_RST#_R
ACZ_SDOUT_R
ACZ_SDIN0_AUDIO
+V3A
R341
*210/F_4
R348
R340
*51_4
*100/F_4
PCH_SPI_CS0#{37}
PCH_SPI_CLK{37}
PCH_SPI_SO{37}
PCH_SPI_SI{37}
R196 33_4
R182 33_4
R178 33_4
R190 33_4
R185 3.3K/F_4
B2A
R195 *0_4
R181 *33_4
R177 *33_4
R191 *33_4
R186 *3.3K/F_4
B2A
+3VPCU
+R_3VRTC_R
D D
+R_3VRTC
R443
1K_4
12
CN13
AAA-BAT-054-K01
PU & Password Clear
SERIRQ
GPIO19
HDA Bus
C C
<CLG>
BIT_CLK_AUDIO{34}
ACZ_SYNC_AUDIO{34}
ACZ_RST#_AUDIO{34}
ACZ_SDOUT_AUDIO{34}
ACZ_SDIN0_AUDIO{34}
PCH JTAG Debug
PCH Dual SPI
EC+BIOS @4M
B B
<CLG>
ME@2M
A A
For XiangYun Layout House Use
5
3
8
7
4
8
7
4
SPI_HOLD#
SPI_HOLD1#
4
C457
*33P/50V_4N
ACZ_SYNC_R
18mA
R189 3.3K/F_4
18mA
R192 *3.3K/F_4
4
0.1U/16V_4Y
B2A
*0.1U/16V_4Y
C715 15P/50V_4C
C714 15P/50V_4C
PCBEEP{34}
+3V_RTC
B2A
23
4 1
Y4
32.768KHZ_10
R378 1M_4
BOARD_ID16{11}
B2A
3
Panther Point (HDA,JTAG,SATA)
R710
RTC_X1
10M_4
RTC_X2
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
ACZ_BITCLK_R
ACZ_SYNC_R
PCBEEP
ACZ_RST#_R
ACZ_SDIN0_AUDIO
ACZ_SDOUT_R
TP71
BOARD_ID16
PCH_JTAG_TCK
PCH_JTAG_TMS
TP70
PCH_JTAG_TDO
PCH_SPI_CLK_R2
PCH_SPI_CS0#_R2
PCH_SPI_CS1#_R2
PCH_SPI_SI_R2
PCH_SPI_SO_R2
U26A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN# / GPIO33
N32
HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
CougarPoint_R1P0
RTCIHDA
JTAG
SPI
+3V
+3V
+3V_S5
+3V
+3V
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
FWH4 / LFRAME#
LDRQ1# / GPIO23
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA LPC
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
LDRQ0#
SERIRQ
2
C38
A38
B37
C37
D36
E36
PCH_DRQ#0
K36
V5
SERIRQ
AM3
AM1
AP7
AP5
AM10
AM8
AP11
HM70 don't support SATA1
AP10
AD7
SATA2RXN
AD5
SATA2RXP
AH5
SATA2TXN
AH4
SATA2TXP
AB8
AB10
AF3
HM70 don't support SATA3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
Y10
SATA_COMPPCH_JTAG_TDI
AB12
AB13
SATA3_COMP
AH1
SATA3_RBIAS
P3
SATA_LED#
V14
GPIO21
P1
GPIO19
<CLG>
TP35
TP22
TP23
TP21
TP20
R319 37.4/F_4
R312 49.9/F_4
R663 750/F_4
R680 10K_4
LAD0 {30,37}
LAD1 {30,37}
LAD2 {30,37}
LAD3 {30,37}
LFRAME# {30,37}
SERIRQ {37}
+3V
SATA_RXN_1ST_HDD# {33}
SATA_RXP_1ST_HDD {33}
SATA_TXN_1ST_HDD# {33}
SATA_TXP_1ST_HDD {33}
SATA_RXN_ODD# {33}
SATA_RXP_ODD {33}
SATA_TXN_ODD# {33}
SATA_TXP_ODD {33}
+1.05V
BOARD_ID17
1
09
BOARD_ID17 {11}
B2A
SATA HDD/SSD
SATA ODD
PCH Strap Table
Pin Name
SPKR
Strap description
No reboot mode setting PWROK
GNT3# / GPIO55 Top-Block Swap Override
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up
GNT1# / GPIO51
GPIO19
B2A
HDA_SDO
DF_TVS
GPIO28
HDA_SYNC
INIT3_3V#
GNT2#/
GPIO53
+V3A
C271
+V3A
GPIO15
C275
L_DDC_DATA
SDVO_CTRLDATA
DDPC_CTRLDATA
DDPD_CTRLDATA
SATA3GP/
GPIO37
SATA2GP/
GPIO36
DSWVRMEN
Boot BIOS Selection 1 [bit-1]
Boot BIOS Selection 0 [bit-0]
Flash Descriptor Security
DMI/FDI Termination voltage
On-die PLL Voltage Regulator
On-Die PLL VR Voltage Select
Reserved
ESI Strap (Server Only)
TLS Confidentiality
LVDS Detected
Port B Detected
Port C Detected
Port D Detected
Reserved
Reserved
Deep S4/S5 Well On -Die
Voltage Regulator Enable
Sampled
Configuration
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode
PWROK
1 = Default (weak pull-up 20K)
PWROK
PWROK
RSMRST
PWROK
RSMRST#
RSMRST
PWROK
PWROK Should not pull low for desktop and mobile
RSMRST
PWROK
PWROK
PWROK
PWROK
PWROK
PWROK
ALWAYS
3
GPIO19
GNT1#
0 = Override
1 = Default (weak pull-up 20K)
0 = Set to Vss
1 = Set to Vcc (weak pull-down 20K)
0 = Disable
1 = Enable (Default)
0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V
Boot Location
11
SPI
LPC
*
00
1 = Default (weak pull-up 20K)
1 = Default. Should not be pulled low
for desktop and mobile
0 = Default. TLS no Confidentiality
1 = TLS Confidentiality
0 = Default. Not Detected
1 = Detected
0 = Default. Not Detected
1 = Detected
0 = Default. Not Detected
1 = Detected
0 = Default. Not Detected
1 = Detected
0 = Default
0 = Default
0 = Disable
1 = Enable
R325 *1K_4
+3V
R352 *1K_4
R723 330K_4
+3V_RTC
R695 *1K_4
R681 *1K_4
R728 *1K_4
+3V_S5
B2A
+V3A
+3V_S5
R660 2.2K_4
R661 1K_4
R338 *10K_4
R337 *1K_4
R418 1K_4
Should not pull low. leave as No Connect
R708 1K_4
+V3A
B2A
1= PU to 3V
1= PU to 3V
0=NC
0=NC
Should not be pulled high when strap is sampled
Should not be pulled high when strap is sampled
R722 330K_4
+3V_RTC
2
ACZ_SDOUT_R
PCBEEP
PCI_GNT3# {10}
PCH_INVRMEN
GNT1# {10}
GPIO19
ACZ_SDOUT_R {37}
+1.8V
DF_TVS {11}
H_SNB_IVB# {3}
PLL_ODVR_EN {11}
ACZ_SYNC_R
GPIO15 {11}
DSWVREN {8}
R721 *330K_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
Panther Point 2/6
Panther Point 2/6
Panther Point 2/6
Wednesday, January 16, 2013
Wednesday, January 16, 2013
Wednesday, January 16, 2013
1
BD5
BD5
BD5
9 50
9 50
9 50
1A
1A
1A
5
4
3
2
1
Panther Point-M (PCI,USB,NVRAM)
U26E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
D D
HM70 don't support USB3-port3/4
USB 3.0(R2)
USB30_RXN2_R{31}
USB30_RXP2_R{31}
USB30_TXN2_R{31}
USB30_TXP2_R{31}
C C
DGPU_HOLD_RST#{16}
GPIO52{11,38}
CLK_PCI_FB
PCLK_DEBUG{30}
PCLK_591{37}
C447
E@4.7P/50V_4C
B B
PLTRST# <CLG,VGA>
PCI_PLTRST#
A A
2
1
R746 0_4
DGPU_PWR_EN{20}
PCI_GNT3#{9}
ODD_MD#{33}
BOARD_ID14{11}
BOARD_ID3{11}
BOARD_ID0{11}
+V3A
GNT1#{9}
R346 22_4
R365 NMP@22_4
R364 22_4
C429
E@4.7P/50V_4C
U28
3 5
*TC7SH08FU(F)
DGPU_PWR_EN
USB 3.0(R1)
USB30_RXN1_R{31}
USB30_RXP1_R{31}
USB30_TXN1_R{31}
USB30_TXP1_R{31}
TP33
TP69
TP29
C717
*0.1U/10V_4X
4
B2A
B2A
PCI_PLTRST#_R
2
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
DGPU_HOLD_RST#
GPIO52
DGPU_PWR_EN
GNT1#
GNT2#
PCI_GNT3#
ODD_MD#
PCI_PME#
PCI_PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLK_PCI_FB_R
PCLK_DEBUG_R
PCLK_591_R
R757
100K_4
+3V
R758
PX@1K_4
DGPU_PWR_EN_R
3
Q54
PX@ME2N7002E_200MA
1
R745 EV@0_4
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
TP25
BC30
TP26
BE32
TP27
BJ32
TP28
BC28
TP29
BE30
TP30
BF32
TP31
BG32
TP32
AV26
TP33
BB26
TP34
AU28
TP35
AY30
TP36
AU26
TP37
AY26
TP38
AV28
TP39
AW30
TP40
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
CougarPoint_R1P0
PLTRST# {3,30,35,36,37,38}
DGPU_PWR_EN_R {48}
RSVD
USB30_RX1N
USB30_RX2N
USB30_RX3N
USB30_RX4N
USB30_RX1P
USB30_RX2P
USB30_RX3P
USB30_RX4P
USB30_TX1N
USB30_TX2N
USB30_TX3N
USB30_TX4N
USB30_TX1P
USB30_TX2P
USB30_TX3P
USB30_TX4P
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
VGA_PLTRST# {16}
PCI
USB
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
PCI/USBOC# Pull-up <CLG>
B2A
SCI#_R
USB_OC1#
USB_OC4#
USB_SC_OC#_R
For XiangYun Layout House Use
5
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
B33
A14
USB_SC_OC#_R
K20
USB_OC1#
B17
GPIO41
C16
GPIO42
L16
USB_OC4#
A16
USB30_SMI#
D14
GPIO10
C14
SCI#_R
+V3A
R748
10
9
8
7 4
10KX8
USB_SC_OC#_R
USB_OC1#
USB_Normal_OC#_L_Q
SCI#_R
NV_ALE
USBP3N
USBP3P
HM70 don't support USB4USB5USB6USB7
HM70 don't support USB12USB13
USB_BIAS
<CLG>
TP18
USB30 Combo Port
USB20#_R1 {31}
USB 2.0(R1)
USB20_R1 {31}
USB20#_R2 {31}
USB 2.0(R2)
USB20_R2 {31}
USB20#_L1 {31}
USB 2.0(L1)
USB20_L1 {31}
USBP3N {38}
USB Touch
USBP3P {38}
B2A
USB_CARD# {36}
USB_CARD {36}
USB20#_L2 {31}
USB20_L2 {31}
USB_WLAN# {30}
USB_WLAN {30}
USB_CCD# {29}
USB_CCD {29}
B2A
1
2
3
56
Co-Lay
Co-Lay
Co-Lay
Co-Lay B2A
4
CARD READER
USB 2.0(L2)
WLAN
CCD
R726 22.6/F_4
USB_Normal_OC#_L_Q
R754 0_4
R752 0_4
USB_Normal_OC#_L_Q
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
GPIO42
USB30_SMI#
GPIO41
GPIO10
Q55A DS3@2N7002KDW_115MA
126
R766 NDS3@0_4
R768 NS3@0_4
Q55B DS3@2N7002KDW_115MA
R755 NDS3@0_4
R769 NS3@0_4
Q56A DS3@2N7002KDW_115MA
126
R770 NDS3@0_4
R772 NS3@0_4
Q56B DS3@2N7002KDW_115MA
R767 NDS3@0_4
R773 NS3@0_4
PCI_PIRQD#
DGPU_PWR_EN
DGPU_HOLD_RST#
ODD_MD#
GNT2#
+V3A
+V3A
5
34
+V3A
+V3A
5
34
USB 2.0(R1)
USB 2.0(R2)
USB 2.0(L1)(L2)
B2A
R709 8.2K_4
R739 8.2K_4
R403 8.2K_4
R402 8.2K_4
R404 10K_4
R703 10K_4
R707 10K_4
R407 *10K_4
EHCI1
EHCI2
USB_SC_OC# {31,37}
USB_Normal_OC#_R {31,37}
USB_Normal_OC#_L {31,37}
SCI# {37}
WLAN
LAN
LAN
WLAN
EHCI1
EHCI2
PCIE_RXN_WLAN#{30}
PCIE_RXP_WLAN{30}
PCIE_TXN_WLAN#{30}
PCIE_TXP_WLAN{30}
PCIE_RXN_LAN#{35}
PCIE_RXP_LAN{35}
PCIE_TXN_LAN#{35}
PCIE_TXP_LAN{35}
CLK_PCIE_LAN#{35}
CLK_PCIE_LAN{35}
PCIE_CLK_LAN_REQ#{35}
CLK_PCIE_WLAN#{30}
CLK_PCIE_WLAN{30}
PCIE_CLK_WLAN_REQ#{30}
+3V
C532 0.1U/10V_4X
C533 0.1U/10V_4X
C379 LAN@0.1U/10V_4X
C378 LAN@0.1U/10V_4X
PCIE_TXN_WLAN#_C
PCIE_TXP_WLAN_C
PCIE_TXN_LAN#_C
PCIE_TXP_LAN_C
HM70 don't support PCIE-5
HM70 don't support PCIE-6
HM70 don't support PCIE-7
HM70 don't support PCIE-8
RP23 LAN@0X2
2
1
3
RP22
1
3
GPIO46{11}
CLK_REQ/Strap Pin
+V3A
+3V
+V3A
+V3A
CLK_BUF_DREFCLKP
CLK_BUF_DREFSSCLKN
CLK_BUF_DREFSSCLKP
CLK_BUF_BCLKN
CLK_BUF_BCLKP
CLK_BUF_PCIE_3GPLLN
CLK_BUF_PCIE_3GPLLP
CLK_PCH_14M
B2A
R705 10K_4
R714 10K_4
R398 10K_4
R368 10K_4
R326 10K_4
R311 10K_4
R694 10K_4
R355 NS3@10K_4
R356 S3@10K_4 R747
R353 10K_4
R354 *10K_4
PCIE_CLK_LAN_REQ#
PCIE_CLK_MINI_REQ#
PCIE_CLK_USB30_REQ#
GPIO44
GPIO45
PCIECLKRQ2#
PCIE_CLK_3G_REQ#
B2A
S3_STRAP
B2A
CLK_PEGA_REQ#
R345 10K_4
R344 10K_4
R302 10K_4
R300 10K_4
R657 10K_4
R658 10K_4
R290 10K_4
R291 10K_4
R334 10K_4
3
CLK_PCIE_LAN#_R
4
CLK_PCIE_LAN_R
PCIE_CLK_LAN_REQ#
CLKOUT_PCIE1N
T7
CLKOUT_PCIE1P
T8
PCIE_CLK_3G_REQ#
PCIECLKRQ2#
2
CLKOUT_PCIE3N
0X2
4
CLKOUT_PCIE3P
PCIE_CLK_MINI_REQ#
PCIE_CLK_USB30_REQ#
GPIO44
S3_STRAP
GPIO45
GPIO46
CLKOUT_ITPXDP_N
T1
CLKOUT_ITPXDP_P CLK_FLEX3
T2
<CLG,VGA>
Panther Point-M (PCI-E,SMBUS,CLK)
U26B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
CougarPoint_R1P0
+3V_S5
PCI-E*
+3V_S5
+3V
+3V
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
CLOCKS
SMBus/Pull-up <CLG>
2ND_MBCLK{37}
2ND_MBDATA{37}
+V3A
B2A
R370 10K_4
R737 10K_4
R396 2.2K_4
R734 2.2K_4
R713 2.2K_4
R373 2.2K_4
R719 1K_4
R718 *10K_4
Q53A *2N7002KDW_115MA
Q53B *2N7002KDW_115MA
2
+3V_S5
SMBALERT# / GPIO11
+3V_S5
SML0ALERT# / GPIO60
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
+3V_S5
+3V_S5
SML0DATA
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
+3V
CLKOUTFLEX0 / GPIO64
+3V
CLKOUTFLEX1 / GPIO65
+3V
CLKOUTFLEX2 / GPIO66
+3V
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
+V3A
B2A
R756
2.2K_4
2
1
6
3 4
+V3A
5
SMBALERT#
SML1ALERT#_RCLK_BUF_DREFCLKN
SCLK
SDATA
SMB_ME0_CLK
SMB_ME0_DAT
DRAMRST_CNTRL_PCH
SMB_ME1_CLK
B2A
2.2K_4
SMB_ME1_DAT
SMBCLK
SMBDATA
SML0CLK
CL_CLK1
CL_DATA1
CL_RST1#
<CLG,U3B,MNW>
E12
SMBALERT#
H14
SCLK
C9
SDATA
A12
DRAMRST_CNTRL_PCH
C8
SMB_ME0_CLK
G12
SMB_ME0_DAT
C13
SML1ALERT#_R
E14
SMB_ME1_CLK
M16
SMB_ME1_DAT
M7
T11
P10
M10
CLK_PEGA_REQ#
AB37
CLK_PCIE_VGAN_R
AB38
CLK_PCIE_VGAP_R
AV22
AU22
AM12
CLK_CPU_DPN_R
AM13
CLK_CPU_DPP_R
BF18
CLK_BUF_PCIE_3GPLLN
BE18
CLK_BUF_PCIE_3GPLLP
BJ30
CLK_BUF_BCLKN
BG30
CLK_BUF_BCLKP
G24
CLK_BUF_DREFCLKN
E24
CLK_BUF_DREFCLKP
AK7
CLK_BUF_DREFSSCLKN
AK5
CLK_BUF_DREFSSCLKP
K45
CLK_PCH_14M
H45
CLK_PCI_FB
V47
XTAL25_IN
V49
XTAL25_OUT
Y47
XCLK_RCOMP
R667 90.9/F_4
K43
CLK_FLEX0
CLK_FLEX1
CLK_FLEX2
TP27
TP34
TP32
TP68
F47
H47
K49
SCLK {14,30}
SDATA {14,30}
DRAMRST_CNTRL_PCH {27}
DDR / PCIE Mini Card/LAN
PCH Temp
R303 EV@0X2
R294 PIVEDP@0X2
CLK_PEGA_REQ# {16}
2
1
4
3
2
1
4
3
R677
1M_4
+1.05V
33MHz
27MHz 48/24MHz 14.318MHz 25MHz
CLK_PCIE_VGAN {16}
CLK_PCIE_VGAP {16}
CLK_CPU_BCLKN {3}
CLK_CPU_BCLKP {3}
CLK_CPU_DPN {3}
CLK_CPU_DPP {3}
23
Y3
25MHZ_30
4 1
CLK_FLEX0
CLK_FLEX1
CLK_FLEX2
CLK_FLEX3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
Panther Point 3/6
Panther Point 3/6
Panther Point 3/6
Wednesday, January 16, 2013
Wednesday, January 16, 2013
Wednesday, January 16, 2013
1
C704 12P/50V_4C
C708 12P/50V_4C
BD5
BD5
BD5
10
B2A
B2A
10 50
10 50
10 50
1A
1A
1A
5
4
3
2
1
ID15 ID16 ID17
H
L
BOARD_ID3 {10}BOARD_ID0 {10}
ID9 ID10Description
L
BD5
BD5
BD5
11
H
L
H
L
H
L
B2A
11 50
11 50
11 50
1A
1A
1A
BOARD ID SETTING
ID1 ID2
ID0 ID3
Board ID
H
HM70
L
HM76
UMA SKU
VGA SKU
VRAM-1000MHz
GPIO52 {10,38}
GPIO52
H
LW KB Backlight
VRAM-900MHz
Standard
ULV
17"
14"
GV2
GL
W/ 4K2K
W/O 4K2K
W/ HDMI
W/O HDMI
W/ CRT
W/O CRT
Only VGA
Optimus
WIN7
WIN8
HM75_76
NM70
EDP
LVDS
Celeron
I3/I5/I7
45W
35W
B2A
+VCCPDSW
B2A
2
+V3A
+3V
D D
U26F
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID2
GPIO8
Box_Vendor
GPIO15{9}
ODD_PRSNT#{33}
DGPU_PWROK{16,22,37}
GPIO27{37}
PLL_ODVR_EN{9}
C C
TEMP_ALERT#{37}
B B
A A
GPIO15
ODD_PRSNT#
BOARD_ID10
GPIO24
GPIO27
PLL_ODVR_EN
BOARD_ID9
BOARD_ID7
GPIO36
GPIO37
BOARD_ID1
BOARD_ID8
BOARD_ID15
TEMP_ALERT#
ID_Detect
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
+3V_S5
GPIO8
C4
LAN_PHY_PWR_CTRL / GPIO12
G2
+3V_S5
GPIO15
U2
SATA4GP / GPIO16
D40
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24 / MEM_LED
E16
GPIO27
P8
GPIO28
K1
STP_PCI# / GPIO34
K4
+3V
GPIO35
V8
SATA2GP / GPIO36
M5
SATA3GP / GPIO37
N2
SLOAD / GPIO38
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
V3
SATA5GP / GPIO49
D6
+3V_S5
GPIO57
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
CougarPoint_R1P0
DSW
+3V_S5
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V_S5
+3V
+3V
+3V
+3V
+3V
+3V
+3V
Harman-Kardon
+3V
+3V
+3V
+3V
+3V_S5
GPIO
NCTF
+3V
R749
10K_4
BOARD_ID11
ONKYO
Non-brand
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
A20GATE
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
CPU/MISC
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
Box Vendor
PECI
NC_1
GPIO12
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
L
L
H
H
For XiangYun Layout House Use
Panther Point (GPIO,VSS_NCTF,RSVD)
5
4
PCH_ODD_EN
BOARD_ID13
BOARD_ID11
BOARD_ID12
RCIN#
PCH_THRMTRIP#
BOARD_ID11 {34}
Board_ID11
GPIO70
<CLG>
TP19
TP26
C3A
L
H
L
H
R293 390_4
B2A B2A
C3A
C383 *E@0.1U/25V_4X
+V3A+V3A
R358
Metal_IMR@10K_4
ID_Detect Box_Vendor
R357
TEXTURE@10K_4
R712
10K_4
R711
*10K_4
ID_Detect Speaker
H
Metal/IMR
L TEXTURE
3
PCH_ODD_EN {33}
GATEA20 {37}
RCIN# {37}
H_PWRGOOD {3}
PM_THRMTRIP# {3}
DF_TVS {9}
DSW
GPIO27
R375 10K_4
GPIO46{10}
R716 *10K_4
R360 10K_4
GPIO8
GPIO24
R371 10K_4R372 *10K_4
R717 10K_4
R361 *10K_4
GPIO Pull-up/Pull-down <CLG>
GPIO57
Box_Vendor {34}
Box
Boxless
PCH_ODD_EN
ODD_PRSNT#
TEMP_ALERT#
RCIN#
GATEA20
GPIO36
GPIO37
+3V
W/O KB Backlight
Touch Pad
3.3V
(IDTP)
5V(NMTP)
R733
10K_4
GPIO52
R740 10K_4
R679 10K_4
R670 10K_4
R333 10K_4
R332 10K_4
R310 10K_4
R347 10K_4
KB Backlight
Metal(Y)
IMR(X)
X
H
L
+3V +3V
R406
70@10K_4
BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3
R385
76@10K_4
+3V +3V
R317
10K_4
BOARD_ID4 BOARD_ID5
+3V
R700
U3_2@10K_4
BOARD_ID9
R698
U2_2@10K_4
B2A
+3V +3V
R306
EDP@10K_4
R779
LDS@10K_4
+3V +3V +3V
R741
OEV@10K_4
BOARD_ID12
R729
PX@10K_4
<CLG>
ID6
ID4 ID8
H
L
H
L
H
L
B2A
+3V
R743
GV2@10K_4
R731
GL@10K_4
B2A
+3V
R322
S&C@10K_4
BOARD_ID10
R321
NS&C@10K_4
C3A
+V3A
R780
BOARD_ID15 BOARD_ID16 BOARD_ID17
70@10K_4
R781
76@10K_4
R742
W7@10K_4
BOARD_ID13
R730
W8@10K_4
ID7
ID5
H
L
H
L
R686
IV@10K_4
R683
EV@10K_4R374 *10K_4
R401
*10K_4
BOARD_ID6
R381
10K_4
B2A
BOARD_ID16 {9} BOARD_ID17 {9}
R405
76@10K_4
R384
NM70@10K_4
ID12
H
L
H
L
H
L
+3V
R383
1000M@10K_4
R382
900M@10K_4
+3V
+3V
R704
R778
HM@10K_4
CRT@10K_4
BOARD_ID7
BOARD_ID8
R691
R701
NCRT@10K_4
NHM@10K_4
USB3.0*2 H
USB3.0*1&USB2.0*1
S&C
Non S&C
R782
45W@10K_4
R783
35W@10K_4
BOARD_ID14 {10}
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
Panther Point 4/6
Panther Point 4/6
Panther Point 4/6
Date: Sheet of
Wednesday, January 16, 2013
Date: Sheet of
Wednesday, January 16, 2013
Date: Sheet of
Wednesday, January 16, 2013
1
ID13 ID14
H
L
H
L
+3V
R744
10K_4
R732
*10K_4
B2A
B2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
5
4
3
2
1
+1.05V +1.05V_PCH_VCC
R662 0_6
R308 0_1206
D D
+1.05V +1.05V_VCCAPLL_EXP
+1.05V
C C
B B
R301 0_6
R285 0_8
R281 0_1206
+1.05V
+1.05V_PCH_VCCDPLL_EXP+1.05V
+1.05V_VCCIO
R653 *0_4
R286 0_6
C400
1U/6.3V_4X
C688
*10U/6.3V_6X
C393
1U/6.3V_4X
C385
1U/6.3V_4X
R649 0_8
VccCORE =1.73A
C405
C396
1U/6.3V_4X
1U/6.3V_4X
VccIO =3.799 A
C390
C387
1U/6.3V_4X
1U/6.3V_4X
C389
10U/6.3V_6X
+3V_VCC_EXP+3V
VccVRM =0.147 A
+VCCAFDI_VRM
+1.1V_VCC_DMI
+
C369
*220U/2.5V_3528P_E35b
C692
0.1U/10V_4X
+VCCAFDI_VRM
+1.05V_VCCAPLL_FDI
+1.05V_VCCDPLL_FDI
C700
10U/6.3V_6X
AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31
AN19
BJ22
AN16
AN17
AN21
AN26
AN27
AP21
AP23
AP24
AP26
AT24
AN33
AN34
BH29
AP16
BG6
AP17
AU20
Internal PLL and VRMs Display PLL A/B Analog Power
L35 PIV@10uh_ 8_100MA
+1.5V
A A
+VCCAFDI_VRM
R309 0_6
C404
*10U/6.3V_6X
D13 DS3@RB500V-40_100MA
5
+VCCPDSW+3VPCU
+1.05V
L34 OEV@0_8
Clock power on core wellDeep Sx power well
+3V
B2A
U26G
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]
VCCIO[28]
VCCAPLLEXP
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCC3_3[3]
VCCVRM[2]
VccAFDIPLL
VCCIO[27]
VCCDMI[2]
CougarPoint_R1P0
R366 *0_6
R379 1/F_4
POWER
CRTLVDS
VCC CORE
DMI
VCCIO
DFT / SPI HVCMOS
FDI
L17 10uh _8_100MA
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
+
C695
*PIV@220U/2.5V_3528P_E35b
+
C682
*PIV@220U/2.5V_3528P_E35b
4
Panther POINT (POWER) Panther Point-M (POWER)
<CLG> <CLG>
VccADAC =63mA
U48
U47
VccALVDS=1mA
AK36
AK37
VccTX_LVDS=40mA
AM37
AM38
C377
AP36
PIVLDS@0.01U/25V_4X
AP37
VCCSPI
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
+VCCAFDI_VRM
C427
1U/6.3V_4X
C418
0.1U/10V_4X
R304 0_8
C399
0.1U/10V_4X
C705
1U/6.3V_4X
R343 0_6
C428
*10U/6.3V_6X
R678 0_6
C436
0.01U/25V_4X
C388
PIVLDS@0.01U/25V_4X
+VCCAFDI_VRM
+VCCA_DAC_1_2
C435
0.1U/10V_4X
+VCCALVDS +3V
+VCC_TX_LVDS
+3V+3V_VCC_GIO
L16 FCM1608 KF-102T01_100MA
C420
C433
22U/6.3V_8X
*10U/6.3V_8X
R296 PIVLDS@0_4
R295 OEV@0_4
R784 PIVEDP@0_4
L14 PIVLDS@0.1uh_8 _250MA
R288 OEV@0_4
R785 PIVEDP@0_4
C376
*PIVLDS@10U/6.3V_8X
VCCDMI = 47mA
R284 0_4
C375
1U/6.3V_4X
VCCCLKDMI = 75mA
+VCC_DMI_CCI
L15 *10uh _8_100MA
+1.8V+VCCP_NAND
VccDFTERM = 2 mA
+V3A+3V_VCCME_SPI
VCCSPI = 10mA
B2A
R349 *1/F_4
R342 0_4
B2A
Co-Lay
B2A
Co-Lay
B2A
+VTT+1.1V_VCC_DMI
+1.05V+1.1V_VCC_DMI_CCI
2mA
VCCRTC<1mA VCCSUSHDA= 10mA
3
C439
10U/6.3V_6X
C697
1U/6.3V_4X
C694
1U/6.3V_4X
+3V_SUS_CLKF33
C415
1U/6.3V_4X
+1.05V_VCCA_A_DPL
R659
0_6
+1.05V_VCCA_B_DPL
+3V
R313 *0_4
+1.05V
+VCCPDSW
AD49
75mA
75mA
C690
*0.1U/10V_4X
C467
*0.1U/10V_4X
C416
*0.1U/10V_4X
+VCCDPLL_CPY
C392
*1U/6.3V_4X
+
C401
*220U/2.5V_3528P_E35b
+VCCRTCEXT
+VCCAFDI_VRM
+1.05V_VCCA_A_DPL
+1.05V_VCCA_B_DPL
+VCCDIFFCLK
+VCCDIFFCLKN
+V1.05V_SSCVCC
+VCCSST
+V1.05M_VCCSUS
+VTT_VCCPCPU
+VCCACLK
+VCCPDSW
+PCH_VCCDSW
+3V_SUS_CLKF33
+VCCSUS1
C469
*DS3@0.33U/6.3V_4X
T16
V12
T38
BH23
AL29
AL24
AA19
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
AC29
AC31
AD29
AD31
W21
W23
W24
W26
W29
W31
W33
N16
Y49
BD47
BF47
AF17
AF33
AF34
AG34
AG33
V16
T17
V19
BJ8
A22
R416 NDS3@0_4
+3V_S5
R796 NS3@0_4
B2A
+1.8V
+1.05V
+1.05V
B2A B2A
+VCCAPLL_CPY_PCH
L32 *10uh _8_100MAL33 *1uh_ 6_25MA
+1.05V_VCCEPW
R314 0_1206
+1.05V
+1.05V
+VTT
+3V_RTC
+3V_S5 +5V_S5+V3A +V5A
C470
*DS3@0.33U/6.3V_4X
C408
1U/6.3V_4X
C402
10U/6.3V_8X
R292 0_6
C382
1U/6.3V_4X
R668 0_6
C702
1U/6.3V_4X
R299 0_6
C386
1U/6.3V_4X
R327 *0_6
C417
*1U/6.3V_4X
R654 0_4
C687
4.7U/6.3V_6X
C437
1U/6.3V_4X
Co-Lay Co-Lay
B2A B2A
R786 NS3@0_6
R420 NDS3@0_6
R434
DS3@100K_4
SLP_SUS#{8 ,37}
VCCDSW3_3= 1mA
C414
0.1U/10V_4X
R298 0_4
+1.05V
C689
*10U/6.3V_6X
VccASW =0.803 A
C403
1U/6.3V_4X
C409
10U/6.3V_8X
VCCDIFFCLKN= 50mA
VCCSSC= 95mA
C691
0.1U/10V_4X
C438
0.1U/10V_4X
1
Q38 DS3@ME13 03_3A
2
R429
DS3@0_4
6
2
1
C406
1U/6.3V_4X
C423 0.1U/10V_4 X
+VCCAFDI_VRM
C411 0.1U/10V_4 X
3
Q40A
DS3@2N7002KDW_115MA
U26J
VCCACLK
VCCDSW3_3
DCPSUSBYP
VCC3_3[5]
VCCAPLLDMI2
VCCIO[14]
DCPSUS[3]
VCCASW[1]
VCCASW[2]
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
VCCASW[16]
VCCASW[17]
VCCASW[18]
VCCASW[19]
VCCASW[20]
DCPRTC
VCCVRM[4]
VCCADPLLA
VCCADPLLB
VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]
VCCSSC
DCPSST
DCPSUS[1]
DCPSUS[2]
V_PROC_IO
VCCRTC
CougarPoint_R1P0
R787 NS3@0_6
R421 NDS3@0_6
R431
DS3@100K_4
2
POWER
Clock and Miscellaneous
CPURTC
1
Q37 DS3@ME13 03_3A
5
VCCSUS3_3[10]
VCCSUS3_3[1]
PCI/GPIO/LPCMISC
VCCAPLLSATA
SATA USB
HDA
3
2
R430
DS3@0_4
34
Q39B
DS3@2N7002KDW_115MA
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[6]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
V5REF
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
+V1.1LAN_VCCAPLL
AF11
+VCCAFDI_VRM
AC16
+VCC_SATA
AC17
AD17
T21
V21
T19
P32
+V3.3A_1.5A_HDA_IO
+3V_VCCPUSB
+3V_VCCAUBG
+VCCAUPLL
+5V_PCH_VCC5REFSUS
+VCCA_USBSUS
+3V_VCCPSUS
+5V_PCH_VCC5REF
+3V_VCCPSUS
+3V_VCCPCORE
+3V
C434
0.1U/10V_4X
+V1.05S_SATA3
C407
1U/6.3V_4X
+1.05V_VCCEPW
C452
*1U/6.3V_4X
R297 0_8
C413
1U/6.3V_4X
C410
0.1U/10V_4X
C425
0.1U/10V_4X
C412
*1U/6.3V_4X
C460
0.1U/10V_4X
C391
*1U/6.3V_4X
C421
1U/6.3V_4X
C424
1U/6.3V_4X
C419
0.1U/10V_4X
C397
0.1U/10V_4X
C394
1U/6.3V_4X
L36 *10uh _8_100MA
C701
*10U/6.3V_6X
R320 0_6
R388 0_6
R387 0_6
R331 0_6
R419 10/F_4
D10 RB500V-4 0_100MA
V5REF= 1mA
R408 10/F_4
D9 RB500V-4 0_100MA
R386 0_6
VCCSUS3_3 = 65mA
Vcc3_3 =0.178 A
R324 0_6
Vcc3_3 =0.178 A
R664 0_8
+1.05V
+1.05V
+1.05V+1.05V_VCCUSBCORE
+V3A
12
VCCSUS3_3 = 65mA
+1.05V
VCC5REFSUS=1mA
+V5A
+V3A
+5V
+3V
+V3A
+3V
+3V
+1.05V
VccVRM =0.147 A
R400 0_4
C422
0.1U/10V_4X
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Wednesday, January 16, 2013
Date: Sheet of
Wednesday, January 16, 2013
Date: Sheet of
Wednesday, January 16, 2013
+V3A
B2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
BD5
PROJECT :
BD5
PROJECT :
Panther Point 5/6
Panther Point 5/6
Panther Point 5/6
1
BD5
12 50
12 50
12 50
1A
1A
1A
For XiangYun Layout House Use
5
4
3
2
1
13
U26I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
CougarPoint_R1P0
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
<CLG>
D D
C C
B B
Panther Point-M (GND)
U26H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
CougarPoint_R1P0
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
Panther Point 6/6
Panther Point 6/6
Panther Point 6/6
Wednesday, January 16, 2013
Wednesday, January 16, 2013
Wednesday, January 16, 2013
1
BD5
BD5
BD5
13 50
13 50
13 50
1A
1A
1A
For XiangYun Layout House Use
1
2
3
4
5
6
7
8
<DDR>
H=8 (Rev)
M_A_A[15:0]{4}
A A
M_A_BS#0{4}
M_A_BS#1{4}
M_A_BS#2{4}
M_A_CS#0{4}
M_A_CS#1{4}
M_A_CLKP0{4}
M_A_CLKN0{4}
M_A_CLKP1{4}
M_A_CLKN1{4}
M_A_CKE0{4}
M_A_CKE1{4}
M_A_CAS#{4}
M_A_RAS#{4}
M_A_WE#{4}
R468 10K_4
CGCLK_SMB{15,30,38}
CGDAT_SMB{15,30,38}
M_A_ODT0{4}
M_A_ODT1{4}
B B
M_A_DQSP[7:0]{4}
M_A_DQSN[7:0]{4}
R467 10K_4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
CGCLK_SMB
CGDAT_SMB
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
JDIM2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDRRK-20401-TP8D
5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
(204P)
PC2100 DDR3 SDRAM SO-DIMM
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_A_DQ4
7
M_A_DQ5
15
M_A_DQ3
17
M_A_DQ7
4
M_A_DQ0
6
M_A_DQ1
16
M_A_DQ6
18
M_A_DQ2
21
M_A_DQ9
23
M_A_DQ13
33
M_A_DQ15
35
M_A_DQ8
22
M_A_DQ12
24
M_A_DQ10
34
M_A_DQ11
36
M_A_DQ14
39
M_A_DQ17
41
M_A_DQ20
51
M_A_DQ19
53
M_A_DQ22
40
M_A_DQ16
42
M_A_DQ21
50
M_A_DQ23
52
M_A_DQ18
57
M_A_DQ31
59
M_A_DQ30
67
M_A_DQ25
69
M_A_DQ27
56
M_A_DQ28
58
M_A_DQ26
68
M_A_DQ24
70
M_A_DQ29
129
M_A_DQ36
131
M_A_DQ37
141
M_A_DQ35
143
M_A_DQ34
130
M_A_DQ32
132
M_A_DQ33
140
M_A_DQ39
142
M_A_DQ38
147
M_A_DQ45
149
M_A_DQ44
157
M_A_DQ47
159
M_A_DQ46
146
M_A_DQ40
148
M_A_DQ41
158
M_A_DQ42
160
M_A_DQ43
163
M_A_DQ48
165
M_A_DQ53
175
M_A_DQ55
177
M_A_DQ54
164
M_A_DQ52
166
M_A_DQ49
174
M_A_DQ51
176
M_A_DQ50
181
M_A_DQ57
183
M_A_DQ60
191
M_A_DQ59
193
M_A_DQ62
180
M_A_DQ61
182
M_A_DQ56
192
M_A_DQ63
194
M_A_DQ58
M_A_DQ[63:0] {4}
+1.5VSUS
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
R480 *10K_4
+3V
DDR3_DRAMRST#{15,27}
+SMDDR_VREF_DQ0_M3{6}
+SMDDR_VREF_DQ0_M1
C203 *E@0.1U/25V_4X
R166 0_4
R165 0_4
+3V
PM_EXTTS#0
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDRRK-20401-TP8D
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
PC2100 DDR3 SDRAM SO-DIMM
203
VTT1
204
VTT2
GND
GND
206
205
+SMDDR_VTERM
14
C C
DDR Power Decoupling DDR3 VREF CA
+1.5VSUS
C110 *4.7U/6.3V_6X
C103 4.7U/6.3V_6X
C137 4.7U/6.3V_6X
C160 *4.7U/6.3V_6X
C115 *4.7U/6.3V_6X
C100 *4.7U/6.3V_6X
C102 0.1U/10V_4X
C149 0.1U/10V_4X
C126 0.1U/10V_4X
C128 0.1U/10V_4X
D D
1
<DDR> <DDR>
+SMDDR_VREF_DQ0
C241 0.1U/10V_4X
C236 *2.2U/6.3V_6X
+SMDDR_VREF_DIMM
C96 0.1U/10V_4X
C88 *2.2U/6.3V_6X
+3V
C66 *2.2U/6.3V_6X
C63 0.1U/10V_4X
2
+SMDDR_VTERM
C61 1U/6.3V_4X
C59 1U/6.3V_4X
C60 1U/6.3V_4X
C62 1U/6.3V_4X
3
DDR3 VREF DQ (M1)
C83 0.1U/10V_4X
R73 *1K/F_4
+1.5VSUS
R164
1K/F_4
R172
1K/F_4
+SMDDR_VREF_DQ0_M1
C254
0.1U/10V_4X
4
+SMDDR_VREF_DIMM
R67 0_4
R91 *1K/F_4
<DDR>
C255
*0.047U/10V_4X
+SMDDR_VREF
+1.5VSUS
+1.5VSUS
+
C164
*220U/2.5V_3528P_E35b
+SMDDR_VREF_DIMM {15}
5
SMBUS ISOLATE
SDATA{10,30}
SCLK{10,30}
+3V
2
1
6
Q6A 2N7002KDW_115MA
+3V
5
3 4
Q6B 2N7002KDW_115MA
6
R63
4.7K_4
CGDAT_SMB
R43
4.7K_4
CGCLK_SMB
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
Date: Sheet of
Date: Sheet of
7
Date: Sheet of
PROJECT :
DDR3 DIMM-0
DDR3 DIMM-0
DDR3 DIMM-0
Wednesday, January 16, 2013
Wednesday, January 16, 2013
Wednesday, January 16, 2013
8
BD5
BD5
BD5
14 50
14 50
14 50
1A
1A
1A
For XiangYun Layout House Use
1
2
3
4
5
6
7
8
15
<DDR>
A A
M_B_A[15:0]{4}
M_B_BS#0{4}
M_B_BS#1{4}
M_B_BS#2{4}
M_B_CS#0{4}
M_B_CS#1{4}
M_B_CLKP0{4}
M_B_CLKN0{4}
M_B_CLKP1{4}
M_B_CLKN1{4}
M_B_CKE0{4}
M_B_CKE1{4}
M_B_CAS#{4}
M_B_RAS#{4}
M_B_WE#{4}
+3V
B B
CGCLK_SMB{14,30,38}
CGDAT_SMB{14,30,38}
M_B_ODT0{4}
M_B_ODT1{4}
M_B_DQSP[7:0]{4}
M_B_DQSN[7:0]{4}
R19 10K_4
R22 10K_4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
JDIM1A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
DDRRK-20401-TP4B
H=4 (Rev)
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
(204P)
163
PC2100 DDR3 SDRAM SO-DIMM
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
M_B_DQ4
M_B_DQ1
M_B_DQ2
M_B_DQ6
M_B_DQ5
M_B_DQ0
M_B_DQ3
M_B_DQ7
M_B_DQ13
M_B_DQ8
M_B_DQ14
M_B_DQ15
M_B_DQ12
M_B_DQ9
M_B_DQ11
M_B_DQ10
M_B_DQ21
M_B_DQ22
M_B_DQ19
M_B_DQ17
M_B_DQ20
M_B_DQ16
M_B_DQ18
M_B_DQ23
M_B_DQ25
M_B_DQ29
M_B_DQ30
M_B_DQ27
M_B_DQ28
M_B_DQ24
M_B_DQ26
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ47
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ42
M_B_DQ52
M_B_DQ53
M_B_DQ50
M_B_DQ51
M_B_DQ49
M_B_DQ48
M_B_DQ55
M_B_DQ54
M_B_DQ61
M_B_DQ60
M_B_DQ63
M_B_DQ59
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ62
M_B_DQ[63:0] {4}
DDR3_DRAMRST#{14,27}
+SMDDR_VREF_DQ1_M3{6}
+SMDDR_VREF_DIMM{14}
+3V
C199 *E@0.1U/25V_4X
+SMDDR_VREF_DQ1_M1
R23 *10K_4
R149 0_4
R156 0_4
+1.5VSUS
+3V
PM_EXTTS#1
+SMDDR_VREF_DQ1
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDRRK-20401-TP4B
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
PC2100 DDR3 SDRAM SO-DIMM
203
VTT1
VTT2
GND
205
+SMDDR_VTERM
204
GND
206
C C
<DDR> DDR Power Decoupling
+1.5VSUS
C99 4.7U/6.3V_6X
C114 *4.7U/6.3V_6X
C127 *4.7U/6.3V_6X
C106 4.7U/6.3V_6X
C136 4.7U/6.3V_6X
C153 4.7U/6.3V_6X
C107 0.1U/10V_4X
D D
1
C117 0.1U/10V_4X
C124 0.1U/10V_4X
C152 0.1U/10V_4X
+SMDDR_VREF_DIMM
C87 0.1U/10V_4X
C86 *2.2U/6.3V_6X
+SMDDR_VREF_DQ1
+3V
C65 2.2U/6.3V_4X
C64 *0.1U/10V_4X
2
+SMDDR_VTERM
C56 1U/6.3V_4XC240 0.1U/10V_4X
C54 1U/6.3V_4XC244 *2.2U/6.3V_6X
C53 1U/6.3V_4X C242
C55 1U/6.3V_4X
C3A
3
+1.5VSUS
R158
1K/F_4
+SMDDR_VREF_DQ1_M1
R157
1K/F_4
4
C243
*0.047U/10V_4X
<DDR>DDR3 VREF DQ (M1)
+1.5VSUS
+
C98
0.1U/10V_4X
*220U/2.5V_3528P_E35b
5
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
Date: Sheet of
Date: Sheet of
6
7
Date: Sheet of
PROJECT :
DDR3 DIMM-1
DDR3 DIMM-1
DDR3 DIMM-1
Wednesday, January 16, 2013
Wednesday, January 16, 2013
Wednesday, January 16, 2013
8
BD5
BD5
BD5
15 50
15 50
15 50
1A
1A
1A
For XiangYun Layout House Use
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