Quanta BD3G DABD3GMB6E0, Satellite A300D Schematic

5

BD3G BLOCK DIAGRAM

DDRII-SODIMM1

D D

DDRII-SODIMM2

CRT TV HDMI

C C

LVDS

MXM Module

PG 21

SATA - ODD

B B

Device IDSEL# REQ#/GNT# Interrupt

OZ129 AD17 REQ0# / GNT0# INTE#

E - SATA

NAND FLASH CARD

PCI ROUTING TABLE

PG 8,9

S-VIDEO

SATA - HDD1

SATA - HDD2

HDMI

PG 19

LVDS

PG 20

PG 18

CRT

PG 18

PG 27

PG ??

DDR II 667 MHZ

LVDS(2ch)

PCI-E X16

SATA0

SATA1

SATA4

SATA2

IDE /133

PCI Bus 33MHz

HT_LINK

HDMI

RX780/RS780M/RS780MC

A_LINK (X4)

4

AMD S1g2

Griffin Processor

(638 S1g2 socket)

21mm X 21mm, 528pin BGA

PG 4,5,6,7

PG 10,11,12,13

SB700

21mm X 21mm, 528pin BGA

4.5W(Ext)

4.3W(Int)

PG 14,15,16,17,18

LPC

CPU_CLK

NBGFX_CLK

NBGPP_CLK

SBLINK_CLK

PCI-E, 1X (port2)

PCI-E, 1X (port0)

USB2.0 (P3)

PCI-E, 1X (port1)

PCI-E, 1X (port3)

USB2.0 (P6)

SBSRC_CLK

USB2.0 (P2)

USB2.0 (P4)

USB2.0 (P5)

USB2.0 (P8)

Azalia

3

CLOCK GENERATOR

ICS9LPRS476AKLFT

SLG8SP628VTR

RTM880N-795

8040T(10/100)/8055(Giga)

RJ45

Mini Card (WLAN)

MINI CARD (HD Video Decoder)

NEW CARD

CCD

Fingerprint

Felica

Bluetooth

PG 28

PG 19

PG 28

Azalia Audio Codec

PORT-A

PG 3

PG 24PG 24

PG 25

CX20561

HOST 200MHz

PCIE 100MHz

USB 48MHz

REF 14MHz

USB2.0 (P0)

USB2.0 (P1)

USB2.0 (P7)

PORT-B

2

CPU VDDNB_CORE

+1.35V_VDDHTTX

+SMDDR_VTERM

USB2.0 I/O Ports X1

(MB)

USB2.0 I/O Ports X1

(DB)

USB2.0 I/O Ports X1

(DB)

PG 22

Speaker Amplifier G1441R51U

PG 22

CPU_CORE1 CPU_CORE2

+NB_CORE

+2.5V

+1.5V

+1.2V

+1.1V_NB

+1.2V_S5

+1.8VSUS +1.8V

+3VPCU +3V_S5 +3VSUS +3V +5VPCU +5V

PG 28

MDC CONN

PG 23

CPU CORE

NB CORE

(1.0~1.2V)

+2.5V

+1.5V

+1.2V

+1.8VSUS SMDDR VTERM

3V/5V

FM Radio

PCB STACK UP

PG 34

LAYER 1 : TOP LAYER 2 : GND

PG 35

LAYER 3 : IN1 LAYER 4 : IN2 LAYER 5 : VCC LAYER 6 : BOT

Daughter Board

PG 37

MMB Board

USB Board

PG 36

Touch Pad board

Touch Pad board (with Fingerprinter)

PG 33

PG 23

1

O2Micro OZ129T

A A

PG 26

EC

WPCE775

PG 29

H.P/ SPDIF

PG 23

MIC JACK

PG 23

INT. MIC

PG 23

INT. S.P.

PG 22

MDC Board

RJ11

SPI

PROJECT : BD3G

Quanta Computer Inc.

1 42Thursday, May 29, 2008

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1

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2A

IEEE1394 CN.

5

Card Reader

PG 26 PG 26

VR

PG 23

FAN

PG 6

4

Keyboard

PG 30

Flash ROM

Touch Pad

PG 29 PG 28

CIR

PG 28

Kill SW

PG 30

3

Size Document Number Rev

BLOCK DIAGRAM

Date: Sheet

2

Date: Sheet

5

4

3

2

1

BD3G Power On Sequence

From AC,Battery VIN

D D

From PWM

From Power Button

From EC

+5VPCU +3VPCU

SYS_HWPG(PCU)

NBSWON#

S5_ON

+5V_S5

+3V_S5

From EC

From SB

From SB to EC

From EC

+1.2V_S5

RSMRST#

DNBSWON#

PCIE_WAKE#

SUSB#,SUSC#

SUSON

>10ms

>100ms

SUSON

+3VSUS +1.8VSUS SMDDR_VREF SMDDR_VTERM

From PWM

C C

From EC

HWPG_1.8V (SUS)

MAINON

+5V +3V +2.5V +1.8V +1.5V +NB_CORE +1.1V_NB +1.35V_VDDHTTX

From PWM

From EC

HWPG_1.5V,HWPG_2.5V,GFXPG(MAIN) HWPG_1.2_NB

VRON

CPU_CORE0, CPU_CORE1, CPU VDDNB_CORE, +1.2V

From PWM

VRM_PWRGD (CPU)

HWPG

From EC

From SB

B B

From SB

ECPWROK

SB_PWRGD

NB_PWRGD

CPU_PWRGD

PLTRST# PCIRST#

CPU_LDT_RST#

CPU_LDT_STOP#

0ns~30ns

99ms~108ms

Items Function BTO Name Description

CIR

1

HDMI port

2

HDMI transmitter

3

HDMI-CEC

4

Discrete VGA

5

UMA

6

New Card

7

RJ11

8

RJ45-10/100

9

RJ45-1000

10

Option for RJ45-10/100 and RJ45-1000

11

TV

12

Cardbus

13

FM transmitter

14

Mainstream ID LED

15

Low cost ID LED

16

CCD

17

INT MIC

18

AMD Hyper Flash

19

North bridge(690MC/RS780MC)

20

North bridge(RX780)

21

PowerXpress

22

PowerXpress with UMA SKU

23

PowerXpress with Discrete VGA SKU

24

Power player/Power Shift

25

BOM naming rule

v

CIR@

HDM@

SI@

Silicon image SiI 1392/1932

CEC@

Renesas R8C/1B

EV@

External VGA stuff

IV@

Internal VGA stuff

NEW@

MD@

Modem

40@

Marvell 8040T(10/100)

55@

Marvell 8055(Giga)

40@55@

Option for 8040/8055

TV@

CB@

FM@

MID@

LID@

CCD@

I_MIC@

HF@

Only for AMD platform

MC@

Only for AMD platform

RX@

Only for AMD platform

PX@

Only for AMD platform

PX@IV@

Only for AMD platform

PX@EV@

PP@

Only for AMD platform

*Note: EC will sampling SUSB# & SUSC# every 5ms.

AMD SB700 SMBUS Table

SB700 SDATA0/SCLK0(+3V)

A A

SB700 SDATA1/SCLK1(+3V_S5)

SB700 SDATA2/SCLK2(+3V_S5)

Power

Reserve MOS ckt

5

CLK GEN RAM Mini Card (HD-Decoder) Mini-card(WL) New Card HDMI

V

VVVV

V

+3V +3V +3V (Atheros) +3V +3V_S5

+3V

VVVVV V

4

EC775 SDATA1/SCLK1(+3VPCU)

EC775 SDATA2/SCLK2(+3VPCU)

EC775 SDATA3/SCLK3(+3VPCU)

EC775 SDATA4/SCLK4(+3VPCU)

Power

Reserve MOS ckt

3

Battery CPU thermal Sensor EC EEPROM VGA thermal Sensor Touch Sensor HDMI CEC

V

+3VPCU +3V +3VPCU +3V +3VPCU +5VPCU

XX XVVV

EC SMBUS Table

VV

2

VVV

PROJECT : BD3G

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet

Quanta Computer Inc.

SYSTEM INFORMATION

1

2A

2 42Thursday, May 29, 2008

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5

4

3

2

1

CLK_GEN_SLG8SP628

+3V +3V_CLK_VDD +1.2V +1.2V_CLK_VDDIO

L22

BK1608HS600

D D

L21

BK1608HS600

10/25 modify it

C C

R498

*10K_4

CLKREQ4#

R300

*10K_4

CLKREQ2#

B:(10/25) Add WLAN & LAN CLKREQ circuit (BOI request)

B B

+3V

Q39Q39

*RHU002N06 *RHU002N06

2

+3V

*RHU002N06 *RHU002N06

2

3

Q30Q30

3

CLKREQ_LAN# 24

CLKREQ_WLAN# 25

1

12/8 change from 20p to 33p

+3V_CLK_VDD

R148 8.2K_4 R148 8.2K_4 R146 8.2K_4 R146 8.2K_4

NEW_CLKREQ# CLK_PD#

New Card CLKREQ#

RX780 RS780CLOCKS name

NBGFX_CLKP NBGFX_CLKN

MXM_REFCLKP MXM_REFCLKN

A A

NBGPP_CLKP NBGPP_CLKN

SBLINK_CLKP SBLINK_CLKN

RP1001 STUFF

RP66 STUFF to M82-S external reference clock -RX780 only

RP1001 STUFF

RP66 NC

RP1005 STUFF RP1005 NC

RP1003 STUFF RP1003 STUFF

5

to NB for VGA reference clock

to NB for RX780 for PCIEX2 interface reference clock only RS780 is internal share with AC-LINK clock,RS780 not need

to NB for AC-LINK reference clock

C242

10u/10V_8

+3V_CLK_48

C220

0.1u/10V_4

NEW_CLKREQ# 25

Clock pin function

C236

C233

0.1u/10V_4

+3V_CLK_VDD+3V

+1.2V_CLK_VDDIO

7,8,14,25 PCLK_SMB

PDAT_SMB 7,8,14,25

NEW_CLKREQ#

C225 33p/50V_4 C225 33p/50V_4

1 2

C223 33p/50V_4 C223 33p/50V_4

1 2

T25 T25

T33 T33

C219

0.1u/10V_4

CG_XIN CG_XOUT

CLK_PD#

CLKREQ2#

CLKREQ4#

21

Y1Y1

14.318MHZ 14.318MHZ

C232

C535

C218

0.1u/10V_4

C218

0.1u/10V_4

ICS9LPRS480 P/N : ALPRS480000

CG_XIN

CG_XOUT

4

SLG8SP628

RTM880N-796

U2

4

VDDDOT

16

VDDSRC

26

VDDATIG

35

VDDSB_SRC

40

VDDSATA

48

VDDCPU

55

VDDHTT

56

VDDREF

63

VDD48

11

VDDSRC_IO0

17

VDDSRC_IO1

25

VDDATIG_IO

34

VDDSB_SRC_IO

47

VDDCPU_IO

1

GND48

7

GNDDOT

10

GNDSRC0

18

GNDSRC1

24

GNDATIG

33

GNDSB_SRC

43

GNDSATA

46

GNDCPU

52

GNDHTT

60

GNDREF

61

X1

62

X2

2

SMBCLK

3

SMBDAT

51

PD#

23

CLKREQ0#

45

CLKREQ1#

44

CLKREQ2#

39

CLKREQ3#

38

CLKREQ4#

SLG8SP628

P/N : AL8SP628000

P/N : AL000880000

QFN64

TGND065TGND166TGND267TGND368TGND469TGND570TGND671TGND772TGND873TGND9

+3V_CLK_VDD

C231

C235

0.1u/10V_4

CPUCLKP_R

50

CPUK8_0T CPUK8_0C

ATIG0T ATIG0C ATIG1T ATIG1C

SB_SRC0T SB_SRC0C SB_SRC1T SB_SRC1C

SRC0T SRC0C SRC1T SRC1C SRC2T SRC2C SRC3T SRC3C SRC4T SRC4C

SRC6T/SATAT

SRC6C/SATAC SRC7T/27M_SS SRC7C/27M_NS

HTT0T/66M

HTT0C/66M

48MHz_0

REF0/SEL_HTT66

REF1/SEL_SATA

REF2/SEL_27

74

10/17 Add 10p for EMI issue (Suggestion by Seligo)

R442R442

8.2K_4 8.2K_4

R136R136

R445R445

*8.2K_4 *8.2K_4

8.2K_4 8.2K_4

CPUCLKN_R

49

NBGFX_CLKP_R NBGFX_CLKP

30

NBGFX_CLKN_R

29

MXM_REFCLKP _R

28

MXM_REFCLKN_R

27

SBLINK_CLKP_R

37

SBLINK_CLKN_R

36

SBSRC_CLKP_R

32

SBSRC_CLKN_R

31

NBGPP_CLKP_R

22

NBGPP_CLKN_R

21

CLK_PCIE_NEW_R

20

CLK_PCIE_NEW#_R

19

CLK_PCIE_MINI_R

15

CLK_PCIE_MINI#_R

14

CLK_PCIE_MINI2_R

13

CLK_PCIE_MINI2#_R

12

CLK_PCIE_LAN_R

9

CLK_PCIE_LAN#_R

8

42 41 6 5

54 53

64

59 58 57

SEL_SATA SEL_HTT66 SEL_27

R443R443

8.2K_4 8.2K_4

T27 T27 T32 T32 T21 T21 T22 T22

NBHT_REFCLKP_R NBHT_REFCLKP NBHT_REFCLKN_R

CLK_48M_USB_R

SEL_HTT66 SEL_SATA

C201C201 *10p/50V_4 *10p/50V_4

3

Clock chip has internal serial terminations for differencial pairs, external resistors are reserved for debug purpose.

Place within 0.5" of CLKGEN

RP16 0X2RP16 0X2

1 3

RP15 0X2RP15 0X2

1 3

RP14 EV@0X2 RP14 EV@0X2

1 3

RP18 0X2RP18 0X2

1 3

RP17 0X2RP17 0X2

1 3

RP12 *0X2RP12 *0X2

1 3

RP11 NEW@0X2 RP11 NEW@0X2

1 3

RP2 0X2RP2 0X2

1 3

RP1 0X2RP1 0X2

1 3

RP3 0X2RP3 0X2

1 3

RP13 0X2RP13 0X2

1 3

R446 33_4R446 33_4

Ra

R141 158/F_4 R141 158/F_4 R138 90.9/F_4 R138 90.9/F_4

Rb

C541C541 *10p/50V_4 *10p/50V_4

RES CHIP 130 1/16W +-1%(0402)L-F -->CS11302FB15 RES CHIP 158 1/16W +-1%(0402) -->CS11582FB00 RES CHIP 90.9 1/16W +-1%(0402) -->CS09092FB15 RES CHIP 82.5 1/16W +-1%(0402) -->CS08252FB11

SEL_HTT66

SEL_SATA

SEL_27

L23

BK1608HS600

R147

*261/F_4

2 4

2 4 2 4

2 4 2 4 2 4 2 4 2 4

2 4

*261/F_4

NBGFX_CLKN MXM_REFCLKP MXM_REFCLKN

SBLINK_CLKP SBLINK_CLKN SBSRC_CLKP SBSRC_CLKN

CLK_PCIE_NEW CLK_PCIE_NEW# CLK_PCIE_WLAN CLK_PCIE_WLAN# CLK_PCIE_MINICARD CLK_PCIE_MINICARD# CLK_PCIE_LAN CLK_PCIE_LAN#

NBHT_REFCLKN

CLK_48M_USB

EXT_NB_OSCSEL_27

RS780RX780

1.1V

1.8V

82.5RRa

158R

90.9R

130RRb

66 MHz 3.3V single ended HTT clock

1

100 MHz differential HTT clock

* 0

100 MHz non-spreading differential SRC clock

1 *

100 MHz spreading differential SRC clock

0

27MHz and 27M SS outputs

1

0*

100 MHz SRC clock

* default

C221

10u/10V_8

NBGPP_CLKP NBGPP_CLKN

C230

C234

0.1u/10V_4

CPUCLKP CPUCLKN

MXM_REFCLKP 21 MXM_REFCLKN 21

SBLINK_CLKP 11 SBLINK_CLKN 11 SBSRC_CLKP 13 SBSRC_CLKN 13

CLK_PCIE_NEW 25 CLK_PCIE_NEW# 25 CLK_PCIE_WLAN 25 CLK_PCIE_WLAN# 25 CLK_PCIE_MINICARD 25 CLK_PCIE_MINICARD# 25 CLK_PCIE_LAN 24 CLK_PCIE_LAN# 24

NBHT_REFCLKP 11 NBHT_REFCLKN 11

CLK_48M_USB 14

EXT_NB_OSC 11

2

C216

C222

0.1u/10V_4

CPUCLKP 4 CPUCLKN 4

NBGFX_CLKP 11 NBGFX_CLKN 11

To NB

To SB

NBGPP_CLKP 11 NBGPP_CLKN 11

To New Card

To Mini PCIE Slot

To LAN Controller

To NB

To SB

To NB

C217

0.1u/10V_4

To CPU

RS780/RX780 for VGA

To NB

11/4 check RX781 , RX781 not use

RX780 only

To NB

NB CLOCK INPUT TABLE

NB CLOCKS

HT_REFCLKP

HT_REFCLKN

REFCLK_P

REFCLK_N

GFX_REFCLK

GPP_REFCLK

GPPSB_REFCLK

Size Document Number Rev

Date: Sheet

RX780 RS780

100M DIFF

14M SE (1.8V)

NC vref

100M DIFF

CLOCK GENERATOR_SLG8SP628

100M DIFF(IN/OUT)*

NC or 100M DIFF OUTPUT

PROJECT : BD3G

Quanta Computer Inc.

1

100M DIFF

14M SE (1.1V)

100M DIFF

03

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1A

5

+1.2V +1.2V_VLDT

R469 0_8 R469 0_8

R467 0_8 R467 0_8

D D

HT_NB_CPU_CAD_H[15..0] 9

9 HT_NB_CPU_CAD_L[15..0]

9 HT_NB_CPU_CLK_H[1..0]

9 HT_NB_CPU_CLK_L[1..0]

9 HT_NB_CPU_CTL_H[1..0]

HT_NB_CPU_CTL_L[1..0] 9

9 HT_CPU_NB_CAD_H[15..0]

9 HT_CPU_NB_CAD_L[15..0]

9 HT_CPU_NB_CLK_H[1..0]

9 HT_CPU_NB_CLK_L[1..0]

9 HT_CPU_NB_CTL_H[1..0]

HT_CPU_NB_CTL_L[1..0] 9

C C

+3V

CPU_LDT_REQ#_CPU

C795C795

*100p/50V_4 *100p/50V_4

B B

+1.8VSUS

CPU_PROCHOT_L#

+1.2V_VLDT

C583 4.7U/6.3V_6 C583 4.7U/6.3V_6 C582 4.7U/6.3V_6 C582 4.7U/6.3V_6 C581 0.22u/6.3V_4 C581 0.22u/6.3V_4 C580 180p/50V_4 C580 180p/50V_4

HT_NB_CPU_CAD_H[15..0]

HT_NB_CPU_CAD_L[15..0]

HT_NB_CPU_CLK_H[1..0]

HT_NB_CPU_CLK_L[1..0]

HT_NB_CPU_CTL_H[1..0]

HT_NB_CPU_CTL_L[1..0]

HT_CPU_NB_CAD_H[15..0]

HT_CPU_NB_CAD_L[15..0]

HT_CPU_NB_CLK_H[1..0]

HT_CPU_NB_CLK_L[1..0]

HT_CPU_NB_CTL_H[1..0]

HT_CPU_NB_CTL_L[1..0]

CNTR_VREF

R126 20K/F_4 R126 20K/F_4

C172 0.1u/10V_4 C172 0.1u/10V_4

R132 34.8K/F_4 R132 34.8K/F_4

2

Q19 *BSS138_NL/SOT23 Q19 *BSS138_NL/SOT23

3

1

R122 0_6 R122 0_6

*100p/50V_4 *100p/50V_4

CNTR_VREF

C796C796

2/4 reserve C795,C796 change R122 to 0 0603

R447 10K/F_4 R447 10K/F_4

CPU_MEMHOT_L#

R456 10K/F_4 R456 10K/F_4

R458 300_4 R458 300_4

1/31 leakage issue ,add R687, no stuff R686

2

Q35

Q35 MMBT3904

MMBT3904

13

2

Q36

1 3

MMBT3904

R687 0_4 R687 0_4

HT_NB_CPU_CAD_H0 HT_NB_CPU_CAD_L0 HT_NB_CPU_CAD_H1 HT_NB_CPU_CAD_L1 HT_NB_CPU_CAD_H2 HT_NB_CPU_CAD_L2 HT_NB_CPU_CAD_H3 HT_NB_CPU_CAD_L3 HT_NB_CPU_CAD_H4 HT_NB_CPU_CAD_L4 HT_NB_CPU_CAD_H5 HT_NB_CPU_CAD_L5 HT_NB_CPU_CAD_H6 HT_NB_CPU_CAD_L6 HT_NB_CPU_CAD_H7 HT_NB_CPU_CAD_L7 HT_NB_CPU_CAD_H8 HT_NB_CPU_CAD_L8 HT_NB_CPU_CAD_H9 HT_NB_CPU_CAD_L9 HT_NB_CPU_CAD_H10 HT_NB_CPU_CAD_L10 HT_NB_CPU_CAD_H11 HT_NB_CPU_CAD_L11 HT_NB_CPU_CAD_H12 HT_NB_CPU_CAD_L12 HT_NB_CPU_CAD_H13 HT_NB_CPU_CAD_L13 HT_NB_CPU_CAD_H14 HT_NB_CPU_CAD_L14 HT_NB_CPU_CAD_H15 HT_NB_CPU_CAD_L15

HT_NB_CPU_CLK_H0 HT_NB_CPU_CLK_L0 HT_NB_CPU_CLK_H1 HT_NB_CPU_CLK_L1

HT_NB_CPU_CTL_H0 HT_NB_CPU_CTL_L0 HT_NB_CPU_CTL_H1 HT_NB_CPU_CTL_L1

CPU_LDT_REQ# 11

CPU_MEMHOT#

+3V

*10K_4

CPU_PROCHOT_SB# 13

+2.5V

CNTR_VREF

R686

CPU_PROCHOT# 29

+1.2V_VLDT +1.2V_VLDT +1.2V_VLDT +1.2V_VLDT

CPU_MEMHOT# 8,14

BLM21PG221SN1D(220,100M,2A)_8

L19

LS0805-100M-N

C166

10u/6.3V_8

U12A

D1

VLDT_A0

D2

VLDT_A1

D3

VLDT_A2

D4

VLDT_A3

E3

L0_CADIN_H0

E2

L0_CADIN_L0

E1

L0_CADIN_H1

F1

L0_CADIN_L1

G3

L0_CADIN_H2

G2

L0_CADIN_L2

G1

L0_CADIN_H3

H1

L0_CADIN_L3

J1

L0_CADIN_H4

K1

L0_CADIN_L4

L3

L0_CADIN_H5

L2

L0_CADIN_L5

L1

L0_CADIN_H6

M1

L0_CADIN_L6

N3

L0_CADIN_H7

N2

L0_CADIN_L7

E5

L0_CADIN_H8

F5

L0_CADIN_L8

F3

L0_CADIN_H9

F4

L0_CADIN_L9

G5

L0_CADIN_H10

H5

L0_CADIN_L10

H3

L0_CADIN_H11

H4

L0_CADIN_L11

K3

L0_CADIN_H12

K4

L0_CADIN_L12

L5

L0_CADIN_H13

M5

L0_CADIN_L13

M3

L0_CADIN_H14

M4

L0_CADIN_L14

N5

L0_CADIN_H15

P5

L0_CADIN_L15

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

SOCKET_638_PIN

R131

R131 0_4

0_4

CPU_LDT_RST#

12

G3G3 *SHORT_ PAD1 *SHORT_ PAD1

for debug only

+1.8VSUS

CPU FAN

SYSFANON# 21

A A

THER_SHD#

+3V +5V

1

Q46

R500

ME2N7002D

*0_4

5

+5V

C750

R504R504 *10K_4 *10K_4

2

3

C750

2.2u/6.3V_6

CPUFAN#_ON_R

VFAN 29

FANPWR = 1.6*VSET

G995/Pin1- internal pull high (+5V)

2

1

4

U17

VIN VO

/FON

VSET

G995

3 5

GND

6

GND

7

GND

8

GND

2/4 reserve D92,D93 for FAN

4

W/S= 15 mil/20mil

+CPUVDDA

C170C170

C167C167

C168

0.22u/6.3V_4 0.22u/6.3V_4

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

+3V

R123

R123 1K/F_4

1K/F_4

CPU_LDT_RST_HTPA#

C168 3300p/50V_4

3300p/50V_4

+1.2V_VLDT +1.2V_VLDT +1.2V_VLDT +1.2V_VLDT

HT_CPU_NB_CAD_H0 HT_CPU_NB_CAD_L0 HT_CPU_NB_CAD_H1 HT_CPU_NB_CAD_L1 HT_CPU_NB_CAD_H2 HT_CPU_NB_CAD_L2 HT_CPU_NB_CAD_H3 HT_CPU_NB_CAD_L3 HT_CPU_NB_CAD_H4 HT_CPU_NB_CAD_L4 HT_CPU_NB_CAD_H5 HT_CPU_NB_CAD_L5 HT_CPU_NB_CAD_H6 HT_CPU_NB_CAD_L6 HT_CPU_NB_CAD_H7 HT_CPU_NB_CAD_L7 HT_CPU_NB_CAD_H8 HT_CPU_NB_CAD_L8 HT_CPU_NB_CAD_H9 HT_CPU_NB_CAD_L9 HT_CPU_NB_CAD_H10 HT_CPU_NB_CAD_L10 HT_CPU_NB_CAD_H11 HT_CPU_NB_CAD_L11 HT_CPU_NB_CAD_H12 HT_CPU_NB_CAD_L12 HT_CPU_NB_CAD_H13 HT_CPU_NB_CAD_L13 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H15 HT_CPU_NB_CAD_L15

HT_CPU_NB_CLK_H0 HT_CPU_NB_CLK_L0 HT_CPU_NB_CLK_H1 HT_CPU_NB_CLK_L1

HT_CPU_NB_CTL_H0 HT_CPU_NB_CTL_L0 HT_CPU_NB_CTL_H1 HT_CPU_NB_CTL_L1

HT LINK

1

4.7U/6.3V_6 4.7U/6.3V_6

VLD T_B0 VLD T_B1 VLD T_B2 VLDT_B3

L0_CADOUT_H0

L0_CADOUT_L0

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H9

L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

2

3

Q20

Q20 BSS138_NL/SOT23

BSS138_NL/SOT23

4/16 change CPU_LDT_RST# shot pad location to G3

+1.8VSUS

3

Q21

R135

CPU_COREPG 29,34

R454 300_4 R454 300_4

CPU_THERMTRIP_L#

TH_FAN_POWER

C753

10u/10V_8

FANSIG 29

R508 0_6 R508 0_6

C752

0.01u/16V_4

4

2

1

2

1 3

Q26

MMBT3904

D9 2 *VPORT D92 *VPORT

D9 3 *VPORT D93 *VPORT

FDV301N

R140

R140 1K_4

1K_4

10/26 modify it

R144 *0_6 R144 *0_6

TH_FAN_POWER_R

2 1

R135

*10K_4

D3

*BAS316D3*BAS316

R139 100K_6 R139 100K_6

CPU_THERMTRIP# 14

SYS_SHDN# 33

+3V

R524

10K_4

CN35

1

4 2 3

5

PTI_CWY030-B0G1Z

FANSIG

TH_FAN_POWER_R

3

CPU CLK

CPUCLKP3 CPUCLKN3

Keep trace from resisor to CPU within 0.6" keep trace from caps to CPU within 1.2"

CPUCLKIN

C5724.7U/6.3V_6 C5724.7U/6.3V_6 C5730.22u/6.3V_4 C5730.22u/6.3V_4

CPUCLKP

C571 180p/50V_4 C571 180p/50V_4

CPUCLKN

CPUCLKP CPUCLKN

R133 169/F_4R133 169/F_4

C174 3900p/25V_4 C174 3900p/25V_4 C175 3900p/25V_4 C175 3900p/25V_4

SideBand Temp sense I2C

+1.2V_VLDT

34 CPU_VDD0_FB_L

34 CPU_VDD1_FB_H

+1.8VSUS

R453 300_4 R453 300_4

5/13 follow AMD design guide 1.03 stuff R675

10/9 AMD suggest remove MOS and connect directly

SB_SCLK3 14

SB_SDATA3 14

SB_SCLK3

SB_SDATA3

THERM_ALERT#_R

R462 1K/F_4 R462 1K/F_4 R459 1K/F_4 R459 1K/F_4

+1.8VSUS

CPU_SVC_R

R457 0_4 R457 0_4

CPU_SVD_R CPU_SVD

R461 0_4 R461 0_4R452 300_4 R452 300_4

CPU_PWRGD

R125 0_4 R125 0_4

R455 *220_4 R455 *220_4 R464 *220_4 R464 *220_4 R124 *220_4 R124 *220_4

CPU Thermal monitor

2ND_MBCLK 29

2ND_MBDATA 29

THERM_ALERT# 15

3

CPUCLKIN#

CPU_LDT_RST# 11,13

13 CPU_PWRGD

CPU_LDT_STOP# 11,13

R471 R470 44.2/F_4 R470 44.2/F_4

CPU_VDD0_FB_H 34

CPU_VDD1_FB_L 34

+1.8VSUS

R134 510/F_4 R134 510/F_4

R286 *0_4 R286 *0_4

R282 *0_4 R282 *0_4

3

+3V

10/30 change to G781

4/24 remove C762 to meet PWRGD timing spec

+CPUVDDA

CPU_LDT_RST# CPU_PWRGD CPU_LDT_STOP# CPU_LDT_REQ#_CPU

44.2/F_4 R471 44.2/F_4

place them to CPU within 1.5"

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

T16 T16

R671*300_4 R671*300_4 R672*300_4 R672*300_4

R128 510/F_4 R128 510/F_4

R676 300_4 R676 300_4 R675 300_4 R675 300_4 R678 300_4 R678 300_4 R677*300_4 R677*300_4 R679*300_4 R679*300_4

R463 0_4 R463 0_4

3

*BSS138_NL/SOT23

W/S= 15 mil/20mil

+CPUVDDA +CPUVDDA

CPUCLKIN CPUCLKIN#

CPU_SIC CPU_SID CPU_ALERT

CPU_HTREF0 CPU_HTREF1

CPUTEST23

CPUTEST18 CPUTEST19

CPUTEST25H CPUTEST25L

CPUTEST21 CPUTEST20 CPUTEST24 CPUTEST22 CPUTEST12 CPUTEST27

CNTR_VREF

2

CPU_SIC

Q38

1

F8 F9

A9 A8

B7 A7

F10

C6

AF4 AF5 AE6

R6

P6

F6 E6

Y6

AB6

G10 AA9 AC9 AD9 AF9

AD7

H10

G9

E9 E8

AB8 AF7 AE7 AE8 AC8 AF8

C2

AA6

A3 A5 B3 B5 C1

R472

R472 390_4

390_4

CPU_SID

CPU_ALERT

+1.8VSUS

U12D

VDDA1 VDDA2

CLKIN_H CLKIN_L

RESET_L PWROK LDTSTOP_L LDTREQ_L

SIC SID ALERT_L

HT_REF0 HT_REF1

VDD0_FB_H VDD0_FB_L

VDD1_FB_H VDD1_FB_L

DBRDY TMS TCK TRST_L TDI

TEST23

TEST18 TEST19

TEST25_H TEST25_L

TEST21 TEST20 TEST24 TEST22 TEST12 TEST27

TEST9 TEST6

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5

SOCKET_638_PIN

Serial VID

CPU_SVC

CPU_PWRGD_SVID_REG

+3V

Q11

2

RHU002N06

1

+3V

Q6

2

RHU002N06Q6RHU002N06

1

R114

*8.2K_4

3

+3V

R116 10K_4 R116 10K_4

CPU_SVC 34 CPU_SVD 34 CPU_PWRGD_SVID_REG 34

+3V

R112

2

*10K_4

THERM_ALERT#_R

1

Q13*2N7002E-LF Q13*2N7002E-LF

THER_SHD#

<check list> Layout Note:Routing 10:10 mils and away from noise source with ground gard

2

THERMTRIP_L

PROCHOT_L

MEMHOT_L

VDDIO_FB_H VDDIO_FB_L

VDDNB_FB_H VDDNB_FB_L

2/4 pull up R691 CPU_BDREQ# to avoid noise cause system shut down

R468

R468 390_4

390_4

KEY1 KEY2

THERMDC THERMDA

DBREQ_L

TEST28_H TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

R473

R473 1K/F_4

1K/F_4

SVC SVD

TDO

CPU_LDT_RST# CPU_LDT_STOP#

CPU_LDT_REQ#_CPU

CPU_PWRGD

M11 W18

CPU_SVC_R

A6

CPU_SVD_R

A4

CPU_THERMTRIP_L#

AF6

CPU_PROCHOT_L#

AC7

CPU_MEMHOT_L#

AA8

CPU_THERMDC

W7

CPU_THERMDA

W8

VDDIO_FB_H

W9

VDDIO_FB_L

Y9

H6 G6

CPU_DBREQ#

E10

CPU_TDO

AE9

CPUTEST28H

J7

CPUTEST28L

H8

CPUTEST17

D7

CPUTEST16

E7

CPUTEST15

F7

CPUTEST14

C7

C3 K8

C4

CPUTEST29H

C9

CPUTEST29L

C8

H18 H19 AA7 D5 C5

+1.8VSUS

C762

*0.1u/10V_4

1/30 leakage issue , change +1.8Vsus to +1.8V

R113 0_4 R113 0_4 R111 0_4 R111 0_4

V DDIO_FB_H 36

VDDIO_FB_L 36

CPU_VDDNB_FB_H 34 CPU_VDDNB_FB_L 34

T8 T8 T5 T5

T4 T4 T3 T3

12/7 Add 300ohm to GND for AMD request

T10 T10 T7 T7

CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

C741 *0.1u/10V_4 C741 *0.1u/10V_4

+1.8VSUS

R691

R691 300_4

300_4

CPU_DBREQ#

1

R130 300_4 R130 300_4 R129 300_4 R129 300_4

R460 300_4 R460 300_4

R127 300_4 R127 300_4

12/4 Add 0.1u for AMD CPU

10/9 AMD suggest

1. pull up CPU_PWRGD to +1.8SUS

2. pop R5563 pull up to +1.8SUS

H_THERMDC H_THERMDA

R673*300_4 R673*300_4 R674*300_4 R674*300_4

HDT Connector

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

KEY

CN26

VFIX MODE

SVC SVD Voltage Output

00 001 1

+3V

R110

R107

10K_4

U1

8

SCLK

7

SDA

6

ALERT#

4

OVERT#

G786P81UU1G786P81U

ADDRESS: 98H

MAX6657,G781P8,W83L771G

2

2/19 change G781 to G786P81U

R106

200_6

LM86VCC

1

VCC

2

DXP

3

DXN

5

GND

Size Document Number Rev

Date: Sheet

11

THER_SHD#

C147

0.1u/10V_4

C154

2200p/50V_4

H_THERMDC

1 3

H_THERMDA

R718 *0_4 R718 *0_4

PROJECT : BD3G

Quanta Computer Inc.

S1G2 HT,CTL I/F 1/3

+3V

2

2/18 G781 reverse R718 0 ohm for Griffin CPU

1

+1.8V

03

+1.8V

CPU_LDT_RST_HTPA#

25

*HDT CONN

VID Override Circuit

1.4V

1.2V

1.0V

0.8V

R115

R115 330_4

330_4

Q18

Q18 MMBT3904

MMBT3904

4 42Thursday, May 29, 2008

SYS_SHDN# 33

of

1A

A

B

C

D

E

+SMDDR_VTERM +SMDDR_VTERM

PLACE THEM CLOSE TO CPU WITHIN 1"

R448 39.2/F_4 R448 39.2/F_4

+1.8VSUS

4 4

3 3

2 2

1 1

MEM_MA_ADD[0..15] 7,8

7,8 MEM_MA0_ODT0 7,8 MEM_MA0_ODT1

7,8 MEM_MA0_CS#0 7,8 MEM_MA0_CS#1

7,8 MEM_MA_CKE0 7,8 MEM_MA_CKE1

7 MEM_MA_CLK1_P 7 MEM_MA_CLK1_N 7 MEM_MA_CLK7_P

7,8 MEM_MA_BANK0 7,8 MEM_MA_BANK1 7,8 MEM_MA_BANK2

7,8 MEM_MA_RAS# 7,8 MEM_MA_CAS#

R451 39.2/F_4 R451 39.2/F_4

T23 T23

T41 T41 T38 T38

T37 T37 T30 T30

T29 T29 T43 T43

MEM_MA_CLK7_N 7

T42T42 T39 T39

MEM_MA_WE# 7,8

A

M_ZP M_ZN

MEM_MA_RESET#

MEM_MA1_ODT0 MEM_MA1_ODT1

CPU_MA1_CS_L0 CPU_MA1_CS_L1

CPU_MA_CLK_H5 CPU_MA_CLK_L5

CPU_MA_CLK_H4 CPU_MA_CLK_L4

MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15

MEM_MB_CLK7_P

MEM_MB_CLK7_N

MEM_MB_CLK1_P

MEM_MB_CLK1_N

U12B

D10

VTT1

C10

VTT2

B10

VTT3

AD10

VTT4

AF10

MEMZP

AE10

MEMZN

H16

RSVD_M1

T19

MA0_ODT0

V22

MA0_ODT1

U21

MA1_ODT0

V19

MA1_ODT1

T20

MA0_CS_L0

U19

MA0_CS_L1

U20

MA1_CS_L0

V20

MA1_CS_L1

J22

MA_CKE0

J20

MA_CKE1

N19

MA_CLK_H5

N20

MA_CLK_L5

E16

MA_CLK_H1

F16

MA_CLK_L1

Y16

MA_CLK_H7

AA16

MA_CLK_L7

P19

MA_CLK_H4

P20

MA_CLK_L4

N21

MA_ADD0

M20

MA_ADD1

N22

MA_ADD2

M19

MA_ADD3

M22

MA_ADD4

L20

MA_ADD5

M24

MA_ADD6

L21

MA_ADD7

L19

MA_ADD8

K22

MA_ADD9

R21

MA_ADD10

L22

MA_ADD11

K20

MA_ADD12

V24

MA_ADD13

K24

MA_ADD14

K19

MA_ADD15

R20

MA_BANK0

R23

MA_BANK1

J21

MA_BANK2

R19

MA_RAS_L

T22

MA_CAS_L

T24

MA_WE_L

SOCKET_638_PIN

+SMDDR_VTERM

C534C534

4.7U/6.3V_6 4.7U/6.3V_6

+SMDDR_VTERM

C542

1000p/50V_4

C238C238

1.5p/50V_4 1.5p/50V_4

C532C532

1.5p/50V_4 1.5p/50V_4

W10

MEM:CMD/CTRL/CLK

VTT5 VTT6 VTT7 VTT8 VTT9

VTT_SENSE

MEMVREF

RSVD_M2

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H5

MB_CLK_L5

MB_CLK_H1

MB_CLK_L1

MB_CLK_H7

MB_CLK_L7

MB_CLK_H4

MB_CLK_L4

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

AC10 AB10 AA10 A10

CPU_VTT_SENSE

Y10

MEMVREF_CPU

W17

MEM_MB_RESET#

B18

W26 W23

MEM_MB1_ODT0

Y26

V26 W25 U22

J25 H26

CPU_MB_CLK_H5

P22

CPU_MB_CLK_HL5

R22 A17 A18 AF18 AF17

CPU_MB_CLK_H4

R26

CPU_MB_CLK_L4

R25

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

Place close to socket

C546C546

4.7U/6.3V_6 4.7U/6.3V_6

C190

1000p/50V_4

Close to CPU within 1500 mils

C545C545

4.7U/6.3V_6 4.7U/6.3V_6

C538

1000p/50V_4

B

MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15

C536C536

4.7U/6.3V_6 4.7U/6.3V_6

C184

1000p/50V_4

MEM_MA_CLK7_P

MEM_MA_CLK7_N

MEM_MA_CLK1_P

MEM_MA_CLK1_N

750 mA

CPU_VTT_SENSE 36

T136 T136

MEM_MB0_ODT0 7,8 MEM_MB0_ODT1 7,8

T31 T31

MEM_MB0_CS#0 7,8 MEM_MB0_CS#1 7,8

T36T36

MEM_MB_CKE0 7,8 MEM_MB_CKE1 7,8

T34 T34 T28 T28

MEM_MB_CLK1_P 7 MEM_MB_CLK1_N 7 MEM_MB_CLK7_P 7

MEM_MB_CLK7_N 7

T35 T35 T40 T40

MEM_MB_BANK0 7,8

MEM_MB_BANK1 7,8

MEM_MB_BANK2 7,8

MEM_MB_RAS# 7,8

MEM_MB_CAS# 7,8

MEM_MB_WE# 7,8

C186C186

0.22u/6.3V_4 0.22u/6.3V_4

C183

180p/50V_4

R143

2K/F_4

R142

2K/F_4

11/05 change to RC0402-C

MEM_MB_ADD[0..15] 7,8

C539C539

0.22u/6.3V_4 0.22u/6.3V_4

C181

180p/50V_4

C540C540

1.5p/50V_4 1.5p/50V_4

C533C533

1.5p/50V_4 1.5p/50V_4

+1.8VSUS

C544C544

0.22u/6.3V_4 0.22u/6.3V_4

C543

180p/50V_4

+SMDDR_VREF

R137

R137 *0_4

*0_4

C200C200

0.1u/10V_4 0.1u/10V_4

0.22u/6.3V_4 0.22u/6.3V_4

180p/50V_4

C193C193

C537

MEM_MB_DATA[0..63] 7

Reserved

1000p/50V_4

MEM_MB_DM[0..7] 7

C

C208

7 MEM_MB_DQS0_P 7 MEM_MB_DQS0_N 7 MEM_MB_DQS1_P 7 MEM_MB_DQS1_N 7 MEM_MB_DQS2_P 7 MEM_MB_DQS2_N 7 MEM_MB_DQS3_P 7 MEM_MB_DQS3_N 7 MEM_MB_DQS4_P 7 MEM_MB_DQS4_N 7 MEM_MB_DQS5_P 7 MEM_MB_DQS5_N 7 MEM_MB_DQS6_P 7 MEM_MB_DQS6_N 7 MEM_MB_DQS7_P

MEM_MB_DQS7_N 7

Processor Memory Interface

U12C

MEM:DATA

MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63

MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23

G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11

Y11 AE14 AF14 AF11 AD11

A12

B16

A22

E25 AB26 AE22 AC16 AD12

C12

B12

D16

C16

A24

A23

F26

E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

SOCKET_638_PIN

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

D

MEM:DATA

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0

MA_DQS_L0

MA_DQS_H1

MA_DQS_L1

MA_DQS_H2

MA_DQS_L2

MA_DQS_H3

MA_DQS_L3

MA_DQS_H4

MA_DQS_L4

MA_DQS_H5

MA_DQS_L5

MA_DQS_H6

MA_DQS_L6

MA_DQS_H7

MA_DQS_L7

04

MEM_MA_DATA0

G12

MEM_MA_DATA1

F12

MEM_MA_DATA2

H14

MEM_MA_DATA3

G14

MEM_MA_DATA4

H11

MEM_MA_DATA5

H12

MEM_MA_DATA6

C13

MEM_MA_DATA7

E13

MEM_MA_DATA8

H15

MEM_MA_DATA9

E15

MEM_MA_DATA10

E17

MEM_MA_DATA11

H17

MEM_MA_DATA12

E14

MEM_MA_DATA13

F14

MEM_MA_DATA14

C17

MEM_MA_DATA15

G17

MEM_MA_DATA16

G18

MEM_MA_DATA17

C19

MEM_MA_DATA18

D22

MEM_MA_DATA19

E20

MEM_MA_DATA20

E18

MEM_MA_DATA21

F18

MEM_MA_DATA22

B22

MEM_MA_DATA23

C23

MEM_MA_DATA24

F20

MEM_MA_DATA25

F22

MEM_MA_DATA26

H24

MEM_MA_DATA27

J19

MEM_MA_DATA28

E21

MEM_MA_DATA29

E22

MEM_MA_DATA30

H20

MEM_MA_DATA31

H22

MEM_MA_DATA32

Y24

MEM_MA_DATA33

AB24

MEM_MA_DATA34

AB22

MEM_MA_DATA35

AA21

MEM_MA_DATA36

W22

MEM_MA_DATA37

W21

MEM_MA_DATA38

Y22

MEM_MA_DATA39

AA22

MEM_MA_DATA40

Y20

MEM_MA_DATA41

AA20

MEM_MA_DATA42

AA18

MEM_MA_DATA43

AB18

MEM_MA_DATA44

AB21

MEM_MA_DATA45

AD21

MEM_MA_DATA46

AD19

MEM_MA_DATA47

Y18

MEM_MA_DATA48

AD17

MEM_MA_DATA49

W16

MEM_MA_DATA50

W14

MEM_MA_DATA51

Y14

MEM_MA_DATA52

Y17

MEM_MA_DATA53

AB17

MEM_MA_DATA54

AB15

MEM_MA_DATA55

AD15

MEM_MA_DATA56

AB13

MEM_MA_DATA57

AD13

MEM_MA_DATA58

Y12

MEM_MA_DATA59

W11

MEM_MA_DATA60

AB14

MEM_MA_DATA61

AA14

MEM_MA_DATA62

AB12

MEM_MA_DATA63

AA12

MEM_MA_DM0

E12

MEM_MA_DM1

C15

MEM_MA_DM2

E19

MEM_MA_DM3

F24

MEM_MA_DM4

AC24

MEM_MA_DM5

Y19

MEM_MA_DM6

AB16

MEM_MA_DM7

Y13

G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13

Size D ocument Number R ev

Date: Sheet

S1G2 DDRII MEMORY I/F 2/3

MEM_MA_DATA[0..63] 7

MEM_MA_DM[0..7] 7

MEM_MA_DQS0_P 7 MEM_MA_DQS0_N 7 MEM_MA_DQS1_P 7 MEM_MA_DQS1_N 7 MEM_MA_DQS2_P 7 MEM_MA_DQS2_N 7 MEM_MA_DQS3_P 7 MEM_MA_DQS3_N 7 MEM_MA_DQS4_P 7 MEM_MA_DQS4_N 7 MEM_MA_DQS5_P 7 MEM_MA_DQS5_N 7 MEM_MA_DQS6_P 7 MEM_MA_DQS6_N 7 MEM_MA_DQS7_P 7 MEM_MA_DQS7_N 7

PROJECT : BD3G

Quanta Computer Inc.

of

5 42Thursday, May 29, 2008

E

1A

5

U12E

G4

VDD0_1

H2

VDD0_2

J9

VDD0_3

J11

VDD0_4

J13

VDD0_5

D D

CPU VDDNB_CORE

3A

+1.8VSUS

2A

C C

B B

J15

VDD0_6

K6

VDD0_7

K10

VDD0_8

K12

VDD0_9

K14

VDD0_10

L4

VDD0_11

L7

VDD0_12

L9

VDD0_13

L11

VDD0_14

L13

VDD0_15

L15

VDD0_16

M2

VDD0_17

M6

VDD0_18

M8

VDD0_19

M10

VDD0_20

N7

VDD0_21

N9

VDD0_22

N11

VDD0_23

K16

VDDNB_1

M16

VDDNB_2

P16

VDDNB_3

T16

VDDNB_4

V16

VDDNB_5

H25

VDDIO1

J17

VDDIO2

K18

VDDIO3

K21

VDDIO4

K23

VDDIO5

K25

VDDIO6

L17

VDDIO7

M18

VDDIO8

M21

VDDIO9

M23

VDDIO10

M25

VDDIO11

N17

VDDIO12

SOCKET_638_PIN

VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8

VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

CPU_CORE1CPU_CORE0 CPU_CORE0

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

+1.8VSUS

4

U12F

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

SOCKET_638_PIN

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

3

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

22u/6.3V_8

CPU_CORE1

CPU VDDNB_CORE

DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE

+1.8VSUS

BOTTOM SIDE DECOUPLING

C188

C197

22u/6.3V_8

C196

22u/6.3V_8

C207

22u/6.3V_8

C525C525

4.7U/6.3V_6 4.7U/6.3V_6

0.22u/6.3V_4 0.22u/6.3V_4

C251C251

4.7U/6.3V_6 4.7U/6.3V_6

0.22u/6.3V_4 0.22u/6.3V_4

C241C241

C187

C194

C516C516

2

C192

22u/6.3V_8

C206

22u/6.3V_8

C248C248

0.01u/16V_4 0.01u/16V_4

22u/6.3V_8

C199

+1.8VSUS

C515C515

4.7U/6.3V_6 4.7U/6.3V_6

C198

C195

22u/6.3V_8

C209

C209 22u/6.3V_8

22u/6.3V_8

4.7U/6.3V_6 4.7U/6.3V_6

0.01u/16V_4 0.01u/16V_4

C179C179

0.22u/6.3V_4 0.22u/6.3V_4

C212

22u/6.3V_8

C526C526

C237

C237C245 C245

180p/50V_4

C177C177

0.22u/6.3V_4 0.22u/6.3V_4

C180C180

0.01u/16V_4 0.01u/16V_4

C211C211

0.22u/6.3V_4 0.22u/6.3V_4

C239C239

180p/50V_4

C527C527

0.22u/6.3V_4 0.22u/6.3V_4

C247C247

0.22u/6.3V_4 0.22u/6.3V_4

C178

C191

C191C182 C182

1

C185C185

0.01u/16V_4 0.01u/16V_4

C210

180p/50V_4

C250

180p/50V_4

05

PROCESSOR POWER AND GROUND

A A

PROJECT : BD3G

Quanta Computer Inc.

Size D ocument Number R ev

Date: Sheet

5

4

3

2

Date: Sheet

Quanta Computer Inc.

S1G2 PWR & GND 3/3

1

of

6 42Thursday, May 29, 2008

1A

5

MEM_MA_ADD[0..15] 5,8

D D

MEM_MA_BANK[0..2] 5,8

5 MEM_MA_DQS0_P 5 MEM_MA_DQS1_P 5 MEM_MA_DQS2_P 5 MEM_MA_DQS3_P 5 MEM_MA_DQS4_P 5 MEM_MA_DQS5_P 5 MEM_MA_DQS6_P

C C

B B

A A

5 MEM_MA_DQS7_P

5 MEM_MA_DQS0_N 5 MEM_MA_DQS1_N 5 MEM_MA_DQS2_N 5 MEM_MA_DQS3_N 5 MEM_MA_DQS4_N 5 MEM_MA_DQS5_N 5 MEM_MA_DQS6_N 5 MEM_MA_DQS7_N

5 MEM_MA_CLK1_P 5 MEM_MA_CLK1_N 5 MEM_MA_CLK7_P 5 MEM_MA_CLK7_N

5,8 MEM_MA_CKE0 5,8 MEM_MA_CKE1

5,8 MEM_MA_RAS# 5,8 MEM_MA_CAS# 5,8 MEM_MA_WE# 5,8 MEM_MA0_CS#0

MEM_MA0_CS#1 5,8

5,8 MEM_MA0_ODT0

MEM_MA0_ODT1 5,8

3,8,14,25 PDAT_SMB

PCLK_SMB 3,8,14,25

C387C387

2.2u/6.3V_6 2.2u/6.3V_6

+3V

C383C383

0.1u/10V_4 0.1u/10V_4

MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8

MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15

MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2

MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7

PDAT_SMB PCLK_SMB

C496

1000p/50V_4

+1.8VSUS +1.8VSUS

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10

90

A11

89

A12

116

A13

86

A14

84

A15

107

BA0

106

BA1

85

BA2

10

DM0

26

DM1

52

DM2

67

DM3

130

DM4

147

DM5

170

DM6

185

DM7

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

11

DQS0

29

DQS1

49

DQS2

68

DQS3

129

DQS4

146

DQS5

167

DQS6

186

DQS7

30

CK0

32

CK0

164

CK1

166

CK1

79

CKE0

80

CKE1

108

RAS

113

CAS

109

WE

110

S0

115

S1

114

ODT0

119

DIM1_SA0 DIM1_SA1

C466C466

0.1u/10V_4 0.1u/10V_4

ODT1

198

SA0

200

SA1

195

SDA

197

SCL

199

VDDspd

1

VREF

2

VSS0

3

VSS1

8

VSS2

9

VSS3

12

VSS4

15

VSS5

18

VSS6

21

VSS7

24

VSS8

27

VSS9

28

VSS10

33

VSS11

34

VSS12

39

VSS13

40

VSS14

41

VSS15

42

VSS16

47

VSS17

48

VSS18

53

VSS19

54

VSS20

103

VDD081VDD182VDD287VDD388VDD495VDD596VDD6

SO-DIMM

VSS2577VSS26 66VSS2371VSS24 60VSS2165VSS22

72

59

111

104

112

117

VDD8

VDD7

VDD9

(Reverse)

VSS29

VSS30

VSS28 78VSS27

122

127

121

H=5.2

R271 10K/F_4 R271 10K/F_4 R272 10K/F_4 R272 10K/F_4

SMbus address A0

5

4

118

CN23

5

DQ0

7

DQ1

17

DQ2

VDD10

VDD11

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

50

NC1

69

NC2

83

NC3

120

NC4

163

NC/TEST

196

VSS56

193

VSS55

190

VSS54

187

VSS53

184

VSS52

183

VSS51

178

VSS50

177

VSS49

172

VSS48

171

VSS47

168

VSS46

165

VSS45

162

VSS44

161

VSS43

156

VSS42

155

VSS41

150

VSS40

149

VSS39

145

VSS38

144

VSS37

139

VSS36

138

VSS35

133

VSS34

VSS33

VSS31

VSS32

128

132

DDR SO-DIMM SOCKET 1.8V

DIM1_SA0 DIM1_SA1

4

MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA35 MEM_MA_DATA39 MEM_MA_DATA38 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA52 MEM_MA_DATA49 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA53 MEM_MA_DATA48 MEM_MA_DATA51 MEM_MA_DATA50 MEM_MA_DATA61 MEM_MA_DATA60 MEM_MA_DATA63 MEM_MA_DATA62 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59

MEMHOT_SODIMM#_1 MEM_MA_RESET#1

MEM_MA_NC5

MEM_MA_DATA[0..63] 5

R279 0_4 R279 0_4

T122 T122

T123 T123

+0.9VSMVREF_DIMM+0.9VSMVREF_DIMM

Only for reserved

1/18 Change CN23 footprint from DDR-C-1734071-200P to DDR-C-1734071-200P-BD3A (SMT open issue)

R281 *0_4 R281 *0_4

MEMHOT_SODIMM# 8

C497

2.2u/6.3V_6

+0.9VSMVREF_DIMM +SMDDR_VREF

+0.9VSMVREF_DIMM

3

MEM_MB_ADD[0..15] 5,8 MEM_MB_DATA[0..63] 5

MEM_MB_BANK[0..2] 5,8

MEM_MB_DM[0..7] 5MEM_MA_DM[0..7] 5

MEM_MB_DQS0_P 5 MEM_MB_DQS1_P 5

5 MEM_MB_DQS2_P

MEM_MB_DQS3_P 5 5 MEM_MB_DQS4_P 5 MEM_MB_DQS5_P 5 MEM_MB_DQS6_P

MEM_MB_DQS7_P 5

MEM_MB_DQS0_N 5

MEM_MB_DQS1_N 5 5 MEM_MB_DQS2_N

MEM_MB_DQS3_N 5 5 MEM_MB_DQS4_N

MEM_MB_DQS5_N 5 5 MEM_MB_DQS6_N

MEM_MB_DQS7_N 5

MEM_MB_CLK1_P 5 MEM_MB_CLK1_N 5

5 MEM_MB_CLK7_P

MEM_MB_CLK7_N 5

5,8 MEM_MB_CKE0

MEM_MB_CKE1 5,8

5,8 MEM_MB_RAS# 5,8 MEM_MB_CAS# 5,8 MEM_MB_WE#

5,8 MEM_MB0_CS#0

MEM_MB0_CS#1 5,8

5,8 MEM_MB0_ODT0

MEM_MB0_ODT1 5,8

+3V

C382

0.1u/10V_4

+1.8VSUS

R277

R277 2K/F_4

2K/F_4

R288

R288 2K/F_4

2K/F_4

MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8

MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15

MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2

MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7

DIM2_SA0 DIM2_SA1

PDAT_SMB PCLK_SMB

C468C468

0.1u/10V_4 0.1u/10V_4

C384

C384 1000p/50V_4

1000p/50V_4

102

A0

101

A1

99 98 97 94 92 93 91

90 89

86 84

85

10 26 52 67

13 31 51 70

11 29 49 68

30 32

79 80

o

12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54

1

2 3 8 9

A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15

BA0 BA1 BA2

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

CK0 CK0 CK1 CK1

CKE0 CKE1

RAS CAS WE S0 S1

ODT0 ODT1

SA0 SA1

SDA SCL

VDDspd

VREF

VSS0 VSS1 VSS2

o

VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20

DIM2_SA0 DIM2_SA1

VDD081VDD182VDD287VDD388VDD495VDD596VDD6

59

100

105

116

107 106

130 147 170 185

131 148 169 188

129 146 167 186

164 166

108 113 109 110 115

114 119

198 200

195 197

199

SMbus address A2

3

2

103

111

104

112

117

118

VDD8

VDD7

VDD9

VDD10

VDD11

NC/TEST

VSS56

SO-DIMM

(REVERSE)

SO-DIMM

(REVERSE)

VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35

VSS2577VSS26 66VSS2371VSS24 60VSS2165VSS22

72

R295 10K/F_4 R295 10K/F_4 R296 10K/F_4 R296 10K/F_4

VSS34

VSS33

VSS31

VSS32

VSS29

VSS30

VSS28 78VSS27

128

132

122

127

121

2

CN19

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

NC1 NC2 NC3 NC4

H=9.2

MEM_MB_DATA4

5

MEM_MB_DATA5

7

MEM_MB_DATA2

17

MEM_MB_DATA3

19

MEM_MB_DATA0

4

MEM_MB_DATA1

6

MEM_MB_DATA6

14

MEM_MB_DATA7

16

MEM_MB_DATA13

23

MEM_MB_DATA12

25

MEM_MB_DATA11

35

MEM_MB_DATA10

37

MEM_MB_DATA8

20

MEM_MB_DATA9

22

MEM_MB_DATA14

36

MEM_MB_DATA15

38

MEM_MB_DATA16

43

MEM_MB_DATA17

45

MEM_MB_DATA18

55

MEM_MB_DATA19

57

MEM_MB_DATA20

44

MEM_MB_DATA21

46

MEM_MB_DATA22

56

MEM_MB_DATA23

58

MEM_MB_DATA24

61

MEM_MB_DATA25

63

MEM_MB_DATA26

73

MEM_MB_DATA27

75

MEM_MB_DATA28

62

MEM_MB_DATA29

64

MEM_MB_DATA30

74

MEM_MB_DATA31

76

MEM_MB_DATA37

123

MEM_MB_DATA36

125

MEM_MB_DATA34

135

MEM_MB_DATA35

137

MEM_MB_DATA33

124

MEM_MB_DATA32

126

MEM_MB_DATA38

134

MEM_MB_DATA39

136

MEM_MB_DATA40

141

MEM_MB_DATA45

143

MEM_MB_DATA47

151

MEM_MB_DATA46

153

MEM_MB_DATA44

140

MEM_MB_DATA41

142

MEM_MB_DATA43

152

MEM_MB_DATA42

154

MEM_MB_DATA52

157

MEM_MB_DATA53

159

MEM_MB_DATA50

173

MEM_MB_DATA51

175

MEM_MB_DATA48

158

MEM_MB_DATA49

160

MEM_MB_DATA54

174

MEM_MB_DATA55

176

MEM_MB_DATA56

179

MEM_MB_DATA60

181

MEM_MB_DATA58

189

MEM_MB_DATA59

191

MEM_MB_DATA61

180

MEM_MB_DATA57

182

MEM_MB_DATA62

192

MEM_MB_DATA63

194

MEMHOT_SODIMM#_2

50

MEM_MB_RESET#2

69 83 120

MEM_MB_NC5

163

196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133

+3V

R294 0_4 R294 0_4

T106 T106

T104 T104

1/18 Change CN19 footprint from DDR-C-292564-200P to DDR-C-292564-200P-BD3A (SMT open issue)

DDR SO-DIMM SOCKET 1.8V

Size Doc ument Number Rev

Date: Sheet of

Date: Sheet

MEMHOT_SODIMM#

PROJECT : BD3G

Quanta Computer Inc.

DDR2 SODIMMS: A/ B CHANNEL

1

07

1A

of

7 42Thursday, May 29, 2008

1

5

4

3

2

1

5,7 MEM_MA_ADD[0..15]

MEM_MA_BANK[0..2] 5,7

MEM_MA_BANK2

D D

C C

MEM_MA_CKE0 5,7

MEM_MA_WE# 5,7 MEM_MA_CAS# 5,7

5,7 MEM_MA0_ODT1

MEM_MA0_CS#1 5,7

MEM_MA_CKE1 5,7

5,7 MEM_MA_RAS#

MEM_MA0_ODT0 5,7

MEM_MA_CKE0 MEM_MA_ADD12 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD5 MEM_MA_ADD3 MEM_MA_ADD1 MEM_MA_ADD10 MEM_MA_BANK0 MEM_MA_WE# MEM_MA_CAS# MEM_MA0_ODT1 MEM_MA0_CS#1 MEM_MA_ADD15 MEM_MA_CKE1

MEM_MA_ADD7 MEM_MA_ADD14 MEM_MA_ADD6 MEM_MA_ADD11

MEM_MA_ADD2 MEM_MA_ADD4

MEM_MA_BANK1 MEM_MA_ADD0

MEM_MA0_CS#0 MEM_MA_RAS#

MEM_MA_ADD13 MEM_MA0_ODT0

+1.8VSUS

RP25 47_4P2R_4 RP25 47_4P2R_4

RP24 47_4P2R_4 RP24 47_4P2R_4

RP20 47_4P2R_4 RP20 47_4P2R_4

RP19 47_4P2R_4 RP19 47_4P2R_4

RP23 47_4P2R_4 RP23 47_4P2R_4

RP22 47_4P2R_4 RP22 47_4P2R_4

RP21 47_4P2R_4 RP21 47_4P2R_4

RP32 47_4P2R_4 RP32 47_4P2R_4

RP31 47_4P2R_4 RP31 47_4P2R_4

RP30 47_4P2R_4 RP30 47_4P2R_4

RP27 47_4P2R_4 RP27 47_4P2R_4

RP26 47_4P2R_4 RP26 47_4P2R_4

RP29 47_4P2R_4 RP29 47_4P2R_4

RP28 47_4P2R_4 RP28 47_4P2R_4

C513

0.1u/10V_4

C505

0.1u/10V_4

MEM_MA_ADD[0..15]

MEM_MA_BANK[0..2]

+SMDDR_VTERM

4

3

2

1

4

3

2

1

2

1

4

3

2

1

4

3

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

2

1

4

3

4

3

2

1

4

3

2

1

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

C498

C503

0.1u/10V_4

C498

0.1u/10V_4

C446 0.1u/10V_4 C446 0.1u/10V_4

C386 0.1u/10V_4 C386 0.1u/10V_4

C361 0.1u/10V_4 C361 0.1u/10V_4

C341 0.1u/10V_4 C341 0.1u/10V_4

C355 0.1u/10V_4 C355 0.1u/10V_4

C390 0.1u/10V_4 C390 0.1u/10V_4

C491 0.1u/10V_4 C491 0.1u/10V_4

C328 0.1u/10V_4 C328 0.1u/10V_4

C360 0.1u/10V_4 C360 0.1u/10V_4

C329 0.1u/10V_4 C329 0.1u/10V_4

C495 0.1u/10V_4 C495 0.1u/10V_4

C369 0.1u/10V_4 C369 0.1u/10V_4

C445 0.1u/10V_4 C445 0.1u/10V_4

C318 0.1u/10V_4 C318 0.1u/10V_4

C444 0.1u/10V_4 C444 0.1u/10V_4

C448 0.1u/10V_4 C448 0.1u/10V_4

C517

0.1u/10V_4

C522

0.1u/10V_4

+1.8VSUS

MEM_MB_CKE0 5,7

5,7 MEM_MB_W E# 5,7 MEM_MB_CAS#

MEM_MB0_ODT1 5,7 MEM_MB0_CS#1 5,7 MEM_MB_CKE1 5,7

MEM_MB0_CS#0 5,75,7 MEM_MA0_CS#0 MEM_MB_RAS# 5,7

MEM_MB0_ODT0 5,7

5,7 MEM_MB_ADD[0..15]

MEM_MB_BANK[0..2] 5,7

MEM_MB_CKE0 MEM_MB_BANK2 MEM_MB_ADD12 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD5 MEM_MB_ADD3 MEM_MB_ADD1 MEM_MB_ADD10 MEM_MB_BANK0 MEM_MB_WE# MEM_MB_CAS# MEM_MB0_ODT1 MEM_MB0_CS#1 MEM_MB_CKE1 MEM_MB_ADD15

MEM_MB_ADD7 MEM_MB_ADD14

MEM_MB_ADD6 MEM_MB_ADD11

MEM_MB_ADD2 MEM_MB_ADD4

MEM_MB_BANK1 MEM_MB_ADD0

MEM_MB0_CS#0 MEM_MB_RAS#

MEM_MB0_ODT0 MEM_MB_ADD13

+1.8VSUS

C499

0.1u/10V_4

MEM_MB_ADD[0..15]

MEM_MB_BANK[0..2]

+SMDDR_VTERM

RP40 47_4P2R_4 RP40 47_4P2R_4

4

3

2

RP39 47_4P2R_4 RP39 47_4P2R_4

RP38 47_4P2R_4 RP38 47_4P2R_4

RP37 47_4P2R_4 RP37 47_4P2R_4

RP36 47_4P2R_4 RP36 47_4P2R_4

RP35 47_4P2R_4 RP35 47_4P2R_4

RP41 47_4P2R_4 RP41 47_4P2R_4

RP44 47_4P2R_4 RP44 47_4P2R_4

RP43 47_4P2R_4 RP43 47_4P2R_4

RP42 47_4P2R_4 RP42 47_4P2R_4

RP48 47_4P2R_4 RP48 47_4P2R_4

RP47 47_4P2R_4 RP47 47_4P2R_4

RP46 47_4P2R_4 RP46 47_4P2R_4

RP45 47_4P2R_4 RP45 47_4P2R_4

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

C511

0.1u/10V_4

1

2

1

4

3

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

2

1

4

3

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2

1

2

1

4

3

C519

0.1u/10V_4

C524

0.1u/10V_4

C365 0.1u/10V_4 C365 0.1u/10V_4

C440 0.1u/10V_4 C440 0.1u/10V_4

C357 0.1u/10V_4 C357 0.1u/10V_4

C325 0.1u/10V_4 C325 0.1u/10V_4

C356 0.1u/10V_4 C356 0.1u/10V_4

C449 0.1u/10V_4 C449 0.1u/10V_4

C494 0.1u/10V_4 C494 0.1u/10V_4

C441 0.1u/10V_4 C441 0.1u/10V_4

C492 0.1u/10V_4 C492 0.1u/10V_4

C349 0.1u/10V_4 C349 0.1u/10V_4

C493 0.1u/10V_4 C493 0.1u/10V_4

C376 0.1u/10V_4 C376 0.1u/10V_4

C359 0.1u/10V_4 C359 0.1u/10V_4

C340 0.1u/10V_4 C340 0.1u/10V_4

C362 0.1u/10V_4 C362 0.1u/10V_4

C343 0.1u/10V_4 C343 0.1u/10V_4

C520

0.1u/10V_4

+1.8VSUS

C470

0.1u/10V_4

08

+1.8VSUS

PLACE CLOSE TO SOCKET( PER EMI/EMC)

B B

+3V

R298

R298 *10K/F_4

*10K/F_4

Close DDR2 socket

U5

A0 7 +VS

+3V

3,7,14,25 PDAT_SMB

PCLK_SMB 3,7,14,25

A A

PDAT_SMB PCLK_SMB

+3V

5

6

A1

5

A2

1

SDA

2

SCL

*DS75U+T&R

R291 10K/F_4 R291 10K/F_4

+3V

8

MEMHOT_SODIMM#

3

O.S

4

GND

Address:92h

MEMHOT_SODIMM#

C463 0.1u/10V_4 C463 0.1u/10V_4

MEMHOT_SODIMM# 7

4

2

Q29Q29

*2N7002E-G *2N7002E-G

R299 *33_4 R299 *33_4

3

1

2

Q28Q28

*2N7002E-G *2N7002E-G

+3V

R297

R297 *10K/F_4

*10K/F_4

3

1

3

CPU_MEMHOT# 4,14

PLACE CLOSE TO SOCKET( PER EMI/EMC)

Size D ocument Number R ev

Date: Sheet

2

Date: Sheet

PROJECT : BD3G

Quanta Computer Inc.

DDR2 SODIMMS TERMINATIONS

1

of

8 42Thursday, May 29, 2008

1A

5

HT_CPU_NB_CAD_H0 HT_CPU_NB_CAD_L0 HT_CPU_NB_CAD_H1 HT_CPU_NB_CAD_L1 HT_CPU_NB_CAD_H2 HT_CPU_NB_CAD_L2 HT_CPU_NB_CAD_H3 HT_CPU_NB_CAD_L3 HT_CPU_NB_CAD_H4 HT_CPU_NB_CAD_L4 HT_CPU_NB_CAD_H5 HT_CPU_NB_CAD_L5

D D

C C

HT_CPU_NB_CAD_H6 HT_CPU_NB_CAD_L6 HT_CPU_NB_CAD_H7 HT_CPU_NB_CAD_L7

HT_CPU_NB_CAD_H8 HT_CPU_NB_CAD_L8 HT_CPU_NB_CAD_H9 HT_CPU_NB_CAD_L9 HT_CPU_NB_CAD_H10 HT_CPU_NB_CAD_L10 HT_CPU_NB_CAD_H11 HT_CPU_NB_CAD_L11 HT_CPU_NB_CAD_H12 HT_CPU_NB_CAD_L12 HT_CPU_NB_CAD_H13 HT_CPU_NB_CAD_L13 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H15 HT_CPU_NB_CAD_L15

HT_CPU_NB_CLK_H0 HT_CPU_NB_CLK_L0 HT_CPU_NB_CLK_H1 HT_CPU_NB_CLK_L1

HT_CPU_NB_CTL_H0 HT_CPU_NB_CTL_L0 HT_CPU_NB_CTL_H1 HT_CPU_NB_CTL_L1

R476 300/F_4 R476 300/F_4

HT_RXCALP HT_RXCALN

4

Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25

AC24 AC25 AB25 AB24 AA24 AA25

Y22

Y23 W 21 W 20

V21

V20

U20

U21

U19

U18

T22

T23

AB23 AA22

M22 M23 R21 R20

C23

A24

U14A

HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N

HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N

HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N

HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N

HT_RXCALP HT_RXCALN

RS780(RX780)

PART 1 OF 6

HYPER TRANSPORT CPU I/F

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N

HT_TXCTL0P

HT_TXCTL0N

HT_TXCTL1P

HT_TXCTL1N

HT_TXCALP HT_TXCALN

HT_NB_CPU_CAD_H0

D24

HT_NB_CPU_CAD_L0

D25

HT_NB_CPU_CAD_H1

E24

HT_NB_CPU_CAD_L1

E25

HT_NB_CPU_CAD_H2

F24

HT_NB_CPU_CAD_L2

F25

HT_NB_CPU_CAD_H3

F23

HT_NB_CPU_CAD_L3

F22

HT_NB_CPU_CAD_H4

H23

HT_NB_CPU_CAD_L4

H22

HT_NB_CPU_CAD_H5

J25

HT_NB_CPU_CAD_L5

J24

HT_NB_CPU_CAD_H6

K24

HT_NB_CPU_CAD_L6

K25

HT_NB_CPU_CAD_H7

K23

HT_NB_CPU_CAD_L7

K22

HT_NB_CPU_CAD_H8

F21

HT_NB_CPU_CAD_L8

G21

HT_NB_CPU_CAD_H9

G20

HT_NB_CPU_CAD_L9

H21

HT_NB_CPU_CAD_H10

J20

HT_NB_CPU_CAD_L10

J21

HT_NB_CPU_CAD_H11

J18

HT_NB_CPU_CAD_L11

K17

HT_NB_CPU_CAD_H12

L19

HT_NB_CPU_CAD_L12

J19

HT_NB_CPU_CAD_H13

M19

HT_NB_CPU_CAD_L13

L18

HT_NB_CPU_CAD_H14

M21

HT_NB_CPU_CAD_L14

P21

HT_NB_CPU_CAD_H15

P18

HT_NB_CPU_CAD_L15

M18

HT_NB_CPU_CLK_H0

H24

HT_NB_CPU_CLK_L0

H25

HT_NB_CPU_CLK_H1

L21

HT_NB_CPU_CLK_L1

L20

HT_NB_CPU_CTL_H0

M24

HT_NB_CPU_CTL_L0

M25

HT_NB_CPU_CTL_H1

P19

HT_NB_CPU_CTL_L1

R18

HT_TXCALP

B24

HT_TXCALN

B25

3

R641R655

R475 300/F_4 R475 300/F_4

2

HT_CPU_NB_CAD_H[15..0]

HT_CPU_NB_CAD_L[15..0]

HT_CPU_NB_CLK_H[1..0]

HT_CPU_NB_CLK_L[1..0]

HT_CPU_NB_CTL_H[1..0]

HT_CPU_NB_CTL_L[1..0]

HT_NB_CPU_CAD_H[15..0]

HT_NB_CPU_CAD_L[15..0]

HT_NB_CPU_CLK_H[1..0]

HT_NB_CPU_CLK_L[1..0]

HT_NB_CPU_CTL_H[1..0]

HT_NB_CPU_CTL_L[1..0]

HT_CPU_NB_CAD_H[15..0] 4

HT_CPU_NB_CAD_L[15..0] 4

HT_CPU_NB_CLK_H[1..0] 4

HT_CPU_NB_CLK_L[1..0] 4

HT_CPU_NB_CTL_H[1..0] 4

HT_CPU_NB_CTL_L[1..0] 4

HT_NB_CPU_CAD_H[15..0] 4

HT_NB_CPU_CAD_L[15..0] 4

HT_NB_CPU_CLK_H[1..0] 4

HT_NB_CPU_CLK_L[1..0] 4

HT_NB_CPU_CTL_H[1..0] 4

HT_NB_CPU_CTL_L[1..0] 4

signals RS780 RX780

HT_TXCALP

HT_TXCALN

HT_RXCALP

HT_RXCALN

R641 300 ohm 1%

R655 300 ohm 1%

R641

1.21k ohm 1%

R655

1.21k ohm 1%

1

11/4 modify

RES CHIP 1.21K 1/16W +-1%(0402) P/N : CS21212FB18

RES CHIP 300 1/16W +-1%(0402) P/N : CS13002FB00

08

A12 version RS780M AJ067400T05 100-CK2612(216-0674008-00) RS780MC AJ067400T06 100-CK2613(216-0674010-00) RX781 AJ067400T10 100-CK2642(215-0674024) SB700 AJA12FG0T18 100-CK2614(218S7EALA12FG)

U14D

4

AB12 AE16

V11 AE15 AA12 AB16 AB14

AD14 AD13 AD15 AC16

AE13

AC14

Y14

AD16

AE17

AD17

W

Y12

AD18

AB13 AB18

V14

V15

W 14

AE12

AD12

12

U14D

MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)

MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)

MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)

MEM_CKP(NC) MEM_CKN(NC)

MEM_COMPP(NC) MEM_COMPN(NC)

RS780(RX780)

A13 version RS780M AJ067400T18 100-CK2699(216-0674022) RS780MC AJ067400T20 100-CK2704(216-0674024) RX781 AJ067400T21 100-CK2706(215-0674034) A12 version SB700 AJA12FG0T18

B B

A A

5

This block is for UMA RS780 only , RX780 can remove all component

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P(NC) MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

IOPLLVDD18(NC)

IOPLLVDD(NC)

IOPLLVSS(NC)

MEM_VREF(NC)

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

+1.8_IOPLLVDD18_NB

AE23

+1.1V_IOPLLVDD

AE24

AD23

AE18

3

R480 R479 0_6 R479 0_6

IOPLLVDD- memory PLL not applicable to RX780

2/1 R480,R479 no stuff when RS780M without side port / RX781

0_6 R480 0_6

+1.8V

+1.1V_NB

4/24 stuff R480,R479

PROJECT : BD3G

Quanta Computer Inc.

Size D ocument Number R ev

Date: Sheet

2

Date: Sheet

Quanta Computer Inc.

RS740/RS780-HT LINK I/F 1/5

1

of

9 42Thursday, May 29, 2008

1A

5

U14B

PEG_RXP15 PEG_RXN15 PEG_RXP14 PEG_RXN14 PEG_RXP13 PEG_RXN13 PEG_RXP12 PEG_RXN12 PEG_RXP11 PEG_RXN11 PEG_RXP10

D D

25 PCIE_RXP0

24 PCIE_RXP2

PCIE_RXN2 24 25 PCIE_RXP3

C C

13 PCIE_SB_NB_RX0P 13 PCIE_SB_NB_RX0N 13 PCIE_SB_NB_RX1P 13 PCIE_SB_NB_RX1N 13 PCIE_SB_NB_RX2P 13 PCIE_SB_NB_RX2N 13 PCIE_SB_NB_RX3P

PCIE_SB_NB_RX3N 13

PEG_RXN10 PEG_RXP9 PEG_RXN9 PEG_RXP8 PEG_RXN8 PEG_RXP7 PEG_RXN7 PEG_RXP6 PEG_RXN6 PEG_RXP5 PEG_RXN5 PEG_RXP4 PEG_RXN4 PEG_RXP3 PEG_RXN3 PEG_RXP2 PEG_RXN2 PEG_RXP1 PEG_RXN1 PEG_RXP0 PEG_RXN0

PCIE_RXP0

PCIE_RXN0 25 PCIE_RXP1 25 PCIE_RXN1 25

PCIE_RXN3 25

PCIE_RXN0 PCIE_RXP1 PCIE_RXN1 PCIE_RXP2 PCIE_RXN2 PCIE_RXP3 PCIE_RXN3

U14B

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GFX_RX1N

C2

GFX_RX2P

C1

GFX_RX2N

E5

GFX_RX3P

F5

GFX_RX3N

G5

GFX_RX4P

G6

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

J6

GFX_RX6P

J5

GFX_RX6N

J7

GFX_RX7P

J8

GFX_RX7N

L5

GFX_RX8P

L6

GFX_RX8N

M8

GFX_RX9P

L8

GFX_RX9N

P7

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

RS780(RX780)

PART 2 OF 6

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP)

PCE_CALRN(PCE_BCALRN)

4

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P

GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2

AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5

AC8 AB8

C_PEG_TXP15 C_PEG_TXN15 C_PEG_TXP14 C_PEG_TXN14 C_PEG_TXP13 C_PEG_TXN13 C_PEG_TXP12 C_PEG_TXN12 C_PEG_TXP11 C_PEG_TXN11 C_PEG_TXP10 C_PEG_TXN10 C_PEG_TXP9 C_PEG_TXN9 C_PEG_TXP8 C_PEG_TXN8 C_PEG_TXP7 C_PEG_TXN7 C_PEG_TXP6 C_PEG_TXN6 C_PEG_TXP5 C_PEG_TXN5 C_PEG_TXP4 C_PEG_TXN4 C_PEG_TXP3 C_PEG_TXN3 C_PEG_TXP2 C_PEG_TXN2 C_PEG_TXP1 C_PEG_TXN1 C_PEG_TXP0 C_PEG_TXN0

PCIE_TXP0_C PCIE_TXN0_C PCIE_TXP1_C PCIE_TXN1_C PCIE_TXP2_C PCIE_TXN2_C PCIE_TXP3_C PCIE_TXN3_C

A_TX0P_CA_TX0P_C A_TX0N_CA_TX0N_C A_TX1P_CA_TX1P_C A_TX1N_CA_TX1N_C A_TX2P_C A_TX2N_C A_TX3P_C A_TX3N_C

NB_PCIECALRP NB_PCIECALRN

3

C587 EV@0.1u/10V_4 C587 EV@0.1u/10V_4 C586 EV@0.1u/10V_4 C586 EV@0.1u/10V_4 C589 EV@0.1u/10V_4 C589 EV@0.1u/10V_4 C588 EV@0.1u/10V_4 C588 EV@0.1u/10V_4 C591 EV@0.1u/10V_4C591 EV@0.1u/10V_4 C590 EV@0.1u/10V_4 C590 EV@0.1u/10V_4 C593 EV@0.1u/10V_4 C593 EV@0.1u/10V_4 C592 EV@0.1u/10V_4 C592 EV@0.1u/10V_4 C595 EV@0.1u/10V_4 C595 EV@0.1u/10V_4 C594 EV@0.1u/10V_4 C594 EV@0.1u/10V_4 C600 EV@0.1u/10V_4 C600 EV@0.1u/10V_4 C596 EV@0.1u/10V_4 C596 EV@0.1u/10V_4 C605 EV@0.1u/10V_4 C605 EV@0.1u/10V_4 C603 EV@0.1u/10V_4 C603 EV@0.1u/10V_4 C607 EV@0.1u/10V_4 C607 EV@0.1u/10V_4 C606 EV@0.1u/10V_4 C606 EV@0.1u/10V_4 C609 EV@0.1u/10V_4 C609 EV@0.1u/10V_4 C608 EV@0.1u/10V_4 C608 EV@0.1u/10V_4 C611 EV@0.1u/10V_4 C611 EV@0.1u/10V_4 C610 EV@0.1u/10V_4 C610 EV@0.1u/10V_4 C613 EV@0.1u/10V_4 C613 EV@0.1u/10V_4 C145 HDM@0.1u/10V_4 C145 HDM@0.1u/10V_4 C612 EV@0.1u/10V_4 C612 EV@0.1u/10V_4 C615 EV@0.1u/10V_4 C615 EV@0.1u/10V_4 C614 EV@0.1u/10V_4 C614 EV@0.1u/10V_4 C624 EV@0.1u/10V_4 C624 EV@0.1u/10V_4 C617 EV@0.1u/10V_4 C617 EV@0.1u/10V_4 C654 EV@0.1u/10V_4 C654 EV@0.1u/10V_4 C653 EV@0.1u/10V_4 C653 EV@0.1u/10V_4 C662 EV@0.1u/10V_4 C662 EV@0.1u/10V_4 C660 EV@0.1u/10V_4 C660 EV@0.1u/10V_4 C647 EV@0.1u/10V_4 C647 EV@0.1u/10V_4 C627 EV@0.1u/10V_4 C627 EV@0.1u/10V_4

C453 0.1u/10V_4 C453 0.1u/10V_4 C452 0.1u/10V_4 C452 0.1u/10V_4 C530 0.1u/10V_4 C530 0.1u/10V_4 C531 0.1u/10V_4 C531 0.1u/10V_4 C744 0.1u/10V_4 C744 0.1u/10V_4 C743 0.1u/10V_4 C743 0.1u/10V_4 C680 0.1u/10V_4 C680 0.1u/10V_4 C740 0.1u/10V_4 C740 0.1u/10V_4

C626 0.1u/10V_4 C626 0.1u/10V_4 C625 0.1u/10V_4 C625 0.1u/10V_4 C649 0.1u/10V_4 C649 0.1u/10V_4 C630 0.1u/10V_4 C630 0.1u/10V_4 C655 0.1u/10V_4 C655 0.1u/10V_4 C656 0.1u/10V_4 C656 0.1u/10V_4 C665 0.1u/10V_4 C665 0.1u/10V_4 C663 0.1u/10V_4 C663 0.1u/10V_4

R58 1.27K/F_4 R58 1.27K/F_4 R56 2K/F_4 R56 2K/F_4

PEG_TXP15 PEG_TXN15 PEG_TXP14 PEG_TXN14 PEG_TXP13 PEG_TXN13 PEG_TXP12 PEG_TXN12 PEG_TXP11 PEG_TXN11 PEG_TXP10 PEG_TXN10 PEG_TXP9 PEG_TXN9 PEG_TXP8 PEG_TXN8 PEG_TXP7 PEG_TXN7 PEG_TXP6 PEG_TXN6 PEG_TXP5 PEG_TXN5 PEG_TXP4 PEG_TXN4 PEG_TXP3 PEG_TXN3 PEG_TXP2 PEG_TXN2 PEG_TXP1 PEG_TXN1 PEG_TXP0 PEG_TXN0

PCIE_TXP0 25

PCIE_TXN0 25

PCIE_TXP1 25

PCIE_TXN1 25 PCIE_TXP2 24 PCIE_TXN2 24

PCIE_TXP3 25

PCIE_TXN3 25

PCIE_NB_SB_TX0P 13 PCIE_NB_SB_TX0N 13 PCIE_NB_SB_TX1P 13 PCIE_NB_SB_TX1N 13 PCIE_NB_SB_TX2P 13 PCIE_NB_SB_TX2N 13 PCIE_NB_SB_TX3P 13 PCIE_NB_SB_TX3N 13

+1.1V_NB

21 PEG_RXN[15:0]

PEG_RXP[15:0] 21

TO WLAN

TO MINI CARD

TO PCIE-LAN

TO EPRESS CARD

PEG_RXN[15:0]

PEG_RXP[15:0]

Close to North Bridge

C_PEG_TXP15 C_PEG_TXN15

C_PEG_TXP14 C_PEG_TXN14

C_PEG_TXP13 C_PEG_TXN13

C_PEG_TXP12 C_PEG_TXN12

2

PEG_TXN[15:0]

PEG_TXP[15:0]

PEG_TXN[15:0] 21

PEG_TXP[15:0] 21

BTO

Close to North Bridge

C159 HDM@0.1u/10V_4 C159 HDM@0.1u/10V_4 C160 HDM@0.1u/10V_4 C160 HDM@0.1u/10V_4

C152 HDM@0.1u/10V_4 C152 HDM@0.1u/10V_4 C158 HDM@0.1u/10V_4 C158 HDM@0.1u/10V_4

C150 HDM@0.1u/10V_4 C150 HDM@0.1u/10V_4

C140 HDM@0.1u/10V_4 C140 HDM@0.1u/10V_4 C144 HDM@0.1u/10V_4 C144 HDM@0.1u/10V_4

NOTE:

RS780MC no support Graphic / HDMI

1

IV_HDMITX2P 19

IV_HDMITX2N 19

IV_HDMITX1P 19

IV_HDMITX1N 19

IV_HDMITX0P 19

IV_HDMITX0N 19

IV_HDMICLK+ 19

IV_HDMICLK- 19

To HDMI CONN

9

11/4 modify

B B

A A

RX780/RS740/RS780 difference table (PCIE LINK)

NB_PCIECALRP

GPP4

GPP5

5

RS740 RX780/RS780

562R (GND)

NC

1.27K (GND)

GPP4

GPP5

RS780 Display Port Support (muxed on GFX)

DP0

DP1

4

GFX_TX0,TX1,TX2 and TX3

AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7

AUX1 and HPD1

PROJECT : BD3G

Quanta Computer Inc.

Size Doc ument Number Rev

Date: Sheet

Date: Sheet of

3

2

Date: Sheet of

Quanta Computer Inc.

RS740/RS780-PCIE I/F 2/5

1

of

10 42Thursday, May 29, 2008

1A

5

RX780: Powered from the 1.8-V rail and driven by SB600 LDT_RST#, or SB700 LDT_RST# or A_RST#. RS780: Powered from the 3.3-V rail and driven by SB600 LDT_RST#, or SB700 LDT_RST# or A_RST#.

RX780

CPU_LDT_RST# 4,13

RS780

D D

NB_PLTRST# 13

R30 *0_4 R30 *0_4

R31 0_4 R31 0_4

North Bridge RESET

10/26 change to 4 pin S-video conn , no need TV_comp

2/1 follow A13 request change R103 from 150 to 140 CS11402FB19

NB_RST#_IN

11/4 stuff R5160 for RS780M/MC/RX781

RX780

+1.1V_NB

10/9 add 2K pull up to DDCDAT /DDCCLK for RX780

R47 *2K/F_4 R47 *2K/F_4

R46 *2K/F_4 R46 *2K/F_4

INT_CRT_DDCDAT

INT_CRT_DDCCLK

11/4 no stuff for RS780M/MC/RX781

12/22 stuff R48 2.2K for power play

C C

+NB_CORE_ON

selects Loading of straps from EPROM 1 : use default vaule , default 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected RX780 --RS780_AUX_CAL RS780 -- SUS_ATAT

Enables Debug Bus acess through memory T/O pads and GPIO.

B B

1 : Enable RX780 , Default 0 : Disable RX780

R44 *10K/F_4 R44 *10K/F_4

R48 2.2K_4 R48 2.2K_4

+3V

RS780_AUX_CAL

INT_TV_C/R

RX780

R491 *3K_4 R491 *3K_4

RX780

R96 *3K_4 R96 *3K_4

Reserved only

12/22 stuff R65

Enables Debug Bus acess through memory T/O pads and GPIO. 1 : Enable RS780 , Default 0 : Disable RS780 (RS780 use VSYNC#)

Indicates if memory Side port is available or not 0: available RS780 , Default 1: Not available RS780 ( RS780 use HSYNC#)

A A

10/19 RS780M Databook rev 1.01 define High disable

5

INT_VSYNC

INT_HSYNC

RS780

R65 3K_4 R65 3K_4

R66 *3K_4 R66 *3K_4

RS780

R489 3K_4 R489 3K_4

R490 *3K_4 R490 *3K_4

4

18 INT_TV_C/R

INT_TV_Y/G 18

INT_CRT_RED 18

INT_CRT_GRN 18

INT_CRT_BLU 18

18 INT_HSYNC 18 INT_VSYNC

18 INT_CRT_DDCDAT

INT_CRT_DDCCLK 18

NB_PWRGD_IN 17

NBHT_REFCLKP 3

NBHT_REFCLKN 3

EXT_NB_OSC 3

+1.1V_NB

3 NBGFX_CLKP

NBGFX_CLKN 3

3 NBGPP_CLKP

NBGPP_CLKN 3

3 SBLINK_CLKP

SBLINK_CLKN 3

20 INT_LVDS_EDIDDATA

INT_LVDS_EDIDCLK 20

IV_HDMI_DDCDATA 19 IV_HDMI_DDCCLK 19

+3V

4

R95 IV@150/F_4 R95 IV@150/F_4 R89 IV@150/F_4 R89 IV@150/F_4 R84 *150/F_4 R84 *150/F_4

R103 IV@140/F_4 R103 IV@140/F_4

R99 IV@ 150/F_4 R99 IV@150/F_4

R102 IV@150/F_4 R102 IV@150/F_4

R79 IV@715/F_6 R79 IV@715/F_6

R50R50

RS780

4.7K_4 4.7K_4

+3V

BLM18PG221SN1D(220,1.4A)_6

AVDD-DAC Analog not applicable to RX780

+1.8V

BLM18PG221SN1D(220,1.4A)_6

C124

C124 10u/6.3V_8

10u/6.3V_8

PLLVDD18 - Graphics PLL not applicable to RX780

+1.8V

VDDA18PCIEPLL -PCIE PLL

BLM18PG221SN1D(220,1.4A)_6

R54R54

RS780

4.7K_4 4.7K_4

+NB_CORE_ON 35

L2

L12

2.2u/6.3V_6

L1

VDDA18HTPLL -HT LINK PLL

L13

BLM18PG221SN1D(220,1.4A)_6

R485 0_4 R485 0_4 R53 0_4 R53 0_4

INT_LVDS_EDIDDATA INT_LVDS_EDIDCLK IV_HDMI_DDCDATA IV_HDMI_DDCCLK

T145 T145 T144 T144

R49 0_4 R49 0_4

T143 T143

+3V_AVDD_NB

C104

2.2u/6.3V_6

+1.8V_PLLVDD18

C110

20mils width

+1.8V_VDDA18PCIEPLL

C79

2.2u/6.3V_6

20mils width

+1.8V_VDDA18HTPLL

C131

2.2u/6.3V_6

+3V_AVDD_NB

+1.8V_AVDDDI_NB

+1.8V_AVDDQ_NB

INT_TV_C/R INT_TV_Y/G INT_TV_COMP

INT_CRT_RED

INT_CRT_GRN

INT_CRT_BLU

INT_HSYNC INT_VSYNC INT_CRT_DDCDAT INT_CRT_DDCCLK

DAC_RSET_NBDAC_RSET_NB

+1.1V_PLLVDD +1.8V_PLLVDD18

+1.8V_VDDA18HTPLL

+1.8V_VDDA18PCIEPLL

NB_RST#_IN NB_PWRGD_IN NB_LDT_STOP# NB_ALLOW_LDTSTOP

NBHT_REFCLKP NBHT_REFCLKN

NB_REFCLK_P NB_REFCLK_N

NBGFX_CLKP NBGFX_CLKN

NBGPP_CLKP NBGPP_CLKN

SBLINK_CLKP SBLINK_CLKN

RS740_DFT_GPIO1

RS780_AUX_CAL

+1.1V_NB

+1.8V

3

U14C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

E8

DAC_SDA(PCE_TCALRN)

F8

DAC_SCL(PCE_RCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

E11 F11

T2 T1

U1 U2

V4 V3

A9 B9 B8 A8 B7 A7

STRP_DATA

B10

G11

C8

BLM18PG221SN1D(220,1.4A)_6

L52

R76 0_6 R76 0_6

BLM18PG221SN1D(220,1.4A)_6

L17

1/31 voltage leakage issue remove Q5,Q3,R83,R80,R97 stuff R88,R77

CPU_LDT_STOP# 4,13

CPU_LDT_REQ# 4

ALLOW_LDTSTOP 13

3

I

HT_REFCLKN

REFCLK_P/OSCIN(OSCIN) REFCLK_N(PWM_GPIO3)

GFX_REFCLKP

I/O

GFX_REFCLKN

GPP_REFCLKP

I/O

GPP_REFCLKN

GPPSB_REFCLKP(SB_REFCLKP) GPPSB_REFCLKN(SB_REFCLKN)

I2C_DATA I2C_CLK DDC_DATA/AUX0N(NC) DDC_CLK/AUX0P(NC) AUX1P(NC) AUX1N(NC)

STRP_DATA

RSVD

AUX_CAL(NC)

RS780(RX780)

+1.1V_PLLVDD

C646

2.2u/6.3V_6

+1.8V_AVDDDI_NB

C98

2.2u/6.3V_6

+1.8V_AVDDQ_NB

C136

2.2u/6.3V_6

Q5Q5 *BSS138_NL/SOT23 *BSS138_NL/SOT23

Q3Q3

*BSS138_NL/SOT23 *BSS138_NL/SOT23

R74 0_4 R74 0_4

PART 3 OF 6

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXCLK_LP(DBG_GPIO1)

TXCLK_LN(DBG_GPIO3) TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

PM

I

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

CLOCKs PLL PWR

MIS.

TVCLKIN(PWM_GPIO5)

THERMALDIODE_P

THERMALDIODE_N

PLLVDD - Graphics PLL not applicable to RX780

AVDDI-DAC Digital not applicable to RX780

AVDDQ-DAC Bandgap Reference not applicable to RX780

+1.8V +VDDG_NB

2

+1.8V

2

R77 0_4 R77 0_4

3

+VDDG_NB

3

1

R88 0_4 R88 0_4

RS780

1

RS780

TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L3P(NC)

TXOUT_U0P(NC) TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

VDDLTP18(NC)

VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

TMDS_HPD(NC)

HPD(NC)

TESTMODE

R83R83 *4.7K_4 *4.7K_4

NB_LDT_STOP#

R80R80 *4.7K_4 *4.7K_4

NB_ALLOW_LDTSTOP

2

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

+1.8V_VDDLTP18_NB

A13 B13

+1.8V_VDDLT_18_NB

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

TMDS_HPD0

D9

TMDS_HPD1

D10

SUS_STAT#_NB

D12

R_NB_THRMDA

AE8

R_NB_THRMDC

AD8

TEST_EN

D13

1/17 RX781 connect to GND C104,C110,C646,C98,C136,C103,C118 change to CS00003J951

+1.8V

L51

L10

2

INT_TXLOUT0+ 20 INT_TXLOUT0- 20 INT_TXLOUT1+ 20 INT_TXLOUT1- 20 INT_TXLOUT2+ 20 INT_TXLOUT2- 20

T139 T139 T137 T137

INT_TXUOUT0+ 20 INT_TXUOUT0- 20 INT_TXUOUT1+ 20 INT_TXUOUT1- 20 INT_TXUOUT2+ 20 INT_TXUOUT2- 20

T140 T140 T138 T138

INT_TXLCLKOUT+ 20 INT_TXLCLKOUT- 20 INT_TXUCLKOUT+ 20 INT_TXUCLKOUT- 20

+3V_VDLT33_NB

11/01 exchange LVDS_PWM /LVDS_BLON

R25 *1.27K/F_4 R25 *1.27K/F_4

R11 *1.27K/F_4 R11 *1.27K/F_4

R26

R26 IV@0_4

IV@0_4

T2 T2

R71 0_4 R71 0_4

T142 T142 T141 T141

R75R75

1.82K/F_4 1.82K/F_4

BLM18PG221SN1D(220,1.4A)_6

C103C103

2.2u/6.3V_6 2.2u/6.3V_6

BLM21PG221SN1D(220,100M,2A)_8

C118

0.1u/10V_4

4.7u/6.3V_6

RX780

RS780

+3V

*BLM21PG221SN1D(220,100M,2A)_8

VDDLT33 - LVDS or DVI/HDMI ANALOG RS740 only

Size Document Number Rev

Date: Sheet

INT_LVDS_DIGON 20 INT_LVDS_PWM 20 INT_LVDS_BLON 20

For RX780 only

IV_HDMI_HPD 19

SUS_STAT# 14

+1.8V_VDDLTP18_NB

VDDLTP18 - LVDS or DVI/HDMI PLL not applicable to RX780

+1.8V_VDDLT_18_NB

1/17 RX781 no stuff them

C115

L2,L12,C124,L52,R76,L17,L51,L10,C115

R100 *0_6 R100 *0_6

+1.8V +VDDG_NB

R97 *0_6 R97 *0_6

+3V

L9

1

VDDLT18 - LVDS or DVI/HDMI digital not applicable to RX780

+3V_VDLT33_NB

C108

*2.2u/6.3V_6

PROJECT : BD3G

Quanta Computer Inc.

RS740/RS780-SYSTEM I/F 3/5

1

10

of

11 42Thursday, May 29, 2008

1A

5

4

3

2

1

11

C807C807 *0.1u/10V_4 *0.1u/10V_4

12 42Thursday, May 29, 2008

+NB_CORE

of

1A

D11

E14

E15

J12

K14

L7

U14F

D D

C C

VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9

PART 6/6

VSSAHT1

VSSAHT2

A25

D23

VDDHTRX - HT LINK RX I/O for RX780/RS780

+1.2V 2A for RS780M+SB700

+1.2V

BLM21PG221SN1D(220,100M,2A)_8

+1.35V for A1-1 chip bug , A1-2 can remove

B B

VDDA18PCIE PCIE TX stage I/O for RX780/RS780

A A

+1.8V 1A for RS780M+SB700

+1.8V

BLM21PG221SN1D(220,100M,2A)_8

H7

VSSAPCIE10J4VSSAPCIE11R7VSSAPCIE12L1VSSAPCIE13L2VSSAPCIE14L4VSSAPCIE15

VSSAHT3

VSSAHT4

VSSAHT5

VSSAHT6

VSSAHT7

VSSAHT8

VSSAHT9

VSSAHT10

J22

L17

L22

E22

G22

VDDHT - HT LINK digital I/O for RX780/RS780

VDDHTTX - HT LINK TX I/O for RX780/RS780

L24

H19

G24

G25

L36

L3

VDD18 - RS780 I/O transform

5

VSSAPCIE16M6VSSAPCIE17N4VSSAPCIE18P6VSSAPCIE19R1VSSAPCIE20R2VSSAPCIE21R4VSSAPCIE22V7VSSAPCIE23U4VSSAPCIE24V8VSSAPCIE25V6VSSAPCIE26W1VSSAPCIE27W2VSSAPCIE28W4VSSAPCIE29W7VSSAPCIE30W8VSSAPCIE31Y6VSSAPCIE32

VSSAHT11

VSSAHT12

VSSAHT13

VSSAHT14

VSSAHT15

VSSAHT16

VSSAHT17

VSSAHT18

VSSAHT19

VSSAHT21

VSSAHT22

VSSAHT23

VSSAHT24

VSSAHT25

VSSAHT20

L25

N22

M20

+1.1V_NB

0.6A

0.45A

P20

V19

R19

R22

R24

R25

U22

H20

W22

W24

W25

+1.1V 2A for RS780M

L11

L11 BLM21PG221SN1D(220,100M,2A)_8

BLM21PG221SN1D(220,100M,2A)_8

L18

L18 BLM21PG221SN1D(220,100M,2A)_8

BLM21PG221SN1D(220,100M,2A)_8

0.5A

C601C601

4.7U/6.3V_6 4.7U/6.3V_6

12/14 del L15 stuff L36 for A12

600mA

C95C95

C94C94

4.7U/6.3V_6 4.7U/6.3V_6

+1.8V

VDD18_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform

+1.8V

GROUND

VSSAHT26

VSSAHT27

VSS11

VSS12

VSS13

L12

Y21

N13

M14

AD25

C121C121

4.7U/6.3V_6 4.7U/6.3V_6

C143C143

4.7U/6.3V_6 4.7U/6.3V_6

C117C117

0.1u/10V_4 0.1u/10V_4

C93C93

0.1u/10V_4 0.1u/10V_4

R70 0_6 R70 0_6

R484 0_6 R484 0_6

AA4

VSS14

P12

AB5

AB1

VSSAPCIE33

VSSAPCIE34

VSS15

VSS16

P15

R11

C126C126

0.1u/10V_4 0.1u/10V_4

AB7

VSSAPCIE35

VSS17

R14

AC3

T12

0.005A

C89

C89 1u/10V_4

1u/10V_4

0.005A

AE14

AC4

AE1

AE4

AB2

VSS2

VSS1

VSSAPCIE36

VSSAPCIE37

VSSAPCIE38

VSSAPCIE39

VSSAPCIE40

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

V12

U14

C114C114

0.1u/10V_4 0.1u/10V_4

C125C125

0.1u/10V_4 0.1u/10V_4

C90C90

0.1u/10V_4 0.1u/10V_4

AA14

U11

U15

W11

W15

AC12

+1.1V_VDDHT

C116C116

0.1u/10V_4 0.1u/10V_4

+1.1V_VDDHTRX

C142C142

0.1u/10V_4 0.1u/10V_4

+1.2V_VDDHTTX

C120C120

0.1u/10V_4 0.1u/10V_4

+1.8V_VDDA18PCIE

C88C88

0.1u/10V_4 0.1u/10V_4

C616C616 *1u/10V_4 *1u/10V_4

1/17 RX781 no stuff them R484

1/17 RX781 connect to GND C616 change to CS00002JB38

4

M11

J15

VSS3G8VSS4

VSS5

VSS7

VSS8

VSS6

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

Y18

AB11

AB15

AB17

AB19

AE20

AB21

C123C123

0.1u/10V_4 0.1u/10V_4

C141C141

0.1u/10V_4 0.1u/10V_4

C129C129

0.1u/10V_4 0.1u/10V_4

C91C91

0.1u/10V_4 0.1u/10V_4

+1.8V_VDDG18_NB

+1.8V_VDD18_MEM

L15

VSS9

VSS10

VSS34

VSS33

K11

U14E

J17

VDDHT_1

K16

VDDHT_2

L16

VDDHT_3

M16

VDDHT_4

P16

VDDHT_5

R16

VDDHT_6

T16

VDDHT_7

H18

VDDHTRX_1

G19

VDDHTRX_2

F20

VDDHTRX_3

E21

VDDHTRX_4

D22

VDDHTRX_5

B23

VDDHTRX_6

A23

VDDHTRX_7

AE25

VDDHTTX_1

AD24

VDDHTTX_2

AC23

VDDHTTX_3

AB22

VDDHTTX_4

AA21

VDDHTTX_5

Y20

VDDHTTX_6

W

19

VDDHTTX_7

V18

VDDHTTX_8

U17

VDDHTTX_9

T17

VDDHTTX_10

R17

VDDHTTX_11

P17

VDDHTTX_12

M17

VDDHTTX_13

J10

VDDA18PCIE_1

P10

VDDA18PCIE_2

K10

VDDA18PCIE_3

M10

VDDA18PCIE_4

L10

VDDA18PCIE_5

W9

VDDA18PCIE_6

H9

VDDA18PCIE_7

T10

VDDA18PCIE_8

R10

VDDA18PCIE_9

Y9

VDDA18PCIE_10

AA9

VDDA18PCIE_11

AB9

VDDA18PCIE_12

AD9

VDDA18PCIE_13

AE9

VDDA18PCIE_14

U10

VDDA18PCIE_15

F9

VDDG18_1(VDD18_1)

G9

VDDG18_2(VDD18_2)

AE11

VDD18_MEM1(NC)

AD11

VDD18_MEM2(NC)

RS780(RX780)

PART 5/6

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_10 VDDC_11

POWER

VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDDG33_1(NC) VDDG33_2(NC)

3

PIN NAME

VDDHT

VDDHTRX

VDDHTTX

VDDA18PCIE

VDD18_MEM

VDDPCIE

VDDC

VDD_MEM

VDDG33

IOPLLVDD18

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9

RX780/RS780 POWER DIFFERENCE TABLE

RX780

+1.1V

+1.2V

+1.8V

+1.8VVDDG18

NC

+1.1V +1.1V +1.8V

+1.1V

+1.8V/1.5V

NC

+1.1V_VDD_PCIE

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

C77C77

0.1u/10V_4 0.1u/10V_4

C96C96

0.1u/10V_4 0.1u/10V_4

C102C102

0.1u/10V_4 0.1u/10V_4

+1.8V_VDD_MEM

+3V_VDDG33

C92C92

0.1u/10V_4 0.1u/10V_4

PIN NAME

RS780

IOPLLVDD

+1.1V

+1.2V

AVDDDI

AVDDQ

+1.8V

PLLVDD

+1.8V

PLLVDD18

VDDA18PCIEPLL

+1.1V

VDDA18HTPLL

VDDLTP18

VDDLT18

+3.3V

VDDLT33

+1.8VNC

C86

C85C85

1u/10V_4

0.1u/10V_4 0.1u/10V_4

C111C111

C100C100

0.1u/10V_4 0.1u/10V_4

C109C109

0.1u/10V_4 0.1u/10V_4

10/18 follow AMD design guide 1.0

1.8V(0.15A)

R27 0_6 R27 0_6

C99C99

0.1u/10V_4 0.1u/10V_4

RX780 RS780

NC

+1.1V

NC

+3.3VAVDD

NC +1.8V

NC

+1.1V

NC

+1.8V

NC

+1.8V

NC

0.7A

C76

C76 1u/10V_4

1u/10V_4

C105C105

0.1u/10V_4 0.1u/10V_4

C113C113

0.1u/10V_4 0.1u/10V_4

R67 *0_6 R67 *0_6

R57 0_6 R57 0_6

RS780

3.3V(0.03A)

VDD33 - 3.3V I/O Not applicable to RX780

2

VDDPCIE - PCIE-E Main power

R55 0_8 R55 0_8

C78C78

4.7U/6.3V_6 4.7U/6.3V_6

2/13 EMI stuff C804~C807 for +NB_CORE

VDDC - Core Logic power

7A

C598

10u/6.3V_8

C597

10u/6.3V_8

+1.8V

Size D ocument Number R ev

Date: Sheet

+1.1V_NB

C804C804

C805C805 *0.1u/10V_4 *0.1u/10V_4

C806C806

0.1u/10V_4 0.1u/10V_4

5/28 del C805,C807

VDD_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform

+3V

PROJECT : BD3G

Quanta Computer Inc.

RS740/RS780-POWER5/5

5

4

3

2

1

2/4 reserve C800 PLTRST#

Q33

Q33 MMBT3904

MMBT3904

13

2

12

+3V

C317

1u/10V_4

of

13 42Thursday, May 29, 2008

C316

0.1u/10V_4

1A

NB_PLTRST# 11

C800

PLTRST#

*.1U_4

D D

PLACE THESE PCIE AC COUPLING CAPS CLOSE TO U600

+1.2V

PLTRST# 19,21,24,25,27,29

10 PCIE_SB_NB_RX0P

PCIE_SB_NB_RX0N 10 10 PCIE_SB_NB_RX1P 10 PCIE_SB_NB_RX1N

PCIE_SB_NB_RX2P 10

PCIE_SB_NB_RX2N 10 10 PCIE_SB_NB_RX3P

PCIE_SB_NB_RX3N 10

PCIE_NB_SB_TX0P 10

To RS780

PCIE_NB_SB_TX0N 10

10 PCIE_NB_SB_TX1P

PCIE_NB_SB_TX1N 10 10 PCIE_NB_SB_TX2P 10 PCIE_NB_SB_TX2N

PCIE_NB_SB_TX3P 10

PCIE_NB_SB_TX3N 10

+1.2V_PCIE_VDDR

L27 BLM18PG221SN1D(220,1.4A)_6 L27 BLM18PG221SN1D(220,1.4A)_6

PCIE_PVDD-- PCIE PLL POWER

C C

SBSRC_CLKP 3 SBSRC_CLKN 3

B B

Y3

R341

*20M_6

A A

4

32.768KHZ

R339 20M_6 R339 20M_6

C474

C474 18p/50V_4

18p/50V_4

RTC_X1

10/18 AMD suggest to not connect to GND

23

RTC_X2

1

C473

C473 18p/50V_4

18p/50V_4

+1.8V

+1.8VSUS

11 ALLOW_LDTSTOP

4 CPU_PROCHOT_SB#

CPU_PWRGD 4

CPU_LDT_STOP# 4,11

CPU_LDT_RST# 4,11

1/31 voltage leakage remove R349

5

R160 33_4 R160 33_4 R165 33_4 R165 33_4

C509 0.1u/10V_4 C509 0.1u/10V_4 C512 0.1u/10V_4 C512 0.1u/10V_4 C510 0.1u/10V_4 C510 0.1u/10V_4 C508 0.1u/10V_4 C508 0.1u/10V_4 C502 0.1u/10V_4 C502 0.1u/10V_4 C507 0.1u/10V_4 C507 0.1u/10V_4 C500 0.1u/10V_4 C500 0.1u/10V_4 C504 0.1u/10V_4 C504 0.1u/10V_4

R363 562/F_4 R363 562/F_4 R360 2.05K/F_4 R360 2.05K/F_4

T80 T80 T71 T71

T119 T119 T118 T118

T69 T69 T64 T64

T120 T120 T87 T87

T110 T110 T108T108

T111 T111 T75 T75

T72 T72 T66 T66

T65 T65 T60 T60

T103 T103

R254 *10K/F_4 R254 *10K/F_4

R349 *10K/F_4 R349 *10K/F_4

PCIE_NB_SB_TX0P PCIE_NB_SB_TX0N PCIE_NB_SB_TX1P PCIE_NB_SB_TX1N PCIE_NB_SB_TX2P PCIE_NB_SB_TX2N PCIE_NB_SB_TX3P PCIE_NB_SB_TX3N

C321

C321 10u/6.3V_8

10u/6.3V_8

ALLOW_LDTSTOP CPU_PROCHOT_SB# CPU_PWRGD CPU_LDT_STOP# CPU_LDT_RST#

A_RST#_SB

A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C A_RX2P_C A_RX2N_C A_RX3P_C A_RX3N_C

PCIE_CALRP_SB PCIE_CALRN_SB

+1.2V_PCIE_PVDD

40mA

C322

C322 1u/10V_4

1u/10V_4

SBSRC_CLKPSBSRC_CLKPSBSRC_CLKPSBSRC_CLKP SBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKN

NB_DISP_CLKP NB_DISP_CLKN

NB_HT_CLKP NB_HT_CLKN

CPU_HT_CLKP CPU_HT_CLKN

SLT_GFX_CLKP SLT_GFX_CLKN

GPP_CLK0P GPP_CLK0N

GPP_CLK1P GPP_CLK1N

GPP_CLK2P GPP_CLK2N

GPP_CLK3P GPP_CLK3N

T78 T78

T85 T85

RTC_X1

RTC_X2

4

U6A

N2

A_RST#

V23

PCIE_TX0P

V22

PCIE_TX0N

V24

PCIE_TX1P

V25

PCIE_TX1N

U25

PCIE_TX2P

U24

PCIE_TX2N

T23

PCIE_TX3P

T22

PCIE_TX3N

U22

PCIE_RX0P

U21

PCIE_RX0N

U19

PCIE_RX1P

V19

PCIE_RX1N

R20

PCIE_RX2P

R21

PCIE_RX2N

R18

PCIE_RX3P

R17

PCIE_RX3N

T25

PCIE_CALRP

T24

PCIE_CALRN

P24

PCIE_PVDD

P25

PCIE_PVSS

N25

PCIE_RCLKP/NB_LNK_CLKP

N24

PCIE_RCLKN/NB_LNK_CLKN

K23

NB_DISP_CLKP

K22

NB_DISP_CLKN

M24

NB_HT_CLKP

M25

NB_HT_CLKN

P17

CPU_HT_CLKP

M18

CPU_HT_CLKN

M23

SLT_GFX_CLKP

M22

SLT_GFX_CLKN

J19

GPP_CLK0P

J18

GPP_CLK0N

L20

GPP_CLK1P

L19

GPP_CLK1N

M19

GPP_CLK2P

M20

GPP_CLK2N

N22

GPP_CLK3P

P22

GPP_CLK3N

L18

25M_48M_66M_OSC

J21

25M_X1

J20

25M_X2

A3

X1

B3

X2

F23

ALLOW_LDTSTP

F24

PROCHOT#

F22

LDT_PG

G25

LDT_STP#

G24

LDT_RST#

SB700

IC CTRL(528P) SB700 A11(218S7EALA11FG) P/N : AJALA110T00

100MHZ

RTC XTAL

SB700

Part 1 of 5

PCI EXPRESS INTERFACE

CPU

PCI CLKS

PCI INTERFACE

CLOCK GENERATOR

LPC

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

INTRUDER_ALERT#

RTC

PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4

PCICLK5/GPIO41

PCIRST#

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8

AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0# REQ1# REQ2#

REQ3#/GPIO70 REQ4#/GPIO71

GNT0# GNT1# GNT2#

GNT3#/GPIO72 GNT4#/GPIO73

CLKRUN#

LOCK#

INTE#/GPIO33

INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

SERIRQ

RTCCLK

VBAT

3

P4 P3 P1 P2 T4 T3

N1

U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3 Y2 AA2 AB4 AA1 AB3 AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5

AD3 AC4 AE2 AE3

G22 E22 H24 H23 J25 J24 H25 H22 AB8 AD7 V15

C3 C2 B2

PORT_C#

PE_GPIO1

PCI_CLK0_R

PCI_CLK2_R PCI_CLK3_R PCI_CLK4_R PCI_CLK5_R

PCIRST#_L

R367 33_4 R367 33_4

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

T53 T53 T52 T52

T131 T131 T44 T44

T45 T45

T133 T133 T135 T135 T46 T46 T134 T134

CLKRUN#_R

T54 T54

INTE# INTF#

T132 T132

INTG# INTH#

T130 T130

LPC_CLK0 LPC_CLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0#_SB LDRQ1#_SB SB_GPIO65 SERIRQ

RTC_CLK INTRUDER_ALERT# VCCRTC

R396 22_4 R396 22_4

R369 22_4 R369 22_4 R394 22_4 R394 22_4 R424 22_4 R424 22_4 R408 22_4 R408 22_4

CBE0# 26 CBE1# 26 CBE2# 26 CBE3# 26 FRAME# 26 DEVSEL# 26 IRDY# 26 TRDY# 26 PAR 26 STOP# 26

REQ0# 26

PORT_C# 22

GNT0# 26

R437 0_4 R437 0_4

R435 0_4 R435 0_4

R251 22_4 R251 22_4 R348 22_4 R348 22_4

T81 T81 T51 T51 T47 T47

T107 T107

T58 T58

PCIRST#

AD[0..31] 17,26

All the PCI bus has build-in Pull-UP/Down resistors

RTC

25,29 25,29

2

D7 CH500H-40 D7 CH500H-40

CLKRUN# 26,29

+3VPCU

LAD0 25,29 LAD1 25,29 LAD2 LAD3 LFRAME# 25,29

SERIRQ 29

RTC_CLK 17

PCLK_OZ129 26

PCI_CLK2 17 PCI_CLK3 17 PCI_CLK4 17 PCI_CLK5 17

PCIRST# 25,26

INTE# 26

FM_INTX 28

PCLK_591 17,29 PCLK_DBC 17,25

VCCRTC

C486

0.1u/10V_4

A11 default PCICLK5 A12 default GPIO41

PE_GPIO1

R209 8.2K_4 R209 8.2K_4

R212 *8.2K_4 R212 *8.2K_4

SB_GPIO65

R202 100K/F_4 R202 100K/F_4

Maybe can remove

4/16 change RTC pad location to G1

VCCRTC

D10

D10 CH500H-40

CH500H-40

R238

R238 1K_6

1K_6

CN24

1

2

ACS_85204-0200L

+5VPCU

R571+R667 = (5V - 0.2V-2V)/0.2mA = 14k

R302R302

2K/F_4 2K/F_4

R332R332

6.8K_4 6.8K_4

R333

15K_6

1/17 R301,R302 change from 8.66k to 2k. R332 change from 4.7K to 6.8K

Size D ocument Number R ev

Date: Sheet

12

G1

*SHORT_PAD

R350

0_4

VCCRTC_3

R301R301

2K/F_4 2K/F_4

PROJECT : BD3G

Quanta Computer Inc.

SB700-PCIE/PCI/CPU/LPC 1/4

1

5

+3V_S5

NC only ,Can't be install

R249 *2.2K_4 R249 *2.2K_4

R258 *2.2K_4 R258 *2.2K_4

R255 *2.2K_4 R255 *2.2K_4

+3V_S5

D D

C C

R253 *10K/F_4 R253 *10K/F_4

+3V

SCL0/SDATA0 is 3V tolerance AMD datasheet define it

R166 2.2K_4 R166 2.2K_4

R167 2.2K_4 R167 2.2K_4

+3V_S5

SCL1/SDATA1 is 3V/S5 tolerance AMD datasheet define it

R362 2.2K_4 R362 2.2K_4 R361 2.2K_4 R361 2.2K_4

+3V_S5

SCL2/SDATA2 is 3V/S5 tolerance AMD datasheet define it

R261 2.2K_4 R261 2.2K_4 R263 2.2K_4 R263 2.2K_4

+3V_S5

R719 10K_4 R719 10K_4 R284 0_4 R284 0_4

SB_TEST0

SB_TEST1

SB_TEST2

SWI#

PCLK_SMB

PDAT_SMB

SB_SMBCLK1 SB_SMBDATA1

SB_SCLK2 SB_SDATA2

USB_OC5#

11/01 chagne +3VSUS to +3V_S5

10/31 add newcard DET#

Clock gen /DDR2 /MINI CARD/NEW CARD

11 SUS_STAT#

4 CPU_THERMTRIP#

28 FM_CLOCK

3,7,8,25 PCLK_SMB

4/16 pull up USB_OC5# R719

CPU_MEMHOT# 4,8

1/31 NEW_DET# change from GEVEN5# to GPM1#

+3V

R358 4.7K_4 R358 4.7K_4

G2

12

*SHORT_ PAD1

B B

ACZ_SDOUT

ACZ_SYNC

ACZ_BCLK

ACZ_RST#

ACZ_SDIN0_R

A A

To Azalia

R364 33_4 R364 33_4

R239 33_4 R239 33_4

R241 BK1005HM121-T_4 R241 BK1005HM121-T_4

R357 33_4 R357 33_4

R243 0_4 R243 0_4

12/21EMI change R241from 33 to BK1005HM121-T

+3V

stff C309 22p

R233

10K_4

LOW_DET

R236

High : Main Strem Low : Low Cost

*1K_4

12/7 add D57,D58 to avoid voltage leakage

SUS_STAT#

SYS_RST#

C501 *10p/50V_4 C501 *10p/50V_4

C296 *10p/50V_4 C296 *10p/50V_4

C309 22P/50V_4 C309 22P/50V_4

LOW_DET 28

5

ACZ_SDOUT_AUDIO 22

ACZ_SYNC_AUDIO 22

BIT_CLK_AUDIO 22

ACZ_RST#_AUDIO 22

ACZ_SDIN0 22

+3V

R292

10K_4

FM_DET

High : W/O FM Low : W FM

1/31 voltage leakage BOARD_ID4 change from GPIO66 to GPIO3

BOARD_ID3 15

BOARD_ID2 15

BOARD_ID4 15

FM_DET 28

4

PCI_PME# 26

SB_PWRGD_IN 17

PCIE_WAKE# 24,25

WD_PWRGD 17

T112 T112

T61 T61

SUSB# 29 SUSC# 29

DNBSWON# 29

GATEA20 29

RCIN# 29

SCI# 29

T117 T117

T174 T174

T114 T114

RSMRST# 29

T127 T127

FM_DATA 28 PCBEEP 22

PDAT_SMB 3,7,8,25

PDMA66 27

LOW_DET 28

10/26 modify it 11/06 check it

D29 CH501H-40PT D29 CH501H-40PT

21

T102 T102

USBOC#3 28,29

T83 T83

NEW_DET# 25 USBOC#0 28,29

T67 T67

T56 T56

T121 T121

ACZ_RST# 17

R230 0_4 R230 0_4

R226 0_4 R226 0_4

D57 BAS316 D57 BAS316

D58 BAS316 D58 BAS316

ACZ_BCLK ACZ_SDOUT ACZ_SDIN0_R

ACZ_SDIN1_R

ACZ_SYNC

ACZ_RST#

HD audio interface is

3.3V voltage

10/25 modify it

HDD_AUX_RST# 27

BOARD_ID3

BOARD_ID2

BOARD_ID4

R227 *1K_4 R227 *1K_4

R228 *1K_4 R228 *1K_4

R229 IV@1K_4 R229 IV@1K_4

R248 *1K_4 R248 *1K_4

R343 *1K_4 R343 *1K_4

12/4 change PD from 10K to 1K

4

RI# SLP_S2 SUSB# SUSC# DNBSWON# SB_PWRGD_IN SUS_STAT# SB_TEST2 SB_TEST1 SB_TEST0 GATEA20 RCIN# SCI#

KBSMI#

SYS_RST# PCIE_WAKE#

SWI# CPU_THERMTRIP# WD_PWRGD

RSMRST#

G-sensor

BOARD_ID1 BOARD_ID0

PCLK_SMB PDAT_SMB SB_SMBCLK1 SB_SMBDATA1

FM_DET

LOW_DET

CPU_MEMHOT#_IN

R689 0_4 R689 0_4

+1.8V

R285

20K_4

MB ID

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

USB_OC5#

3

U6D

E1

PCI_PME#/GEVENT4#

E2

RI#/EXTEVNT0#

H7

SLP_S2/GPM9#

F5

SLP_S3#

G1

SLP_S5#

H2

PWR_BTN#

H1

PWR_GOOD

K3

SUS_STAT#

H5

TEST2

H4

TEST1

H3

TEST0

Y15

GA20IN/GEVENT0#

W 15

KBRST#/GEVENT1#

K4

LPC_PME#/GEVENT3#

K24

LPC_SMI#/EXTEVNT1#

F1

S3_STATE/GEVENT5#

J2

SYS_RESET#/GPM7#

H6

WAKE#/GEVENT8#

F2

BLINK/GPM6#

J6

SMBALERT#/THRMTRIP#/GEVENT2#

W 14

NB_PWRGD

D3

RSMRST#

AE18

SATA_IS0#/GPIO10

AD18

CLK_REQ3#/SATA_IS1#/GPIO6

AA19

SMARTVOLT/SATA_IS2#/GPIO4

W 17

CLK_REQ0#/SATA_IS3#/GPIO0

V17

CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39

W 20

CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40

W 21

SPKR/GPIO2

AA18

SCL0/GPOC0#

W 18

SDA0/GPOC1#

K1

SCL1/GPOC2#

K2

SDA1/GPOC3#

AA20

DDC1_SCL/GPIO9

Y18

DDC1_SDA/GPIO8

C1

LLB#/GPIO66

Y19

SHUTDOWN#/GPIO5

G5

DDR3_RST#/GEVENT7#

B9

USB_OC6#/IR_TX1/GEVENT6#

B8

USB_OC5#/IR_TX0/GPM5#

A8

USB_OC4#/IR_RX0/GPM4#

A9

USB_OC3#/IR_RX1/GPM3#

E5

USB_OC2#/GPM2#

F8

USB_OC1#/GPM1#

E4

USB_OC0#/GPM0#

M1

AZ_BITCLK

M2

AZ_SDOUT

J7

AZ_SDIN0/GPIO42

J8

AZ_SDIN1/GPIO43

L8

AZ_SDIN2/GPIO44

M3

AZ_SDIN3/GPIO46

L6

AZ_SYNC

M4

AZ_RST#

L5

AZ_DOCK_RST#/GPM8#

H19

IMC_GPIO0

H20

IMC_GPIO1

H21

SPI_CS2#/IMC_GPIO2

F25

IDE_RST#/F_RST#/IMC_GPO3

D22

IMC_GPIO4

E24

IMC_GPIO5

E25

IMC_GPIO6

D23

IMC_GPIO7

SB700

10/25 Board ID define MXM

+3V

R232 10K_4 R232 10K_4

R223 10K_4 R223 10K_4

R225 EV@10K_4 R225 EV@10K_4

R246 TV@10K_4 R246 TV@10K_4

R342 HDM@10K_4 R342 HDM@10K_4

3

Part 4 of 5

USBCLK/14M_25M_48M_OSC

USB MISC

USB 1.1

USB 2.0

GPIO

IMC_PWM0/IMC_GPIO10

SCL2/IMC_GPIO11

SDA2/IMC_GPIO12 SCL3_LV/IMC_GPIO13 SDA3_LV/IMC_GPIO14

IMC_PWM1/IMC_GPIO15

IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17

INTEGRATED uC

HD AUDIO

SB700

USB OC

INTEGRATED uC

ACPI / WAKE UP EVENTS

MB ID Selection Table

NEW CARD

CARD BUS

CCFL Panel

LED Panel

W/ MXM

W/O MXM

W/ S-VIDEO

W/O S-VIDEO

W/ HDMI

W/O HDMI

USB_RCOMP

USB_FSD13P USB_FSD13N

USB_FSD12P USB_FSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

IMC_GPIO8 IMC_GPIO9

IMC_GPIO18 IMC_GPIO19 IMC_GPIO20 IMC_GPIO21 IMC_GPIO22 IMC_GPIO23 IMC_GPIO24 IMC_GPIO25

IMC_GPIO26 IMC_GPIO27 IMC_GPIO28 IMC_GPIO29 IMC_GPIO30 IMC_GPIO31 IMC_GPIO32 IMC_GPIO33 IMC_GPIO34 IMC_GPIO35 IMC_GPIO36 IMC_GPIO37 IMC_GPIO38 IMC_GPIO39 IMC_GPIO40 IMC_GPIO41

ID4

H

L

C8

G8

E6 E7

F7 E8

H11 J10

E11 F11

A11 B11

C10 D10

G11 H12

E12 E14

C12 D12

B12 A12

G12 G14

H14 H15

A13 B13

B14 A14

A18 B18 F21 D21 F19 E20 E21 E19 D19 E18

G20 G21 D25 D24 C25 C24 B25 C23

B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18

H

L

2

CLK_48M_USB

USB_RCOMP_SB

USB_FSD13P USB_FSD13N

USB_FDS12P USB_FSD12N

C_USBP7+ C_USBP7-

C_USBP0+ C_USBP0-

C_USBP3+ C_USBP3-

C_USBP2+ C_USBP2-

SB_SCLK2 SB_SDATA2 SB_SCLK3 SB_SDATA3

SB_GPIO16 SB_GPIO17

ID2ID3

H

L

2

13

CLK_48M_USB 3

R247 11.8K/F_6 R247 11.8K/F_6

T77 T77 T94 T94

T73 T73 T82 T82

T74 T74

R245 0_4 R245 0_4 R244 0_4 R244 0_4

T68 T68

USBP7+ 27

NEW_USBP6+ 25 NEW_USBP6- 25

BT_USBP8+ 28 BT_USBP8- 28

FP_USBP4+ 28 FP_USBP4- 28

0_4 R283 0_4

USBP1+ 28 USBP1- 28

USBP9+ 28 USBP9- 28

SB_GPIO16 17 SB_GPIO17 17

USBP7- 27

To New Card

USBP0+ 28 USBP0- 28

To Bluetooth

To Finger Printer

WL_USBP3+ 25 WL_USBP3- 25

CCD_USBP2+ 20 CCD_USBP2- 20

To USB BOARD

SB_SCLK2 19 SB_SDATA2 19 SB_SCLK3 4 SB_SDATA3 4

SPI/LPC define

3/3 del Mini card USB10,Felica USB5 , change BT to port5 , ESATA to port 10

R274 0_4 R274 0_4 R280 0_4 R280 0_4

R265 0_4 R265 0_4 R267 0_4 R267 0_4

R283

ID0ID1Board ID

H

L

H

L

Size Document Number Rev

Date: Sheet

CLK_48M_USB

R257R257 *10_6 *10_6

C339C339 *10p/50V_4 *10p/50V_4

for EMI

To M/B USB/ESATA

To M/B USB

To WLAN

To Camera

10/18 USB swap for layout route

PROJECT : BD3G

Quanta Computer Inc.

SB700-ACPI/GPIO/USB 2/4

1

10/25 change M.B USB to port 6/7

1A

of

14 42Thursday, May 29, 2008

1

5

SATA PORT 0,1,2,3 can support AHCI mode

D D

SATA2

E-SATA

SATA1

2/22 change SATA ODD from port3 to port4 (solve ODD post detect fail)

ODD

C C

27 SATA_TXP0

SATA_TXN0 27

27 SATA_TXP1

SATA_TXN1 27

27 SATA_TXP2

SATA_TXN2 27

SATA_TXP3 27 SATA_TXN3 27

SATA PORT 4,5 are only support IDE mode

C267 0.01u/16V_4 C267 0.01u/16V_4 C266 0.01u/16V_4 C266 0.01u/16V_4

27 SATA_RXN0

SATA_RXP0 27

C268 0.01u/16V_4 C268 0.01u/16V_4 C269 0.01u/16V_4 C269 0.01u/16V_4

SATA_RXN1 27 SATA_RXP1 27

C255 0.01u/16V_4 C255 0.01u/16V_4 C252 0.01u/16V_4 C252 0.01u/16V_4

SATA_RXN2 27 SATA_RXP2 27

C262 0.01u/16V_4 C262 0.01u/16V_4 C265 0.01u/16V_4 C265 0.01u/16V_4

27 SATA_RXN3

SATA_RXP3 27

PLACE SATA_CAL RES VERY CLOSE TO BALL OF SB700

NOTE:

R361 IS 1K 1% FOR 25MHz XTAL, 4.99K 1% FOR 100MHz INTERNAL CLOCK

12/8 change from 10p to 27p

B B

4

PLACE SATA AC COUPLING CAPS CLOSE TO SB700

SATA_TXP0_R SATA_TXN0_R

C261 0.01u/16V_4 C261 0.01u/16V_4 C259 0.01u/16V_4 C259 0.01u/16V_4

SATA_TXP1_R SATA_TXN1_R

C275 0.01u/16V_4 C275 0.01u/16V_4 C280 0.01u/16V_4 C280 0.01u/16V_4

SATA_TXP2_R SATA_TXN2_R

C277 0.01u/16V_4 C277 0.01u/16V_4 C276 0.01u/16V_4 C276 0.01u/16V_4

SATA_TXP3_R SATA_TXN3_R

C278 0.01u/16V_4 C278 0.01u/16V_4 C279 0.01u/16V_4 C279 0.01u/16V_4

R205 1K/F_4 R205 1K/F_4

R361

R220 4.99/F_4 R220 4.99/F_4 R215 4.99/F_4 R215 4.99/F_4

R221 4.99/F_4 R221 4.99/F_4 R222 4.99/F_4 R222 4.99/F_4

R164 4.99/F_4 R164 4.99/F_4 R162 4.99/F_4 R162 4.99/F_4

R206 4.99/F_4 R206 4.99/F_4 R207 4.99/F_4 R207 4.99/F_4

T50 T50 T49 T49

T126 T126 T124 T124

10/25 modify it

SATA_LED# 30

PLVDD_SATA-SATA PLL POWER

XTLVDD_SATA-- SATA crystal power

C257

27p/50V_4

SATA_TXP0_C SATA_TXN0_C

SATA_RXN0_C SATA_RXP0_C

SATA_TXP1_C SATA_TXN1_C

SATA_RXN1_C SATA_RXP1_C

SATA_TXP2_C SATA_TXN2_C

SATA_RXN2_C SATA_RXP2_C

SATA_RXN4_C SATA_RXP4_C

SATA_TXP5_C SATA_TXN5_C

SATA_RXN5_C SATA_RXP5_C

SATA_RBIAS_PN

SATA_X1

SATA_X2

SATA_LED#

+1.2V_PLLVDD_SATA

+3V_XTLVDD_SATA

21

Y2

25MHZY225MHZ

C258

SATA_TXP4_C SATA_TXN4_C

SATA_X1

R161

R161 10M_6

10M_6

SATA_X2

U6B

AD9

SATA_TX0P

AE9

SATA_TX0N

AB10

SATA_RX0N

AC10

SATA_RX0P

AE10

SATA_TX1P

AD10

SATA_TX1N

AD11

SATA_RX1N

AE11

SATA_RX1P

AB12

SATA_TX2P

AC12

SATA_TX2N

AE12

SATA_RX2N

AD12

SATA_RX2P

AD13

SATA_TX3P

AE13

SATA_TX3N

AB14

SATA_RX3N

AC14

SATA_RX3P

AE14

SATA_TX4P

AD14

SATA_TX4N

AD15

SATA_RX4N

AE15

SATA_RX4P

AB16

SATA_TX5P

AC16

SATA_TX5N

AE16

SATA_RX5N

AD16

SATA_RX5P

V12

SATA_CAL

Y12

SATA_X1

AA12

SATA_X2

W 11

SATA_ACT#/GPIO67

AA11

PLLVDD_SATA

W 12

XTLVDD_SATA

SB700

3

2

1

14

SB700

Part 2 of 5

SATA PWR SERIAL ATA

HW MONITOR

IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23

ATA 66/100/133

IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30

SPI_DI/GPIO12

SPI_DO/GPIO11 SPI_CLK/GPIO47

SPI_HOLD#/GPIO31

SPI_CS#/GPIO32

LAN_RST#/GPIO13

SPI ROM

ROM_RST#/GPIO14

FANOUT0/GPIO3

FANOUT1/GPIO48 FANOUT2/GPIO49

FANIN0/GPIO50

FANIN1/GPIO51

FANIN2/GPIO52

TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63

TEMPIN3/TALERT#/GPIO64

VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60

IDE_IORDY

IDE_IRQ

IDE_A0 IDE_A1 IDE_A2

IDE_DACK#

IDE_DRQ

IDE_IOR# IDE_IOW# IDE_CS1# IDE_CS3#

AVDD

AVSS

AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24

AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23

G6 D2 D1 F4 F3

U15

ROM_RST#

J1

M8 M5 M7

SB_FANTACH0

P5

SB_FANTACH1

P8

PORT_80_PWR_DWN

R8

C6

TEMPIN0

B6

TEMPIN1

A6

MB_THRMDA_SB

A5 B5

A4 B4 C4 D4 D5 D6 A7 B7

5mA

F6

G7

PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15

BOARD_ID4 BOARD_ID3 BOARD_ID2

R287 0_4 R287 0_4

VIN0 VIN1 VIN2 VIN3 VIN4 VIN5 VIN6 VIN7

+3V_VDD_HWM

C375C375

0.1u/10V_4 0.1u/10V_4

T105 T105 T101 T101 T88 T88 T86 T86 T91 T91 T90 T90 T100 T100 T96 T96

T76 T76 T109 T109 T113 T113 T79 T79 T115 T115

T55 T55 T116 T116

PDIORDY 27 IRQ14 27 PDA0 27 PDA1

27 PDA2 27 PDDACK# 27 PDDREQ 27 PDIOR# 27 PDIOW# 27 PDCS1# 27 PDCS3# 27

PDD[0..15] 27

12/4 change BOARD ID3 from GEVENT7 to GPIO48

BOARD_ID4 14 BOARD_ID3 14

T57 T57 T59 T59 T63 T63

T95 T95 T97 T97 T99 T99

L31 0_6L31 0_6

C366C366

2.2u/6.3V_6 2.2u/6.3V_6

BOARD_ID2 14

THERM_ALERT# 4

11/02 modify it

10/18 AMD suggest to connect to GND

+3V

AVDD--H/W monitor Analog power

+1.2V

( 1.2V @ 60mA)

L24

BLM18PG221SN1D(220,1.4A)_6

+3V

( 3.3V @ 1.2mA)

L26

BLM18PG221SN1D(220,1.4A)_6

A A

5

4

BLM18PG221SN1D(220,1.4A)_6

3

+1.2V_PLLVDD_SATA

C290

1u/10V_4

+3V_XTLVDD_SATA

77mA

C260C260

0.1u/10V_4 0.1u/10V_4

1mA

C300

1u/10V_4

Place near ball

2

2/13 EMI stuff C375,C366 for SB HW MONITOR

PROJECT : BD3G

Quanta Computer Inc.

Size D ocument Number R ev

Date: Sheet

Quanta Computer Inc.

SB700-SATA/IDE/HWM/SPI 3/4

15 42Thursday, May 29, 2008

1

of

1A

5

R237 0_8 R237 0_8

+3V

D D

C285

100u/6.3V_3528

12

+

12

C282

C282 10u/6.3V_8

10u/6.3V_8

12

C307

C307 1u/10V_4

1u/10V_4

10/18 change to +1.8V

R231 0_8R231 0_8

+1.8V

4/24 IDE/FLASH not use ,remove C287,C288,C297,C293,C294

L34

+1.2V

BLM18PG221SN1D(220,1.4A)_6

C C

+1.2V

BLM18PG221SN1D(220,1.4A)_6

For support USB wakeup-->3V_S5

+3V_S5

BLM18PG221SN1D(220,1.4A)_6

B B

12

C367

1u/10V_4

L35

C334

12

PCIE_VDDR--PCIE I/O power

12

C301

C301 10u/6.3V_8

10u/6.3V_8

AVDD_SATA--SATA phy power

12

C521

C521 10u/6.3V_8

10u/6.3V_8

L33

12

C489

1u/10V_4

VDDQ--3.3V I/O power

12

C298

C298 1u/10V_4

1u/10V_4

1.8V : FLASH MEMORY MODE(DEFAULT)

3.3V: IDE MODE

VDD33_18--3.3V IDE I/O power

1.8V flash memory I/O power

12

C287C287

C288C288

*10u/6.3V_8 *10u/6.3V_8

*1u/10V_4 *1u/10V_4

12

C302

C302 1u/10V_4

1u/10V_4

12

C304C304

0.1u/10V_4 0.1u/10V_4

AVDDTX--USB Phy Analog I/O power

12

C477

C477 10u/6.3V_8

10u/6.3V_8

12

C388C388

0.1u/10V_4 0.1u/10V_4

C320

C320 1u/10V_4

1u/10V_4

12

C311

C311 1u/10V_4

1u/10V_4

12

C475

C475 10u/6.3V_8

10u/6.3V_8

12

C379C379

0.1u/10V_4 0.1u/10V_4

12

C295C295

0.1u/10V_4 0.1u/10V_4

C305

C305 1u/10V_4

1u/10V_4

C297C297 *1u/10V_4 *1u/10V_4

12

C303

C303 1u/10V_4

1u/10V_4

12

C488C488

0.1u/10V_4 0.1u/10V_4

C483C483

0.1u/10V_4 0.1u/10V_4

12

C313

C313 1u/10V_4

1u/10V_4

+VDD33_18

12

C293C293 *1u/10V_4 *1u/10V_4

+1.2V_PCIE_VDDR

12

C299

C299 1u/10V_4

1u/10V_4

+1.2V_AVDD_SATA

12

C292

C292 1u/10V_4

1u/10V_4

+3V_AVDD_USB

4

+3.3V_SB_R

12

C294C294 *1u/10V_4 *1u/10V_4

12

C484C484

0.1u/10V_4 0.1u/10V_4

12

C333C333

0.1u/10V_4 0.1u/10V_4

C291

C291 1u/10V_4

1u/10V_4

0.45A

844mA

C308

C308 1u/10V_4

1u/10V_4

C284

C284 1u/10V_4

1u/10V_4

0.2A

PLACE ALL THE DECOUPLING CAPS ON THIS SHEET CLOSE TO SB AS POSSIBLE.

U6C

T15

U16 U17

AA4 AB5

AB21

Y20 AA21 AA22 AE25

P18

P19

P20

P21

R22

R24

R25

AA14 AB18 AA15 AA17 AC18 AD17 AE17

A16

B16

C16

D16

D17

E17

F15

F17

F18

G15

G17

G18

W7

L9

M9

U9

V8

Y6

U6C

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12

VDD33_18_1 VDD33_18_2 VDD33_18_3 VDD33_18_4

PCIE_VDDR_1 PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7

AVDD_SATA_1 AVDD_SATA_4 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7

AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDTX_4 AVDDTX_5 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3 AVDDRX_4 AVDDRX_5

SB700

Part 3 of 5

PCI/GPIO I/O

IDE/FLSH I/O

POWER

A-LINK I/O

SATA I/O

USB I/O

SB700

CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4

3.3V_S5 I/OCORE S5

USB_PHY_1.2V_1 USB_PHY_1.2V_2

AVDDCK_3.3V

AVDDCK_1.2V

PLL CLKGEN I/O

CORE S0

S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7

S5_1.2V_1 S5_1.2V_2

V5_VREF

AVDDC

3

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9

L15 M12 M14 N13 P12 P14 R11 R15 T16

L21 L22 L24 L25

A17 A24 B17 J4 J5 L1 L2

G2 G4

A10 B10

AE7

J16

K17

E9

+1.2V_CKVDD

0.2A

+5V_VREF

VDD-- S/B CORE power

+1.2V_VCC_SB_R

12

C314

C312

1u/10V_4

CKVDD_1.2V-- Internal clock Generator I/O power

286mA

C332

*2.2u/6.3V_6

12

C487C487

0.1u/10V_4 0.1u/10V_4

12

C330

*0.1u/50V_6

0.01A

12

C326C326

0.1u/10V_4 0.1u/10V_4

+1.2VALW_R

12

+3VALW_R

0.22A

+1.2V_USB_PHY_R

4mA

+3V_AVDDCK

+1.2V_AVDDCK

+3V_AVDDC

7mA

44mA

16mA

2

604mA0.8A

12

C324

C324 1u/10V_4

1u/10V_4

12

S5_3.3--3.3v standby power

R336 0_6 R336 0_6

12

C482

C482 10u/6.3V_8

10u/6.3V_8

12

C335C335

0.1u/10V_4 0.1u/10V_4

V5_VREF--PCI 5V TOLERANCE

R436 1K/F_4 R436 1K/F_4

12

C274

C274 1u/10V_4

1u/10V_4

12

C323

C281

1u/10V_4

10u/6.3V_8

L28 0_6L28 0_6

12

C327

*0.1u/50V_6

Change to 0603

C331C331 *2.2u/6.3V_6 *2.2u/6.3V_6

4/24 internal clk not use remove C332,C330,C327,C331 change L28 to 0 ohm

12

S5_1.2V--1.2V standby power

R250 0_6 R250 0_6

1 2

12

C342C342

0.1u/10V_4 0.1u/10V_4

D31D31

12

21

CH501H-40PT CH501H-40PT

R235

R235 0_8

0_8

12

+3V_S5

+1.2V_S5

+5V

+3V

12/14 del R234 stuff R235 for A12

U6E

T10 U10 U11 U12

V11

V14

Y11

Y14

Y17 AA9 AB9

AB11 AB13 AB15 AB17

AC8 AD8 AE8

A15

B15 C14

D11 D13 D14 D15

E15

F12

F14

H17

J11

J12

J14

J15

K10

K12

K14

K15

H18

J17

J22

K25 M16 M17 M21

P16

W9

Y9

D8 D9

G9 H9

J9

F9

U6E

AVSS_SATA_1 AVSS_SATA_2 AVSS_SATA_3 AVSS_SATA_4 AVSS_SATA_5 AVSS_SATA_6 AVSS_SATA_7 AVSS_SATA_8 AVSS_SATA_9 AVSS_SATA_10 AVSS_SATA_11 AVSS_SATA_12 AVSS_SATA_13 AVSS_SATA_14 AVSS_SATA_15 AVSS_SATA_16 AVSS_SATA_17 AVSS_SATA_18 AVSS_SATA_19 AVSS_SATA_20

AVSS_USB_1 AVSS_USB_2 AVSS_USB_3 AVSS_USB_4 AVSS_USB_5 AVSS_USB_6 AVSS_USB_7 AVSS_USB_8 AVSS_USB_9 AVSS_USB_10 AVSS_USB_11 AVSS_USB_12 AVSS_USB_13 AVSS_USB_14 AVSS_USB_15 AVSS_USB_16 AVSS_USB_17 AVSS_USB_18 AVSS_USB_19 AVSS_USB_20 AVSS_USB_21 AVSS_USB_22 AVSS_USB_23 AVSS_USB_24

PCIE_CK_VSS_1 PCIE_CK_VSS_2 PCIE_CK_VSS_3 PCIE_CK_VSS_4 PCIE_CK_VSS_5 PCIE_CK_VSS_6 PCIE_CK_VSS_7 PCIE_CK_VSS_8

AVSSC

SB700

Part 5 of 5

+1.2V

1

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42

GROUND

VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50

PCIE_CK_VSS_9 PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21

AVSSCK

23

A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24

P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25

L17

12

10u/6.3V_8

+3V_AVDDC

AVDDC--USB Analog PLL power

12

C413

AVDDCK_3.3--Analog system PLL power

12

C337C337

2.2u/6.3V_6 2.2u/6.3V_6

2

PROJECT : BD3G

Quanta Computer Inc.

Size D ocument Number R ev

Date: Sheet

Quanta Computer Inc.

SB700-PWR/DECOUPLING 4/4

16 42Thursday, May 29, 2008

1

1A

of

+1.2V_USB_PHY_R+1.2V_S5

R334 0_6 R334 0_6

12

C481C481

C485C485

0.1u/10V_4 0.1u/10V_4

A A

5

+1.2V

L29

BLM18PG221SN1D(220,1.4A)_6

4

10u/6.3V_8

USB_PHY_1.2V--USB Phy digital power

12

C478

+1.2V_AVDDCK

AVDDCK_1.2--USB Phy digital power

12

C336C336

2.2u/6.3V_6 2.2u/6.3V_6

3

+3V_S5

L32

BLM18PG221SN1D(220,1.4A)_6

C389C389

0.1u/10V_4 0.1u/10V_4

+3V +3V_AVDDCK

L30

BLM18PG221SN1D(220,1.4A)_6

5

4

3

2

1

OVERLAP COMMON PADS WHERE

It must ready refore RSMRST#

+3V +3V

D D

ACZ_RST# 14 RTC_CLK 13 PCLK_DBC 13,25 PCLK_591 13,29 PCI_CLK5 13 PCI_CLK4 13 PCI_CLK3 13 PCI_CLK2 13

PCI_CLK2

C C

PULL HIGH

PULL LOW

DEBUG STRAPS

13,26 AD28 13,26 AD27

B B

13,26 AD26 13,26 AD25 13,26 AD24

AD23 13,26

PCI_AD28

PULL HIGH

PULL LOW

A A

USE LONG RESET

DEFAULT

USE SHORT RESET

12

R365R365

*10K/F_4 *10K/F_4

12

R368

R368 10K/F_4

10K/F_4

R395R395

*10K/F_4 *10K/F_4

PCI_CLK3

BOOTFAIL TIMER ENABLED

BOOTFAIL TIMER DISABLED

DEFAULT

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

12

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

R433R433 *10K/F_4 *10K/F_4

12

R432R432 *10K/F_4 *10K/F_4

USE ACPI BCLK

DEFAULT

BYPASS ACPI BCLK

+3V +3V +3V_S5

R370

R370 10K/F_4

10K/F_4

R426

10K/F_4

12

R429R429 *10K/F_4 *10K/F_4

12

PCI_CLK4 PCI_CLK5

RESERVED

12

R430R430

R434R434

*10K/F_4 *10K/F_4

R422

R422 10K/F_4

10K/F_4

RESERVED

12

R431R431 *10K/F_4 *10K/F_4

12

R398R398 *10K/F_4 *10K/F_4

12

LPC_CLK0

ENABLE PCI MEM BOOT

DISABLE PCI MEM BOOT

DEFAULT

EC ENABLED

12

R427R427 *10K/F_4 *10K/F_4

R256

R256 10K/F_4

10K/F_4

Use 2.2K PD.

PCI_AD25 PCI_AD24

USE IDE PLL

DEFAULT

BYPASS IDE PLL

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

PCI_AD23

RESERVED

12

R273R273 *10K/F_4 *10K/F_4

12

CLKGEN ENABLED

CLKGEN DISABLED

DEFAULT

R347

R347 10K/F_4

10K/F_4

RTC_CLKLPC_CLK1

INTERNAL RTC

DEFAULT

EXT. RTC

(PD on X1, apply 32KHz to RTC_CLK)

12

R242

R242 10K/F_4

10K/F_4

AZ_RST#

EC ENABLED

EC DISABLED

DEFAULT

ENABLE PCI MEM BOOT

+3V_S5

+3V

R150 *10K/F_4 R150 *10K/F_4

R152 10K/F_4 R152 10K/F_4

*2.2u/6.3V_6 *2.2u/6.3V_6

4/10 change R150 to R152 for power sequence

ECPWROK 20,29

REQUIRED STRAPS

SB_PWRGD A11 use external ckt A12 Asserting SYS_RESET# will de-assert SB PWRGOOD internally

C246C246

U3

1

NC

2

A

3

GND

*NL17SZ17DFT2G

D6

RX780 RS780M

CH501H-40PT D6 CH501H-40PT

21

WD_PWRGD: Push/Pull when A11SB700, OD when A12SB700.

U11 R230 R245 R234

V V XX

ALUC1G17000 IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5)

*NL17SZ17DFT2G

SOT-353

NB/SB POWER GOOD CIRCUIT

R229

V X

IC(5P) NL17SZ17DFT2G(SOT-353)AL17SZ17000

POSSIBLE FOR DUAL-OP RESISTORS.

A11 stuff 2.2K A12 stuff 10K

14 SB_GPIO17

SB_GPIO16 14

GPIO16

R151 0_4 R151 0_4

+1.8V

C249 *0.1u/10V_4 C249 *0.1u/10V_4

5

VCC

4

Y

+3V_S5

TYPE

GPIO16 GPIO17

L : 2.2K

FWH

pull down

LPC

L : 2.2K

SPI

pull down

RSVD

SB_PWRGD_IN

R154 *33_4 R154 *33_4

12

R337R337

2.2K_4 2.2K_4

12

R344R344 *2.2K_4 *2.2K_4

NC

NB_PWRGD_IN: RS780/RX780 = 1.8V; RS740 = 3.3V Do NOT share it with SB_PWRGD when use Internal Clk Gen (Need SB PLL initialize firstly)

SOT-353

SOT23-5

4/24 stuff C765 10nf to meet power sequence

16

Maybe can be remove -- internla pull up check AMD

12

R275R275

GPIO17

2.2K_4 2.2K_4

L : 2.2K pull down

NC

SB_PWRGD_IN 14

+1.8V

R153

R153 300_4

300_4

RX780,RS780

NB_PWRGD_IN

C765

0.01u/16V_4

R159 0_4 R159 0_4

12/18 add cap for NB_PWRGD signal

NB_PWRGD_IN 11

R157 *10K/F_4 R157 *10K/F_4

+1.8V

WD_PWRGD 14

PROJECT : BD3G

Quanta Computer Inc.

Size Doc ument Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet

Quanta Computer Inc.

SB700-STRAPS

17 42Thursday, May 29, 2008

1

1A

of

5

TVOUT

BTO

4

5/8 stuff D9,D11 for S-VIDEO

3

2

1

TVOUT

EXT_TV_Y/G 21

12/21 EMI add 27p for TV_Y/G , TV_C/R

D D

C C

EXT_TV_C/R 21

EV@27p/50V_4

INT_TV_Y/G 11

INT_TV_C/R 11

IV@27p/50V_4

10/24 modify it to 4 pin BOI request 10/30 modify footprint to SV-030018FR004S100FR-RVS-4P-H 12/12 update p/n to DFMD04FR006 4/16 update footprint to sv-030018fr004s100fr-4p-h-bl5m

C790

C792

R105

TV@150/F_4

close to NB & VGA connector

R497 EV@0_4 R497 EV@0_4

R496 EV@0_4 R496 EV@0_4

C791

EV@27p/50V_4

R189 IV@0_4 R189 IV@0_4

R190 IV@0_4 R190 IV@0_4

C793

IV@27p/50V_4

L14 TV@BLM18PG181SN1D L14 TV@BLM18PG181SN1D

C149

TV@6p/50V_4

SYS_TV_Y/G

SYS_TV_C/R

CN22

TV-CHROMA TV-LUMA SYS_TV_Y/GSYS_TV_C/R

C148

CN22

4

6

2

TV@SUYIN_030018FR004S100FR

B:(10/24) change CN22 from 7PIN to 4PIN CONN

3

5

1

+3V +3V

1

D9

3

TV@DA204UD9TV@DA204U

2

L20 TV@BLM18PG181SN1D L20 TV@BLM18PG181SN1D

C214

C215

TV@6p/50V_4

1

3

2

R158

TV@150/F_4

D11

TV-LUMA TV-CHROMA

TV@DA204U

BTO

CRT PORT

10/12 fix CRT connect error

2/1 RS780M A13 R8 ---> 140 CS11402FB19 MXM R8 ---> 150 CS11502FB21

close to NB & VGA connector

EXT_VGA_RED 21

B B

21 EXT_VGA_GRN

EXT_VGA_BLU 21

21 EXT_HSYNC

21 EXT_VSYNC

21 EXT_CRT_DDCCLK

21 EXT_CRT_DDCDAT

INT_CRT_RED 11

11 INT_CRT_GRN

INT_CRT_BLU 11

11 INT_HSYNC

11 INT_VSYNC

11 INT_CRT_DDCCLK

INT_CRT_DDCDAT 11

A A

R196 EV@0_4 R196 EV@0_4

R195 EV@0_4 R195 EV@0_4

R194 EV@0_4 R194 EV@0_4

R198 EV@0_4 R198 EV@0_4

R197 EV@0_4 R197 EV@0_4

R193 EV@0_4 R193 EV@0_4

R192 EV@0_4 R192 EV@0_4

R184 IV@0_4 R184 IV@0_4

R183 IV@0_4 R183 IV@0_4

R182 IV@0_4 R182 IV@0_4

R187 IV@0_4 R187 IV@0_4

R186 IV@0_4 R186 IV@0_4

R181 IV@0_4 R181 IV@0_4

R180 IV@0_4 R180 IV@0_4

CRT_R

CRT_G

CRT_B

HSYNC

VSYNC

DDCCLK

DDCDAT

+5V

+3V

CRT_R

CRT_G

CRT_B

5V_CRT2

C25 0.22u/10V_6 C25 0.22u/10V_6

CRT_R1 CRT_G1 CRT_B1

+5V

C24

0.1u/10V_4

+3V

C18

0.1u/10V_4

1/31 EMI Change L4,L5,L6 from CX0HM121008 to CX8BA470003

F4

12

FUSE1A6V_POLY-1A-6V

L6 BLM18BA470SN1_6 L6 BLM18BA470SN1_6

L5 BLM18BA470SN1_6 L5 BLM18BA470SN1_6

L4 BLM18BA470SN1_6 L4 BLM18BA470SN1_6

C5C5

R4

6.8p_4 6.8p_4

150/F_4

A:(8/20) change from 39 to 0 ohm Because MXM side already be stuff 30ohm

R14 0_4 R14 0_4

VSYNC1 CRTVSYNC HSYNC1

R13 0_4 R13 0_4

VSYNC HSYNC

DDCCLK DDCDAT

R22 4.7K_4R22 4.7K_4

DDCCLK

R21 4.7K_4R21 4.7K_4

DDCDAT

A:(8/28) change from 2.2k to 4.7k Follow AMD check list

R8

R8 150/F_4

150/F_4

U4

1

7 8

2

3 4 5

6

VCC_SYNC

VCC_DDC BYP

VCC_VIDEO

VIDEO_1 VIDEO_2 VIDEO_3

GND

CM2009U4CM2009

H=1.75mm

C11C11

6.8p_4 6.8p_4

+5V

R6

R6 150/F_4

150/F_4

SYNC_OUT2 SYNC_OUT1

SYNC_IN2 SYNC_IN1

DDC_IN1 DDC_IN2

DDC_OUT1 DDC_OUT2

D30 SSM14 D30 SSM14

2 1

C8C8

6.8p_4 6.8p_4

16 14

15 13

10 11

9 12

VSYNC1_CRT HSYNC1_CRT

C433 0.1u/10V_4 C433 0.1u/10V_4

C4C4

6.8p_4 6.8p_4

5V_CRT2

25 MIL

R5

6.8K_4R56.8K_4

CRT_R1

CRT_G1

CRT_B1

C10C10

C7C7

6.8p_4 6.8p_4

2/13 EMI C4,C7,C10,C5,C8,C11 change from 10p to 6.8p

L8 BLM18BA220SN1D_6 L8 BLM18BA220SN1D_6 L7L7

BLM18BA220SN1D_6 BLM18BA220SN1D_6

5V_CRT2

R7

A:(8/28) change from 2.7k to 6.8k

6.8K_4R76.8K_4

Follow AMD check list

+3V

C14

*10p/50V_4

C6

*10p/50V_4C6*10p/50V_4

CRTHSYNC

LCD_ON

C13

*10p/50V_4

A:(9/3) default no stuff

CRTDCLK CRTDDAT

C9

*10p/50V_4C9*10p/50V_4

A:(8/27) default no stuff

DSUB-070549FR015SX03CX-15P-V

CN18

6

7 2 8 3 9 4

10

5

2/10 DEL D4,D5 footprint and DEL CRT_SENSE# net

1617

111

12

13

14

15

A:(8/20) Reserve Diode for ESD solution

10/25 no use sense

T175 T175

PROJECT : BD3G

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Quanta Computer Inc.

SB600 STRAPS/TV/CRT

1

2A

18 42Thursday, May 29, 2008

of

5

BTO

C80 *CEC@22p_6 C80 *CEC@22p_6

C81 *CEC@22p_6 C81 *CEC@22p_6

D D

C69 *CEC@0.1u/10V_4 C69 *CEC@0.1u/10V_4

*CEC@G691L308T73UF

U10

(all parts in the page)

XIN_CEC

Y4

*CEC@8 MHz

21

XOUT_CEC

CEC_POWER

3

Vcc

CEC-RESET#

1

Reset#

2

GND

Reserve Test Pad for Debug

R92

+5VPCU

*CEC@0_4

R52

+3VPCU

CEC@0_4

C C

HDMI

A:(8/21) change net name from

B B

INT_LVDS_EDIDCLK to IV_HDMI_DDCCLK

10/22 add level shift for CEC

CEC_POWER CEC_POWER

IV_HDMITX2P 10 IV_HDMITX2N 10

EXT_HDMITX2P 21 EXT_HDMITX2N 21

IV_HDMITX1P 10 IV_HDMITX1N 10

EXT_HDMITX1P 21 EXT_HDMITX1N 21

IV_HDMITX0P 10 IV_HDMITX0N 10

EXT_HDMITX0P 21 EXT_HDMITX0N 21

10 IV_HDMICLK+

IV_HDMICLK-10

EXT_HDMICLK+ 21 EXT_HDMICLK-21

11 IV_HDMI_DDCCLK

IV_HDMI_DDCDATA 11

EXT_HDMI_DDCCLK 21 EXT_HDMI_DDCDAT 21

CEC_POWER

C55

CEC@1u/10V_6

CEC_POWER

T11 T11

T15 T15

1/31 DChange U11 from ARBL5SV0000 to ARBL5MV0000

IV_HDMITX2P IV_HDMITX2N

IV_HDMITX1P IV_HDMITX1N

IV_HDMITX0P IV_HDMITX0N

IV_HDMICLK+ IV_HDMICLK-

IV_HDMI_DDCCLK IV_HDMI_DDCDATA

C56

C56 CEC@0.1u/10V_4

CEC@0.1u/10V_4

R90 CEC@47K_4 R90 CEC@47K_4 R91 CEC@47K_4 R91 CEC@47K_4

43 2

1

CEC-RESET#

CEC-MODE

close to NB & VGA connector

RN7 IV@0X2 RN7 IV@0X2

RN19 EV@0X2 RN19 EV@0X2

RN6 IV@0X2 RN6 IV@0X2

RN20 EV@0X2 RN20 EV@0X2

RN5 IV@0X2 RN5 IV@0X2

RN21 EV@0X2 RN21 EV@0X2

RN8 IV@0X2 RN8 IV@0X2

RN18 EV@0X2 RN18 EV@0X2

RN4 IV@0X2 RN4 IV@0X2

RN17 EV@0X2 RN17 EV@0X2

XOUT_CEC

CEC-RESET# CEC-MODE

RP10 CEC@4.7KX2 RP10 CEC@4.7KX2

REV04 Reserve Test Pad for Debug

2 41

2/1 change R168,R171,R163,R170 to 4.7K

+3V

R163

R168

HDM@4.7K_4

HDMI_DDCCLK

A:(8/27) change from 2k to 39k (Follow AMD check list)

A A

HDMI_DDCDATA

1

2

Q31 HDM@2SK3541 Q31 HDM@2SK3541

R3 *CEC@0_4 R3 *CEC@0_4

+3V

R171

HDM@4.7K_4

1

2

Q32 HDM@2SK3541 Q32 HDM@2SK3541

R606 *CEC@0_4 R606 *CEC@0_4

R163

HDM@4.7K_4

HDMI_CEC_SCL

3

R170

HDM@4.7K_4

HDMI_CEC_SDA

3

CEC_POWER

1

2

Q1 HDM@2SK3541 Q1 HDM@2SK3541

R637 *CEC@0_4 R637 *CEC@0_4

CEC_POWER

1

2

Q2 HDM@2SK3541 Q2 HDM@2SK3541

R665 *CEC@0_4 R665 *CEC@0_4

Close to HDMI Connector

5

XIN_CEC

4

7

VCC

16

VCC

4

XOUT

6

XIN

3

RESET

8

MODE

5

VSS

15

NC

14

NC

11

NC

3

HDMI_DDCCLK HDMI_DDCDATA

HDMI_DDCDATA

3

2/1 change R1,R2 to 6.8K

+5VPCUCEC_POWER

R1

HDM@6.8K_4

3

HDMI_SDA

3

4

U11

CEC@R5F211A4C21SP#W4

HDMITX2P_C HDMITX2N_C

HDMITX1P_C HDMITX1N_C

HDMITX0P_C HDMITX0N_C

HDMICLK+_C HDMICLK-_C

HDMI_SCL

R2

HDM@6.8K_4

DDCSDA

DDCSCL

TEST1 TEST0

CEC OUT

CEC IN

HPDET

SCL SDA

NC

1 20 18 17

13 12

10 9

19 2

+5VPCU

*HDM@10u/10V/X5R_8 *HDM@10u/10V/X5R_8

3

*CEC@0_4

R87

CEC_SCL

C67

*CEC@0.1u/10V_4

CEC_SDA

C66

*CEC@0.1u/10V_4

+3V_S5 +3VPCU

CEC_P

Q23

3

CEC@FDV301N

CEC_P

Q22

3

CEC@FDV301N

2

CEC@0_4

CEC@0_4 R86

R86

1

CEC_SCL_S

CEC_SCL_S CEC_SDA_S

CEC_SDA_S

2 41

CEC@0_4P2R_S

CEC_POWER

R69

R69 CEC@2.2K_4

CEC@2.2K_4

R68

R68 CEC@2.2K_4

CEC@2.2K_4

CEC_SCL CEC_SDA

HDMI_CEC_SDA HDMI_CEC_SCL

RP7 CEC@4.7KX2 RP7 CEC@4.7KX2

CEC_OUT CEC_IN

HPDET

2 41

3

CEC_POWER

8/30 Change HDMI HPD circuit

CEC_POWER

U9

C60 CEC@0.1u/10V_4 C60 CEC@0.1u/10V_4

+3V

4

HPDET

53

1

2

U7

U7 HDM@TC7SH08FU

HDM@TC7SH08FU

REV02 SWAP net

Named to IV_HDMI_HPD from HTPLG

To EC

CEC_EC_HP 29

To IV/EV VGA Hot Plug Detect

21 DVI_HPD

IV_HDMI_HPD 11

1/31 DEL L56,L57,L58,L59,R465,R474,R493,R495,R486,R488,R478,R483,C226,C227 for HDMI circuit

REV02 Add C5806

REV02 Add C5807

C53 HDM@0.1u/10V_4 C53 HDM@0.1u/10V_4

R61

R61 EV@1K_4

EV@1K_4

R63

R63 IV@1K_4

IV@1K_4

C52 HDM@0.1u/10V_4 C52 HDM@0.1u/10V_4

2/4 let layout smooth to modify ckt

ESD6

HDMITX0N_C HDMITX0P_C

HDMITX1N_C HDMITX1P_C

HDMITX2N_C HDMITX2P_C

HDMICLK-_C HDMICLK+_C

HDM@POLY 1.1A

C471C471

F5 F5

HDMI_HPD

ESD6

1

2

3

VCC

4

5

ESD5

1

2

3

VCC

4

5

HDMI_SCL HDMI_SDA

DDC5V

C479

HDM@0.1u/10V/X5R_4

10

9

GND

7 6

*HDM@RCIamp0514M

10

9

GND

7 6

*HDM@RCIamp0514M

ESD4

1

2

3

VCC

4

5

*HDM@RCIamp0514M

Layout note: Place close to HDMI Conn

HDMITX0N_C

10

HDMITX0P_C

9 8

HDMITX1N_C

7

HDMITX1P_C

6

HDMITX2N_C

10

HDMITX2P_C

9 8

HDMICLK-_C

7

HDMICLK+_C

6

HDMI_SCL

10

HDMI_SDA

9

8

GND

DDC5V

7

HDMI_HPD

6

3

U9

1

5

2

4 3

CEC@NL17SZ17

CEC_POWER

U8

1

5

2

4 3

CEC@NL17SZ17

PLTRST#

PLTRST# 13,21,24,25,27,29

REV02 Modify net to PLTRST#

+5V

1 2

2

RP9

*CEC@0_4P2R_S

RP8

REV02 Add R5812,R5813

R62

R62 HDM@470K_4

HDM@470K_4

Named to SCLK1 & SDATA1 from SCLK & SDATA

3

Named to HDMI_HPD from HDMI_HP

R64 HDM@1.2K_4 R64 HDM@1.2K_4

HDMI_HPD

From HDMI conn Pin 19 (Hot Plug Det)

SB_SCLK2 14 SB_SDATA2 14

3ND_MBCLK 21,28,29 3ND_MBDATA 21,28,29

To SB

C84 *CEC@0.1u/10V_4 C84 *CEC@0.1u/10V_4

9/07 Add

To EC

CEC_OUT

2/4 reserve C798 PLTRST#

C798

PLTRST#

*.1U_4

10/18 update footpritnt HDMI-C12816-119A5-L-19P-H-BL5

12/4 update footprint to HDMI-C12816-119A5-L-19P-V-BL5-1

12/7 update footprint to HDMI-C12816-119A5-L-19P-H-BD3

1/17 update footprint to HDMI-C12816-119A5-L-19P-H-BL5

DDC5V

R542

IV@100K_4

2/13 EMI stuff C808 for HDMI

R174 IV@750_4 R174 IV@750_4

3

Q64

Q64 IV@FDV301N

IV@FDV301N

2

1

+3V+5VPCUCEC_POWER

C747

IV@0.1u/10V_4

R175 IV@750_4 R175 IV@750_4

R176 IV@750_4 R176 IV@750_4

R177 IV@750_4 R177 IV@750_4

R185 IV@750_4 R185 IV@750_4

R191 IV@750_4 R191 IV@750_4

R172 IV@750_4 R172 IV@750_4

R173 IV@750_4 R173 IV@750_4

11/01 add stitch cap for HDMI

2

1

11/01 no stuff U13 to avoid leakage

CEC_POWER

U13

1

5

2

4 3

*CEC@NL17SZ17

+3VPCU CEC_POWER

R81

CEC@10K_4

CEC_IN

R78 CEC@27K_4 R78 CEC@27K_4

C808

C808 HDM@0.1u/10V_4

HDM@0.1u/10V_4

HDMITX2P_C

HDMITX2N_C

HDMITX1P_C

HDMITX1N_C

HDMITX0P_C

HDMITX0N_C

HDMICLK+_C

HDMICLK-_C

3

Q24

CEC@2SK3541

2

R82

CEC@100K_4

HDMITX2P_C

HDMITX2N_C HDMITX1P_C

HDMITX1N_C HDMITX0P_C

HDMITX0N_C HDMICLK+_C

HDMICLK-_C

CEC

HDMI_SCL HDMI_SDA

HDMI_HPD

Size Document Number Rev

HDMI + CEC

Date: Sheet

D8

D8 CEC@CH500H-40

CEC@CH500H-40

R93

R93 CEC@27K_4

CEC@27K_4

1

3

1

CEC@2SK3541

2

Q25

CN25

1

D2+

2

D2 Shield

3

D2-

4

D1+

5

D1 Shield

6

SHELL1

D1-

7

SHELL2

D0+

8

D0 Shield

9

SHELL3

D0-

10

CK+

SHELL4

11

CK Shield

12

CK-

13

CE Remote

14

NC

15

DDC CLK

16

DDC DATA

17

GND

18

+5V

19

HP DET

HDM@HDMI-C12816-119A5-L

PROJECT : BD3G

Quanta Computer Inc.

1

CEC

To HDMI CONN Pin 13

20 21

22 23

19 42Thursday, May 29, 2008

2A

of

1

TXUCLKOUTTXUCLKOUT+

TXUOUT0TXUOUT0+

TXUOUT1TXUOUT1+

A A

B B

C C

TXUOUT2TXUOUT2+

RN28 EV@0X2 RN28 EV@0X2

RN27 EV@0X2 RN27 EV@0X2

RN26 EV@0X2 RN26 EV@0X2

RN25 EV@0X2 RN25 EV@0X2

TXLCLKOUT+ TXLCLKOUT-

TXLOUT2TXLOUT2+

TXLOUT0TXLOUT0+

TXLOUT1TXLOUT1+

A:(8/20) Remove switch IC, Modify ckt to original ckt

EXT_LVDS_PNLCLK 21

INT_LVDS_EDIDCLK 11

21 EXT_LVDS_PNLDAT

INT_LVDS_EDIDDATA 11

BTO

CAMERA MODULE

R24 CCD@0_8 R24 CCD@0_8

1

+5V

D D

A:(8/27) Camera module power +5V or +3V?

1

2

RN9 IV@0X2 RN9 IV@0X2

RN10 IV@0X2 RN10 IV@0X2

RN11 IV@0X2 RN11 IV@0X2

RN12 IV@0X2 RN12 IV@0X2

RN13 IV@0X2 RN13 IV@0X2

RN14 IV@0X2 RN14 IV@0X2

RN15 IV@0X2 RN15 IV@0X2

RN16 IV@0X2 RN16 IV@0X2

RN29 EV@0X2 RN29 EV@0X2

RN24 EV@0X2 RN24 EV@0X2

RN23 EV@0X2 RN23 EV@0X2

RN22 EV@0X2 RN22 EV@0X2

R413R413

R414R414

R409 EV@0_4 R409 EV@0_4

R411 IV@0_4 R411 IV@0_4

Q9Q9

2

*CCD@AO3413 *CCD@AO3413

3

2 41

3

2 41

3

2 41

3

2 41

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

2 41

3

2 41

3

2 41

3

2 41

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

+3V

R412

4.7K_4

A:(8/27) change from 2.2K to 39K

EV@0_4 EV@0_4

IV@0_4 IV@0_4

3

A:(8/30) Follow TE1, no stuff 1000p,0.1u

2

2/1 change Panel SDA/SDC pull res R412,R410 from 39K to

4.7K

+3V

R410

4.7K_4

A:(8/28) change from 2.2K to 4.7K Follow AMD check list

A:(9/5) change from 4.7K to 39K Follow AMD PA documents

CCD_POWER

+

C29 CCD@10u/10V_8

C27 *CCD@1000p_4 C27 *CCD@1000p_4

C28 *CCD@0.1u/10V_4 C28 *CCD@0.1u/10V_4

INT_TXUCLKOUT- 11 INT_TXUCLKOUT+ 11

INT_TXUOUT0- 11 INT_TXUOUT0+ 11

INT_TXUOUT1- 11 INT_TXUOUT1+ 11

INT_TXUOUT2- 11 INT_TXUOUT2+ 11

EXT_LVDS_TXUCK# 21 EXT_LVDS_TXUCK 21

EXT_LVDS_TXU#0 21 EXT_LVDS_TXU0 21

EXT_LVDS_TXU#1 21 EXT_LVDS_TXU1 21

EXT_LVDS_TXU#2 21 EXT_LVDS_TXU2 21

INT_TXLCLKOUT+ 11 INT_TXLCLKOUT- 11

INT_TXLOUT2- 11 INT_TXLOUT2+ 11

INT_TXLOUT0- 11 INT_TXLOUT0+ 11

INT_TXLOUT1- 11 INT_TXLOUT1+ 11

EXT_LVDS_TXLCK 21 EXT_LVDS_TXLCK# 21

EXT_LVDS_TXL0 21 EXT_LVDS_TXL#0 21

EXT_LVDS_TXL1 21 EXT_LVDS_TXL#1 21

EXT_LVDS_TXL2 21 EXT_LVDS_TXL#2 21

LCD_EDIDCLK

LCD_EDIDDATA

3

+5V

ECPWROK 17,29

R17R17 *CCD@4.7K_4 *CCD@4.7K_4

2

Q8Q8

13

*CCD@DTC144EU *CCD@DTC144EU

3

R539R539

CCD_POWERON 29

4

HALL SENSOR

+3VPCU

+3V

R12

R12 1K_4

1K_4

DISPON

D27 BAS316 D27 BAS316

3

Q79

ME2N7002D

1

2

Q4

13

DTC144EU

12/4 modify display on ckt to avoid flash when into S3/S4/S5

100K_4

Q10

PDTC143TT

2

R20 100K_4 R20 100K_4

+5V

+3V

R538

15K_4

2

*39K_4

1

Q53 FDV301N Q53 FDV301N

3

4

NB_PWRGD_+5V

C754

0.1u/10V_4

R403 100K_4 R403 100K_4

1

C424

0.1u/10V_4

+3V

R670

R670 10K_4

10K_4

2

3

Q80

ME2N7002D

1

EC_FPBACK# 29

1/17 EnegryStar 4.0 Idle power issue When BLON= High, Turn ON LCD then turn ON MMB When BLON= Low, Turn OFF LCD then turn OFF MMB

+15V

R18

330K_6

+3VPCU

R406

3

2

Q7

Q7 ME2N7002D

ME2N7002D

1

LCDON#LVDS_DIGON

13

R541 EV@0_4 R541 EV@0_4

R540 IV@0_4 R540 IV@0_4

3

Q54

2

FDV301N

0.65v<Vt<1.5v

1

LVDS_DIGON

R537 IV@0_4 R537 IV@0_4

R525 EV@0_4 R525 EV@0_4

3

Q52

2

FDV301N

0.65v<Vt<1.5v

1

5

5/7 stuff D74,D75,D76 for CCD

LID591#

2

MR4

MR4 EC2648-B3-F

EC2648-B3-F

3

21

D87

VPORT

2/4 stuff D87 for LID switch

65mil

C22

0.01u/25V_4

Q50

ME2N7002D

LVDS_BLON

5

2

LVDS_BLON

R684 0_4 R684 0_4

R10

R10 100K_4

100K_4

+3V

3

Q51

Q51 AO3404

AO3404

LCDVCC1

1

65mil

R407

22_8

LCDDISCHG

3

1

D61*BAS316 D61*BAS316

EXT_DISP_ON 21

INT_LVDS_DIGON 11

R720

R720 *0_4

*0_4

INT_LVDS_BLON 11

EXT_LVDS_BLON 21

R721

R721 *0_4

*0_4

2

LCDONG

6

LID591# 29

D7 4 EGA D74 EGA

2 1

D7 5 EGA D75 EGA

2 1

D7 6 VPORT D76 VPORT

2 1

Analog MIC

LCD TYPE CONNECTOR

USBP2+_C

USBP2-_C

CCD_POWER

R16 I_MIC0_4 R16 I_MIC0_4 R15 I_MIC0_4 R15 I_MIC0_4

VIN

+3V

BTO

EC_BLON 29

L49

L49 0_6

0_6

C17

0.1u/16V_4

5/5 reserve R720,R721 for cost down

Analog MIC MIC_GND

11/01 add stitch cap for LVDS

C48C48

0.1u/10V_4 0.1u/10V_4

LCD_VCC

65mil

C19

C15

0.01u/16V_4

10u/6.3V_6

0.01u/16V_4

10u/6.3V_6

I_MIC@100P_4

+3V +3V

C73C73

0.1u/10V_4 0.1u/10V_4

2/13 EMI stuff C427~C432

C23

I_MIC@100P_4

C20

BTO

12/21 EMI stuff C23,C20 100p

1/31 Change CN5 (I-MIC)P/N from DFHD02MR003 to DFHD02MR016

6

ADOGND1

7

10u/25V_1206

R23 0_8 R23 0_8

12

C26

C21

+

1000P_4

INVCC0

8

10/22 update p/n From DFHS40FS825 to DFWF40MS000

INVCC0

CCD_POWER

MIC_GND_RMIC_GND Analog MIC_R

DISPON

TXLCLKOUT+ TXLCLKOUT-

TXLOUT0+ TXLOUT0-

TXLOUT1+ TXLOUT1-

TXLOUT2+ TXLOUT2-

CN4

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 42

ACES_88242-40XX_LVDS

LCD_VCC

2 4

LCD_EDIDDATA

6

LCD_EDIDCLK

8

LCD_VADJ

10 12

USBP2+_C

14

USBP2-_C

16 18

TXUCLKOUT+

20

TXUCLKOUT-

22 24

TXUOUT0+

26

TXUOUT0-

28 30

TXUOUT1+

32

TXUOUT1-

34 36

TXUOUT2+

38

TXUOUT2-

40

CN4

LCD PANEL MODULE

EMI CAP

11 INT_LVDS_PWM

CONTRAST 29

CCD_POWER

+3V

LCD_VCC

C429 0.1u/10V_4 C429 0.1u/10V_4

C428 0.1u/10V_4 C428 0.1u/10V_4

C427 0.1u/10V_4 C427 0.1u/10V_4

LCD_EDIDDATA

LCD_EDIDCLK

LCD_VADJ

R415 *0_4 R415 *0_4

R416 0_4 R416 0_4

C435 *0.1u/10V_4 C435 *0.1u/10V_4

C430C430

100p/50V_4 100p/50V_4

C431 100p/50V_4 C431 100p/50V_4

C432 100p/50V_4 C432 100p/50V_4

LCD_VADJ

Co-Layout

CCD@0_4P2R_S

USBP2-_C

2

USBP2+_C

1

CN5

I_MIC@INT_MIC

R19R19 *I_MIC@0_4 *I_MIC@0_4

Size Document Number Rev

Date: Sheet

7

CCD@0_4P2R_S

RP33

2 41

*CCD@DLW21HN900SQ2L

443

1

L50

BTO

PROJECT : BD3G

Quanta Computer Inc.

LCD CONN & SWITCH

20 42Thursday, May 29, 2008

8

CCD_USBP2- 14 CCD_USBP2+ 14

3

3 2

2

2A

of

TXLOUT0+

5

10 PEG_TXN15

PEG_TXP15 10

10 PEG_TXN14

PEG_TXP14 10

10 PEG_TXN13 10 PEG_TXP13

10 PEG_TXN12

D D

C C

B B

A A

10 PEG_TXP12

10 PEG_TXN11

10 PEG_TXN10

10 PEG_TXN9

10 PEG_TXN8

10 PEG_TXN7 10 PEG_TXP7

10 PEG_TXN6 10 PEG_TXP6

10 PEG_TXN5

10 PEG_TXN4

10 PEG_TXN3

10 PEG_TXN2

10 PEG_TXN1

18 EXT_CRT_DDCCLK 18 EXT_CRT_DDCDAT

19 EXT_HDMI_DDCCLK 19 EXT_HDMI_DDCDAT

20 EXT_LVDS_PNLCLK

EXT_LVDS_PNLDAT 20

18 EXT_VGA_RED

18 EXT_VGA_GRN

18 EXT_VGA_BLU

20 EXT_LVDS_TXL#2

20 EXT_LVDS_TXL2

20 EXT_LVDS_TXL#1

EXT_LVDS_TXL1 20

20 EXT_LVDS_TXL#0

EXT_LVDS_TXL0 20

20 EXT_LVDS_TXLCK#

20 EXT_LVDS_TXLCK

18 EXT_TV_C/R

18 EXT_TV_Y/G

19 EXT_HDMICLK-

19 EXT_HDMICLK+

19 EXT_HDMITX2N

19 EXT_HDMITX2P

19 EXT_HDMITX1N

19 EXT_HDMITX1P

19 EXT_HDMITX0N

EXT_HDMITX0P 19

A:(9/14) no stuff for A-stage

PEG_TXP11 10

PEG_TXP10 10

PEG_TXP9 10

PEG_TXP8 10

PEG_TXP5 10

PEG_TXP4 10

PEG_TXP3 10

PEG_TXP2 10

PEG_TXP1 10

PEG_TXN0 10 PEG_TXP0 10

T1 T1

PEG_TXN15 PEG_TXP15

PEG_TXN14 PEG_TXP14

PEG_TXN13 PEG_TXP13

PEG_TXN12 PEG_TXP12

PEG_TXN11 PEG_TXP11

PEG_TXN10 PEG_TXP10

PEG_TXN9 PEG_TXP9

PEG_TXN8 PEG_TXP8

PEG_TXN7 PEG_TXP7

PEG_TXN6 PEG_TXP6

PEG_TXN5 PEG_TXP5

PEG_TXN4 PEG_TXP4

PEG_TXN3 PEG_TXP3

PEG_TXN2 PEG_TXP2

PEG_TXN1 PEG_TXP1

PEG_TXN0 PEG_TXP0

EXT_CRT_DDCCLK EXT_CRT_DDCDAT

EXT_HDMI_DDCCLK EXT_HDMI_DDCDAT

EXT_LVDS_PNLCLK EXT_LVDS_PNLDAT

EXT_VGA_RED

EXT_VGA_GRN

EXT_VGA_BLU

EXT_LVDS_TXL#2 EXT_LVDS_TXL2

EXT_LVDS_TXL#1 EXT_LVDS_TXL1

EXT_LVDS_TXL#0 EXT_LVDS_TXL0

EXT_LVDS_TXLCK# EXT_LVDS_TXLCK

EXT_TV_C/R

EXT_TV_Y/G

EXT_TV_COMP

EXT_HDMICLKEXT_HDMICLK+

EXT_HDMITX2N EXT_HDMITX2P

EXT_HDMITX1N EXT_HDMITX1P

EXT_HDMITX0N EXT_HDMITX0P

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

82

84

86

88

90

92

94

96

98

100

102

104

106

108

110

112

114

116

118

120

122

124

126

128

130

132

134

136

138

140

142

144

146

148

150

152

154

156

158

160

162

164

166

168

170

172

174

176

178

180

180 182 181 184 183 186 185 188 187 190 189 192 191 194 193 196 195 198 197 200 199

EV@QT00200A-5120T-9F

A:(8/18) update VGA conn footprint base on Allan information A:(8/23) update VGA conn pin-define (change pin 1 location)

CN27

PEG_RXN15

1

PEG_RXP15

3

5

PEG_RXN14

7

PEG_RXP14

9

11

PEG_RXN13

13

PEG_RXP13

15

17

PEG_RXN12

19

PEG_RXP12

21

23

PEG_RXN11

25

PEG_RXP11

27

29

PEG_RXN10

31

PEG_RXP10

33

35

PEG_RXN9

37

PEG_RXP9

39

41

PEG_RXN8

43

PEG_RXP8

45

47

PEG_RXN7

49

PEG_RXP7

51

53

PEG_RXN6

55

PEG_RXP6

57

59

PEG_RXN5

61

PEG_RXP5

63

65

PEG_RXN4

67

PEG_RXP4

69

71

PEG_RXN3

73

PEG_RXP3

75

77

PEG_RXN2

79

PEG_RXP2

81

83

PEG_RXN1

85

PEG_RXP1

87

89

PEG_RXN0

91

PEG_RXP0

93

95

MXM_REFCLKN

97

MXM_REFCLKP

99

101

103

105

107

109

VGA_MBDATA

111

VGA_MBCLK

113

115

117

119

121

EXT_HSYNC

123

EXT_VSYNC

125

127

EXT_LVDS_TXU#2

129

EXT_LVDS_TXU2

131

133

EXT_LVDS_TXU#1

135

EXT_LVDS_TXU1

137

139

EXT_LVDS_TXU#0

141

EXT_LVDS_TXU0

143

145

EXT_LVDS_TXUCK#

147

EXT_LVDS_TXUCK

149

151

153

155

157

159

161

163

165

167

169

171

173

175

177

179

181182 183184 185186 187188 189190 191192 193194 195196 197198 199200

+5V

+3V

A:(9/14) no stuff for A-stage

VINVIN

4A

EV@0.1u/10V_4

4

PEG_RXN15 10 PEG_RXP15 10

PEG_RXN14 10 PEG_RXP14 10

PEG_RXN13 10 PEG_RXP13 10

PEG_RXN12 10 PEG_RXP12 10

PEG_RXN11 10 PEG_RXP11 10

PEG_RXN10 10 PEG_RXP10 10

PEG_RXN9 10 PEG_RXP9 10

PEG_RXN8 10 PEG_RXP8 10

PEG_RXN7 10 PEG_RXP7 10

PEG_RXN6 10 PEG_RXP6 10

PEG_RXN5 10 PEG_RXP5 10

PEG_RXN4 10 PEG_RXP4 10

PEG_RXN3 10 PEG_RXP3 10

PEG_RXN2 10 PEG_RXP2 10

PEG_RXN1 10 PEG_RXP1 10

PEG_RXN0 10 PEG_RXP0 10

MXM_REFCLKN 3 MXM_REFCLKP 3

PLTRST# 13,19,24,25,27,29 SYSFANON# 4 MAINON 29,36,37 GFXPG 29

EXT_LVDS_BLON 20 EXT_DISP_ON 20 DVI_HPD 19

EXT_HSYNC 18 EXT_VSYNC 18

EXT_LVDS_TXU#2 20 EXT_LVDS_TXU2 20

EXT_LVDS_TXU#1 20 EXT_LVDS_TXU1 20

EXT_LVDS_TXU#0 20 EXT_LVDS_TXU0 20

EXT_LVDS_TXUCK# 20 EXT_LVDS_TXUCK 20

A:(9/18) donˇt connect pin 161, 167, 171, 183, 187,188 to ground and reserve test point for A build.

2/4 reserve C797 PLTRST#

C797

PLTRST#

*.1U_4

3

0.5A

A:(9/19) donˇt have enough space to put the test point, Remove it for A-test

1.5A

10/30 modify to +3V

C566

EV@10u/6.3V_6

C565

C563

EV@0.1u/10V_4

EV@10u/6.3V_6

C569

VIN+3V +5V

C568

0.1u/50V_6

C548

0.1u/50V_6

A:(8/29) reserve 100u for VIN

C256

+

*100u/25V_6X7.7

2

+3V

R208

R208 EV@4.7K_4

EV@4.7K_4

Q37

2

EV@RHU002N06

3ND_MBCLK 19,28,29

3

+3V

2

3ND_MBDATA 19,28,29

3

1

Q34

Q34 EV@RHU002N06

EV@RHU002N06

1

VGA_MBCLK

R203

R203 EV@4.7K_4

EV@4.7K_4

VGA_MBDATA

1

1/17 Remove R492,R517, Short CN27/Pin189,190 to VIN directly.

12/21 EMI stuff C568,C548

Size Document Number Rev

MXM CONNECTOR / TV

Date: Sheet

5

4

3

2

Date: Sheet

PROJECT : BD3G

Quanta Computer Inc.

21 42Thursday, May 29, 2008

of

1

of

2A

5

Codec(CX20561)

REV_08

D D

C C

14 ACZ_RST#_AUDIO

BIT_CLK_AUDIO 14

ACZ_SYNC_AUDIO 14

ACZ_SDIN0 14

ACZ_SDOUT_AUDIO 14

23 DIB_P

SPDIF_OUT 23

PCBEEP 14

10/27 change from 10k to 2.2k

B B

10/12 change PCBEEP to GND

GAIN

0dB

-6dB

-12dB

-18dB

REV_04

Reserve INTMIC

A A

INT_MIC_R ADOGND

L66 PBY160808T -301Y-N_6 L66 PBY160808T-301Y-N_6

+3V_S5

L67 *PBY160808T -301Y-N_6 L67 *PBY160808T-301Y-N_6

+3VSUS

+3V_S5

+3VSUS

DIB_N 23

R617 2.2K_4 R617 2.2K_4

PC Beep GAIN CONTROL

GPIO1 GPIO2

R615 0_4 R615 0_4

R616 *0_4 R616 *0_4

R371

1K_4

10K 10K

omit omit

I_MIC@1K_4

R649

R649 I_MIC@4.7K_4

I_MIC@4.7K_4

omit

10K

I_MIC@INT_MIC

BTO

5

10K

omit

+3AVDD

ADOGND

R650

C729

*I_MIC@100p/50V_4

+AZA_VDD

C706

C698

10u/10V_8

Determining HDA use +1.5V/+3V

C684

0.1u/10V_4

R622 33_4 R622 33_4

Reserve for EMI

R644 MD@0_4 R644 MD@0_4 R645 MD@0_4 R645 MD@0_4

BTO

R639 0_4 R639 0_4

PCBEEP_C

C683

0.1u/10V_4

C392

100p/50V_4

I_MIC@10u/10V_8

C719

ADOGND

1/31 Change CN39(I-MIC CONN) P/N from DFHD02MR003 to DFHD02MR016

CN39

2

1

ACZ_SDIN20561

DIB_P_L DIB_N_L

PCBEEP_C

GPIO2 GPIO1 EAPD#

CX20561-12Z Not support digital MIC CX20561-13Z support digital MIC

R638 *10K_4 R638 *10K_4

R643 *10K_4 R643 *10K_4

0.1u/10V_4

C682

10u/10V_8

GPIO1

GPIO2

C699

0.1u/10V_4

C692

0.1u/10V_4

U38

11

RESET#

6

BIT_CLK

10

SYNC

8

SDATA_IN

5

SDATA_OUT

43

DIB_P

42

DIB_N

12

PC_BEEP

48

S/PDIF

45

GPIO2

46

GPIO1

47

EAPD#/GPIO0

1

DMIC_CLOCK

2

DMIC_1/2

CX20561-12Z

MIC1-LL MIC1-RR MIC2_INT_R

4

A:(8/29) follow EMI suggestion, add 0.1 cap

+3AVDD

ADOGND ADOGND

+3AVDD

C726

C727

0.1u/10V_4

ADOGND

C718

C723

0.1u/10V_4

10u/10V_8

ADOGND

9

4

26

40

36

44

3

VDD_IO

DVDD_1-8

AVEE

34

PORTA_L

AVDD_26

AVDD_40

DVDD_44

DVDD_3-3

RESERVED_32 RESERVED_33

AVSS_3838DVSS_41

AVSS_25

DVSS_7

7

41

25

ADOGND

C700

C700 *100p/50V_4

*100p/50V_4

ADOGND ADOGND ADOGND ADOGND ADOGND ADOGND

4

35

PORTA_R

19

MICBIASB

14

PORTB_L

15

PORTB_R

18

MICBIASC

16

PORTC_L

17

PORTC_R

27

PORTD_L

28

PORTD_R

20

MIC_L

21

MIC_R

29

MONO

30

STEREO_L

31

STEREO_R

13

SENSEA

24

VREF

39

FLY_P

37

FLY_N

22

VREF_LO

23

VREF_HI

32 33

C691

C691 *100p/50V_4

*100p/50V_4

Change C6047, C6048, C6049, C6070, C6071, C6072 to 100p follow Vendor suggestion

MIC1-VREFO_B

MIC1-LL MIC1-RR

FM_linein_L FM_linein_R

MIC2_INT_L MIC2_INT_R

SPKR-L SPKR-R

SENSEA

CX20561_VILT

CX20561_FLY_P CX20561_FLY_N

CX20561_RVD22 CX20561_RVD23

FM_linein_L FM_linein_R

+5V_VDD

C697

C714

0.1u/10V_4

C717

10u/10V_8

C697

0.1u/10V_4

REV_08

L39 PBY160808T -301Y-N_6 L39 PBY160808T-301Y-N_6

12/21 EMI stuff R399,R379

2/13 EMI stuff R627

C689 2.2u/6.3V_6 C689 2.2u/6.3V_6 C702 2.2u/6.3V_6 C702 2.2u/6.3V_6

C708 FM@2.2u/6.3V_6 C708 FM@2.2u/6.3V_6 C709 FM@2.2u/6.3V_6 C709 FM@2.2u/6.3V_6

BTO

C712 I_MIC@2.2u/6.3V_6 C712 I_MIC@2.2u/6.3V_6 C715 I_MIC@2.2u/6.3V_6 C715 I_MIC@2.2u/6.3V_6

BTO

FM_linein_LL FM_linein_RR

R375 5.1K/F_4 R375 5.1K/F_4

R374 5.11K/F_4 R374 5.11K/F_4

R373 10K/F_4 R373 10K/F_4

R372 FM@20K/F_4 R372 FM@20K/F_4 R685 *20K/F_4 R685 *20K/F_4

C713 1u/10V_4 C713 1u/10V_4

C721

1u/10V_4

ADOGND

C710

C710 *FM@100p/50V_4

*FM@100p/50V_4

3

A:(9/7) Add 0.1uF for High Pass Filter

C396 *0.1u/10V_4 C396 *0.1u/10V_4

ADOGND

R646 0_4 R646 0_4

ADOGND

R399 0_4 R399 0_4

ADOGND

R379 0_4 R379 0_4

ADOGND

R627 0_4 R627 0_4

ADOGND

R636 0_4 R636 0_4

R201 *0_4 R201 *0_4 R628 FM@10K_4 R628 FM@10K_4 R647 FM@10K_4 R647 FM@10K_4

R351 *0_4 R351 *0_4 R359 *0_4 R359 *0_4

INT_MIC_R

C728

10u/10V_8

C720

1u/10V_4

C707

C707 *FM@100p/50V_4

*FM@100p/50V_4

ADOGND

MIC2_INT_L

BTOBTO

*I_MIC@100p/50V_4 *I_MIC@100p/50V_4

3

+3V

HPL 23 HPR 23

MIC1-VREFO 23 MIC1-L 23 MIC1-R 23

MIC1-VREFOMIC1-VREFO_C

FM_LEFT 28 FM_RIGHT 28

MIC1-L MIC1-R

10/22 reverse for WHQL

+3AVDD

Port_A# 23

Port_B# 23

12/4 Stuff R372 for FM turner

Port_C# 13 Port_B# 23

1/18 Add R685 for VISTA WHQL circuit

C724

0.1u/10V_4

C716C716

C711C711

*I_MIC@100p/50V_4 *I_MIC@100p/50V_4

2

INT SPK AMP

2/1 Change INT-SPK AMP GAIN VALUE. Change R623,R625 from 9.1k to 5.1k 1%,Change R620,R621 from 10k to 16k 1%

SPKR-L SPKR-L-2

SPKR-R

INSPKL+

INSPKR+

G1441_SHDN

+5V

R611 *0_6 R611 *0_6

*G961-18ADJTEU(SOT89-5)

REV_04

C675 2.2u/6.3V_6 C675 2.2u/6.3V_6

C681 2.2u/6.3V_6 C681 2.2u/6.3V_6

*G961-18ADJTEU(SOT89-5)

C671

C671 *1u/16V_6

*1u/16V_6

# pleace R6034 as close to U9007 as possible (opposing side is better)

SPKR-L-1

SPKR-R-1

ADOGND

U36

4

VEN

VOUT

5

VIN

GND

2

R640 0_6R640 0_6

+5V

R623 5.1K/F_6 R623 5.1K/F_6

R625 5.1K/F_6 R625 5.1K/F_6

R620 16K/F_6 R620 16K/F_6 C676 330p/25V_4 C676 330p/25V_4 R621 16K/F_6 R621 16K/F_6 C677 330p/25V_4 C677 330p/25V_4

C690 4.7u/6.3V_6 C690 4.7u/6.3V_6 C688 4.7u/6.3V_6 C688 4.7u/6.3V_6

R642 0_4 R642 0_4

3

ADJ

1

INT SPEAKER

1/31 Change CN17(SPK CONN) P/N from DFHD04MR012 to DFHD04MR021 5/5 Change CN17 from DFHD04MR021 to DFHD04MRA75

INSPKL-

L47 BK1608LL121_6 L47 BK1608LL121_6

INSPKL+

L46 BK1608LL121_6 L46 BK1608LL121_6

INSPKR-

L45 BK1608LL121_6 L45 BK1608LL121_6

INSPKR+

L40 BK1608LL121_6 L40 BK1608LL121_6

10/28 add ESD protect

ACZ_RST#_AUDIO

AMP_MUTE# 29

12/7 Remove D19 to slove Audio issue Switch Mute to Un-mute, sound will delay about 2 seconds.

2

EAPD#

H : AMP turn on L : AMP power down

INSPKL-N INSPKL+N INSPKR-N INSPKR+N

D28

12

VPORT

10/26 solve mute in DOS mode

D20 *MTW355 D20 *MTW355

D18 MTW355 D18 MTW355

D19 *MTW355 D19 *MTW355

Vo=1.2*(R371+R372)/R371= 4.8V

R633R633 *36K_4 *36K_4

R635R635 *12K_4 *12K_4

ADOGND

SPKR-R-2

G1441_RBY G1441_PBY

G1441_SE/BTL

21

+5V_VDD

C705

C703

10u/10V_8

0.1u/10V_4

U37

1

LIN1

18

RIN1

2

LIN2

17

RIN2

16

RBYPASS

3

LBYPASS

5

SHDN

11

SE/BTL

G1441

D16

12

VPORT

MUTE#

Size Document Number Rev

CX20561/AMP/MDC

Date: Sheet

1

+3AVDD

ADOGND

C704

*0.1u/10V_4

23

15

14

4

6

8

20

VOL

CT

NC

VDD3

LVDD

RVDD

SECNTL

13

IN1/IN2

19

ROUT+

12

ROUT-

24

LOUT+

7

LOUT-

GND/HS22GND/HS

GND/HS

THRMPAD

9

21

10

25

ADOGND

CN17

1 2

5

3

6

12

D25

VPORT

1

4

SPEAKER_H1.95

2

ADOGND

MUTE# 23

+5V_VDD

D23

VPORT

ADOGND

+3AVDD

R641

10K_4

PROJECT : BD3G

Quanta Computer Inc.

SECNTL 23

INSPKR+ INSPKRINSPKL+

R634

100K_4

3

1

22 42Thursday, May 29, 2008

INSPKL-

G1441_SHDN

Q40

ME2N7002D

of

ADOGND

2A

5

VR

+3AVDD

DIGVOL_UP 29

DIGVOL_DN 29

DIGVOL_UP

DIGVOL_DN

R391 10K_4 R391 10K_4

R653 10K_4 R653 10K_4

R390 0_4 R390 0_4

R654 0_4 R654 0_4

VR_UP

VR_DN

10/31 stuff R390,R654

D D

+3AVDD

C407

*0.1u/10V_4

ADOGND

DIGVOL_UP

C412

*SN74LVC1G79DBVR

*0.1u/10V_4

ADOGND

DIGVOL_DN

C406

*0.1u/10V_4

ADOGND

ADOGND ADOGND

U22

5

2

Vcc

CLK

1

D

3

4

GND

Q

ADOGND

C730

0.1u/10V_4

VR_UP

4

4/16 update footpritnt to knob-xre094-3p-bl5m

VR4

A2COM

4

5

B

6

7

VR_XRE094_NOBLE

11/08 modify it

U42

1

VR_DN

2

ADOGND

C408

0.1u/10V_4

ADOGND

+3AVDD

C761

*0.1u/10V_4

*NL17SZ17

3

5

4 3

1

4

5

ADOGND

3

MDC

REV_04

BTO

22 DIB_P

DIB_N 22

2

1/18 Change CN43 footprint from MDC-1-179373-2-12P-RUV to MDC-1-179373-2-12P-RUV-BD3A (SMT open issue)

CN29

1 3 5 7 9

11

SB_GPIO7 SB_GPIO27 FM_INT DIB_P DIB_N FM_SUSCLK

MD@MDC

AGND

FM_L FM_R

AGND

2

+3V

4

GND

6 8 10 12

1

SYSTEM MIC

C C

12/07 Slove Audio issue:When plug in-out headphone,headphone has bo sound.

1. Change R652&R651 to C763,C764(10U/6.3V 0603)

22 MIC1-VREFO

MIC1-L 22

MIC1-R 22

2/5 Change R714,R715 from 10uF to 0 ohm (Audio HP circuit)

HP

G1412_HPL

R658 *1412@0_4 R658 *1412@0_4

G1412_HPR

R657 *1412@0_4 R657 *1412@0_4

22 HPL

HPR 22

B B

R714 0_6 R714 0_6

R715 0_6 R715 0_6

*1412@10u/10V_8 C731 *1412@10u/10V_8 C731

*1412@10u/10V_8 C732 *1412@10u/10V_8 C732

Port_A#

Port_A# 22

ADOGND

Q42

3

2N7002

2

1

12/20 solve GPRS noise

1. stuff R386/R387/C404/C405 to 0.1U

2. Change L44/41 to BK1608LL121

3. reserve C786/C787 to adj noise

HPR_1

R386

R387

C404

R401

10K_4

Q47

2N7002

C404

.1U_4

ADOGND

+5V_VDD

R402

22K_4

+3AVDD +3V_SPD

2

HP_JD

10/27 change from ME2347 to BSS64

HPL_2

HPR_2

ADOGND

.1U_4

+5V_VDD

3

1

L42 BK1608LL121 L42 BK1608LL121

L41 BK1608LL121 L41 BK1608LL121

C405

.1U_4

C786

*100p/50V_4

ADOGND

CNXT suggestion can not over 100P

1

Q45

2

BSS84

2/4 add Varistor D63,D64,D65 on SPDIF_OUT/HP_JD/+3V_SPD

A A

5

2/4 CN40 pin 9/10 connect to GND

HP_JD

HPL_SYSHPL_1

C787

*100p/50V_4

HPR_SYS

SPDIF_OUT 22

3

D6 3 VPORT D63 VPORT

D6 4 VPORT D64 VPORT

D6 5 VPORT D65 VPORT

4

+3V_SPD

ADOGND

REV_04

2 1

HP_JD

CN40

5 4

10

3 2 1

7

Drive

8

IC

6

2SJ1371-0010A1_SPDIF

D24

3

*DA204U

SPDIF_OUT

HP_JD

+3V_SPD

9

LED

+3AVDD

1

2

ADOGND

HP Amplifier

REV_05

+3AVDD

MUTE# 22

SECNTL 22

+3AVDD +NVDD

3

HPL_2

HPR_2

R385 4.7K_4 R385 4.7K_4

12/22 EMI Change L43/44 to BK1608LL121

R659 *1412@100K_4 R659 *1412@100K_4

D54 *1412@MTW355 D54 *1412@MTW355

21

D55 *1412@MTW355 D55 *1412@MTW355

21

C422 *1412@4.7u/6.3V_6 C422 *1412@4.7u/6.3V_6

U23

1

VOUT

2

3

VIN

C-

*1412@G5930

/SHDN

GND

MIC1_R1

Change R9037, R6003 and R6004 PN to CS31003J941

R392 *1412@10K_6 R392 *1412@10K_6

+3AVDD

R389 *1412@10K_6 R389 *1412@10K_6

6

C+

5

4

ADOGND

L43 BK1608LL121 L43 BK1608LL121

L44 BK1608LL121 L44 BK1608LL121

+NVDD

1412MUTE#

4

3

15

6

10

1

16

8

2

C411

C410

*100p/50V_4

R656 *1412@10K_6 R656 *1412@10K_6

C735 *1412@47p/50V_4 C735 *1412@47p/50V_4

U40

-

INL OUTL

+

SVDD PVDD

SVSS NVDD

SHDNR# SHDNL#

+

-

INR

*1412@G1412

C734 *1412@47p/50V_4 C734 *1412@47p/50V_4

R655 *1412@10K_6 R655 *1412@10K_6

MIC1_LMIC1_L1

MIC1_R

Port_B# 22

CNXT suggestion can not over 100P

Port_B#

G1412_HPL

5

9

NC1

11

NC2

12

NC3

14

NC4

2

SGND

13

PGND

17

TPAD

OUTR

ADOGND

7

G1412_HPR

Size Document Number Rev

Date: Sheet

CN41

1 2 6 3 4

5

2SJ-T351-S11

Normal OPEN Jack

D21

1

3

2

*DA204U

ADOGND

C419

*1412@4.7u/6.3V_6

ADOGND

+NVDD

ADOGND

PROJECT : BD3G

Quanta Computer Inc.

Audio JACK /VR/FM Tuner

1

7

8

ADOGND

+3AVDD

ADOGND

C725

*1412@4.7u/6.3V_6

+3AVDD

C738

*1412@0.1u/10V_4

23 42Thursday, May 29, 2008

of

2A

5

4

3

2

1

LAN_MARVELL_88E8040/88E8055

+3V_S5

10/100 : 88E8040T GIGA : 88E8072

D D

10 PCIE_RX N2 10 PCIE_RX P2 10 PCIE_TX N2

PCIE_TXP2 10

3 CLK_PCIE_LAN#

CLK_PCIE_LAN 3

+3V_S5

CLKREQ_LAN# 3

To: SB PCIE wake up pin (Input)

13,19,21,25,27,29 PLTRST#

C C

PCIE_WAKE# 14,25

Rev03 modify 2007/08/13

LAN_RSET

C657 0.1u/10V_4 C657 0.1u/10V_4 C650 0.1u/10V_4 C650 0.1u/10V_4

R594 40@4.7K_4 R594 40@4.7K_4

Rev04 modify 2007/08/14

R629 0_4 R629 0_4

R631R631

Rev05 modify 2007/08/16

2K Ohm for 8040

4.87K Ohm for 8055

LOM_DISABLE# 29

12/7 change R499 0ohm to D56 to avoid leakage

B B

12/21 EMI add L74,C766,C767 for +2.5V_1.8V_LAN

+2.5V_1.8V_LAN

L74 BK1608HS600_6 L74 BK1608HS600_6

C766

0.1u/10V_4

12/21 add C789,C788

A A

+3V_S5

C395

27p/50V_427p/50V_4

C394

27p/50V_4 27p/50V _4

C767

0.1u/10V_4

55@0.1u/16V_4

R630 4.7K_4 R630 4.7K_4

*BAS316

12

Y8

Y8 25MHz

25MHz

+2.5V_1.8V_LAN_T

C789

55@1000p/50V_4

C264

0.1u/16V_4

D56

LAN_XIN

LAN_XOUT

C788

C263

1000p/50V_4

PERN1 PERP1

PU_VDDO_TTL

VPD_DATA VPD_CLK

LAN_RSET CTRL12

40@55@4.87K/F_4 40@55@4.87K/F_4

+3V

+3V_S5

T171T171

T170 T170

LAN_XIN

LAN_XOUT

H = 4mm

H = 4mm JM36111-R2125-7F

HAN WEI P/N : DBBL5MLAN00

H = 4mm

+2.5V_1.8V_LAN_T

TX3P TX3N

+2.5V_1.8V_LAN_T TX2P TX2N

+2.5V_1.8V_LAN_T TX1P TX1N

+2.5V_1.8V_LAN_T

TX0N X-TX0N

U35

50

TX_N

49

TX_P

53

RX_N

54

RX_P

56

REFCLKN

55

REFCLKP

35

SPI_DI

34

SPI_DO

37

SPI_CLK

36

SPI_CS

43

PU_VDDO_TTL

42

CLKREQn

88E805X

41

VPD_DATA

38

VPD_CLK

5

PERSTn/TSTPT

6

WAKEn

16

RSET

46

TESTMODE

47

VMAIN_AVLBL

12

VAUX_AVLBL

9

SWITCH_VAUX

11

SWITCH_VCC

10

LOM_DISABLEn

15

XTALI

14

XTALO

74

GND10

65

GND1

66

GND2

67

GND3

68

GND4

69

GND5

70

GND6

71

GND7

72

GND8

73

GND9

10/100 : LFE8696-R GIGA : LFE9291-R P/N : DB0BD3LAN00

10/100 : GIGA : GST5006 P/N : DB0BD3LAN01

10/100 : HPL-9060 GIGA : HPL-68

U16

1 2 3

4 5 6

7 8 9

10 11 12

40@50@TRANSFORME R

C286

Check by Safety

TCT1

MCT1

TD1+

MX1+

MX1-

TD1-

MCT2

TCT2

MX2+

TD2+

MX2-

TD2-

MCT3

TCT3

MX3+

TD3+ TD3-

MX3-

MCT4

TCT4

MX4+

TD4+ TD4-

MX4-

1000p/3KV_1808

24 23 22

21 20 19

18 17 16

15 14 13

TERM9

TERM4

TERM3

TERM2

TERM1

40@50@88E8040_55

R219

75/F_4

P/N : AL008040001 P/N : AL008072000

1

VDDO_TTL

40

VDDO_TTL

45

VDDO_TTL

61

VDDO_TTL

8

AVDDH

23

AVDD

19

AVDD

22

AVDD

28

AVDD

51

AVDDL

52

AVDDL

32

NC

57

NC

64

VDD25

4

CTRL18

2

VDD

7

VDD

13

VDD

33

VDD

39

VDD

44

VDD

48

VDD

58

VDD

3

CTRL12

29

TSTPT

25

HSDACN

24

HSDACP

31

MDIN[3]

30

MDIP[3]

27

MDIN[2]

26

MDIP[2]

21

MDIN[1]

20

MDIP[1]

18

MDIN[0]

17

MDIP[0]

59

LED_ACTn

LED_LINK10/100n

LED_LINK1000n

LED_LINKn

60 62 63

100MBPS# 1000MBPS# 10_1000MBPS#

P/N : DB0MA8LAN00DELTA

P/N : BOTHHAND

P/N : DB0Z03LAN00

R224

R240

75/F_4

55@75/F_4

TERMINATION PLANE

CTRL18

X-TX3P X-TX3N

X-TX2P X-TX2N

X-TX1P X-TX1N

X-TX0PTX0P

R252

55@75/F_4

+3V_S5

+2.5V_1.8V_LAN

+1.2V_LAN

T167 T167

T169 T169

T168 T168

TX3N TX3P TX2N TX2P TX1N TX1P TX0N TX0P

LAN_ACTLED#

R614 *0_4 R614 *0_4 R618 *0_4 R618 *0_4 R619 0_4 R619 0_4

LAN_LINKLED#

C561 470p/50V_4 C561 470p/50V _4

C602 470p/50V_4 C602 470p/50V _4

C567 470p/50V_4 C567 470p/50V _4

Change CN9001 to BU1 LAN Connector

10u/6.3V_8 C421 10u/6.3V_8 C421

0.1u/16V_4 C673 0.1u/16V_4 C673

55@BK1608HS220_6_1A

0.1u/16V_4 C638 0.1u/16V_4 C638

0.1u/16V_4 C640 0.1u/16V_4 C640

0.1u/16V_4 C425 0.1u/16V_4 C425

0.1u/16V_4 C693 0.1u/16V_4 C693

10/30 88E8072 has included termination RC

4

RN33

*55@49.9/F_4P2R

12

3

LAN_N1 LAN_N2 LAN_N3 LAN_N4

C679

*55@0.1u/16V_4

C686

*55@1000p/50V_4

Foxconn P/N : DFTJ12FR015

LAN_ACTLED#

LAN_LINKLED#

+3V_S5

R204 220_4 R204 220_4

R552 220_4 R552 220_4

+3V_S5

Rev05 modify 2007/08/16

5

4

3

AUX3V_S5

L48

C420

55@4.7u/6.3V_6

C415

55@4.7u/6.3V_6

4

RN32

*55@49.9/F_4P2R

12

3

C670

C672

LAN_ACTLED# LAN_VCC3

X-TX3N

X-TX3P

X-TX1N

X-TX2N

X-TX2P

X-TX1P

X-TX0N

X-TX0P

LAN_LINKLED# LAN_VCC4

C672

*55@1000p/50V_4

*55@0.1u/16V_4

Rev05 modify 2007/08/16

C418

55@0.1u/16V_4

CTRL18

25 mil Trace width

12/21 EMI add L73 for +1.2V_LAN

C414

55@0.1u/16V_4

CTRL12

25 mil Trace width

4

RN31

*55@49.9/F_4P2R

12

3

C661

*55@0.1u/16V_4

CN28

12

Y-

11

Y+

8

7

6

5

4

3

2

1

10

9

NC4/3-

NC/3+

RX-/1-

NC2/2-

NC1/2+

RX+/1+

TX-/0-

TX+/0+

GG+

RJ45-CONN

1/17 Change CN28 (RJ45 CONN) from DFTJ12FR024 to DFTJ12FR035

1/18 Change RJ45 footprint from LAN-100073FR012G101ZL-12P to rj45-c100s7-10806-l-12P

14

GND

13

GND

R397

55@4.7K_4

R393

55@4.7K_4

C664

*55@1000p/50V_4

2

1

R502 0_8 R502 0_8 R554 0_8 R554 0_8

3

Q43

E

B

C

55@BCP69T1

2

BK

1608HS600_6BK

1608HS600_6

3

Q44

E

B

C

55@BCP69T1

2

4

12

3

C648

*55@0.1u/16V_4

+2.5V_1.8V_LAN

4

+1.2V_LAN

L73

4

RN30

*55@49.9/F_4P2R

C667

0.1u/16V_4

C674

0.1u/16V_4

C417

55@4.7u/6.3V_6

C643

0.1u/16V_4

+1.2V_LAN

C669

0.1u/16V_4

C401

55@4.7u/6.3V_6

C652

*55@1000p/50V_4

Close to

C668

C659

0.1u/16V_4

C645

C678

C666

0.1u/16V_4

Close to Q9001 Pin2/4

C639

0.1u/16V_4

C696

0.1u/16V_4

Close to Q9000 Pin2/4

12/22 cost down remove LAN eeprom stuff R381 remove U21,R380,R378

VPD_DATA VPD_CLK

EEPROM No Use VPD_DATA Pull Down

Size Document Number Rev

LAN_Marvell_8040/8055

Date: Sheet

C666

0.1u/16V_4

C694

C637

0.1u/16V_4

C642

C695

0.1u/16V_4

+3V_S5

R380R380 *4.7K_4 *4.7K_4

R381

R381 0_4

0_4

PROJECT : BD3G

Quanta Computer Inc.

U9001 Pin64

+2.5V_1.8V_LAN

C685

40@4.7u/6.3V_6

Rev05 modify 2007/08/16

Close to U9001 Pin39

+1.2V_LAN

C641

40@4.7u/6.3V_6

Rev05 modify 2007/08/16

R378R378 *4.7K_4 *4.7K_4

U21

5

A0

SDA

6

A1

SCL

A2

7

WP

4

GND

VCC

*24LC08

24 42Thursday, May 29, 2008

1

24 42Thursday, May 29, 2008

1 2 3

8

+3V_S5

2A

of

5

4

3

2

1

+3V

C68

C64

MINI-Card I (WLAN)

D D

A:(8/18) Due to EC assign Pin111 to other function Remove uR_SOUT_CR from EC A:(8/23) Remove uR_SWD from EC

10 PCIE_TXP0

10 PCIE_RXP0

1/31 add +3V to CN21 pin39,41

+3V_WL_VDD

PCIE_TXN0 10

PCIE_RXN0 10

CLK_PCIE_WLAN 3 CLK_PCIE_WLAN# 3

CLKREQ_WLAN# 3

PCIE_WAKE# 14,24

+3V

28 WCS_CLK

WCS_DAT 28

To BT

3

WCS_CLK WCS_DAT

R428 0_4 R428 0_4 R690 0_4 R690 0_4

R421 0_4 R421 0_4

PCIE_TXP0 PCIE_TXN0

PCIE_RXP0 PCIE_RXN0

CLK_PCIE_WLAN CLK_PCIE_WLAN#

CLKREQ_WLAN#

*2N7002E-LF

*2N7002E-LF Q12

Q12

2

R419 BT@0_4 R419 BT@0_4 R418 BT@0_4 R418 BT@0_4

WCS_CLKR WCS_DATR WLAN_WAKE#

1

R417 *10K_4 R417 *10K_4

WCS_CLKR WCS_DATR

5/5 remove CN30 second PCIE (HD Decoder)

MINI-Card II (HD Decoder)

C C

A:(8/18) Add PCIE Debud card

PCIRST#

PCIRST# 13,26

PCLK_DBC 13,17

10 PCIE_TXP1

PCIE_TXN1 10

PCIE_RXP1 10 PCIE_RXN1 10

CLK_PCIE_MINICARD 3 CLK_PCIE_MINICARD# 3

B B

+NEW_3V

2

4

RP34

*NEW@4.7KX2_4

Q73

3

R574 NEW@0_4 R574 NEW@0_4

Q72

3

R565 NEW@0_4 R565 NEW@0_4

C629

NEW@0.1u/10V_4

5

2

+NEW_3V

2

C621

NEW@0.1u/10V_4

PDAT_SMB 3,7,8,14

PCLK_SMB 3,7,8,14

A:(8/23) change to another SMBus channel.

A A

SCL1/SDA1 is dedicated SMbus interface for ASF devices only.

SDATA0 NEW_SMDATA

*NEW@2N7002E

PCLK_SMB

*NEW@2N7002E

+3V_S5

*NEW@4.7KX2_4

1

3

1

NEW_SMCLK

1

2/4 reserve C799 PLTRST#

+3V

C622

NEW@0.1u/10V_4

A:(9/7) per TI FAE suggestion: (1)Please keep all Input and Output capacitor value > 4.8uF (0.1uF +4.7uF)

PLTRST#

C364

NEW@4.7u/6.3V_6

PCLK_DBC

C799

*.1U_4

C633

NEW@0.1u/10V_4

R262 *0_4 R262 *0_4 R259 *0_4 R259 *0_4 R264 *0_4 R264 *0_4

R266 *0_4 R266 *0_4

PCIE_TXP1 PCIE_TXN1

PCIE_RXP1 PCIE_RXN1

+1.5V

PCIRST#_R PCLK_DBC_R

A:(9/7) per TI FAE suggestion: (1)Please keep all Input and Output capacitor value > 4.8uF (0.1uF +4.7uF) (2)Please put these caps closed to IC (3)R4101(pin 19,OC#) value should change to 2k ohm.

NEW CARD'S POWER SWITCH

CPPE# : ( Internal Pull Up , active low when card support PCIE )

CPUSB# : ( Internal Pull Up , active low when card support USB )

SHDN# : ( Internal Pull Up )

+3V

+3V_S5

+1.5V

PLTRST#

PLTRST# 13,19,21,24,27,29

C632

NEW@0.1u/10V_4

T154 T154

RCLKEN

T160 T160

NEW@G577BSR91U

O2 FAE suggest add 47K RES to +3V_S5 2007.08.13

C306

NEW@4.7u/6.3V_6

4

51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17

15 13 11

9 7 5 3 1

C15706-190A1-L

51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17

15 13 11

9 7 5 3 1

*C15725-180A5-L

2

3.3VIN

4

3.3VIN

AUXIN AUXOUT

12

1.5VIN

14

1.5VIN

6

SYSRST#

20

SHDN#

18

RCLKEN NC

7

GND

CN21

Reserved Reserved Debug(PCIRST#) Debug(PCICLK) GND +3.3Vaux +3.3Vaux GND GND PETp0 PETn0 GND GND PERp0 PERn0 GND Reserved Reserved

GND REFCLK+ REFCLKGND CLKREQ# Reserved Reserved WAKE#

CN30

Reserved Reserved Debug(PCIRST#) Debug(PCICLK) GND +3.3Vaux +3.3Vaux GND GND PETp0 PETn0 GND GND PERp0 PERn0 GND Reserved Reserved

GND REFCLK+ REFCLKGND CLKREQ# Reserved Reserved WAKE#

H=0.8mm

U33

3.3VOUT

1.5VOUT

STBY# CPPE#

CPUSB#

PERST#

Thermal GND

21

53

OC#

52

+3.3V

50

GND

48

+1.5V

46

LED_WPAN#

44

LED_WLAN#

42

LED_WWAN#

40

GND

38

USB_D+

36

USB_D-

34

GND

32

SMB_DATA

30

SMB_CLK

28

+1.5V

26

GND

24

+3.3Vaux

22

PERST#

20

W_DISABLE#

18

GND

16

Reserved

14

Reserved

12

Reserved

10

Reserved

8

Reserved

6

+1.5V

4

GND

2

+3.3V

GND 54GND

52

+3.3V

50

GND

48

+1.5V

46

LED_WPAN#

44

LED_WLAN#

42

LED_WWAN#

40

GND

38

USB_D+

36

USB_D-

34

GND

32

SMB_DATA

30

SMB_CLK

28

+1.5V

26

GND

24

+3.3Vaux

22

PERST#

20

W_DISABLE#

18

GND

16

Reserved

14

Reserved

12

Reserved

10

Reserved

8

Reserved

6

+1.5V

4

GND

2

+3.3V

GND 54GND

H=8mm

+NEW_3V

3 5

+NEW_3VAUX

1517

+NEW_1.5V

11 13

1

CPPE#

10

CPUSB#

9

816 19

R570 NEW@47K_4 R570 NEW@47K_4

+3V_WL_VDD

+1.5V

WiMAX_LED#_A WiMAX_LED#

+1.5V

+3V

+1.5V

+3V_WL_VDD

H=9mm

+3V_HD_VDD

+1.5V

+3V_HD_VDD

+1.5V

+3V_HD_VDD

T153 T153 R72 NEW@0_4 R72 NEW@0_4 R73 NEW@0_4 R73 NEW@0_4

R573 NEW@0_4 R573 NEW@0_4

12/10 Change R573 from 28.7K to 0 ohm, Remove C628

C619

C620

C634

NEW@0.1u/10V_4

C623

NEW@4.7u/6.3V_6

C620

NEW@0.1u/10V_4

A:(9/12) Add WIMAX LED

R423 *0_4 R423 *0_4 R420 *0_4 R420 *0_4

USBP3+_C

R45 0_4 R45 0_4

USBP3-_C

WL_SMDATA_WLAN

WL_SMCLK_WLAN

10/15 no support wakeup ,change +3V_S5 to +3V

R41 0_4 R41 0_4

R36 0_4 R36 0_4 R34 0_4 R34 0_4

R35 0_4 R35 0_4

WL_SMDATA WL_SMCLK

PLTRST# RF_EN_WLAN

A:(8/20) change WLAN power from +3V to +3V_WL_VDD (make power to clear)

2/13 Change the footprint of R33 and R330 from 1206 to 0805

+3V

R33 0_8 R33 0_8

2/13 EMI stuff C40,C36,C54,C58,C289,C352,C319,C272

R260 *0_4 R260 *0_4

MINI2_SMDATA MINI2_SMCLK

PLTRST# RF_EN_WLAN

+3V

R330 *0_8 R330 *0_8

3/3 MINI PCI II no need USB , change USB10 to ESATA .and del R169,R188

PLTRST# 13,19,21,24,27,29

LFRAME#_PCIE

LAD3_PCIE LAD2_PCIE LAD1_PCIE LAD0_PCIE

A:(8/18) Add PCIE Debud card

New Card's Power Switch

QCI PN Vendor

AL000577001

AL027C10003

AL005538001

AL002231000

10/31 add newcard det#

+3V_S5

3

GMT

OMC

Ricoh

TI

PCIE_WAKE# 14,24

PERST#PERST#_R

C628

C628 *NEW@3300p/50V_4

*NEW@3300p/50V_4

+NEW_1.5V+NEW_3V +NEW_3VAUX

C635

NEW@4.7u/6.3V_6

PCIE_WAKE#

NEW_DET# 14

C631

NEW@0.1u/10V_4

C64

10u/10V_8

0.1u/10V_4

WiMAX_LED# 30

WL_USBP3+ 14 WL_USBP3- 14

PLTRST# 13,19,21,24,27,29 RF_EN 29

+3V_WL_VDD

C36C36

0.1u/10V_4 0.1u/10V_4

+3V_HD_VDD

C352C352 *0.1u/10V_4 *0.1u/10V_4

LFRAME# LAD3 LAD2 LAD1 LAD0

C54C54

0.1u/10V_4 0.1u/10V_4

C319C319 *0.1u/10V_4 *0.1u/10V_4

LFRAME# 13,29 LAD3 13,29 LAD2 13,29 LAD1 13,29 LAD0 13,29

C40

10U/10V/X5R_8

C289C289

*10U/10V/X5R_8 *10U/10V/X5R_8

R216*0_4 R216*0_4 R521*0_4 R521*0_4 R518*0_4 R518*0_4 R213*0_4 R213*0_4 R211*0_4 R211*0_4

12/10 Change New card footprint to NCARD-13180151-T-26P-L-BL5S

PCIE_TXP3 10 PCIE_TXN3 10

PCIE_RXP3 10 PCIE_RXN3 10

CLK_PCIE_NEW 3

+3V_S5

CLK_PCIE_NEW# 3

2

NEW_CLKREQ# 3

Q75Q75 *NEW@DTC144EU *NEW @DTC144EU

13

R580

NEW@0_4

NEW_CLKREQ#

*NEW@NC7SZ32P5X

(0918) Reserve CLKREQ# circuit to NEW_CLKREQ# of clock generator

U34

NEW_USBP6+ 14 NEW_USBP6-14

+3V

4

35

C58C58

0.1u/10V_4 0.1u/10V_4

C272C272 *0.1u/10V_4 *0.1u/10V_4

NEW Card_CLKREQ#

1

2

C44

0.001u/50V_4

R596R596

NEW@0_4 NEW@0_4

*NEW@2N7002E

+1.5V

C57

C35

10u/10V_8

0.1u/10V_4

CPPE# NEW Card_CLKREQ# +NEW_3V

PERST# +NEW_3VAUX

+NEW_1.5V

NEW_SMDATA NEW_SMCLK

CPUSB#

R268 NEW@0_4 R268 NEW@0_4 R269 NEW@0_4 R269 NEW@0_4

B:(9/27) Add 10k PU to +3V_S5B:(9/27) Change from +3V_S5 to +3V

3

2

1

Q76

PDAT_SMB 3,7,8,14

PCLK_SMB 3,7,8,14

WL_SMDATA

R38 *22_4 R38 *22_4

WL_SMCLK

R37 *22_4 R37 *22_4

A:(8/29) follow EMI suggestion, reserve RC termination

PDAT_SMB 3,7,8,14

PCLK_SMB 3,7,8,14

MINI2_SMDATA

R60 *22_4 R60 *22_4

MINI2_SMCLK

A:(8/29) follow EMI suggestion, reserve RC termination

T89 T89 T84 T84

USBP6+_R USBP6-_R

+3V_S5

R666*NEW @10K_4 R666*NEW@10K_4

+3V_S5

R598*NEW @10K_4 R598*NEW@10K_4

RCLKEN

Size Document Number Rev

Date: Sheet

R42 *22_4 R42 *22_4

New card

CN15

26

GND1

GND29

25

PETp0

GND30

24

PETn0

23

GND2

22

PERp0

21

PERn0

20

GND3

19

REFCLK+

18

REFCLK-

17

CPPE#

16

CLKREQ#

15

+3.3V1

14

+3.3V2

13

PERST#

12

+3.3VAUX

11

WAKE#

10

+1.5V1

9

+1.5V2

8

SMB_DATA

7

SMB_CLK

6

RESERVED1

5

RESERVED2

4

CPUSB#

3

USB_D+

2

USB_D-

1

GND4

NEW@130801-1

Header 130801-1 DFHD26MR074 Ejector 131851-V FBBL5001010

Quanta Computer Inc.

Mini PCIE/Hyberflash

+3V

2

4

Q15Q15

2

*2N7002E *2N7002E

1

Q14Q14

2

*2N7002E *2N7002E

1

C47 *10p/50V_4 C47 *10p/50V_4

C46 *10p/50V_4 C46 *10p/50V_4

Q16Q16

2

*2N7002E *2N7002E

1

Q17Q17

2

*2N7002E *2N7002E

1

C61 *10p/50V_4 C61 *10p/50V_4

C49 *10p/50V_4 C49 *10p/50V_4

1

3

2

4

1

3

25 42Thursday, May 29, 2008

3

R40 0_4 R40 0_4

+3V

3

R39 0_4 R39 0_4

+3V

3

R59 *0_4 R59 *0_4

+3V

3

R43 *0_4 R43 *0_4

29 30

PROJECT : BD3G

RP5

*4.7KX2

WL_SMDATA

WL_SMCLK

RP6

*4.7KX2

MINI2_SMDATA

MINI2_SMCLK

of

2A

A

4 4

AD[31..0] 13,17

AD17

REQ0#

GNT0# INTE#

AD17

R377 100/F_4 R377 100/F_4

A:(8/29) add 100ohm is that reduce the notice form PCI signal.

3 3

A:(8/24) Remove 33 ohm serial resister for PCIRST# (22 ohm resister alerady be puted in SB600 side)

A:(8/14)Base on AMD platform, change net name from INTA# to INTE#

2 2

1 1

OZ129_IDSEL

+3V +1.8V

C397

4.7u/6.3V_6

AD[31..0]

13 CBE3#

CBE2# 13 CBE1# 13 CBE0# 13

PCLK_OZ129 13

DEVSEL# 13 13 FRAME# 13 IRDY#

TRDY# 13

STOP# 13

13 REQ0#

GNT0# 13

PCIRST# 13,25

INTE# 13

14 PCI_PME#

CLKRUN# 13,29

TP_XD_LED 28

PAR 13

PCLK_OZ129

R376

*22_4

C393

*22p/50V_4

AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18

AD17

AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0

OZ129_IDSEL OZ129_CLK

INTE# PCI_PME# CLKRUN#

Reserve EMI

C370

0.1u/10V_4

L37 BK1608HS220_6 L37 BK1608HS220_6

C371

0.1u/10V_4

U20

OZ129T

102

56

AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0

C/BE3# C/BE2# C/BE1# C/BE0#

5

IDSEL PCI_CLK DEVSEL# FRAME# IRDY# TRDY# STOP# PAR REQ# GNT#

1

PCI_RST# INTA#

3

PME#

6

CLKRUN#

MEDIA_ACTV

PCI_VCC26PCI_VCC

GND 12GND 16GND 33GND 66GND 68GND

+3V

7

3.3VCCD

GND

115

104

19 20 21 22 23 24 25 27 29 30 31 32 34 35 36 37 47 48 49 50 51 52 53 54 57 58 59 60 61 62 63 64

28 38 46 55

45 42 39 40 41 43 44 17 18

11

106

Change Pulled-up Resistor on the South Bridge side.

MMC

A

+3VARUN

81

103

122

67

3.3VCCA733.3VCCA793.3VCCA

3.3VCCA

3.3VCCD

GND

AGND 65AGND 69AGND 70AGND 77AGND 80AGND

116

121

123

124

R384 *10K_4 R384 *10K_4

R382 *10K_4 R382 *10K_4

R383 *10K_4 R383 *10K_4

B

C368

C378

C377

4.7u/6.3V_6

1.8VCCD141.8VCCD151.8VCCD911.8VCCD921.8VCCD

SD/MS_CLK

SM_WPI#/SD_WP

MS_D1/XD_D7

MS_BS/XD_D3

MS_D0/XD_D2 MS_D2/XD_D1 MS_D3/XD_D0

82

B

C377

0.1u/10V_4

C402

C400

4.7u/6.3V_6

0.1u/10V_4

4.7u/6.3V_6

0.1u/10V_4

120

125

A:(9/7)Correct P/N to 1% resister

R352 5.9K/F_4 R352 5.9K/F_4

78

1.8VCCD

TPBIAS

TPA+

TPB+

MC_3V#

SD_D3 SD_D2 SD_D1 SD_D0

SD_CMD

SD_CD#

XD_D6 XD_D5 XD_D4

XD_CE#

XD_R/B#

XD_CLE

XD_ALE

XD_WE#

XD_RE#

XD_WPO#

MS_CD# XD_CD#

TEST0 TEST1

REF

TPA-

TPB-

NC1 NC2 NC6 NC7 NC5 NC3 NC4 NC8

1394_XIN

83

XI

1394_XOUT

84

XO

TPBIAS0

76

TPA0P

75

TPA0N

74

TPB0P

72

TPB0N

71

MC_PWR_3V#

4

SD/MS_CLK_L

113

SD_D3

111

SD_D2

112

SD_D1

107

SD_D0

108

SD_CMD

110

SM_WPI#/SD_WP

117

SD_CD#

114

MS_D1/XD_D7

95

XD_D6

93

XD_D5

89

XD_D4

87

MS_BS/XD_D3

88

MS_D0/XD_D2

90

MS_D2/XD_D1

94

MS_D3/XD_D0

96

XD_CE#

119

XD_R/B#

100

XD_CLE

118

XD_ALE

109

XD_WE#

105

XD_RE#

101

XD_WPO#

98

MS_CD#

99

XD_CD#

97

2 8 9 10 13 126 127 128

85 86

H=1.6mm

L38 BK1608HS220_6 L38 BK1608HS220_6

5/27 some 1394 device can't boot normal change L38 to BK1608HS220_6

INTE#

PCI_PME#

CLKRUN#

C399

0.1u/10V_4

12/8 change from 22p to 18p

C381 18p/50V_4 C381 18p/50V_4

Y7 24.576MHz Y7 24.576MHz

C380 18p/50V_4 C380 18p/50V_4

12

Better than 50ppm

H=1.2mm

12/21 add 0 ohm and 22p for SD/MS CLK

R683 33_4 R683 33_4

1/31 According to customer request, we can't stuff C782(22pF) in SD/MS_CLK 2/13 EMI change R683 from 0 to 33 ohm

SD/MS_CLK

C782

*22P_4

C

+3V

R723

R723 *10K_4

+3V

*10K_4

R725

R725 *10K_4

*10K_4

2

Q84

*ME2N7002D

+3V

XD_CD#_C

MS_CD#

5 IN 1 CARD READER

XD_CLE XD_CLE_C

R324 33_4 R324 33_4

SD_D2 SD_D2_C

R328 33_4 R328 33_4

XD_WPO# XD_WPO#_C

R327 33_4 R327 33_4

XD_CD# XD_CD#_C

R320 33_4 R320 33_4

XD_R/B#

R321 33_4 R321 33_4

XD_ALE XD_ALE_C

R325 33_4 R325 33_4

XD_RE# XD_RE#_C

R322 33_4 R322 33_4

MS_CD# MS_CD#_C

R318 33_4 R318 33_4

SD_CMD SD_CMD_C

R319 33_4 R319 33_4

MS_D3/XD_D0

R317 33_4 R317 33_4 R315 33_4 R315 33_4

XD_CE# XD_CE#_C

R323 33_4 R323 33_4

XD_WE# XD_WE#_C

R329 33_4 R329 33_4

SD_D3 SD_D3_C

R326 33_4 R326 33_4

1394

TPBIAS0

TPA0P TPA0N

TPB0N TPB0P

C

As close as possible to OZ129

+3V

3

R722

R722 *10K_4

*10K_4

2

3

Q82

*ME2N7002D

2

Q83

1

3

5/9 for card reader MS DUO adapter short issue reserve R723,724,722 ,Q82,Q81,Q83,Q84

1

2

1

R724

R724 *10K_4

*10K_4

3

*ME2N7002D

1

D

XD_CD#

Q81

*ME2N7002D

12/21 EMI R308~R329 0ohm(CS00002JB38) change to 33ohm(CS03302JB29)

1/31 hange CN33(5 in 1 card CONN) P/N from DFHS38FR003 to DFHS38FR005

CN33

6

CLE_XD

9

DAT2_SD

10

-WP_XD

2

XD_R/B#_C

VCC_XD

SD/MS_CLK_C MS_D3/XD_D0_C MS_D2/XD_D1_C MS_D2/XD_D1

VCC_XD

A:(8/29) change from 33 to 0 ohm connect the socket and chip by wire directly, and keep same length of these signals. but if these signal over 15 ~cm , please consider to add these damping resistors.

R355

R356

1394@56.2/F_4

R353

R354

1394@56.2/F_4

1394_COM

C374

R340

1394@270p/25V_4

1394@5.1K/F_4

CD_XD

3

R/-B_XD

7

ALE_XD

4

-RE_XD

1

GND_XD

11

MS-VSS

13

MS-VCC

18

MS-INS

19

VSS_SD

17

GND_XD

15

CMD_SD

14

MS-SCLK

16

MS-DATA3

20

MS-DATA2

5

-CE_XD

8

-WE_XD

12

CD/DAT3_SD

21

VDD_SD

MXP038-C0-1015

1394@1u/10V_4 C372 1394@1u/10V_4 C372

L68

443

1

1394@CL-2M2012-121JT

L69

1

1 443

1394@CL-2M2012-121JT

2/4 reserve D88~D91 for 1394

D8 8 1394@EGA D88 1394@EGA

2 1

D8 9 1394@EGA D89 1394@EGA

2 1

D9 0 1394@EGA D90 1394@EGA

2 1

D9 1 1394@EGA D91 1394@EGA

2 1

D

L1394_TPB0-

L1394_TPA0-

L1394_TPA0+

L1394_TPB0+

SDIO/MS-DATA0

12/21 EMI Don't stuff RN34,RN35(CJ000042N12) Add L68,L69(CX0900JT005)

3 2

2

3

2/29 del RN34,RN35

4/10 add D88~D91 for 1394 ESD

GND-SDIO

CLK_SD

MS-BS

VSS_SD

MS-VSS

D1_XD

DAT0_SD

D2_XD

DAT1_SD

D3_XD D4_XD D5_XD D6_XD D7_XD

VCC_XD

C/D_SD

GND_SD

W/P_SD

MS-DATA1

D0_XD

L1394_TPA0+ L1394_TPA0-

L1394_TPB0L1394_TPB0+

43

GND

42 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

24 22 23

CARDREADER POWER

+3V

MS_D2/XD_D1_C

MS_D0/XD_D2_C

MS_BS/XD_D3_C

XD_D4_C

MS_D1/XD_D7_C

MS_D3/XD_D0_C

These 1394 signals are high speed differential pairs and must be kept equal length with a differential impedance (Zo) of 110ohms.

MC_PWR_3V#

C347

1u/25V_8

R316 33_4 R316 33_4 R311 33_4 R311 33_4

R314 33_4 R314 33_4

R312 33_4 R312 33_4

R310 33_4 R310 33_4 R309 33_4 R309 33_4 R308 33_4 R308 33_4

R610 33_4 R610 33_4

R648 33_4 R648 33_4

R335 33_4 R335 33_4 R313 33_4 R313 33_4

L1394_TPB0L1394_TPA0L1394_TPA0+ L1394_TPB0+

Size Document Number Rev

Date: Sheet

Date: Sheet of

E

U18

U18 RT9711BPF

RT9711BPF

2 3

4 1 9

CN38

1 3 4 2

1394@C13141-10405-L

OZ129T (Card Reader/1394)

8

IN1

OUT3

7

IN2 OUT2

6

OUT1 EN# GND

5

OC#

GND-C

VCC_XD

C350

4.7u/6.3V_6

SD/MS_CLKSD/MS_CLK_C

MS_BS/XD_D3MS_BS/XD_D3_C

SD_D0SD_D0_C

SD_D1SD_D1_C

XD_D4

XD_D5XD_D5_C

XD_D6XD_D6_C

SD_CD#SD_CD#_C

SM_WPI#/SD_WP SM_W PI#/SD_WP_C

MS_D1/XD_D7MS_D1/XD_D7_C

MS_D0/XD_D2MS_D0/XD_D2_C

5

6

PROJECT : BD3G

Quanta Computer Inc.

E

30mil

VCC_XD

R293 *10K_4 R293 *10K_4

C351

0.01u/16V_4

C346

0.01u/16V_4

VCC_XD

+3V

C345

0.01u/16V_4

2A

of

26 42Thursday, May 29, 2008

5

FLASH

15 PDD[0..15]

15 PDDREQ 15 PDIOW# 15 PDIOR#

15 PDIORDY

PDDACK# 15 15 IRQ14 15 PDA1 15 PDA0 15 PDCS1#

D D

15 PDA2

PDCS3# 15

11/01 modify it

HDD_AUX_RST# 14

PDD[0..15]

PDDREQ PDIOW# PDIOR# PDIORDY PDDACK# IRQ14 PDA1 PDA0 PDCS1# PDA2 PDCS3#

D15 *CH501H-40PT D15 *CH501H-40PT

PLTRST# 13,19,21,24,25,29

D14 *CH501H-40PT D14 *CH501H-40PT

R289

*0_6

C438

C437

*1u/10V_4

R217

R217 *10K_4

*10K_4

IDE_RST#_B

C437

*1u/10V_4

C443

*1u/10V_4

+1.8V

21

C403

*22u/6.3V_8

4

+1.8V_FLASH+1.8V

Flash moduel operate at 1.8V Pin2, 20 is NC for Flash module

IDE_RST#_B PDD7

PDD6 PDD5

PDD4 PDD3

PDD2 PDD1 PDD0 PDIOW#

PDIORDY PDA1

PDA0 PDCS1#

42

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26

25 24 23 22 21

CN3

NC

+1.8V PERST# PDD7 GND PDD6 PDD5 +1.8V PDD4 PDD3 GND PDD2 PDD1 PDD0 PDIOW# +1.8V

PDIORDY# PDA1 +1.8V PDA0 PDCS1#

*78319-0011

PDD8 PDD9

PDD10 PDD11

PDD12 PDD13

PDD14 PDD15

PDREQ

PDIOR#

PDACK#

PIDE_INTR

PDA2

PDCS3#

41

NC

20

NC

19 18 17

GND

16 15 14

GND

13 12 11

GND

10 9 8 7

GND

6

5

GND

4 3 2 1

10/30 use H:5.2 for A-test

3

4/10 remove Flash card ckt

R345 *0_4 R345 *0_4

PDD8 PDD9

PDD10 PDD11

PDD12 PDD13

PDD14 PDD15 PDDREQ

PDIOR#

PDDACK# IRQ14

PDA2_R

R303 *0_4 R303 *0_4

PDCS3#

10/29 add four stitch cap

+1.8VSUS

C434 *0.01u/16V_4 C434 *0.01u/16V_4

C447 *0.01u/16V_4 C447 *0.01u/16V_4

C439 *0.01u/16V_4 C439 *0.01u/16V_4

C398 *0.01u/16V_4 C398 *0.01u/16V_4

12

C490

*47n/25V_6

PDA2

R346

*100K_4

+5V

PDMA66 14

2

SATA ODD

9/28 change to SATA ODD conn to BD3G use

10/22 update footprint to SATA-C18534-11305-13P-R

CN2

GND14

GND1

RXP RXN

GND2

TXN TXP

GND3

DP +5V +5V

RSVD

GND GND

GND15

C18534-11305-L

14

1 2 3 4 5 6 7

8 9 10 11 12 13

15

Check New ODD CONN Pin Define.

R331 1K_4 R331 1K_4

+5VSATA_ODD

C456

C457

0.1u/10V_4

C458

0.1u/10V_4

SATA_TXP3 15 SATA_TXN3 15

SATA_RXN3 15 SATA_RXP3 15

Device Present

C459

0.1u/10V_4

1

R304 0_8 R304 0_8

C461

10u/10V_8

+5V

4/14 change R706 from 0 ohm to 330 , stuff R692,R693,R694

C C

ESATA

5/5 update re-driver footprint to tqfn36-5x6-5-37p-0_75h-te1m

15 SATA_TXP2 15 SATA_TXN2

15 SATA_RXP2

SATA_RXN2 15

B B

SATA HDD

CN34

23

GND23

1

GND1

2

RXP

3

RXN

4

GND2

5

TXN

6

TXP

7

GND3

8

3.3V

9

3.3V

RSVD

GND24

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18 19

GND

20

12V

21

12V

22

12V

24

A A

SA@127043FR022GX51ZR

2/13 add ESATA re-driver IC

R700 *0_4R700 *0_4 R701 *0_4R701 *0_4

SATA_TXP2 SATA_TXN2

SATA_RXN2

4/17 remove D77~D81 for CN34 , change to U44 CM1213-04SO

5/5 add C816 0.01u to U44 +5V for ESD

SATA_TXP0 SATA_TXN0

+3.3VSATA1

5

C354

0.1u/10V_4

SATA_TXP0 15 SATA_TXN0 15

SATA_RXN0 15 SATA_RXP0 15

A:(8/17) Add Cap for SATA interface A:(8/17) Add Cap for SATA interface

C658

C651

*4.7u/6.3V_6

*0.1u/10V_4

C636

C644

0.1u/10V_4

10u/10V_8

12 12

35

37

U43

NC236NC1

GND

1

VDD

2

A+

3

A-

4

GND

5

AVDD

6

VDD

7

BO+

8

BO-

9

GND

10

VDD

CLKIN+ 11CLKIN-12SEL0_B 13SEL1_B 14SEL2_B 15SEL3_B 16OUT+ 17OUT-

R709R709

R708

R708 1K_4

1K_4

R609 *0_8 R609 *0_8

R710R710

*1K_4 *1K_4

U44

U44 CM1213-04SO

CM1213-04SO

SATA_TXN0 SATA_RXP0

1

2

SATA_TXP0

3

+3V

2/4 del R270,R597 , connect to +5V directly

C373

150u/6.3V_7343

CH1

VN

CH2

+5V

33

SEL0_A34SEL1_A

SEL2_A32SEL3_A

R692

R692 1K_4

1K_4

R716 10K_4 R716 10K_4

R717 10K_4 R717 10K_4

29

31

EN_A30EN_B

VDD

AO+

AO-

GND

AGND

VDD

GND IREF

PI2EQX3201

18

R711 R711 *1K_4 *1K_4

CH4

VP

CH3

BI+ BI-

6

5

4

+1.8V+1.8V

28 27 26 25 24 23 22 21 20 19

12

R712

R712 *0_4

*0_4

SATA_RXN0

4

R693

R693 1K_4

1K_4

R707 *470_4 R707 *470_4

12

R713R713 *0_4 *0_4

R694

R695

1K_4

+1.8V

Close IC, no stub at high-speed trace on PCB layout.

R706

R706 330_4

330_4

C801 4700p/25V_4C801 4700p/25V_4

eSATA_TXP2_R eSATA_TXP2 eSATA_TXN2_R

eSATA_RXP2_RSATA_RXP2 eSATA_RXN2_R eSATA_RXN2

2'nd SATA HDD

+5V

C816

0.1u/10V_4

SA@127043FR022XX27ZR

C802 4700p/25V_4 C802 4700p/25V_4

C811 4700p/25V_4C811 4700p/25V_4

C812 4700p/25V_4 C812 4700p/25V_4

CN32

23

GND23

1

GND1

2

RXP

3

RXN

4

GND2

5

TXN

6

TXP

7

GND3

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

RSVD

19

GND

20

12V

21

12V

22

12V

24

GND24

12

eSATA_TXN2

12

eSATA_RXP2

12 12

2/20

1.change C801,C82 from 0.01u to 4.7n

2.RX add C811,C812 4.7n

A:(9/5) update footprint A:(9/13) update footprint

SATA_TXP1 SATA_TXN1

+3.3VSATA2

C348

0.1u/10V_4

SEL0_X

C358

*4.7u/6.3V_6

C344

0.1u/10V_4

SATA_TXP2

SATA_TXN2

SATA_RXP2

SATA_RXN2

0

1

SATA_TXP1 15 SATA_TXN1 15

SATA_RXN1 15 SATA_RXP1 15

C363

*0.1u/10V_4

3

R69 6 *0_4 R696 *0_4

1 2

R69 8 *0_4 R698 *0_4

1 2

R70 2 *0_4 R702 *0_4

1 2

R70 4 *0_4 R704 *0_4

1 2

SEL1_X

000dB

1

C338

10u/10V_8

Option SB to ESATA directly

R69 7 *0_4 R697 *0_4

SATA_TXP2_R

SATA_TXN2_R

SATA_RXP2_R

SATA_RXN2_R

SEL2_X

Eq

0

2.5dB

4.5dB

6.5dB

1/17 Change CN32(2nd SATA CONN) from DFHS22FR064 to DFHS22FR094

1/17 Change CN32 footprint from SATA-127043FR022XX27ZR-22P-L-H to SATA-127043FR022G285ZR-22P-L

1/31 Change CN34 (1st SATA) P/N from DFHS22FR063 to DFHS22FR082

1/31 Change CN32 (2nd SATA) P/N from DFHS22FR094 to DFHS22FR083

R338 *0_8 R338 *0_8

C315

150u/6.3V_7343

eSATA_TXP2

1 2

R69 9 *0_4 R699 *0_4

eSATA_TXN2

1 2

R70 3 *0_4 R703 *0_4

eSATA_RXP2

1 2

R70 5 *0_4 R705 *0_4

eSATA_RXN2

1 2

2/26 change ESATA conn usb-2006109-11p update p/n to DFHS11FR021

4/10 change ESATA conn usb-2006109-11p update p/n to DFHS11FR023

4/10 add D67,D49,D50 for ESATA USB ESD

5/29 change ESATA conn p/n to DFHS11FR027

SEL3_X

Swing De-Emphasis

0

1.0X

1.2X

+3V

+5V

0dB

11

-3.5dB

2/4 reserve D82~D86 for CN32(2ND HDD)

4/17 remove D82~D86 for CN32 , change to U45 CM1213-04SO

5/5 add C818 0.01u to U45 +5V for ESD

SATA_RXN1 SATA_TXN1

1

2

SATA_RXP1 SATA_TXP1

3

2

U45

U45 CM1213-04SO

CM1213-04SO

CH1

VN

CH2

2/29 del R572,R569

USBPWR0 28

6

CH4

5

VP

4

CH3

USBP7-14

USBP7+ 14

Size Document Number Rev

Date: Sheet

Co-lay ESATA footprint

RFCM1632100M3

2

USBP7+

3

USBPWR0

+

C604

C604 100u/6.3V_3528

100u/6.3V_3528

eSATA_TXP2 eSATA_TXN2

eSATA_RXN2 eSATA_RXP2

D6 7 VPORT D67 VPORT

2 1

D4 9 EGA D49 EGA

2 1

D5 0 EGA D50 EGA

2 1

+5V

C818

0.1u/10V_4

SATA / PATA

2

L64

443

USBPWR0

BUSBP7-

BUSBP7+

BUSBP7BUSBP7+

1

USB Vcc

2

D-

3

D+

4

GND

5

GND

6

A+

7

A-

8

GND

9

B-

10

B+

11

GND

1-2006190-5

BUSBP7-USBP7-

1

2/4 reserve D67 for CN31

PROJECT : BD3G

Quanta Computer Inc.

27 42Thursday, May 29, 2008

1

CN31

12

Shield

13

Shield

14

Shield

15

Shield

2A

of

5

R512 FP@0_8 R512 FP@0_8

+3V

D D

+5V

C C

A:(9/17) Toshiba recommend: Felica module power default need control power by EC

Q69Q69

2

*FP@AO3413 *FP@AO3413

3/3 no Felica request , remove Q57,C476,R450,Q56

R449*0_8 R449*0_8

3

1

Q57Q57

2

*AO3413 *AO3413

3

1

FINGER_POWER

+

C558 FP@10u/10V_8

C555 *FP@1000p/50V_4 C555 *FP@1000p/50V_4

C552 *FP@0.1u/10V_4 C552 *FP@0.1u/10V_4

FELICA_POWER

+

C476 *10u/10V_8

C469 *1000p/50V_4 C469 *1000p/50V_4

C467 *0.1u/10V_4 C467 *0.1u/10V_4

+3V

R515R515 *FP@4.7K_4 *FP@4.7K_4

2

Q70Q70

13

*FP@DTC144EU *FP@DTC144EU

+5V

R450R450 *4.7K_4 *4.7K_4

2

Q56Q56

13

*DTC144EU *DTC144EU

FP_PWRON 29

FELICA_PWRON 29

A:(9/4) P/N not ready

F6

80 mils

+5VPCU

B B

F6

POLY_SWITCH

RC1206

RC1206 DK150TPU072

DK150TPU072

12

+5VPCU_USB1

80 mils

A:(9/4) Add 2A Poly switch on USB power which 2 connector share 1 switch

USB

+5VPCU_USB1

USB_EN# 29

A A

A:(9/4) Add 10uF for Cout (no stuff) Please reserve Cin = 1uF(stuff),Cout = 10uF(don't stuff) for Richtek RT9711BPF Please reserve Cin = 4.7uF(stuff),Cout = 10uF(don't stuff) for GMT solution

C733

*0.1u/10V_4

C736

C736 1u/10V_6

1u/10V_6

5

U39

U39 RT9711BPF

RT9711BPF

2

IN1

3

IN2 OUT2

4

EN#

1

GND

9

GND-C

OUT3

OUT1

OC#

8 7 6

5

C737

*0.1u/10V_4

USBPWR0

R366 10K_4 R366 10K_4

10/25 modify it

C722C722 *10u/10V_8 *10u/10V_8

USBOC#3 14,29

USBPWR0 27

+3V_S5

4

10/19 change to BL121-08R-TAND

FM

13 FM_INTX

FM_DET 14

22 FM_RIGHT

FM_LEFT 22

FM_DATA 14 FM_CLOCK 14

2/13 EMI stuff C465

+3V

FM_INTX FM_DET FM_RIGHT FM_LEFT

FM_DATA FM_CLOCK

C465

C465 FM@0.1u/10V_4

FM@0.1u/10V_4

FM@BL121-08R-TAND

910

8 7 6 5 4 3 2 1

CN1

1/31 Change CN13(FP CONN) P/N from DFHD04MR012 to DFHD04MR021

Finger Printer

FINGER_POWER

A:(8/29) reserve cap for EMI

5/8 stuff D68,D69,D70 for FP

Felica

FM_CLOCK

C310

*FM@10p/50V_4

A:(8/29) follow EMI suggestion, reserve 10~33pf cap

*FM@10p/50V_4

12/21 del R276,R278 stuff L72

1/18 Change L72 from CX216900002 to CX163210007(BT circuit) 4/18 Change L72 from CX163210007(BT circuit) to CX201290009

2/10 Stuff L64,L65 to CX163210007

# Placed common mode chokes within 1.0" of the USB connectors

RFCM1632100M3

USBP0USBP0+

2

3

L65

USBP0-14

USBP0+ 14

BUSBP0-

1

BUSBP0+

443

2/29 del R608,R607

A:(9/17) change to +3V_S5

A:(8/31) change U5 location to between the common chokea and the CONN

# ESD suppression components are placed within 0.5" of the user accessible USB connectors and are located between the common mode chokes and the connectors.

4/10 add D51,D52 for USB0

4

FELICA_POWER

A:(8/29) reserve cap for EMI

BLUETOOTH MODULE CONNECTOR

BT_USBP8-14 BT_USBP8+14

2/13 EMI stuff C618

2/4 stuff D71,D72,D73 for BT

10/29 pin1 change from MX1 to MX5

USBP9+ 14

USBP9-14

USBP1+ 14

USBP1-14

1

+3V

A:(8/29) reserve cap for EMI

Wire Cable 1.25mm Pitch

Low cost

2/15 Change L70,L71 from CX216900002 to CX201290009

L70

3 2

2

WCM-2012-900T

L71

3 2

2

WCM-2012-900T

3

2/13 EMI stuff C559

14 FP_USBP4-

C559

FP@0.1u/10V_4

3/3 no Felica request , remove USB del R178,R179

443 1

WCM-2012-900T

C618

BT@0.1u/10V_4

BT_EN 29

FP_USBP4+ 14

2 1

D68 FP@EGA D68 FP@EGA

2 1

D69 FP@EGA D69 FP@EGA

2 1

D70 FP@VPORT D70 FP@VPORT

T93 T93

C228C228 *0.1u/10V_4 *0.1u/10V_4

L72

BT_USBP8-_C

3

BT_USBP8+_C

2

25 WCS_CLK

WCS_DAT 25

+3V

R305 *BT@0_4 R305 *BT@0_4

R306 BT@0_4 R306 BT@0_4

USB_DETACH: Low USB connect

High USB disconnect

BT@EGA

D71

2

D72

BT@EGA

2

D73

BT@VPORT

2

+3VPCU MX5 29,30 MX2 29,30 MY1 29,30

MX3 29,30

14 LOW_DET

MX4 29,30

FN0# 29 FN1# 29

WCS_CLK

BT_RESET WCS_DAT

USB_DETACH

BT@88266-100XX-XXX-10P-R

BT_USBP8+_C

1

BT_USBP8-_C

1

LID@BL123-10R-TAND-10P-L-BU1

FFC Cable 1.0mm Pitch

A:(9/17) change usb/b OC pin pull-high ckt into MB side

10/25 modify it

+5VPCU

C391C391

0.1u/10V_4 0.1u/10V_4

USBP9+_C

443

USBP9-_C

1

USBP1+_C

443

USBP1-_C

1

2/13 EMI stuff C391,C701,C809,C810

D5 1 EGA D51 EGA

D5 2 EGA D52 EGA

D1 7 *VPORT D17 *VPORT

3

USB_EN2# 29

1/31 Change CN16(USB-FFC CONN) P/N from DFHD10MR011 to DFHD10MR008

2 1

BUSBP0-

BUSBP0+

+5VPCU

USBP4-_C

USBP4+_C

FINGER_POWER

*BL121-06R-TAND

CN14

BT_RESET

USB_DETACH

USBP4-_C USBP4+_C

FP@88266-040XX-XXX-4P-R

CN12

8 6 5 4 3 2 1

7

1

1211 2 3 4 5

1/31 Change CN14(BT CONN)

6

P/N from DFHD10MR011 to

7

DFHD10MR008

8 9 10

C803

C803 BT@100p/50V_4

BT@100p/50V_4

CN6

12 1 2 3 4 5 6 7 8 9 10

11

+3V_S5

USBOC#0

C353C353 *0.1u/10V_4 *0.1u/10V_4

C809

C809 100p/50V_4

100p/50V_4

+5VPCU

C810

C701C701

0.1u/10V_4 0.1u/10V_4 100p/50V_4

100p/50V_4

2/15 CN42 co-layout with CN16

4/16 remove CN42 not co-layout with CN16

R200 FP@0_6 R200 FP@0_6 R199 FP@0_6 R199 FP@0_6

T177 T177 T176 T176

BT_USBP8+_C BT_USBP8-_C

+3V

A:(9/13) change PIN2 to OC pin

USBOC#0 14,29

2

T/P

CN13

1 2 3 4

56

TP_LED_ON 29

2/13 EMI stuff C618,C794

A:(9/17) Follow BL5, change from +5V to +5VPCU

12/21 EMI add 0.1u for +5VPCU add 100p for 3ND_MBDATA/CLK

R307

R307 10K_4

10K_4

USBP9+_C USBP9-_C USBP1+_C USBP1-_C

88266-100XX-XXX-10P-R

2

C151

4.7u/10V_8

L16 BLM18PG181SN1D_6 L16 BLM18PG181SN1D_6

1 2

+5V

+5VPCU

TPDATA 29

TPCLK 29

11/08 modify it

R667

R667 10K_4

10K_4

1 3

R669

*0_4

Power board

+5VPCU

2/13 EMI stuff C41

A:(8/29) reserve cap for EMI

Main strem

+5VPCU

10/19 change USB CONN footprint and pin-define (follow USB CONN Standard)

CN16

1

1211 2 3 4 5 6 7 8 9 10

1

C156

*10P_4

TPDATA_1 TPCLK_1

C157C157 *10P_4 *10P_4

+5V_TP

TP_LED_ON_C BATLED1# BATLED0# PWRLED# SUSLED_EC IDE_LED# ACIN TP_XD_LED

BL121-14R-TAND-14P-L-BU1

+5V_TP

C155

0.1u/10V_4

R108 0_4 R108 0_4 R109 0_4 R109 0_4

+3VPCU

R668

R668 330_4

330_4

Q78

2

MMBT3904

TP_LED_ON_C

GND

29 BATLED1# 29 BATLED0# 29,30 PW RLED# 29 SUSLED_EC 30 IDE_LED# 29,32 ACIN

TP_XD_LED 26

10/29 Add

B:(10/21) change Power board CONN (CN8) footprint & P/N

10/19 change to BL123-04R-TAND

BL123-04R-TAND

CN8

+5VPCU

NBSWON# 29,30

PWRLED# 29,30

D9 4 *VPORT D94 *VPORT

C41

0.1u/10V_4

C783

MID@0.1u/10V_4

USBPWR0

2 1

2/10 DEL C42, Add D94 for CN8/Pin2 (ESD issue) - default no stuff

+3VPCU

29 KEY_INT

+

B:(10/16) change USB CONN footprint and pin-define (follow USB CONN Standard)

+5VPCU

3ND_MBDATA 19,21,29

3ND_MBCLK 19,21,29

3ND_MBDATA 3ND_MBCLK

C784

MID@100p/50V_4

C687

C687 100u/6.3V_3528

100u/6.3V_3528

D6 6 VPORT D66 VPORT

2 1

2/4 reserve D66 for CN36

4/10 add D66

Size Document Number Rev

Date: Sheet

CN8

1 2 3

6

4 5

NBSWON#

2/13 EMI stuff C43

C785

MID@100p/50V_4

CN36

BUSBP0BUSBP0+

USBPWR0

FP/ TP/ USB /BT/FELICA

1 2 3 4

USB

PROJECT : BD3G

Quanta Computer Inc.

1

PWRLED#

10/25 update footprint

MID@BL123-06R-6P-R-BL5

7 1 2 3 4 5 6

8

CN7

5 6 7 8

CN11

16

1 2 3 4 5 6 7 8 9 10 11 12 13 14

15

C43

100p/50V_4

28 42Thursday, May 29, 2008

2A

of

5

PCLK_591

R501R501 *22_4 *22_4

C550

C550 *10p/50V_4

*10p/50V_4

C554

C523C523

C557C557

D D

10u/10V_8

0.1u/10V_4 0.1u/10V_4

12/20 avoid leakage reserve D59/D60 to CLKRUN#/PLTRST#

R681 0_4 R681 0_4

CLKRUN# 13,26

Reserve for EMI

PLTRST# 13,19,21,24,25,27

C C

SMBUS Table

DevicesSMBUS

1 Battery

CPU Thermal Sensor

2

3D Sensor EC EEPROM

3

VGA Board Thermal Sensor Touch Sensor

To: Battery connector To: Battery connector To: CPU Thermal Sensor, 3D Sensor, EC EEPROM To: CPU Thermal Sensor, 3D Sensor, EC EEPROM To: VGA Board Thermal Sensor, Touch Sensor To: VGA Board Thermal Sensor, Touch Sensor

To: AMD CPU (Output)

Rev03 modify 2007/08/16

+5V

B:(10/23) Add CHG_EN

R519 10K_4 R519 10K_4 R526 10K_4 R526 10K_4

B B

GND Shape should below the Crystal and have some GND vias

B:(10/24) change C575,C579 from 6.8p to 15p (base on TXC report)

1. Traces as short as possible

2. NO vias

3. Keep away from high speed signals

A A

D59 *BAS316 D59 *BAS316

A:(9/4) add diooe for leakage issue

To: Back light control circuit (Output)

To internal KB Con.

T PCLK TPDATA

14 GATEA20

R682 0_4 R682 0_4

D60 *BAS316 D60 *BAS316

CPU_PROCHOT# 4

1/31 leakage issue ,no stuff R425

To: Touch PAD To: Touch PAD

To: Charger (for 15, 17) (Output) To: Finger Printer Con (output) To: Internal KB LED (output) To: Felica Con (output)

C575

C575 15p/50V_4

15p/50V_4

CPU_COREPG 4,34

HWPG_2.5V 37

33 SYS_HW PG

35 HWPG_1.2V_NB

HWPG_1.8V 36

HWPG_1.5V 37

HWPG_CPUIO 37

HWPG_1.1V_NB 37

5

C253C253

0.1u/10V_4 0.1u/10V_4

LFRAME# 13,25

LAD0 13,25 13,25 LAD1 13,25 LAD2

LAD3 13,25

PCLK_591 13,17

RCIN# 14

SCI# 14

EC_FPBACK# 20

CEC_EC_HP 19

USB_EN# 28

SERIRQ 13

USB_EN2# 28

30 MX0

28,30 MX2 28,30 MX3

30 MX6

30 MY2

30 MY5

30 MY7

30 MY9 30 MY10

32 MBCLK 32 MBDATA

2ND_MBCLK 4

2ND_MBDATA 4

19,21,28 3ND_MBCLK

3ND_MBDATA 19,21,28

28 TPCLK

TPDATA 28

CHG_EN 32

28 FP_PWRON

FN_F10 30

FELICA_PWRON 28

R532 20M_6 R532 20M_6

Y9

4 1

23

32.768KHZY932.768KHZ

8769AGND

11/01 all power good pull up to +3V

+3V

D13D13

D12D12

D47

MX1 30

MX4 28,30 MX5 28,30

MX7 30

MY0 30 MY1 28,30

MY3 30 MY4 30

MY6 30

MY8 30

MY11 30 MY12 30 MY13 30 MY14 30 MY15 30 MY16 30 MY17 30

R425 *0_4 R425 *0_4

C579

R117 10K_4 R117 10K_4

R94 10K_4 R94 10K_4

R121 10K_4 R121 10K_4

R466 10K_4 R466 10K_4

R438 10K_4 R438 10K_4

R120 10K_4 R120 10K_4

R119 10K_4 R119 10K_4

R51 10K_4 R51 10K_4

C576C576

0.1u/10V_4 0.1u/10V_4

BAS316

R536

R536 33K/F_6

33K/F_6

15p/50V_4

GFXPG 21

+3VPCU

BAS316 BAS316

MY17

HWPG

8768_32KX1

8768_32KX2

GATA20_R

RCIN#_R

SCI#_uR

L25L25

BLM18AG601SN1_6 BLM18AG601SN1_6

C556C556

0.1u/10V_4 0.1u/10V_4

3

LFRAME

126

LAD0

127

LAD1

128

LAD2

1

LAD3

2

LCLK

8

CLKRUN/GPIO11

121

GA20

122

KBRST

29

ECSCI/GPIO54

6

LDRQ/GPIO24

124

LPCPD/GPIO10

7

LRESET

123

PWUREQ/GPIO67

125

SERIRQ

9

SMI/GPIO65

54

KBSIN0

55

KBSIN1

56

KBSIN2

57

KBSIN3

58

KBSIN4

59

KBSIN5

60

KBSIN6

61

KBSIN7

53

KBSOUT0/SOUT_CR/JENK

52

KBSOUT1/TCK

51

KBSOUT2/TMS

50

KBSOUT3/TDI

49

KBSOUT4

48

KBSOUT5/TDO

47

KBSOUT6/RDY

43

KBSOUT7

42

KBSOUT8

41

KBSOUT9

40

KBSOUT10

39

KBSOUT11

38

KBSOUT12/GPIO64

37

KBSOUT13/GPIO63

36

KBSOUT14/GPIO62

35

KBSOUT15/GPIO61/XOR_OUT

34

KBSOUT16/GPIO60

33

KBSOUT17/GPIO57

70

SCL1/GPIO17

69

SDA1/GPIO22

67

SCL2/GPIO73

68

SDA2/GPIO74

119

SCL3/GPIO23

120

SDA3/GPIO31

24

SCL4/GPO47

28

SDA4/GPIO53

72

PSCLK1/GPIO37

71

PSDAT1/GPIO35

10

PSCLK2/GPIO26

11

PSDAT2/GPIO27

12

PSCLK3/GPIO25

13

PSDAT3/GPIO12

77

32KX1/32KCLKIN

79

32KX2

EC

Can try to change to 0_0603

D42 BAS316 D42 BAS316

D39 BAS316 D39 BAS316

D41 BAS316 D41 BAS316

D40 BAS316 D40 BAS316

D44 BAS316 D44 BAS316

D38 BAS316 D38 BAS316

D37 BAS316 D37 BAS316

D2 BAS316 D2 BAS316

D43 EV@BAS316 D43 EV@BAS316

4

For Pin 102

+A3VPCU

19

46

76

88

115

VCC1

VCC2

VCC3

VCC4

VCC5

A:(9/7) change from L to 0 ohm base on EC FAE suggestion

4

C564

0.1u/10V_4

8769AGND

102

U26

H=1.6mm

AVCC

LPC

KB

SMB

PS/2

GND1

GND2

GND3

GND4

GND5

GND6

5

18

45

78

89

116

R522 0_6 R522 0_6

8769AGND

+3V

R487

R487 10K_4

10K_4

C570

10u/10V_8

AD0/GPI90 AD1/GPI91

A/D

D/A

PWM

TIMER

SPI

FIU

HWPG

AD2/GPI92

AD3/GPI93 AD4/GPIO05 AD5/GPIO04 AD6/GPIO03 AD7/GPIO07

DA0/GPI94

DA1/GPI95

DA2/GPI96

DA3/GPI97

GPIO41(VBAT)

GPIO

GPIO42/TCK

GPIO43/TMS

wake-up

GPIO44/TDI

capability

GPIO50/TDO

CIRTX2/GPIO52/RDY

no wake-up

GPO82/TRIS

capability

GPO84/BADDR0

SOUT_CR/GPO83/BADDR1

SIN_CR/CIRRX/GPIO87

SER

FIR

CIR

A_PWM/GPIO15 B_PWM/GPIO21 C_PWM/GPIO13 D_PWM/GPIO32 E_PWM/GPIO45

F_PWM/GPIO40/CLKIN48

G_PWM/GPIO66

H_PWM/GPIO33

TA1/GPIO56 TB1/GPIO14 TA2/GPIO20 TB2/GPIO01 TA3/GPIO51 TB3/GPIO36

SPI_DI/GPIO77

SP

I_DO/GPO76/SHBM

SPI_SCK/GPIO75

IRRX1/GPIO72/SIN2

IRRX2_IRSL0/GPIO70

IRTX/GPIO71/SOUT2

CIRRXM/GPIO46/TRST

GPIO34/CIRRXL

CIRTX1/GPIO16 CIRTX2/GPIO30

F_SDI/F_SDIO1

F_SDO/SDIO0

CLKOUT/GPIO55

VCC_POR

VCORF

AGND

44

103

VCORF_uR

C553

1u/10V_6

GPIO06

GPIO81

F_CS0 F_SCK

VREF

12/12 pull down 100k for ECPWROK

3

2/13 EMI stuff C577,C578,C560

Reserve for EMI

R477R477

EC_VDD

C514

0.1u/10V_4

4

VDD

97 98 99 100 108 96 95 94

101 105 106 107

EC_VBAT

80

17 20 21 25 27

110

BADDR0

112

111 113 93

32 118 62

Rev03 modify 2007/08/16

65 22 16 81 66

31 63 117 64 26 15

84 83 82

DNBSWON#_uR

91

RSMRST#_uR

75 73

PWROK_EC

74 23 14 114 109

SPI_SDI_uR

86

SPI_SDO_uR

87

SPI_CS0#_uR

90

SPI_SCK_uR

92

30

Rev13 modify 2007/09/14

VCC_POR#

85

104

WPCE775L:

WPCE775C:

0_6 0_6

C506

10u/10V_8

B:(9/27) Remove R527, already PU 100k to +3VPCU on Battery CONN (CN20/Pin4)

R527 *10K_4 R527 *10K_4

T24 T24

D48 BAS316 D48 BAS316

R214 0_4 R214 0_4

CIRRX2

R528 4.7K_4 R528 4.7K_4

R516 0_4 R516 0_4

AJ007750F00

AJ007750F01

DNBSWON#_uR

+3V

DIGVOL_UP DIGVOL_DN

+3VPCU

TEMP_MBAT 32 USBOC#0 14,28 FN0# 28 FN1# 28 DIGVOL_UP 23 DIGVOL_DN 23 NBSWON# 28,30 SUSB# 14

CC-SET 32 VFAN 4 CV-SET 32 SUSLED_EC 28

RF_LED 30 AMP_MUTE# 22 ID 32 D/C# 32 EC_BLON 20

LED_LOGO 30

10/19 rev10 modify 10/19

BT_EN 28 CRT_SENSE# LID591# 20

CONTRAST 20 KILL_SW 30 BATLED0# 28 BATLED1# 28

SUSON 36,37

MAINON 21,36,37 TP_LED_ON 28 PWRLED# 28,30

+1.2V_ON 35,37 FANSIG 4 LOM_DISABLE# 24 ACIN 28,32 S5_ON 33,37 VRON 34,35,37

10/15 to prevent foalting

10/19 rev10 modify 10/19

RF_EN 25 CELL-SET 32 DNBSWON# 14

RSMRST# 14 SUSC# 14 ECPWROK 17,20 KEY_INT 28

NUMLED 30 CAPSLED 30

USBOC#3 14,28

+3VPCU

+A3VPCU VREF_uR

W/O CIR

For Pin 80

For WPCE775

+A3VPCU

C254

*0.1u/10V_4

CCD_POWERON 20

For WPC8763

EC_VBAT

R529 *0_4 R529 *0_4

R530 0_4 R530 0_4

Rev03 modify 2007/08/17

11/01 to avoid floating

ECPWROK

R680 100K_4 R680 100K_4

VRON

R444 10K_4 R444 10K_4

S5_ON

R101 100K_4 R101 100K_4

SUSON

R439 100K_4 R439 100K_4

MAINON

R494 100K_4 R494 100K_4

3

2

SM BUS PU

C577

C560

C578

0.1u/10V_4

Reserve for EMI Close to EC

To: Battery Connector (Input) To: USB Power Switch (Input) To: Media Board (Input) To: Media Board (Input) To: Volume Wheel (Input) To: Volume Wheel (Input) To: HW Power Button (Input) To: South Bridge (Input)

To: Battery Charger (Output) To: FAN Control IC (Output) To: Battery Charger (Output) To: SUS LED circuit (Output)

To: RF LED (Output) To: Mute Audio AMP (Output) To: Battery Connector (Input) To: Select VIN is from DC or Battery (Output)

To: Logo LED (Output)

To: Enable BT module (Output) To: CRT connector and South Bridge (Input) To: MR sensor (Input)

To: Control Panel brightness (Output) To: Enable/Disable WiFi and BT (Input) To: Battery LED--Full charge (Output) To: Battery LED--Charging (Output) To: Control S3 power (Output) To: Control S1 power (Output) To: Touch PAD Connector (Output) To: Power ON LED (Output)

To: FAN connector (Input) To: LAN IC (Output) To: ACIN LED and AC detect circuit (Input) To: Control S5 power (Output) To: CPU Vcc core PWM IC (Output)

To: Enable WiFi (Output) To: Battery Charger (Output) To: South Bridge (Output)

To: South Bridge (Output) To: South Bridge (Input) To: South Bridge, be careful the timing (Output) To: Touch Sensor Board Con. (Input) To: CIR (Input) To: Internal KB LED (output) To: Internal KB LED (output)

To: USB Power Switch (Input)

12/24 change R444 from 100k to 10k for VRON

0.1u/10V_4

To: CCD Power Switch (Output)

10/26 modify it

AKE3GFP0N08 IC FLASH(8P) W25X80VSSIG(SOIC)

BATLED0#

R441 10K_4 R441 10K_4

BATLED1#

R440 10K_4 R440 10K_4

PWRLED#

R149 10K_4 R149 10K_4

2

MBCLK MBDATA 2ND_MBCLK 2ND_MBDATA 3ND_MBCLK 3ND_MBDATA FN0# FN1#

A:(8/23) Add PU +3VPCU for 3rd SMBUS

CRT_SENSE#

R534 4.7K_4 R534 4.7K_4 R533 4.7K_4 R533 4.7K_4 R520 4.7K_4 R520 4.7K_4 R523 4.7K_4 R523 4.7K_4 R506 4.7K_4 R506 4.7K_4 R503 4.7K_4 R503 4.7K_4 R29 4.7K_4 R29 4.7K_4 R28 4.7K_4 R28 4.7K_4

R218 *4.7K_4 R218 *4.7K_4

I/O ADDRESS SETTING

BADDR1-0

0 0

0 1

1 0

1 1

SHBM=0: Enable shared memory with host BIOS

BADDR0

BT_EN

BADDR1

RF_EN

SHBM

Disabled ('1') if using FWH device on LPC. Enabled ('0') if using SPI flash for both system BIOS and EC firmware

ID

2ND_MBCLK 2ND_MBDATA

+3VPCU

+3V

I/O Address

Data

Index

XOR TREE TEST MODE

CORE DEFINED

2Eh 2Fh

164Eh

164Fh

R509 *10K_4 R509 *10K_4

R510 10K_4 R510 10K_4

R531 10K_4 R531 10K_4

H=1.75mm

U15

6

SCL

5

SDA

7

WP

VCC GND

24LC08BT-I

2/10 No stuff R218

A0 A1 A2

ADDRESS: A0H

SPI FLASH

10/30 change to AKE3GFP0N08

SPI_SDI_uR

R505 33_4 R505 33_4

SPI_SDO_uR

R514 33_4 R514 33_4

SPI_SCK_uR

R513 33_4 R513 33_4R535 0_4 R535 0_4

SPI_CS0#_uR

R507 10K_4 R507 10K_4

+3VPCU

MY0

SPI_SDI

SPI_SDO

SPI_SCK

R511 10K_4 R511 10K_4

H=2.16mm

U27

2

SO

5

SI

6

SCK

1

CE

EON 8M

+3VPCU

INTERNAL KEYBOARD STRIP SET

CIR (Copy from PB2A)

BTO

+5VPCU +3VPCU

R661 CIR@0_4 R661 CIR@0_4

R662 *CIR@0_4 R662 *CIR@0_4

+5VPCU

R660R660 *CIR@10K_4 *CIR@10K_4

20 mlis

12/12 update P/N to BEBK0081D01

+3VPCU

CIR@0.1u/10V_4 C739 CIR@0.1u/10V_4 C739

U41

CIR_VCC

3

CIRRX2

VCC

1

OUT

2

GND

4

GND

CIR@IR-FM-9038SM-5CN

Size Document Number Rev

FP/ KB/ TP/ USB /BT/FELICA

Date: Sheet

1

BT_EN

C794

C794 BT@100p/50V_4

BT@100p/50V_4

12/4 stuff R510, remove R509 for BT cause system can't work

+3VPCU

1 2 3

8 4

C562

0.1u/10V_4

+3VPCU

8

VDD

C551

7

HOLD

0.1u/10V_4

3

WP

4

VSS

PROJECT : BD3G

Quanta Computer Inc.

2A

29 42Thursday, May 29, 2008

of

1

of

5

LOGO LED

10/16 update LED to right angle

D D

C C

2/1 Change R404,R405 from CS13902JB14 (390 ohm) to CS13302JB21(330 ohm)

+5V +5V

R404

R404 MID@330_4

MID@330_4

V90/TR8MID@99-113UNC/

V90/TR8

*0.1u/10V_4

*0.1u/10V_4 C423

C423

21

LED5

Mainstream --> White Low Cost --> N/A

LOGO_1

3

2

Q48

Q48 MID@ME2N7002D

MID@ME2N7002D

1

LOGO_1

LOGO_2

MID@99-113UNC/

LED_LOGO

D26

*MID@BZ5V6

1

2

V90/TR8MID@99-113UNC/

V90/TR8

MID@99-113UNC/

LED_LOGO 29

LED_LOGO

12/7 change LED5,LED6 footprint and p/n

LED6

2

3

21

LOGO_2

3

1

R405

R405 MID@330_4

MID@330_4

Q49

Q49 MID@ME2N7002D

MID@ME2N7002D

Jumper & LED (debug use)

+3VPCU

LED4

R210 330_4 R210 330_4

B B

A A

NBSWON# 28,29

NBSWON#

5

LED4

2 1

LED_G_LTST-C190KGKT

PWRLED# ECPWRLED

1 2

4

W-LAN&BT

LED12-21SYGC-TR8

WiMAX LED

5/8 stuff D53 for RF_LED ESD

Keyboard

PWRLED# 28,29

JP13

SHORT PAD

4

1/18 LED7,8 change footprint from LED12-21SYGC-TR8 to LED27-21-BHC-ZL1M2TY-3C

1/18 change p/n LED7 BEBL0074Z04 (WIMAX)

LED8

RF_LED_R

21

Mainstream --> Orange Low Cost --> Orange

B:(10/25) Modify WiMAX LED circuit (default no stuff)

R104 *100_4 R104 *100_4

+5V

D53

RF_LED_R

WiMAX_R

BZ5V6

+3VPCU

RP4

10

1 9 8 7

10KX8

7 5 3 1

100Px4

7 5 3 1

100Px4

7 5 3 1

100Px4

7 8 5 3 1

100Px4

7 5 3 1

100Px4

7 5 3 1

100Px4

C38 100p/50V_4 C38 100p/50V_4

C37 100p/50V_4 C37 100p/50V_4

2

3

4

56

MY7

8

MY13

6

MY8

4

MY9

2

CP4

MX0

8

MX5

6

MX6

4

MX1

2

CP7

MY10

8

MY11

6

MY12

4

MY15

2

CP8

MX7 MX2

6

MX3

4

MX4

2

CP9

MY3

8

MY5

6

MY14

4

MY6

2

CP6

MY2

8

MY1

6

MY0

4

MY4

2

CP5

MY17

MY16

A:(8/23) Add 0.1u

MX6 MX5 MX0

1

2

MX7 MX2MX1 MX3 MX4

LED8 BE0R0053Z00 (WLAN & BT)

R664 390_4 R664 390_4

*LED12-21SYGC-TR8

2 1

3

LED7

WiMAX_R

WiMAX_LED# 25

1/18 change footprint from 88171-3400L-34P-L to 91504-340N-34P-L

CN9

36

35

88171-3400L-34P-R

Keyboard Side

A:(8/27) Confirm with EC FAE, MY no need External PU resister

3

RF_LED 29

1

Q77Q77

2

*BSS84 *BSS84

R290

*10K_4

K_LED_P K_LED_P

1

MY16

2 3

MY17

4 5

K_LED_P

6

MY2

7

MY1

8

MY0

9

MY4

10

MY3

11

MY5

12

MY14

13

MY6

14

MY7

15

MY13

16

MY8

17

MY9

18

MY10

19

MY11

20

MY12

21

MY15

22

MX7

23

MX2

24

MX3

25

MX4

26

MX0

27

MX5

28

MX6

29

MX1

30

K_LED_P

31

CAPSLED

32

FN_F10

33

NUMLED

34

3

+3V

8/15 Modify Keyboard pin define

MY16 29

MY17 29

A:(8/29) reserve cap for EMI

MY2 29 MY1 28,29 MY0 29 MY4 29 MY3 29 MY5 29 MY14 29 MY6 29 MY7 29 MY13 29 MY8 29 MY9 29 MY10 29 MY11 29 MY12 29 MY15 29 MX7 29 MX2 28,29 MX3 28,29 MX4 28,29 MX0 29 MX5 28,29 MX6 29 MX1 29 K_LED_P CAPSLED 29 FN_F10 29 NUMLED 29

R32 150_4 R32 150_4

+3V

8/15 Add K_LED_P power

2

IDE LED

10/25 modify it

IDE_LED# 28

+3V

Kill SW

Use old footprint for A-test. Must update new footprint in B-test

+3VPCU

2/13 EMI

C39

100p/50V_4

K_LED_P

C436

100p/50V_4

CAPSLED

K_LED_P

(Pin 31)

FN_F10

K_LED_P

(Pin 6)

NUMLED

K_LED_P

(Pin 1)

stuff C39,C436

1/17 Remove CN10 (Keyboard CONN)

15"

V

2

IDE_LED#

R156 10K_4 R156 10K_4

KILL_SW 29

D22

D22 DA204U

DA204U

1

1 3

Q27

Q27 MMBT3906

MMBT3906

2

IDE_LED#_B

R155 0_4 R155 0_4

1/18 Change SW4 footprint from SW-NSS506-212F-CCCD1T-3P to SW-NSS506-212F-CCCD1T-3P-BD3A (SMT open issue)

+3VPCU

R400

R400 10K_4

10K_4

SW4

2

1

3

SW-NSS506-212F-CCCD1T-3P

1

3

2

A:(9/14) change footprint

12/12 Change SW4 P/N from DHL00212F05 to DHL00212F07

SATA_LED# 15

17"

V

PROJECT : BD3G

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet

Quanta Computer Inc.

SW/LED/KEYBOARD

of

30 42Thursday, May 29, 2008

1

2A

5

HOLE

VGA NUT

D D

B:(10/17) update footprint

E-SATA NUT

C C

Take care NUT P/N base on IV/EV sku

HOLE24

1

HOLE5

HOLE5 H-C236D146P2

H-C236D146P2

1

HOLE24 H-C236D146P2

H-C236D146P2

1

HOLE6

HOLE6 H-C236D146P2

H-C236D146P2

1

HOLE25

HOLE25 H-C236D146P2

H-C236D146P2

HOLE15

H-TC315BC236D146P2

(BOT)

10/31 EMI request

2/18 HOLE 15,24.25 FBBD3017010 change to FBBD3021010

KB NUT

(TOP)

(BOT)

1

MDC NUT

(BOT)

Mini-PCI-A NUT

(BOT)

5/5 remove HOLE28,35 (HD Decoder)

4/21 remove Hole31,37

4

1/18 HOLE 17,18.23 FBBL5004010 change to FBBL5002010

HOLE32

HOLE32 MD@H-C236D146P2

MD@H-C236D146P2

1

HOLE28HOLE28 *H-C236D126P2 *H-C236D126P2

B:(10/17) update footprint

2/18 HOLE 28.35 FBBL5007010 change to FBBL5050010

HOLE35HOLE35 *H-C236D126P2 *H-C236D126P2

1

3

HOLE18

CPU NUT

HOLE17

HOLE17 H-C236D146P2

H-C236D146P2

HOLE18 H-C236D146P2

H-C236D146P2

(BOT)

1

Mini-PCI-B NUT

(BOT)

HOLE14

HOLE13

HOLE13 H-C236D146P2

H-C236D146P2

2/18 HOLE 13,14 FBBL5008010 change to FBBL5051010

4/17 update HOLE13,14 footprint to H-C236D146P2

HOLE14 H-C236D146P2

H-C236D146P2

1

For fix HyperTransport nets across plane splits

EMI CAP.

VIN

HOLE23

HOLE23 H-C236D146P2

H-C236D146P2

1

VIN

C768C768

0.1u/10V_4 0.1u/10V_4

2

HOLE15

HOLE24

HOLE25

Stitch CAP

C769C769

C770C770

0.1u/10V_4 0.1u/10V_4

NUT P/N Control Table

FBBL5002010

CPU_CORE0

C772C772

C771C771

0.1u/10V_4 0.1u/10V_4

VIN

UMA sku

C134 0.01u/16V_4 C134 0.01u/16V_4

C133 0.01u/16V_4 C133 0.01u/16V_4

C130 0.01u/16V_4 C130 0.01u/16V_4

C135 0.01u/16V_4 C135 0.01u/16V_4

C773C773

0.1u/10V_4 0.1u/10V_4

C774C774

0.1u/10V_4 0.1u/10V_4

EV sku

FBBD3021010

C775C775

0.1u/10V_4 0.1u/10V_4

C776C776

0.1u/10V_4 0.1u/10V_4

C777C777

0.1u/10V_4 0.1u/10V_4

1

C778C778

0.1u/10V_4 0.1u/10V_4

C779C779

0.1u/10V_4 0.1u/10V_4

C780C780

0.1u/10V_4 0.1u/10V_4

C781C781

0.1u/10V_4 0.1u/10V_4

HOLE30HOLE30 *H-C236D91P2 *H-C236D91P2

HOLE33HOLE33 *h-sped110p2 *h-sped110p2

HOLE38HOLE38 *H-C236D91P2 *H-C236D91P2

1

HOLE26HOLE26 *H-C216D91P2 *H-C216D91P2

1

10/24 update footprint

B B

HOLE44HOLE44

*H-TS315BC295D118P2-8 *H-TS315BC295D118P2-8

7

6

8

5

9

4

123

HOLE42HOLE42

*H-C276D118P2-8 *H-C276D118P2-8

7 8 9

123

HOLE36HOLE36

*H-C335D118P2-8 *H-C335D118P2-8

7 8 9

A A

123

6 5 4

*H-C335D118P2-8 *H-C335D118P2-8

7 8 9

*H-C335I248D118P2-8 *H-C335I248D118P2-8

7 8 9

1

HOLE43HOLE43

*H-TSBC315D118P2-8 *H-TSBC315D118P2-8

7 8 9

123

HOLE41HOLE41

6 5 4

123

HOLE27HOLE27

6 5 4

123

5

HOLE8HOLE8 *H-C216D91P2 *H-C216D91P2

6 5 4

HOLE9HOLE9 *H-C216D91P2 *H-C216D91P2

1

HOLE40HOLE40 *H-SPED118P2 *H-SPED118P2

B:(10/17) update footprint

HOLE19HOLE19

*H-C335D118P2-8 *H-C335D118P2-8

6

7

5

8

4

9

123

HOLE29HOLE29

*H-C335D118P2-8 *H-C335D118P2-8

7

6

8

5

9

4

123

1

HOLE4HOLE4

*H-C335D118P2-8 *H-C335D118P2-8

7 8 9

HOLE21HOLE21

*H-C335D118P2-8 *H-C335D118P2-8

7 8 9

123

HOLE22HOLE22 *H-C216D91P2 *H-C216D91P2

6 5 4

HOLE34HOLE34 *H-C216D91P2 *H-C216D91P2

1

HOLE7HOLE7

*H-C335D146P2-8 *H-C335D146P2-8

7 8 9

123

B:(10/17) update footprint

HOLE20HOLE20

*H-C335D118P2-8 *H-C335D118P2-8

7 8 9

123

HOLE39HOLE39 *H-C216D91P2 *H-C216D91P2

1

6

7

5

8

4

9

6 5 4

RAMP:(1/16) Follow BL5, update Hole footprint (13pcs)

4

HOLE16HOLE16 *H-CT315 *H-CT315

1

HOLE12HOLE12

*H-C335D118P2-8 *H-C335D118P2-8

1

A:(9/17) Base ON EMI mail(9/13) Item5

A:(9/12) Base ON EMI mail(9/13) Item1

*H-C335D118P2-8 *H-C335D118P2-8

6

7

5

8

4

123

9

10/31 EMI request

HOLE10HOLE10

123

C137C137

C87

C63C63

0.1u/10V_4 0.1u/10V_4

C243C243

0.1u/10V_4 0.1u/10V_4

C454C454

0.1u/10V_4 0.1u/10V_4

C745C745

0.1u/10V_4 0.1u/10V_4

C213C213

0.1u/10V_4 0.1u/10V_4

C385C385

0.1u/10V_4 0.1u/10V_4

C87

0.1u/10V_4 0.1u/10V_4

C204C204

0.1u/10V_4 0.1u/10V_4

C224C224

0.1u/10V_4 0.1u/10V_4

C51C51

0.1u/10V_4 0.1u/10V_4

C574C574

0.1u/10V_4 0.1u/10V_4

C283C283

0.1u/10V_4 0.1u/10V_4

C746C746

0.1u/10V_4 0.1u/10V_4

+3V +3V

C244C244

0.1u/10V_4 0.1u/10V_4

+3V +3VSUS

C450C450

0.1u/10V_4 0.1u/10V_4

+5V

123

C464C464

0.1u/10V_4 0.1u/10V_4

6 5 4

C273C273

0.1u/10V_4 0.1u/10V_4

+1.8V

C599C599

0.1u/10V_4 0.1u/10V_4

3

HOLE11HOLE11

*H-C315D118P2-8 *H-C315D118P2-8

6

7

5

8

4

9

R85

0_8

C106C106

0.1u/10V_4

C162C162

0.1u/10V_4 0.1u/10V_4

C409C409

0.1u/10V_4 0.1u/10V_4

C97C97

0.1u/10V_4 0.1u/10V_4

C138C138

0.1u/10V_4 0.1u/10V_4

C460C460

0.1u/10V_4 0.1u/10V_4

C202C202

0.1u/10V_4 0.1u/10V_4

C480C480

0.1u/10V_4 0.1u/10V_4

3/3 EMI request add C813,C814

C59C59

C759C759

C3C3

0.1u/10V_4 0.1u/10V_4

C107C107

0.1u/10V_4 0.1u/10V_4

C203C203

0.1u/10V_4 0.1u/10V_4

C146C146

0.1u/10V_4 0.1u/10V_4

C189C189

0.1u/10V_4 0.1u/10V_4

+1.2V+1.8V

C528C528

0.1u/10V_4 0.1u/10V_4

C176C176

0.1u/10V_4 0.1u/10V_4

C119C119

0.1u/10V_4 0.1u/10V_4

C749C749

0.1u/10V_4 0.1u/10V_4

C455C455

0.1u/10V_4 0.1u/10V_4

C163C163

0.1u/10V_4 0.1u/10V_4

C173C173

0.1u/10V_4 0.1u/10V_4

C169C169

0.1u/10V_4 0.1u/10V_4

C112C112

0.1u/10V_4 0.1u/10V_4

+1.5V

C813C813

0.1u/10V_4 0.1u/10V_4

C127C127

0.1u/10V_4 0.1u/10V_4

C153C153

0.1u/10V_4 0.1u/10V_4

C742C742

0.1u/10V_4 0.1u/10V_4

+3VPCU

C240C240

0.1u/10V_4 0.1u/10V_4

C814C814

0.1u/10V_4 0.1u/10V_4

C585C585

0.1u/10V_4 0.1u/10V_4

C549C549

0.1u/10V_4 0.1u/10V_4

2

C584 C584

0.1u/10V_4 0.1u/10V_4

C529C529

0.1u/10V_4 0.1u/10V_4

C12C12

0.1u/10V_4 0.1u/10V_4

C229C229 *0.1u/10V_4 *0.1u/10V_4

+3VPCU

C164C164

0.1u/10V_4 0.1u/10V_4

+5V

C139

0.1u/10V_4

C472C472

C270C270

0.1u/10V_4 0.1u/10V_4

C65C65

C2C2

0.1u/10V_4 0.1u/10V_4

C128C128

C518C518

*0.1u/10V_4 *0.1u/10V_4

C122C122

C547C547

0.1u/10V_4 0.1u/10V_4

C271C271

C462C462

0.1u/10V_4 0.1u/10V_4

Size Document Number Rev

Date: Sheet of

Date: Sheet

C755C755

C758C758

0.1u/10V_4 0.1u/10V_4

C451C451

C416C416

0.1u/10V_4 0.1u/10V_4

+5VPCU

C83C83

0.1u/10V_4 0.1u/10V_4

C32C32

C748C748

0.1u/10V_4 0.1u/10V_4

C171C171

C442C442

0.1u/10V_4 0.1u/10V_4

HOLE/EMI CAP/ESD PAD

C31C31

C756C756

0.1u/10V_4 0.1u/10V_4

C1C1

C71C71

0.1u/10V_4 0.1u/10V_4

C132C132

C161C161

0.1u/10V_4 0.1u/10V_4

C75C75

C33C33

0.1u/10V_4 0.1u/10V_4

C16C16

0.1u/10V_4 0.1u/10V_4

PROJECT : BD3G

Quanta Computer Inc.

+5VPCU

1

C30C30

0.1u/10V_4 0.1u/10V_4

C72C72

0.1u/10V_4 0.1u/10V_4

C165C165

0.1u/10V_4 0.1u/10V_4

C34C34

0.1u/10V_4 0.1u/10V_4

C757C757

0.1u/10V_4 0.1u/10V_4

C74C74

0.1u/10V_4 0.1u/10V_4

C50C50

0.1u/10V_4 0.1u/10V_4

C760C760

0.1u/10V_4 0.1u/10V_4

C70C70

0.1u/10V_4 0.1u/10V_4

C45C45

0.1u/10V_4 0.1u/10V_4

31 42Thursday, May 29, 2008

C62C62

0.1u/10V_4 0.1u/10V_4

C205C205

0.1u/10V_4 0.1u/10V_4

of

2A

5

PCN4

4

3

2

D D

20277-04XX-4P-L

11/2

1

11/5

PC143

PC49

0.1u/50V_6

ACIN 28,29

PR41PR41 *6.8K/F_6 *6.8K/F_6

PR40PR40

*10K/F_6 *1 0K/F_6

PF5

LITTLE-10A-1206

1 2

PC50

2.2n/50V_6

ACIN_1

HI0805R800R-00_8

2 1

PR25PR25 *10K/F_6 *1 0K/F_6

PL14

PL13

PD6

*ZD12V

Input sense resistor and Constant power setting table

UMA Discrete

C C

B B

A A

20m Ohm 20m Ohm

R1

CS+020AGM00

10K Ohm

R2

CS31003F949

10K Ohm

R3

CS31003F949

PF1

DKA00VFU000

+3VPCU

CN20

10

1 2

11

3 4 5 6 7 8

12

9

13

BTJ-09HF1G

ADDRESS: 16H

+3VPCU +3VPCU

1

*DA204U

2

A:(9/7) Add ESD diode base on EC FAE suggestion

1

PD5

ID TEMP_MBAT

3

*DA204U

2

PR5PR5 *100K_4 *100K_4

ID B/I

TEMP_MBAT

PD14

3

CS+020AGM00

2.43K Ohm

CS22433F913

10K Ohm

CS31003F949

DKA00VFU000

47p/50V_6

PR135

PR135 100_4

100_4

PD13

PD13 ZD3.6V

ZD3.6V

21

5

10A10A

PR8

PR8 10K_4

10K_4

PC7

PR137

PR137 100_4

100_4

PC107

100p/50V_6

MBAT+

ID 29

PC8

47p/50V_6

MBDATA 29

MBCLK 29

PD15

PD15 ZD3.6V

ZD3.6V

*100K/F_6 *1 00K/F_6

21

12

PC108

0.1u/50V_6

PR7PR7

TEMP_MBAT

1 2

BUS-15A-1206

12

PC6

0.01u/50V_6

PF4

PR138

PR138 100K/F_6

100K/F_6

ACIN 28,29

PR136PR

136 0_6

0_6

4

VA

PC4

0.1u/50V_6

PD4

PD4 SW1010CPT

SW1010CPT

PDS1040S-13

PC5

0.1u/50V_6

PD17

1

2

P4SMAJ20A

PD16

3

11/02 Addition resistor

CHG_EN29

PR168PR

168

0_6

6251EN

PR169

100K/F_6

+3VPCU

PR151

4.7K/F_6

PR21

PR21 100K/F_6

100K/F_6

3

PQ52

PQ52 DMN601K-7

DMN601K-7

2

1

PR10

PR10 10/F_6

10/F_6

TEMP_MBAT 29

HI

0805R800R-00_8HI

0805R800R-00_8

PL6

BAT-V

PL7

HI0805R800R-00_8

+3VPCU

6251CELLS_1

CELL-SET = Hi ----> Cells = VDD ---->4S CELL-SET = Low ----> Cells = GND ---->3S

4

ISL6251_VDD

CELL-SET 29

PR140PR140

*100K/F_6 *1 00K/F_6

CSOP_1

CSON_1

11/5

PC10

0.1u/50V_6

DCIN

PR141PR141

*10K/F_6 *1 0K/F_6

2

PR16

PR16 20/F_6

20/F_6

47n/25V_6

PR13

PR13 20/F_6

20/F_6

PR6

82.5K/F_6

PR14

10K/F_6

3

*DMN601K-7 *DMN601K-7

1

PC12

PR11PR11 *10K/F_6 *1 0K/F_6

PR142PR142 *10K/F_6 *1 0K/F_6

PQ34PQ34

3

0.02_7520

0.02_7520 PR148

PR148

1 2

21

CSOP

21

CSOP

12

CSON

22

CSON

ACPRN

23

ACPRN

24

DCIN

6251ACSET

2

ACSET

3

EN

6251EN VREF

6251CELLS_1

6251CELLS_2

2

PQ35PQ35

*DMN601K-7 *DMN601K-7

PR139PR139 *100K/F_6 *1 00K/F_6

CSIP_1

PR19

2.2/F_6

CELLS

4

3

0.01u/50V_6

1

R1

PC14

12/11

PC25

0.1u/50V_6

CSIN_1

PC16

0.1u/50V_6

CSIP

19

CSIP

ISL6251A

ICOMP5VCOMP

6251ICOMP

6251VCOMP1

PC15PC15

*100p/50V_6 *100p/50V_6

PU4

6

3

6251VCOMP2

VA2

PR17

PR17 20/F_6

20/F_6

CSIN

20

CSIN

ICM

7

PR143

3.3K/F_6

PC116

0.01u/50V_6

PR27

PR27 220K/F_6

220K/F_6

PR28

PR28 220K/F_6

220K/F_6

ISL6251_VDD

1

15

VDD

BOOT

UGATE

PHASE

LGATE

PGND

VADJ

ACLIM

VRFE

9

8

PR20

PR20 100_4

100_4

PC9

2.2u/10V_8

1 2

PR42

4.7_6

ISL6251_VDDP

VDDP

6251B_2

16

17

18

14

13

12

GND

11

10

CHLIM

PC19

PC19 100p/50V_6

100p/50V_6

ICMNT

12

PC17

3.3n/50V_4

1 6

2

3

PQ6

IMD2AT108

PR26

2.7_6

ISL6251_UGATE

ISL6251_PHASE

ISL6251_LGATE

CC-SET 29

2

PQ39

PQ39 FDD6685

FDD6685

43

1

PC23

1 2

PD7

PD7 RB500V

RB500V

PC18

R2

VADJ

ACLIM

R3

PR47 0_6 PR4 7 0_6

PQ7

FDS6690AS

PR36

10K/F_6

PR35

PR35 10K/F_6

10K/F_6

D/C# 29

7

8

VREF

PR37PR37 *514K/F_6 *5 14K/F_6

5

PC26

2.2n/50V_6

PQ42P Q42

FDS8878

36

241

7

8

12

2.2n/50V_4

36

241

2/14

PC40

PR61

2.2/F_4

Float = 4.2V / CELL

PR38 *0_6 PR38 *0 _6

PR34PR34 *514K/F_6 *5 14K/F_6

5

4

4.7u/10V_8

0.1u/50V_8

6251B_1

ICMNT

LIM = (1/R2)*(((0.05/VREF=2.39)VACLM)+0.050)

0.1u/50V_6

PC29

0.1u/50V_6

PL12

6.8uH

VA3

6251LR

CSOP_1

CSON_1

PC109

12/11

CV-SET 29

CURRNT LIMIT POINT =(90w/19v)*0.85= 4.026A

4.026A=(1/0.02)((0.05/2.365)Vaclm+0.05)

Vaclm=((33//152)/(33//152+19.6//152))*Vref

R2=adapter current sense resistnece

Size Document Number Rev

Date: Sheet

2

Date: Sheet

VIN

PC110

2.2n/50V_6

PL9

HI0805R800R-00_8

PC124

PC124 10u/25V_1206

10u/25V_1206

PR145

0.03_3720

1 2

CHARGER (ISL6251A)

1

PQ38

PQ38 FDD6685

FDD6685

43

PR15

1

33K_6

PR18

10K_6

3

2

PQ5

DMN601K-7

VIN

PC118

2.2n/50V_6

PROJECT : BD3A/BL5A

Quanta Computer Inc.

PC123

10u/25V_1206

1

PC120

10u/25V_1206

32 42Thursday, May 29, 2008

BAT-V

PC125

0.01u/50V_6

of

1ACustom

5

MAIND

SUSD

12/11 12/11

VIN

D D

+

PC102

0.1u/50V_6 0.1u/50V_6

330u/6.3V_6X5.7

PC80

100u/25V_6X7.7

OCP: 10A

+5VPCU

C C

10u/25V_1206

PC83PC83

+5VPCU

+

PC93

MAIND 36,37

SUSD 37

2.2n/50V_6 2.2n/50V_6

0.1u/50V_6

PC100

PC82PC82

PC87PC87

*10u/25V_1206 *10u/25V_1206

11/2

PR119PR119

63.4K/F_4 63.4K/F_4

12

PR120

PR120 10K/F_4

10K/F_4

12

SYS_SHDN# 4

PC81

10u/25V_1206

PL5PL5

2.2uH 2.2uH

FDS8878

OCP:10A

L(ripple current) =(19-5)*5/(2.2u*0.4M*19)

B B

S5_ON 29,37

A A

~4.18A

Iocp=10-(4.18/2)=7.91A Vth=7.91A*15mOhm=131mV R(Ilim)=(105mV*10)/5uA ~237K

VIN

PR110

PR110 1M_6

1M_6

2

PQ25

DTC144EU

5

2

PR105

13

1M_6

3

1

PR109

PR109 22_8

22_8

PQ27

PQ27 DMN601K-7

DMN601K-7

+1.2V_S5 +3V_S5

PR108

PR108 22_8

22_8

3

1

PQ28

PQ28 DMN601K-7

DMN601K-7

2

+15V

PQ32

3

1

PR104

PR104 1M_6

1M_6

4

1 2

7

8

241

0.1u/50V_6 0.1u/50V_6

PQ26

PQ26 DMN601K-7

DMN601K-7

4

PR125

0_4

3V5V_EN

5

5V_DH

36

5V_LX

578

5V_DL

PQ33

36

FDS6690AS

PC101PC101

PR133

+15V_ALWP

22_8

S5D

VL

12

PR124

PR124 39K/F_4

39K/F_4

PD12

1PS302

PD11

PD11 1PS302

1PS302

0.1u/50V_6 0.1u/50V_6

1 2

PR122 237K/F_6 PR122 237K/F_6

PC95PC95

2

3

1

2

3

1

PC99PC99

0.1u/50V_6 0.1u/50V_6

PR116

PR116 390K_4

390K_4

PC88PC88

PR113

PR113 115K/F_4

115K/F_4

0.1u/50V_6 0.1u/50V_6

1 2

MAIND

ISL6237_3V

+5VPCU

DDPWRGD_R

3V5V_EN

1 2

PC96PC96

PR132PR132 *200K_4 *200K_4

3

*0.01u/16V_4 *0.01u/16V_4

9

BYP

10

OUT1

11

FB1

12

ILIM1

13

PGOOD1

14

EN1

15

DH1

16

LX1

37

PAD

36

PAD

35

PR129

PR129 1/F_6

1/F_6

PR166

VL

0_6

1u/16V_6

12/11

PC97PC97

0.1u/50V_6 0.1u/50V_6

PR163 *0_6 PR163 *0_6

+5VPCU

7

8

5

PQ31

PQ31 FDS8884

FDS8884

36

241

3

PC91PC91

7

8

LDOREFIN

BST117DL118PVCC19NC20GND21PGND22DL223BST2

PAD34PAD3PAD

3

PC98

PR128

*39K/F_4

+5V

VL

12

4NC5

6

VIN

LDO

PU11

ISL6237

12

MAIND

PC89PC89

4.7u/10V_8 4.7u/10V_8

PR114

PR114 0_4

0_4

3

ONLDO

PC90

0.1u/50V_6

REF

12

PR112 *0_6 PR112 *0_6

1

2

REF

TON

VCC

REFIN2

ILIM2 OUT2 SKIP#

PGOOD2

EN2

DH2

LX2

PR131

24

1/F_6

1 2

PR130

PR130 0_6

0_6

PR134 *0_6 PR134 *0_6

+3VPCU

7

8

5

36

241

2

PR115

12

REFIN2

1 2

SKIP

DDP WRGD_R

3V5V_EN

PC94PC94

0.1u/50V_6 0.1u/50V_6

PR115 0_4

0_4

3V_DH

PR117

3V_LX

196K/F_6

3V_DL

SKIP REF

32 31 30 29 28 27 26 25

PC92

PC92 1u/16V_6

1u/16V_6

OCP:8A

L(ripple current) =(19-3.3)*3.3/(2.2u*0.5M*19) ~2.48A

Iocp=8-(2.48/2)=6.67A Vth=6.67A*15mOhm=100.05mV R(Ilim)=(100.05mV*10)/5uA

REFIN2

~200.1K

+3VPCU

S5D

3

PQ21

PQ21 FDS8878

FDS8878

+3V

2

578

5

PR121 *0_6 PR121 *0_6

PR123 0_6 PR123 0_6

56 241

PQ22

PQ22 FDC653N_NL

FDC653N_NL

1

VIN

PC85

PC86PC86

0.1u/50V_6 0.1u/50V_6

PQ29

PQ29 FDS8878

FDS8878

36

241

7

8

36

241

+3V_S5

2.2uH 2.2uH

PQ30

FDS6690AS

DDPWRGD_R3V_DL

SUSD

Size D ocument Number R ev

Date: Sheet

PC85

10u/25V_1206

PC84PC84

2.2n/50V_4 2.2n/50V_4

+3VPCU

PR111

PR111 0_6

0_6

0.1u/50V_6

56 241

OCP : 8A

PC70

PR126

PR126 0_6

0_6

PQ23PQ23 *FDC653N_NL *FDC653N_NL

+3VSUS

1

11/2

PL4PL4

PR118PR118 *0_6 *0_6

+3VPCU

PR127PR127 *10K_6 *10K_6

+3VPCU

3

PROJECT : BD3A/BL5A

Quanta Computer Inc.

SYSTEM 5V/3V (ISL6237)

+3VPCU

+

PC73

330u/6.3V_6X5.7

SYS_HWPG 29

33 42Thursday, May 29, 2008

of

1A

A

OFS/VFIXEN

4 4

3 3

CPU_PWRGD_SVID_REG 4

2 2

Metal VID Codes

SVC

VFIXEN VID Codes

SVC

CPU_CORE0

4 CPU_VDD0_FB_H

CPU_VDD0_FB_L 4

Offset & Droop

GND

+3.3V

+5V

SVD

0

1

0

1

1 1 0.8

SVD

0

1

0

1

CPU_COREPG 4,29

PQ51

DTC144EU

1 3

PR235 *0_4 PR235 *0_4

SVI

VFIX

O

OX

X

2

PR196

PR196 255/F_4

255/F_4

PR200PR200

54.9K/F_4 54.9K/F_4

PR212

PR212 10/F_6

10/F_6

Output

1.10

1.0

0.9

Output

1.4

1.21

1.0

0.8

+3V +1.8V

PR210

PR210 1K/F_4

1K/F_4

1 2

PC106

180p/50V_4

Close to CPU socket

O

X

+5VPCU

5/27

+3V

CPU_SVD 4

CPU_SVC 4

VRON 29,35,37

PR218

PR218 107K/F_4

107K/F_4

5/5

PR177PR177

6.81K/F_4 6.81K/F_4

PC122

1000p/50V_6

ISP_0

PR160PR160

3.92K/F_4 3.92K/F_4

ISN_0

12/11

PR188 0_4 PR188 0_4 PR162 1/F_6 PR162 1/F_6

PR234

10K_6

12

PC158

4700p/25V_4

1 2

PC111

1200p/50V_4

12

Parallel

PR194

PR194 10/F_6

10/F_6

Close to CPU socket

PR184

PR184 10/F_6

CPU_VDD1_FB_L 4

CPU_VDD1_FB_H 4

1 1

CPU_CORE1

10/F_6

PR183

PR183 10/F_6

10/F_6

A

+5VPCU

VIN

PR181 0_4 PR181 0_4

PR182 *0_4 PR182 *0_4

PR192 *10K/F_4 PR192 *10K/F_4

PR190 0_4 PR190 0_4

PR195 0_4 PR195 0_4

PR191 0_4 PR191 0_4

PR185 0_4 PR185 0_4

PR157

PR157 10K/F_4

10K/F_4

PR213PR213

18.2K/F_4 18.2K/F_4

B

PR208 10/F_6 PR208 10/F_6

1u/25V_8

PR214 0_8 PR214 0_8

PR198 10/F_6 PR198 10/F_6

0.1u/50V_6 0.1u/50V_6

B

PC134

PC166PC166

1

OFS/VFIXEN

2

PGOOD

3

PWROK

4

SVD

5

SVC

6

ENABLE

7

RBIAS

8

OCSET

9

VDIFF_0

10

FB_0

11

COMP_0

12

VW_0

12

CPU_VDDNB_FB_H 4

CPU_VDDNB_FB_L 4

12

49

GND

PC172

0.1u/50V_6

C

3A

CPU VDDNB_CORE

12

PR219

PR219 10/F_6

10/F_6

+

PR158

PR158 10/F_6

10/F_6

PC194

330u_2V_7343

0_4

42

PU3

PC159

PC159 1000p/50V_6

1000p/50V_6

2/14

PR179P

R179

0_4

41

RTN_NB

OCSET_NB

VDIFF_1 19FB_1 20COMP_1

PR217PR217

11.3K/F_4 11.3K/F_4

6.81K/F_4 6.81K/F_4

330u_2V_7343

40

39

PGND_NB

LGATE_NB

VW_1 22ISP_1 23ISN_1

21

PR205PR205

12

PR211PR211

22.1K/F_4 22.1K/F_4

PC163

33p/50V_4

PC114

1200p/50V_4

12

PR176PR176

44.2K/F_4 44.2K/F_4

PR209P

R209

43

44

45

46

47

48

VIN

VCC

FB_NB

FSET_NB

VSEN_NB

COMP_NB

Pin 49 is GND Pin

ISL6265

RTN_1

ISN_0

ISP_0

VSEN_0

14

13

15

PR178P

R178

PR207P

R207

0_4

VSEN_1

RTN_0

17

18

16

PR187P

R187

PR186P

R186

0_4

38

PHASE_NB

12

PC104

PC104 1000p/50V_6

1000p/50V_6

12

PC103

PC103 10u/25V_1206

10u/25V_1206

LGATE_NB

PHASE_NB

UGATE_NB

37

UGATE_NB

BOOT_NB

BOOT_0

UGATE_0

PHASE_0

PGND_0

LGATE_0

LGATE_1

PGND_1

PHASE_1

UGATE_1

BOOT_1

24

12

PL11PL11

2.5uH 2.5uH

PVCC

PC173

0.1u/50V_6

36

35

34

33

32

31

30

29

28

27

26

25

12

UGATE_0

PHASE_0

LGATE_0

LGATE_1

PHASE_1

UGATE_1

PR202 1/F_6 PR202 1/F_6

PR215PR215

18.2K/F_4 18.2K/F_4

PC126

0.1u/50V_6

PR206

PR206 1/F_6

1/F_6

PR216PR216

3.92K/F_4 3.92K/F_4

LGATE_NB

1 2

PC113PC113

0.1u/50V_6 0.1u/50V_6

1 2

PC141PC141

2.2u/10V_6 2.2u/10V_6

1 2

PC164PC164

0.1u/50V_6 0.1u/50V_6

ISN_1

ISP_1

ISN_1

+5VPCU

4

S

S 2

2

5

UGATE_0

UGATE_1

LGATE_1

D

G2

1 S1/D2

123

D1

G1

8 76

UGATE_NB

4

SI4914

PQ48

12 3

D

E

12/11

VIN

PC171

10u/25V_1206

12

PC140

10u/25V_1206

12

PC167PC167

0.1u/50V_6 0.1u/50V_6

12/11

330u_2V_7343

VIN

+

12

+

PC105

12

+

PC165

330u_2V_7343

VIN

20A

CPU_CORE0

20A

CPU_CORE1

12

5

PQ46

PQ46 AOL1414

AOL1414

5

PQ43

PQ43 AOL1412

AOL1412

5

PQ37

PQ37 AOL1414

AOL1414

5

PQ41

2 13

AOL1412

12

2/14

PC130

10u/25V_1206

PR237PR237

2.2/F_4 2.2/F_4

PC189PC189

2.2n/50V_4 2.2n/50V_4

ISP_0

ISN_0

PC112

10u/25V_1206

PR238PR238

2.2/F_4 2.2/F_4

12

PC190PC190

2.2n/50V_4 2.2n/50V_4

PR199

_6

0

0_6

12

PR201P

R201

10u/25V_1206

11/2 TOKIN

PL17 0.36uH PL17 0.36uH

1 2

10u/25V_1206

11/2 TOKIN

PL16 0.36uH PL16 0.36uH

1 2

0_6

PC160

3

PC147

3

12

PC162PC162

0.1u/50V_6 0.1u/50V_6

4

12

+

PR189

0_6

PC161

330u_2V_7343

12

PC157PC157

0.1u/50V_6 0.1u/50V_6

4

PR203

0_6

PC135

330u_2V_7343

12

2/14

5/27

12/18

PC191

330u_2V_7343

12

+

PC193

330u_2V_7343

D

CPU_CORE0 CPU VDDNB_CORECPU_CORE1

12

+

PC169

*330u_2V_7343

12

+

2/14

PROJECT : BD3A/BL5A

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet

Quanta Computer Inc.

OZ826 CPU

E

1AC

34 42Thursday, May 29, 2008

1AC

of

PC142

4.7n/25V_4

PR204

PR204 255/F_4

255/F_4

12

PR197

1K/F_4

PR180PR180

54.9K/F_4 54.9K/F_4

12

PC170

PC170 1200p/50V_4

1200p/50V_4

12

PC168

PC168 180p/50V_4

180p/50V_4

4/10 add PC191,PC193

C

1

12/23 delay +NB_CORE

PR71

PR71 1M_6

1M_6

12

4/10 del PR81

PC45

0.01u/50V_6

12

PR75

A A

VRON 29,34,37

+1.2V_ON 29,37

12/11

HWPG_1.2V_NB 29

B B

PR75

*0_6

*0_6 PC48

PR79 47K_6 PR79 47K_6

PC44PC44

0.1u/50V_6 0.1u/50V_6

PC43

PC42

1u/16V_6

*1n/50V_6

TON=3.85p*RTON*Vout/(Vin-0.5)

Frequency=Vout/(Vin*TON)

C C

2

PR68

10_6

PR81

PR81 *100K/F_6

*100K/F_6

B:(10/16) change PR81 from 10k(no stuff) to 100k(stuff)

15

16

14

1

2

3

4

6

5

EN/DEM

TON

VOUT

VDD

FB

PGOOD

GND

NC

RT8202

GND18GND19GND20GND

PU6

BOOT

UGATE

PHASE

VDDP

LGATE

PGND

TPAD

21

0.1u/50V_6

PC48

OC

13

12

11

10

9

8

7

17

6A OCP --- OC=4.53K

FDS6690AS Rds=15mOhm

3

+5VPCU

PD10

PD10 RB500V

RB500V

12

PC47

4.7u/10V_8

PC53PC53

0.1u/50V_8 0.1u/50V_8

UGATE-1.2V

PHASE-1.2V

LGATE-1.2V

4.7u/10V_8

2/14

PR82

PR82 0_6

0_6

PR83 6.04K/F_6 PR83 6.04K/F_6

Rds*OCP=RILIM*20uA

FDS6690AS

4

578

PR240PR240 *2.2/F_4 *2.2/F_4

12

PC192PC192 *2.2n/50V_4 *2.2n/50V_4

PC52PC52

0.1u/50V_6 0.1u/50V_6

1.2V_FB

PL15PL15

2.5uH 2.5uH

470u_2.5V_7343

PQ50

PQ14

FDS8878

36

241

578

36

241

12/14 change PR73 from 8.25K to 35.7K

PR73

1.2V_FB

35.7K/F_6

DMN601K-7

PQ10

3

2

12

1

PC46PC46

0.022u/50V_6 0.022u/50V_6

12/11

VIN-1.2V

VIN

PC51

10u/25V_1206

1/18 Change PL15 Footprint from CDRH104R to CDRH104R-BD3A (SMT open issue)

12

+

PC144

2/14

+

PC145

10u/10V_8

PR72

3.65K/F_6

PR67

PR67 10K/F_6

10K/F_6

VOUT=(1+R2/R3)*0.75

+5VPCU

PR93

10K/F_6

PQ49

DMN601K-7

10K/F_6

PR103

100/F_6

3

2

1

PR80

PR80 0_6

0_6

5

12/11

PC41PC41 *22p/50V_6 *22p/50V_6

HI --- 1.0V LOW ---1.1V

2/14

PR86

PR86 *0_6

*0_6

+NB_CORE_ON 11

12/31

5A

+NB_CORE

PR74

PR74 1M_6

1M_6

PR69

PR69 1M_6

1M_6

+NB_CORE

2

4

3

1

PR70

PR70 22_8

22_8

PQ9

PQ9 DMN601K-7

DMN601K-7

+1.2V

PR76

PR76 22_8

22_8

3

2

PQ12

PQ12 DMN601K-7

DMN601K-7

1

PROJECT : BD3A/BL5A

Quanta Computer Inc.

Size Document Number Rev

NB_VCC (R T8202)

Date: Sheet

Quanta Computer Inc.

5

1A

of

35 42Thursday, May 29, 2008

12/14 del +1.35V_VDDHTTX PU15 PC180,PC182,PC179 PR227,PR226,PR225

+1.2V_ON 29,37

D D

1

2

3

2

PQ13

DTC144EU

VIN

13

5

D D

4

3

2

1

12/11

VIN

10A

OCP: 12.44A

+1.8VSUS

PC136

10u/10V_1206

CPU_VTT_SENSE 5

2A

+SMDDR_VTERM

PC137

10u/10V_8

C C

+1.8VSUS

+SMDDR_VREF

PR66 *0_6 PR66 *0_6

PR65 0_6 PR65 0_6

PR167

DIS_MODE

0_6

PR236 *0_6 PR236 *0_6

PC139

PC139 10u/10V_8

10u/10V_8

PC138PC138

0.033u/50V_6 0.033u/50V_6

5VIN

FOR DDR II

5VIN

PR164

PR164 0_6

0_6

10

1

2

4

5

3

6

7

8

9

PU12

PU12 TPS51116

TPS51116

VLDOIN

VTT

VTTSNS

GND

VTTGND

MODE

VTTREF

COMP

VDDSNS

VDDQSET

+5VPCU

PGOOD

GND21GND22GND23GND24GND25GND26GND

PR156

0_6

DRVH

VBST

LL

DRVL

PGND

S3

S5

V5IN

CS

27

*1n/50V_6

PC129

5VIN

19

20

18

17

16

S3_1.8VDIS_MODE

11

S5_1.8V

12

5VIN

14

13

15

12

PC133

4.7u/6.3V_6

PR147PR147

5.1K/D_6 5.1K/D_6

PC128 0.1u/50V_6 PC128 0.1u/50V_6

PR154

*0_6

PR153

0_6

12/11

MAINON 21,29,37

SUSON 29,37

HWPG_1.8V 29

5

PQ36

PQ36 AOL1414

12 3

AOL1414

5

PQ40

PQ40 AOL1412

AOL1412

PR149

PR149 0_6

0_6

4

S3_1.8V S5_1.8V

PR146

2.2/F_6

PC127PC127

2.2n/50V_6 2.2n/50V_6

PR144

2.2/F_6

PC117PC117

2.2n/50V_6 2.2n/50V_6

2/14

2.2uH

PC115PC115

2.2n/50V_6 2.2n/50V_6

PL10

PC13

PC11

10u/25V_1206

PC121

10u/25V_1206

+

PC119

10u/10V_8

10u/25V_1206

560u/2.5V_6X5.7

(10u*PR35)/Rdson+Delta_I/2=Iocp

PR165

PR165 *110K/F_6

*110K/F_6

R2

5

PR232 *0_6 PR232 *0_6

PR233 *0_6 PR233 *0_6

Allen 0929

R1=(100*Vout-R2)K

R1

PR161

PR161 *76.8K/F_6

*76.8K/F_6

4

11/02

S3_1.8V S5_1.8V

+1.8VSUS

56 241

MAIND

MAIND 33,37

3

PQ19

PQ19 FDC653N_NL

FDC653N_NL

+1.8V

3

PC132PC132 *0.1u/50V_6 *0.1u/50V_6

PC131PC131 *0.1u/50V_6 *0.1u/50V_6

PROJECT : BD3A/BL5A

Quanta Computer Inc.

Size Document Number Rev

DDR 1.8V(TPS51116)

Date: Sheet

2

Date: Sheet

Quanta Computer Inc.

36 42Thursday, May 29, 2008

of

1

of

1A

4 VDDIO_FB_H

B B

VDDIO_FB_L 4

if tune Vout PR38 un-mount, PR156 PR165 mount

A A

5

+1.8VSUS

PC71

0.1u/50V_6

12/11

D D

+5VPCU

9338ENMAINON

0.1u/50V_6

PC76

3

PGD

4

EN

1

VCC

2

29 HWPG_CPUIO

MAINON 21,29,36

29,35 +1.2V_ON

VRON 29,34,35

12/11

PR101 *10K_6 PR101 *10K_6

PR99 0_6 PR99 0_6

PR97 *0_6 PR97 *0_6

PC74

*1u/16V_6

12/23 change to +1.2V_ON

12/19 change PR230 from 10K to 0

C C

+1.2V_ON 29,35

+1.8VSUS

PC187

10u/4V_8

0.1u/25V_6 0.1u/25V_6

PR102

100K/F_6

PC186PC186

0.1u/25V_6 0.1u/25V_6

12/24

+5VPCU

PR230 0_6 PR230 0_6

PC184PC184

PC188PC188

*0.1u/50V_6

12/18

Vout =0.8(1+R1/R2) =1.1V

4

PQ24

PQ24 AOL1414

AOL1414

5

PC72

10u/6.3V_6

9338DRV

6

DRV

5

ADJ

Vout1 = (1+Rg/Rh)*0.5

GND

PU9

PU9 G9338

G9338

12/24

PU16

PU16 RT9018A

RT9018A

4

PGOOD

VPP

2

VEN

3

VIN

8

GND

9

GND

7

4

PR100

0_6

0.01u/16V_4 0.01u/16V_4

12

VO

NC

ADJ

3 2 1

PC75PC75

1

6

5

0.8V

Rg

Rh

12/11

PR96

PR96 14K/F_6

14K/F_6

PR98

PR98 10K_6

10K_6

0.1u/50V_6 0.1u/50V_6

PR228

PR228 13K/F_6

13K/F_6

PR229

PR229 34K/F_6

34K/F_6

PC68PC68

10u/6.3V_6

PC185

10u/10V_8

PC69

HWPG_1.1V_NB 29

+1.1V_NB

2A

+1.2V

+

PC66

560u/2.5V_6X5.7

3

+1.2V 3,4,12,13,15,16,31,35

4.5A

S5_ON 29,33

+1.8VSUS

+3VPCU

MAINON

10u/4V_8

PC60

10u/4V_8

PC176PC176

0.1u/25V_6 0.1u/25V_6

PR221 0_6 PR221 0_6

PC178PC178

PC177

0.1u/50V_6 0.1u/50V_6

PC61PC61

0.1u/50V_6 0.1u/50V_6

PR91 0_6 PR91 0_6

PC63PC63

PC64PC64

*0.1u/50V_6 *0.1u/50V_6

0.1u/50V_6 0.1u/50V_6

Vout =0.8(1+R1/R2) =1.5V

2

+5VPCU

PU10

PU10 RT9025-25PSP

RT9025-25PSP

4

VPP

2

VEN

3

VIN

8

GND

9

GND

PC174PC174 *0.1u/50V_6 *0.1u/50V_6

Vout =0.8(1+R1/R2) =1.2V

+5VPCU

PU8

PU8 RT9025-25PSP

RT9025-25PSP

4

PGOOD

VPP

2

VO

VEN

3

VIN

8

GND

9

NC

GND

ADJ

7

PGOOD

ADJ

7

1

6

5

VO

NC

0.8V

1

6

+1.2V_S5

1A

5

PR222

17.4K/F_6

PC175

10u/10V_8

0.8V

PR220

PR220 34K/F_6

34K/F_6

12/11

HWPG_1.5V 29

+1.5V

1.5A

PR90

30.1K/F_6

PR89

PR89 34K/F_6

34K/F_6

PC62

10u/10V_8

12/11

B B

DTC144EU

2

PQ16

DTC144EU

5

2

PQ47

13

SUSON 29,36

12/11

A A

MAINON 21,29,36

12/11

VIN

PR152

PR152 1M_6

1M_6

PR155

PR155 1M_6

1M_6

13

VIN

PR9

PR9 1M_6

1M_6

PR12

PR12 1M_6

1M_6

+1.8VSUS +SMDDR_VTERM

2

PR78

PR78 22_8

22_8

3

2

1

+3VSUS +15V

PR95

PR150

PR150 22_8

22_8

3

PQ44

PQ44 DMN601K-7

DMN601K-7

1

PQ11

PQ11 DMN601K-7

DMN601K-7

PR95 *22_8

*22_8

3

2

PQ20PQ20 *DMN601K-7 *DMN601K-7

1

PR4

PR4 22_8

22_8

3

2

PQ4

PQ4 DMN601K-7

DMN601K-7

1

PC56PC56

PR159

PR159 22_8

22_8

3

2

PQ45

PQ45 DMN601K-7

DMN601K-7

1

PR88

PR88 22_8

22_8

3

2

PQ15

PQ15 DMN601K-7

DMN601K-7

1

4

PR94

PR94 1M_6

1M_6

SUSDSUS_ON_G

3

2

PQ18

PQ18 DMN601K-7

DMN601K-7

1

+15V+5V+3V +1.8V

PR92

PR92 1M_6

1M_6

MAINDMAINON_ON_G

3

2

PQ17

PQ17 DMN601K-7

DMN601K-7

1

PC67PC67 *2.2n/50V_4 *2.2n/50V_4

PC65PC65 *2.2n/50V_4 *2.2n/50V_4

SUSD 33

MAIND 33,36

3

+3VPCU

MAINON

PC59

10u/4V_8

0.1u/50V_6 0.1u/50V_6

PC58PC58

0.1u/50V_6 0.1u/50V_6

+5VPCU

PU7

PU7 RT9025-25PSP

RT9025-25PSP

4

PGOOD

PR87 0_6 PR87 0_6

PC57PC57 *0.1u/50V_6 *0.1u/50V_6

Vout =0.8(1+R1/R2) =2.5V

VPP

2

VEN

3

VIN

8

GND

9

GND

7

2

1

6

VO

5

NC

ADJ

PR85

73.2K/F_6

PC55

10u/10V_8

HWPG_2.5V 29

+2.5V

0.25A

0.8V

PR84

PR84 34K/F_6

34K/F_6

PROJECT : BD3A/BL5A

Quanta Computer Inc.

Size Document Number Rev

Discharge (1.25V/1.5V)

Date: Sheet

Quanta Computer Inc.

of

37 42Thursday, May 29, 2008

1

1A

5

ISL6265

PU5

RT8202

PU6

D D

VINVIN

ISL6237

PU11

C C

B B

A A

ADAPTER

BATTERY

Charger ISL6251A

PU4

VIN

TPS51116

PU12

CPU_CORE0

<VRON>

CPU_CORE1

<VRON>

CPU VDDNB_CORE

+NB_CORE

<MAIND>

+5VPCU

FDS8884

+5VPCU+3VPCU

PQ31

+3VPCU

RT9205

PU16

FDC653N

PQ22

FDC653N

PQ23

FDS8884

PQ21

RT9013

PU10

+1.8VSUS

<SUSON>

FDC653N

PQ19 <MAINON>

G9338

+1.8VSUS

PU9

RT9025

PU8

RT9025

PU15

SMDDR_VTERM

<SUSON>

SMDDR_VREF

<SUSON>

4

+5V

<MAIND>

+1.1V_NB

<MAIND>

+3V_S5

<S5D>

+3VSUS

<SUSD>

+3V

<MAIND>

+1.2V_S5

<S5_ON>

+1.8V

+1.2V

<VRON>

A-test use MAINON + RC delay t o replace it

+1.5V

+1.35V_VDDHTTX

RT9025

PU7 <MAINON>

+2.5V

Below table need be modify (waiting other schematic ready)

POWER Distribution

VCC_CORE

+5VPCU

+3VPCU

+NB_CORE

+5V

+3V

+3V_S5

+3VSUS

+2.5V

+1.2V_S5

+1.8VSUS

+1.8V

+1.2V

+SMDDR_VTERM

+SMDDR_VREF

CPU

Battery LED , Power LED , USB , CIR , RTC

HALL SENSOR , Battery LED , RF LED , kill SW , Jumper LED , KB , Power Board , EC , ID , SPI Flash , CIR

RS690M

CAMERA , Card Reader LED , ODD/HDD LED , Felica , T/P , T/sensor , CRT , HDMI , SB600 , CPU FAN , MXM , Headphone , EC , INT SPK AMP

HALL SENSOR , LCD PANEL , LVDS , WLAN , HD Decoder , NEW CARD , KB , KB LED , XD LED , Blue tooth , Touch sensor , Card Reader (OZ129) , ODD/HDD ,

HDMI , CRT , TVOUT , REQUIRED STRAPS , DEBUG STRAPS , SB600 , RS690M , DDR , CPU Thermal monitor , CPU FAN , CLK , MXM , VR , FM Tuner MDC ,

Headphone , EC , LAN , Codec(CX 20561)

WLAN , NEW CARD , SB600 , MXM , LAN

The Table NOT READY

Finger print , SB600

CPU

SB600

SB600 , DDR , CPU , HDT

SB600 , LCD , LVDS , RS690M

SB600 , RS690M , CPU , WLAN , HD Decoder , NEW CARD

DDR , CPU

DDR

3

2

1

+5V_S5

PROJECT : BD3A

Quanta Computer Inc.

Size Document Number Rev

Power Tree

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5

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SO_DIMM1

D D

2 PAIR MEM CLK

Turion Griffin Dual-Core Sempron (638 S1g2 socket)

C C

SO_DIMM2

2 PAIR MEM CLK

1 PAIR CPU CLK

200MHZ

EXTERNAL CLK GEN.

4

NBHT_REFCLK

100MHZ

EXT_NB_OSC

RX780 RS780M/MC

14.318MHZ

NBGFX_CLK(RX780 only)

NBGPP_CLK(RX780 only)

SB PCIE_CLK

MXM_REFCLK 100MHZ

PCIE_CLK 100MHZ

528 FCBGA

100MHZ

SB_OSCIN

14.318MHZ

3

HDMI_CEC R5F211A4SP5

*8MHZ

MXM module

MINI Card(WLAN)

MINI Card(HD Video Decoder)

NEW Card

8040T(10/100)/8055(GIGA)

25MHZ

SB700 528 BGA

2

PCI_CLK1

33MHZ

PCI_CLK0

33MHZ

PCI_CLK5

33MHZ

BIT_CLK_AUDIO

24MHZ

PCIE DEBUG CARD

OZ129T(card reader/1394)

24.576MHZ

KBC WPCE775

32.768KHZ

TPCLK

Azalia Audio Codec CX20561

1

KEYBOARD

TP

SBSRC_CLK

100MHZ

USB 48MHZ

B B

25MHZ

32.768KHZ

A A

5

14.31818MHZ

4

Size Document Number Rev

Clock distribution diagram

Date: Sheet of

3

Date: Sheet

PROJECT : BD3A

Quanta Computer Inc.

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D D

C C

B B

A A

REV

A1A

B2A

C3A

5

2007

CHANGE LIST

FIRST RELEASED : Import BOM ECN

20071008

PAGE23:Reverse U42,C761 for VR

20071008

PAGE28:Add R667,R668,Q78 for TP_LED

20071204

PAGE04:Reverse C762 for AMD engineer CPU use

20071204

PAGE19:update CN25 HDMI footprint to HDMI-C12816-119A5-L-19P-V-BL5-1

20071204

PAGE15:change BOARD ID3 from GEVENT7 to GPIO48

20071204

PAGE14:change BOARD ID PD value from 10K to 1K(R227,R228,R229,R248,R343,R236)

20071204

PAGE29:Stuff R510, no-stuff R509 (slove BT module can't bring up issue)

20071204

PAGE20: modify display on ckt to avoid flash when into S3/S4/S5 (add Q78,Q80,R670,del Q41,R388)

20071207

PAGE19:update CN25 HDMI footprint to HDMI-C12816-119A5-L-19P-H-BD3

20071207

PAGE32:update ACIN design

20071207

PAGE24:Change R449(0 ohm) to D56(Diode) for leakage issue (3VPCU to 3V_S5)

20071207

PAGE23: Slove Audio issue:When plug in-out headphone, headphone has bo sound.

1. Change R652&R651 to C763,C764(10U/6.3V 0603)

20071207

PAGE22: Remove D19 to slove Audio issue Switch Mute to Un-mute, sound will delay about 2 seconds.

20071207

PAGE14: add D57,D58 to avoid voltage leakage

20071207

PAGE30:update LED5,LED6 footprint and PN

20071207

PAGE04:add R671~R679 for AMD request Circuit modify

20071208

PAGE03:change C223 C225 from 10p to 33p PAGE15:change C257 C258 from 10p to 27p PAGE26:change C380 C381 from 22p to 18p

20071210

PAGE25:Change New card footprint to NCARD-13180151-T-26P-L-BL5S

20071210

PAGE22:stuff R372 for FM

20071211

update power

20071212

PAGE29: Change U41(CIR) from BEBK0081D00 to BEBK0081D01

20071212

PAGE18: Change CN22(S-Video) from DFMD04FR296(Yellow Color) to DFMD04FR006(Black Color)

20071212

PAGE30: Change SW4 P/N from DHL00212F05 to DHL00212F07

20071212

PAGE31: Update Hole43 H-TSBC315D118P2, Hole 44 H-TS315BC295D118P2

20071212

PAGE29: pull down 100k R680 for ECPWROK

20071212

A11 to A12 implemen PAGE12: Del L15 stuff L36 PAGE16: Del R234 stuff R235 PAGE35: Del PU15,PC180,PC182,PC179PR227,PR226,PR225, Change PR73 from 8.25K to 35.7K

20071220

PAGE23: Slove GPRS noise

1. stuff R386/R387/C404/C405 to 0.1U

2. Change L44/41 to BK1608LL121

20071220

PAGE29: avoid leakage reserve D59/D60 to CLKRUN#/PLTRST#

20071221

PAGE18:add 27p(C790~C793) for TV_Y/G , TV_C/R

EMI

PAGE21:stuff C568,C548 PAGE22:stuff R399,R379 PAGE23:Change L43/44 to BK1608LL121 PAGE24:add L74,C766,C767,C789,C788 for +2.5V_1.8V_LAN,add L73 for +1.2V_LAN PAGE26:add 0 ohm and 22p for SD/MS CLK , R308~R329 0ohm(CS00002JB38) change to 33ohm(CS03302JB29), remove RN34,RN35, stuff L68,L69 for 1394 PAGE28:del R276,R278 stuff L72 , del R613,R612,R624,R626 stuff L70,L71 , add 0.1u for +5VPCU add 100p for 3ND_MBDATA/CLK PAGE31:stuff all 0.1 cap

20071221

update power

20071222

PAGE11: stuff R48 2.2K for power play

20071222

PAGE24: Per cost down remove LAN eeprom,stuff R381,remove U21,R380,R378

20080102

PAGE14: NEW_DET# change from Geven3# to GPM1#

20080117

Update RX781

20080117

PAGE13:Modify RTC circuit. R301,R302 change from 8.66k to 2k. R332 change from 4.7K to 6.8K

20080117

PAGE13:Change RTC Battery from VARTA (AHL03001441) to MATSUSHITA (AHL03002005)

20080117

PAGE19:Change back HDMI connector(CN25) footprint from HDMI-C12816-119A5-L-19P-H-BD3 to HDMI-C12816-119A5-L-19P-H-BL5(SMT open issue)

20080117

PAGE20:for engery star add R684 connect to EC pin27

20080117

PAGE24:Change CN28 (RJ45 CONN) from DFTJ12FR024 to DFTJ12FR035

20080117

PAGE27:Change CN32(2nd SATA CONN) from DFHS22FR064 to DFHS22FR094

20080117

PAGE27:Change CN32 footprint from SATA-127043FR022XX27ZR-22P-L-H to SATA-127043FR022G285ZR-22P-L

20080117

PAGE30:Remove CN10 (Keyboard CONN)

20080117

PAGE21:Remove R492,R517, Short CN27/Pin189,190 to VIN directly.

20080118

PAGE28:Change L72 from CX216900002 to CX163210007(BT circuit)

20080118

PAGE08:Change CN19 footprint from DDR-C-292564-200P to DDR-C-292564-200P-BD3A (SMT open issue)

20080118

PAGE08:Change CN23 footprint from DDR-C-1734071-200P to DDR-C-1734071-200P-BD3A (SMT open issue)

20080118

PAGE30:Change SW4 footprint from SW-NSS506-212F-CCCD1T-3P to SW -NSS506-212F-CCCD1T-3P-BD3A (SMT open issue)

20080118

PAGE23:Change CN43 footprint from MDC-1-179373-2-12P-RUV to MDC-1-179373-2-12P-RUV-BD3A (SMT open issue)

20080118

PAGE35:Change PL15 Footprint from CDRH104R to CDRH104R-BD3A (SMT open issue)

20080118

PAGE22:Add R685 for VISTA WHQL circuit

20080118

PAGE24: Change RJ45 footprint from LAN-100073FR012G101ZL-12P to rj45-c100s7-10806-l-12P

20080118

PAGE31:HOLE 17,18.23 FBBL5004010 change to FBBL5002010

4

3

NOTEDATE

ECN Release Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify

PROJECT : BD3G

Quanta Computer Inc.

Size Document Number Rev

Change list

Date: Sheet

2

Date: Sheet

Quanta Computer Inc.

40 42Thursday, May 29, 2008

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2A

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BD3G

D D

C C

B B

A A

REV

C3A

5

20080118

PAGE30:change footprint from 88171-3400L-34P-L to 91504-340N-34P-L Circuit modify

20080118

PAGE30:LED7,8 change footprint from LED12-21SY

20080118

PAGE30:change p/n LED7 BEBL0074Z04 (W

20080131

PAGE31:update HOLE42,41,19,4,7,12,10,11,36,27,29,21,20,43,44

20080131

oltage leakage issue

v PAGE04:modify CPU_PROCHOT# ckt (add R687, no stuff R686,R425), CPU_LDT_REQ#_CPU ,CPU_PWRGD connect to +1.8V PAGE11:remove Q5,Q3,R83,R80,R97,stuff R88,R77 PAGE14:BOARD_ID4 change from GPIO66 to GPIO3

20080131

PAGE14:NEW

20080131

PAGE19: DEL L56,L57,L58,L59,R465,R474,R493,R495,R486,R488,R478,R483,C226,C227 for HDMI circuit

20080131

PAGE25: add +3V to CN21 pin39,41

20080131

PAGE18: Change L4,L5,L6 to CX

20080131

PAGE19: Change U11 from ARBL5SV0000 to ARBL5M

20080131

PAGE26:According to customer request, w

20080131

PAGE25: Change R573 from 28.7K to 0 ohm, Remov

20080131

PAGE14: Change R350 from 1K to 0 ohm (Slov

20080131

PAGE26: Change CN33(5 in 1 card CONN) P/N from DFHS38FR003 to DFHS38FR005

20080131

PAGE27: Change CN34 (1st SATA) P/N from DFHS22FR063 to DFHS22FR082

20080131

PAGE27: Change CN32 (2nd SATA) P/N from DFHS22FR094 to DFHS22FR083

20080131

PAGE20: Change CN5 (I

20080131

PAGE22: Change CN39(I-MIC CONN) P/N from DFHD02MR003 to DFHD02MR016

20080131

PAGE22: Change CN17(SPK CONN) P/N from DFHD04MR012 to DFHD04MR021

20080131

PAGE28: Change CN16(USB-FFC CONN) P/N from DFHD10MR011 to DFHD10MR008

20080131

PAGE28: Change CN13(FP CONN) P/N from DFHD04MR012 to DFHD04MR021

20080131

PAGE28: Change CN14(BT CONN) P/N from DFHD10MR011 to DFHD10MR008

20080201

PAGE22: Change I

20080201

PAGE30: Change R404,R405 from CS13902JB14 (390 ohm) to CS13302JB21(330 ohm)

20080201

RS780M PAGE11:change R103 from 150 to 140 CS11402FB01 PAGE18:RS780M A13 R8 ---> 140 CS11402FB19,MXM R8 ---> 150 CS11502FB21

20080201

PAGE19: change HDM

20080201

PAGE20: change Panel SDA/SDC pull res R412,R410 from 39K to 4.7K

20080204

ESD solution PAGE23: add Varistor D63,D64,D65 on SPDI PAGE28: reserve D66 for CN36 , reserve D68,D69,D70 for FP , stuff D71,D72,D73 for BT PAGE20:reserve D74,D75,D76 for CCD ,stuff D87 for LID switch PAGE27:del R270,R597 , connect to +5V directly ,reserve D77~D81 for CN34(1ND HDD) ,reserve D82~D86 for CN32(2ND HDD) ,reserve D67 for CN31 PAGE26:reserve D88~D91 for 1394 PAGE04:reserve D92,D93 for FAN , reserve C795,C796 change R122 to 0 0603 PAGE13,19,21,25:reserve C797~800 for PLTRST#

20080204

PAGE04: pull up R691 CPU_BDREQ# to av

20080205

PAGE23:Change R714,R715 from 10uF to 0 ohm (Audio HP circuit)

20080210

PAGE18,29: DEL D4,D5 footprint and DEL CRT

20080210

PAGE28: DEL C42, Add D94 for CN8/Pin2 (ESD issue) - default no stuff

20080210

PAGE28: Change L70,L71 from CX216900002 to CX163210007

20080210

PAGE28: Stuff L64,L65 to CX

20080213

PAGE27: Add ESAT

20080213

PAGE25: Change the footprint of R33 and R330 from 1206 to 0805

20080213

EM PAGE18: C4,C7,C10,C5,C8,C11 change from 10p to 6.8p PAGE28: stuff C391,C701, C559 ,C228,C465,C618,C41,C43, C618,C794,C809,C810 PAGE20: stuff C427~C432 PAGE30: stuff C39,C346 PAGE29: stuff C577,C578,C560 PAGE12: stuff C804~C807 for +NB_CORE PAGE25: stuff C40,C36,C54,C58,C289,C352,C319,C272 for WL PAGE19: stuff C808 for HDMI PAGE15: stuff C375,C366 for SB HW MONITOR PAGE22: stuff R627 PAGE26: change R683 from 0 to 33 ohm

20080214

UPDAT

20080215

PAGE28: CN42 co-lay

20080215

PAGE31: Remov

20080215

PAGE28: Change L70,L71 from CX

20080218

PAGE31: HOLE 15,24.25 FBBD3017010 change to FBBD3021010

20080218

PAGE31: HOLE 28.35 FBBL5007010 change to FBBL5050010 , HOLE 13,14 FBBL5008010 change to FBBL5051010

CARD hot plug issue ,NEW_DET# change from GEVEN5# to GPM1# (SB700 A12 Errata)

8BA470003 to meet CRT spec

-MIC)P/N from DFHD02MR003 to DFHD02MR016

NT-SPK AMP GAIN VALUE. Change R623,R625 from 9.1k to 5.1k 1%,Change R620,R621 from 10k to 16k 1%

A13 Errata

I SCL/SDA pull res R168,R171,R163,R170 to 4.7K ,change R1,R2 to 6.8K

163210007

A re-driver IC

I solution

E POWER

out with CN16

e R98,R145,R118 Hole15,17,18

IMAX),LED8 BE0R0053Z00 (WLAN & BT)

e can't stuff C782 (22pF) in SD/MS_CLK.

e VCCRTC can't reach 0V when clear CMOS.)

F_OUT/HP_JD/+3V_SPD

oid noise cause system shut down

_SENSE# net, No stuff R218

216900002 to CX201290009

4

CHANGE LIST

GC-TR8 to LED27-21-BHC-ZL1M2TY-3C

V0000

e C628 for NEW card some device can't work normal

3

NOTEDATE

Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify

2

PROJECT : BD3G

Quanta Computer Inc.

Document Number Rev

Size

Document Number Rev

Change List02

Date: Sheet

Date: Sheet of

1

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3C

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D D

C C

B B

A A

REV

C3A

5

20080218

PAGE04: G781 reverse R718 0 ohm for Griffin CPU

20080219

PAGE04: change G781 to G786P81U

20080220

PAGE27:1.change C801,C82 from 0.01u to 4.7n, 2.RX add C811,C812 4.7n

20080222

PAGE15:change SATA ODD from port3 to port4 (solve ODD post detect fail)

20080226

PAGE27:change ESATA conn usb-2006109-11p,update p/n to DFHS11FR021

20080227

update power include EMI

20080229

del co-layout parts RN34,RN35,R608,R607,R572,R569

20080303

PAGE14: del Mini card USB10,Felica USB5 , change BT to port5 , ESATA to port 10

20080303

PAGE25: MINI PCI II no need USB , change USB10 to ESATA .and del R169,R188

20080303

PAGE28: no Felica request , remove USB del R178,R179,remove Q57,C476,R450,Q56

20080303

PAGE31: EMI request add C813,C814

20080410

PAGE17: change R150 to R152 for power sequence

20080410

PAGE26: add D88~D91 for 1394 ESD

20080410

PAGE27: change ESATA conn usb-2006109-11p update p/n to DFHS11FR023

20080410

PAGE27: add D67,D49,D50 for ESATA USB ESD

20080410

PAGE28: add D51,D52, D66 for USB0

20080410

PAGE34: add PC191,PC193 for CPU core

20080410

PAGE35: del PR81

20080410

PAGE27: remove Flash card ckt

20080416

PAGE13: change RTC pad location to G1

20080416

PAGE14: pull up USB_OC5# R719

20080416

PAGE18: update footprint to sv-030018fr004s100fr-4p-h-bl5m

20080416

PAGE23: update footpritnt to knob-xre094-3p-bl5m

20080416

PAGE28: remove CN42 not co-layout with CN16

20080416

PAGE31: update HOLE13,14 footprint to H-C236D146P2

20080417

PAGE27: remove D77~D81 for CN34 , change to U44 CM1213-04SO(AL001213001) ,remove D82~D86 for CN32 , change to U45 CM1213-04SO

20080418

PAGE28: Change L72 from CX163210007(BT circuit) to CX201290009

20080421

PAGE31: remove Hole31,37

20080421

no stuff +3VSUS component PAGE31: no stuff C229,C518,C128 PAGE33: no stuff PQ23 PAGE37: no stuff PR95,PQ20

20080424

PAGE16: IDE/FLASH not use ,remove C287,C288,C297,C293,C294

20080424

PAGE16: internal clk not use ,remove C332,C330,C327,C331, change L28 to 0 ohm

To meet ESATA SI

20080424

PAGE27: change R706 from 0 ohm to 330 , stuff R692,R693,R694

20080424

PAGE16: remove C762 to meet PWRGD timing spec

20080424

PAGE9: stuff R480,R479 to meet AMD spec

20080424

PAGE17: stuff C765 10nf to meet power sequence

20080505

PAGE34: intersil recommand to set OCP to 30A Change PR218 from CS32052FB21 to CS41072FB11,Change PR157 from CS41002FB28 to CS31002FB26,Change PR160 PR216 from CS31622FB27 to CS23652FB08

20080505

PAGE22: Change CN17 from DFHD04MR021 to DFHD04MRA75

20080505

PAGE27: update re-driver footprint to tqfn36-5x6-5-37p-0_75h-te1m

20080505

PAGE20: reserve R720,R721 for cost down

20080505

PAGE27: add C816 0.1u to U44 +5V for ESD , add C818 0.1u to U45 +5V for ESD

20080505

PAGE25: remove CN30 second PCIE (HD Decoder)

20080505

PAGE31: remove HOLE28,35 (HD Decoder)

20080507

PAGE20: stuff D74,D75,D76 for CCD

20080508

PAGE20: reserve CM1293 U46,C819 for CCD ESD protect

20080508

PAGE28: stuff D68,D69,D70 for FP

20080508

PAGE30: stuff D53 for RF_LED ESD

20080509

PAGE26: 5/9 for card reader MS DUO adapter short issue reserve R723,724,722 ,Q82,Q81,Q83,Q84

20080513

PAGE4: follow AMD design guide 1.03 stuff R675

20080527

PAGE26: some 1394 device can't boot normal change L38 to BK1608HS220_6

20080527

PAGE34: CPU core adj

1.PR160,PR216 change to 3.92K/F_4

2.PR213,PR215 change to 18.2K/F_4

20080527

PAGE33: solve system hang up , when plug adp quickly change PR113 from 150K_4 to 115K/F_4

20080527

PAGE33: avoid right side USB voltage drop change PR119 to 63.4K , PR120 to 10K

20080528

PAGE12: del C805,C807

20080529

PAGE27: change ESATA conn p/n to DFHS11FR027

4

CHANGE LIST

3

NOTEDATE

Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify Circuit modify

2

PROJECT : BD3G

Quanta Computer Inc.

Size Document Number Rev

Date: Sheet

Quanta Computer Inc.

Change List03

3C

42 42Thursday, May 29, 2008

1

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Quanta BD3G DABD3GMB6E0, Satellite A300D Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual