5
4
3
2
1
BD3A BLOCK DIAGRAM
DDRII-SODIMM1
D D
DDRII-SODIMM2
PG 8,9
PG 8,9
DDR II 667 MHZ
AMD S1g1
Turion Rev.G Dual-Core
Sempron
Dual-Core 35W
(638 S1g1 socket)
PG 4,5,6,7
HDMI
PG 19
LVDS
PG 20
S-VIDEO
CRT
PG 18
PG 18
CRT TV HDMI
C C
LVDS
MXM Module
PG 21
LVDS(2ch)
PCI-E X16
HT_LINK
HDMI
RS690M
465 FCBGA
PG 10,11,12,13
A_LINK (X4)
SATA - HDD1
PG 27
SATA - HDD2
PG 27
Internal ODD
CD-ROM
B B
PCI ROUTING TABLE
Device IDSEL# REQ#/GNT# Interrupt
OZ129 AD17 REQ0# / GNT0# INTE#
PG 27
SATA0
SATA1
PATA 133
PCI Bus 33MHz
SB600
549 BGA
PG 14,15,16,17,18
LPC
HOST 200MHz
PCIE 100MHz
USB 48MHz
REF 14MHz
PCI-E, 1X (port2)
PCI-E, 1X (port0)
USB2.0 (P3)
PCI-E, 1X (port1)
PCI-E, 1X (port3)
USB2.0 (P6)
USB2.0 (P2)
USB2.0 (P4)
USB2.0 (P5)
USB2.0 (P8)
Azalia
CLOCK GENERATOR
PG 3
8040T(10/100)/8055(Giga)
RJ45
Mini Card (WLAN)
MINI CARD (HD Video Decoder)
NEW CARD
CCD
Fingerprint
Felica
Bluetooth
PG 28
PG 19
PG 28
PG 28
Azalia Audio Codec
PG 24 PG 24
PG 25
PG 25
PG 25
USB2.0 (P0)
USB2.0 (P1)
USB2.0 (P7)
USB2.0 (P9)
CX20561
VCC_CORE
+NB_CORE
+2.5V
+1.5V
+1.2V
+1.2V_S5
+1.8VSUS
+1.8V
+SMDDR_VTERM
PG 22
CPU CORE
NB CORE
(1.0~1.2V)
+2.5V
+1.5V
+1.2V
+1.8VSUS
SMDDR
VTERM
+3VPCU
3V/5V
+3V_S5
+3VSUS
+3V
+5VPCU
+5V
USB2.0 I/O Ports X1
(MB)
USB2.0 I/O Ports X1
(DB)
USB2.0 I/O Ports X1
(DB)
USB2.0 I/O Ports X1
(MB)
PG 28
PG 28
PG 28
PG 28
PCB STACK UP
PG 34
LAYER 1 : TOP
LAYER 2 : GND
PG 35
LAYER 3 : IN1
LAYER 4 : IN2
PG 37
LAYER 5 : VCC
LAYER 6 : BOT
PG 37
Daughter Board
PG 37
USB Board
(With RJ11)
USB Board
(With FM)
PG 36
Touch Pad board Touch Pad board
PG 33
MDC board
Power board
(with Fingerprinter)
A:(09/19) Gerber Out for A-test (DABD3AMB6A0)
A:(09/19) Re-name
A:(09/21) Import BOM E200709-3025
B:(10/30) Gerber Out for B-test (DABD3AMB6B0)
B:(10/31) Change BOM E200710-4324
B:(10/31) Import BOM E200710-4325
B:(11/27) Change BOM E200711-3973
C:(12/08) Gerber Out for C-test (DABD3AMB6C0)
C:(12/11) Import BOM E200712-1413
C:(12/11) Change BOM E200712-1530
C:(12/14) Change BOM E200712-2298
O2Micro OZ129T
PG 26
EC
WPCE775
PG 29
PORT-A
PORT-B
Speaker Amplifier
G1441R51U
PG 22
MDC CONN
PG 23
FM Radio
PG 23
SPI
IEEE1394 CN.
A A
5
Card Reader
PG 26 PG 26
VR
PG 23
FAN
PG 6
Keyboard
PG 30
4
Flash
ROM
PG 29 PG 28
Touch
Pad
CIR
PG 28
Kill SW
PG 30
3
H.P/
SPDIF
PG 23
MIC
JACK
PG 23
INT.
MIC
PG 23
INT.
S.P.
PG 22
2
MDC
Board
RJ11
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
of
of
of
14 3 Tuesday, January 22, 2008
14 3 Tuesday, January 22, 2008
1
14 3 Tuesday, January 22, 2008
3C
3C
3C
5
4
3
2
1
BD3A Power On Sequence
From AC,Battery VIN
D D
From PWM
From Power Button
From EC
+5VPCU +3VPCU
SYS_HWPG(PCU)
NBSWON#
S5_ON
+5V_S5
+3V_S5
From EC
From EC
From SB
From SB to EC
From EC
+1.2V_S5
RSMRST#
DNBSWON#
PCIE_WAKE#
SUSB#,SUSC#
SUSON
>10ms
>100ms
SUSON
+3VSUS +1.8VSUS SMDDR_VREF
From PWM
C C
From EC
HWPG_1.8V (SUS)
MAINON
MAINON
+5V +3V +2.5V +1.8V +1.5V SMDDR_VTERM
From PWM
From EC
HWPG_1.5V,HWPG_2.5V,GFXPG(MAIN)
VRON
MAINON
+VCC_CORE
From PWM
From EC
From EC
From PWM
From EC
From EC
From PWM
CPU_PWRGD
+1.2V_ON
+1.2V
HWPG_CPUIO
+1.2V_ON+RC
+NB_CORE
HWPG_1.2_NB
MAINON+RC
+1.2V_ON+RC
HWPG
B B
From EC
From SB
From SB
From SB
From SB
ECPWROK
NB_PWRGD
SB_PWRGD
CPU_PWRGD
PLTRST# PCIRST#
CPU_LDT_RST#
CPU_LDT_STOP#
-22ms~500ms
47ms~66ms
71ms~73ms
1.9ms~2.1ms
Items Function BTO Name Description
CIR
1
HDMI port
2
HDMI transmitter
3
HDMI-CEC
4
Discrete VGA
5
UMA
6
New Card
7
RJ11
8
RJ45-10/100
9
RJ45-1000
10
Option for RJ45-10/100 and RJ45-1000
11
TV
12
Cardbus
13
FM transmitter
14
Mainstream ID LED
15
Low cost ID LED
16
CCD
17
INT MIC
18
AMD Hyper Flash
19
North bridge(690MC/RS780MC)
20
North bridge(RX780)
21
PowerXpress
22
PowerXpress with UMA SKU
23
PowerXpress with Discrete VGA SKU
24
Power player/Power Shift
25
BOM naming rule
v
v
v
v
v
v
v
v
v
CIR@
HDM@
SI@
CEC@
EV@
IV@
NEW@
MD@
40@
55@
40@55@
TV@
CB@
FM@
MID@
LID@
CCD@
I_MIC@
HF@
MC@
RX@
PX@
PX@IV@
PX@EV@
PP@
Silicon image SiI 1392/1932
Renesas R8C/1B
External VGA stuff
Internal VGA stuff
Modem
Marvell 8040T(10/100)
Marvell 8055(Giga)
Option for 8040/8055
Only for AMD platform
Only for AMD platform
Only for AMD platform
Only for AMD platform
Only for AMD platform
Only for AMD platform
Only for AMD platform
*Note: EC will sampling SUSB# &
SUSC# every 5ms.
AMD SB600 SMBUS Table
CLK GEN RAM Mini Card (HD-Decoder) Mini-card(WL) New Card HDMI
SB600 SDATA0/SCLK0(+3V)
SB600 SDATA0/SCLK0(+3V_S5)
Power
A A
Reserve MOS ckt
V
V V V V
V
+3V +3V +3V (Atheros) +3V +3V_S5
+3V
V V V V V V
EC775 SDATA1/SCLK1(+3VPCU)
EC775 SDATA2/SCLK2(+3VPCU)
EC775 SDATA3/SCLK3(+3VPCU)
EC775 SDATA4/SCLK4(+3VPCU)
Power
Reserve MOS ckt
5
4
3
Battery CPU thermal Sensor EC EEPROM VGA thermal Sensor Touch Sensor HDMI CEC
V
+3VPCU +3V +3VPCU +3V +3VPCU +5VPCU
XX X VVV
EC SMBUS Table
VV
2
VV V
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
SYSTEM INFORMATION
SYSTEM INFORMATION
SYSTEM INFORMATION
1
3C
3C
24 3 Tuesday, January 22, 2008
24 3 Tuesday, January 22, 2008
24 3 Tuesday, January 22, 2008
3C
of
of
of
5
4
3
2
1
+3V
L30 BK1608HS600_6 L30 BK1608HS600_6
D D
+3V
L61 BK1608HS600_6 L61 BK1608HS600_6
+3V
L33 BK1608HS600_6 L33 BK1608HS600_6
A:(9/3) Change from 1.0nF to 2.2nF to meet AMD check list.
CLK_VDD
R273
R273
10K_4
10K_4
C C
Clock Gen I2C
A:(8/27)Add MOS for I2C
SCLK0 8,15,25
B B
SDATA0 8,15,25
B:(10/24) change C322,C323 from 33p to 27p (base on TXC report)
Q39
Q39
*RHU002N06
*RHU002N06
Q71
Q71
*RHU002N06
*RHU002N06
CLK_VDD
C288
C288
10u/10V_8
10u/10V_8
C612
C612
C611
C611
*0.1u/10V_4
*0.1u/10V_4
1u/6.3V_4
1u/6.3V_4
C302
C302
C303
C303
*0.1u/10V_4
*0.1u/10V_4
2.2u/6.3V_6
2.2u/6.3V_6
C322 33p/50V_4 C322 33p/50V_4
14.318MHZY514.318MHZ
C323 33p/50V_4 C323 33p/50V_4
Parallel Resonance Crystal
+3V
R272
R272
2
*10K_4
3
R267 0_4 R267 0_4
+3V
3
R563 0_4 R563 0_4
*10K_4
1
R564
R564
2
*10K_4
*10K_4
1
Put Decoupling Caps close to Clock Fen. power pin
C587
C597
C597
0.1u/10V_4
0.1u/10V_4
R277
R277
*1M_4
*1M_4
Ioh = 5 * Iref
(2.32mA)
C587
C599
C599
C615
*0.1u/10V_4
*0.1u/10V_4
T66T66
R550
R550
475/F_4
475/F_4
C615
0.1u/10V_4
0.1u/10V_4
U17
U17
54
14
23
28
44
5
39
2
60
53
15
22
29
45
8
38
1
58
3
4
11
61
9
10
48
ICS951462
ICS951462
VDDCPU
VDD_SRC1
VDD_SRC2
VDD_SRC3
VDD_SRC4
VDD_48
VDD_ATIG
VDD_REF
VDDHTT
GND_CPU
GND_SRC1
GND_SRC2
GND_SRC3
GND_SRC4
GND_48
GND_ATIG
GND_REF
GNDHTT
XIN
XOUT
RESET_IN#
NC
SMBCLK
SMBDAT
IREF
0.1u/10V_4
0.1u/10V_4
CLK_VDD
CLK_VDD_USB
CLK_VDD_REF
CLK_XIN
CLK_XOUT
CLKREQA# CONTROL SRC5,6,7
CLKREQB# CONTROL SRC2,3,4 ATIG3
CLKREQC# CONTROL SRC0,1 ATIG0,1,2
CLK_VDD_USB
CLK_VDD_REF
Y5
CGCLK_SMB
CGDAT_SMB
C614
C614
0.1u/10V_4
0.1u/10V_4
2 1
CGCLK_SMB
CGDAT_SMB
Voh = 0.71V @ 60 ohm
C598
C598
0.1u/10V_4
0.1u/10V_4
CLK_VDDA
C588
C588
C613
C613
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
CLK_VDDA
50
VDDA
49
GNDA
CPUCLK_EXT_R
56
CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1
SRCCLKT6
SRCCLKC6
ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1
ATIGCLKT2
ATIGCLKC2
ATIGCLKT3
ATIGCLKC3
SRCCLKT5
SRCCLKC5
SRCCLKT4
SRCCLKC4
SRCCLKT3
SRCCLKC3
SRCCLKT2
SRCCLKC2
SRCCLKT0
SRCCLKC0
SRCCLKT1
SRCCLKC1
SRCCLKT7
SRCCLKC7
CLKREQA#
CLKREQB#
CLKREQC#
48MHz_1
48MHz_0
FS1/REF1
FS0/REF0
FS2/REF2
HTTCLK0
CPUCLK#_EXT_R
55
52
T60T60
51
T65T65
SBLINK_CLKP_R
16
SBLINK_CLKN_R
17
NBSRC_CLKP_R
41
NBSRC_CLKN_R
40
MXM_REFCLKP_R
37
MXM_REFCLKN_R
36
35
34
30
31
SBSRC_CLKP_R
18
SBSRC_CLKN_R
19
20
21
GPP_CLK1P_R
24
GPP_CLK1N_R
25
GPP_CLK2P_R
26
GPP_CLK2N_R
27
47
46
GPP_CLK3P_R
43
GPP_CLK3N_R
42
GPP_CLK0P_R
12
GPP_CLK0N_R
13
CLKREQA#
57
CLKREQB#
32
NEW_CLKREQ#
33
B:(9/27) Add 10k(R665) PU to +3V for NEW Card ckt
7
CLK_48M_2_R
6
63
64
62
59
A:(9/7) Add 10p for EMI issue (Suggestion by Seligo)
T61T61
T64T64
T150T150
T149T149
T83T83
T81T81
T62T62
T63T63
R271 33_4 R271 33_4
SB_OSCIN_R
NB_OSCIN_R
HTREFCLK_R
RP28 33X2 RP28 33X2
RP26 33X2 RP26 33X2
RP27 EV@33X2 RP27 EV@33X2
RP29
RP29
RP31
RP31
RP32
RP32
RP25
RP25
L28 BK1608HS600_6 L28 BK1608HS600_6
C270
C270
C586
C586
10u/10V_8
10u/10V_8
0.1u/10V_4
0.1u/10V_4
R248 47.5/F_4 R248 47.5/F_4
R249 47.5/F_4 R249 47.5/F_4
(0917) dont add them when use RTM870T-690
4
3
2
1
2
1
4
3
2
1
4
3
4
3
33X2
33X2
2
1
4
3
33X2
33X2
2
1
4
3
33X2
33X2
2
1
NEW@33X2
NEW@33X2
2
1
4
3
4
3
2
1
RP30 33X2 RP30 33X2
R238 33_4 R238 33_4
R233 33_4 R233 33_4
R243 33_4 R243 33_4
C271
C271
*10p_4
*10p_4
USBCLK 15
R230 EV@49.9/F_4 R230 EV@49.9/F_4
R229 EV@49.9/F_4 R229 EV@49.9/F_4
R234
R234
49.9/F_4
49.9/F_4
+3V
R235 261/F_4 R235 261/F_4
R289 49.9/F_4 R289 49.9/F_4
R279 49.9/F_4 R279 49.9/F_4
R287 49.9/F_4 R287 49.9/F_4
R288 49.9/F_4 R288 49.9/F_4
CLK_VDD
R555
R555
10K_4
10K_4
C186
C186
10p/50V_4
10p/50V_4
R286 49.9/F_4 R286 49.9/F_4
R237
R237
10K_4
10K_4
R241 *0_4 R241 *0_4
R556 *0_4 R556 *0_4
R236 *0_4 R236 *0_4
C572
C572
18p/50V_4
18p/50V_4
R280 49.9/F_4 R280 49.9/F_4
R254
R254
10K_4
10K_4
RAMP:(1/15) Add C572(18pF) for SB_OSCIN (EMI issue)
RAMP:(1/15) Add C186(10pF) for NB_OSC (EMI issue)
R285 49.9/F_4 R285 49.9/F_4
R284 49.9/F_4 R284 49.9/F_4
R231 NEW@49.9/F_4 R231 NEW@49.9/F_4
SB_OSCIN 15
NB_OSC 12
HTREFCLK 12
R226 NEW@49.9/F_4 R226 NEW@49.9/F_4
R228 49.9/F_4 R228 49.9/F_4
CPUCLKP 6
CPUCLKN 6
SBLINK_CLKP 12
SBLINK_CLKN 12
NBSRC_CLKP 12
NBSRC_CLKN 12
MXM_REFCLKP 21
MXM_REFCLKN 21
A:(8/20) Add ATIGCLK to MXM
A:(8/31) SWAP net for layout routing
CLK_PCIE_MINICARD 25
CLK_PCIE_MINICARD# 25
SBSRCCLKP 14
SBSRCCLKN 14
CLK_PCIE_WLAN 25
CLK_PCIE_WLAN# 25
A:(8/31) SWAP net for layout routing
CLK_PCIE_NEW 25
CLK_PCIE_NEW# 25
CLK_PCIE_LAN 24
CLK_PCIE_LAN# 24
R227 49.9/F_4 R227 49.9/F_4
R282 49.9/F_4 R282 49.9/F_4
R283 49.9/F_4 R283 49.9/F_4
(0917) dont add them
when use RTM870T-690
14.318MHz
14.318MHz
66MHz
B:(10/25) change LAN CLK from SRCCLK4 to SRCCLK7, control by CLKREQA#
+3V
Q60
R678
R678
10K_4
10K_4
CLKREQA#
CLKREQB#
B:(10/25) Add WLAN & LAN CLKREQ circuit (BOI request)
NEW_CLKREQ#
10K_4
10K_4
R632
R632
1
1
RHU002N06
RHU002N06
2
+3V
RHU002N06
RHU002N06
2
+3V
Q60
3
Q58
Q58
3
R665
R665
NEW@10K_4
NEW@10K_4
CLKREQ_LAN# 24
CLKREQ_WLAN# 25
NEW_CLKREQ# 25
3
EXT CLK FREQUENCY SELECT TABLE(MHZ)
CPU
Hi-Z
X
180.00
220.00
100.00
133.33
200.00
SRCCLK
[2:1]
100.00
100.00
100.00
100.00
100.00
100.00
100.00
HTT
Hi-Z
X/3 X/6
60.00
36.56
66.66
66.66
66.66
PCI
USB
Hi-Z
48.00
48.00
30.00
48.00
73.12
48.00
48.00
33.33
33.33
48.00
33.33 48.00
COMMENT
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Normal Turion/Sempron operation
FS0
FS1
FS2
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 1
A A
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
Quanta Computer Inc.
CLOCK GENERATOR
CLOCK GENERATOR
CLOCK GENERATOR
1
34 3 Tuesday, January 22, 2008
3C
3C
3C
of
34 3 Tuesday, January 22, 2008
34 3 Tuesday, January 22, 2008
5
4
3
2
1
4
D D
VLDT_RUN
HT_CADIN15_P 10
HT_CADIN15_N 10
HT_CADIN14_P 10
HT_CADIN14_N 10
HT_CADIN13_P 10
HT_CADIN13_N 10
HT_CADIN12_P 10
HT_CADIN12_N 10
HT_CADIN11_P 10
HT_CADIN11_N 10
HT_CADIN10_P 10
HT_CADIN10_N 10
HT_CADIN9_P 10
HT_CADIN9_N 10
HT_CADIN8_P 10
HT_CADIN8_N 10
HT_CADIN7_P 10
C C
VLDT_RUN
B B
HT_CADIN7_N 10
HT_CADIN6_P 10
HT_CADIN6_N 10
HT_CADIN5_P 10
HT_CADIN5_N 10
HT_CADIN4_P 10
HT_CADIN4_N 10
HT_CADIN3_P 10
HT_CADIN3_N 10
HT_CADIN2_P 10
HT_CADIN2_N 10
HT_CADIN1_P 10
HT_CADIN1_N 10
HT_CADIN0_P 10
HT_CADIN0_N 10
HT_CLKIN1_P 10
HT_CLKIN1_N 10
HT_CLKIN0_P 10
HT_CLKIN0_N 10
R99 51/F_4 R99 51/F_4
R100 51/F_4 R100 51/F_4
HT_CTLIN0_P 10
HT_CTLIN0_N 10
U25A U25A
D4
VLDT_A3
D3
VLDT_A2
D2
VLDT_A1
D1
VLDT_A0
N5
L0_CADIN_H15
P5
L0_CADIN_L15
M3
L0_CADIN_H14
M4
L0_CADIN_L14
L5
L0_CADIN_H13
M5
L0_CADIN_L13
K3
L0_CADIN_H12
K4
L0_CADIN_L12
H3
L0_CADIN_H11
H4
L0_CADIN_L11
G5
L0_CADIN_H10
H5
L0_CADIN_L10
F3
L0_CADIN_H9
F4
L0_CADIN_L9
E5
L0_CADIN_H8
F5
L0_CADIN_L8
N3
L0_CADIN_H7
N2
L0_CADIN_L7
L1
L0_CADIN_H6
M1
L0_CADIN_L6
L3
L0_CADIN_H5
L2
L0_CADIN_L5
J1
L0_CADIN_H4
K1
L0_CADIN_L4
G1
L0_CADIN_H3
H1
L0_CADIN_L3
G3
L0_CADIN_H2
G2
L0_CADIN_L2
E1
L0_CADIN_H1
F1
L0_CADIN_L1
E3
L0_CADIN_H0
E2
L0_CADIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
Athlon 64 S1
Processor Socket
VLDT_B3
VLDT_B2
VLDT_B1
VLDT_B0
AE5
AE4
AE3
AE2
T4
T3
V5
U5
V4
V3
Y5
W5
AB5
AA5
AB4
AB3
AD5
AC5
AD4
AD3
T1
R1
U2
U3
V1
U1
W2
W3
AA2
AA3
AB1
AA1
AC2
AC3
AD1
AC1
Y4
Y3
Y1
W1
T5
R5
R2
R3
C447
C447
4.7u/6.3V_6
4.7u/6.3V_6
HT_CADOUT15_P 10
HT_CADOUT15_N 10
HT_CADOUT14_P 10
HT_CADOUT14_N 10
HT_CADOUT13_P 10
HT_CADOUT13_N 10
HT_CADOUT12_P 10
HT_CADOUT12_N 10
HT_CADOUT11_P 10
HT_CADOUT11_N 10
HT_CADOUT10_P 10
HT_CADOUT10_N 10
HT_CADOUT9_P 10
HT_CADOUT9_N 10
HT_CADOUT8_P 10
HT_CADOUT8_N 10
HT_CADOUT7_P 10
HT_CADOUT7_N 10
HT_CADOUT6_P 10
HT_CADOUT6_N 10
HT_CADOUT5_P 10
HT_CADOUT5_N 10
HT_CADOUT4_P 10
HT_CADOUT4_N 10
HT_CADOUT3_P 10
HT_CADOUT3_N 10
HT_CADOUT2_P 10
HT_CADOUT2_N 10
HT_CADOUT1_P 10
HT_CADOUT1_N 10
HT_CADOUT0_P 10
HT_CADOUT0_N 10
HT_CLKOUT1_P 10
HT_CLKOUT1_N 10
HT_CLKOUT0_P 10
HT_CLKOUT0_N 10
HT_CPU_CTLOUT1_P HT_CTLIN1_P
HT_CPU_CTLOUT1_N HT_CTLIN1_N
T30T30
T32T32
HT_CTLOUT0_P 10
HT_CTLOUT0_N 10
+1.2V
L22
L22
FBJ3216HS800_1206
FBJ3216HS800_1206
A:(8/22) Remove one L (1206) via +1.2V to VLDT_RUN
A A
5
4
VLDT_RUN
C206
C206
4.7u/6.3V_6
4.7u/6.3V_6
C204
C204
4.7u/6.3V_6
4.7u/6.3V_6
C221
C221
0.22u/10V_4
0.22u/10V_4
C219
C219
0.22u/10V_4
0.22u/10V_4
3
1 2
C218
C218
180p/50V_4
180p/50V_4
1 2
C220
C220
180p/50V_4
180p/50V_4
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
TURION 64 HT I/F
TURION 64 HT I/F
TURION 64 HT I/F
Date: Sheet
Date: Sheet
2
Date: Sheet
44 3 Tuesday, January 22, 2008
44 3 Tuesday, January 22, 2008
44 3 Tuesday, January 22, 2008
of
of
1
of
3C
3C
3C
5
Processor DDR2 Memory Interface
C112
C112
1000p/50V_4
1000p/50V_4
U25B
U25B
MEMVREF
VTT_SENSE
MEMZN
MEMZP
MA0_CS_L3
MA0_CS_L2
MA0_CS_L1
MA0_CS_L0
MB0_CS_L3
MB0_CS_L2
MB0_CS_L1
MB0_CS_L0
MB_CKE1
MB_CKE0
MA_CKE1
MA_CKE0
MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0
MA_BANK2
MA_BANK1
MA_BANK0
MA_RAS_L
MA_CAS_L
MA_WE_L
+1.8VSUS
R96
R96
2K/F_4
2K/F_4
R94
R94
2K/F_4
2K/F_4
DDR II: CMD/CTRL/CLK
DDR II: CMD/CTRL/CLK
Athlon 64 S1
Processor Socket
D D
CPU_M_VREF
C116
VTT_SENSE
M_A_A15
M_A_A14
M_A_A13
M_A_A12
M_A_A11
M_A_A10
M_A_A9
M_A_A8
M_A_A7
M_A_A6
M_A_A5
M_A_A4
M_A_A3
M_A_A2
M_A_A1
M_A_A0
C116
0.1u/10V_4
0.1u/10V_4
W17
Y10
AE10
AF10
V19
J22
V22
T19
Y26
J24
W24
U23
H26
J23
J20
J21
K19
K20
V24
K24
L20
R19
L19
L22
L21
M19
M20
M24
M22
N22
N21
R21
K22
R20
T22
T20
U20
U21
PLACE THEM CLOSE TO
CPU WITHIN 1"
+1.8VSUS
R444
R444
39.2/F_4
39.2/F_4
1 2
C C
R443
R443
39.2/F_4
39.2/F_4
1 2
B B
A A
T25T25
M_ZN
M_ZP
M_A_CS#3 8,9
M_A_CS#2 8,9
M_A_CS#1 8,9
M_A_CS#0 8,9
M_B_CS#3 8,9
M_B_CS#2 8,9
M_B_CS#1 8,9
M_B_CS#0 8,9
M_CKE3 8,9
M_CKE2 8,9
M_CKE1 8,9
M_CKE0 8,9
M_A_A[0..15] 8,9
M_A_BS#2 8,9
M_A_BS#1 8,9
M_A_BS#0 8,9
M_A_RAS# 8,9
M_A_CAS# 8,9
M_A_WE# 8,9
4
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1
MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1
MB0_ODT1
MB0_ODT0
MA0_ODT1
MA0_ODT0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_BANK2
MB_BANK1
MB_BANK0
MB_RAS_L
MB_CAS_L
MB_WE_L
+SMDDR_VTERM
D10
C10
B10
AD10
W10
AC10
AB10
AA10
A10
Y16
AA16
E16
F16
AF18
AF17
A17
A18
W23
W26
V20
U19
J25
J26
W25
L23
L25
U25
L24
M26
L26
N23
N24
N25
N26
P24
P26
T24
K26
T26
U26
U24
V26
U22
+SMDDR_VTERM
M_B_A15
M_B_A14
M_B_A13
M_B_A12
M_B_A11
M_B_A10
M_B_A9
M_B_A8
M_B_A7
M_B_A6
M_B_A5
M_B_A4
M_B_A3
M_B_A2
M_B_A1
M_B_A0
M_CLKOUT1 8
M_CLKOUT1# 8
M_CLKOUT0 8
M_CLKOUT0# 8
M_CLKOUT4 8
M_CLKOUT4# 8
M_CLKOUT3 8
M_CLKOUT3# 8
M_ODT3 8,9
M_ODT2 8,9
M_ODT1 8,9
M_ODT0 8,9
M_B_A[0..15] 8,9
M_B_BS#2 8,9
M_B_BS#1 8,9
M_B_BS#0 8,9
M_B_RAS# 8,9
M_B_CAS# 8,9
M_B_WE# 8,9
3
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQ63
M_B_DQ62
M_B_DQ61
M_B_DQ60
M_B_DQ59
M_B_DQ58
M_B_DQ57
M_B_DQ56
M_B_DQ55
M_B_DQ54
M_B_DQ53
M_B_DQ52
M_B_DQ51
M_B_DQ50
M_B_DQ49
M_B_DQ48
M_B_DQ47
M_B_DQ46
M_B_DQ45
M_B_DQ44
M_B_DQ43
M_B_DQ42
M_B_DQ41
M_B_DQ40
M_B_DQ39
M_B_DQ38
M_B_DQ37
M_B_DQ36
M_B_DQ35
M_B_DQ34
M_B_DQ33
M_B_DQ32
M_B_DQ31
M_B_DQ30
M_B_DQ29
M_B_DQ28
M_B_DQ27
M_B_DQ26
M_B_DQ25
M_B_DQ24
M_B_DQ23
M_B_DQ22
M_B_DQ21
M_B_DQ20
M_B_DQ19
M_B_DQ18
M_B_DQ17
M_B_DQ16
M_B_DQ15
M_B_DQ14
M_B_DQ13
M_B_DQ12
M_B_DQ11
M_B_DQ10
M_B_DQ9
M_B_DQ8
M_B_DQ7
M_B_DQ6
M_B_DQ5
M_B_DQ4
M_B_DQ3
M_B_DQ2
M_B_DQ1
M_B_DQ0
M_B_DM7
M_B_DM6
M_B_DM5
M_B_DM4
M_B_DM3
M_B_DM2
M_B_DM1
M_B_DM0
M_B_DQ[0..63] 8
M_B_DM[0..7] 8
M_B_DQS[0..7] 8
M_B_DQS#[0..7] 8
M_B_DQS7
M_B_DQS#7
M_B_DQS6
M_B_DQS#6
M_B_DQS5
M_B_DQS#5
M_B_DQS4
M_B_DQS#4
M_B_DQS3
M_B_DQS#3
M_B_DQS2
M_B_DQS#2
M_B_DQS1
M_B_DQS#1
M_B_DQS0
M_B_DQS#0
AD11
AF11
AF14
AE14
Y11
AB11
AC12
AF13
AF15
AF16
AC18
AF19
AD14
AC14
AE18
AD18
AD20
AC20
AF23
AF24
AF20
AE20
AD22
AC22
AE25
AD26
AA25
AA26
AE24
AD24
AA23
AA24
G24
G23
D26
C26
G26
G25
E24
E23
C24
B24
C20
B20
C25
D24
A21
D20
D18
C18
D14
C14
A20
A19
A16
A15
A13
D12
E11
G11
B14
A14
A11
C11
AD12
AC16
AE22
AB26
E25
A22
B16
A12
AF12
AE12
AE16
AD16
AF21
AF22
AC25
AC26
F26
E26
A24
A23
D16
C16
C12
B12
U25C
U25C
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
2
DDR: DATA
DDR: DATA
Athlon 64 S1
Processor Socket
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
AA12
AB12
AA14
AB14
W11
Y12
AD13
AB13
AD15
AB15
AB17
Y17
Y14
W14
W16
AD17
Y18
AD19
AD21
AB21
AB18
AA18
AA20
Y20
AA22
Y22
W21
W22
AA21
AB22
AB24
Y24
H22
H20
E22
E21
J19
H24
F22
F20
C23
B22
F18
E18
E20
D22
C19
G18
G17
C17
F14
E14
H17
E17
E15
H15
E13
C13
H12
H11
G14
H14
F12
G12
Y13
AB16
Y19
AC24
F24
E19
C15
E12
W12
W13
Y15
W15
AB19
AB20
AD23
AC23
G22
G21
C22
C21
G16
G15
G13
H13
M_A_DQ63
M_A_DQ62
M_A_DQ61
M_A_DQ60
M_A_DQ59
M_A_DQ58
M_A_DQ57
M_A_DQ56
M_A_DQ55
M_A_DQ54
M_A_DQ53
M_A_DQ52
M_A_DQ51
M_A_DQ50
M_A_DQ49
M_A_DQ48
M_A_DQ47
M_A_DQ46
M_A_DQ45
M_A_DQ44
M_A_DQ43
M_A_DQ42
M_A_DQ41
M_A_DQ40
M_A_DQ39
M_A_DQ38
M_A_DQ37
M_A_DQ36
M_A_DQ35
M_A_DQ34
M_A_DQ33
M_A_DQ32
M_A_DQ31
M_A_DQ30
M_A_DQ29
M_A_DQ28
M_A_DQ27
M_A_DQ26
M_A_DQ25
M_A_DQ24
M_A_DQ23
M_A_DQ22
M_A_DQ21
M_A_DQ20
M_A_DQ19
M_A_DQ18
M_A_DQ17
M_A_DQ16
M_A_DQ15
M_A_DQ14
M_A_DQ13
M_A_DQ12
M_A_DQ11
M_A_DQ10
M_A_DQ9
M_A_DQ8
M_A_DQ7
M_A_DQ6
M_A_DQ5
M_A_DQ4
M_A_DQ3
M_A_DQ2
M_A_DQ1
M_A_DQ0
M_A_DM7
M_A_DM6
M_A_DM5
M_A_DM4
M_A_DM3
M_A_DM2
M_A_DM1
M_A_DM0
M_A_DQS7
M_A_DQS#7
M_A_DQS6
M_A_DQS#6
M_A_DQS5
M_A_DQS#5
M_A_DQS4
M_A_DQS#4
M_A_DQS3
M_A_DQS#3
M_A_DQS2
M_A_DQS#2
M_A_DQS1
M_A_DQS#1
M_A_DQS0
M_A_DQS#0
To SODIMM socket A (near) To SODIMM socket B (Far)
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
1
M_A_DQ[0..63] 8
M_A_DM[0..7] 8
M_A_DQS[0..7] 8
M_A_DQS#[0..7] 8
5
C445
C445
4.7u/6.3V_6
4.7u/6.3V_6
C500
C500
4.7u/6.3V_6
4.7u/6.3V_6
5
C444
C444
4.7u/6.3V_6
4.7u/6.3V_6
C446
C446
4.7u/6.3V_6
4.7u/6.3V_6
C516
C516
0.22u/10V_4
0.22u/10V_4
C497
C497
0.22u/10V_4
0.22u/10V_4
C440
C440
0.22u/10V_4
0.22u/10V_4
C525
C525
0.22u/10V_4
0.22u/10V_4
4
C443
C443
1000p/50V_4
1000p/50V_4
C505
C505
1000p/50V_4
1000p/50V_4
C508
C508
1000p/50V_4
1000p/50V_4
C496
C496
1000p/50V_4
1000p/50V_4
C442
C442
180p/50V_4
180p/50V_4
3
C498
C498
180p/50V_4
180p/50V_4
C441
C441
180p/50V_4
180p/50V_4
C439
C439
180p/50V_4
180p/50V_4
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
TURION 64 DDRII I/F
TURION 64 DDRII I/F
TURION 64 DDRII I/F
Date: Sheet
Date: Sheet
2
Date: Sheet
54 3 Tuesday, January 22, 2008
54 3 Tuesday, January 22, 2008
54 3 Tuesday, January 22, 2008
of
of
1
of
3C
3C
3C
5
If AMD SI is not used, the SID pin can be left unconnected and SIC
should have a 300-Ω (±5%) pulldown to VSS.
D D
C C
+1.8VSUS
CPU_SIC 14
CPU_SID 14
CPUCLKP 3
CPUCLKN 3
CPU_PWRGD 14
LDT_STOP# 12,14
LDT_RST# 14
CPU Thermal monitor
A:(8/21) change CPU Thermal Sensor SM Bus from 1st to 2nd
B B
2ND_MBCLK 29
2ND_MBDATA 29
(0903) add res8.2K and PH 3V
THERM_ALERT# 15
A:(8/20) Follow ZC3:
Add THERM_ALERT# to SB600 NC6 pin(ball T4)
R442 *300_4 R442 *300_4
R441 *300_4 R441 *300_4
R437 *0_4 R437 *0_4
R446 *0_4 R446 *0_4
C502 3900P/50V_4 C502 3900P/50V_4
R464
R464
169/F_6
169/F_6
C503 3900P/50V_4 C503 3900P/50V_4
R469
R469
R490
C573
C573
*100p/50V_4
*100p/50V_4
A:(8/24) change from 10k to 680ohm
Follow AMD check list Rev1.09
RAMP:(1/15) Add C573,C574 for LDT_RST#, CPU_HT_RESET# (ESD issue)
RAMP:(1/21) Change back L75 from baed to 0 ohm, no stuff C573,C574
3
3
R490
R480
R480
680_4
680_4
+3V
2
+3V
2
+3V
R65
R65
*8.2K_4
*8.2K_4
+3V
680_4
680_4
680_4
680_4
Q13
Q13
RHU002N06
RHU002N06
1
Q18
Q18
RHU002N06
RHU002N06
1
2
3
R58 10K_4 R58 10K_4
R438 300_4 R438 300_4
CPU_SIC_R
CPU_SID_R
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
R466 0_4 R466 0_4
R489 0_4 R489 0_4
L75 0_6 L75 0_6
Q19 *2N7002E-LF Q19 *2N7002E-LF
CPU_ALL_PWROK
CPU_LDTSTOP#
CPU_HT_RESET#
RAMP:(1/15) ESD issue:
Change Location name from R468 to L75
Change PN from CS00002JB38 to CX8LM25003
Change footprint from RC0402 to RC0603
R51
R51
10K_4
10K_4
+3V
R57
R57
*10K_4
*10K_4
THERM_ALERT#_R
1
THER_SHD#
(0903) change net name CPUFAN#_
ON to THER_SHD#
C574
C574
*100p/50V_4
*100p/50V_4
R56
R56
10K_4
10K_4
8
7
6
4
+3V
U6
SCLK
SDA
ALERT#
OVERT#
GMT G781U6GMT G781
ADDRESS: 98H
CPU FAN
A:(8/20) Add SYSFANON# (come from MXM)
A A
SYSFANON# 21
1
Q11
Q11
ME2N7002D
ME2N7002D
R26
R26
*0_4
THER_SHD#
*0_4
A:(8/18) Add 2.2uF for G995 failure rate issue
+3V +5V
2
+5V
C34
R27
R27
*10K_4
*10K_4
3
VFAN 29
5
C34
2.2u/6.3V_6
2.2u/6.3V_6
CPUFAN#_ON_R
FANPWR = 1.6*VSET
G995/Pin1- internal pull high (+5V)
U5
1
4
G995U5G995
VIN2VO
GND
/FON
GND
GND
VSET
GND
TH_FAN_POWER
3
5
6
7
8
4
+1.8VSUS
3
Q52
Q52
CPU_COREPG 29,34,35,37
H_THERMTRIP#
R46
R46
200_6
200_6
LM86VCC
1
VCC
2
DXP
3
DXN
5
GND
B:(10/30) change Thermal sensor from MAX6657 to GMT G781 for Cost down
<check list>
Layout Note:Routing 10:10 mils and away
from noise source with ground gard
FANSIG 29
TH_FAN_POWER_R
C32
C32
.01U_4
.01U_4
RAMP:(1/15) ADD D29,D35 (Varistor) for CN19 Pin1/3 (ESD issue)
A:(8/29) follow EMI suggestion, reserve 0603 footprint
4
C33
C33
10U_8
10U_8
R25 0_6 R25 0_6
2
FDV301N
FDV301N
1
R430
R430
B:(10/26) For floating issue,DEL C437, Add 100ohm (R687) to GND
10K_4
10K_4
2
R422 *0_6 R422 *0_6
1 3
MMBT3904
MMBT3904
Q54
Q54
CPU_TEST27_SINGLECHAIN
CPU_TEST26_BURNIN#
CPU_PRESENT#
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST24_SCANCLK1
CPU_TEST22_SCANSHIFTEN
CPU_TEST12_SCANSHIFTENB
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST18_PLLTEST1
+3V
R435
R435
330_4
330_4
2
THER_SHD#
1 3
(0903) add level shift to control SYS_SHDN#
A:(9/12) don't use NXP MMBT3904(BA039040039) in BL5A prject.It will cause leakage issue.
change to BA039040055
C50
C50
.1U_4
.1U_4
H_THERMDA
C51
C51
2200P/50V_4
2200P/50V_4
H_THERMDC
+3V
R408
R408
10K_4
10K_4
2 1
C434
C434
D29
D29
*.01U_4
*.01U_4
VPORT
VPORT
2 1
D35
D35
VPORT
VPORT
CN19
CN19
1
2
345
PTI_CWY030-B0G1Z
PTI_CWY030-B0G1Z
3
2
ATHLON Control and Debug
+2.5V
A:(9/7) Reserve 100uF/6.3V in VDDA supply.Default don't stuff.
L55 30ohm_4A L55 30ohm_4A
C494
*100u/6.3V_3528
*100u/6.3V_3528
+1.8VSUS
SYS_SHDN# 33
C494
VLDT_RUN
T45T45
T46T46
R467
R467
*HDT@F2.2K_4
*HDT@F2.2K_4
H_PROCHOT#
3
R48
R48
300_4
300_4
D31
D31
R436
R436
*BAS316
*BAS316
*10K_4
*10K_4
R687 100K_6 R687 100K_6
SB_THERMTRIP# 15
SYS_SHDN# 33
COREFB+V 34
COREFB- 34 PWR_PSI# 34
R431 *300_4 R431 *300_4
R439 300_4 R439 300_4
R47 1K/F_4 R47 1K/F_4
R479 510/F_4 R479 510/F_4
R49 300_4 R49 300_4
R434 *300_4 R434 *300_4
R433 *300_4 R433 *300_4
R432 *300_4 R432 *300_4
R50 *300_4 R50 *300_4
R481 *300_4 R481 *300_4
R470 *300_4 R470 *300_4
R491 510/F_4 R491 510/F_4
R482 300_4 R482 300_4
R471 300_4 R471 300_4
Q53
Q53
MMBT3904
MMBT3904
VDDA_RUN
C492
C492
4.7u/6.3V_6
4.7u/6.3V_6
CPU_HT_RESET#
T140T140
CPU_ALL_PWROK
T138T138
CPU_LDTSTOP#
T139T139
CPU_SIC_R
CPU_SID_R
R98 44.2F_4 R98 44.2F_4
R95 44.2F_4 R95 44.2F_4
place them to CPU within 1"
CPU_VDDIO_SUS_FB_H
T7T7
CPU_VDDIO_SUS_FB_L
T13T13
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
CPU_TEST17_BP3 CPU_TEST19_PLLTEST0
T47T47
CPU_TEST16_BP2
T50T50
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST12_SCANSHIFTENB
CPU_TEST07_ANALOG_T
T132T132
CPU_TEST6_DIECRACKMON
T9T9
H_THERMDC
H_THERMDA
CPU_TEST3_GATE0
T10T10
CPU_TEST2_DRAIN0
T14T14
CPU_RSVD_MA0_CLK3_P
T34T34
CPU_RSVD_MA0_CLK3_N
T36T36
CPU_RSVD_MA0_CLK0_P
T40T40
CPU_RSVD_MA0_CLK0_N
T38T38
CPU_RSVD_MB0_CLK3_P
T28T28
CPU_RSVD_MB0_CLK3_N
T26T26
CPU_RSVD_MB0_CLK0_P
T33T33
CPU_RSVD_MB0_CLK0_N
T31T31
+1.8VSUS
2
Q68
Q68
1
*HDT@FDV301N
*HDT@FDV301N
+1.8VSUS +1.8VSUS
R429
R429
10K_4
10K_4
2
1 3
Q55 MMBT3904 Q55 MMBT3904
C190
C190
0.22u/10V_4
0.22u/10V_4
+3V
FD4
FD4
*HDT@BAS316
*HDT@BAS316
R500
R500
*HDT@2K_4
*HDT@2K_4
3
+3V
R424
R424
4.7K_4
4.7K_4
1 2
CPU_HTREF1
CPU_HTREF0
CPU to HDT RESET# CPU_HT_RESET#
R426 *0_4 R426 *0_4
C191
C191
3300p/50V_4
3300p/50V_4
F10
AF4
AF5
W9
G10
AA9
AC9
AD9
AF9
E9
E8
G9
H10
AA7
AC8
AA6
W7
W8
AB6
P20
P19
N20
N19
R26
R25
P22
R22
F8
F9
B7
A7
P6
R6
F6
E6
Y9
A9
A8
C2
D7
E7
F7
C7
C3
Y6
U25D
U25D
VDDA2
VDDA1
RESET_L
PWROK
LDTSTOP_L
SIC
SID
HT_REF1
HT_REF0
VDD_FB_H
VDD_FB_L
VDDIO_FB_H
VDDIO_FB_L
CLKIN_H
CLKIN_L
DBRDY
TMS
TCK
TRST_L
TDI
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST5
TEST4
TEST3
TEST2
RSVD0
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
THERMTRIP_L
PROCHOT_L
CPU_PRESENT_L
MISC
MISC
AMD NPT S1 SOCKET
Processor Socket
TALERT# 16
AMD_PROCHOT 14,29
2
H_THERMTRIP#
AF6
H_PROCHOT#
AC7
A5
VID5
C6
VID4
A6
VID3
A4
VID2
C5
VID1
B5
VID0
CPU_PRESENT#
AC6
A3
PSI_L
PSI_L is a Power Status Indicator signal. This signal is asserted
when the processor is in a low powerstate. PSI_L should be
connected to the power supply controller, if the controller
supports “skipmode, or diode emulation mode”. PSI_L is asserted by
the processor during the C3 and S1 states.
CPU_DBREQ#
E10
DBREQ_L
CPU_TDO
AE9
TDO
CPU_TEST29_H_FBCLKOUT_P
C9
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
CPU_TEST29_L_FBCLKOUT_N
C8
CPU_TEST24_SCANCLK1
AE7
CPU_TEST23_TSTUPD
AD7
CPU_TEST22_SCANSHIFTEN
AE8
CPU_TEST21_SCANEN
AB8
CPU_TEST20_SCANCLK2
AF7
CPU_TEST28_H_PLLCHRZ_P
J7
CPU_TEST28_L_PLLCHRZ_N
H8
CPU_TEST27_SINGLECHAIN
AF8
CPU_TEST26_BURNIN#
AE6
CPU_TEST10_ANALOGOUT
K8
CPU_TEST08_DIG_T
C4
TEST8
CPU_MA_RESET#
H16
RSVD8
CPU_MB_RESET#
B18
RSVD9
CPU_RSVD_VIDSTRB1
B3
CPU_RSVD_VIDSTRB0
C1
CPU_RSVD_VDDNB_FB_P
H6
CPU_RSVD_VDDNB_FB_N
G6
CPU_RSVD_CORE_TYPE
D5
R24
W18
R23
AA8
H18
H19
+1.8VSUS
R54 *HDT@220_4 R54 *HDT@220_4
R53 *HDT@220_4 R53 *HDT@220_4
R440 *HDT@220_4 R440 *HDT@220_4
R55 *HDT@220_4 R55 *HDT@220_4
R485 *HDT@220_4 R485 *HDT@220_4
NOTE: HDT TERMINATION IS REQUIRED
FOR REV. Ax SILICON ONLY.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
A:(8/24) change from +1.8VSUS to CPU_ALL_PWROK
Follow AMD check list Rev1.09
+1.8VSUS +1.8VSUS
R484
R445
R445
300_4
300_4
PLACE IT CLOSE TO CPU WITHIN 1"
ROUTE AS 80 Ohm DIFFERENTIAL PAIR
A:(8/16) Add HDT CONN for CPU debug
A:(9/11) Remove HDT CONN and add test point for CPU debug
IF no use which Net
need pull-up or down
R484
300_4
300_4
H_VID5 34
H_VID4 34
H_VID3 34
H_VID2 34
H_VID1 34
A:(8/14) change net name from VID* to H_VID*
(Follow power net name)
A:(8/22) change net name from PSI_L to PWR_PSI#
R462 80.6F_4 R462 80.6F_4
T8T8
T49T49
T56T56
T53T53
T135T135
T54T54
T133T133
T136T136
T131T131
T52T52
T51T51
T134T134
H_VID0 34
HDT CONNECTOR
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
TURION 64 CTRL & DEBUG
TURION 64 CTRL & DEBUG
TURION 64 CTRL & DEBUG
T48T48
T55T55
T6T6
T5T5
T128T128
T4T4
T129T129
T141T141
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
1
CPU to HDT RESET#
64 3 Tuesday, January 22, 2008
64 3 Tuesday, January 22, 2008
64 3 Tuesday, January 22, 2008
of
of
of
6
3C
3C
3C
5
4
3
2
1
PROCESSOR POWER AND GROUND
D D
U25F
U25F
AA4
VSS1
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VCC_CORE VCC_CORE
C C
B B
A1
AC4
AD2
M10
N11
R11
U11
U13
J11
J13
K10
K12
K14
L11
L13
P10
T10
T12
T14
V10
U25E
U25E
VDD1
VDD2
G4
VDD3
H2
VDD4
J9
VDD5
VDD6
VDD7
K6
VDD8
VDD9
VDD10
VDD11
L4
VDD12
L7
VDD13
L9
VDD14
VDD15
VDD16
M2
VDD17
M6
VDD18
M8
VDD19
VDD20
N7
VDD21
N9
VDD22
VDD23
P8
VDD24
VDD25
R4
VDD26
R7
VDD27
R9
VDD28
VDD29
T2
VDD30
T6
VDD31
T8
VDD32
VDD33
VDD34
VDD35
U7
VDD36
U9
VDD37
VDD38
VDD39
V6
VDD40
V8
VDD41
VDD42
POWER
POWER
Athlon 64 S1
Processor Socket
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
V12
V14
W4
Y2
J15
K16
L15
M16
P16
T16
U15
V16
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
P18
P21
P23
P25
R17
T18
T21
T23
T25
U17
V18
V21
V23
V25
Y25
+1.8VSUS
A26
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B11
B13
B15
B17
B19
B21
B23
B25
D11
D13
D15
D17
D19
D21
D23
D25
H21
H23
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
VSS63
VSS64
J4
VSS65
GROUND
GROUND
Athlon 64 S1
Processor Socket
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
M11
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
VCC_CORE
C133
VCC_CORE
+1.8VSUS
C147
C147
10u/6.3V_6
10u/6.3V_6
C122
C122
0.22u/10V_4
0.22u/10V_4
C130
C130
10u/10V_8
10u/10V_8
C114
C114
10u/6.3V_6
10u/6.3V_6
C121
C121
0.22u/10V_4
0.22u/10V_4
C166
C166
10u/10V_8
10u/10V_8
C129
C129
10u/6.3V_6
10u/6.3V_6
C120
C120
0.01u/25V_4
0.01u/25V_4
C491
C491
0.22u/10V_4
0.22u/10V_4
C133
10u/6.3V_6
10u/6.3V_6
C146
C146
0.22u/10V_4
0.22u/10V_4
C168
C168
10u/6.3V_6
10u/6.3V_6
C119
C119
180p/50V_4
180p/50V_4
C124
C124
10u/6.3V_6
10u/6.3V_6
C140
C140
10u/6.3V_6
10u/6.3V_6
DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.8VSUS
C108
BOTTOMSIDE DECOUPLING
C108
4.7u/6.3V_6
4.7u/6.3V_6
C136
C136
0.22u/10V_4
0.22u/10V_4
C473
C473
0.22u/10V_4
0.22u/10V_4
C176
C176
0.22u/10V_4
0.22u/10V_4
C160
C160
0.22u/10V_4
0.22u/10V_4
C182
C182
0.01u/25V_4
0.01u/25V_4
+1.8VSUS
C106
C106
4.7u/6.3V_6
4.7u/6.3V_6
C109
C109
0.01u/25V_4
0.01u/25V_4
C110
C110
4.7u/6.3V_6
4.7u/6.3V_6
C193
C193
180p/50V_4
180p/50V_4
C105
C105
4.7u/6.3V_6
4.7u/6.3V_6
C104
C104
180p/50V_4
180p/50V_4
C154
C154
10u/6.3V_6
10u/6.3V_6
PP 0103
C107
C107
0.22u/10V_4
0.22u/10V_4
C143
C143
180p/50V_4
180p/50V_4
C163
C163
10u/6.3V_6
10u/6.3V_6
C150
C150
0.22u/10V_4
0.22u/10V_4
7
Athlon 64 S1g1
uPGA638
Top View
A A
AF1
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
TURION 64 PWR & GND
TURION 64 PWR & GND
TURION 64 PWR & GND
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
74 3 Tuesday, January 22, 2008
74 3 Tuesday, January 22, 2008
74 3 Tuesday, January 22, 2008
of
of
1
of
3C
3C
3C
5
+1.8VSUS
201
M_A_A[0..15] 5,9
R80 *4.7K_4 R80 *4.7K_4
+3V
R74 *4.7K_4 R74 *4.7K_4
D D
SA0_A
SA1_A
1 2
1 2
R72 0_4 R72 0_4
SA_A : '0' ,'0'
M_A_BS#0 5,9
M_A_BS#1 5,9
M_A_BS#2 5,9
M_A_DM[0..7] 5
C C
B B
A A
+3V
+1.8VSUS
M_A_DQS[0..7] 5
M_A_DQS#[0..7] 5
M_CLKOUT0 5
M_CLKOUT0# 5
M_CLKOUT1 5
M_CLKOUT1# 5
M_CKE0 5,9
M_CKE1 5,9
M_A_RAS# 5,9
M_A_CAS# 5,9
M_A_WE# 5,9
M_A_CS#0 5,9
M_A_CS#1 5,9
M_ODT0 5,9
M_ODT1 5,9
C250 0.1u/10V_4 C250 0.1u/10V_4
C246
C246
2.2u/10V_8
2.2u/10V_8
M_CLKOUT0
C231
C231
1.5p/50V_4
1.5p/50V_4
M_CLKOUT0#
M_CLKOUT1
C449
C449
1.5p/50V_4
1.5p/50V_4
M_CLKOUT1#
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
0_4
0_4
M_A_A7
M_A_A8
M_A_A9
R85
R85
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_CLKOUT0
M_CLKOUT0#
M_CLKOUT1
M_CLKOUT1#
SA0_A
SA1_A
DDRDAT_SMB DDRCLK_SMB
DDRCLK_SMB
C83 0.1u/10V_4 C83 0.1u/10V_4
MVREF_DIM
C247
C247
0.1u/10V_4
0.1u/10V_4
1 2
202
102
A0
101
A1
100
A2
99
A3
98
GND PAD0
GND PAD1
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10
90
A11
89
A12
116
A13
86
A14
84
A15
107
BA0
106
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
129
DQS4
146
DQS5
167
DQS6
186
DQS7
30
CK0
32
CK0
164
CK1
166
CK1
79
CKE0
80
CKE1
108
RAS
113
CAS
109
WE
110
S0
115
S1
114
ODT0
119
ODT1
198
SA0
200
SA1
195
SDA
197
SCL
199
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
103
111
104
112
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
REVERSE
VDD7
VDD8
VDD9
SPD Address:0xA0
SO-DIMM
SO-DIMM
(H=5.6)
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
59
122
121
RAMP:(1/15) Change CN23 footprint from DDR-C-292564-200P to DDR-C-292564-200P-BD3A (SMT open issue)
RAMP:(1/15) Change CN24 footprint from DDR-C-1734071-200P to DDR-C-1734071-200P-BD3A (SMT open issue)
5
117
VDD10
VSS31
127
118
VDD11
NC/TEST
VSS33
VSS32
132
128
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
4
CN24
CN24
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
50
NC1
69
NC2
83
NC3
120
NC4
163
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
DDRII_SODIMM_R
DDRII_SODIMM_R
4
3
A:(8/20) Follow AMD schematic, change DIMM2 SPD Address from 0xA4 to 0xA2
M_A_DQ1
M_A_DQ5
M_A_DQ2
M_A_DQ3
M_A_DQ0
M_A_DQ4
M_A_DQ7
M_A_DQ6
M_A_DQ12
M_A_DQ8
M_A_DQ10
M_A_DQ14
M_A_DQ13
M_A_DQ9
M_A_DQ15
M_A_DQ11
M_A_DQ21
M_A_DQ17
M_A_DQ23
M_A_DQ18
M_A_DQ20
M_A_DQ19
M_A_DQ22
M_A_DQ16
M_A_DQ29
M_A_DQ28
M_A_DQ31
M_A_DQ26
M_A_DQ25
M_A_DQ24
M_A_DQ27
M_A_DQ30
M_A_DQ32
M_A_DQ36
M_A_DQ37
M_A_DQ35
M_A_DQ33
M_A_DQ38
M_A_DQ34
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ46
M_A_DQ44
M_A_DQ45
M_A_DQ43
M_A_DQ47
M_A_DQ55
M_A_DQ54
M_A_DQ50
M_A_DQ51
M_A_DQ53
M_A_DQ48
M_A_DQ49
M_A_DQ52
M_A_DQ56
M_A_DQ60
M_A_DQ59
M_A_DQ58
M_A_DQ57
M_A_DQ61
M_A_DQ63
M_A_DQ62
T58T58
T137T137
T130T130
+SMDDR_VREF
Stuff No Stuff
M_A_DQ[0..63] 5
+3V
SA_B : '0','1'
M_A_CS#2 5,9
M_A_CS#3 5,9
+1.8VSUS
+1.8VSUS
R215
R215
0_6
0_6
MVREF_DIM
C257
C257
1u/6.3V_4
1u/6.3V_4
1.This part should not contain any substances which are specified in SS-00259-1
2.Purchase ink, paint, wire rods and molding resins only from the business partners that Sony approves as Green Partners.
M_B_A[0..15] 5,9
R79 4.7K_4 R79 4.7K_4
R73 *4.7K_4 R73 *4.7K_4
M_B_DM[0..7] 5
M_B_DQS[0..7] 5
M_B_DQS#[0..7] 5
M_CLKOUT3 5
M_CLKOUT3# 5
M_CLKOUT4 5
M_CLKOUT4# 5
+3V
C260 0.1u/10V_4 C260 0.1u/10V_4
2.2u/10V_8
2.2u/10V_8
R207
R207
*1K/F_4
*1K/F_4
R206
R206
No Stuff
*1K/F_4
*1K/F_4
M_B_A0
M_B_A1
M_B_A2
M_CLKOUT3
M_CLKOUT3#
M_CLKOUT4
M_CLKOUT4#
SA0_B
SA1_B
DDRDAT_SMB
C72 0.1u/10V_4 C72 0.1u/10V_4
MVREF_DIM
C259
C259
0.1u/10V_4
0.1u/10V_4
M_CLKOUT3
C230
C230
1.5p/50V_4
1.5p/50V_4
M_CLKOUT3#
M_CLKOUT4
C448
C448
1.5p/50V_4
1.5p/50V_4
M_CLKOUT4#
3
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
SA0_B
SA1_B
1 2
1 2
R71 0_4 R71 0_4
R83 *0_4 R83 *0_4
M_B_BS#0 5,9
M_B_BS#1 5,9
M_B_BS#2 5,9
M_CKE2 5,9
M_CKE3 5,9
M_B_RAS# 5,9
M_B_CAS# 5,9
M_B_WE# 5,9
M_B_CS#0 5,9
M_B_CS#1 5,9
M_ODT2 5,9
M_ODT3 5,9
C251
C251
1 2
201
202
102
A0
101
A1
100
A2
99
A3
98
GND PAD0
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10
90
A11
89
A12
116
A13
86
A14
84
A15
107
BA0
106
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
129
DQS4
146
DQS5
167
DQS6
186
DQS7
30
CK0
32
CK0
164
CK1
166
CK1
79
CKE0
80
CKE1
108
RAS
113
CAS
109
WE
110
S0
115
S1
114
ODT0
119
ODT1
198
SA0
200
SA1
195
SDA
197
SCL
199
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
+1.8VSUS
117
103
111
104
112
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
GND PAD1
VDD7
VDD8
VDD9
REVERSE
SPD Address:0xA2
SO-DIMM
SO-DIMM
(H=10.1)
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
59
127
122
121
118
CN23
CN23
DQ0
DQ1
DQ2
VDD10
VDD11
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
NC1
NC2
NC3
NC4
NC/TEST
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
DDRII_SODIMM_R
DDRII_SODIMM_R
132
128
2
1
8
M_B_DQ4
5
M_B_DQ1
7
M_B_DQ2
17
M_B_DQ3
19
M_B_DQ5
4
M_B_DQ0
6
M_B_DQ6
14
M_B_DQ7
16
M_B_DQ8
23
M_B_DQ9
25
M_B_DQ10
35
M_B_DQ15
37
M_B_DQ12
20
M_B_DQ13
22
M_B_DQ14
36
M_B_DQ11
38
M_B_DQ16
43
M_B_DQ21
45
M_B_DQ19
55
M_B_DQ23
57
M_B_DQ20
44
M_B_DQ17
46
M_B_DQ18
56
M_B_DQ22
58
M_B_DQ29
61
M_B_DQ28
63
M_B_DQ26
73
M_B_DQ27
75
M_B_DQ24
62
M_B_DQ25
64
M_B_DQ30
74
M_B_DQ31
76
M_B_DQ32
123
M_B_DQ36
125
M_B_DQ39
135
M_B_DQ35
137
M_B_DQ33
124
M_B_DQ37
126
M_B_DQ34
134
M_B_DQ38
136
M_B_DQ40
141
M_B_DQ41
143
M_B_DQ46
151
M_B_DQ43
153
M_B_DQ44
140
M_B_DQ45
142
M_B_DQ47
152
M_B_DQ42
154
M_B_DQ53
157
M_B_DQ49
159
M_B_DQ55
173
M_B_DQ54
175
M_B_DQ48
158
M_B_DQ52
160
M_B_DQ50
174
M_B_DQ51
176
M_B_DQ60
179
M_B_DQ57
181
M_B_DQ62
189
M_B_DQ59
191
M_B_DQ61
180
M_B_DQ56
182
M_B_DQ63
192
M_B_DQ58
194
50
T59T59
69
T57T57
83
120
163
T29T29
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
2
M_B_DQ[0..63] 5
+1.8VSUS
*10u/10V_8 C216 *10u/10V_8 C216
*10u_8 C167 *10u_8 C167
10u/10V_8 C102 10u/10V_8 C102
10u/10V_8 C222 10u/10V_8 C222
0.1u/10V_4 C465 0.1u/10V_4 C465
0.1u/10V_4 C161 0.1u/10V_4 C161
0.1u/10V_4 C199 0.1u/10V_4 C199
0.1u/10V_4 C223 0.1u/10V_4 C223
0.1u/10V_4 C486 0.1u/10V_4 C486
0.1u/10V_4 C460 0.1u/10V_4 C460
0.1u/10V_4 C464 0.1u/10V_4 C464
0.1u/10V_4 C472 0.1u/10V_4 C472
0.1u/10V_4 C468 0.1u/10V_4 C468
0.1u/10V_4 C162 0.1u/10V_4 C162
0.1u/10V_4 C463 0.1u/10V_4 C463
0.1u/10V_4 C213 0.1u/10V_4 C213
0.1u/10V_4 C485 0.1u/10V_4 C485
0.1u/10V_4 C224 0.1u/10V_4 C224
0.1u/10V_4 C466 0.1u/10V_4 C466
0.1u/10V_4 C198 0.1u/10V_4 C198
0.1u/10V_4 C180 0.1u/10V_4 C180
0.1u/10V_4 C181 0.1u/10V_4 C181
0.1u/10V_4 C212 0.1u/10V_4 C212
0.1u/10V_4 C461 0.1u/10V_4 C461
+1.8VSUS
*0.1u/10V_4 C489 *0.1u/10V_4 C489
*0.1u/10V_4 C248 *0.1u/10V_4 C248
*0.1u/10V_4 C462 *0.1u/10V_4 C462
M_B_CS#2 5,9
M_B_CS#3 5,9
*0.1u/10V_4 C261 *0.1u/10V_4 C261
For EMI
+3V
A:(8/27)Add MOS for I2C
SDATA0 3,15,25
SCLK0 3,15,25
A:(8/29) follow EMI suggestion, reserve RC termination
RAMP:(1/15) Remove R84,R75,C78,C89 footprint
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Q21
Q21
2
RHU002N06
RHU002N06
3
R44 *0_4 R44 *0_4
+3V
Q20
Q20
2
RHU002N06
RHU002N06
3
R70 *0_4 R70 *0_4
DDRII SODIMM X 2
DDRII SODIMM X 2
DDRII SODIMM X 2
R67
R67
10K_4
10K_4
1
1
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
R66
R66
10K_4
10K_4
DDRDAT_SMB
DDRCLK_SMB
1
3C
3C
3C
of
84 3 Tuesday, January 22, 2008
84 3 Tuesday, January 22, 2008
84 3 Tuesday, January 22, 2008
5
4
3
2
1
9
+SMDDR_VTERM
D D
+SMDDR_VTERM
*10u/10V_8 C63 *10u/10V_8 C63
*10u/10V_8 C59 *10u/10V_8 C59
0.1u/10V_4 C126 0.1u/10V_4 C126
0.1u/10V_4 C499 0.1u/10V_4 C499
0.1u/10V_4 C225 0.1u/10V_4 C225
C C
0.1u/10V_4 C527 0.1u/10V_4 C527
0.1u/10V_4 C97 0.1u/10V_4 C97
0.1u/10V_4 C237 0.1u/10V_4 C237
0.1u/10V_4 C132 0.1u/10V_4 C132
0.1u/10V_4 C100 0.1u/10V_4 C100
0.1u/10V_4 C92 0.1u/10V_4 C92
*0.1u/10V_4 C117 *0.1u/10V_4 C117
*0.1u/10V_4 C229 *0.1u/10V_4 C229
0.1u/10V_4 C115 0.1u/10V_4 C115
0.1u/10V_4 C118 0.1u/10V_4 C118
0.1u/10V_4 C99 0.1u/10V_4 C99
0.1u/10V_4 C495 0.1u/10V_4 C495
0.1u/10V_4 C137 0.1u/10V_4 C137
*0.1u/10V_4 C507 *0.1u/10V_4 C507
0.1u/10V_4 C138 0.1u/10V_4 C138
0.1u/10V_4 C139 0.1u/10V_4 C139
0.1u/10V_4 C493 0.1u/10V_4 C493
*0.1u/10V_4 C236 *0.1u/10V_4 C236
0.1u/10V_4 C243 0.1u/10V_4 C243
0.1u/10V_4 C515 0.1u/10V_4 C515
0.1u/10V_4 C96 0.1u/10V_4 C96
*0.1u/10V_4 C103 *0.1u/10V_4 C103
0.1u/10V_4 C490 0.1u/10V_4 C490
+1.8VSUS
+SMDDR_VTERM
0.1u/10V_4 C195 0.1u/10V_4 C195
0.1u/10V_4 C175 0.1u/10V_4 C175
0.1u/10V_4 C201 0.1u/10V_4 C201
0.1u/10V_4 C169 0.1u/10V_4 C169
0.1u/10V_4 C197 0.1u/10V_4 C197
0.1u/10V_4 C170 0.1u/10V_4 C170
0.1u/10V_4 C200 0.1u/10V_4 C200
0.1u/10V_4 C165 0.1u/10V_4 C165
0.1u/10V_4 C183 0.1u/10V_4 C183
0.1u/10V_4 C184 0.1u/10V_4 C184
0.1u/10V_4 C174 0.1u/10V_4 C174
0.1u/10V_4 C158 0.1u/10V_4 C158
0.1u/10V_4 C159 0.1u/10V_4 C159
0.1u/10V_4 C164 0.1u/10V_4 C164
0.1u/10V_4 C194 0.1u/10V_4 C194
0.1u/10V_4 C196 0.1u/10V_4 C196
M_CKE0 5,8
M_CKE1 5,8
M_CKE2 5,8
M_CKE3 5,8
M_ODT0 5,8
M_ODT1 5,8
M_ODT2 5,8
M_ODT3 5,8
M_A_BS#0 5,8
M_A_BS#1 5,8
M_A_BS#2 5,8
M_A_WE# 5,8
M_A_CAS# 5,8
M_A_RAS# 5,8
M_B_BS#0 5,8
M_B_BS#1 5,8
M_B_BS#2 5,8
M_B_WE# 5,8
M_B_CAS# 5,8
M_B_RAS# 5,8
M_A_CS#0 5,8
M_A_CS#1 5,8
M_A_CS#2 5,8
M_A_CS#3 5,8
M_B_CS#0 5,8
M_B_CS#1 5,8
M_B_CS#2 5,8
M_B_CS#3 5,8
M_A_A[0..15] 5,8
M_A_A13
M_A_A10
M_A_A0
M_A_A2
M_A_A4
M_A_A6
M_A_A7
M_A_A11
M_A_A12
M_A_A9
M_A_A3
M_A_A1
M_A_A8
M_A_A5
M_A_A14
M_A_A15
A:(8/27) Please put the CAP between +1.8VSUS & +SMDDR_VTERM
B B
M_B_A[0..15] 5,8
M_B_A0
M_B_A2
M_B_A4
M_B_A6
M_B_A7
M_B_A11
M_B_A3
M_B_A1
M_B_A8
M_B_A5
M_B_A12
M_B_A9
M_B_A10
M_B_A13
M_B_A14
M_B_A15
R167 47_4 R167 47_4
R164 47_4 R164 47_4
R170 47_4 R170 47_4
R155 47_4 R155 47_4
R120 47_4 R120 47_4
R115 47_4 R115 47_4
R112 47_4 R112 47_4
R119 47_4 R119 47_4
R130 47_4 R130 47_4
R137 47_4 R137 47_4
R159 47_4 R159 47_4
R133 47_4 R133 47_4
R121 47_4 R121 47_4
R132 47_4 R132 47_4
R140 47_4 R140 47_4
R127 47_4 R127 47_4
R161 47_4 R161 47_4
R124 47_4 R124 47_4
R129 47_4 R129 47_4
R123 47_4 R123 47_4
R128 47_4 R128 47_4
R126 47_4 R126 47_4
R163 47_4 R163 47_4
R114 47_4 R114 47_4
R118 47_4 R118 47_4
R113 47_4 R113 47_4
R166 47_4 R166 47_4
R101 47_4 R101 47_4
R125 47_4 R125 47_4
R139 47_4 R139 47_4
RP13 0404-47X2 RP13 0404-47X2
1 2
3 4
RP17 0404-47X2 RP17 0404-47X2
1 2
3 4
RP21 0404-47X2 RP21 0404-47X2
1 2
3 4
RP22 0404-47X2 RP22 0404-47X2
1 2
3 4
RP14 0404-47X2 RP14 0404-47X2
1 2
3 4
RP18 0404-47X2 RP18 0404-47X2
1 2
3 4
RP24 0404-47X2 RP24 0404-47X2
1 2
3 4
RP11 0404-47X2 RP11 0404-47X2
1 2
3 4
RP12 0404-47X2 RP12 0404-47X2
1 2
3 4
RP16 0404-47X2 RP16 0404-47X2
1 2
3 4
RP15 0404-47X2 RP15 0404-47X2
1 2
3 4
RP19 0404-47X2 RP19 0404-47X2
1 2
3 4
RP23 0404-47X2 RP23 0404-47X2
1 2
3 4
R134 47_4 R134 47_4
R106 47_4 R106 47_4
RP20 0404-47X2 RP20 0404-47X2
1 2
3 4
A A
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRII TERMINATION
DDRII TERMINATION
DDRII TERMINATION
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
94 3 Tuesday, January 22, 2008
94 3 Tuesday, January 22, 2008
94 3 Tuesday, January 22, 2008
of
of
1
of
3C
3C
3C
5
4
3
2
1
10
D D
U24A
U24A
HT_CADOUT15_P 4
HT_CADOUT15_N 4
HT_CADOUT14_P 4
HT_CADOUT14_N 4
HT_CADOUT13_P 4
HT_CADOUT13_N 4
HT_CADOUT12_P 4
HT_CADOUT12_N 4
HT_CADOUT11_P 4
HT_CADOUT11_N 4
HT_CADOUT10_P 4
HT_CADOUT10_N 4
HT_CADOUT9_P 4
HT_CADOUT9_N 4
HT_CADOUT8_P 4
HT_CADOUT8_N 4
C C
VDDHT_PKG
B B
HT_CADOUT7_P 4
HT_CADOUT7_N 4
HT_CADOUT6_P 4
HT_CADOUT6_N 4
HT_CADOUT5_P 4
HT_CADOUT5_N 4
HT_CADOUT4_P 4
HT_CADOUT4_N 4
HT_CADOUT3_P 4
HT_CADOUT3_N 4
HT_CADOUT2_P 4
HT_CADOUT2_N 4
HT_CADOUT1_P 4
HT_CADOUT1_N 4
HT_CADOUT0_P 4
HT_CADOUT0_N 4
HT_CLKOUT1_P 4
HT_CLKOUT1_N 4
HT_CLKOUT0_P 4
HT_CLKOUT0_N 4
HT_CTLOUT0_P 4
HT_CTLOUT0_N 4
R452 49.9_4 R452 49.9_4
HT_RXCALN HT_TXCALN
R19
R18
R21
R22
U22
U21
U18
U19
W19
W20
AC21
AB22
AB20
AA20
AA19
Y19
T24
R25
U25
U24
V23
U23
V24
V25
AA25
AA24
AB23
AA23
AB24
AB25
AC24
AC25
W21
W22
Y24
W25
P24
P25
A24
C24
HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCTLP
HT_RXCTLN
HT_RXCALP
HT_RXCALN
RS690M
RS690M
PART 1 OF 5
PART 1 OF 5
HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCTLP
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCTLN
HT_TXCALP
HT_TXCALN
P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22
N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25
L21
L22
J24
J25
N23
P23
C25
D24
HT_CADIN15_P 4
HT_CADIN15_N 4
HT_CADIN14_P 4
HT_CADIN14_N 4
HT_CADIN13_P 4
HT_CADIN13_N 4
HT_CADIN12_P 4
HT_CADIN12_N 4
HT_CADIN11_P 4
HT_CADIN11_N 4
HT_CADIN10_P 4
HT_CADIN10_N 4
HT_CADIN9_P 4
HT_CADIN9_N 4
HT_CADIN8_P 4
HT_CADIN8_N 4
HT_CADIN7_P 4
HT_CADIN7_N 4
HT_CADIN6_P 4
HT_CADIN6_N 4
HT_CADIN5_P 4
HT_CADIN5_N 4
HT_CADIN4_P 4
HT_CADIN4_N 4
HT_CADIN3_P 4
HT_CADIN3_N 4
HT_CADIN2_P 4
HT_CADIN2_N 4
HT_CADIN1_P 4
HT_CADIN1_N 4
HT_CADIN0_P 4
HT_CADIN0_N 4
HT_CLKIN1_P 4
HT_CLKIN1_N 4
HT_CLKIN0_P 4
HT_CLKIN0_N 4
HT_CTLIN0_P 4
R451 100_4 R451 100_4 R454 49.9_4 R454 49.9_4
HT_CTLIN0_N 4
HT_TXCALP HT_RXCALP
A A
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS690M HT LINK I/F
RS690M HT LINK I/F
RS690M HT LINK I/F
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
10 43 Tuesday, January 22, 2008
10 43 Tuesday, January 22, 2008
10 43 Tuesday, January 22, 2008
of
of
1
of
3C
3C
3C
5
4
3
2
1
11
BTO
D D
A:(8/28) change all caps from X5R to X7R in this page
Follow AMD check list
Place these caps close to connector
Swap net (0604)
U24B
U24B
PEG_RXP15
PEG_RXN15
PEG_RXP14
PEG_RXN14
PEG_RXP13
PEG_RXN13
PEG_RXP12
PEG_RXN12
PEG_RXP11
PEG_RXN[15:0] 21
PEG_RXP[15:0] 21
C C
A:(8/24) Swap net for layout routing
B B
PEG_RXN[15:0] PEG_TXN[15:0]
GPP_RX1P_WLAN 25
GPP_RX1N_WLAN 25
GPP_RX2P_MINICARD 25
GPP_RX2N_MINICARD 25
GPP_RX0P_LAN 24
GPP_RX0N_LAN 24
GPP_RX3P_NEWCARD 25
GPP_RX3N_NEWCARD 25
A_RX0P 14
A_RX0N 14
A_RX1P 14
A_RX1N 14
A_RX2P 14
A_RX2N 14
A_RX3P 14
A_RX3N 14
PEG_RXN11
PEG_RXP10
PEG_RXN10
PEG_RXP9
PEG_RXN9
PEG_RXP8
PEG_RXN8
PEG_RXP7
PEG_RXN7
PEG_RXP6
PEG_RXN6
PEG_RXP5
PEG_RXN5
PEG_RXP4
PEG_RXN4
PEG_RXP3
PEG_RXN3
PEG_RXP2
PEG_RXN2
PEG_RXP1
PEG_RXN1
PEG_RXP0
PEG_RXN0
R88 *10K/F_4 R88 *10K/F_4
R89 *8.25K/F_4 R89 *8.25K/F_4
G5
GFX_RX0P
G4
GFX_RX0N
J8
GFX_RX1P
J7
GFX_RX1N
J4
GFX_RX2P
J5
GFX_RX2N
L8
GFX_RX3P
L7
GFX_RX3N
L4
GFX_RX4P
L5
GFX_RX4N
M8
GFX_RX5P
M7
GFX_RX5N
M4
GFX_RX6P
M5
GFX_RX6N
P8
GFX_RX7P
P7
GFX_RX7N
P4
GFX_RX8P
P5
GFX_RX8N
R4
GFX_RX9P
R5
GFX_RX9N
R7
GFX_RX10P
R8
GFX_RX10N
U4
GFX_RX11P
U5
GFX_RX11N
W4
GFX_RX12P
W5
GFX_RX12N
Y4
GFX_RX13P
Y5
GFX_RX13N
V9
GFX_RX14P
W9
GFX_RX14N
AB7
GFX_RX15P
AB6
GFX_RX15N
AD16
GPP_RX0P
AE16
GPP_RX0N
AD20
GPP_RX1P
AE20
GPP_RX1N
Y7
GPP_RX2P
AA7
GPP_RX2N
AB9
GPP_RX3P
AA9
GPP_RX3N
W14
SB_RX0P
W15
SB_RX0N
AB12
SB_RX1P
AA12
SB_RX1N
W11
SB_RX2P
W12
SB_RX2N
AA11
SB_RX3P
AB11
SB_RX3N
AA14
PCE_ISET(PCE_CALI)
AB14
PCE_TXISET(NC)
RS690M
RS690M
PART 2 OF 5
PART 2 OF 5
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_PCAL(PCE_CALRP)
PCE_NCAL(PCE_CALRN)
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
J1
H2
K2
K1
K3
L3
L1
L2
N2
N1
P2
P1
P3
R3
R1
R2
T2
U1
V2
V1
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4
AD14
AD15
AD19
AE19
AD4
AE5
AD5
AD6
AE9
AD10
AC8
AD9
AD8
AE8
AD7
AE7
AD11
AE11
C_PEG_TXP15
C_PEG_TXN15
C_PEG_TXP14
C_PEG_TXN14
C_PEG_TXP13
C_PEG_TXN13
C_PEG_TXP12
C_PEG_TXN12
C_PEG_TXP11
C_PEG_TXN11
C_PEG_TXP10
C_PEG_TXN10
C_PEG_TXP9
C_PEG_TXN9
C_PEG_TXP8
C_PEG_TXN8
C_PEG_TXP7
C_PEG_TXN7
C_PEG_TXP6
C_PEG_TXN6
C_PEG_TXP5
C_PEG_TXN5
C_PEG_TXP4
C_PEG_TXN4
C_PEG_TXP3
C_PEG_TXN3
C_PEG_TXP2
C_PEG_TXN2
C_PEG_TXP1
C_PEG_TXN1
C_PEG_TXP0
C_PEG_TXN0
GPP_TX0P_C
GPP_TX0N_C
GPP_TX1P_C
GPP_TX1N_C
GPP_TX2P_C
GPP_TX2N_C
GPP_TX3P_C
GPP_TX3N_C
A_TX0P_C
A_TX0N_C
A_TX1P_C
A_TX1N_C
A_TX2P_C
A_TX2N_C
A_TX3P_C
A_TX3N_C
A_CALRP
A_CALRN
Swap net (0604)
C545 EV@0.1u/10V_4 C545 EV@0.1u/10V_4
C544 EV@0.1u/10V_4 C544 EV@0.1u/10V_4
C513 EV@0.1u/10V_4 C513 EV@0.1u/10V_4
C512 EV@0.1u/10V_4 C512 EV@0.1u/10V_4
C543 EV@0.1u/10V_4 C543 EV@0.1u/10V_4
C542 EV@0.1u/10V_4 C542 EV@0.1u/10V_4
C510 EV@0.1u/10V_4 C510 EV@0.1u/10V_4
C509 EV@0.1u/10V_4 C509 EV@0.1u/10V_4
C537 EV@0.1u/10V_4 C537 EV@0.1u/10V_4
C536 EV@0.1u/10V_4 C536 EV@0.1u/10V_4
C518 EV@0.1u/10V_4 C518 EV@0.1u/10V_4
C517 EV@0.1u/10V_4 C517 EV@0.1u/10V_4
C539 EV@0.1u/10V_4 C539 EV@0.1u/10V_4
C538 EV@0.1u/10V_4 C538 EV@0.1u/10V_4
C520 EV@0.1u/10V_4 C520 EV@0.1u/10V_4
C519 EV@0.1u/10V_4 C519 EV@0.1u/10V_4
C541 EV@0.1u/10V_4 C541 EV@0.1u/10V_4
C540 EV@0.1u/10V_4 C540 EV@0.1u/10V_4
C522 EV@0.1u/10V_4 C522 EV@0.1u/10V_4
C521 EV@0.1u/10V_4 C521 EV@0.1u/10V_4
C535 EV@0.1u/10V_4 C535 EV@0.1u/10V_4
C534 EV@0.1u/10V_4 C534 EV@0.1u/10V_4
C529 EV@0.1u/10V_4 C529 EV@0.1u/10V_4
C528 EV@0.1u/10V_4 C528 EV@0.1u/10V_4
C531 EV@0.1u/10V_4 C531 EV@0.1u/10V_4
C526 EV@0.1u/10V_4 C526 EV@0.1u/10V_4
C532 EV@0.1u/10V_4 C532 EV@0.1u/10V_4
C530 EV@0.1u/10V_4 C530 EV@0.1u/10V_4
C547 EV@0.1u/10V_4 C547 EV@0.1u/10V_4
C533 EV@0.1u/10V_4 C533 EV@0.1u/10V_4
C549 EV@0.1u/10V_4 C549 EV@0.1u/10V_4
C546 EV@0.1u/10V_4 C546 EV@0.1u/10V_4
C48 0.1u/10V_4 C48 0.1u/10V_4
C45 0.1u/10V_4 C45 0.1u/10V_4
C459 IV@0.1u/10V_4 C459 IV@0.1u/10V_4
C454 IV@0.1u/10V_4 C454 IV@0.1u/10V_4
C665 0.1u/10V_4 C665 0.1u/10V_4
C662 0.1u/10V_4 C662 0.1u/10V_4
C663 NEW@0.1u/10V_4 C663 NEW@0.1u/10V_4
C660 NEW@0.1u/10V_4 C660 NEW@0.1u/10V_4
C453 0.1u/10V_4 C453 0.1u/10V_4
C452 0.1u/10V_4 C452 0.1u/10V_4
C458 0.1u/10V_4 C458 0.1u/10V_4
C457 0.1u/10V_4 C457 0.1u/10V_4
C451 0.1u/10V_4 C451 0.1u/10V_4
C450 0.1u/10V_4 C450 0.1u/10V_4
C456 0.1u/10V_4 C456 0.1u/10V_4
C455 0.1u/10V_4 C455 0.1u/10V_4
R447 562_4 R447 562_4
R448 2K_4 R448 2K_4
PEG_TXP15
PEG_TXN15
PEG_TXP14
PEG_TXN14
PEG_TXP13
PEG_TXN13
PEG_TXP12
PEG_TXN12
PEG_TXP11
PEG_TXN11
PEG_TXP10
PEG_TXN10
PEG_TXP9
PEG_TXN9
PEG_TXP8
PEG_TXN8
PEG_TXP7
PEG_TXN7
PEG_TXP6
PEG_TXN6
PEG_TXP5
PEG_TXN5
PEG_TXP4
PEG_TXN4
PEG_TXP3
PEG_TXN3
PEG_TXP2
PEG_TXN2
PEG_TXP1
PEG_TXN1
PEG_TXP0
PEG_TXN0
VDDA12_PKG2
C_PEG_TXP15
C_PEG_TXN15
C_PEG_TXP14
C_PEG_TXN14
C_PEG_TXP13
C_PEG_TXN13
C_PEG_TXP12
C_PEG_TXN12
PEG_TXP[15:0] PEG_RXP[15:0]
GPP_TX1P_WLAN 25
GPP_TX1N_WLAN 25
GPP_TX2P_MINICARD 25
GPP_TX2N_MINICARD 25
GPP_TX0P_LAN 24
GPP_TX0N_LAN 24
GPP_TX3P_NEWCARD 25
GPP_TX3N_NEWCARD 25
A_TX0P 14
A_TX0N 14
A_TX1P 14
A_TX1N 14
A_TX2P 14
A_TX2N 14
A_TX3P 14
A_TX3N 14
C241 IV@0.1u/10V_4 C241 IV@0.1u/10V_4
C242 IV@0.1u/10V_4 C242 IV@0.1u/10V_4
C234 IV@0.1u/10V_4 C234 IV@0.1u/10V_4
C235 IV@0.1u/10V_4 C235 IV@0.1u/10V_4
C239 IV@0.1u/10V_4 C239 IV@0.1u/10V_4
C240 IV@0.1u/10V_4 C240 IV@0.1u/10V_4
C232 IV@0.1u/10V_4 C232 IV@0.1u/10V_4
C233 IV@0.1u/10V_4 C233 IV@0.1u/10V_4
PEG_TXN[15:0] 21
PEG_TXP[15:0] 21
RAMP:(1/15) Add "IV@" for C454,C459
IV_HDMITX2P 19
IV_HDMITX2N 19
IV_HDMITX1P 19
IV_HDMITX1N 19
IV_HDMITX0P 19
IV_HDMITX0N 19
IV_HDMICLK+ 19
IV_HDMICLK- 19
To HDMI CONN
Close to North Bridge
A A
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS690M PCIE LINK I/F
RS690M PCIE LINK I/F
RS690M PCIE LINK I/F
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
11 43 Tuesday, January 22, 2008
11 43 Tuesday, January 22, 2008
11 43 Tuesday, January 22, 2008
of
of
1
of
3C
3C
3C
5
+1.8V
L17
L17
BK1608HS600_6
BK1608HS600_6
+1.8V
D D
L54
L54
BK1608HS600_6
BK1608HS600_6
+1.8V AVDDQ
L53
L53
BK1608HS600_6
BK1608HS600_6
+3V AVDD_NB
L19
L19
BK1608HS600_6
BK1608HS600_6
C C
LDT_STOP# 6,14
A:(9/7)Change LDTSTOP# level shift PU resister(R5322) from 10K to 2.2K
+3V
B B
HTPVDD
*10u/10V_8
*10u/10V_8
C173
C173
PLLVDD
*10u/10V_8
*10u/10V_8
C483
C483
*10u/10V_8
*10u/10V_8
C481
C481
C207
C207
2.2u/6.3V_6
2.2u/6.3V_6
+1.8V
R102
R102
2.2K_4
2.2K_4
2
1 3
Q27
Q27
MMBT3904
MMBT3904
R141 10K_4 R141 10K_4
R117 *3K_4 R117 *3K_4
R136 *10K_4 R136 *10K_4
+3V
R111
R111
10K_4
10K_4
LDT_STOP#_NB
TV_SWITCH
LOAD_ROM#
STRP_DATA
C187
C187
2.2u/6.3V_6
2.2u/6.3V_6
C470
C470
2.2u/6.3V_6
2.2u/6.3V_6
C480
C480
2.2u/10V_8
2.2u/10V_8
1 2
C205
C205
*0.1u/10V_4
*0.1u/10V_4
+1.8V AVDDI
R456 0_6 R456 0_6
2.2u/10V_8
2.2u/10V_8
1 2
INT_TV_C/R 18
INT_TV_Y/G 18
BTO
INT_CRT_RED 18
INT_CRT_GRN 18
INT_CRT_BLU 18
BTO
A:(8/28) PLLVDD12 add 0.1u to GND
Base on AMD check list
PLLVDD12
C477
C477
2.2u/6.3V_6
2.2u/6.3V_6
A:(8/28) AMD check list Rev3.01 Item6-5:
Please let BMREQ# leave and not connect
Reserve a testpoint
LOAD_ROM# : LOAD ROM STRAP ENABLE
High, LOAD ROM STRAP DISABLE
Low, LOAD ROM STRAP ENABLE
DFT_GPIO0
High, MEMORY SIDE PORT DISABLE
Low, MEMORY SIDE PORT ENABLE
+NB_CORE_ON 35
NB_OSC
R122 68_4 R122 68_4
A:(8/29) follow EMI suggestion, reserve RC termination
A A
RAMP:(1/15) Stuff R122 to 68 ohm, C171 to 22pF
R135 0_4 R135 0_4
5
STRP_DATA
C171 22P_4 C171 22P_4
4
C482
C482
INT_TV_C/R
INT_TV_Y/G
A:(8/20) Add resister (Follow RGB Impendance control)
R149 IV@150_4 R149 IV@150_4
R150 IV@150_4 R150 IV@150_4
A:(8/27) Add serial 0ohm for HSYNC/VSYNC
INT_VSYNC 18
INT_HSYNC 18
R152 IV@150_4 R152 IV@150_4
R151 IV@150_4 R151 IV@150_4
R153 IV@150_4 R153 IV@150_4
NB_RST# 14
NB_PWRGD 29
ALLOW_LDTSTOP 14
HTREFCLK 3
NB_OSC 3
NBSRC_CLKP 3
NBSRC_CLKN 3
SBLINK_CLKP 3
SBLINK_CLKN 3
INT_LVDS_EDIDCLK 20
INT_LVDS_EDIDDATA 20
IV_HDMI_HPD 19
IV_HDMI_DDCDATA 19
A:(8/28)Based on AMD PA_RS4X0C2.pdf for avoiding unwanted LCD behavior during power-on
4
AVDD_NB
AVDDI
AVDDQ
C475
C475
*0.1u/10V_4
*0.1u/10V_4
R145 IV@0_4 R145 IV@0_4
R146 IV@0_4 R146 IV@0_4
BTO
INT_CRT_DDCCLK 18
INT_CRT_DDCDAT 18
PLLVDD
HTPVDD
R138 10K_4 R138 10K_4
L52
VDDA12
T41T41
T27T27
T21T21
L52
R107 *2.7K_4 R107 *2.7K_4
R110 *2.7K_4 R110 *2.7K_4
R116 *2.7K_4 R116 *2.7K_4
R147 *2.7K_4 R147 *2.7K_4
R455 *2.7K_4 R455 *2.7K_4
NB_THERMDA
NB_THERMDC
B:(10/16) Add IV@ value for Q26 (Remove Q26 in EV sku BOM)
INT_TV_C/R
INT_TV_Y/G
INT_TV_COMP
T39T39
INT_VSYNC_R
INT_HSYNC_R
LDT_STOP#_NB
TV_SWITCH
PLLVDD12
DFT_GPIO0
LOAD_ROM#
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
STRP_DATA
R103
R103
DAC_RSET
R154 715_6 R154 715_6
BK1608HS600_6
BK1608HS600_6
R156
R156
4.7K_4
4.7K_4
IV@39K_4
IV@39K_4
NB_PWRGD NB_PWRGD_+5V
U24C
U24C
B22
AVDD1
C22
AVDD2
G17
AVSSN1
H17
AVSSN2
A20
AVDDDI
B20
AVSSDI
A21
AVDDQ
A22
AVSSQ
C21
C
C20
Y
D19
COMP
E19
RED
F19
GREEN
G19
BLUE
C6
DACVSYNC
A5
DACHSYNC
B21
RSET
B6
DACSCL
A6
DACSDA
A10
PLLVDD18
B10
PLLVSS
B24
HTPVDD
B25
HTPVSS
C10
SYSRESET#
C11
POWERGOOD
C5
LDTSTOP#
B5
ALLOW_LDTSTOP
C23
HTTSTCLK
B23
HTREFCLK
C2
TVCLKIN
B11
OSCIN
A11
OSCOUT(PLLVDD12)
F2
GFX_CLKP
E1
GFX_CLKN
G1
SB_CLKP
G2
SB_CLKN
D6
DFT_GPIO0
D7
DFT_GPIO1
C8
DFT_GPIO2
C7
DFT_GPIO3
B8
DFT_GPIO4
A8
DFT_GPIO5
B2
BMREQ#
A2
I2C_CLK
B4
I2C_DATA
AA15
THERMALDIODE_P
AB15
THERMALDIODE_N
C14
TMDS_HPD
B3
DDC_DATA
C3
TESTMODE
A3
STRP_DATA
RS690M
RS690M
+3V
2
1
Q26 IV@FDV301N Q26 IV@FDV301N
3
BTO
PX_HDMI_DDC_EN 16
INT_LVDS_EDIDCLK 20
A:(8/16):EVA release footprint: SOT23-2_8-95-5P
B14
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN
LPVDD
LPVSS
LVDDR18D_1
LVDDR18D_2
LVDDR33_1
LVDDR33_2
LVSSR1
LVSSR3
LVSSR5
LVSSR6
LVSSR7
LVSSR8
LVSSR12
LVSSR13
LVDS_BLON
LVDS_BLEN
DEBUG_6
DEBUG_9
DEBUG_10
DEBUG_15
DEBUG_0
DEBUG_2
DEBUG_1
DEBUG_14
DEBUG_13
B15
B13
A13
H14
G14
D17
E17
A15
B16
C17
C18
B17
A17
A18
B18
E15
D15
H15
G15
D14
E14
A12
B12
C12
C13
A16
A14
D12
C19
C15
C16
F14
F15
E12
G12
F12
AE15
AC17
AD18
AE21
AD13
AC13
AE13
AE17
AD17
3
2
1
3
2
1
3
2
1
LVDDR18D
LVDDR33
INT_LVDS_DIGON_L
INT_LVDS_PWM_L
INT_LVDS_BLON_L
Q28
Q28
IV@FDV301N
IV@FDV301N
0.65v<Vt<1.5v
INT_LVDS_DIGON_L
Q29
Q29
IV@FDV301N
IV@FDV301N
0.65v<Vt<1.5v
INT_LVDS_PWM_L
Q30
Q30
IV@FDV301N
IV@FDV301N
0.65v<Vt<1.5v
INT_LVDS_BLON_L
3
3
CRT/TVOUT
CRT/TVOUT
+5V
R97
R97
IV@15K_4
IV@15K_4
PART 3 OF 5
PART 3 OF 5
PM
PM
PLL PWR
PLL PWR
CLOCKs
CLOCKs
DEBUG
DEBUG
MIS.
MIS.
C127
C127
*IV@.1U_4
*IV@.1U_4
LVDS
LVDS
LVDS_DIGON
2
R77 IV@0_4 R77 IV@0_4
R84 *IV@0_4 R84 *IV@0_4
INT_TXLOUT0+ 20
INT_TXLOUT0- 20
INT_TXLOUT1+ 20
INT_TXLOUT1- 20
INT_TXLOUT2+ 20
INT_TXLOUT2- 20
T37T37
T35T35
INT_TXUOUT0+ 20
INT_TXUOUT0- 20
INT_TXUOUT1+ 20
INT_TXUOUT1- 20
INT_TXUOUT2+ 20
INT_TXUOUT2- 20
T42T42
T44T44
INT_TXLCLKOUT+ 20
INT_TXLCLKOUT- 20
INT_TXUCLKOUT+ 20
INT_TXUCLKOUT- 20
C203
C203
0.1u/10V_4
0.1u/10V_4
C474
C474
0.1u/10V_4
0.1u/10V_4
T23T23
T17T17
T20T20
T18T18
T22T22
T24T24
T19T19
T16T16
T12T12
R144
R144
IV@2.2K_4
IV@2.2K_4
R142
R142
IV@2.2K_4
IV@2.2K_4
R143
R143
IV@2.2K_4
IV@2.2K_4
2
R76 IV@100K_4 R76 IV@100K_4
+3V
1
5
U12
U12
2 4
IV@NC7SZ126M5
IV@NC7SZ126M5
3
RAMP:(1/15) Reserve R84 (0 ohm) for HDMI buffer circuit
LPVDD
L23 BK1608HS600_6 L23 BK1608HS600_6
C210
C210
4.7u/6.3V_6
4.7u/6.3V_6
GND_LPVSS
L51 BK1608HS600_6 L51 BK1608HS600_6
C478
C478
4.7u/6.3V_6
4.7u/6.3V_6
R104 0_6 R104 0_6
R160 0_6 R160 0_6
INT_LVDS_DIGON 20
INT_LVDS_PWM 20
INT_LVDS_BLON 20
IV_HDMI_DDCCLK 19
A:(8/21) change net name from
HDMI_DDCCLK to IV_HDMI_DDCCLK
+1.8V
+3V
+1.8V
C202
C202
0.1u/10V_4
0.1u/10V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
Date: Sheet
L21
L21
BK1608HS600_6
BK1608HS600_6
C211
C211
4.7u/6.3V_6
4.7u/6.3V_6
GND_LVSSR
GND_LPVSS
RS690M PLL & VEDIO I/F
RS690M PLL & VEDIO I/F
RS690M PLL & VEDIO I/F
1
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
of
of
12 43 Tuesday, January 22, 2008
12 43 Tuesday, January 22, 2008
1
12 43 Tuesday, January 22, 2008
3C
3C
3C
5
4
3
2
1
13
AC2
Y11
AD1
AC5
AC6
AC7
AD3
AC9
AC10
Y15
AE6
V12
V11
V14
V15
M3
VSSA2
VSSA3
VSSA4
VSSA5F3VSSA6
D D
A:(8/22) change power name from VLDT_RNU to VLDT_RUN_NB
VSSA1
VSS1
A25
PAR 5 OF 5
PAR 5 OF 5
VSS2
F11
VSS3
D23
VSS4E9VSS5
Y23
G11
AE10
G3
VSSA7A1VSSA8H1VSSA9
VSSA10J2VSSA11H3VSSA13J6VSSA15F1VSSA16L6VSSA17M2VSSA18M6VSSA19J3VSSA20P6VSSA21T1VSSA22N3VSSA24R6VSSA25U2VSSA26T3VSSA27U3VSSA28U6VSSA30Y1VSSA32W6VSSA33
VSSA14
VSSA12
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
J22
J12
L12
L14
L20
G23
L23
P11
R24
M15
AE18
P9
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
N12
N14
M11
M20
M23
M25
AC4
VSSA34Y3VSSA35Y9VSSA36
VSSA31
VSSA23
VSS23
VSSA29
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS24
B7
L24
VSS31
P13
P20
P15
R12
R14
R20
VSSA37R9VSSA38
GROUND
GROUND
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
Y25
Y22
U20
H25
W23
W24
AD25
AC23
G6
Y12
Y14
AA3
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
VSS39
VSS40
VSS41
VSS42
VSS44
VSS45
VSS46C4VSS47
VSS48
VSS49
VSS50
VSS52
VSS54
VSS55
VSS53
VSS51
T25
A23
H23
R17
M17
AE14
AC15
D25
G24
VSS43
T23
R23
H12
AE22
AC14
AC22
U24E
U24E
RS690M
RS690M
VSS56
VSS57D4VSS59
VSS58
F17
M13
AC16
+1.2V
+1.2V
FBMJ3216HS800_1206
C C
B B
A A
FBMJ3216HS800_1206
A:(8/22) Remove one L (Through +1.2V to VDDA12)
VLDT_RUN_NB
L11
L11
C77
C82
C82
*10u/10V_8
A:(9/3) no stuff 10uF
+1.8V
+3V
+1.8V
A:(9/3) Mount C5455 and C5460 to meet AMD check list.
VDDA12
C90
C90
10u/10V_8
10u/10V_8
L24 FCM2012C-121_8 L24 FCM2012C-121_8
L15 FCM2012C-121_8 L15 FCM2012C-121_8
L12 0_8 L12 0_8
L13 FCM2012C-121_8 L13 FCM2012C-121_8
RS690: 220 Ohm / 500mA
A:(9/3) Change from 2.2uF to 4.7uF to meet AMD check list.
5
C77
1u/10V_6
1u/10V_6
C135
C135
1u/10V_6
1u/10V_6
1 2
C85
VDDR3
C79
C79
1u/10V_6
1u/10V_6
C85
*10u/10V_8
*10u/10V_8
C144
C144
2.2u/6.3V_6
2.2u/6.3V_6
VDDDVO
C152
C152
4.7u/6.3V_6
4.7u/6.3V_6
C86
C86
10u/10V_8
10u/10V_8
A:(9/3) no stuff 10uF
C76
C76
1u/10V_6
1u/10V_6
VDD18
1 2
C88
C88
1u/10V_6
1u/10V_6
VDDPLL
C111
C111
1u/10V_6
1u/10V_6
C208
C208
1u/10V_6
1u/10V_6
C131
C131
1u/10V_6
1u/10V_6
C153
C153
1u/10V_6
1u/10V_6
C94
C94
1u/10V_6
1u/10V_6
C91
C91
1u/10V_6
1u/10V_6
C95
C95
1u/10V_6
1u/10V_6
4
C75
C75
1u/10V_6
1u/10V_6 *10u/10V_8
VDDA12
C113
C113
1u/10V_6
1u/10V_6
C101
C101
1u/10V_6
1u/10V_6
VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2
VDDA12_PKG1
C128
C128
0.1u/16V_6
0.1u/16V_6
C93
C93
1u/10V_6
1u/10V_6
U24D
U24D
AE24
AD24
AD22
AB17
AE23
Y17
W17
AC18
AD21
AC19
AC20
AB19
AD23
AA17
AE25
AE2
AB3
AB4
AC3
AD2
AE1
E11
D11
AC12
AD12
AE12
D22
AC11
J14
J15
U7
W7
E7
F7
F9
G9
M1
VDD_HT1
VDD_HT2
VDD_HT3
VDD_HT4
VDD_HT5
VDD_HT6
VDD_HT7
VDD_HT8
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15
VDD18_1
VDD18_2
VDDA12_13
VDDA12_14
VDDA12_15
VDDA12_16
VDDA12_17
VDDA12_18
VDDA12_19
VDDA12_20
VDDR3_1
VDDR3_2
VDDR_1
VDDR_2
VDDR_3
VDDPLL_1
VDDPLL_2
VSSPLL_1
VSSPLL_2
VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2
RS690M
RS690M
PART 4 OF 5
PART 4 OF 5
VDDA12_10
VDDA12_11
VDDA12_12
POWER
POWER
VDDA12_1
VDDA12_2
VDDA12_3
VDDA12_4
VDDA12_5
VDDA12_6
VDDA12_7
VDDA12_8
VDDA12_9
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
D1
G7
E2
C1
E3
D2
M9
F4
B1
D3
L9
E6
L11
L13
L15
M12
R15
M14
N11
N13
N15
J11
H11
P12
P14
R11
R13
A19
B19
U11
U14
P17
L17
J19
D20
G20
A9
B9
C9
D9
A7
A4
U12
U15
IRT 0209
+3V +1.8V
D32
D32
2 1
1SS355_80V
1SS355_80V
D33
D33
2 1
1SS355_80V
1SS355_80V
3
D34
D34
2 1
1SS355_80V
1SS355_80V
VDDA12
C87
C87
1u/10V_6
1u/10V_6
C65
C65
10u/10V_8
10u/10V_8
C98
C98
1u/10V_6
1u/10V_6
C189
C189
10u/10V_8
10u/10V_8
C141
C141
1u/10V_6
1u/10V_6
2
C179
C179
1u/10V_6
1u/10V_6
C188
C188
1u/10V_6
1u/10V_6
C145
C145
1u/10V_6
1u/10V_6
L10
80 ohm(4A)
L10
FBMJ3216HS800_1206
FBMJ3216HS800_1206
0.8A
C73
C177
C177
10u/10V_8
10u/10V_8
C178
C178
10u/10V_8
10u/10V_8
A:(8/22) change power from +1.2V(fixed) to +NB_VCC (Switch power)
3A
C125
C125
C172
C172
1u/10V_6
1u/10V_6
1u/10V_6
1u/10V_6
C134
C134
C123
C123
1u/10V_6
1u/10V_6
1u/10V_6
1u/10V_6
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
C73
*100u/6.3V_3528
*100u/6.3V_3528
A:(8/22) no struff 100uf, only reserve it.
VDDC +NB_CORE
L9 GMLB-201209_8 L9 GMLB-201209_8
C142
C142
1u/10V_6
1u/10V_6
C62
C62
*100u/6.3V_3528
*100u/6.3V_3528
A:(8/22) no struff 100uf, only reserve it.
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
RS690M POWER
RS690M POWER
RS690M POWER
1
3C
3C
13 43 Tuesday, January 22, 2008
13 43 Tuesday, January 22, 2008
13 43 Tuesday, January 22, 2008
of
of
of
3C
5
R300 *8.2K_4 R300 *8.2K_4
C284
C284
0.1u/10V_4
0.1u/10V_4
ALINK_RST#_1
C595 0.1u/10V_4 C595 0.1u/10V_4
C596 0.1u/10V_4 C596 0.1u/10V_4
C593 0.1u/10V_4 C593 0.1u/10V_4
C594 0.1u/10V_4 C594 0.1u/10V_4
C592 0.1u/10V_4 C592 0.1u/10V_4
C591 0.1u/10V_4 C591 0.1u/10V_4
C590 0.1u/10V_4 C590 0.1u/10V_4
C589 0.1u/10V_4 C589 0.1u/10V_4
R542 562_6 R542 562_6
R543 2.05K_6 R543 2.05K_6
R541 0_6 R541 0_6
PCIE_VDDR
C279
C279
C287
C287
1u/10V_6
1u/10V_6
1u/10V_6
1u/10V_6
ALLOW_LDTSTOP
SBSRCCLKP 3
SBSRCCLKN 3
A_RX0P 11
A_RX0N 11
C285
C285
22U/10V_8
22U/10V_8
C296
C296
0.1u/10V_4
0.1u/10V_4
C280
C280
1u/10V_6
1u/10V_6
A_RX1P 11
A_RX1N 11
A_RX2P 11
A_RX2N 11
A_RX3P 11
A_RX3N 11
A_TX0P 11
A_TX0N 11
A_TX1P 11
A_TX1N 11
A_TX2P 11
A_TX2N 11
A_TX3P 11
A_TX3N 11
PCIE_VDDR
C293
C293
1u/10V_6
1u/10V_6
CPU_PWRGD 6
LDT_STOP# 6,12
CPU_SIC 6
CPU_SID 6
ALLOW_LDTSTOP 12
C292
C292
1u/10V_6
1u/10V_6
LDT_RST# 6
A:(8/28) change all caps from X5R to X7R
Follow AMD check list
D D
IRT 0206
VCC_SB
2A
L32 BLM18PG181SN1D_6 L32 BLM18PG181SN1D_6
PCIE_PVDD
PCIE Power
VCC_SB
L26
L26
FCM2012C-121_8
FCM2012C-121_8
C C
B B
CPU_PWR_SB
A:(9/5)Change C5540 from 10uF to 22uF to meet power sequence
B:(9/21) change C285 to CH6221M9A07
(CH6222M9A01 EOL issue)
C297
C278
C278
10u/10V_8
10u/10V_8
R351
R351
20M_4
20M_4
R258
R258
10K_4
10K_4
C297
C277
C277
10u/10V_8
10u/10V_8
Y10 32.768KHZ Y10 32.768KHZ
R341 20M_4 R341 20M_4
C360
C360
18p/50V_4
18p/50V_4
C291
C291
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
C:(12/5) Remove Delay PCIE Power for A-Link IF
32K_X1
32K_X2 32K_X2 32K_X2 32K_X2
4 1
2 3
C359
C359
18p/50V_4
18p/50V_4
ALLOW_LDTSTOP
4
A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
A_RX2P_C
A_RX2N_C
A_RX3P_C
A_RX3N_C
PCIE_CALRP
PCIE_CALRN
PCIE_CALI
C267
C267
1u/10V_6
1u/10V_6
32K_X1
32K_X2
R256 0_4 R256 0_4
T70T70
T72T72
T71T71
T73T73
T69T69
T82T82
T147T147
T74T74
U32A
U32A
AG10
A_RST#
J24
PCIE_RCLKP
J25
PCIE_RCLKN
P29
PCIE_TX0P
P28
PCIE_TX0N
M29
PCIE_TX1P
M28
PCIE_TX1N
K29
PCIE_TX2P
K28
PCIE_TX2N
H29
PCIE_TX3P
H28
PCIE_TX3N
T25
PCIE_RX0P
T26
PCIE_RX0N
T22
PCIE_RX1P
T23
PCIE_RX1N
M25
PCIE_RX2P
M26
PCIE_RX2N
M22
PCIE_RX3P
M23
PCIE_RX3N
E29
PCIE_CALRP
E28
PCIE_CALRN
E27
PCIE_CALI
U29
PCIE_PVDD
U28
PCIE_PVSS
F27
PCIE_VDDR_1
F28
PCIE_VDDR_2
F29
PCIE_VDDR_3
G26
PCIE_VDDR_4
G27
PCIE_VDDR_5
G28
PCIE_VDDR_6
G29
PCIE_VDDR_7
J27
PCIE_VDDR_8
J29
PCIE_VDDR_9
L25
PCIE_VDDR_10
L26
PCIE_VDDR_11
L29
PCIE_VDDR_12
N29
PCIE_VDDR_13
D2
X1
C1
X2
AC26
CPU_PG/LDT_PG
W26
INTR/LINT0
W24
NMI/LINT1
W25
INIT#
AA24
SMI#
AA23
SLP#/LDT_STP#
AA22
IGNNE#/SIC
AA26
A20M#/SID
Y27
FERR#
AA25
STPCLK#/ALLOW_LDTSTP
AH9
CPU_STP#/DPSLP_3V#
B24
DPSLP_OD#/GPIO37
W23
DPRSLPVR
AC25
LDT_RST#/DPRSTP#/PROCHOT#
SB600
SB600
SB600 SB 23x23mm
SB600 SB 23x23mm
Part 1 of 4
Part 1 of 4
SPDIF_OUT/PCICLK7/GPIO41
PCI CLKS
PCI CLKS
CBE2#/ROMWE#
PCI INTERFACE
PCI INTERFACE
DEVSEL#/ROMA0
TRDY#/ROMOE#
LPC
LPC
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
CPU
CPU
RTC_IRQ#/GPIO69
RTC
RTC
XTAL
XTAL
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE3#
FRAME#
IRDY#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
SERIRQ
RTCCLK
VBAT
RTC_GND
3
A:(8/6) Check List Rev3.01 Rcommended:
Connected PCICLK5 or 6 to LPC device 33MHz CLK input
PCICLK0_R
U2
T2
U1
V2
W3
U3
V1
T1
AJ9
W7
Y1
W8
W5
AA5
Y3
AA6
AC5
AA7
AC3
AC7
AJ7
AD4
AB11
AE6
AC9
AA3
AJ4
AB1
AH4
AB2
AJ3
AB3
AH3
AC1
AH2
AC2
AH1
AD2
AG2
AD1
AG1
AB9
AF9
AJ5
AG3
AA2
AH6
AG5
AA1
AF7
Y2
AG8
AC11
AJ8
AE2
AG9
AH8
AH5
AD11
AF2
AH7
AB12
AG4
AG7
AF6
AD3
AF1
AF4
AF3
AG24
AG25
AH24
AH25
AF24
AJ24
AH26
W22
AF23
D3
F5
E1
D1
R586 22_4 R586 22_4
PCICLK1_R
R588 22_4 R588 22_4
PCICLK2_R
PCICLK3_R
R583 22_4 R583 22_4
PCICLK4_R
R590 22_4 R590 22_4
PCICLK5_R
R345 22_4 R345 22_4
R584 22_4 R584 22_4
PCIRST#_C
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PORT_C#
REQ4#
AMD_PROCHOT_L
R427 *0_4 R427 *0_4
GNT4#
PCI_LOCK#
A:(8/23) arrange GPIO pin34/35/36 for FM tuner I2C interface
LPC_DRQ0#
LPC_DRQ1#
BMREQ#
RTC_CLK
C367
C367
1u/6.3V_4
1u/6.3V_4
T98T98
T87T87
T120T120
T90T90
T107T107
T117T117
T109T109
T106T106
T99T99
T142T142
T143T143
T75T75
T158T158
T119T119
VCCRTC
T123T123
T126T126
PCLK_OZ129
PCLK_DBC
PCICLK3
PCICLK4
PCLK_591
AD[0..31] 18,26
CBE0# 26
CBE1# 26
CBE2# 26
CBE3# 26
FRAME# 26
DEVSEL# 26
IRDY# 26
TRDY# 26
PAR 26
STOP# 26
REQ0# 26
GNT0# 26
CLKRUN# 26,29
INTE# 26
FM_INTX 28
FM_CLOCK 28
FM_DATA 28
LAD0 25,29
LAD1 25,29
LAD2 25,29
LAD3 25,29
LFRAME# 25,29
SERIRQ 29
2
PCLK_OZ129 18,26
PCIRST#_C
PCLK_DBC 18,25
PCICLK4 18
PCLK_591 29
PCICLK6 18
R290 33_4 R290 33_4
Reserved For EMI
PCLK_OZ129
PCLK_DBC
PCLK_591 PCICLK6_R
PCICLK3 SB_SPDIF_R
PCICLK4
A:(8/27) default no stuff
A:(8/6) Check List Rev3.01 Rcommended:
One series termination resistor near Southbridge for each load
unless other provision is made to ensure clean edges at all devices
R296
R296
8.2K_4
8.2K_4
RTC
D16 CH500H-40 D16 CH500H-40
+3VPCU
D14
D14
A:(8/18) AA1 use 1k ohm
MS2 stuff 510 ohm
A:(9/21) change from 510 to 1k
A:(8/16) OZ129 PCI IF can't find SERR#,PERR#
Reserve test point
PORT_C# 22
A:(8/27) reserve GPIO70 for PORT_C# (FM radio detect)
AMD_PROCHOT 6,29
BMREQ#
R253 10K_4 R253 10K_4
C283
C283
*18p/50V_4
*18p/50V_4
R579
R579
1K_6
1K_6
CN37
CN37
1
2
ACS_85204-0200L
ACS_85204-0200L
A:(8/27) AMD check list Rev3.01 Item 26-36:
Stuff 10k
C656 *10p/50V_4 C656 *10p/50V_4
C654 *10p/50V_4 C654 *10p/50V_4
C384 *10p/50V_4 C384 *10p/50V_4
C653 *10p/50V_4 C653 *10p/50V_4
C655 *10p/50V_4 C655 *10p/50V_4
PCIRST# 25,26
CH500H-40
CH500H-40
MMBT3904
MMBT3904
1
2
+3V
C274
C274
0.1u/10V_4
0.1u/10V_4
C:(12/14) Stuff EMI CAP
1
14
A:(8/18) Checklist Rev3.01
(a).0.1-μ F and 1-μ F capacitors to RTC_GND.
(b)510-ohm 5% series resistor to battery.
(c)No diode connected between VBAT ball and battery.
VCCRTC
(d)Jumper to short VBAT to RTC_GND through the series resistor.
1 2
G4
G4
*SHORT_PAD
*SHORT_PAD
R568
R568
1K_4
1K_4
R667
2K/F_4
2K/F_4
R667
R571
1 3
Q74
Q74
R571
A:(9/21) change R571 from 1k to 2.2K~4.7k
2
A:(9/26) change R571 to 14k
B:(9/27) Safety request design with two resistor
(two 8.66K),Add R667
RAMP:(1/8)Change R581 from 4.7k to 6.8k.
Change R571,R667 from 8.66k to 2k.
Correct R571,R667 footprint from 0603 to 0402
Ic = 220uA + ( 5.1-2.2 ) / ( 2K + 2K )= 945uA
RAMP:(1/8) Change RTC Battery from VARTA (AHL03001441) to MATSUSHITA (AHL03002005)
C366
C366
C365
C365
1U/10V_4
1U/10V_4
A:(8/18) AA1 & MS2 no stuff 1u+0.1uF
VCCRTC_3
2K/F_4
2K/F_4
R581
R581
6.8K_4
6.8K_4
R582 15K_4 R582 15K_4
B:(9/28) change R582 from 0603 to 0402
.1U_4
.1U_4
+5VPCU
R367
R367
8.2K_4
8.2K_4
+3V_S5
U19
U19
NC7SZ08P5X_NL
NC7SZ08P5X_NL
4
R346 *0_4 R346 *0_4
5 3
1
2
C383 .1U_4 C383 .1U_4
ECPWROK
ALINK_RST#_1
ECPWROK 29
4
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SB600 PCIE/PCI/CPU/LPC
SB600 PCIE/PCI/CPU/LPC
SB600 PCIE/PCI/CPU/LPC
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet
Quanta Computer Inc.
of
14 43 Tuesday, January 22, 2008
14 43 Tuesday, January 22, 2008
1
14 43 Tuesday, January 22, 2008
3C
3C
3C
A:(8/27) Add buffer for Alink_RST
PLTRST#
R350 0_4 R350 0_4
R348 0_4 R348 0_4
R363 0_4 R363 0_4
C828
C828
*.1U_4
*.1U_4
5
ALINK_RST#
NB_RST# 12
PLTRST# 19,21,24,25,27,29
IDERST1# 27
A A
RAMP:(1/17)Reserve C828 (0.1uF) for PLTRST# (R348)
5
4
3
2
1
A:(8/27) no stuff 4.7k
AMD SB600 check list Rev3.01 Item:24-17
SB600 have internal PU resister
SB_OSCIN
R558 68_4 R558 68_4
D D
SCLK1_R
SDATA1_R
SB_THERMTRIP#
GPM7#
S3_STATE
SWI#
SUS_STAT#
DNBSWON#
SUSC#
SUSB#
SCI#
A:(8/27) AMD SB600 check list Rev3.01 Item:28-6
stuff 10k
SCLK0
SDATA0
GPIO4_S0
GPIO5_S0
C C
B B
A A
KBSMI#_R
RCIN#
GATEA20
A:(8/29) AMD SB600 check list Rev3.01 Item:26-6
change form 4.7k to 10k(Stuff)
SCLK0
SDATA0
A:(8/29) follow EMI suggestion, reserve RC termination
C:(12/17) Stuff C387 to 22pF(CH02206JB08) for EMI issue
C:(12/18) Change R369 from CS03302JB29 to CX5HM121104 for EMI issue
BIT_CLK_AUDIO 22
ACZ_SDOUT_AUDIO 22
ACZ_SDIN0 22
ACZ_SYNC_AUDIO 22
ACZ_RST#_AUDIO 22
A:(8/14) Delete 33ohm
Serial damping already be put on codec side for net (SDIN0)
RAMP:(1/15) Stuff R558 to 68 ohm, C603 to 22pF
R576 2.2K_4 R576 2.2K_4
R331 2.2K_4 R331 2.2K_4
R299 *4.7K_4 R299 *4.7K_4
R332 *10K_4 R332 *10K_4
R302 10K_4 R302 10K_4
R301 *10K_4 R301 *10K_4
R575 *10K_4 R575 *10K_4
R336 *10K_4 R336 *10K_4
R304 *4.7K_4 R304 *4.7K_4
R303 *4.7K_4 R303 *4.7K_4
R577 *10K_4 R577 *10K_4
R246 2.2K_4 R246 2.2K_4
R247 2.2K_4 R247 2.2K_4
R551 10K_4 R551 10K_4
R263 10K_4 R263 10K_4
R244 *10K_4 R244 *10K_4
R257 *10K_4 R257 *10K_4
R261 *10K_4 R261 *10K_4
A:(8/6) SCL1/SDA1 have ASF-Capable
C:(11/29) Add New card detect circuit to slove New card hot-plug issue
R545 *22_4 R545 *22_4
A:(8/6) no stuff 10k
Check List Rev3.01 :
SB600 A21 and newer: not installed 10k by default
SB600 prior to A21: 10k pull-down resistor to keep it asserted during power up.
+3V_S5
+3V
C583 *10p/50V_4 C583 *10p/50V_4
C582 *10p/50V_4 C582 *10p/50V_4
R369
R369
C387 22P/50V_4 C387 22P/50V_4
R370 33_4 R370 33_4
R339 *33_4 R339 *33_4
R364 33_4 R364 33_4
R360 33_4 R360 33_4
A:(8/14) change net name from SBPWROK to ECPWROK
C603 22P_4 C603 22P_4
A:(8/18) Remove SWI# net to EC side
A:(8/18) add diode to stop leakage from EC to SB
C382
C382
0.1u/10V_4
0.1u/10V_4
C269
C269
0.1u/10V_4
0.1u/10V_4
SCLK0 3,8,25
SDATA0 3,8,25
SCLK1 19
SDATA1 19
B:(10/26) Modify USB-OC pin control
C:(12/7) Add D56,D57 for leakage issue
AZ_BITCLK
BK1005HM121-T_4
BK1005HM121-T_4
AZ_SDOUT
AZ_SDIN0
ACZ_SDIN0_R
AZ_SYNC
AZ_RST#
R347 *10K_4 R347 *10K_4
PCI_PME# 26
SCI# 29
SUSB# 29
SUSC# 29
DNBSWON# 29
SB_PWRGD 29
GATEA20 29
RCIN# 29
T68T68
PCIE_WAKE# 24,25
SB_THERMTRIP# 6
RSMRST# 29
SB_OSCIN 3
USB_OC# 28,29
NEW_DET# 25
USB_OC2# 28,29
AC_SDOUT 18
A:(8/20) Follow ZC3:
Add THERM_ALERT# from Thermal sensor
T161 T161
BOARD_ID4 18
T144 T144
BOARD_ID0 18
BOARD_ID1 18
PCBEEP 22
SCLK0
SDATA0
SCLK1 SCLK1_R
SDATA1
BOARD_ID3 18
BOARD_ID2 18
T145 T145
T157 T157
T172 T172
T104 T104
D57 BAS316 D57 BAS316
T95T95
T155 T155
T101 T101
D56 BAS316 D56 BAS316
T166 T166
T165 T165
T113 T113
T115 T115
T114 T114
THERM_ALERT# 6
PCI_PME#
SCI#
SUSB#
SUSC#
DNBSWON#
SUS_STAT#
SB_TEST2
SB_TEST1
SB_TEST0
GATEA20
RCIN#
SWI#
KBSMI#_R
GPM7#
GPM6#_S5
SB_THERMTRIP#
BOARD_ID4
GPIO1_S0
BOARD_ID0
BOARD_ID1
GPIO4_S0
GPIO5_S0
R245 0_4 R245 0_4
R232 0_4 R232 0_4
R578 0_4 R578 0_4
R334 0_4 R334 0_4
BOARD_ID3
BOARD_ID2
GPIO0_S0
GPIO66_S5
PX_VGA_POWER
USB_OCP7#
R688 0_4 R688 0_4 R546 *22_4 R546 *22_4
NEW_DET#
USB_OCP2#
R676 0_4 R676 0_4
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0
AZ_SYNC
AZ_RST#
ACZ_SDIN0_R
S3_STATE
SDATA1_R
U32D
U32D
A3
PCI_PME#/GEVENT4#
B2
RI#/EXTEVNT0#
F7
SLP_S3#
A5
SLP_S5#
E3
PWR_BTN#
B5
PWR_GOOD
B3
SUS_STAT#
F9
TEST2
E9
TEST1
G9
TEST0
AF26
GA20IN
AG26
KBRST#
D7
LPC_PME#/GEVENT3#
C25
LPC_SMI#/EXTEVNT1#
D9
S3_STATE/GEVENT5#
F4
SYS_RESET#/GPM7#
E7
WAKE#/GEVENT8#
C2
BLINK/GPM6#
G7
SMBALERT#/THRMTRIP#/GEVENT2#
E2
RSMRST#
B23
14M_OSC
C28
SATA_IS0#/GPIO10
A26
ROM_CS#/GPIO1
B29
GHI#/SATA_IS1#/GPIO6
A23
WD_PWRGD/GPIO7
B27
SMARTVOLT/SATA_IS2#/GPIO4
D23
SHUTDOWN#/GPIO5
B26
SPKR/GPIO2
C27
SCL0/GPOC0#
B28
SDA0/GPOC1#
C3
SCL1/GPOC2#
F3
SDA1/GPOC3#
D26
DDC1_SCL/GPIO9
C26
DDC1_SDA/GPIO8
A27
SSMUXSEL/SATA_IS3#/GPIO0
A4
LLB#/GPIO66
C6
USB_OC9#/SLP_S2/GPM9#
C5
USB_OC8#/AZ_DOCK_RST#/GPM8#
C4
USB_OC7#/GEVENT7#
B4
USB_OC6#/GEVENT6#
B6
USB_OC5#/DDR3_RST#/GPM5#
A6
USB_OC4#/GPM4#
C8
USB_OC3#/GPM3#
C7
USB_OC2#/GPM2#
B8
USB_OC1#/GPM1#
A8
USB_OC0#/GPM0#
N2
AZ_BITCLK
M2
AZ_SDOUT
K2
AZ_SDIN3/GPIO46
L3
AZ_SYNC
K3
AZ_RST#
L1
AC_BITCLK/GPIO38
L2
AC_SDOUT/GPIO39
L4
ACZ_SDIN0/GPIO42
J2
ACZ_SDIN1/GPIO43
J4
ACZ_SDIN2/GPIO44
M3
AC_SYNC/GPIO40
L5
AC_RST#/GPIO45
E23
NC1
AC21
NC2
AD7
NC3
AE7
NC4
AA4
NC5
T4
NC6
D4
NC7
AB19
NC8
SB600
SB600
SB600 SB 23x23mm
SB600 SB 23x23mm
Part 4 of 4
Part 4 of 4
ACPI / WAKE UP
EVENTS
ACPI / WAKE UP
EVENTS
OSC / RST
OSC / RST
GPIO
GPIO
USB OC
USB OC
AC97 AZALIA
AC97 AZALIA
A17
USBCLK
AVDDC
AVSSC
A14
A11
A10
H12
G12
E12
D12
E14
D14
G14
H14
D16
E16
D18
E18
G16
H16
G18
H18
D19
E19
G19
H19
B9
B11
B13
B16
B18
A9
B10
B12
B14
B17
A12
A13
A16
C9
C10
C11
C12
C13
C14
C16
C17
C18
C19
C20
D11
D21
E11
E21
F11
F12
F14
F16
F18
F19
F21
G11
G21
H11
H21
J11
J12
J14
J16
J18
J19
USB_RCOMP
USB_ATEST1
USB_ATEST0
USB_HSDP9+
USB_HSDM9-
USB_HSDP8+
USB_HSDM8-
USB_HSDP7+
USB_HSDM7-
USB_HSDP6+
USB_HSDM6-
USB_HSDP5+
USB_HSDM5-
USB_HSDP4+
USB INTERFACE
USB INTERFACE
USB_HSDM4USB_HSDP3+
USB_HSDM3USB_HSDP2+
USB_HSDM2USB_HSDP1+
USB_HSDM1USB_HSDP0+
USB_HSDM0-
AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4
AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
USB PWR
USB PWR
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
AVSS_USB_25
AVSS_USB_26
AVSS_USB_27
AVSS_USB_28
AVSS_USB_29
AVSS_USB_30
AVSS_USB_31
AVSS_USB_32
AVSS_USB_33
R562 *22_4 R562 *22_4
USB_RCOMP
R473 0_4 R473 0_4
R475 0_4 R475 0_4
R461 0_4 R461 0_4
R472 0_4 R472 0_4
R476 0_4 R476 0_4
R498 0_4 R498 0_4
R670 0_4 R670 0_4
R671 0_4 R671 0_4
C609 *10p/50V_4 C609 *10p/50V_4
R275 11.8K/F_4 R275 11.8K/F_4
USBCLK 3
T151 T151
T152 T152
BT_USBP8+ 28
BT_USBP8- 28
NEW_USBP6+ 25
NEW_USBP6- 25
USBP0+ 28
USBP0- 28
USBP7+ 28
USBP7- 28
FELICA_USBP5+ 28
FELICA_USBP5- 28
FP_USBP4+ 28
FP_USBP4- 28
WL_USBP3+ 25
WL_USBP3- 25
CCD_USBP2+ 20
CCD_USBP2- 20
USBP1+ 28
USBP1- 28
USBP9+ 28
USBP9- 28
AVDD_USB
To Bluetooth
To New Card
To M/B USB
To M/B USB
To Felica
To Finger Printer
To WLAN
To Camera
To USB BOARD
To USB BOARD
AVDD_USB
10u/10V_8
10u/10V_8
+3.3V_AVDDC
C616
C616
2.2u/10V_8
2.2u/10V_8
1 2
SB_TEST0
SB_TEST1
SB_TEST2
A:(8/17)USB port0 needs to always connect to
outer physical USB connector.
Note: USB port0 is reserved to debug purpose
if there is issue wants to be analyzed,
and it's ruled by Microsoft.
B:(10/18) Swap USBP7 & USBP9 (SB600 side)
USB power
L63
L63
FCM2012C-121_8
+3V_S5
FCM2012C-121_8
C335
C335
1u/10V_6
1u/10V_6
C333
C333
0.1u/10V_4
0.1u/10V_4
C337
C337
C336
C624
C624
C334
C334
10u/10V_8
10u/10V_8
C336
1u/10V_6
1u/10V_6
1u/10V_6
1u/10V_6
A:(8/28) Follow AMD check list Item1-15:
Change from 0.1u to 1u
C627
C627
C626
C626
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
L62 BLM18PG181SN1D_6 L62 BLM18PG181SN1D_6
C329
C617
C617
1u/6.3V_4
1u/6.3V_4
R298 *2.2K_4 R298 *2.2K_4
R297 *10K_4 R297 *10K_4
R291 *2.2K_4 R291 *2.2K_4
R292 *10K_4 R292 *10K_4
R294 *2.2K_4 R294 *2.2K_4
R295 *10K_4 R295 *10K_4
C329
0.1u/10V_4
0.1u/10V_4
+3V_S5
+3V_S5
15
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SB600 ACPI/GPIO/USB/AC97
SB600 ACPI/GPIO/USB/AC97
SB600 ACPI/GPIO/USB/AC97
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
15 43 Tuesday, January 22, 2008
15 43 Tuesday, January 22, 2008
15 43 Tuesday, January 22, 2008
of
of
1
of
3C
3C
3C
5
SATA_TXP0 27
SATA_TXN0 27
SATA_RXN0 27
SATA_RXP0 27
SATA_TXP1 27
SATA_TXN1 27
D D
C325
C325
27p/50V_4
27p/50V_4
Y6
Y6
C320
C320
27p/50V_4
27p/50V_4
B:(10/31) change C320,C325 to 27P
C C
25MHZ_SATA
25MHZ_SATA
2 1
SATA_RXN1 27
SATA_RXP1 27
SATA_X1
SATA_X2
R274
R274
10M_4
10M_4
SATA_LED# 30
PLLVDD_ATA
XTLVDD_ATA
AVDD_SATA
SATA Power
C327
C327
1u/10V_6
1u/10V_6
C343
C343
1u/10V_6
1u/10V_6
XTLVDD_ATA
C317
C317
1u/10V_6
1u/10V_6
PLLVDD_ATA
C328
C328
1u/10V_6
1u/10V_6
+3V
L35
L35
BLM18PG181SN1D_6
BLM18PG181SN1D_6
VCC_SB
L36
L36
BLM18PG181SN1D_6
BLM18PG181SN1D_6
B B
4
C301 0.01u/25V_4 C301 0.01u/25V_4
C305 0.01u/25V_4 C305 0.01u/25V_4
C310 0.01u/25V_4 C310 0.01u/25V_4
C313 0.01u/25V_4 C313 0.01u/25V_4
T77T77
T80T80
T78T78
T79T79
T86T86
T92T92
T102 T102
T76T76
R281 1K/F_4 R281 1K/F_4
SATA_TXP0_C
SATA_TXN0_C
SATA_TXP1_C
SATA_TXN1_C
SATA_CAL
SATA_X1
SATA_X2
U32B
U32B
AH21
SATA_TX0+
AJ21
SATA_TX0-
AH20
SATA_RX0-
AJ20
SATA_RX0+
AH18
SATA_TX1+
AJ18
SATA_TX1-
AH17
SATA_RX1-
AJ17
SATA_RX1+
AH13
SATA_TX2+
AH14
SATA_TX2-
AH16
SATA_RX2-
AJ16
SATA_RX2+
AJ11
SATA_TX3+
AH11
SATA_TX3-
AH12
SATA_RX3-
AJ13
SATA_RX3+
AF12
SATA_CAL
AD16
SATA_X1
AD18
SATA_X2
AC12
SATA_ACT#/GPIO67
AD14
PLLVDD_SATA_1
AJ10
PLLVDD_SATA_2
AC16
XTLVDD_SATA
AE14
AVDD_SATA_1
AE16
AVDD_SATA_2
AE18
AVDD_SATA_3
AE19
AVDD_SATA_4
AF19
AVDD_SATA_5
AF21
AVDD_SATA_6
AG22
AVDD_SATA_7
AG23
AVDD_SATA_8
AH22
AVDD_SATA_9
AH23
AVDD_SATA_10
AJ12
AVDD_SATA_11
AJ14
AVDD_SATA_12
AJ19
AVDD_SATA_13
AJ22
AVDD_SATA_14
AJ23
AVDD_SATA_15
AB14
AVSS_SATA_1
AB16
AVSS_SATA_2
AB18
AVSS_SATA_3
AC14
AVSS_SATA_4
AC18
AVSS_SATA_5
AC19
AVSS_SATA_6
AD12
AVSS_SATA_7
AD19
AVSS_SATA_8
AD21
AVSS_SATA_9
AE12
AVSS_SATA_10
AE21
AVSS_SATA_11
AF11
AVSS_SATA_12
AF14
AVSS_SATA_13
AF16
AVSS_SATA_14
AF18
AVSS_SATA_15
AG11
AVSS_SATA_16
AG12
AVSS_SATA_17
AG13
AVSS_SATA_18
AG14
AVSS_SATA_19
AG16
AVSS_SATA_20
AG17
AVSS_SATA_21
AG18
AVSS_SATA_22
AG19
AVSS_SATA_23
AG20
AVSS_SATA_24
AG21
AVSS_SATA_25
AH10
AVSS_SATA_26
AH19
AVSS_SATA_27
3
SB600 SB 23x23mm
SB600 SB 23x23mm
Part 2 of 4
Part 2 of 4
ATA 66/100
ATA 66/100
SERIAL ATA
SERIAL ATA
SPI_HOLD#/GPIO31
LAN_RST#/GPIO13
SPI ROM HW MONITOR
SPI ROM HW MONITOR
ROM_RST#/GPIO14
TEMPIN3/TALERT#/GPIO64
SERIAL ATA POWER
SERIAL ATA POWER
IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_CS#/GPIO32
FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
AVDD
AVSS
2
AB29
AA28
AA29
AB27
Y28
AB28
AC27
AC29
AC28
W28
W27
PDD0
AD28
PDD1
AD26
PDD2
AE29
PDD3
AF27
PDD4
AG29
PDD5
AH28
PDD6
AJ28
PDD7
AJ27
PDD8
AH27
PDD9
AG27
PDD10
AG28
PDD11
AF28
PDD12
AF29
PDD13
AE28
PDD14
AD25
PDD15
AD29
J3
J6
G3
G2
G6
C23
G5
SB600_FOUT0
M4
LOW_DET
T3
FM_DET
V4
N3
P2
W4
TEMP_COMM
P5
P7
P8
T8
T7
PX_EXT_VGA_RESET
V5
L7
M8
V6
M6
P4
M7
V7
N1
M1
AVDD_HWM
HWM_AGND
A:(8/27) Check List Rev3.01(Item 1-33,1-34):
HWM not implemented:
(1)Bead not used, change bead to 0 ohm(no stuff)
(2)Decoupling caps not used
PDIORDY 27
IRQ14 27
PDA0 27
PDA1 27
PDA2 27
PDDACK# 27
PDDREQ 27
PDIOR# 27
PDIOW# 27
PDCS1# 27
PDCS3# 27
PDD[15:0] 27
T164 T164
T85T85
T116 T116
T163 T163
T124 T124
T146 T146
T122 T122
R337 10K_4 R337 10K_4
LOW_DET 18,28
FM_DET 28
T121 T121
T127 T127
T103 T103
T100 T100
T88T88
T94T94
TALERT#
T112 T112
T97T97
T96T96
T110 T110
T125 T125
T105 T105
T91T91
C376
C376
C369
C369
*0.1u/10V_4
*0.1u/10V_4
R362 0_6 R362 0_6
A:(8/14) Remove LAN_RST net. Reserve a test point.
Due to LAN_RST net already be deleted in LAN side.
A:(8/6) Check List Rev3.01:
Fan Control Not Implemented: Used as GPIO3 or terminated
B:(10/18) add FM_DET to GPIO48
R686 0_6 R686 0_6
R361 *0_6 R361 *0_6
*2.2u/6.3V_6
*2.2u/6.3V_6
TALERT# 6
T93T93
1
+3V
R453
R453
10K_4
10K_4
FM_DET
R673
R673
*10K_4
*10K_4
B:(10/25) Add R673 (no stuff) for debug use
TEMP_COMM
A:(8/27) Check List Rev3.01: 22-11
Let TEMP_COMM connect to GND
when Temp Monitor not implementing
PX_HDMI_DDC_EN 12
+3V
+3V_S5
A:(8/6) Check List Rev3.01: Tie to a +3.3V_S5 rail
Change AVDD from +3V to +3V_S5 (MS2/AA1:+3V for A-test)
B:(10/26) Add R686 to +3V, no stuff R361 for leakage issue
SB600
VCC_SB
L34 FCM2012C-121_8 L34 FCM2012C-121_8
A A
5
C290
C290
10u/10V_8
10u/10V_8
AVDD_SATA
C330
C311
C311
C282
C282
1u/10V_6
1u/10V_6
10u/10V_8
10u/10V_8
A:(8/28) Follow AMD check list Item1-38:
Change from 0.1u to 1u
C330
1u/10V_6
1u/10V_6
C298
C298
0.1u/10V_4
0.1u/10V_4
C316
C316
0.1u/10V_4
0.1u/10V_4
4
C312
C312
0.1u/10V_4
0.1u/10V_4
SB600
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SB600 SATA/IDE
SB600 SATA/IDE
SB600 SATA/IDE
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Quanta Computer Inc.
16 43 Tuesday, January 22, 2008
16 43 Tuesday, January 22, 2008
16 43 Tuesday, January 22, 2008
of
of
1
of
3C
3C
3C
5
D D
C C
B B
4
+3V
A:(8/22) Reserve 0 ohm
+1.2V
A:(8/22) Add new power name
+3V_S5
A:(8/22) Reserve 0 ohm
A:(8/22) Add new power name
+1.2V_S5
A:(8/22) Reserve 0 ohm
+1.2V_S5 +1.2V_USB_PHY
A:(8/22) Reserve 0 ohm
3
R595 0_8
R595 0_8
RC0805
RC0805
R223 0_8
R223 0_8
RC0805
RC0805
R220 0_8
R220 0_8
RC0805
RC0805
R368 0_6 R368 0_6
R265 0_6 R265 0_6
R560 0_6 R560 0_6
+1.8VSUS
+1.8V
V5_VREF
R333 1K/F_4 R333 1K/F_4
+5V
2 1
+3V
D15 SW1010C D15 SW1010C
+3V_SB_VDDQ
VCC_SB
+3V_S5_SB
+1.2V_S5_SB
+3V
VCC_SB
+
C649
+
C649
220U/6.3V_7343
220U/6.3V_7343
CC7343
CC7343
C266
C266
10u/10V_8
10u/10V_8
CC0805
CC0805
C385
C385
10u/10V_8
10u/10V_8
C361
C361
0.1u/10V_4
0.1u/10V_4
C608
C608
10u/10V_8
10u/10V_8
A:(8/22) Add new power name
C294
C294
C349
C349
C339
C339
1u/10V_6
1u/10V_6
C341
C341
10u/10V_8
10u/10V_8
CC0805
CC0805
C375
C375
10u/10V_8
10u/10V_8
A:(8/28) Follow AMD check list Item1-9:
Change from 0.1u to 1u
C295
C295
0.1u/10V_4
0.1u/10V_4
C307
C307
10u/10V_8
10u/10V_8
R250 *0_6 R250 *0_6
R251 0_6 R251 0_6
C275 0.1u/10V_4 C275 0.1u/10V_4
L31
L31
BLM18PG181SN1D_6
BLM18PG181SN1D_6
L60
L60
BLM18PG181SN1D_6
BLM18PG181SN1D_6
C357
C357
1u/10V_6
1u/10V_6
1u/10V_6
1u/10V_6
C324
C324
1u/10V_6
1u/10V_6
C342
C342
1u/10V_6
1u/10V_6
C299
C299
0.1u/10V_4
0.1u/10V_4
C300
C300
0.1u/10V_4
0.1u/10V_4
V5_VREF
C340
C340
1u/10V_6
1u/10V_6
C332
C332
1u/10V_6
1u/10V_6
C355
C355
0.1u/10V_4
0.1u/10V_4
CPU_PWR_SB
*0.1u/10V_4
*0.1u/10V_4
C362
C362
1u/10V_6
1u/10V_6
A:(8/22) Add new power name
C610
C610
0.1u/10V_4
0.1u/10V_4
2
C356
C356
1u/10V_6
1u/10V_6
C331
C331
1u/10V_6
1u/10V_6
C304
C304
0.1u/10V_4
0.1u/10V_4
C281
C281
2.2u/6.3V_6
2.2u/6.3V_6
1 2
C314
C314
1u/10V_6
1u/10V_6
C326
C326
1u/10V_6
1u/10V_6
VCC_SB
C308
C308
0.1u/10V_4
0.1u/10V_4
V5_VREF
AVDDCK_3.3V
AVDDCK_1.2V
C605
C605
2.2u/6.3V_6
2.2u/6.3V_6
1 2
C318
C318
1u/10V_6
1u/10V_6
C321
C321
0.1u/10V_4
0.1u/10V_4
C29
D24
W21
W29
AA12
AA16
AA19
AC4
AC23
AD27
AE1
AE9
AE23
AH29
AJ26
M13
M17
N12
N15
N18
R13
R17
U12
U15
U18
AA27
AE11
U27
A25
A28
L21
AJ2
AJ6
V13
V17
A18
A19
B19
B20
B21
A24
A22
B22
V29
V28
V27
V26
V25
V24
V23
V22
T29
T28
T27
T24
T21
P27
L9
M5
P3
P9
T5
V9
W2
W6
A2
A7
F1
J5
J7
K1
G4
H1
H2
H3
U32C
U32C
SB600 SB 23x23mm
SB600 SB 23x23mm
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
S5_1.2V_1
S5_1.2V_2
S5_1.2V_3
S5_1.2V_4
USB_PHY_1.2V_1
USB_PHY_1.2V_2
USB_PHY_1.2V_3
USB_PHY_1.2V_4
USB_PHY_1.2V_5
CPU_PWR
V5_VREF
AVDDCK_3.3V
AVDDCK_1.2V
AVSSCK
PCIE_VSS_42
PCIE_VSS_41
PCIE_VSS_40
PCIE_VSS_39
PCIE_VSS_38
PCIE_VSS_37
PCIE_VSS_36
PCIE_VSS_35
PCIE_VSS_34
PCIE_VSS_33
PCIE_VSS_32
PCIE_VSS_31
PCIE_VSS_30
PCIE_VSS_29
PCIE_VSS_28
SB600
SB600
Part 3 of 4
Part 3 of 4
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
POWER
POWER
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
1
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
A1
A20
A21
A29
B1
B7
B25
C21
C22
C24
D6
E24
F2
F23
G1
J1
J8
L6
L8
M9
M12
M15
M18
N13
N17
P1
P6
P21
R12
R15
R18
T6
T9
U13
U17
V3
V8
V12
V15
V18
V21
W1
W9
Y29
AA11
AA14
AA18
AC6
AC24
AD9
AD23
AE3
AE27
AG6
AJ1
AJ25
AJ29
D27
D28
D29
F26
G23
G24
G25
H27
J23
J26
J28
K27
L22
L23
L24
L27
L28
M21
M24
M27
N27
N28
P22
P23
P24
P25
P26
17
A:(8/17) AA1 no stuff 1uF & 0.1uF
MS2 have stuff 1uF & 0.1uF
A A
5
4
3
Check list Rev3.01: Decoupled with at least one 1.0uF
A:(8/27) stuff 1uF (Follow AMD check list item 1-24)
2
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SB600 POWER/DECOUPLING
SB600 POWER/DECOUPLING
SB600 POWER/DECOUPLING
Date: Sheet
Date: Sheet
Date: Sheet
17 42 Tuesday, January 22, 2008
17 42 Tuesday, January 22, 2008
17 42 Tuesday, January 22, 2008
of
of
1
of
3C
3C
3C
5
REQUIRED
STRAPS
AC_SDOUT 15
PCICLK4 14
D D
PCICLK6 14
PCLK_OZ129 14,26
PCLK_DBC 14,25
SB600 Internal PD 10K
C C
DEBUG
STRAPS
AD28 14,26
AD27 14,26
AD26 14,26
AD25 14,26
AD24 14,26
AD23 14,26
PULL
HIGH
B B
PULL
LOW
+3V +3V +3V +3V +3V
R602
CPU IF=K8
DEFAULT
CPU IF=P4
USE ACPI
BCLK
BYPASS
ACPI
BCLK
R602
10K_4
10K_4
R606
R606
*10K_4
*10K_4
R600
R600
*10K_4
*10K_4
R592
R592
*2.2K_4
*2.2K_4
PULL
LOW
PULL
HIGH
AC_SDOUT
USE
DEBUG
STRAPS
IGNORE
DEBUG
STRAPS
DEFAULT
PCI_AD28
USE
LONG
RESET
DEFAULT
USE
SHORT
RESET
R365
R365
R591
R591
*2.2K_4
*2.2K_4
*10K_4
*10K_4
R604
R604
R349
R349
10K_4
10K_4
*10K_4
*10K_4
PCICLK4 PCICLK6 PCI_CLK0 PCI_CLK1
USE INT.
PLL48
USE EXT.
48MHZ
DEFAULT
R359
R359
R601
R601
*10K_4
*10K_4
*10K_4
*10K_4
R593
R593
R342
R342
*2.2K_4
*2.2K_4
*2.2K_4
*2.2K_4
PCI_AD27 PCI_AD26
USE PCI
PLL
DEFAULT
BYPASS
PCI PLL
4
R587
R587
*10K_4
*10K_4
R605
R605
10K_4
10K_4
PCLK_DBC PCLK_OZ129
ROM TYPE:
H, H = PCI ROM
H, L = SPI ROM
L, H = LPC ROM
L, L = FWH ROM
R358
R358
*10K_4
*10K_4
R344
R344
*2.2K_4
*2.2K_4
DEFAULT
+3V +3V +3V +3V +3V +3V
PCI_AD25 PCI_AD24
USE DEFAULT
USE IDE
PCIE STRAPS
PLL
DEFAULT
BYPASS IDE
PLL
DEFAULT DEFAULT
USE EEPROM
PCIE STRAPS
R599
R599
*10K_4
*10K_4
R585
R585
*2.2K_4
*2.2K_4
R589
R589
10K_4
10K_4
R603
R603
*10K_4
*10K_4
TVOUT
R357
R357
A:(8/6) no stuff 10k (MS2/AA1: stuff 10k for A-test)
*10K_4
*10K_4
Check List Rev3.01: No external resistor (internal pull up)
C:(12/7) Add C185 bypass Cap for EMI request
+3V
C185
C185
R343
R343
*2.2K_4
*2.2K_4
0.1u/10V_4
0.1u/10V_4
PCI_AD23
BOOTFAILTIMER
DISABLED
DEFAULT
BOOTFAILTIMER
ENABLED
High : Low cost function board(0 key)
Low : Low cost function board(6 key)
EXT_TV_Y/G 21
EXT_TV_C/R 21
INT_TV_Y/G 12
INT_TV_C/R 12
TV@150/F_4
TV@150/F_4
+3V
R105
R105
3
close to NB & VGA connector
R497 EV@0_4 R497 EV@0_4
R496 EV@0_4 R496 EV@0_4
R189 IV@0_4 R189 IV@0_4
R190 IV@0_4 R190 IV@0_4
L14 TV@BLM18PG181SN1D L14 TV@BLM18PG181SN1D
C149
C149
TV@6P/50V_4
TV@6P/50V_4
TV@6P/50V_4
TV@6P/50V_4
B:(10/30) change CN22 from footprint from "SV-030018FR004S100FR-RVS-4P-V" to "SV-030018FR004S100FR-RVS-4P-H"
C:(12/11) Change CN22(S-Video) from DFMD04FR296(Yellow Color) to DFMD04FR006(Black Color)
R31
R31
10K_4
10K_4
LOW_DET
R30
R30
*1K_4
*1K_4
LOW_DET 16,28
SYS_TV_Y/G
SYS_TV_C/R
CN22
TV-CHROMA TV-LUMA SYS_TV_Y/G SYS_TV_C/R
C148
C148
CN22
4
4
6
6
2
2
TV@SUYIN_030018FR004S100FR
TV@SUYIN_030018FR004S100FR
B:(10/24) change CN22 from 7PIN to 4PIN CONN
R548
R548
10K_4
10K_4
R539
R539
*1K_4
*1K_4
BOARD_ID4 15 BOARD_ID3 15 BOARD_ID2 15 BOARD_ID1 15 BOARD_ID0 15
3
3
5
5
1
1
+3V +3V +3V +3V +3V
R544
R544
BOARD_ID3 BOARD_ID2 BOARD_ID0 BOARD_ID1BOARD_ID4
R537
R537
*1K_4
*1K_4
+3V +3V
RAMP:(1/15) Reserve D9,D11 for TV CONN(ESD issue)
L20 TV@BLM18PG181SN1D L20 TV@BLM18PG181SN1D
C214
C214
TV@6P/50V_4
TV@6P/50V_4
10K_4
10K_4
C:(11/29)Board ID issue:
(1)Because GPIO pin of South Bridge have internal PU or PD.It will let Board ID become floating(+1.5V) when external circuit PD
(2)Change external Pull down to 1K ohm for all BOARD_ID and LOW_DET circuit
B:(10/30) GPIO8(BOARD_ID2) for UMA/MXM detection use
(1)Stuff R540(pull low),don't stuff R549 for UMA
(2)Stuff R549(pull high),don't stuff R540 for MXM
2
1
2
D9
D9
3
*TV@DA204U
*TV@DA204U
C215
C215
TV@6P/50V_4
TV@6P/50V_4
NEW CARD
CARD BUS
CCFL Panel
LED Panel
W/ MXM
W/O MXM
W/ S-VIDEO
W/O S-VIDEO
W/ HDMI
W/O HDMI
R549
R549
EV@10K_4
EV@10K_4
R540
R540
IV@1K_4
IV@1K_4
1
D11
D11
3
*TV@DA204U
*TV@DA204U
2
R158
R158
TV@150/F_4
TV@150/F_4
1
BTO
TV-LUMA TV-CHROMA
ID4
H
L
H
L
ID0 ID1 Board ID
ID2 ID3
H
L
H
L
H
L
R553
R553
R557
R557
*1K_4
*1K_4
10K_4
10K_4
R547
R547
R538
R538
*1K_4
*1K_4
10K_4
10K_4
F4
D30 SSM14 D30 SSM14
2 1
+5V
CRT PORT
close to NB & VGA connector
EXT_VGA_RED 21
EXT_VGA_GRN 21
EXT_VGA_BLU 21
EXT_HSYNC 21
EXT_VSYNC 21
EXT_CRT_DDCCLK 21
EXT_CRT_DDCDAT 21
A A
INT_CRT_RED 12
INT_CRT_GRN 12
INT_CRT_BLU 12
INT_HSYNC 12
INT_VSYNC 12
INT_CRT_DDCCLK 12
INT_CRT_DDCDAT 12
R196 EV@0_4 R196 EV@0_4
R195 EV@0_4 R195 EV@0_4
R194 EV@0_4 R194 EV@0_4
R198 EV@0_4 R198 EV@0_4
R197 EV@0_4 R197 EV@0_4
R193 EV@0_4 R193 EV@0_4
R192 EV@0_4 R192 EV@0_4
R184 IV@0_4 R184 IV@0_4
R183 IV@0_4 R183 IV@0_4
R182 IV@0_4 R182 IV@0_4
R187 IV@0_4 R187 IV@0_4
R186 IV@0_4 R186 IV@0_4
R181 IV@0_4 R181 IV@0_4
R180 IV@0_4 R180 IV@0_4
5
CRT_R
CRT_G
CRT_B
HSYNC
VSYNC
DDCCLK
DDCDAT
+5V
+3V
+5V
4
CRT_R
CRT_G
CRT_B
5V_CRT2
C25 0.22u/10V_6 C25 0.22u/10V_6
CRT_R1
CRT_G1
CRT_B1
+3V
C24
C24
0.1u/10V_4
0.1u/10V_4
R8
150/F_4R8150/F_4
1
7
8
2
3
4
5
6
C18
C18
0.1u/10V_4
0.1u/10V_4
U4
VCC_SYNC
VCC_DDC
BYP
VCC_VIDEO
VIDEO_1
VIDEO_2
VIDEO_3
GND
CM2009U4CM2009
R6
C11
C11
150/F_4R6150/F_4
10p_4
10p_4
SYNC_OUT2
SYNC_OUT1
SYNC_IN2
SYNC_IN1
DDC_IN1
DDC_IN2
DDC_OUT1
DDC_OUT2
H=1.75mm
C8
10p_4C810p_4
16
14
15
13
10
11
9
12
F4
FUSE1A6V_POLY-1A-6V
FUSE1A6V_POLY-1A-6V
L6 BK1608HS4701_6 L6 BK1608HS4701_6
L5 BK1608HS470_6 L5 BK1608HS470_6
L4 BK1608HS470_6 L4 BK1608HS470_6
C5
R4
10p_4C510p_4
150/F_4R4150/F_4
A:(8/20) change from 39 to 0 ohm
Because MXM side already be stuff 30ohm
VSYNC1
R14 0_4 R14 0_4
HSYNC1
R13 0_4 R13 0_4 L7
VSYNC
HSYNC
DDCCLK
DDCDAT
DDCCLK
DDCDAT
A:(8/28) change from 2.2k to 4.7k
Follow AMD check list
C433 0.1U_4 C433 0.1U_4
1 2
VSYNC1_CRT
HSYNC1_CRT
R22 4.7K_4 R22 4.7K_4
R21 4.7K_4 R21 4.7K_4
3
5V_CRT2
25 MIL
C4
10p_4C410p_4
R5
6.8K_4R56.8K_4
CRT_R1
CRT_G1
CRT_B1
C:(12/17) Change L4,L5,L6 from CX8BA220007 to CX0HM121008 (EMI issue)
RAMP:(1/21) Change L4,L5,L6 to CX0HS470001
C10
C10
C7
10p_4
10p_4
10p_4C710p_4
L8 BLM18BA220SN1_6 L8 BLM18BA220SN1_6
L7
BLM18BA220SN1_6
BLM18BA220SN1_6
5V_CRT2
R7
A:(8/28) change from 2.7k to 6.8k
6.8K_4R76.8K_4
Follow AMD check list
+3V
C14
C14
*10p_4
*10p_4
C6
*10p_4C6*10p_4
CRTVSYNC
CRTHSYNC
LCD_ON
C13
C13
*10p_4
*10p_4
A:(9/3) default no stuff
CRTDCLK
CRTDDAT
C9
*10p_4C9*10p_4
A:(8/27) default no stuff
DSUB-070549FR015SX03CX-15P-V
DSUB-070549FR015SX03CX-15P-V
2
16 17
CN18
CN18
B:(10/26)no stuff D4 for CRT CONN CN18/Pin11 (BOI request)
RAMP:(1/15) DEL D4,D5 footprint and DEL Net CRT_SENSE#
6
11 1
7
2
8
3
9
4
10
5
B:(10/16) fix CRT connect error
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SB600 STRAPS/TV/CRT
SB600 STRAPS/TV/CRT
SB600 STRAPS/TV/CRT
Date: Sheet
Date: Sheet
Date: Sheet
T174T174
12
13
14
A:(8/20) Reserve Diode for ESD solution
15
B:(11/1) Change CN18 P/N to DFDS15FR048
(Follow BL5S & ME)
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
1
3C
3C
18 42 Tuesday, January 22, 2008
18 42 Tuesday, January 22, 2008
18 42 Tuesday, January 22, 2008
3C
of
of
of
5
BTO
C80 *CEC@22p_6 C80 *CEC@22p_6
C81 *CEC@22p_6 C81 *CEC@22p_6
D D
C69 *CEC@0.1u/10V_4 C69 *CEC@0.1u/10V_4
*CEC@G691L308T73UF
*CEC@G691L308T73UF
U10
U10
(all parts in the page)
XIN_CEC
Y4
Y4
*CEC@8 MHz
*CEC@8 MHz
2 1
Reset#
XOUT_CEC
CEC_POWER
3
Vcc
CEC-RESET#
1
2
GND
CEC_POWER
T11T11
T15T15
CEC_POWER
C55
C55
CEC@1u/10V_6
CEC@1u/10V_6
3
1
CEC-RESET#
CEC-MODE
C56
C56
CEC@0.1u/10V_4
CEC@0.1u/10V_4
R90 CEC@47K_4 R90 CEC@47K_4
R91 CEC@47K_4 R91 CEC@47K_4
CEC-RESET#
4
CEC-MODE
2
RP10 CEC@4.7KX2 RP10 CEC@4.7KX2
XIN_CEC
XOUT_CEC
Reserve Test Pad for Debug
R92
R92
+5VPCU
*CEC@0_4
*CEC@0_4
R52
R52
+3VPCU
CEC@0_4
CEC@0_4
C C
CEC_POWER
4
U11
U11
7
VCC
16
VCC
4
XOUT
6
XIN
3
RESET
8
MODE
5
VSS
15
NC
14
NC
11
NC
CEC@R5F211A4C21SP#W4
CEC@R5F211A4C21SP#W4
To IV/EV VGA
Hot Plug Detect
DDCSDA
DDCSCL
TEST1
TEST0
CEC OUT
CEC IN
HPDET
R69
R69
CEC@2.2K_4
CEC@2.2K_4
CEC_SCL
1
SCL
CEC_SDA
20
SDA
HDMI_CEC_SDA_L
18
HDMI_CEC_SCL_L
17
RP7 CEC@4.7KX2 RP7 CEC@4.7KX2
13
12
10
9
19
2
NC
To EC
Named to IV_HDMI_HPD from HTPLG
CEC_POWER
R68
R68
CEC@2.2K_4
CEC@2.2K_4
4
3
2
1
CEC_OUT
RAMP:(1/8) Correct net neme for HDMI issue
CEC_IN
HPDET
CEC_EC_HP 29
DVI_HPD 21
IV_HDMI_HPD 12
CEC_POWER
C53 HDM@0.1u/10V_4 C53 HDM@0.1u/10V_4
R61
R61
EV@1K_4
EV@1K_4
R63
R63
IV@1K_4
IV@1K_4
3
+3V_S5 +3VPCU
*CEC@0_4
*CEC@0_4
R87
R87
CEC_P
Q23
Q23
CEC_SCL
3
C67
C67
*CEC@.1U_4
*CEC@.1U_4
C60 CEC@0.1u/10V_4 C60 CEC@0.1u/10V_4
C52 HDM@0.1u/10V_4 C52 HDM@0.1u/10V_4
+3V
4
CEC@0_4
CEC@0_4
R86
R86
2
CEC@FDV301N
CEC@FDV301N
CEC_SDA
C66
C66
*CEC@.1U_4
*CEC@.1U_4
HPDET
5 3
1
2
U7
U7
HDM@TC7SH08FU
HDM@TC7SH08FU
CEC_SCL_S
1
CEC_P
Q22
Q22
3
CEC_POWER
5
4 3
CEC@NL17SZ17
CEC@NL17SZ17
CEC_POWER
5
4 3
CEC@NL17SZ17
CEC@NL17SZ17
PLTRST#
CEC_SCL_S
CEC_SDA_S
2
1
CEC@FDV301N
CEC@FDV301N
U9
U9
1
2
U8
U8
1
2
PLTRST# 14,21,24,25,27,29
RP9
RP9
2
4
*CEC@0_4P2R_S
*CEC@0_4P2R_S
RP8
RP8
4
2
CEC@0_4P2R_S
CEC@0_4P2R_S
CEC_SDA_S
R64 HDM@1.2K_4 R64 HDM@1.2K_4
R62
R62
HDM@470K_4
HDM@470K_4
2
Named to SCLK1 & SDATA1 from SCLK & SDATA
1
3
3
1
SCLK1 15
SDATA1 15
3ND_MBCLK 21,28,29
3ND_MBDATA 21,28,29
Named to HDMI_HPD from HDMI_HP
HDMI_HPD
From HDMI conn Pin 19
(Hot Plug Det)
PLTRST#
RAMP:(1/17)Reserve C826 (0.1uF) for PLTRST# (U7/Pin2)
C826
C826
*.1U_4
*.1U_4
To SB
To EC
CEC_OUT
9/07 Add
B:(11/1) No stuff U13,C84. It will result in leakage
CEC@10K_4
CEC@10K_4
Q24
Q24
CEC@2SK3541
CEC@2SK3541
R82
R82
CEC@100K_4
CEC@100K_4
CEC_POWER
*CEC@NL17SZ17
*CEC@NL17SZ17
R81
R81
3
2
U13
U13
5
4 3
1
1
CEC@2SK3541
CEC@2SK3541
Q25
Q25
1
2
C84 *CEC@0.1u/10V_4 C84 *CEC@0.1u/10V_4
CEC_IN
R78 CEC@27K_4 R78 CEC@27K_4
+3VPCU CEC_POWER
D8
D8
CEC@CH500H-40
CEC@CH500H-40
R93
R93
CEC@27K_4
CEC@27K_4
3
2
1
CEC
To HDMI CONN Pin 13
HDMI
A:(8/21) change net name from
B B
INT_LVDS_EDIDCLK to IV_HDMI_DDCCLK
Close to HDMI Connector
B:(10/22) add level shift for CEC
R169
R169
HDM@39K_4
HDM@39K_4
HDMI_DDCCLK HDMI_SCL
A:(8/27) change from 2k to 39k
(Follow AMD check list)
R201
A A
HDMI_DDCDATA
R201
HDM@39K_4
HDM@39K_4
IV_HDMITX2P 11
IV_HDMITX2N 11
EXT_HDMITX2P 21
EXT_HDMITX2N 21
IV_HDMITX1P 11
IV_HDMITX1N 11
EXT_HDMITX1P 21
EXT_HDMITX1N 21
IV_HDMITX0P 11
IV_HDMITX0N 11
EXT_HDMITX0P 21
EXT_HDMITX0N 21
IV_HDMICLK+ 11
IV_HDMICLK- 11
EXT_HDMICLK+ 21
EXT_HDMICLK- 21
IV_HDMI_DDCCLK 12
IV_HDMI_DDCDATA 12
EXT_HDMI_DDCCLK 21
EXT_HDMI_DDCDAT 21
+3V
1
2
Q31 HDM@2SK3541 Q31 HDM@2SK3541
R459 *CEC@0_4 R459 *CEC@0_4
+3V
1
2
Q32 HDM@2SK3541 Q32 HDM@2SK3541
R460 *CEC@0_4 R460 *CEC@0_4
HDMI_CEC_SCL HDMI_CEC_SCL_L
HDMI_CEC_SDA HDMI_CEC_SDA_L
RAMP:(1/15) Add R651,R652 0 ohm for CEC SDA/SCL net
Pleace R651,R652 as close to Q33,Q36 as possible
5
3
3
R652 HDM@0_4 R652 HDM@0_4
R651 HDM@0_4 R651 HDM@0_4
IV_HDMITX2P
IV_HDMITX2N
IV_HDMITX1P
IV_HDMITX1N
IV_HDMITX0P
IV_HDMITX0N
IV_HDMICLK+
IV_HDMICLK-
IV_HDMI_DDCCLK
IV_HDMI_DDCDATA
CEC_POWER
R168
R168
HDM@15K_4
HDM@15K_4
HDMI_CEC_SCL
HDMI_CEC_SCL
HDMI_CEC_SDA
close to NB & VGA connector
4
2
RN7 IV@0X2 RN7 IV@0X2
2
4
RN19 EV@0X2 RN19 EV@0X2
4
2
RN6 IV@0X2 RN6 IV@0X2
2
4
RN20 EV@0X2 RN20 EV@0X2
RN5 IV@0X2 RN5 IV@0X2
2
4
2
4
RN21 EV@0X2 RN21 EV@0X2
4
2
RN8 IV@0X2 RN8 IV@0X2
2
4
RN18 EV@0X2 RN18 EV@0X2
RN4 IV@0X2 RN4 IV@0X2
2
4
RN17 EV@0X2 RN17 EV@0X2
4
2
R171
R171
HDM@15K_4
HDM@15K_4
2
Q33 HDM@2SK3541 Q33 HDM@2SK3541
R637 *CEC@0_4 R637 *CEC@0_4
2
Q36 HDM@2SK3541 Q36 HDM@2SK3541
R668 *CEC@0_4 R668 *CEC@0_4
CEC_POWER
RAMP:(1/15) DEL C227,C226
CEC_POWER
3
1
1
3
3
1
1
3
1
3
1
3
3
1
1
3
1
3
3
1
+5VPCU
R457
R457
HDM@15K_4
1
1
HDM@15K_4
3
3
HDMITX2P_C
HDMITX2N_C
HDMITX1P_C
HDMITX1N_C
RAMP:(1/17)SWAP RN6,RN7,RN8 for HDMI layout routing
HDMITX0P_C
HDMITX0N_C
HDMICLK+_C
HDMICLK-_C
HDMI_DDCCLK
HDMI_DDCDATA
HDMI_DDCDATA
+3V
2
Q64
Q64
R458
R458
HDM@15K_4
HDM@15K_4
HDMI_SDA
4
1
IV@FDV301N
IV@FDV301N
+3V
2
Q66
Q66
1
IV@FDV301N
IV@FDV301N
+3V
2
Q67
Q67
1
IV@FDV301N
IV@FDV301N
+3V
2
Q59
Q59
1
IV@FDV301N
IV@FDV301N
A:(8/23) Based on AMD spec
(TMDS Signal pairs routing rule) ,add solution
RAMP:(1/15) DEL L56,L57,L58,L59,R465,R474,R493,R495,R486,R488,R478,R483
3
3
3
3
R174 IV@750_4 R174 IV@750_4
R175 IV@750_4 R175 IV@750_4
R176 IV@750_4 R176 IV@750_4
R177 IV@750_4 R177 IV@750_4
R185 IV@750_4 R185 IV@750_4
R191 IV@750_4 R191 IV@750_4
R172 IV@750_4 R172 IV@750_4
R173 IV@750_4 R173 IV@750_4
HDMITX2P_C
HDMITX2N_C
HDMITX1P_C
HDMITX1N_C
HDMITX0P_C
HDMITX0N_C
HDMICLK+_C
HDMICLK-_C
3
HDMITX0N_C
HDMITX0P_C
HDMITX1P_C
HDMITX1N_C
HDMITX2P_C
HDMITX2N_C
HDMICLK+_C
HDMICLK-_C
HDM@POLY 1.1A
HDM@POLY 1.1A
+5VPCU
C471
C471
*HDM@10U/10V/X5R_8
*HDM@10U/10V/X5R_8
F5
F5
HDMI_HPD
ESD6
ESD6
1
1
2
2
3
VCC
4
4
5
5
ESD5
ESD5
1
1
2
2
3
VCC
4
4
5
5
HDMI_SCL
HDMI_SDA
DDC5V
C479
C479
HDM@0.1U/10V/X5R_4
HDM@0.1U/10V/X5R_4
10
9
GND
7
6
*HDM@RCIamp0514M
*HDM@RCIamp0514M
10
9
GND
7
6
*HDM@RCIamp0514M
*HDM@RCIamp0514M
ESD4
ESD4
1
1
2
2
3
VCC
GND
4
4
5
5
*HDM@RCIamp0514M
*HDM@RCIamp0514M
Layout note:
Place close
to HDMI
Conn
2
CN25
CN25
HDMITX0N_C
10
HDMITX0P_C
9
8
HDMITX1P_C
7
HDMITX1N_C
6
HDMITX2P_C
10
HDMITX2N_C
9
8
HDMICLK+_C
7
HDMICLK-_C
6
HDMI_SCL
10
10
HDMI_SDA
9
9
8
DDC5V
7
7
HDMI_HPD
6
6
HDMITX2P_C
HDMITX2N_C
HDMITX1P_C
HDMITX1N_C
HDMITX0P_C
HDMITX0N_C
HDMICLK+_C
HDMICLK-_C
CEC
HDMI_SCL
HDMI_SDA
DDC5V
HDMI_HPD
C:(12/7)Change HDMI footprint to HDMI-C12816-119A5-L-19P-H-BD3
C:(11/29) HDMI SMT B open issue
update HDMI CONN footprint from HDMI-C12816-119A5-L-19P-H-BL5
to HDMI-C12816-119A5-L-19P-V-BL5-1
B:(10/18) update CN25 - HDMI footpritnt HDMI-C12816-119A5-L-19P-H-BL5
RAMP:(1/8) Change back HDMI connector(CN25) footprint
from HDMI-C12816-119A5-L-19P-H-BD3 to HDMI-C12816-119A5-L-19P-H-BL5
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
HDMI + CEC
HDMI + CEC
HDMI + CEC
Date: Sheet of
Date: Sheet of
Date: Sheet
1
D2+
2
D2 Shield
3
D2-
4
D1+
5
D1 Shield
6
7
8
9
10
11
12
13
14
15
16
17
18
19
LAYOUT must support
connectors from JAE,
Molex, and Acon
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
20
SHELL1
D1-
21
SHELL2
D0+
D0 Shield
22
D0-
SHELL3
23
CK+
SHELL4
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
HDM@HDMI-C12816-119A5-L
HDM@HDMI-C12816-119A5-L
19 43 Tuesday, January 22, 2008
19 43 Tuesday, January 22, 2008
1
19 43 Tuesday, January 22, 2008
of
3C
3C
3C
1
LCD Switch
TXUCLKOUTTXUCLKOUT+
TXUOUT0TXUOUT0+
A A
TXUOUT1TXUOUT1+
TXUOUT2TXUOUT2+
TXLCLKOUTTXLCLKOUT+
TXLOUT0TXLOUT0+
B B
TXLOUT1TXLOUT1+
TXLOUT2TXLOUT2+
C C
RN9 IV@0X2 RN9 IV@0X2
4
2
RN10 IV@0X2 RN10 IV@0X2
4
2
RN11 IV@0X2 RN11 IV@0X2
4
2
RN12 IV@0X2 RN12 IV@0X2
4
2
RN28 EV@0X2 RN28 EV@0X2
1
3
RN27 EV@0X2 RN27 EV@0X2
1
3
RN26 EV@0X2 RN26 EV@0X2
1
3
RN25 EV@0X2 RN25 EV@0X2
1
3
RN13 IV@0X2 RN13 IV@0X2
4
2
RN14 IV@0X2 RN14 IV@0X2
4
2
RN15 IV@0X2 RN15 IV@0X2
4
2
RN16 IV@0X2 RN16 IV@0X2
4
2
RN29 EV@0X2 RN29 EV@0X2
1
3
RN24 EV@0X2 RN24 EV@0X2
1
3
RN23 EV@0X2 RN23 EV@0X2
1
3
RN22 EV@0X2 RN22 EV@0X2
1
3
2
3
1
3
1
3
1
3
1
2
4
2
4
2
4
2
4
3
1
3
1
3
1
3
1
2
4
2
4
2
4
2
4
INT_TXUCLKOUT- 12
INT_TXUCLKOUT+ 12
INT_TXUOUT0- 12
INT_TXUOUT0+ 12
INT_TXUOUT1- 12
INT_TXUOUT1+ 12
INT_TXUOUT2- 12
INT_TXUOUT2+ 12
EXT_LVDS_TXUCK# 21
EXT_LVDS_TXUCK 21
EXT_LVDS_TXU#0 21
EXT_LVDS_TXU0 21
EXT_LVDS_TXU#1 21
EXT_LVDS_TXU1 21
EXT_LVDS_TXU#2 21
EXT_LVDS_TXU2 21
INT_TXLCLKOUT- 12
INT_TXLCLKOUT+ 12
INT_TXLOUT0- 12
INT_TXLOUT0+ 12
INT_TXLOUT1- 12
INT_TXLOUT1+ 12
INT_TXLOUT2- 12
INT_TXLOUT2+ 12
EXT_LVDS_TXLCK# 21
EXT_LVDS_TXLCK 21
EXT_LVDS_TXL#0 21
EXT_LVDS_TXL0 21
EXT_LVDS_TXL#1 21
EXT_LVDS_TXL1 21
EXT_LVDS_TXL#2 21
EXT_LVDS_TXL2 21
3
4
HALL SENSOR
+3VPCU
+3V
R12
R12
1K_4
1K_4
DISPON
D27 BAS316 D27 BAS316
Close to NB & VGA Connector
DISPON
3
2
Q41
Q41
ME2N7002D
ME2N7002D
1
ME2N7002D
ME2N7002D
2
Q4
1 3
DTC144EUQ4DTC144EU
B:(10/16) change from BAS316 to 0 ohm
EXT_DISP_ON 21
INT_LVDS_DIGON 12
R524 EV@0_4 R524 EV@0_4
R525 IV@0_4 R525 IV@0_4
R403 100K_4 R403 100K_4
LID591#
2
1
MR4
2
Q10
Q10
PDTC143TT
PDTC143TT
2
R20 100K_4 R20 100K_4
3
R406
R406
100K_4
100K_4
+3VPCU
MR4
PT3661-BB
PT3661-BB
2 1
D36
D36
VPORT
VPORT
R674 IV@0_4 R674 IV@0_4
R677 EV@0_4 R677 EV@0_4
R689 *0_4 R689 *0_4
R675
R675
100K_4
100K_4
+15V
R18
R18
330K_6
330K_6
2
ME2N7002D
ME2N7002D
1 3
C424
C424
0.1u/10V_4
0.1u/10V_4
+3V
R388
R388
10K_4
10K_4
BL#
C:(11/30) Change circuit to slove
LCD panel will flash when system into S3/S4/S5 and change mode issue.
DISPON signal have one pulse(2V) when this symptom happen
3
Q38
Q38
1
8/14 Change LCDVCC Circuit
5
B:(10/26) update HALL sensor PN
RAMP:(1/17) ADD D73,74,75 ESD solution for CN4 (LCD CONN - CCD signal)
RAMP:(1/15) Add D36(Varistor) for LID591# (ESD issue)
LID591# 29
EMI CAP
INVCC0
CCD_POWER
+3V
INT_LVDS_BLON 12
EXT_LVDS_BLON 21
65mil
2
C22
C22
0.01u/25V_4
0.01u/25V_4
2
Q50
Q50
EC_BLON 29
EC_FPBACK# 29
+3V
3
Q51
Q51
AO3404
AO3404
LCDVCC1
1
65mil
R407
R407
22_8
22_8
LCDDISCHG
3
1
L49
L49
0_6
0_6
0.1u/16V_4
0.1u/16V_4
D28 *BAS316 D28 *BAS316
RAMP:(1/9) EnegryStar 4.0 Idle power issue
When BLON= High, Turn ON LCD then turn ON MMB
When BLON= Low, Turn OFF LCD then turn OFF MMB
RAMP:(1/18) default no stuff R689 for RAMP
LCDONG
3
Q7
ME2N7002DQ7ME2N7002D
1
LCDON#
C:(12/14) Stuff EMI CAP
C19
C19
C17
C17
0.01u/16V_4
0.01u/16V_4
LCD_VCC
65mil
LCD_VCC
6
LCD TYPE CONNECTOR
8/13 Change Size To 1206
D75 EGA D75 EGA
2 1
D73 EGA D73 EGA
2 1
D74 VPORT D74 VPORT
2 1
CCD_USBP2+
CCD_USBP2CCD_POWER
B:(10/16) modify LVDS CONN Pin5 from NC to INVCC0
MIC_GND
R16 I_MIC0_4 R16 I_MIC0_4
R15 I_MIC0_4 R15 I_MIC0_4
BTO
C426 .1U_4 C426 .1U_4
C429 .1U_4 C429 .1U_4
C428 .1U_4 C428 .1U_4
C427 .1U_4 C427 .1U_4
CAMERA MODULE
+5V
A:(8/20) Remove switch IC, Modify ckt to original ckt
C15
C15
10u/6.3V_6
10u/6.3V_6
EXT_LVDS_PNLCLK 21
INT_LVDS_EDIDCLK 12
EXT_LVDS_PNLDAT 21
INT_LVDS_EDIDDATA 12
INT_LVDS_PWM 12
CONTRAST 29
7
VIN
+3V
R23 0_8 R23 0_8
1 2
C26
C26
+
+
10u/25V_1206
10u/25V_1206
INVCC0
CCD_POWER
MIC_GND_R
Analog MIC_R Analog MIC
DISPON
TXLCLKOUT+
TXLCLKOUT- TXUCLKOUT-
TXLOUT0+
TXLOUT0-
TXLOUT1+
TXLOUT1-
TXLOUT2+
TXLOUT2-
1000P_4
1000P_4
C:(12/17)No stuff C431(CH11006JB18) for HDMI function
ACES_88242-40XX_LVDS
ACES_88242-40XX_LVDS
B:(10/22) change CN4 PN from DFHS40FS825 to DFWF40MS000 (SMT-ME suggest )
8/14 Modify Pin Define
LCD PANEL MODULE
R24 CCD@0_8 R24 CCD@0_8
CCD_POWER
1
3
C29 CCD@10U_8
Q9
Q9
2
*CCD@AO3413
*CCD@AO3413
R413 EV@0_4 R413 EV@0_4
R414 IV@0_4 R414 IV@0_4
R409 EV@0_4 R409 EV@0_4
R411 IV@0_4 R411 IV@0_4
R415 *0_4 R415 *0_4
R416 0_4 R416 0_4
C435 *.1U_4 C435 *.1U_4
C29 CCD@10U_8
C27 *CCD@1000P_4 C27 *CCD@1000P_4
A:(8/30) Follow TE1, no stuff 1000p,0.1u
C28 *CCD@.1U_4 C28 *CCD@.1U_4
+3V
R412
R412
A:(8/27) change from 2.2K to 39K
39K_4
39K_4
+3V
R410
R410
39K_4
39K_4
+
+
A:(8/28) change from 2.2K to 4.7K
Follow AMD check list
A:(9/5) change from 4.7K to 39K
Follow AMD PA documents
C21
C21
CN4
CN4
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41 42
CCD_POWER
LCD_EDIDCLK
LCD_EDIDDATA
LCD_VADJ
8
INVCC0
LCD_EDIDDATA
LCD_EDIDCLK
LCD_VADJ
LCD_VCC
2
4
LCD_EDIDDATA
6
LCD_EDIDCLK
8
LCD_VADJ
10
12
CCD_USBP2+
14
CCD_USBP2-
16
18
TXUCLKOUT+
20
22
24
TXUOUT0+
26
TXUOUT0-
28
30
TXUOUT1+
32
TXUOUT1-
34
36
TXUOUT2+
38
TXUOUT2-
40
+5V
BTO
R17
R17
*CCD@4.7K_4
*CCD@4.7K_4
2
Q8
Q8
1 3
*CCD@DTC144EU
*CCD@DTC144EU
C430
C430
100p/50V_4
100p/50V_4
C431
C431
*100p/50V_4
*100p/50V_4
C432
C432
100p/50V_4
100p/50V_4
CCD_USBP2+ 15
CCD_USBP2- 15
CCD_POWERON 29
I_MIC@INT_MIC
C20
C20
I_MIC@INT_MIC
R19
R19
*I_MIC@0_4
*I_MIC@0_4
2
1
CN5
CN5
RAMP:(1/15) DEL L50 footprint , DEL RP33(short directly) for CCD circuit
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
LCD CONN & SWITCH
LCD CONN & SWITCH
LCD CONN & SWITCH
Date: Sheet of
Date: Sheet of
Date: Sheet
7
Quanta Computer Inc.
of
20 43 Tuesday, January 22, 2008
20 43 Tuesday, January 22, 2008
20 43 Tuesday, January 22, 2008
8
3C
3C
3C
Analog MIC
D D
C:(12/17) Stuff C20,C23 to 100pF (CH11006JB18) for EMI issue
MIC_GND
I_MIC@100P_4
I_MIC@100P_4
C23
C23
I_MIC@100P_4
I_MIC@100P_4
BTO
ADOGND1
1
2
3
4
5
6
5
PEG_TXN15 11
PEG_TXP15 11
PEG_TXN14 11
PEG_TXP14 11
PEG_TXN13 11
PEG_TXP13 11
PEG_TXN12 11
D D
C C
EXT_HDMI_DDCCLK 19
EXT_HDMI_DDCDAT 19
B B
A A
PEG_TXP12 11
PEG_TXN11 11
PEG_TXP11 11
PEG_TXN10 11
PEG_TXP10 11
PEG_TXN9 11
PEG_TXP9 11
PEG_TXN8 11
PEG_TXP8 11
PEG_TXN7 11
PEG_TXP7 11
PEG_TXN6 11
PEG_TXP6 11
PEG_TXN5 11
PEG_TXP5 11
PEG_TXN4 11
PEG_TXP4 11
PEG_TXN3 11
PEG_TXP3 11
PEG_TXN2 11
PEG_TXP2 11
PEG_TXN1 11
PEG_TXP1 11
PEG_TXN0 11
PEG_TXP0 11
EXT_CRT_DDCCLK 18
EXT_CRT_DDCDAT 18
EXT_LVDS_PNLCLK 20
EXT_LVDS_PNLDAT 20
EXT_VGA_RED 18
EXT_VGA_GRN 18
EXT_VGA_BLU 18
EXT_LVDS_TXL#2 20
EXT_LVDS_TXL2 20
EXT_LVDS_TXL#1 20
EXT_LVDS_TXL1 20
EXT_LVDS_TXL#0 20
EXT_LVDS_TXL0 20
EXT_LVDS_TXLCK# 20
EXT_LVDS_TXLCK 20
EXT_TV_C/R 18
EXT_TV_Y/G 18
T43T43
EXT_HDMICLK- 19
EXT_HDMICLK+ 19
EXT_HDMITX2N 19
EXT_HDMITX2P 19
EXT_HDMITX1N 19
EXT_HDMITX1P 19
EXT_HDMITX0N 19
EXT_HDMITX0P 19
A:(9/14) no stuff for A-stage
PEG_TXN15
PEG_TXP15
PEG_TXN14
PEG_TXP14
PEG_TXN13
PEG_TXP13
PEG_TXN12
PEG_TXP12
PEG_TXN11
PEG_TXP11
PEG_TXN10
PEG_TXP10
PEG_TXN9
PEG_TXP9
PEG_TXN8
PEG_TXP8
PEG_TXN7
PEG_TXP7
PEG_TXN6
PEG_TXP6
PEG_TXN5
PEG_TXP5
PEG_TXN4
PEG_TXP4
PEG_TXN3
PEG_TXP3
PEG_TXN2
PEG_TXP2
PEG_TXN1
PEG_TXP1
PEG_TXN0
PEG_TXP0
EXT_CRT_DDCCLK
EXT_CRT_DDCDAT
EXT_HDMI_DDCCLK
EXT_HDMI_DDCDAT
EXT_LVDS_PNLCLK
EXT_LVDS_PNLDAT
EXT_VGA_RED
EXT_VGA_GRN
EXT_VGA_BLU
EXT_LVDS_TXL#2
EXT_LVDS_TXL2
EXT_LVDS_TXL#1
EXT_LVDS_TXL1
EXT_LVDS_TXL#0
EXT_LVDS_TXL0
EXT_LVDS_TXLCK#
EXT_LVDS_TXLCK
EXT_TV_C/R
EXT_TV_Y/G
EXT_TV_COMP
EXT_HDMICLK-
EXT_HDMICLK+
EXT_HDMITX2N
EXT_HDMITX2P
EXT_HDMITX1N
EXT_HDMITX1P
EXT_HDMITX0N
EXT_HDMITX0P
5
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
62
62
64
64
66
66
68
68
70
70
72
72
74
74
76
76
78
78
80
80
82
82
84
84
86
86
88
88
90
90
92
92
94
94
96
96
98
98
100
100
102
102
104
104
106
106
108
108
110
110
112
112
114
114
116
116
118
118
120
120
122
122
124
124
126
126
128
128
130
130
132
132
134
134
136
136
138
138
140
140
142
142
144
144
146
146
148
148
150
150
152
152
154
154
156
156
158
158
160
160
162
162
164
164
166
166
168
168
170
170
172
172
174
174
176
176
178
178
180
180
182
182
184
184
186
186
188
188
190
190
192
192
194
194
196
196
198
198
200
200
EV@Tyco
EV@Tyco
A:(8/18) update VGA conn footprint base on Allan information
A:(8/23) update VGA conn pin-define (change pin 1 location)
CN27
CN27
PEG_RXN15
1
1
PEG_RXP15
3
3
5
5
PEG_RXN14
7
7
PEG_RXP14
9
9
11
11
PEG_RXN13
13
13
PEG_RXP13
15
15
17
17
PEG_RXN12
19
19
PEG_RXP12
21
21
23
23
PEG_RXN11
25
25
PEG_RXP11
27
27
29
29
PEG_RXN10
31
31
PEG_RXP10
33
33
35
35
PEG_RXN9
37
37
PEG_RXP9
39
39
41
41
PEG_RXN8
43
43
PEG_RXP8
45
45
47
47
PEG_RXN7
49
49
PEG_RXP7
51
51
53
53
PEG_RXN6
55
55
PEG_RXP6
57
57
59
59
PEG_RXN5
61
61
PEG_RXP5
63
63
65
65
PEG_RXN4
67
67
PEG_RXP4
69
69
71
71
PEG_RXN3
73
73
PEG_RXP3
75
75
77
77
PEG_RXN2
79
79
PEG_RXP2
81
81
83
83
PEG_RXN1
85
85
PEG_RXP1
87
87
89
89
PEG_RXN0
91
91
PEG_RXP0
93
93
95
95
MXM_REFCLKN
97
97
MXM_REFCLKP
99
99
101
101
103
103
105
105
107
107
109
109
VGA_MBDATA
111
111
VGA_MBCLK
113
113
115
115
117
117
119
119
121
121
EXT_HSYNC
123
123
EXT_VSYNC
125
125
127
127
EXT_LVDS_TXU#2
129
129
EXT_LVDS_TXU2
131
131
133
133
EXT_LVDS_TXU#1
135
135
EXT_LVDS_TXU1
137
137
139
139
EXT_LVDS_TXU#0
141
141
EXT_LVDS_TXU0
143
143
145
145
EXT_LVDS_TXUCK#
147
147
EXT_LVDS_TXUCK
149
149
151
151
153
153
155
155
157
157
159
159
161
161
163
163
165
165
167
167
169
169
171
171
173
173
175
175
177
177
179
179
181
181
183
183
185
185
187
187
189
189
191
191
193
193
195
195
197
197
199
199
+5V
+3V
4A
EV@.1U_4
EV@.1U_4
4
PEG_RXN15 11
PEG_RXP15 11
PEG_RXN14 11
PEG_RXP14 11
PEG_RXN13 11
PEG_RXP13 11
PEG_RXN12 11
PEG_RXP12 11
PEG_RXN11 11
PEG_RXP11 11
PEG_RXN10 11
PEG_RXP10 11
PEG_RXN9 11
PEG_RXP9 11
PEG_RXN8 11
PEG_RXP8 11
PEG_RXN7 11
PEG_RXP7 11
PEG_RXN6 11
PEG_RXP6 11
PEG_RXN5 11
PEG_RXP5 11
PEG_RXN4 11
PEG_RXP4 11
PEG_RXN3 11
PEG_RXP3 11
PEG_RXN2 11
PEG_RXP2 11
PEG_RXN1 11
PEG_RXP1 11
PEG_RXN0 11
PEG_RXP0 11
MXM_REFCLKN 3
MXM_REFCLKP 3
PLTRST# 14,19,24,25,27,29
SYSFANON# 6
MAINON 29,36,37
GFXPG 29
EXT_LVDS_BLON 20
EXT_DISP_ON 20
DVI_HPD 19
EXT_HSYNC 18
EXT_VSYNC 18
EXT_LVDS_TXU#2 20
EXT_LVDS_TXU2 20
EXT_LVDS_TXU#1 20
EXT_LVDS_TXU1 20
EXT_LVDS_TXU#0 20
EXT_LVDS_TXU0 20
EXT_LVDS_TXUCK# 20
EXT_LVDS_TXUCK 20
A:(9/18) don’t connect pin 161, 167, 171, 183, 187,188
to ground and reserve test point for A build.
RAMP:(1/17)Reserve C825 (0.1uF) for PLTRST# (CN27/Pin103)
PLTRST#
C825
C825
*.1U_4
*.1U_4
3
0.5A
A:(9/19) don’t have enough space to put the test point,
Remove it for A-test
1.5A
A:(9/14) Reserve R492,R517(no stuff) for A-stage
RAMP:(1/15) Remove R492,R517, Short CN27/Pin189,190 to VIN directly.
VIN VIN
C566
C566
EV@10U/6.3V_6
EV@10U/6.3V_6
C565
C565
4
C563
C563
EV@.1U_4
EV@.1U_4
EV@10U/6.3V_6
EV@10U/6.3V_6
VIN +3V +5V
C548
C569
C569
C:(12/18) Stuff C568,C548(CH41006K911) for EMI issue
C568
C568
EV@.1U_6
EV@.1U_6
C548
EV@.1U_6
EV@.1U_6
A:(8/29) reserve 100u for VIN
+
C256
+
C256
*EV@100u/25V_6X7.7
*EV@100u/25V_6X7.7
3
+3V
R208
R208
EV@4.7K_4
EV@4.7K_4
VGA_MBCLK
B:(10/16) Add EV@ for R203,R208 (remove it for UMA sku)
R203
R203
EV@4.7K_4
EV@4.7K_4
VGA_MBDATA
EV@RHU002N06
EV@RHU002N06
EV@RHU002N06
EV@RHU002N06
Q37
Q37
2
1
Q34
Q34
1
3
3ND_MBCLK 19,28,29
+3V
2
3
3ND_MBDATA 19,28,29
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MXM CONNECTOR / TV
MXM CONNECTOR / TV
MXM CONNECTOR / TV
Date: Sheet
Date: Sheet
2
Date: Sheet
1
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
21 43 Tuesday, January 22, 2008
21 43 Tuesday, January 22, 2008
21 43 Tuesday, January 22, 2008
of
of
1
of
3C
3C
3C
5
Codec(CX20561)
REV_08
D D
C C
ACZ_RST#_AUDIO 15
BIT_CLK_AUDIO 15
ACZ_SYNC_AUDIO 15
ACZ_SDIN0 15
ACZ_SDOUT_AUDIO 15
SPDIF_OUT 23
B:(10/26) change R617 from 10k to 2.2k (no bi-bi sound issue when flash BIOS)
PCBEEP 15
A:(9/4) Add PC-BEEP ckt
B B
C:(12/7) no Stuff R371 for Audio issue:
When flash BIOS with B machine, there is not "bi bi" sound, but "bo bo" sound.
GAIN
0dB
-6dB
-12dB
-18dB
REV_04
Reserve INTMIC
A A
INT_MIC_R
ADOGND
L66 *PBY160808T-301Y-N_6 L66 *PBY160808T-301Y-N_6
+3V_S5
L67 PBY160808T-301Y-N_6 L67 PBY160808T-301Y-N_6
+3VSUS
REV_08
+3V_S5
+3VSUS
DIB_P 23
DIB_N 23
R617 2.2K_4 R617 2.2K_4
PC Beep GAIN CONTROL
R615 *0_4 R615 *0_4
R616 0_4 R616 0_4
R371
R371
*1K_4
*1K_4
B:(10/17) change from AGND to digital GND
GPIO1 GPIO2
10K 10K
omit omit
I_MIC@1K_4
I_MIC@1K_4
R649
R649
I_MIC@4.7K_4
I_MIC@4.7K_4
omit
10K
I_MIC@INT_MIC
I_MIC@INT_MIC
BTO
5
10K
omit
+3AVDD
ADOGND
R650
R650
C729
C729
*I_MIC@100p/50V_4
*I_MIC@100p/50V_4
I_MIC@10u/10V_8
I_MIC@10u/10V_8
C719
C719
CN39
CN39
2
2
1
1
R622 33_4 R622 33_4
Reserve for EMI
R644 MD@0_4 R644 MD@0_4
R645 MD@0_4 R645 MD@0_4
BTO
R639 0_4 R639 0_4
PCBEEP_C
C683
C683
0.1u/10V_4
0.1u/10V_4
C392
C392
100p/50V_4
100p/50V_4
ADOGND
+AZA_VDD
C706
C706
C698
C698
10u/10V_8
10u/10V_8
0.1u/10V_4
0.1u/10V_4
C682
C682
10u/10V_8
10u/10V_8
Determining HDA use +1.5V/+3V
C684
C684
0.1u/10V_4
0.1u/10V_4
ACZ_SDIN20561
DIB_P_L
DIB_N_L
PCBEEP_C
GPIO2
GPIO1
EAPD#
CX20561-12Z Not
support digital MIC
CX20561-13Z support
digital MIC
R638 *10K_4 R638 *10K_4
R643 *10K_4 R643 *10K_4
GPIO1
GPIO2
C699
C699
0.1u/10V_4
0.1u/10V_4
C692
C692
0.1u/10V_4
0.1u/10V_4
U38
U38
11
RESET#
6
BIT_CLK
10
SYNC
8
SDATA_IN
5
SDATA_OUT
43
DIB_P
42
DIB_N
12
PC_BEEP
48
S/PDIF
45
GPIO2
46
GPIO1
47
EAPD#/GPIO0
1
DMIC_CLOCK
2
DMIC_1/2
CX20561-12Z
CX20561-12Z
MIC1-RR MIC2_INT_R
4
A:(8/29) follow EMI suggestion, add 0.1 cap
+3AVDD
ADOGND ADOGND
+3AVDD
C726
C726
C727
C727
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
ADOGND
C718
C718
C723
C723
0.1u/10V_4
0.1u/10V_4
10u/10V_8
10u/10V_8
ADOGND
4
3
44
9
VDD_IO
DVDD_1-8
36
26
40
AVEE
34
PORTA_L
AVDD_26
AVDD_40
DVDD_44
DVDD_3-3
RESERVED_32
RESERVED_33
AVSS_38
DVSS_41
AVSS_25
DVSS_7
7
38
41
25
ADOGND
C700
C700
*100p/50V_4
*100p/50V_4
ADOGND ADOGND ADOGND ADOGND ADOGND ADOGND
4
35
PORTA_R
19
MICBIASB
14
PORTB_L
15
PORTB_R
18
MICBIASC
16
PORTC_L
17
PORTC_R
27
PORTD_L
28
PORTD_R
20
MIC_L
21
MIC_R
29
MONO
30
STEREO_L
31
STEREO_R
13
SENSEA
24
VREF
39
FLY_P
37
FLY_N
22
VREF_LO
23
VREF_HI
32
33
C691
C691
*100p/50V_4
*100p/50V_4
Change C6047, C6048,
C6049, C6070, C6071,
C6072 to 100p follow
Vendor suggestion
MIC1-LL
MIC1-RR
FM_linein_L
FM_linein_R
BTO
B:(10/22) reserve for WHQL
MIC2_INT_L
MIC2_INT_R
SPKR-L
SPKR-R
SENSEA
CX20561_VILT
CX20561_FLY_P
CX20561_FLY_N
CX20561_RVD22
CX20561_RVD23
FM_linein_L
FM_linein_R
+5V_VDD
C697
C714
C714
0.1u/10V_4
0.1u/10V_4
C717
C717
10u/10V_8
10u/10V_8
C697
0.1u/10V_4
0.1u/10V_4
REV_08
L39 PBY160808T-301Y-N_6 L39 PBY160808T-301Y-N_6
B:(10/25) Add R672 (follow BL5)
C689 2.2u/6.3V_6 C689 2.2u/6.3V_6
C702 2.2u/6.3V_6 C702 2.2u/6.3V_6
C708 FM@2.2u/6.3V_6 C708 FM@2.2u/6.3V_6
C709 FM@2.2u/6.3V_6 C709 FM@2.2u/6.3V_6
BTO
C712 I_MIC@2.2u/6.3V_6 C712 I_MIC@2.2u/6.3V_6
C715 I_MIC@2.2u/6.3V_6 C715 I_MIC@2.2u/6.3V_6
FM_linein_LL
FM_linein_RR
FM_linein_LL
FM_linein_RR
R375 5.1K/F_4 R375 5.1K/F_4
R374 5.11K/F_4 R374 5.11K/F_4
R373 10K/F_4 R373 10K/F_4 C413
R372 FM@20K/F_4 R372 FM@20K/F_4
R386 *20K/F_4 R386 *20K/F_4
C713 1u/10V_4 C713 1u/10V_4
C721
C721
1u/10V_4
1u/10V_4
C710
C710
*FM@100p/50V_4
*FM@100p/50V_4
3
ADOGND
RAMP:(1/21) ADD R801 (0 ohm) between AGND and DGND
C:(12/17) Stuff C396(CH41002KB93) for EMI issue
A:(9/7) Add 0.1uF for High Pass Filter
C396 0.1u/10V_4 C396 0.1u/10V_4
ADOGND
R646 0_4 R646 0_4
ADOGND
R399 0_4 R399 0_4
ADOGND
R379 0_4 R379 0_4
ADOGND
R627 0_4 R627 0_4
ADOGND
C:(12/6) Stuff R399,R379,R627 for ESD issue
R672 0_4 R672 0_4
R636 *0_4 R636 *0_4
R628 FM@10K_4 R628 FM@10K_4
R647 FM@10K_4 R647 FM@10K_4
R5749 *0_4 R5749 *0_4
R5748 *0_4 R5748 *0_4
INT_MIC_R
C728
C728
10u/10V_8
10u/10V_8
C720
C720
1u/10V_4
1u/10V_4
ADOGND
ADOGND
MIC2_INT_L MIC1-LL
C707
C707
*FM@100p/50V_4
*FM@100p/50V_4
BTO BTO
*I_MIC@100p/50V_4
*I_MIC@100p/50V_4
3
R801 0_4 R801 0_4
+3V
HPL 23
HPR 23
MIC1-VREFO 23
MIC1-L 23
MIC1-R 23
MIC1-VREFO MIC1-VREFO_C
FM_LEFT 28
FM_RIGHT 28
MIC1-L
MIC1-R
A:(8/28) Remove R6036 and net INT_MIC
due to "fly cable" in BL5A
+3AVDD
Port_A# 23
Port_B# 23
B:(10/16) Stuff R372 for FM sku
Port_C# 14
RAMP:(1/15) Add R386 for WHQL sku
Port_B# 23
C724
C724
0.1u/10V_4
0.1u/10V_4
FM SKU For WHQL SKU
R5748
R5749
C708
C709
R628
R647
R372
X
X
V
V
V
V
V
R386
R672
C689
C702
V
V
V
R636 V X
C711
C716
C716
C711
*I_MIC@100p/50V_4
*I_MIC@100p/50V_4
2
INT SPK AMP
SPKR-L SPKR-L-2
SPKR-R
INSPKL+
INSPKR+
G1441_SHDN
+5V
R611 *0_6 R611 *0_6
*G961-18ADJTEU(SOT89-5)
REV_04
C675 2.2u/6.3V_6 C675 2.2u/6.3V_6
C681 2.2u/6.3V_6 C681 2.2u/6.3V_6
*G961-18ADJTEU(SOT89-5)
C671
C671
*1u/16V_6
*1u/16V_6
# pleace R6034 as close to U9007 as possible
(opposing side is better)
SPKR-L-1
SPKR-R-1
ADOGND
ADOGND
U36
U36
4
VEN
VOUT
5
VIN
GND
2
R640 0_6 R640 0_6
+5V
R623 9.1K/F_6 R623 9.1K/F_6
R625 9.1K/F_6 R625 9.1K/F_6
R620 10K_6 R620 10K_6
C676 330p/25V_4 C676 330p/25V_4
R621 10K_6 R621 10K_6
C677 330p/25V_4 C677 330p/25V_4
C690 4.7u/6.3V_6 C690 4.7u/6.3V_6
C688 4.7u/6.3V_6 C688 4.7u/6.3V_6
R642 0_4 R642 0_4
3
ADJ
1
ADOGND
ADOGND
INT SPEAKER
INSPKL-
L47 BK1608LL121_6 L47 BK1608LL121_6
INSPKL+
L46 BK1608LL121_6 L46 BK1608LL121_6
INSPKR-
L45 BK1608LL121_6 L45 BK1608LL121_6
INSPKR+ INSPKR+N
L40 BK1608LL121_6 L40 BK1608LL121_6
B:(10/25) change footprint from 0402 to 0603 for EMI debug use
V
RAMP:(1/15) Stuff Varistor for C403,C409,C413,C416
V
V
V
X
X
X
V X
X
X
X
A:(8/27) Reserve ckt to slove BOBO issue
B:(10/26) no stuff D20 (no bi-bi sound issue when flash BIOS)
ACZ_RST#_AUDIO
AMP_MUTE# 29
EAPD#
H : AMP turn on
L : AMP power down
C:(12/6) Remove D19 to slove Audio issue
Switch Mute to Un-mute, sound will delay about 2 seconds.
2
INSPKL-N
INSPKL+N
INSPKR-N
C403
C403
VPORT
VPORT
D20 *MTW355 D20 *MTW355
D18 MTW355 D18 MTW355
D19 *MTW355 D19 *MTW355
2 1
2 1
2 1
Vo=1.2*(R371+R372)/R371= 4.8V
R633
R633
*36K_4
*36K_4
R635
R635
*12K_4
*12K_4
+5V_VDD
C705
C705
C703
C703
10u/10V_8
10u/10V_8
0.1u/10V_4
0.1u/10V_4
U37
U37
1
SPKR-R-2
G1441_RBY
G1441_PBY
G1441_SE/BTL
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
LIN1
18
RIN1
2
LIN2
17
RIN2
16
RBYPASS
3
LBYPASS
5
SHDN
11
SE/BTL
G1441
G1441
C409
C409
VPORT
VPORT
MUTE#
CX20561/AMP/MDC
CX20561/AMP/MDC
CX20561/AMP/MDC
1
+3AVDD
ADOGND
C704
C704
*0.1u/10V_4
*0.1u/10V_4
14
4
6
23
8
15
VDD3
LVDD
RVDD
GND/HS22GND/HS
THRMPAD
21
10
25
ADOGND
C413
VPORT
VPORT
ADOGND
+3AVDD
R641
R641
10K_4
10K_4
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
GND/HS
9
C416
C416
VPORT
VPORT
1
CT
GND/HS
NC
VOL
SECNTL
IN1/IN2
ROUT+
ROUTLOUT+
LOUT-
CN17
CN17
SPEAKER_H1.95
SPEAKER_H1.95
2
MUTE# 23
20
13
19
12
24
7
1
2
5
3
6
4
ADOGND
+5V_VDD
SECNTL 23
INSPKR+
INSPKRINSPKL+
INSPKL-
R634
R634
100K_4
100K_4
G1441_SHDN
3
Q40
Q40
ME2N7002D
ME2N7002D
1
of
of
of
22 43 Tuesday, January 22, 2008
22 43 Tuesday, January 22, 2008
22 43 Tuesday, January 22, 2008
ADOGND
3C
3C
3C
5
VR
D D
B:(11/1) stuff R390,R654 for VR can't smothly issue.
B:(11/1) no stuff U22,C407,R388,Q41 for VR can't smoothly issue.
+3AVDD
DIGVOL_UP 29
DIGVOL_DN 29
DIGVOL_UP
DIGVOL_DN
DIGVOL_UP
DIGVOL_DN
+3AVDD
ADOGND
ADOGND
ADOGND
R391 10K_4 R391 10K_4
R653 10K_4 R653 10K_4
R390 0_4 R390 0_4
R654 0_4 R654 0_4
C407
C407
*0.1u/10V_4
*0.1u/10V_4
C412
C412
*0.1u/10V_4
*0.1u/10V_4
C406
C406
*0.1u/10V_4
*0.1u/10V_4
VR_UP
VR_DN
U22
U22
5
CLK
Vcc
D
4
GND
Q
*SN74LVC1G79DBVR
*SN74LVC1G79DBVR
ADOGND ADOGND
2
1
3
ADOGND
C730
C730
0.1u/10V_4
0.1u/10V_4
VR_UP
4
VR4
VR4
A2COM
3
+3AVDD
C580
C580
*0.1u/10V_4
*0.1u/10V_4
C581
C581
*0.1u/10V_4
*0.1u/10V_4
B
VR_XRE094_NOBLE
VR_XRE094_NOBLE
U42
U42
5
4 3
*NL17SZ17
*NL17SZ17
C408
C408
0.1u/10V_4
0.1u/10V_4
ADOGND
ADOGND ADOGND
C:(11/27) reserve a smith trigger in the VR portion
1
4
4
5
5
6
7
ADOGND
1
VR_DN
2
3
MDC
BTO
2
CN43
CN43
1
SB_GPIO7
3
SB_GPIO27
5
FM_INT
DIB_P 22
DIB_N 22
B:(10/16) Remove FM function in MDC CONN
RAMP:(1/15) Change CN43 footprint from MDC-1-179373-2-12P-RUV to MDC-1-179373-2-12P-RUV-BD3A (SMT open issue)
7
9
11
DIB_P
DIB_N
FM_SUSCLK
MD@MDC
MD@MDC
AGND
FM_L
FM_R
AGND
2
+3V
4
GND
6
8
10
12
1
SYSTEM MIC
C C
C:(12/6) Slove Audio issue:When plug in-out headphone, headphone has bo sound.
1. Change R652&R651 to C741,C742(10U/6.3V 0603)
2. Stuff R386/R387 to 1K(0402)
C:(12/17) No stuff R386 and R387(CS21002JB34) to meet HP Jack signal measure
and HP plug- unplug haven't happen bobo-sound
HP
G1412_HPL
G1412_HPR
HPL 22
HPR 22
B B
Port_A# 22
A A
R658 *1412@0_4 R658 *1412@0_4
R657 *1412@0_4 R657 *1412@0_4
C741 10u/10V_6 C741 10u/10V_6
C742 10u/10V_6 C742 10u/10V_6
*1412@10U/10V_8 C731 *1412@10U/10V_8 C731
*1412@10U/10V_8 C732 *1412@10U/10V_8 C732
Port_A#
3
1
5
C:(12/17) Stuff C404 and C405 to 0.1u(CH41002KB93) to enhance avoid 3G noise and meet HP Jack signal measure
C:(12/17)Follow TE1: change L41,L42 from 0 ohm (CS00003J951) to CX8LL121002
HP_JD
HPL_SYS HPL_1
HPR_SYS
SPDIF_OUT 22
C437
C437
HPL_2
HPR_2
HPR_1
.1U_4
.1U_4
C404
C404
C571
C571
.1U_4
.1U_4
.1U_4
.1U_4
CNXT suggestion can not over 100P
L42 BK1608LL121 L42 BK1608LL121
L41 BK1608LL121 L41 BK1608LL121
C405
C405
.1U_4
.1U_4
ADOGND
RAMP:(1/8) Change Location name from R386,R387 to C437,C571
+5V_VDD
3
1
R401
R401
10K_4
10K_4
Q47
Q47
2N7002
2N7002
+5V_VDD
R402
R402
22K_4
22K_4
2
RAMP:(1/21) ADD C811 for HP_JD (ESD solution)
1
+3AVDD +3V_SPD
HP_JD
C811
C811
10u/10V_6
10u/10V_6
ADOGND
3
Q45
Q45
2
ME2347
ME2347
RAMP:(1/17) ADD D76 (Varistor) for SPDIF_OUT (CN40/Pin8)
RAMP:(1/17) ADD D77 (Varistor) for HP_JD (CN40/Pin5)
RAMP:(1/20) ADD D82 (Varistor) for +3V_SPD(CN40/Pin7)
4
Q42
Q42
2N7002
2N7002
2
ADOGND
RAMP:(1/17) Connect pin 9,10 of CN40(Headphone) toD-GND
+3V_SPD
ADOGND
REV_04
HP_JD
RAMP:(1/15) Stuff D24 for ESD issue (HP CONN)
RAMP:(1/18)No stuff D24, already Stuff D77(Varistor)
D76 VPORT D76 VPORT
D77 VPORT D77 VPORT
D82 VPORT D82 VPORT
2 1
2 1
2 1
CN40
CN40
5
4
10
3
2
1
7
Drive
Drive
8
IC
IC
6
2SJ1371-0010A1_SPDIF
2SJ1371-0010A1_SPDIF
D24
D24
3
*DA204U
*DA204U
SPDIF_OUT
HP_JD
+3V_SPD
9
LED
LED
+3AVDD
1
2
ADOGND
REV_05
3
MIC1-VREFO 22
MIC1-L 22
MIC1-R 22
C:(12/17)Follow TE1: change L43,L44 from 0 ohm (CS00003J951) to CX8LL121002
HP Amplifier
HPL_2
+3AVDD
MUTE# 22
SECNTL 22
+3AVDD +NVDD
R659 1412@100K_4 R659 1412@100K_4
D54 1412@MTW355 D54 1412@MTW355
D55 *1412@MTW355 D55 *1412@MTW355
HPR_2
R385 4.7K_4 R385 4.7K_4
2 1
2 1
C422 1412@4.7U/6.3V_6 C422 1412@4.7U/6.3V_6
U23
U23
1
VOUT
2
VIN
3
C-
1412@G5930
1412@G5930
Change R9037, R6003
and R6004 PN
to CS31003J941
R392 1412@10K_6 R392 1412@10K_6
R389 1412@10K_6 R389 1412@10K_6
6
C+
5
/SHDN
4
GND
ADOGND
L43 BK1608LL121 L43 BK1608LL121
MIC1_R1
L44 BK1608LL121 L44 BK1608LL121
C410
C410
C600
C600
C601
C411
C411
.1U_4
.1U_4
.1U_4
.1U_4
RAMP:(1/15) refer to HP circuit, ADD 4pcs .1uF CAP(C410,C411,C600,C601) for MIC CONN
CNXT suggestion can not over 100P
.1U_4
.1U_4
C601
0903 all AMP parts need to be mount
R656 1412@10K_6 R656 1412@10K_6
C735 1412@47P/50V_4 C735 1412@47P/50V_4
U40
U40
4
-
-
+3AVDD
+NVDD
1412MUTE#
1412MUTE#
INL
3
SVDD
15
PVDD
6
SVSS
10
NVDD
1
SHDNR#
16
SHDNL#
8
INR
1412@G1412
1412@G1412
C734 1412@47P/50V_4 C734 1412@47P/50V_4
R655 1412@10K_6 R655 1412@10K_6
2
OUTL
+
+
NC1
NC2
NC3
NC4
SGND
PGND
TPAD
+
+
OUTR
-
-
MIC1_L MIC1_L1
MIC1_R
Port_B# 22
.1U_4
.1U_4
Port_B#
G1412_HPL
5
9
11
12
14
2
13
17
ADOGND ADOGND
7
G1412_HPR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
CN41
CN41
1
2
6
Port_B#
3
4
5
2SJ-T351-S11
2SJ-T351-S11
Normal OPEN Jack
D21
D21
1
3
2
*DA204U
*DA204U
C419
C419
1412@4.7U/6.3V_6
1412@4.7U/6.3V_6
ADOGND
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
Audio JACK /VR
Audio JACK /VR
Audio JACK /VR
1
+3AVDD
ADOGND
+NVDD
ADOGND
7
8
ADOGND
C738
C738
1412@.1U/10V_4
1412@.1U/10V_4
ADOGND
C725
C725
1412@4.7U/6.3V_6
1412@4.7U/6.3V_6
23 43 Tuesday, January 22, 2008
23 43 Tuesday, January 22, 2008
23 43 Tuesday, January 22, 2008
+3AVDD
of
3C
3C
3C
5
4
3
2
1
LAN_MARVELL_88E8040/88E8055/88E8072
10/100 : 88E8040T
GIGA : 88E8055
P/N : AL008040001
P/N : AJ080550000
GIGA : 88E8072 P/N : AL008072000
D D
GPP_RX0N_LAN 11
GPP_RX0P_LAN 11
GPP_TX0N_LAN 11
GPP_TX0P_LAN 11
CLK_PCIE_LAN# 3
CLK_PCIE_LAN 3
+3V_S5
CLKREQ_LAN# 3
To: SB PCIE wake up pin (Input)
C C
PLTRST# 14,19,21,25,27,29
PCIE_WAKE# 15,25
C657 0.1u/10V_4 C657 0.1u/10V_4
C650 0.1u/10V_4 C650 0.1u/10V_4
R594 40@4.7K_4 R594 40@4.7K_4
R629 0_4 R629 0_4
R631
R631
LAN_RSET
CS22002FB19(2K) Ohm for 8040
CS24872FB07(4.87K) Ohm for 8072
LOM_DISABLE# 29
C:(12/6) Change R669(0 ohm) to D6(Diode) for leakage issue (3VPCU to 3V_S5)
B B
+2.5V_1.8V_LAN
L70 BK1608HS600_6 L70 BK1608HS600_6
C799
C799
0.1u/10V_4
0.1u/10V_4
C:(12/7) Add PI-type filter for EMI request
C:(12/17) Stuff C799,C625 to 0.1uF(CH41002KB93) for EMI request
C264
C264
0.1u/16V_4
A A
0.1u/16V_4
C395
C395
C394
C394
+3V_S5
27p_4
27p_4
27p_4
27p_4
C625
C625
0.1u/10V_4
0.1u/10V_4
R630 4.7K_4 R630 4.7K_4
D6
*BAS316D6*BAS316
LAN_XIN
1 2
Y8
25MHzY825MHz
LAN_XOUT
+2.5V_1.8V_LAN_T
+2.5V_1.8V_LAN_T
TX3P
TX3N
+2.5V_1.8V_LAN_T
TX2P
TX2N
+2.5V_1.8V_LAN_T
TX1P
TX1N
C263
C263
+2.5V_1.8V_LAN_T
1000p_4
1000p_4
TX0N X-TX0N
Rev05 modify 2007/08/16
PERN1
PERP1
PU_VDDO_TTL
VPD_DATA
VPD_CLK
LAN_RSET CTRL12
40@55@4.87K/F_4
40@55@4.87K/F_4
+3V
+3V_S5
T171T171
T170T170
LOM_DISABLE#_L
LAN_XIN
LAN_XOUT
U16
U16
1
TCT1
2
TD1+
3
TD1-
4
TCT2
5
TD2+
6
TD2-
7
TCT3
8
TD3+
9
TD3-
10
TCT4
11
TD4+
12
TD4-
40@50@TRANSFORMER
40@50@TRANSFORMER
C286
C286
1000P/3KV_1808
1000P/3KV_1808
Check by Safety
U35
U35
50
TX_N
49
TX_P
53
RX_N
54
RX_P
56
REFCLKN
55
REFCLKP
35
SPI_DI
34
SPI_DO
37
SPI_CLK
36
SPI_CS
43
PU_VDDO_TTL
42
CLKREQn
88E805X
88E805X
41
VPD_DATA
38
VPD_CLK
5
PERSTn/TSTPT
6
WAKEn
16
RSET
46
TESTMODE
47
VMAIN_AVLBL
12
VAUX_AVLBL
9
SWITCH_VAUX
11
SWITCH_VCC
10
LOM_DISABLEn
15
XTALI
14
XTALO
74
GND10
65
GND1
66
GND2
67
GND3
68
GND4
69
GND5
70
GND6
71
GND7
72
GND8
73
GND9
LED_LINK10/100n
LED_LINK1000n
40@50@88E8040_55
40@50@88E8040_55
10/100 : LFE8696-R
H = 4mm
GIGA : LFE9249-R P/N : ??
10/100 : TST1284 LF
H = 4mm
HAN WEI P/N : DB0SA1LAN01 ??
H = 4mm
MCT1
MX1+
MX1-
MCT2
MX2+
MX2-
MCT3
MX3+
MX3-
MCT4
MX4+
MX4-
GIGA : GST5009 LF P/N : DBKN1NLAN03
10/100 : HPL-4001B
GIGA : HPL-5001-3
TERM4
24
23
22
TERM3
21
20
19
TERM2
18
17
16
TERM1
15
14
13
TERM9
R219
R219
75/F_4
75/F_4
R224
R224
75/F_4
75/F_4
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL
AVDDH
AVDD
AVDD
AVDD
AVDD
AVDDL
AVDDL
NC
NC
VDD25
CTRL18
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CTRL12
TSTPT
HSDACN
HSDACP
MDIN[3]
MDIP[3]
MDIN[2]
MDIP[2]
MDIN[1]
MDIP[1]
MDIN[0]
MDIP[0]
LED_ACTn
LED_LINKn
P/N : DB0MA8LAN00 ?? DELTA
P/N : DB0KN7LAN24 BOTHHAND
P/N : DB0Z03LAN00
R252
R252
R240
R240
55@75/F_4
55@75/F_4
55@75/F_4
55@75/F_4
1
40
45
61
8
23
19
22
28
51
52
32
57
64
4
2
7
13
33
39
44
48
58
3
29
25
24
31
30
27
26
21
20
18
17
59
60
62
63
X-TX3P
X-TX3N
X-TX2P
X-TX2N
X-TX1P
X-TX1N
X-TX0P TX0P
CTRL18
100MBPS#
1000MBPS#
10_1000MBPS#
+3V_S5
T167T167
T169T169
T168T168
R614 *0_4 R614 *0_4
R618 *0_4 R618 *0_4
R619 0_4 R619 0_4
TERMINATION PLANE
+2.5V_1.8V_LAN
+1.2V_LAN
TX3N
TX3P
TX2N
TX2P
TX1N
TX1P
TX0N
TX0P
LAN_ACTLED#
LAN_LINKLED#
B:(10/29) 8072 no stuff the parts (only 8055 need stuff the part)
+3V_S5
C561 470p/50V_4 C561 470p/50V_4
C602 470p/50V_4 C602 470p/50V_4
C567 470p/50V_4 C567 470p/50V_4
+3V_S5
Change CN9001 to BU1 LAN Connector
+3V_S5
10u/6.3V_8 C421 10u/6.3V_8 C421
0.1u/16V_4 C673 0.1u/16V_4 C673
0.1u/16V_4 C638 0.1u/16V_4 C638
0.1u/16V_4 C640 0.1u/16V_4 C640
0.1u/16V_4 C425 0.1u/16V_4 C425
0.1u/16V_4 C693 0.1u/16V_4 C693
1 2
*55@0.1u/16V_4
*55@0.1u/16V_4
55@BK1608HS220_6_1A
55@BK1608HS220_6_1A
4 3
RN33
RN33
*55@49.9/F_4P2R
*55@49.9/F_4P2R
LAN_N1 LAN_N2 LAN_N3 LAN_N4
C679
C679
C686
C686
*55@1000p_4
*55@1000p_4
Foxconn P/N : DFTJ12FR015
R204 220_4 R204 220_4
LAN_ACTLED#
LAN_LINKLED#
+3V_S5
R552 220_4 R552 220_4
AUX3V_S5
L48
L48
C418
C420
C420
55@4.7u/6.3V_6
55@4.7u/6.3V_6
C418
55@0.1u/16V_4
55@0.1u/16V_4
CTRL18
R397
R397
55@4.7K_4
55@4.7K_4
25 mil Trace width
C414
C415
C415
55@4.7u/6.3V_6
55@4.7u/6.3V_6
C414
55@0.1u/16V_4
55@0.1u/16V_4
CTRL12
R393
R393
55@4.7K_4
55@4.7K_4
25 mil Trace width
4 3
RN32
RN32
*55@49.9/F_4P2R
*55@49.9/F_4P2R
1 2
C670
C670
*55@0.1u/16V_4
*55@0.1u/16V_4
C672
C672
*55@1000p_4
*55@1000p_4
4 3
RN31
RN31
*55@49.9/F_4P2R
*55@49.9/F_4P2R
1 2
C661
C661
*55@0.1u/16V_4
*55@0.1u/16V_4
C664
C664
*55@1000p_4
*55@1000p_4
JM36111-R2125-7F
CN28
LAN_ACTLED#
LAN_VCC3
X-TX3N
X-TX3P
X-TX1N
X-TX2N
X-TX2P
X-TX1P
X-TX0N
X-TX0P
LAN_LINKLED#
LAN_VCC4
RAMP:(1/15) Change CN28 (RJ45 CONN) from DFTJ12FR024 to DFTJ12FR035
RAMP:(1/16) Change RJ45 footprint from LAN-100073FR012G101ZL-12P to
rj45-c100s7-10806-l-12P
12
11
8
7
6
5
4
3
2
1
10
9
CN28
YY+
NC4/3NC/3+
RX-/1NC2/2NC1/2+
RX+/1+
TX-/0TX+/0+
GG+
RJ45-CONN
RJ45-CONN
GND
GND
14
13
Rev05 modify 2007/08/16
5
4
3
2
1
B
1
B
R502 0_8 R502 0_8
R554 0_8 R554 0_8
+2.5V_1.8V_LAN
3
Q43
Q43
E
4
C
C
55@BCP69T1
55@BCP69T1
2
3
Q44
Q44
E
4
C
C
55@BCP69T1
55@BCP69T1
2
4 3
RN30
RN30
*55@49.9/F_4P2R
*55@49.9/F_4P2R
1 2
C648
C648
*55@0.1u/16V_4
*55@0.1u/16V_4
C417
C417
55@4.7u/6.3V_6
55@4.7u/6.3V_6
+1.2V_LAN
L71
L71
BK1608HS600_6
BK1608HS600_6
+1.2V_LAN
C401
C401
55@4.7u/6.3V_6
55@4.7u/6.3V_6
C652
C652
*55@1000p_4
*55@1000p_4
Close to
C667
0.1u/16V_4
0.1u/16V_4
C674
C674
0.1u/16V_4
0.1u/16V_4
Close to
Q43 Pin2/4
C643
C643
0.1u/16V_4
0.1u/16V_4
C669
C669
0.1u/16V_4
0.1u/16V_4
Close to
Q44 Pin2/4
EEPROM No Use
VPD_DATA Pull Down
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
0.1u/16V_4
0.1u/16V_4
0.1u/16V_4
0.1u/16V_4
C645
C645
C678
C678
0.1u/16V_4
0.1u/16V_4
0.1u/16V_4
0.1u/16V_4
C639
C639
0.1u/16V_4
0.1u/16V_4
C696
C696
0.1u/16V_4
0.1u/16V_4
+3V_S5
VPD_DATA
VPD_CLK
LAN_Marvell_8040/8055
LAN_Marvell_8040/8055
LAN_Marvell_8040/8055
C666
C666
0.1u/16V_4
0.1u/16V_4
C637
C637
0.1u/16V_4
0.1u/16V_4
C695
C695
0.1u/16V_4
0.1u/16V_4
R378
R378
R380
R380
*4.7K_4
*4.7K_4
*4.7K_4
*4.7K_4
R381
R381
0_4
0_4
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
C668
C668
C659
C659
C667
U35 Pin64
+2.5V_1.8V_LAN
Rev05 modify 2007/08/16
Close to
U35 Pin39
C694
C694
+1.2V_LAN
0.1u/16V_4
0.1u/16V_4
C642
C642
0.1u/16V_4
0.1u/16V_4
Rev05 modify 2007/08/16
U21
U21
5
SDA
6
SCL
7
WP
4
GND
*24LC08
*24LC08
1
C685
C685
40@4.7u/6.3V_6
40@4.7u/6.3V_6
C641
C641
40@4.7u/6.3V_6
40@4.7u/6.3V_6
1
A0
2
A1
3
A2
8
VCC
24 43 Tuesday, January 22, 2008
24 43 Tuesday, January 22, 2008
24 43 Tuesday, January 22, 2008
+3V_S5
3C
3C
3C
of
of
of
5
4
3
2
1
+3V
C64
MINI-Card I (WLAN)
R428 0_4 R428 0_4
PCIRST#
PCLK_DBC
WCS_CLK
WCS_DAT
C633
C633
NEW@.1U_4
NEW@.1U_4
R465 0_4 R465 0_4
R421 0_4 R421 0_4
GPP_TX1P_WLAN
GPP_TX1N_WLAN
GPP_RX1P_WLAN
GPP_RX1N_WLAN
CLK_PCIE_WLAN
CLK_PCIE_WLAN#
CLKREQ_WLAN#
*2N7002E-LF
*2N7002E-LF
Q12
Q12
3
2
R419 BT@0_4 R419 BT@0_4
R418 BT@0_4 R418 BT@0_4
R262 0_4 R262 0_4
R259 0_4 R259 0_4
R264 0_4 R264 0_4
R266 0_4 R266 0_4
GPP_TX2P_MINICARD
GPP_TX2N_MINICARD
GPP_RX2P_MINICARD
GPP_RX2N_MINICARD
PLTRST# 14,19,21,24,27,29
C827
C827
*.1U_4
*.1U_4
+1.5V
C632
C632
NEW@.1U_4
NEW@.1U_4
WCS_CLKR
WCS_DATR
WLAN_WAKE#
1
R417 *10K_4 R417 *10K_4
WCS_CLKR
WCS_DATR
PCIRST#_R
PCLK_DBC_R
IV@C15710-101/88914-5204
IV@C15710-101/88914-5204
B:(10/31) change CN30 to DFHD52MS012
RAMP:(1/15) Add "IV@" for CN30
A:(9/7) per TI FAE suggestion:
(1)Please keep all Input and Output capacitor value > 4.8uF (0.1uF +4.7uF)
(2)Please put these caps closed to IC
(3)R4101(pin 19,OC#) value should change to 2k ohm.
NEW CARD'S POWER SWITCH
CPPE# : ( Internal Pull Up , active low when card support PCIE )
CPUSB# : ( Internal Pull Up , active low when card support USB )
SHDN# : ( Internal Pull Up )
+3V
+3V_S5
+1.5V
PLTRST#
T154T154
RCLKEN
T160T160
NEW@OZ27C10LN-C1
NEW@OZ27C10LN-C1
O2 FAE suggest add 47K RES to +3V_S5 2007.08.13
B:(10/16) change C364,C306,C623,C635 from 0805(CH5472K9A02) to 0603(CH5471M9907) for Hight limit issue
C306
C306
NEW@4.7U_6
NEW@4.7U_6
4
D D
A:(8/18) Due to EC assign Pin111 to other function
Remove uR_SOUT_CR from EC
A:(8/23) Remove uR_SWD from EC
MINI-Card II (HD Decoder)
C C
RAMP:(1/15) Add +3V_WL_VDD for CN21/Pin39,41, Reserve R465 0 ohm for debug use
+3V_WL_VDD
GPP_TX1P_WLAN 11
GPP_TX1N_WLAN 11
GPP_RX1P_WLAN 11
GPP_RX1N_WLAN 11
CLK_PCIE_WLAN 3
CLK_PCIE_WLAN# 3
CLKREQ_WLAN# 3
PCIE_WAKE# 15,24
+3V_S5
WCS_CLK 28
WCS_DAT 28
To BT
A:(8/18) Add PCIE Debud card
B:(10/16) Stuff R262,R259 for debug card function
PCIRST# 14,26
PCLK_DBC 14,18
GPP_TX2P_MINICARD 11
GPP_TX2N_MINICARD 11
GPP_RX2P_MINICARD 11
GPP_RX2N_MINICARD 11
CLK_PCIE_MINICARD 3
CLK_PCIE_MINICARD# 3
B B
+NEW_3V
2
4
RP34
RP34
*NEW@4.7KX2_4
Q73
Q73
SDATA0 3,8,15
SCLK0 3,8,15
A:(8/23) change to another SMBus channel.
A A
SCL1/SDA1 is dedicated SMbus interface for ASF devices only.
SDATA0 NEW_SMDATA
*NEW@2N7002E
*NEW@2N7002E
SCLK0
*NEW@2N7002E
*NEW@2N7002E
+3V_S5
C629
C629
NEW@.1U_4
NEW@.1U_4
2
3
R574 NEW@0_4 R574 NEW@0_4
+NEW_3V
Q72
Q72
2
3
R565 NEW@0_4 R565 NEW@0_4
C621
C621
NEW@.1U_4
NEW@.1U_4
5
*NEW@4.7KX2_4
1
3
1
NEW_SMCLK
1
PLTRST#
RAMP:(1/17)Reserve C827 (0.1uF) for PLTRST# (U33/Pin6)
+3V
C622
C622
C364
C364
NEW@.1U_4
NEW@.1U_4
NEW@4.7U_6
NEW@4.7U_6
A:(9/7) per TI FAE suggestion:
(1)Please keep all Input and Output capacitor value > 4.8uF (0.1uF +4.7uF)
CN21
CN21
51
Reserved
49
Reserved
47
Debug(PCIRST#)
45
Debug(PCICLK)
43
GND
41
+3.3Vaux
39
+3.3Vaux
37
GND
35
GND
33
PETp0
31
PETn0
29
GND
27
GND
25
PERp0
23
PERn0
21
GND
19
Reserved
17
Reserved
15
GND
13
REFCLK+
11
REFCLK-
9
GND
7
CLKREQ#
5
Reserved
3
Reserved
1
WAKE#
C15710-101/88914-5204
C15710-101/88914-5204
CN30
CN30
51
Reserved
49
Reserved
47
Debug(PCIRST#)
45
Debug(PCICLK)
43
GND
41
+3.3Vaux
39
+3.3Vaux
37
GND
35
GND
33
PETp0
31
PETn0
29
GND
27
GND
25
PERp0
23
PERn0
21
GND
19
Reserved
17
Reserved
15
GND
13
REFCLK+
11
REFCLK-
9
GND
7
CLKREQ#
5
Reserved
3
Reserved
1
WAKE#
U33
U33
2
3.3VIN
3.3VOUT
4
3.3VIN
3.3VOUT
17
AUXOUT
AUXIN
12
1.5VOUT
1.5VIN
14
1.5VOUT
1.5VIN
6
SYSRST#
20
SHDN#
18
RCLKEN
16
NC
7
GND
Thermal GND
21
C634
C634
NEW@.1U_4
NEW@.1U_4
53
53
H=0.8mm
STBY#
CPPE#
CPUSB#
PERST#
OC#
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_D-
GND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND
Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V
GND54GND
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
+3V_WL_VDD
+1.5V
WiMAX_LED#_A WiMAX_LED#
B:(10/30) no support WiMAX, no stuff R423
R423 *0_4 R423 *0_4
R420 *0_4 R420 *0_4
USBP3+_C
R45 0_4 R45 0_4
USBP3-_C
WL_SMDATA_WLAN
WL_SMCLK_WLAN
+1.5V
+3V_WL_VDD
+1.5V
+3V_WL_VDD
R41 0_4 R41 0_4
R36 0_4 R36 0_4
R34 0_4 R34 0_4
B:(10/16) wlan mini card no support wakeup, change from 3V_S5 to +3V
RAMP:(1/15) Change Net name from +3V to +3V_WL_VDD
R35 0_4 R35 0_4
H=9mm
A:(8/20) change WLAN power from +3V to +3V_WL_VDD (make power to clear)
+3.3V
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
USB_D+
USB_D-
SMB_DATA
SMB_CLK
+1.5V
+3.3Vaux
PERST#
W_DISABLE#
Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
+3.3V
GND54GND
52
50
GND
48
46
44
42
40
GND
38
36
34
GND
32
30
28
26
GND
24
22
20
18
GND
16
14
12
10
8
6
4
GND
2
+3V_HD_VDD
+1.5V
+1.5V
+3V_HD_VDD
+1.5V
+3V_HD_VDD
MINI2_SMDATA
MINI2_SMCLK
PLTRST#
RF_EN_WLAN
R260 *0_4 R260 *0_4
H=8mm
New Card's Power Switch
QCI PN Vendor
+NEW_3V
3
5
+NEW_3VAUX
15
+NEW_1.5V
11
13
1
CPPE#
10
CPUSB#
9
8
19
R570 NEW@47K_4 R570 NEW@47K_4
C623
C623
C620
NEW@4.7U_6
NEW@4.7U_6
C620
NEW@.1U_4
NEW@.1U_4
T153T153
R131 NEW@0_4 R131 NEW@0_4
R148 NEW@0_4 R148 NEW@0_4
R573 NEW@28.7K/F_4 R573 NEW@28.7K/F_4
+3V_S5
C619
C619
NEW@.1U_4
NEW@.1U_4
AL000577001
AL027C10003
AL005538001
AL002231000
3
GMT
OMC
Ricoh
TI
PCIE_WAKE# 15,24
NEW_DET# 15
PERST# PERST#_R
C628
C628
NEW@3300P_4
NEW@3300P_4
+NEW_1.5V +NEW_3V +NEW_3VAUX
C635
C635
NEW@4.7U_6
NEW@4.7U_6
WL_SMDATA
WL_SMCLK
PLTRST#
RF_EN_WLAN
+3V
R33 0_8 R33 0_8
*10U/10V/X5R_8
*10U/10V/X5R_8
RAMP:(1/20) change the footprint of R33 and R330 from 1206 to 0805
+3V
R330 0_8 R330 0_8
*10U/10V/X5R_8
*10U/10V/X5R_8
PLTRST# 14,19,21,24,27,29
LFRAME#_PCIE
LAD3_PCIE
LAD2_PCIE
LAD1_PCIE
LAD0_PCIE
A:(8/18) Add PCIE Debud card
PCIE_WAKE#
C631
C631
NEW@.1U_4
NEW@.1U_4
C64
.1U_4
.1U_4
A:(9/12) Add WIMAX LED
WiMAX_LED# 30
WL_USBP3+ 15
WL_USBP3- 15
PLTRST# 14,19,21,24,27,29
RF_EN 29
+3V_WL_VDD
C36
C36
C40
C40
*.1U_4
*.1U_4
+3V_HD_VDD
C289
C289
C352
C352
*.1U_4
*.1U_4
LFRAME#
R216 0_4 R216 0_4
LAD3
R521 0_4 R521 0_4
LAD2
R518 0_4 R518 0_4
LAD1
R213 0_4 R213 0_4
LAD0
R211 0_4 R211 0_4
GPP_TX3P_NEWCARD 11
GPP_TX3N_NEWCARD 11
GPP_RX3P_NEWCARD 11
GPP_RX3N_NEWCARD 11
2
NEW_CLKREQ# 3
Q75
Q75
*NEW@DTC144EU
*NEW@DTC144EU
1 3
NEW@NC7SZ32P5X
NEW@NC7SZ32P5X
CLK_PCIE_NEW 3
CLK_PCIE_NEW# 3
U34
U34
+3V_S5
R580
R580
NEW@0_4
NEW@0_4
NEW_CLKREQ#
(0918) Reserve CLKREQ#
circuit to NEW_CLKREQ# of
clock generator
C54
C54
*.1U_4
*.1U_4
C319
C319
*.1U_4
*.1U_4
4
C68
C68
10U_8
10U_8
NEW_USBP6+ 15
NEW_USBP6- 15
+3V
C44
C44
.001U_4
.001U_4
C58
C58
*.1U_4
*.1U_4
C272
C272
*.1U_4
*.1U_4
LFRAME# 14,29
LAD3 14,29
LAD2 14,29
LAD1 14,29
LAD0 14,29
NEW Card_CLKREQ#
1
2
3 5
2
C35
C35
.1U_4
.1U_4
R596
R596
NEW@0_4
NEW@0_4
R268 NEW@0_4 R268 NEW@0_4
R269 NEW@0_4 R269 NEW@0_4
NEW@2N7002E
NEW@2N7002E
Q76
Q76
+1.5V
C57
C57
10U_8
10U_8
CPPE#
NEW Card_CLKREQ#
+NEW_3V
PERST#
+NEW_3VAUX
+NEW_1.5V
NEW_SMDATA
NEW_SMCLK
CPUSB#
B:(9/27) Add 10k PU to +3V_S5 B:(9/27) Change from +3V_S5 to +3V
3
2
1
+3V
Q15
Q15
2
*2N7002E
*2N7002E
SDATA0 3,8,15
SCLK0 3,8,15
WL_SMDATA
WL_SMCLK
A:(8/29) follow EMI suggestion, reserve RC termination
A:(8/23) change to another SMBus channel.
SCL1/SDA1 is dedicated SMbus interface for ASF devices only.
SDATA0 3,8,15
SCLK0 3,8,15
MINI2_SMDATA
MINI2_SMCLK
A:(8/29) follow EMI suggestion, reserve RC termination
CN15
CN15
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
T89T89
6
T84T84
5
4
USBP6+_R
3
USBP6-_R
2
1
NEW@130801-1
NEW@130801-1
+3V_S5
RCLKEN
R666 NEW@10K_4 R666 NEW@10K_4
R598 NEW@10K_4 R598 NEW@10K_4
Header 130801-1 DFHD26MR074
+3V_S5
Ejector 131851-V FBBL5001010
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Mini PCIE/Hyberflash
Mini PCIE/Hyberflash
Mini PCIE/Hyberflash
Date: Sheet of
Date: Sheet of
Date: Sheet
3
R40 0_4 R40 0_4
+3V
3
R39 0_4 R39 0_4
R38 *22_4 R38 *22_4
R37 *22_4 R37 *22_4
+3V
3
R59 0_4 R59 0_4
+3V
3
R43 0_4 R43 0_4
R60 *22_4 R60 *22_4
R42 *22_4 R42 *22_4
New card
GND1
PETp0
PETn0
GND2
PERp0
PERn0
GND3
REFCLK+
REFCLKCPPE#
CLKREQ#
+3.3V1
+3.3V2
PERST#
+3.3VAUX
WAKE#
+1.5V1
+1.5V2
SMB_DATA
SMB_CLK
RESERVED1
RESERVED2
CPUSB#
USB_D+
USB_DGND4
29
GND29
30
GND30
B:(10/21) update new card conn footprint
C:(12/7) Change New card footprint to
NCARD-13180151-T-26P-L-BL5S
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
2
Q16
Q16
2
*2N7002E
*2N7002E
2
1
Q14
Q14
*2N7002E
*2N7002E
Q17
Q17
*2N7002E
*2N7002E
2
4
1
3
1
1
C47 *10p/50V_4 C47 *10p/50V_4
C46 *10p/50V_4 C46 *10p/50V_4
2
4
1
3
1
1
C61 *10p/50V_4 C61 *10p/50V_4
C49 *10p/50V_4 C49 *10p/50V_4
25 43 Tuesday, January 22, 2008
25 43 Tuesday, January 22, 2008
25 43 Tuesday, January 22, 2008
RP5
RP5
*4.7KX2
*4.7KX2
WL_SMDATA
WL_SMCLK
RP6
RP6
*4.7KX2
*4.7KX2
MINI2_SMDATA
MINI2_SMCLK
of
3C
3C
3C
A
4 4
AD[31..0] 14,18
AD17
REQ0#
GNT0# INTE#
AD17
R377 100/F_4 R377 100/F_4
A:(8/29) add 100ohm is that reduce the notice form PCI signal.
3 3
A:(8/24) Remove 33 ohm serial resister for PCIRST#
(22 ohm resister alerady be puted in SB600 side)
A:(8/14)Base on AMD platform,
change net name from INTA# to INTE#
2 2
1 1
OZ129_IDSEL
+3V +1.8V
C397
C397
4.7u/6.3V_6
4.7u/6.3V_6
AD[31..0]
CBE3# 14
CBE2# 14
CBE1# 14
CBE0# 14
PCLK_OZ129 14,18
DEVSEL# 14
FRAME# 14
IRDY# 14
TRDY# 14
STOP# 14
PAR 14
REQ0# 14
GNT0# 14
PCIRST# 14,25
INTE# 14
PCI_PME# 15
CLKRUN# 14,29
TP_XD_LED 28
PCLK_OZ129
R376
R376
*22_4
*22_4
C393
C393
*22P_4
*22P_4
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
OZ129_IDSEL
OZ129_CLK
INTE#
PCI_PME#
CLKRUN#
Reserve EMI
C370
C370
0.1u/10V_4
0.1u/10V_4
L37 BK1608HS220_6 L37 BK1608HS220_6
C371
C371
0.1u/10V_4
0.1u/10V_4
U20
U20
OZ129T
OZ129T
19
20
21
22
23
24
25
27
29
30
31
32
34
35
36
37
47
48
49
50
51
52
53
54
57
58
59
60
61
62
63
64
28
38
46
55
5
45
42
39
40
41
43
44
17
18
1
11
3
6
106
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C/BE3#
C/BE2#
C/BE1#
C/BE0#
IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
REQ#
GNT#
PCI_RST#
INTA#
PME#
CLKRUN#
MEDIA_ACTV
GND12GND16GND33GND66GND68GND
102
56
3.3VCCD73.3VCCD
PCI_VCC26PCI_VCC
104
115
+3V
GND
Change Pulled-up Resistor on the South Bridge side.
+3VARUN
103
122
81
3.3VCCA673.3VCCA733.3VCCA793.3VCCA
3.3VCCD
3.3VCCD
GND
GND
GND
GND
AGND65AGND69AGND70AGND77AGND80AGND
116
121
123
124
R384 *10K_4 R384 *10K_4
R382 *10K_4 R382 *10K_4
R383 *10K_4 R383 *10K_4
B
C368
C368
4.7u/6.3V_6
4.7u/6.3V_6
120
1.8VCCD141.8VCCD151.8VCCD911.8VCCD921.8VCCD
SD/MS_CLK
SM_WPI#/SD_WP
MS_D1/XD_D7
MS_BS/XD_D3
MS_D0/XD_D2
MS_D2/XD_D1
MS_D3/XD_D0
XD_WPO#
H=1.6mm
82
L38 0_6 L38 0_6
C378
C378
0.1u/10V_4
0.1u/10V_4
125
1.8VCCD
TPBIAS
MC_3V#
SD_D3
SD_D2
SD_D1
SD_D0
SD_CMD
SD_CD#
XD_D6
XD_D5
XD_D4
XD_CE#
XD_R/B#
XD_CLE
XD_ALE
XD_WE#
XD_RE#
MS_CD#
XD_CD#
TEST0
TEST1
INTE#
PCI_PME#
CLKRUN#
C377
C377
0.1u/10V_4
0.1u/10V_4
C402
C402
C400
C400
4.7u/6.3V_6
4.7u/6.3V_6
0.1u/10V_4
0.1u/10V_4
A:(9/7)Correct P/N to 1% resister
R352 5.9K/F_4 R352 5.9K/F_4
78
TPA+
TPATPB+
TPB-
REF
NC1
NC2
NC6
NC7
NC5
NC3
NC4
NC8
1394_XIN
83
XI
1394_XOUT
84
XO
TPBIAS0
76
TPA0P
75
TPA0N
74
TPB0P
72
TPB0N
71
MC_PWR_3V#
4
SD/MS_CLK_L
113
SD_D3
111
SD_D2
112
SD_D1
107
SD_D0
108
SD_CMD
110
SM_WPI#/SD_WP
117
SD_CD#
114
MS_D1/XD_D7
95
XD_D6
93
XD_D5
89
XD_D4
87
MS_BS/XD_D3
88
MS_D0/XD_D2
90
MS_D2/XD_D1
94
MS_D3/XD_D0
96
XD_CE#
119
XD_R/B#
100
XD_CLE
118
XD_ALE
109
XD_WE#
105
XD_RE#
101
XD_WPO#
98
MS_CD#
99
XD_CD#
97
2
8
9
10
13
126
127
128
85
86
C399
C399
0.1u/10V_4
0.1u/10V_4
Y7 24.576MHz Y7 24.576MHz
1 2
Better than 50ppm
H=1.2mm
B:(10/31) change C380,C381 to 18p
R561 0_4 R561 0_4
SD/MS_CLK
C398
C398
22P_4
22P_4
C:(12/7) reserve EMI solution
C:(12/17) Stuff C398 to CH02206JB08 for EMI issue
C
CARDREADER POWER
18P/50V_4 C381 18P/50V_4 C381
18P/50V_4 C380 18P/50V_4 C380
5 IN 1 CARD READER
XD_CLE XD_CLE_C
R324 33_4 R324 33_4
SD_D2 SD_D2_C
R328 33_4 R328 33_4
XD_WPO# XD_WPO#_C
R327 33_4 R327 33_4
XD_CD# XD_CD#_C
R320 33_4 R320 33_4
XD_R/B#
R321 33_4 R321 33_4
XD_ALE XD_ALE_C
R325 33_4 R325 33_4
XD_RE# XD_RE#_C
R322 33_4 R322 33_4
MS_CD# MS_CD#_C
R318 33_4 R318 33_4
SD_CMD SD_CMD_C
R319 33_4 R319 33_4
MS_D3/XD_D0
R317 33_4 R317 33_4
R315 33_4 R315 33_4
XD_CE# XD_CE#_C
R323 33_4 R323 33_4
XD_WE# XD_WE#_C
R329 33_4 R329 33_4
SD_D3 SD_D3_C
R326 33_4 R326 33_4
A:(8/29) change from 33 to 0 ohm
connect the socket and chip by wire directly, and keep same length of these signals.
but if these signal over 15 ~cm , please consider to add these damping resistors.
C:(12/7) Change Card reader CONN(CN33)damping resister from 0 ohm to 33ohm
VCC_XD
VCC_XD
XD_R/B#_C
SD/MS_CLK_C
MS_D3/XD_D0_C
MS_D2/XD_D1_C MS_D2/XD_D1
D
CN33
CN33
6
CLE_XD
9
DAT2_SD
10
-WP_XD
2
CD_XD
3
R/-B_XD
7
ALE_XD
4
-RE_XD
1
GND_XD
11
MS-VSS
13
MS-VCC
18
MS-INS
19
VSS_SD
17
GND_XD
15
CMD_SD
14
MS-SCLK
16
MS-DATA3
20
MS-DATA2
5
-CE_XD
8
-WE_XD
12
CD/DAT3_SD
21
VDD_SD
MXP038-01-A_CARD READER
MXP038-01-A_CARD READER
+3V
C350
C350
4.7u/6.3V_6
4.7u/6.3V_6
VCC_XD
C351
C351
0.01u/16V_4
0.01u/16V_4
C347
C347
1u/25V_8
1u/25V_8
C346
C346
0.01u/16V_4
0.01u/16V_4
MC_PWR_3V#
C345
C345
0.01u/16V_4
0.01u/16V_4
9/4 Change 5 in 1 card reader conn.
43
GND
42
GND-SDIO
CLK_SD
MS-BS
VSS_SD
MS-VSS
D1_XD
DAT0_SD
D2_XD
DAT1_SD
D3_XD
D4_XD
D5_XD
D6_XD
D7_XD
VCC_XD
C/D_SD
GND_SD
W/P_SD
MS-DATA1
SDIO/MS-DATA0
D0_XD
25
26
27
28
MS_D2/XD_D1_C
29
30
MS_D0/XD_D2_C
31
32
MS_BS/XD_D3_C
33
XD_D4_C
34
35
36
MS_D1/XD_D7_C
37
38
39
40
41
24
22
MS_D3/XD_D0_C
23
B:(11/1) Change CN33 P/N to DFHS38FR003 (Follow BL5S & ME)
R316 33_4 R316 33_4
R311 33_4 R311 33_4
R314 33_4 R314 33_4
R312 33_4 R312 33_4
R310 33_4 R310 33_4
R309 33_4 R309 33_4
R308 33_4 R308 33_4
R610 33_4 R610 33_4
R648 33_4 R648 33_4
R335 33_4 R335 33_4
R313 33_4 R313 33_4
U18
U18
RT9711BPF
RT9711BPF
2
IN1
IN23OUT2
4
EN#
1
GND
9
GND-C
OUT3
OUT1
OC#
SD/MS_CLK SD/MS_CLK_C
MS_BS/XD_D3 MS_BS/XD_D3_C
SD_D0SD_D0_C
SD_D1SD_D1_C
XD_D4
XD_D5XD_D5_C
XD_D6XD_D6_C
SD_CD#SD_CD#_C
SM_WPI#/SD_WPSM_WPI#/SD_WP_C
MS_D1/XD_D7 MS_D1/XD_D7_C
MS_D0/XD_D2 MS_D0/XD_D2_C
E
8
7
6
5
30mil
VCC_XD
R293 *10K_4 R293 *10K_4
VCC_XD
VCC_XD
+3V
1394
As close as
possible to OZ129
TPBIAS0
TPA0P
TPA0N
TPB0N
TPB0P
R355
R355
1394@56.2/F_4
1394@56.2/F_4
R353
R353
1394@56.2/F_4
1394@56.2/F_4
1394_COM
R340
R340
1394@5.1K/F_4
1394@5.1K/F_4
1394@1u/10V_4 C372 1394@1u/10V_4 C372
R356
R356
1394@56.2/F_4
1394@56.2/F_4
RAMP:(1/15) DEL RN34,RN35 Co-lay footprint
R354
R354
1394@56.2/F_4
1394@56.2/F_4
C374
C374
1394@270P_4
1394@270P_4
L68
L68
3
443
1
2
1
2
1394@CL-2M2012-121JT
1394@CL-2M2012-121JT
L1394_TPA0+
L1394_TPA0-
L1394_TPB0L1394_TPB0+
L69
L69
1
2
1
2
3
443
1394@CL-2M2012-121JT
1394@CL-2M2012-121JT
C:(12/17) Stuff L68/L69 to CX0900JT005, remove RN34,RN35(CJ000042N12) for EMI issue
D63 1394@EGA D63 1394@EGA
2 1
D61 1394@EGA D61 1394@EGA
2 1
D60 1394@EGA D60 1394@EGA
2 1
D62 1394@EGA D62 1394@EGA
2 1
RAMP:(1/15) ADD D60,D61,D62,D63 (0402 Varistor) for 1394 CONN (ESD issue)
L1394_TPB0L1394_TPA0L1394_TPA0+
L1394_TPB0+
B:(11/1) Change CN38 P/N to DFHS04FR096 (Follow BL5S & ME)
CN38
L1394_TPB0L1394_TPA0L1394_TPA0+
L1394_TPB0+
These 1394 signals are high speed
differential pairs and must be kept equal
length with a differential impedance (Zo)
of 110ohms.
CN38
1
3
4
2
1394@C13121-100A
1394@C13121-100A
5
6
MMC
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
Quanta Computer Inc.
OZ129T (Card Reader/1394)
OZ129T (Card Reader/1394)
OZ129T (Card Reader/1394)
E
3C
3C
26 43 Tuesday, January 22, 2008
26 43 Tuesday, January 22, 2008
26 43 Tuesday, January 22, 2008
3C
of
of
of
5
ODD
-IDERST
R463 470_6 R463 470_6
IN for Master
NC for Slave
+3V +5V
Q35
Q35
2
DTC144EU
DTC144EU
1 3
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
PDIOW#
IRQ14
PDA1
PDA0
PDCS1#
ODD_LED#
-IDERST
PDD[0..15] 16
PDDREQ 16
PDIOW# 16
PDIOR# 16
PDIORDY 16
PDDACK# 16
IRQ14 16
PDA1 16
D D
PDA0 16
PDCS1# 16
PDA2 16
PDCS3# 16
ODD_LED# 30
RAMP:(1/21)Delete R494. CN26 connect +5V directly.
IDERST1# 14
C C
PDD[0..15]
PDDREQ
PDIOW#
PDIOR#
PDIORDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#
PDA2
PDCS3#
ODD_LED#
R222 *0_4 R222 *0_4
PLTRST# 14,19,21,24,25,29
R221 0_4 R221 0_4
+5V
R217
R217
10K_4
10K_4
4
CN26
CN26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
515152
52
ODD_CONN
ODD_CONN
RES-TYPE
PDD8
PDD9 PDD7
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQ
PDIOR#
PDDACK# PDIORDY
DIAG#
R499 *10K_4 R499 *10K_4
PDA2
PDCS3#
80 mils
C501
C501
C511
C511
C504
C504
.1U_4
.1U_4
A:(8/27) AMD check list Rev3.01 Item 17-2:
Please do not install R57,R60
R508 *4.7K_4 R508 *4.7K_4
+3V
R504 *8.2K_4 R504 *8.2K_4
+3V
1000P_6
1000P_6
.1U_4
.1U_4
3
reference power plane, add 4 CAP near SB600
+5V
+5V
C245
C245
C524
C524
10U_8
10U_8
150U/6.3V_7343
150U/6.3V_7343
PDIORDY
IRQ14
reference power plane, add 4 CAP near IDE CONN
+1.8VSUS +1.8VSUS
A:(9/13)Add 0.1u to stitch Plane (+1.8VSUS to GND)
+1.8VSUS +1.8VSUS +1.8VSUS
A:(9/17)Add 0.1u to stitch Plane (+1.8VSUS to GND)
C484
C484
0.1u/10V_4
0.1u/10V_4
C258
C258
0.1u/10V_4
0.1u/10V_4
2
C487
C487
0.1u/10V_4
0.1u/10V_4
C252
C252
0.1u/10V_4
0.1u/10V_4
C244
C244
0.1u/10V_4
0.1u/10V_4
C238
C238
0.1u/10V_4
0.1u/10V_4
+1.8VSUS +1.8VSUS
C255
C255
0.1u/10V_4
0.1u/10V_4
1
B B
SATA HDD
CN34
CN34
23
GND23
1
GND1
RXP
RXN
GND2
TXN
TXP
GND3
3.3V
3.3V
A A
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V
GND24
SA@127043FR022GX51ZR
SA@127043FR022GX51ZR
SATA_TXP0
2
SATA_TXN0
3
4
SATA_RXN0_C
SATA_RXP0_C
+3.3VSATA1
5
C388 0.01u/25V_4 C388 0.01u/25V_4
C379 0.01u/25V_4 C379 0.01u/25V_4
C658
C658
*4.7U_8
*4.7U_8
C636
C636
C354
C354
.1U_4
.1U_4
.1U_4
.1U_4
A:(8/17) Add Cap for SATA interface A:(8/17) Add Cap for SATA interface
C651
C651
*.1U_4
*.1U_4
C644
C644
10U_8
10U_8
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
24
SATA_TXP0 16
SATA_TXN0 16
SATA_RXN0 16
SATA_RXP0 16
R609 *0_8 R609 *0_8
C373
C373
150U/6.3V_7343
150U/6.3V_7343
+3V
+5V
RAMP:(1/21)Delete R597. CN34 connect +5V directly.
4
2'nd SATA HDD
SA@127043FR022XX27ZR
SA@127043FR022XX27ZR
A:(9/5) update footprint
A:(9/13) update footprint
CN32
CN32
RAMP:(1/15) Change CN32(2nd SATA CONN) from DFHS22FR064 to DFHS22FR094
RAMP:(1/15) Change CN32 footprint from SATA-127043FR022XX27ZR-22P-L-H to SATA-127043FR022G285ZR-22P-L
23
GND23
1
GND1
GND2
GND3
RSVD
GND24
RXP
RXN
TXN
TXP
3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
GND
12V
12V
12V
SATA_TXP1
2
SATA_TXN1
3
4
SATA_RXN1_C
5
SATA_RXP1_C
6
7
+3.3VSATA2
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
24
C646 0.01u/25V_4 C646 0.01u/25V_4
C647 0.01u/25V_4 C647 0.01u/25V_4
C358
C358
*4.7U_8
*4.7U_8
C348
C348
.1U_4
.1U_4
3
C344
C344
.1U_4
.1U_4
C363
C363
*.1U_4
*.1U_4
C338
C338
10U_8
10U_8
SATA_TXP1 16
SATA_TXN1 16
SATA_RXN1 16
SATA_RXP1 16
R338 *0_8 R338 *0_8
C315
C315
150U/6.3V_7343
150U/6.3V_7343
+3V
RAMP:(1/21) ADD D91,D92(0603 Varistor) for two SATA CONN (CN32&CN34) +5V power pin
+5V
RAMP:(1/21)Delete R270. CN32 connect +5V directly.
2
D91 VPORT D91 VPORT
2 1
D92 VPORT D92 VPORT
2 1
D83 EGA D83 EGA
2 1
D84 EGA D84 EGA
2 1
D85 EGA D85 EGA
2 1
D86 EGA D86 EGA
2 1
D87 EGA D87 EGA
+5V
+5V
RAMP:(1/20) ADD D83~90 for two SATA CONN (ESD issue)
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
SATA / PATA
SATA / PATA
SATA / PATA
2 1
D88 EGA D88 EGA
2 1
D89 EGA D89 EGA
2 1
D90 EGA D90 EGA
2 1
PROJECT : BD3A
PROJECT : BD3A
1
SATA_TXP0
SATA_TXN0
SATA_RXN0_C
SATA_RXP0_C
SATA_TXP1
SATA_TXN1
SATA_RXN1_C
SATA_RXP1_C
27 43 Tuesday, January 22, 2008
27 43 Tuesday, January 22, 2008
27 43 Tuesday, January 22, 2008
of
of
of
3C
3C
3C
5
R512 0_8 R512 0_8
FINGER_POWER
+
+
C558 10U_8
C558 10U_8
C555 *1000P_4 C555 *1000P_4
C552 *.1U_4 C552 *.1U_4
FELICA_POWER
+
+
C476 *10U_8
C476 *10U_8
C469 *1000P_4 C469 *1000P_4
C467 *.1U_4 C467 *.1U_4
2
2
Q57
Q57
*AO3413
*AO3413
Q69
Q69
*AO3413
*AO3413
R449 *0_8 R449 *0_8
3
3
1
+3V
D D
1
+5V
A:(9/17) Toshiba recommend:
Felica module power default need control power by EC
C C
RAMP:(1/15) Remove Felica circuit (No-stuff Q57,Q56,C476,R450)
+3V
R515
R515
*4.7K_4
*4.7K_4
2
FP_PWRON 29
Q70
Q70
1 3
*DTC144EU
*DTC144EU
+5V
R450
R450
*4.7K_4
*4.7K_4
2
FELICA_PWRON 29
Q56
Q56
1 3
*DTC144EU
*DTC144EU
USB(Daughter Board side)
RFCM1632100M3
RFCM1632100M3
USBP9+
USBP1+
+5VPCU_USB1
80 mils
2
2
3
L73
L73
RFCM1632100M3
RFCM1632100M3
2
2
3
L74
L74
USBP9+ 15
USBP9- 15
C:(12/7) Add L73,L74 (commond choke) for EMI request
RAMP:(1/15) Change L73,L74 from CX216900002 to cx163210007,DEL R613,R612,R624,R626
USBP1+ 15
B B
USB(MB side)
80 mils
+5VPCU
USBP1- 15
F6
F6
POLY_SWITCH
POLY_SWITCH
RC1206
RC1206
DK150TPU072
DK150TPU072
C:(12/17)Remove R613,R612,R624,R626 (CS00003J951)
Stuff L73,L74 (CX216900002) for EMI issue
1 2
A:(9/4) Add 2A Poly switch on USB power which 2 connector share 1 switch
A:(8/20) Follow BL5, change USB power from +5V_S5 to +5VPCU
+5VPCU_USB1
A A
USB_EN# 29
A:(9/4) Add 10uF for Cout (no stuff)
Please reserve Cin = 1uF(stuff),Cout = 10uF(don't stuff) for Richtek RT9711BPF
Please reserve Cin = 4.7uF(stuff),Cout = 10uF(don't stuff) for GMT solution
C733
C733
C736
C736
1u/10V_6
1u/10V_6
*.1U_4
*.1U_4
U39
U39
RT9711BPF
RT9711BPF
2
IN1
OUT3
IN23OUT2
OUT1
4
EN#
1
GND
9
GND-C
B:(10/25) Follow AMD schematic to modify Low pass filter circuit
5
8
7
6
5
OC#
USBPWR0
A:(9/17) change to +3V_S5
+3V_S5
R366
R366
10K_4
10K_4
A:(9/13)Add USB OC pin to SB600
C737
C737
*.1U_4
*.1U_4
1
443
1
443
1
1
C722
C722
*10u/10V_8
*10u/10V_8
USBP9+_C
USBP9-_C USBP9-
USBP1+_C
USBP1-_C USBP1-
USB_OC# 15,29
4
B:(10/22) change pin-define (follow BL5)
FM
B:(10/21) change FM CONN (CN42) footprint
B:(10/16) Add FM CKT
B:(11/1) Add P/N DFHS08FRA03 (Follow BL5S & ME)
FM_INTX 14
FM_DET 16
FM_RIGHT 22
FM_LEFT 22
FM_DATA 14
FM_CLOCK 14
C:(12/14) Stuff EMI CAP
B:(10/23) Detect FM module exist or not,
if module insert it CN42/Pin7->low,
no insert CN42/Pin7->high
FM_CLOCK
FM_INTX
FM_DET
FM_RIGHT
FM_LEFT
FM_DATA
FM_CLOCK
+3V
C740
C740
*FM@10p/50V_4
*FM@10p/50V_4
C5944
C5944
FM@.1u_4
FM@.1u_4
CN42
CN42
9 10
8
7
6
5
4
3
2
1
FM@BL121-08R-TAND
FM@BL121-08R-TAND
A:(8/29) follow EMI suggestion, reserve 10~33pf cap
A:(9/13) change PIN2 to OC pin
+5VPCU
C:(12/14) Stuff EMI CAP
+5VPCU
C:(12/14) Stuff EMI CAP
9/17 EMI request
USB_OC2# 15,29
C391
C391
.1U_4
.1U_4
USB_EN2# 29
C701
C701
.1U_4
.1U_4
A:(8/24) change pin-define
88266-100XX-XXX-10P-R
88266-100XX-XXX-10P-R
USBP9+_C
USBP9-_C
USBP1+_C
USBP1-_C
CN16
CN16
A:(9/17) change usb/b OC pin pull-high ckt into MB side
Finger Printer
FINGER_POWER
A:(8/29) reserve cap for EMI
Felica
FELICA_POWER
A:(8/29) reserve cap for EMI
BLUETOOTH MODULE CONNECTOR
RAMP:(1/15) DEL R276,R278 Co-lay footprint (BT circuit)
RAMP:(1/15) Change L72 from CX216900002 to cx163210007
BT_USBP8+ 15
BT_USBP8- 15
C:(12/7) Add L72 (commond choke) for EMI request
C:(12/17)Remove R276,R278 (CS00003J951)
Stuff L72 (CX216900002) for EMI issue
RAMP:(1/18) ADD "BT@" for L72,C78,C618,D68,D69,D72
1
12 11
2
3
4
5
USB_OC2#
6
7
8
9
10
C353
C353
*.1U_4
*.1U_4
# Placed common mode chokes within 1.0" of the USB connectors
RFCM1632100M3
RFCM1632100M3
USBP0-
USBP0+
USBP7-
USBP7+
2
2
3
L65
L65
RFCM1632100M3
RFCM1632100M3
2
2
3
L64
L64
USBP0- 15
USBP0+ 15
RAMP:(1/15) Stuff L64,L65 to cx163210007,DEL R607,R608,R572,R569
USBP7- 15
USBP7+ 15
# ESD suppression components are placed within 0.5" of the user accessible USB connectors
and are located between the common mode chokes and the connectors.
4
BUSBP0-
1
1
BUSBP0+
443
BUSBP7-
1
1
BUSBP7+
443
3
C559
C559
*FP@.1U_4
*FP@.1U_4
RAMP:(1/17) ADD D65,66,67 ESD solution for CN13 (Finger printer CONN)
RAMP:(1/18) ADD "FP@" for D65,D66,D67
B:(10/21) change Felica CONN (CN12) footprint and PN
B:(10/23) Because signal “FELICA_DE” is deleted, Add a test point at Felica connector pin6.
T175T175
FELICA_USBP5+ 15
FELICA_USBP5- 15
C228
C228
*.1U_4
*.1U_4
L72
L72
3
2
2
BT@RFCM1632100M3
BT@RFCM1632100M3
+3V
C:(12/14) Stuff EMI CAP
A:(8/29) reserve cap for EMI
2 1
D65 *FP@EGA D65 *FP@EGA
2 1
D66 *FP@EGA D66 *FP@EGA
2 1
D67 *FP@VPORT D67 *FP@VPORT
FP_USBP4- 15
FP_USBP4+ 15
FELICA_DE
R178 *0_6 R178 *0_6
R179 *0_6 R179 *0_6
RAMP:(1/15) Remove Felica circuit (No-stuff CN12,R178,R179)
RAMP:(1/17)ADD D68,69,72 ESD solution for CN14 (BT CONN)
BT_USBP8+_C
443
BT_USBP8-_C
1
1
C618
C618
BT@.1U_4
BT@.1U_4
BT_EN 29
Wire Cable 1.25mm Pitch
+3V_S5
R307
R307
10K_4
10K_4
USBP4-_C
USBP4+_C
FINGER_POWER
R200 FP@0_6 R200 FP@0_6
R199 FP@0_6 R199 FP@0_6
FP@88266-040XX-XXX-4P-R
FP@88266-040XX-XXX-4P-R
USBP5+_C
USBP5-_C
*BL121-06R-TAND
*BL121-06R-TAND
D69 BT@EGA D69 BT@EGA
D68 BT@EGA D68 BT@EGA
D72 BT@VPORT D72 BT@VPORT
WCS_CLK 25
WCS_DAT 25
C78
C78
BT@100p/50V_4
BT@100p/50V_4
RAMP:(1/15) Add C78 (100pF) to CN14/Pin9 (USB_DETACH) for EMI issue
R305 *BT@0_4 R305 *BT@0_4
R306 BT@0_4 R306 BT@0_4
BT_RESET
RAMP:(1/21) Add C809 (0.1uF) for BT_RESET (CN14/Pin6) BT CONN
Low cost
B:(10/29) change CN6/Pin1 from MX1 to MX5
CN13
CN13
USBP4-_C
USBP4+_C
CN12
CN12
8
6
5
4
3
2
1
7
2 1
2 1
2 1
WCS_CLK
BT_RESET
WCS_DAT
+3V
USB_DETACH
BT@88266-100XX-XXX-10P-R
BT@88266-100XX-XXX-10P-R
USB_DETACH: Low USB connect
C809
C809
BT@.1U_4
BT@.1U_4
LOW_DET 16,18
A:(8/22) Modify Low Cost sensor button netname
CN35
USBPWR0 BUSBP7+
+
+
C687
C687
100U/6.3V_3528
100U/6.3V_3528
B:(10/16) change USB CONN footprint and pin-define (follow USB CONN Standard)
USBPWR0
+
C604
+
C604
100U/6.3V_3528
100U/6.3V_3528
3
BUSBP0BUSBP0+
BUSBP7BUSBP7+
CN35
USB
USB
1
5
2
6
3
7
4
8
CN31
CN31
1
2
3
4
USB
USB
2
1
2
3
4
5 6
BT_USBP8+_C
BT_USBP8-_C
+3V
BT_RESET
USB_DETACH
CN14
CN14
TP_LED_ON 29
1
12 11
2
3
4
5
6
7
8
9
10
High USB disconnect
+3VPCU
MX5 29,30
MX2 29,30
MY1 29,30
MX3 29,30
MX4 29,30
FN0# 29
FN1# 29
LID@BL123-10R-TAND-10P-L-BU1
LID@BL123-10R-TAND-10P-L-BU1
FFC Cable 1.0mm Pitch
5
6
7
8
2
T/P
C155
C155
C151
C151
.1U_4
.1U_4
4.7U/10V_8
4.7U/10V_8
L16 BLM18PG181SN1D_6 L16 BLM18PG181SN1D_6
1 2
+5V
+5VPCU
R108 0_4 R108 0_4
TPDATA 29
R109 0_4 R109 0_4
TPCLK 29
R693
R693
10K_4
10K_4
1 3
R695
R695
Power board
B:(10/16) change from +3VPCU to +5VPCU
CN6
CN6
12
1
2
3
4
5
6
7
8
9
10
11
+5V_TP
C156
C156
*10P_4
*10P_4
GND
TP_LED_ON_C
BATLED1# 29
BATLED0# 29
PWRLED# 29
SUSLED_EC 29
+3VPCU
IDE_LED# 30
ACIN 29,32
TP_XD_LED 26
R694
R694
330_4
330_4
Q61
Q61
2
MMBT3904
MMBT3904
TP_LED_ON_C
*0_4
*0_4
A:(8/29) reserve cap for EMI
C:(12/14) Stuff EMI CAP
C:(11/27) add level shift circuit for TP LED
+5VPCU
NBSWON# 29,30
PWRLED# 29
+5VPCU
RAMP:(1/15) DEL C42, Add D45 for CN8/Pin2 (ESD issue) - default no stuff
TPDATA_1
TPCLK_1
C157
C157
*10P_4
*10P_4
+5V_TP
TPDATA_1
TPCLK_1
B:(10/26) short R165 for CN11/Pin7
BATLED1#
BATLED0#
PWRLED#
SUSLED_EC
IDE_LED#
ACIN
TP_XD_LED
BL121-14R-TAND-14P-L-BU1
BL121-14R-TAND-14P-L-BU1
B:(10/24) change CN8 footprint and Pin-define to standard type,
It's can prevent other person to confuse it.
B:(10/22) change pin-define (follow BL5)
B:(10/21) change Power board CONN (CN8) footprint & P/N
C41
C41
.1U_4
.1U_4
CN8
CN8
1
2
3
6
4 5
NBSWON# PWRLED#
2 1
D45
D45
*VPORT
*VPORT
Main strem
+3VPCU
+5VPCU
KEY_INT 29
3ND_MBDATA 19,21,29
3ND_MBCLK 19,21,29
*MID@100p/50V_4
*MID@100p/50V_4
RAMP:(1/15) Reserve C584,C585(100pF) for 3ND_MBDATA,3ND_MBCLK (EMI issue)
B:(10/21) Change Main strem MMB CONN (CN7) from 10pin to 6pin, update footprint & P/N
B:(10/25) change footprint
RAMP:(1/15) Add C606,C607 for CN7/Pin1,2 (EMI issue)
C606 MID@100p/50V_4 C606 MID@100p/50V_4
+3VPCU
C607 MID@100p/50V_4 C607 MID@100p/50V_4
+5VPCU
A:(8/15) Reserve ESD protect
RAMP:(1/15) ADD D46,D64 and Stuff D49,D50,D51,D52
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
C585
C585
FFC Cable 1.0mm Pitch
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
FP/ TP/ USB /BT/FELICA/FM
FP/ TP/ USB /BT/FELICA/FM
FP/ TP/ USB /BT/FELICA/FM
1
CN11
CN11
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
BL123-04R-TAND
BL123-04R-TAND
C43
C43
*100p/50V_4
*100p/50V_4
MID@BL123-06R-6P-R-BL5
MID@BL123-06R-6P-R-BL5
7
1
2
3
4
5
6
8
C584
C584
CN7
CN7
*MID@100p/50V_4
*MID@100p/50V_4
D51 EGA D51 EGA
2 1
D52 EGA D52 EGA
2 1
D49 EGA D49 EGA
2 1
D50 EGA D50 EGA
2 1
D64 VPORT D64 VPORT
2 1
D46 VPORT D46 VPORT
2 1
1
28 43 Tuesday, January 22, 2008
28 43 Tuesday, January 22, 2008
28 43 Tuesday, January 22, 2008
BUSBP0BUSBP0+
BUSBP7-
USBPWR0
USBPWR0
of
3C
3C
3C
5
PCLK_591
R501
R501
*22_4
*22_4
C550
C550
*10p_4
*10p_4
Reserve for EMI
D D
CLKRUN# 14,26
PLTRST# 14,19,21,24,25,27
C C
SMBUS Table
To: AMD CPU (Output)
+5V
B B
A A
Devices SMBUS
1 Battery
CPU Thermal Sensor
2
3D Sensor
EC EEPROM
3
VGA Board Thermal Sensor
Touch Sensor
To: Battery connector
To: Battery connector
To: CPU Thermal Sensor, 3D Sensor, EC EEPROM
To: CPU Thermal Sensor, 3D Sensor, EC EEPROM
To: VGA Board Thermal Sensor, Touch Sensor
To: VGA Board Thermal Sensor, Touch Sensor
Rev03 modify 2007/08/16
B:(10/23) Add CHG_EN
TPCLK
R519 10K_4 R519 10K_4
TPDATA
R526 10K_4 R526 10K_4
GND Shape should
below the Crystal and
have some GND vias
C554
C554
C523
C523
C557
C557
C253
10u/10V_8
10u/10V_8
0.1u/10V_4
0.1u/10V_4
D58 *BAS316 D58 *BAS316
R566 0_4 R566 0_4
A:(9/4) add diooe for leakage issue
To: Back light control circuit (Output)
D59 *BAS316 D59 *BAS316
R567 0_4 R567 0_4
To: USB power switch (Output)
To: USB power switch (Output)
To internal
KB Con.
B:(10/19) Remove Pin10 from MMB LED control to Test point T175
To: Touch PAD
To: Touch PAD
To: Charger (for 15, 17) (Output)
To: Finger Printer Con (output)
To: Internal KB LED (output)
To: Felica Con (output)
B:(10/24) change C575,C579 from 6.8p to 15p (base on TXC report)
A:(8/30) Add CPU_CORE PG
5
GATEA20 15
AMD_PROCHOT 6,14
C575
C575
15p_4
15p_4
C253
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
LFRAME# 14,25
LAD0 14,25
LAD1 14,25
LAD2 14,25
LAD3 14,25
PCLK_591 14
RCIN# 15
SCI# 15
EC_FPBACK# 20
CEC_EC_HP 19
USB_EN# 28
SERIRQ 14
USB_EN2# 28
MX0 30
MX1 30
MX2 28,30
MX3 28,30
MX4 28,30
MX5 28,30
MX6 30
MX7 30
MY0 30
MY1 28,30
MY2 30
MY3 30
MY4 30
MY5 30
MY6 30
MY7 30
MY8 30
MY9 30
MY10 30
MY11 30
MY12 30
MY13 30
MY14 30
MY15 30
MY16 30
MY17 30
MBCLK 32
MBDATA 32
2ND_MBCLK 6
2ND_MBDATA 6
3ND_MBCLK 19,21,28
3ND_MBDATA 19,21,28
TPCLK 28
TPDATA 28
CHG_EN 32
FP_PWRON 28
FN_F10 30
FELICA_PWRON 28
R532 20M_6 R532 20M_6
Y9
4 1
2 3
32.768KHZY932.768KHZ
8769AGND
1. Traces as short as possible
2. NO vias
3. Keep away from high speed signals
CPU_COREPG 6,34,35,37
HWPG_1.2V_NB 35
+3VPCU
C576
C576
0.1u/10V_4
0.1u/10V_4
GATA20_R
D13
D13
BAS316
BAS316
RCIN#_R
D12
D12
BAS316
BAS316
SCI#_uR
D47
D47
BAS316
BAS316
MY17
R425 0_4 R425 0_4
HWPG
8768_32KX1
8768_32KX2
R536
R536
33K/F_6
33K/F_6
C579
C579
15p_4
15p_4
HWPG_2.5V 37
SYS_HWPG 33
HWPG_1.8V 36
HWPG_1.5V 37
HWPG_CPUIO 37
A:(8/24) Add HWPG signal from +1.2V(CPU)
GFXPG 21
B:(10/16) Add EV@ for D43 (remove it for UMA sku)
4
L25
L25
BLM18AG601SN1_6
BLM18AG601SN1_6
C556
C556
19
0.1u/10V_4
0.1u/10V_4
3
LFRAME
126
LAD0
127
LAD1
128
LAD2
1
LAD3
2
LCLK
8
CLKRUN/GPIO11
121
GA20
122
KBRST
29
ECSCI/GPIO54
6
LDRQ/GPIO24
124
LPCPD/GPIO10
7
LRESET
123
PWUREQ/GPIO67
125
SERIRQ
9
SMI/GPIO65
54
KBSIN0
55
KBSIN1
56
KBSIN2
57
KBSIN3
58
KBSIN4
59
KBSIN5
60
KBSIN6
61
KBSIN7
53
KBSOUT0/SOUT_CR/JENK
52
KBSOUT1/TCK
51
KBSOUT2/TMS
50
KBSOUT3/TDI
49
KBSOUT4
48
KBSOUT5/TDO
47
KBSOUT6/RDY
43
KBSOUT7
42
KBSOUT8
41
KBSOUT9
40
KBSOUT10
39
KBSOUT11
38
KBSOUT12/GPIO64
37
KBSOUT13/GPIO63
36
KBSOUT14/GPIO62
35
KBSOUT15/GPIO61/XOR_OUT
34
KBSOUT16/GPIO60
33
KBSOUT17/GPIO57
70
SCL1/GPIO17
69
SDA1/GPIO22
67
SCL2/GPIO73
68
SDA2/GPIO74
119
SCL3/GPIO23
120
SDA3/GPIO31
24
SCL4/GPO47
28
SDA4/GPIO53
72
PSCLK1/GPIO37
71
PSDAT1/GPIO35
10
PSCLK2/GPIO26
11
PSDAT2/GPIO27
12
PSCLK3/GPIO25
13
PSDAT3/GPIO12
77
32KX1/32KCLKIN
79
32KX2
EC
EC
Can try to
change to
0_0603
D42 BAS316 D42 BAS316
D39 BAS316 D39 BAS316
D41 BAS316 D41 BAS316
D40 BAS316 D40 BAS316
D44 BAS316 D44 BAS316
D38 BAS316 D38 BAS316
D37 BAS316 D37 BAS316
D43 EV@BAS316 D43 EV@BAS316
4
For Pin 102
+A3VPCU
46
76
88
115
VCC1
VCC2
VCC3
VCC4
VCC5
A:(9/7) change from L to 0 ohm base on EC FAE suggestion
C564
C564
0.1u/10V_4
0.1u/10V_4
8769AGND
102
U26
U26
H=1.6mm
AVCC
LPC
LPC
KB
KB
SMB
SMB
PS/2
PS/2
GND1
GND2
GND3
GND4
GND5
GND6
5
18
45
78
89
116
R522 0_6 R522 0_6
8769AGND
+3V
R487
R487
10K_4
10K_4
HWPG
C570
C570
10u/10V_8
10u/10V_8
A/D
A/D
D/A
D/A
GPIO41(VBAT)
GPIO
GPIO
wake-up
wake-up
capability
capability
CIRTX2/GPIO52/RDY
no wake-up
no wake-up
capability
capability
GPO84/BADDR0
SOUT_CR/GPO83/BADDR1
SIN_CR/CIRRX/GPIO87
SER
SER
A_PWM/GPIO15
B_PWM/GPIO21
C_PWM/GPIO13
D_PWM/GPIO32
PWM
PWM
E_PWM/GPIO45
F_PWM/GPIO40/CLKIN48
G_PWM/GPIO66
H_PWM/GPIO33
TIMER
TIMER
SPI_DI/GPIO77
SPI
SPI
SPI_DO/GPO76/SHBM
SPI_SCK/GPIO75
IRRX1/GPIO72/SIN2
FIR
FIR
IRRX2_IRSL0/GPIO70
IRTX/GPIO71/SOUT2
CIRRXM/GPIO46/TRST
GPIO34/CIRRXL
CIR
CIR
CIRTX1/GPIO16
CIRTX2/GPIO30
F_SDI/F_SDIO1
F_SDO/SDIO0
FIU
FIU
CLKOUT/GPIO55
VCORF
AGND
44
103
VCORF_uR
C553
C553
1u/10V_6
1u/10V_6
4
VDD
AD0/GPI90
AD1/GPI91
AD2/GPI92
AD3/GPI93
AD4/GPIO05
AD5/GPIO04
AD6/GPIO03
AD7/GPIO07
DA0/GPI94
DA1/GPI95
DA2/GPI96
DA3/GPI97
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO50/TDO
GPO82/TRIS
GPIO06
TA1/GPIO56
TB1/GPIO14
TA2/GPIO20
TB2/GPIO01
TA3/GPIO51
TB3/GPIO36
GPIO81
F_CS0
F_SCK
VCC_POR
VREF
A:(9/5)Change from +3V to +3V_S5
ECPWROK
3
B:(10/26) Add BATLED0/BATLED1/PWRLED PU to +3VPCU
BATLED0#
R683 10K_4 R683 10K_4
BATLED1#
R684 10K_4 R684 10K_4
PWRLED#
Reserve for EMI
EC_VDD
C514
C514
0.1u/10V_4
0.1u/10V_4
B:(9/27) Remove R527, already PU 100k to +3VPCU on Battery CONN (CN20/Pin4)
97
98
99
100
108
96
95
94
101
105
106
107
EC_VBAT
80
17
20
21
25
27
110
BADDR0
112
111
113
93
32
118
62
Rev03 modify 2007/08/16
65
22
16
81
66
31
63
117
64
26
15
84
83
82
DNBSWON#_uR
91
RSMRST#_uR
75
73
PWROK_EC
74
23
14
114
109
SPI_SDI_uR
86
SPI_SDO_uR
87
SPI_CS0#_uR
90
SPI_SCK_uR
92
30
VCC_POR#
85
104
WPC8763LDG:
WPC8769LDG:
WPCE775L:
WPCE775C:
For WPC8763
EC_VBAT
+3V
R477
R477
0_6
0_6
C506
C506
10u/10V_8
10u/10V_8
R527 *10K_4 R527 *10K_4
D48 BAS316 D48 BAS316
R214 0_4 R214 0_4
R535 0_4 R535 0_4
R528 4.7K_4 R528 4.7K_4
R516 0_4 R516 0_4
AL008763B00
AJ087690F08
AJ007750F00
AJ007750F01
+3VPCU
TEMP_MBAT 32
USB_OC# 15,28
FN0# 28
FN1# 28
DIGVOL_UP 23
DIGVOL_DN 23
NBSWON# 28,30
SUSB# 15
CC-SET 32
VFAN 6
CV-SET 32
SUSLED_EC 28
RF_LED 30
AMP_MUTE# 22
ID 32
D/C# 32
EC_BLON 20
LED_LOGO 30
BT_EN 28
CRT_SENSE#
LID591# 20
CONTRAST 20
KILL_SW 30
BATLED0# 28
BATLED1# 28
SUSON 36,37
MAINON 21,36,37
TP_LED_ON 28
PWRLED# 28
+1.2V_ON 35,37
FANSIG 6
LOM_DISABLE# 24
ACIN 28,32
S5_ON 33,37
VRON 34
T173T173
RF_EN 25
CELL-SET 32
DNBSWON# 15
RSMRST# 15
SUSC# 15
ECPWROK 14
KEY_INT 28
CIRRX2
NUMLED 30
+A3VPCU VREF_uR
+3VPCU
CAPSLED 30
USB_OC2# 15,28
B:(10/19) Remove Pin111,Pin113 from MMB LED control to NC pin
B:(10/19) GPIO04 and GPIO52, GPIO46 and GPIO77 can’t co-exist.
Change BT_EN from Pin27 to Pin111.
Change CRT_SENSE# from Pin84 to Pin113
For Pin 80
+A3VPCU
C254
For WPCE775
C254
*0.1u/10V_4
*0.1u/10V_4
R529 *0_4 R529 *0_4
R530 0_4 R530 0_4
DNBSWON#_uR
DIGVOL_UP
DIGVOL_DN
CCD_POWERON 20
R685 10K_4 R685 10K_4
C578
C578
*0.1u/10V_4
*0.1u/10V_4
Reserve for EMI
Close to EC
To: Battery Connector (Input)
To: USB Power Switch (Input)
To: Media Board (Input)
To: Media Board (Input)
To: Volume Wheel (Input)
To: Volume Wheel (Input)
To: HW Power Button (Input)
To: South Bridge (Input)
To: Battery Charger (Output)
To: FAN Control IC (Output)
To: Battery Charger (Output)
To: SUS LED circuit (Output)
To: RF LED (Output)
To: Mute Audio AMP (Output)
To: Battery Connector (Input)
To: Select VIN is from DC or Battery (Output)
To: Logo LED (Output)
To: Enable BT module (Output)
To: CRT connector and South Bridge (Input)
To: MR sensor (Input)
To: Control Panel brightness (Output)
To: Enable/Disable WiFi and BT (Input)
To: Battery LED--Full charge (Output)
To: Battery LED--Charging (Output)
To: Control S3 power (Output)
To: Control S1 power (Output)
To: Touch PAD Connector (Output)
To: Power ON LED (Output)
To: FAN connector (Input)
To: LAN IC (Output)
To: ACIN LED and AC detect circuit (Input)
To: Control S5 power (Output)
To: CPU Vcc core PWM IC (Output)
To: Enable WiFi (Output)
To: Battery Charger (Output)
To: South Bridge (Output)
To: South Bridge (Output)
To: South Bridge (Input)
To: South Bridge, be careful the timing (Output)
To: Touch Sensor Board Con. (Input)
To: CIR (Input)
To: Internal KB LED (output)
To: Internal KB LED (output)
To: USB Power Switch (Input)
Rev03 modify 2007/08/17
+3V_S5
5
2 4
3
R255 0_4 R255 0_4
3
A:(8/28) Add ckt for Power SQ & current leakage
1
U30
U30
*NC7SZ126M5
*NC7SZ126M5
R239 0_4 R239 0_4
R242 0_4 R242 0_4
+3VPCU
C577
C577
C560
C560
*0.1u/10V_4
*0.1u/10V_4
*0.1u/10V_4
*0.1u/10V_4
To: CCD Power Switch (Output)
NB_PWRGD 12
C265
C265
*0.1u/10V_4
*0.1u/10V_4
SB_PWRGD 15
C276
C276
*0.1u/10V_4
*0.1u/10V_4
2
SM BUS PU
MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA
3ND_MBCLK
3ND_MBDATA
FN0#
FN1#
A:(8/23) Add PU +3VPCU for 3rd SMBUS
CRT_SENSE#
I/O ADDRESS SETTING
BADDR1-0
0 0
0 1
1 0
1 1
SHBM=0: Enable shared memory with host BIOS
B:(10/21) change net name from LED1# to BT_EN
C:(11/27) Stuff R510, no-stuff R509 (slove BT module can't bring up issue)
BADDR0
BADDR0
BT_EN
BADDR1
RF_EN
SHBM
Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both system BIOS and EC firmware
ID
2ND_MBCLK
2ND_MBDATA
SPI FLASH
SPI_SDI_uR
R505 33_4 R505 33_4
SPI_SDO_uR
R514 33_4 R514 33_4 C551
SPI_SCK_uR
R513 33_4 R513 33_4
SPI_CS0#_uR
R507 10K_4 R507 10K_4
+3VPCU
MY0
INTERNAL KEYBOARD STRIP SET
CIR (Copy from PB2A)
Only for 8769/775C
+5VPCU +3VPCU
R661 CIR@0_4 R661 CIR@0_4
R662 *CIR@0_4 R662 *CIR@0_4
+5VPCU
CIRRX2
20 mlis
BTO
2
1
I/O Address
R509 *10K_4 R509 *10K_4
R510 10K_4 R510 10K_4
R531 10K_4 R531 10K_4
U15
U15
6
SCL
5
SDA
7
WP
24LC08BT-I
24LC08BT-I
+3VPCU
+3V
Data
164Fh
H=1.75mm
1
A0
2
A1
3
A2
8
VCC
4
GND
+3VPCU
C562
C562
0.1u/10V_4
0.1u/10V_4
R534 4.7K_4 R534 4.7K_4
R533 4.7K_4 R533 4.7K_4
R520 4.7K_4 R520 4.7K_4
R523 4.7K_4 R523 4.7K_4
R506 4.7K_4 R506 4.7K_4
R503 4.7K_4 R503 4.7K_4
R29 4.7K_4 R29 4.7K_4
R28 4.7K_4 R28 4.7K_4
R218 *4.7K_4 R218 *4.7K_4
Index
XOR TREE TEST MODE
CORE DEFINED
2Eh 2Fh
164Eh
ADDRESS: A0H
H=2.16mm
U27
U27
SPI_SDI
2
SO
SPI_SDO
5
SI
SPI_SCK
6
SCK
1
CE
EON 8M
EON 8M
R511 10K_4 R511 10K_4
R660
R660
*CIR@10K_4
*CIR@10K_4
B:(10/23) change CIR pin-define and footprint (follow BL5)
B:(11/1) Change P/N to NEBK0081D00 (Follow ME and BL5S)
C:(12/11) Change U41(CIR) from BEBK0081D00 to BEBK0081D01
+3VPCU
CIR@0.1u/10V_4 C739 CIR@0.1u/10V_4 C739
CIR_VCC
3
1
2
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
FP/ KB/ TP/ USB /BT/FELICA
FP/ KB/ TP/ USB /BT/FELICA
FP/ KB/ TP/ USB /BT/FELICA
Date: Sheet of
Date: Sheet of
Date: Sheet
+3VPCU
8
VDD
HOLD
VSS
U41
U41
VCC
OUT
GND
GND
CIR@IR-IRM-V538-TR1
CIR@IR-IRM-V538-TR1
C551
7
0.1u/10V_4
0.1u/10V_4
3
WP
4
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
1
3C
3C
3C
of
29 43 Tuesday, January 22, 2008
29 43 Tuesday, January 22, 2008
29 43 Tuesday, January 22, 2008
5
LOGO LED
99-113UNC/V90/TR8
99-113UNC/V90/TR8
A:(9/12) change Logo LED footprint
B:(10/16) change LED5,LED6 to right angle type
(follow TE1) by ME request
D D
B:(10/25) update LED5,LED6 footprint and PN
C:(12/06) update LED5,LED6 footprint and PN
LED_LOGO 29
C C
LED_LOGO
*MID@0.1u/10V_4
*MID@0.1u/10V_4
+5V +5V
R405
LED6
LED6
2
R405
MID@390_4
MID@390_4
2 1
LOGO_2
3
Q49
Q49
MID@ME2N7002D
MID@ME2N7002D
1
R404
R404
MID@390_4
MID@390_4
2 1
99-113UNC/V90/TR8
LED5
LED5
2
C423
C423
D71 *MID@VPORT D71 *MID@VPORT
2 1
D70 *MID@VPORT D70 *MID@VPORT
2 1
RAMP:(1/15) Change ESD diode type, DEL D26, Add D70,D71(default no stuff) RAMP:(1/15) Change SW4 footprint from
99-113UNC/V90/TR8
Mainstream --> White
Low Cost --> N/A
LOGO_1
3
LED_LOGO
Q48
Q48
MID@ME2N7002D
MID@ME2N7002D
1
LOGO_1
LOGO_2
Jumper & LED (debug use)
RAMP:(1/15) DEL debug LED circuit, DEL R210,LED4
JP14
JP14
1 2
SHORT PAD
SHORT PAD
JP13
B B
A A
NBSWON# 28,29
NBSWON#
5
JP13
1 2
SHORT PAD
SHORT PAD
4
W-LAN&BT
WiMAX LED
Keyboard
4
B:(10/26) update LED8 P/N
B:(10/25) update LED8 footprint and PN
B:(10/18) change LED8 footprint (follow ME)
LED8
LED8
RF_LED_R
*LED12-21SYGC-TR8
*LED12-21SYGC-TR8
2 1
LED7
LED7
D53
D53
1
2
*BZ5V6
*BZ5V6
MX7
1
MX2 MX1
2
MX3
3
MX4
5 6
MY7
MY13
6
MY8
4
MY9
2
MX0
MX5
6
MX6
4
MX1
2
MY10
MY11
6
MY12
4
MY15
2
MX7
MX2
6
MX3
4
MX4
2
MY3
MY5
6
MY14
4
MY6
2
MY2
MY1
6
MY0
4
MY4
2
MY17
MY16
A:(8/23) Add 0.1u
R664 390_4 R664 390_4
WiMAX_LED# 25
3
LED12-21SYGC-TR8
LED12-21SYGC-TR8
2 1
Mainstream --> Orange
Low Cost --> Orange
RAMP:(1/16) update LED7,LED8 footprint to LED27-21-BHC-ZL1M2TY-3C
RAMP:(1/18) Change LED8 P/N from BE0R0041Z00 to BE0R0053Z00
RAMP:(1/18) Change LED7 P/N from BEBL0004Z22 to BEBL0074Z04
B:(10/26) update LED7 P/N
B:(10/25) Modify WiMAX LED circuit (default no stuff)
R663 *100_4 R663 *100_4
+5V
RF_LED_R
WiMAX_R
+3VPCU
RP4
RP4
10
9
MX6
8
MX5
7 4
MX0
10KX8
10KX8
7 8
5
3
1
100Px4
100Px4
7 8
5
3
1
100Px4
100Px4
7 8
5
3
1
100Px4
100Px4
7 8
5
3
1
100Px4
100Px4
7 8
5
3
1
100Px4
100Px4
7 8
5
3
1
100Px4
100Px4
C38 100p/50V_4 C38 100p/50V_4
C37 100p/50V_4 C37 100p/50V_4
CP4
CP4
CP7
CP7
CP8
CP8
CP9
CP9
CP6
CP6
CP5
CP5
A:(8/27) Confirm with EC FAE,
MY no need External PU resister
3
IDE LED
RF_LED 29
WiMAX_R
1
CN9
CN9
36
35
88171-3400L-34P-R
88171-3400L-34P-R
Keyboard Side 8/15 Add K_LED_P power
3
Q77
Q77
2
*BSS84
*BSS84
R679
R679
+3V
*10K_4
*10K_4
K_LED_P K_LED_P
1
MY16
2
3
MY17
4
5
K_LED_P
6
MY2
7
MY1
8
MY0
9
MY4
10
MY3
11
MY5
12
MY14
13
MY6
14
MY7
15
MY13
16
MY8
17
MY9
18
MY10
19
MY11
20
MY12
21
MY15
22
MX7
23
MX2
24
MX3
25
MX4
26
MX0
27
MX5
28
MX6
29
MX1
30
K_LED_P
31
CAPSLED
32
FN_F10
33
NUMLED
34
3
MY16 29
MY17 29
MY2 29
MY1 28,29
MY0 29
MY4 29
MY3 29
MY5 29
MY14 29
MY6 29
MY7 29
MY13 29
MY8 29
MY9 29
MY10 29
MY11 29
MY12 29
MY15 29
MX7 29
MX2 28,29
MX3 28,29
MX4 28,29
MX0 29
MX5 28,29
MX6 29
MX1 29
K_LED_P
CAPSLED 29
FN_F10 29
NUMLED 29
+3V
Kill SW
C39
C39
*100p/50V_4
*100p/50V_4
A:(8/29) reserve cap for EMI
K_LED_P
R32 150_4 R32 150_4
2
+5V
R396
R396
10K_4
D25
D25
R398
IDE_LED# 28 ODD_LED# 27
2 1
2 1
R398
BAS316
BAS316
150_4
150_4
D23
D23
BAS316
BAS316
ODD_LED#
R394
R394
10K_4
10K_4
HDDLED#
10K_4
+5V
3
ME2N7002D
ME2N7002D
+3V +3V
R395
R395
2
10K_4
10K_4
1
Q46
Q46
1
SATA_LED# 16
B:(9/26) Swap Q46 Pin1/Pin3 for leakage issue
+3VPCU
R400
R400
10K_4
10K_4
SW4
SW4
2
KILL_SW 29
+3VPCU
D22
D22
DA204U
DA204U
1
3
2
C436
C436
*100p/50V_4
*100p/50V_4
RAMP:(1/18) Change CN9 footprint from 88171-3400L-34P-L to 91504-340N-34P-L
RAMP:(1/15)DEL CN10 (Keyboard CONN) Co-kay footprint 196130-340201-34P-L (SMT open issue)
CAPSLED
K_LED_P
(Pin 31)
FN_F10
K_LED_P
(Pin 6)
NUMLED
K_LED_P
(Pin 1)
15"
V
V
V
2
17"
V
V
1
3
SW-NSS506-212F-CCCD1T-3P
SW-NSS506-212F-CCCD1T-3P
A:(9/14) change footprint
C:(12/6) Change SW4 P/N from DHL00212F05 to DHL00212F07
SW-NSS506-212F-CCCD1T-3P to
SW-NSS506-212F-CCCD1T-3P-BD3A (SMT open issue)
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SW/LED/KEYBOARD
SW/LED/KEYBOARD
SW/LED/KEYBOARD
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
30 43 Tuesday, January 22, 2008
30 43 Tuesday, January 22, 2008
1
30 43 Tuesday, January 22, 2008
3C
3C
3C
of
of
of
5
HOLE
D D
Take care NUT P/N base on IV/EV sku
HOLE25
HOLE25
HOLE24
HOLE15
HOLE15
EV@IV@H-TC315BC236D146P2
EV@IV@H-TC315BC236D146P2
VGA NUT
(BOT)
B:(10/18) update Hole15 footprint
KB NUT
(TOP) (BOT) (BOT)
HOLE5
HOLE5
H-C236D146P2
H-C236D146P2
HOLE24
EV@IV@H-C236D146P2
1
HOLE6
HOLE6
H-C236D146P2
H-C236D146P2
1
EV@IV@H-C236D146P2
1
EV@IV@H-C236D146P2
EV@IV@H-C236D146P2
1
B:(10/26) Add 0805 footprint for EMI debug
RAMP:(1/15) DEL R680,R681,R682, Short directly
1
HOLE32
HOLE32
MD@H-C236D146P2
MD@H-C236D146P2
MDC NUT
(BOT) (BOT)
RAMP:(1/16) Add "MD@" for Hole32, only stuff for Modern SKU
HOLE28
HOLE28
H-C236D126P2
Mini-PCI-A NUT Mini-PCI-B NUT
H-C236D126P2
B:(10/17) update footprint
1
1
BTO
HOLE35
HOLE35
H-C236D126P2
H-C236D126P2
4
HOLE17
HOLE17
H-C236D146P2
CPU NUT
1
H-C236D146P2
B:(10/26) Add 0805 footprint for EMI debug
RAMP:(1/15) DEL R680,R681,R682, Short directly
HOLE13
HOLE13
H-C197D126P2
H-C197D126P2
HOLE18
HOLE18
H-C236D146P2
H-C236D146P2
1
HOLE14
HOLE14
H-C197D126P2
H-C197D126P2
1
3
HOLE23
HOLE23
H-C236D146P2
H-C236D146P2
1
1
1
NUT P/N Control Table
UMA sku EV sku
HOLE15
HOLE24
HOLE25
FBBL5002010
FBBL5002010
FBBL5002010
2
FBBD3017010
FBBD3017010
FBBD3017010
Stitch CAP
+3V
C438
C438
.1U_4
.1U_4
+1.2V
C268
C268
.1U_4
.1U_4
1
VIN
+3V
C390
C390
.1U_4
.1U_4
+3V
+5V
C680
C680
.1U_4
.1U_4
VIN
+5VPCU
C630
C630
.1U_4
.1U_4
EMI CAP.
E-SATA NUT
(BOT)
HOLE44
HOLE44
*H-TS315BC295D118P2-8
*H-TS315BC295D118P2-8
C C
1
RAMP:(1/20) update Hole44 footprint RAMP:(1/20) update Hole43 footprint
HOLE8
HOLE8
*H-C216D91P2
*H-C216D91P2
1
HOLE33
HOLE33
*h-sped110p2
*h-sped110p2
1
B:(10/24) update hole33 footprint
HOLE30
HOLE30
B B
*H-C236D91P2
*H-C236D91P2
1
HOLE42
HOLE42
*H-C276D118P2-8
*H-C276D118P2-8
1
HOLE36
HOLE36
*H-C335D118P2-8
*H-C335D118P2-8
1
RAMP:(1/15) No stuff E-SATA NUT for REV.G platform. Remove Hole31,Hole37
RAMP:(1/21) DEL HOLE31,37 (E-SATA NUT)
HOLE43
HOLE43
*H-TSBC315D118P2-8
*H-TSBC315D118P2-8
1
C:(12/9) update Hole43 footprint C:(12/14) Stuff EMI CAP C:(12/9) update Hole44 footprint
HOLE9
HOLE9
*H-C216D91P2
*H-C216D91P2
1
HOLE38
HOLE38
*H-C236D91P2
*H-C236D91P2
1
HOLE41
HOLE41
*H-C335D118P2-8
*H-C335D118P2-8
1
HOLE27
HOLE27
*H-C335I248D118P2-8
*H-C335I248D118P2-8
1
HOLE22
HOLE22
*H-C216D91P2
*H-C216D91P2
HOLE40
HOLE40
*H-SPED118P2
*H-SPED118P2
B:(10/17) update footprint
1
1
HOLE19
HOLE19
*H-C335D118P2-8
*H-C335D118P2-8
1
HOLE29
HOLE29
*H-C335D118P2-8
*H-C335D118P2-8
1
HOLE26
HOLE26
*H-C216D91P2
*H-C216D91P2
1
HOLE4
HOLE4
*H-C335D118P2-8
*H-C335D118P2-8
HOLE21
HOLE21
*H-C335D118P2-8
*H-C335D118P2-8
1
1
HOLE34
HOLE34
*H-C216D91P2
*H-C216D91P2
1
HOLE16
HOLE16
*H-CT315
*H-CT315
1
B:(10/17) update footprint
HOLE39
HOLE39
*H-C216D91P2
*H-C216D91P2
1
HOLE7
HOLE7
*H-C335D146P2-8
*H-C335D146P2-8
1
HOLE20
HOLE20
*H-C335D118P2-8
*H-C335D118P2-8
1
HOLE11
HOLE12
HOLE12
*H-C335D118P2-8
*H-C335D118P2-8
RAMP:(1/16) Follow BL5, update Hole footprint (13pcs)
HOLE10
HOLE10
*H-C335D118P2-8
*H-C335D118P2-8
1
1
HOLE11
*H-C315D118P2-8
*H-C315D118P2-8
1
A:(9/17) Base ON EMI mail(9/13) Item5
A:(9/12) Base ON EMI mail(9/13) Item1
B:(10/25) EMI Solution:
(1)+5V *14pcs
(2)+5VPCU *22PCS
(3)+3VPCU *21PCS
(4)VIN *21PCS
+3V
+3V +3V +3V +3V
C488
C488
C70
C70
.1U_4
.1U_4
.1U_4
.1U_4
+1.8V
+1.8V
C262
C262
C209
C209
.1U_4
.1U_4
.1U_4
.1U_4
+5V +5V +5V
C744
C744
C743
C743
.1U_4
.1U_4
.1U_4
.1U_4
+5VPCU
+5VPCU
C757
C757
C758
C758
.1U_4
.1U_4
.1U_4
.1U_4
+3VPCU
+3VPCU +3VPCU +3VPCU +3VPCU +3VPCU +3VPCU +3VPCU +3VPCU +3VPCU +3VPCU +3VPCU +3VPCU +3VPCU +3VPCU
C779
C779
C780
C780
.1U_4
.1U_4
.1U_4
.1U_4
VIN
VIN VIN VIN VIN
C801
C801
C802
C802
.1U_4
.1U_4
.1U_4
.1U_4
PC176
PC176
PC185
PC185
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
C12
C12
C31
C16
C16
.1U_4
.1U_4
+1.8V
C74
C74
.1U_4
.1U_4
C745
C745
.1U_4
.1U_4
+5VPCU +5VPCU
C759
C759
.1U_4
.1U_4
C781
C781
.1U_4
.1U_4
C804
C804
.1U_4
.1U_4
C31
.1U_4
.1U_4
.1U_4
.1U_4
+1.8V +1.8V +1.8V +1.8V +1.8V
C389
C389
C192
C192
.1U_4
.1U_4
.1U_4
.1U_4
+5V
+5V
C749
C749
C747
C747
.1U_4
.1U_4
.1U_4
.1U_4
+5VPCU +5VPCU +5VPCU +5VPCU +5VPCU +5VPCU +5VPCU +5VPCU +5VPCU
C761
C761
C760
C760
.1U_4
.1U_4
.1U_4
.1U_4
C782
C782
C783
C783
.1U_4
.1U_4
.1U_4
.1U_4
C805
C805
C810
C810
.1U_4
.1U_4
.1U_4
.1U_4
PC178
PC178
PC177
PC177
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
C249
C249
C273
C273
.1U_4
.1U_4
.1U_4
.1U_4
+5V +5V +5V +5V
C751
C751
C752
C752
.1U_4
.1U_4
.1U_4
.1U_4
C763
C763
C762
C762
.1U_4
.1U_4
.1U_4
.1U_4
C785
C785
C784
C784
.1U_4
.1U_4
.1U_4
.1U_4
VIN VIN
C816
C816
C815
C815
.1U_4
.1U_4
.1U_4
.1U_4
PC179
PC179
0.1u/50V_6
0.1u/50V_6
ESD Varistor
C386
C386
.1U_4
.1U_4
C754
C754
C753
C753
.1U_4
.1U_4
.1U_4
.1U_4
C765
C765
C764
C764
.1U_4
.1U_4
.1U_4
.1U_4
C787
C787
C786
C786
.1U_4
.1U_4
.1U_4
.1U_4
VIN VIN
C819
C819
C820
C820
.1U_4
.1U_4
.1U_4
.1U_4
VIN
PC180
PC180
0.1u/50V_6
0.1u/50V_6
+1.2V +1.2V +1.2V +1.2V
C807
D78
D78
VPORT
VPORT
C806
C806
.1U_4
.1U_4
2 1
C768
C768
.1U_4
.1U_4
C790
C790
.1U_4
.1U_4
PC183
PC183
0.1u/50V_6
0.1u/50V_6
D79
D79
VPORT
VPORT
C807
.1U_4
.1U_4
C823
C823
.1U_4
.1U_4
C808
C808
.1U_4
.1U_4
D80
D80
D81
D81
VPORT
VPORT
VPORT
2 1
VIN +NB_CORE
C769
C769
.1U_4
.1U_4
C791
C791
.1U_4
.1U_4
VPORT
2 1
C824
C824
.1U_4
.1U_4
C:(12/18) Stuff C217,C71,C746,C748,C750,C755,C770,C794,C798,C817,C822 = 0.1uf (CH41002KB93)
for EMI issue
+5VPCU +5VPCU +5VPCU +5VPCU +5VPCU +5VPCU
C772
C772
C771
C771
.1U_4
.1U_4
.1U_4
.1U_4
C793
C793
C792
C792
.1U_4
.1U_4
.1U_4
.1U_4
PC184
PC184
0.1u/50V_6
0.1u/50V_6
C803
C803
.1U_4
.1U_4
+1.2V +1.2V +1.2V +1.2V
2 1
RAMP:(1/18) ADD C803,C806,C807,C808,D78~81 for +1.2V (ESD issue)
+5V
C756
C756
.1U_4
.1U_4
C767
C767
C766
C766
.1U_4
.1U_4
.1U_4
.1U_4
C789
C789
C788
C788
.1U_4
.1U_4
.1U_4
.1U_4
VIN
C821
C821
.1U_4
.1U_4
PC182
PC182
PC181
PC181
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
+1.8V +1.8V
C71
C71
C217
C217
.1U_4
.1U_4
.1U_4
.1U_4
+5V
C746
C746
C748
C748
.1U_4
.1U_4
.1U_4
.1U_4
+5VPCU
C770
C770
.1U_4
.1U_4
+3VPCU
C794
C794
C798
C798
.1U_4
.1U_4
.1U_4
.1U_4
VIN
C817
C817
.1U_4
.1U_4
+1.2V_S5
C822
C822
.1U_4
.1U_4
C774
C774
C773
C773
.1U_4
.1U_4
+3VPCU +3VPCU +3VPCU
C795
C795
.1U_4
.1U_4
.1U_4
.1U_4
C796
C796
.1U_4
.1U_4
C775
C775
.1U_4
.1U_4
C797
C797
.1U_4
.1U_4
+5V
+3VPCU
C750
C750
.1U_4
.1U_4
C776
C776
.1U_4
.1U_4
C800
C800
.1U_4
.1U_4
+5V
+3VPCU
+5V
C755
C755
.1U_4
.1U_4
+5VPCU +5VPCU
C777
C777
.1U_4
.1U_4
+3VPCU
C30
C30
.1U_4
.1U_4
C778
C778
.1U_4
.1U_4
12/6 Add EMI CAP for Power Circuit
A A
VIN
PC165
PC165
0.1u/50V_6
0.1u/50V_6
PC160
PC156
0.1u/50V_6
0.1u/50V_6
5
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
PC160
PC159
PC159
PC158
PC158
PC157
PC157
PC156
PC161
PC161
0.1u/50V_6
0.1u/50V_6
4
PC162
PC162
0.1u/50V_6
0.1u/50V_6
PC163
PC163
0.1u/50V_6
0.1u/50V_6
PC164
PC164
0.1u/50V_6
0.1u/50V_6
PC175
PC175
0.1u/50V_6
0.1u/50V_6
PC166
PC166
0.1u/50V_6
0.1u/50V_6
3
PC167
PC167
0.1u/50V_6
0.1u/50V_6
PC168
PC168
0.1u/50V_6
0.1u/50V_6
PC169
PC169
0.1u/50V_6
0.1u/50V_6
PC170
PC170
0.1u/50V_6
0.1u/50V_6
PC171
PC171
0.1u/50V_6
0.1u/50V_6
PC172
PC172
0.1u/50V_6
0.1u/50V_6
PC174
PC173
PC173
0.1u/50V_6
0.1u/50V_6
2
PC174
0.1u/50V_6
0.1u/50V_6
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Quanta Computer Inc.
HOLE/EMI CAP
HOLE/EMI CAP
HOLE/EMI CAP
of
31 43 Tuesday, January 22, 2008
31 43 Tuesday, January 22, 2008
1
31 43 Tuesday, January 22, 2008
3C
3C
3C
5
PC143
PC143
0.1u/50V_6
0.1u/50V_6
11/14
PC49
PC49
0.1u/50V_6
0.1u/50V_6
PR41
PR41
*6.8K/F_6
*6.8K/F_6
PCN4
PCN4
4
3
2
D D
20277-04XX-4P-L
20277-04XX-4P-L
1
ACIN 28,29
LITTLE-10A-1206
LITTLE-10A-1206
1 2
PC50
PC50
2.2n/50V_6
2.2n/50V_6
PR40
PR40
*10K/F_6
*10K/F_6
PF5
PF5
ACIN_1
PL14
PL14
HI0805R800R-00_8
HI0805R800R-00_8
PL13
PL13
HI0805R800R-00_8
HI0805R800R-00_8
2 1
PR25
PR25
*10K/F_6
*10K/F_6
PD6
PD6
*ZD12V
*ZD12V
12/6
11/14
Input sense resistor and Constant power setting table
+3VPCU
UMA Discrete
PR198
ACIN 28,29
DMN601K-7
DMN601K-7
1 2
PC108
PC108
0.1u/50V_6
0.1u/50V_6
MBDATA 29
MBCLK 29
PR7
PR7
*100K/F_6
*100K/F_6
PR198
4.7K/F_6
4.7K/F_6
PQ50
PQ50
PR199
PR199
100K/F_6
100K/F_6
3
2
1
9/07 Addition resistor
TEMP_MBAT
PF4
PF4
1 2
BUS-15A-1206
BUS-15A-1206
PR138
PR138
100K/F_6
100K/F_6
PR136
PR136
0_6
0_6
1 2
PC6
PC6
0.01u/50V_6
0.01u/50V_6
C C
B B
A A
20m Ohm 20m Ohm
R1
CS+020AGM00
10K Ohm
R2
10K Ohm
R3
CS31003F949
PF1
DKA00VFU000 DKA00VFU000
+3VPCU
R559 0_4 R559 0_4
PD18
PD18
*SW1010CPT
*SW1010CPT
CN20
CN20
10
1
2
3
11
4
5
6
7
8
12
9
13
SUYIN BATTERY
SUYIN BATTERY
ADDRESS: 16H
+3VPCU +3VPCU
1
*DA204U
*DA204U
2
A:(9/7) Add ESD diode base on EC FAE suggestion
1
PD5
PD5
ID TEMP_MBAT
3
*DA204U
*DA204U
2
CS+020AGM00
2.43K Ohm
CS22433F913 CS31003F949
10K Ohm
CS31003F949
10A 10A
C:(12/7) Add Diode to avoid burn issue
PR5
PR5
when BATTERY+(Pin2 ) and ID(PIN3) short
*100K_4
*100K_4
ID_L
PD14
PD14
3
ID ID_L
B/I
PR8 10K_4 PR8 10K_4
47p/50V_6
47p/50V_6
PR135
PR135
100_4
100_4
2 1
5
ID 29
TEMP_MBAT
PC7
PC7
PR137
PR137
100_4
100_4
PD13
PD13
ZD3.6V
ZD3.6V
MBAT+
47p/50V_6
47p/50V_6
2 1
PC107
PC107
100p/50V_6
100p/50V_6
PC8
PC8
PD15
PD15
ZD3.6V
ZD3.6V
4
VA
PC4
PC4
0.1u/50V_6
0.1u/50V_6
PD4
PD4
SW1010CPT
SW1010CPT
PDS1040S-13
PDS1040S-13
PC5
PC5
0.1u/50V_6
0.1u/50V_6
PD17
PD17
1
2
P4SMAJ20A
P4SMAJ20A
PD16
PD16
3
2 1
9/11 Add PD14.
CHG_EN 29
PR168
PR168
0_6
0_6
6251EN
PR169
PR169
100K/F_6
100K/F_6
PR16
PR16
20/F_6
20/F_6
CSOP_1
CSON_1
0.1u/50V_6
12/18
ISL6251_VDD
PR140
PR140
*100K/F_6
*100K/F_6
0.1u/50V_6
*10K/F_6
*10K/F_6
PR10
PR10
10/F_6
10/F_6
TEMP_MBAT 29
HI0805R800R-00_8
HI0805R800R-00_8
PL6
PL6
BAT-V
PL7
PL7
HI0805R800R-00_8
HI0805R800R-00_8
+3VPCU
6251CELLS_1
CELL-SET 29
CELL-SET = Hi ----> Cells = VDD ---->4S
CELL-SET = Low ----> Cells = GND ---->3S
4
PC10
PC10
2
DCIN
PR141
PR141
47n/25V_6
47n/25V_6
PR13
PR13
20/F_6
20/F_6
PR6
PR6
82.5K/F_6
82.5K/F_6
PR14
PR14
10K/F_6
10K/F_6
3
*DMN601K-7
*DMN601K-7
1
PC12
PC12
PR11
PR11
*10K/F_6
*10K/F_6
PR142
PR142
*10K/F_6
*10K/F_6
PQ34
PQ34
3
0.02_7520
0.02_7520
PR148
PR148
C:(12/7)Change PR148 from RC7520-4P to RC7520
1 2
VA2
R1
PC25
PC25
0.1u/50V_6
0.1u/50V_6
CSIN_1
CSIP_1
PR19
PR19
2.2/F_6
2.2/F_6
CSOP
21
CSOP
1 2
CSON
22
CSON
23
ACPRN
24
DCIN
6251ACSET
2
ACSET
3
EN
CELLS
4
6251EN VREF
6251CELLS_1
3
PC14
PC14
0.01u/50V_6
6251CELLS_2
PR139
PR139
*100K/F_6
*100K/F_6
2
PQ35
PQ35
*DMN601K-7
*DMN601K-7
0.01u/50V_6
1
PC16
PC16
0.1u/50V_6
0.1u/50V_6
CSIP
19
CSIP
PU4
PU4
ISL6251A
ISL6251A
ICOMP5VCOMP
6
6251ICOMP
6251VCOMP1
6251VCOMP2
PC15
PC15
*100p/50V_6
*100p/50V_6
3
PR17
PR17
20/F_6
20/F_6
CSIN
20
CSIN
ICM7CHLIM
11/14
PR143
PR143
3.3K/F_6
3.3K/F_6
PC116
PC116
0.01u/50V_6
0.01u/50V_6
PR27
PR27
220K/F_6
220K/F_6
PR28
PR28
220K/F_6
220K/F_6
ISL6251_VDD
15
1
VDD
VDDP
BOOT
UGATE
PHASE
LGATE
PGND
GND
VADJ
ACLIM
VRFE
9
8
PR20
PR20
100_4
100_4
1 6
2
3
PC9
PC9
2.2u/10V_8
2.2u/10V_8
1 2
PR42
PR42
4.7_6
4.7_6
ISL6251_VDDP
6251B_2
16
17
18
14
13
12
11
10
PC19
PC19
100p/50V_6
100p/50V_6
ICMNT
1 2
PC17
PC17
3.3n/50V_4
3.3n/50V_4
PQ6
PQ6
IMD2AT108
IMD2AT108
PR26
PR26
2.7_6
2.7_6
ISL6251_UGATE
ISL6251_PHASE
ISL6251_LGATE
CC-SET 29
2
PQ39
PQ39
FDD6685
FDD6685
4 3
1
PC23
PC23
1 2
PD7
PD7
RB500V
RB500V
PC18
PC18
R2
VADJ
ACLIM
R3
10K/F_6
10K/F_6
10K/F_6
10K/F_6
PR47 0_6 PR47 0_6
PQ7
PQ7
FDS6690AS
FDS6690AS
PR36
PR36
PR35
PR35
D/C# 29
VREF
VREF
PR37
PR37
*514K/F_6
*514K/F_6
578
578
PC26
PC26
2.2n/50V_6
2.2n/50V_6
PQ42
PQ42
FDS8878
FDS8878
3 6
241
2.2/F_4
2.2/F_4
1 2
2.2n/50V_4
2.2n/50V_4
3 6
241
9/14 EMI
Float = 4.2V / CELL
PR38 *0_6 PR38 *0_6
PR34
PR34
*514K/F_6
*514K/F_6
5
4
4.7u/10V_8
4.7u/10V_8
0.1u/50V_8
0.1u/50V_8
6251B_1
ICMNT
LIM = (1/R2)*(((0.05/VREF=2.39)VACLM)+0.050)
PC109
PC109
0.1u/50V_6
0.1u/50V_6
VA3
PC29
PC29
0.1u/50V_6
0.1u/50V_6
B:(10/16) Modify PL12 footprint to slove SMT A-open issue
12/6
PL12
PL12
6.8uH
6.8uH
PR61
PR61
PC40
PC40
6251LR
CSOP_1
CSON_1
CV-SET 29
CURRNT LIMIT POINT =(90w/19v)*0.85= 4.026A
4.026A=(1/0.02)((0.05/2.365)Vaclm+0.05)
Vaclm=((33//152)/(33//152+19.6//152))*Vref
R2=adapter current sense resistnece
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
1
VIN
PR15
PC110
PC110
2.2n/50V_6
2.2n/50V_6
PL9
PL9
HI0805R800R-00_8
HI0805R800R-00_8
PC124
PC124
10u/25V_1206
10u/25V_1206
C:(12/7)Change PR145 from RC3720-4P to RC3720
PR145
PR145
0.03_3720
0.03_3720
1 2
CHARGER (ISL6251A)
CHARGER (ISL6251A)
CHARGER (ISL6251A)
PR15
33K_6
33K_6
PQ5
PQ5
DMN601K-7
DMN601K-7
VIN
PC118
PC118
2.2n/50V_6
2.2n/50V_6
PC123
PC123
10u/25V_1206
10u/25V_1206
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
1
2
PC120
PC120
10u/25V_1206
10u/25V_1206
PQ38
PQ38
FDD6685
FDD6685
1
PR18
PR18
10K_6
10K_6
3
1
32 43 Tuesday, January 22, 2008
32 43 Tuesday, January 22, 2008
32 43 Tuesday, January 22, 2008
4 3
BAT-V
PC125
PC125
0.01u/50V_6
0.01u/50V_6
of
of
of
3C Custom
3C Custom
3C Custom
5
MAIND
SUSD
10/22 Remove PAD
VIN
D D
+
+
0.1u/50V_6
PC80
PC80
100u/25V_6X7.7
100u/25V_6X7.7
0.1u/50V_6
PC83
PC83
MAIND 36,37
SUSD 37
PC82
PC82
2.2n/50V_6
2.2n/50V_6
*10u/25V_1206
*10u/25V_1206
PC87
PC87
SYS_SHDN# 6
PC81
PC81
10u/25V_1206
10u/25V_1206
09/07 Change PC123 placement
FDS8878
2.2uH
2.2uH
PL5
PL5
FDS8878
FDS6690AS
FDS6690AS
OCP: 10A
+5VPCU
C C
PC102
PC102
10u/25V_1206
10u/25V_1206
+5VPCU
+
+
PC93
PC93
0.1u/50V_6
0.1u/50V_6
330u/6.3V_6X5.7
330u/6.3V_6X5.7
PC100
PC100
PR119
PR119
*0_4
*0_4
PR120
PR120
0_4
0_4
1 2
1 2
OCP:10A
L(ripple current)
=(19-5)*5/(2.2u*0.4M*19)
B B
S5_ON 29,37
A A
~4.18A
Iocp=10-(4.18/2)=7.91A
Vth=7.91A*15mOhm=131mV
R(Ilim)=(105mV*10)/5uA
~237K
VIN
PR110
PR110
1M_6
1M_6
2
PQ25
PQ25
DTC144EU
DTC144EU
5
2
PR105
PR105
1 3
1M_6
1M_6
3
1
PR109
PR109
22_8
22_8
PQ27
PQ27
DMN601K-7
DMN601K-7
+15V
+1.2V_S5 +3V_S5
PR108
PR108
22_8
22_8
3
1
PQ28
PQ28
DMN601K-7
DMN601K-7
2
2
09/12 Addition
+15V
PQ32
PQ32
PQ33
PQ33
3
1
4
PR104
PR104
1M_6
1M_6
PQ26
PQ26
DMN601K-7
DMN601K-7
4
1 2
PR125
PR125
3 6
241
3 6
241
0.1u/50V_6
0.1u/50V_6
PR133
PR133
22_8
22_8
S5D
0_4
0_4
5V_DH
5V_LX
5V_DL
PC101
PC101
+15V_ALWP
3V5V_EN
578
578
08/29 Del PQ15.
VL
1 2
PR124
PR124
39K/F_4
39K/F_4
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
0.1u/50V_6
1 2
PR122 237K/F_6 PR122 237K/F_6
PC95
PC95
2
0.1u/50V_6
0.1u/50V_6
3
PD12
PD12
1
1PS302
1PS302
2
3
PD11
PD11
1
1PS302
1PS302
PC99
PC99
0.1u/50V_6
0.1u/50V_6
PR116
PR116
390K_4
390K_4
PC88
PC88
PR113
PR113
150K/F_4
150K/F_4
3V5V_EN
PC96
PC96
0.1u/50V_6
0.1u/50V_6
1 2
MAIND
+5VPCU
DDPWRGD_R
PR129
PR129
1/F_6
1/F_6
1 2
PC97
PC97
PR132
PR132
*200K_4
*200K_4
+5VPCU
578
3
PR166 0_6 PR166 0_6
PR163 *0_6 PR163 *0_6
3 6
241
3
*0.01u/16V_4
*0.01u/16V_4
9
10
11
12
13
14
15
16
37
36
PQ31
PQ31
FDS8884
FDS8884
BYP
OUT1
FB1
ILIM1
PGOOD1
EN1
DH1
LX1
PAD
PAD
35
VL
PC98
PC98
1u/16V_6
1u/16V_6
+5V
PC91
PC91
PAD33PAD34PAD
*39K/F_4
*39K/F_4
VL
PC89
PC89
4.7u/10V_8
4.7u/10V_8
1 2
PR114
PR114
0_4
0_4
1 2
6
5
8
7
3
4
NC
VIN
LDO
ONLDO
LDOREFIN
PU11
PU11
ISL6237
ISL6237
BST117DL118PVCC19NC20GND21PGND22DL223BST2
1 2
PR128
PR128
MAIND
PC92
PC92
1u/16V_6
1u/16V_6
PC90
PC90
9/07 Add PR154.
0.1u/50V_6
0.1u/50V_6
REF
1 2
PR112 *0_6 PR112 *0_6
1
9/12 PR44 Change to 196K.
REF
TON2VCC
REFIN2
32
REFIN2
31
30
29
28
27
EN2
26
DH2
25
LX2
PR131
PR131
1/F_6
1/F_6
1 2
1 2
SKIP
DDPWRGD_R
3V5V_EN
PC94
PC94
0.1u/50V_6
0.1u/50V_6
L(ripple current)
=(19-3.3)*3.3/(2.2u*0.5M*19)
~2.48A
REFIN2
ILIM2
OUT2
SKIP#
PGOOD2
24
PR130
PR130
0_6
0_6
PR134 *0_6 PR134 *0_6
9/07 Add PR155.
+3VPCU
578
PQ21
PQ21
FDS8878
FDS8878
3 6
241
+3V
2
PR115
PR115
0_4
0_4
1 2
3V_DH
PR117
PR117
196K/F_6
196K/F_6
3V_DL
SKIP REF
3V_LX
578
3 6
241
578
3 6
241
PR121 *0_6 PR121 *0_6
PR123 0_6 PR123 0_6
OCP:8A
Iocp=8-(2.48/2)=6.67A
Vth=6.67A*15mOhm=100.05mV
R(Ilim)=(100.05mV*10)/5uA
~200.1K
+3VPCU
65241
S5D
3
2
PQ22
PQ22
FDC653N_NL
FDC653N_NL
1
10/22 Remove PAD
VIN
PC85
0.1u/50V_6
0.1u/50V_6
PQ29
PQ29
FDS8878
FDS8878
PQ30
PQ30
FDS6690AS
FDS6690AS
PC86
PC86
2.2uH
2.2uH
PC84
PC84
2.2n/50V_4
2.2n/50V_4
PL4
PL4
PR111
PR111
0_6
0_6
PR118
PR118
*0_6
*0_6
PC85
10u/25V_1206
10u/25V_1206
+3VPCU
0.1u/50V_6
0.1u/50V_6
OCP : 8A
+3VPCU
PC70
PC70
+
+
PC73
PC73
330u/6.3V_6X5.7
330u/6.3V_6X5.7
8/27 Add SYS_HWPG.
+3VPCU
PR127
PR127
10K_6
10K_6
PR126
DDPWRGD_R 3V_DL
B:(10/30) Stuff PR127 for DDPWRGD(PU11/Pin13,28)
SUSD
+3V_S5
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
3
Quanta Computer Inc.
Quanta Computer Inc.
SYSTEM 5V/3V (ISL6237)
SYSTEM 5V/3V (ISL6237)
SYSTEM 5V/3V (ISL6237)
PR126
0_6
0_6
+3VPCU
65241
PQ23
PQ23
FDC653N_NL
FDC653N_NL
PROJECT : BD3A
PROJECT : BD3A
1
+3VSUS
SYS_HWPG 29
33 43 Tuesday, January 22, 2008
33 43 Tuesday, January 22, 2008
33 43 Tuesday, January 22, 2008
of
of
of
3C
3C
3C
A
4 4
B
C
D
E
10/22 Remove PAD
PR29
PR29
10K/F_6
10K/F_6
PC22
PR24 0_6 PR24 0_6
0.018u/50V_6
0.018u/50V_6
PR51
PR51
10K/F_4
10K/F_4
PR63
PR63
*91K/F_4
*91K/F_4
PC31
PC31
1 2
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
ILIM
0.22u/25V_6
0.22u/25V_6
0.1u/50V_6
0.1u/50V_6
PWR_PSI# 6
RSN-
VREF
VDDA
CSP
CSN
SLEW
RSP+
PC38
PC38
PC39
PC39
PR33 0_6 PR33 0_6
PR23 0_6 PR23 0_6
PR32 0_6 PR32 0_6
PR22 0_6 PR22 0_6
PR31 0_6 PR31 0_6
26
27
28
29
30
31
32
37
33
34
35
36
1 2
1 2
1n/50V_4
1n/50V_4
PWR_PSI#
ILIM
VDDA
SLEW
CSP
CSN
RSP
RSN
GNDA
GNDA
GNDA
GNDA
GNDA
PC37
PC37
25
24
23
NC
VID5
1
1 2
PR57 0_4 PR57 0_4
PU5
PU5
OZ826
OZ826
19
VID221VID120VID322VID4
H_VID0 6
H_VID1 6
H_VID2 6
H_VID3 6
H_VID4 6
H_VID5 6
+5V
PR46
PR46
22_6
22_6
3 3
PC20
PC20
1u/25V_8
1u/25V_8
1 2
GNDA connect to GND via
PR30
PR30
34.8K/F_6
34.8K/F_6
ILIM TEST
11/14
PR44
PC28
PC28
2 2
1n/16V_4
1n/16V_4
PR44
8.2K/F_6
8.2K/F_6
1 2
PC22
1n/50V_6
1n/50V_6
17
18
VIN
VID0
HDR1
16
LX1
15
BST1
14
LDR1
13
GNDP
12
VDDP
11
LDR2
10
BST2
9
LX2
HDR28PG7EN6PSIB5TEST4VREF3COMPV2NC
11/2 change
+3V
PR60
PR60
PR59
PR59
0_4
0_4
10K/F_4
10K/F_4
11/14 Second Source
0.22u/25V_6
0.22u/25V_6
1 2
9/12 Modify
PR43
PR43
0_6
0_6
PR48
PR48
0_6
0_6
1 2
PC33
PC33
0.22u/25V_6
0.22u/25V_6
CPU_COREPG 6,29,35,37
PC21
PC21
PD8
PD8
CH551
CH551
PC30
PC30
1u/25V_6
1u/25V_6
PD9
PD9
CH551
CH551
4
4
11/14 Second Source
2 1
+5V
1 2
2 1
4
4
5
213
5
213
10u/25V_1206
10u/25V_1206
5
213
5
213
1 2
PC105
PC105
10u/25V_1206
10u/25V_1206
PQ37
PQ37
AOL1414
AOL1414
PQ41
PQ41
AOL1412
AOL1412
1 2
1 2
PC142
PC142
PC140
PC140
10u/25V_1206
10u/25V_1206
11/14 Second Source
PQ46
PQ46
AOL1414
AOL1414
PR50
PR50
2.2/F_4
2.2/F_4
PQ43
PQ43
AOL1412
AOL1412
11/14 Second Source
VRON 29
PR58 0_4 PR58 0_4
10K/F_4
10K/F_4
PR170
PR170
PR21 0_8 PR21 0_8
1 2
PC104
PC104
10u/25V_1206
10u/25V_1206
9/12 Modify
PR39
PR39
2.2/F_4
2.2/F_4
1 2
PC24
PC24
2.2n/50V_4
2.2n/50V_4
1 2
10/22 Remove PAD
PC141
PC141
0.1u/50V_6
0.1u/50V_6
1 2
PC35
PC35
2.2n/50V_4
2.2n/50V_4
VREF
CSP
CSN
PWR_PSI#
RSP+
RSN-
VIN
PR64
PR64
12.7K/F_6
12.7K/F_6
0.1u/50V_6
0.1u/50V_6
PC34
PC34
0.01u/16V_4
0.01u/16V_4
3
1 2
PC103
PC103
1 2
1 2
PC32
PC32
1n/50V_4
1n/50V_4
1 2
PQ8
PQ8
FDV301N
FDV301N
11/14 Second Source
PR53
PR53
1.62K/F_6
1.62K/F_6
1 2
PR49
PR49
22.1/F_6
22.1/F_6
PR52
PR52
1.62K/F_6
1.62K/F_6
1 2
11/14
1
2
10/22 Addition resistor
+
+
PC106
PC106
100u/25V_6X7.7
100u/25V_6X7.7
PR45
PR45
*10K/F_4
*10K/F_4
PR160
PR160
*10K/F_4
*10K/F_4
COREFB- 6
PC36
PC36
1n/50V_4
1n/50V_4
1 2
COREFB+V 6
VIN
PL8 0.36uH PL8 0.36uH
1 2
3
4
1 2
*0.01u/16V_4
*0.01u/16V_4
PR157 1.27K/F_6 PR157 1.27K/F_6
1 2
PC135 0.22/25V_6 PC135 0.22/25V_6
1 2
12/18 change
PL11 0.36uH PL11 0.36uH
1 2
3
4
1 2
PC134
PC134
*0.01u/16V_4
*0.01u/16V_4
11/14
TDK:CV+36F0MZ05
PC27
PC27
560u/2.5V_6X5.7
560u/2.5V_6X5.7
PC112
PC112
560u/2.5V_6X5.7
560u/2.5V_6X5.7
PR56 330/F_6 PR56 330/F_6
PR55 330/F_6 PR55 330/F_6
+
+
PC114
PC114
PR158 10K _6 NTC PR158 10K _6 NTC
+
+
C:(12/7) DEL PC122
560u/2.5V_6X5.7
560u/2.5V_6X5.7
+
+
PC113
PC113
560u/2.5V_6X5.7
560u/2.5V_6X5.7
PR162 2.2_6 PR162 2.2_6
1 2
+
+
PC111
PC111
PR62 10/F_6 PR62 10/F_6
PR54 10/F_6 PR54 10/F_6
MAX 35A
VCC_CORE
+
+
PC54
PC54
330u/2V_7343
330u/2V_7343
+
+
PC130
PC130
*330u/2V_7343
*330u/2V_7343
C:(12/7) DEL PC126
1 1
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
Quanta Computer Inc.
OZ826 CPU
OZ826 CPU
OZ826 CPU
E
3C C
3C C
34 43 Tuesday, January 22, 2008
34 43 Tuesday, January 22, 2008
34 43 Tuesday, January 22, 2008
3C C
of
of
of
1
A A
2
3
4
5
10/22 Remove PAD
PR68
PR68
9/12 Add CPU_COREPG
PR75
PR75
*0_6
CPU_COREPG 6,29,34,37
B B
+1.2V_ON 29,37
HWPG_1.2V_NB 29
C C
*0_6
PR79 47K_6 PR79 47K_6
+3V
PR77
PR77
10K/F_6
10K/F_6
PC42
PC42
1u/16V_6
1u/16V_6
PC44
PC44
0.1u/50V_6
0.1u/50V_6
*1n/50V_6
*1n/50V_6
TON=3.85p*RTON*Vout/(Vin-0.5)
PC43
PC43
1 2
PR71
PR71
1M_6
1M_6
PC45
PC45
0.01u/50V_6
0.01u/50V_6
PR81
PR81
100K/F_6
100K/F_6
B:(10/16) change PR81 from 10k(no stuff) to 100k(stuff)
1 2
Frequency=Vout/(Vin*TON)
15
16
1
2
3
4
6
5
14
10_6
10_6
EN/DEM
TON
VOUT
VDD
FB
PGOOD
GND
NC
NC
PC48
PC48
*0.1u/50V_6
*0.1u/50V_6
13
BOOT
12
UGATE
11
PHASE
10
OC
PU6
PU6
RT8202
RT8202
GND18GND19GND20GND
VDDP
LGATE
PGND
TPAD
21
9
8
7
17
4.86A OCP --- OC=3.65K
FDS6690AS Rds=15mOhm
9/07 Change net to +NB_CORE.
PR69
PR69
1M_6
1M_6
+NB_CORE
PR70
PR70
22_8
22_8
+1.2V
PR76
PR76
22_8
22_8
VIN
+5VPCU
1 2
PC47
PC47
4.7u/10V_8
4.7u/10V_8
LGATE-1.2V
PD10
PD10
RB500V
RB500V
PR82
PR82
0_6
0_6
PR83 3.01K/F_6 PR83 3.01K/F_6
PC53
PC53
0.1u/50V_8
0.1u/50V_8
UGATE-1.2V
PHASE-1.2V
9/07 Change PR100 to 3.01K.
LGATE-1.2V
Rds*OCP=RILIM*20uA
9/12 Addition PR156, PQ43.
4
S2
S2
5
1.2V_FB
3
6
G2
G2
11/14
1
2
D1
D1 S1/D2
D1
D1 S1/D2
PQ14
PQ14
SI4914
SI4914
G1
G1
8
7
UGATE-1.2V
11/14 Second Source
PR73
PR73
15K/F_6
15K/F_6
PQ10
PQ10
DMN601K-7
DMN601K-7
PC52
PC52
0.1u/50V_6
0.1u/50V_6
RAMP:(1/15) Change PL15 Footprint from CDRH104R to CDRH104R-BD3A (SMT open issue)
PL15
PL15
2.5uH
2.5uH
560u/2.5V_6X5.7
560u/2.5V_6X5.7
1.2V_FB
PC51
PC51
10u/25V_1206
10u/25V_1206
1 2
+
+
PC144
PC144
PC145
PC145
10u/10V_8
10u/10V_8
VOUT=(1+R2/R3)*0.75
9/07 Change PR152 to 15K.
3
2
1
0.022u/50V_6
0.022u/50V_6
PC46
PC46
PR80
PR80
10K/F_6
10K/F_6
1 2
HI --- 1.2V
LOW ---1.0V
VIN
PR72
PR72
3.65K/F_6
3.65K/F_6
PR67
PR67
10K/F_6
10K/F_6
+NB_CORE_ON 12
10/22 Remove PAD
OCP: 4.86A
3.5A
+NB_CORE
9/07 Change net to +NB_CORE.
PC41
PC41
33p/50V_6
33p/50V_6
9/07 Change PR101 to 3.65K.
9/07 Change PR102 to 10K.
3
PR74
PR74
1M_6
+1.2V_ON 29,37
D D
1
2
PQ13
PQ13
DTC144EU
DTC144EU
1 3
1M_6
2
PQ9
PQ9
DMN601K-7
DMN601K-7
1
2
3
2
PQ12
PQ12
DMN601K-7
DMN601K-7
1
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
NB_VCC (RT8202)
NB_VCC (RT8202)
NB_VCC (RT8202)
Date: Sheet
Date: Sheet
3
4
Date: Sheet
Quanta Computer Inc.
of
of
of
35 43 Tuesday, January 22, 2008
35 43 Tuesday, January 22, 2008
35 43 Tuesday, January 22, 2008
5
3C
3C
3C
5
D D
4
3
2
1
10/22 Remove R
11/14 Second Source
+1.8VSUS
PC136
PC136
10u/10V_1206
10u/10V_1206
+SMDDR_VTERM
PC137
PC137
10u/10V_8
10u/10V_8
C C
+SMDDR_VREF
10/22 Remove R
DIS_MODE
+1.8VSUS
PR66 *0_6 PR66 *0_6
PR65 0_6 PR65 0_6
PC139
PC139
10u/10V_8
10u/10V_8
PC138
PC138
0.033u/50V_6
0.033u/50V_6
5VIN
11/14
FOR DDR II
5VIN
PR164
PR164
0_6
0_6
R2
B B
R1
PU12
PU12
TPS51116
TPS51116
1
2
4
5
3
6
7
8
9
10
11/14
PR165
PR165
*110K/F_6
*110K/F_6
PR161
PR161
*76.8K/F_6
*76.8K/F_6
VLDOIN
VTT
VTTSNS
GND
VTTGND
MODE
VTTREF
COMP
VDDSNS
VDDQSET
+5VPCU
DRVH
VBST
DRVL
PGND
V5IN
PGOOD
GND21GND22GND23GND24GND25GND26GND
27
*1n/50V_6
*1n/50V_6
PR156
PR156
0_6
0_6
LL
S3
S5
CS
PC129
PC129
5VIN
19
20
18
17
16
S3_1.8V DIS_MODE
11
S5_1.8V
12
5VIN
14
13
15
1 2
PC133
PC133
4.7u/6.3V_6
4.7u/6.3V_6
PR147
PR147
5.1K/D_6
5.1K/D_6
PC128 0.1u/50V_6 PC128 0.1u/50V_6
PR154
PR154
*0_6
*0_6
PR153
PR153
0_6
0_6
+3VPCU
PR151
PR151
100K/F_6
100K/F_6
+1.8VSUS
MAINON 21,29,37
SUSON 29,37
+3VPCU
9/14 Modify
HWPG_1.8V 29
9/10 Change PQ27 to AO1414.
5
PQ36
PQ36
AOL1414
4
4
AOL1414
213
5
PQ40
PQ40
213
AOL1412
AOL1412
11/14 Second Source
PR149
PR149
0_6
S3_1.8V S5_1.8V
S3_1.8V S5_1.8V
0_6
PC132
PC132
*0.1u/50V_6
*0.1u/50V_6
PC131
PC131
*0.1u/50V_6
*0.1u/50V_6
PR146
PR146
2.2/F_6
2.2/F_6
PC127
PC127
2.2n/50V_6
2.2n/50V_6
2.2uH
2.2uH
PR144
PR144
2.2/F_6
2.2/F_6
PC117
PC117
2.2n/50V_6
2.2n/50V_6
9/14 Modify
PC11
PC115
PC115
2.2n/50V_6
2.2n/50V_6
9/07 Change PL12 to 2R2uH.
PL10
PL10
PC11
10u/25V_1206
10u/25V_1206
PC121
PC121
560u/2.5V_6X5.7
560u/2.5V_6X5.7
11/14 Second Source
(10u*PR35)/Rdson+Delta_I/2=Iocp
VIN
PC13
PC13
10/22 Remove PAD
10u/25V_1206
10u/25V_1206
+
+
PC119
PC119
10u/10V_8
10u/10V_8
OCP: 12.44A
+1.8VSUS
R1=(100*Vout-R2)K
10/22 Remove PAD
if tune Vout PR38 un-mount, PR156 PR165 mount
MAIND 33,37
MAIND
65241
PQ19
3
PQ19
FDC653N_NL
FDC653N_NL
8/27 Add CAP for Delay time.
+1.8V
A A
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR 1.8V(TPS51116)
DDR 1.8V(TPS51116)
DDR 1.8V(TPS51116)
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Quanta Computer Inc.
of
of
of
36 43 Tuesday, January 22, 2008
36 43 Tuesday, January 22, 2008
36 43 Tuesday, January 22, 2008
1
3C
3C
3C
5
4
3
2
1
11/14 Second Source
PQ24
PQ24
AOL1414
+1.8VSUS
PC71
+5VPCU
2
9338EN MAINON
0.1u/50V_6
0.1u/50V_6
VIN
PR78
PR78
22_8
22_8
3
1
PC71
0.1u/50V_6
0.1u/50V_6
3
4
1
PC76
PC76
PR152
PR152
1M_6
1M_6
PR155
PR155
1M_6
1M_6
PQ11
PQ11
DMN601K-7
DMN601K-7
PGD
EN
VCC
2
2
2
D D
C C
B B
A A
9/12 Change net to +3VSUS
HWPG_CPUIO 29
MAINON 21,29,36
+1.2V_ON 29,35
CPU_COREPG 6,29,34,35
9/12 Add CPU_COREPG
MAINON 21,29,36
2
PQ16
PQ16
DTC144EU
DTC144EU
5
+3VSUS
SUSON 29,36
PR102 100K_4 PR102 100K_4
PR101 *10K_6 PR101 *10K_6
PR99 0_6 PR99 0_6
PR97 *0_6 PR97 *0_6
2
PQ47
PQ47
DTC144EU
DTC144EU
VIN
PR12
PR12
1M_6
1M_6
1 3
PR9
PR9
1M_6
1M_6
PC74
PC74
*1u/16V_6
*1u/16V_6
1 3
AOL1414
5
PC72
PC72
10u/6.3V_6
10u/6.3V_6
6
DRV
5
ADJ
Vout1 = (1+Rg/Rh)*0.5
GND
PU9
PU9
G9338
G9338
+1.8VSUS
PR150
PR150
22_8
22_8
3
2
PQ44
PQ44
DMN601K-7
DMN601K-7
1
9/12 Modify
PR4
PR4
22_8
22_8
3
2
PQ4
PQ4
DMN601K-7
DMN601K-7
1
4
3
2
1
4
PR100
PR100
0_6
0_6
PC75
PC75
0.01u/16V_4
0.01u/16V_4
1 2
PR96
PR96
14K/F_6
14K/F_6
Rg
PR98
PR98
10K/F_6
10K/F_6
Rh
PC68
PC68
0.1u/50V_6
0.1u/50V_6
PC69
PC69
10u/6.3V_6
10u/6.3V_6
9/12 Modify
+3VSUS +15V
3
1
+1.8V
PR95
PR95
22_8
22_8
PQ20
PQ20
DMN601K-7
DMN601K-7
PR88
PR88
22_8
22_8
3
PQ15
PQ15
DMN601K-7
DMN601K-7
1
+SMDDR_VTERM
PR159
PR159
22_8
22_8
3
2
1
PQ45
PQ45
DMN601K-7
DMN601K-7
+15V +5V +3V
2
3
1
2
PR92
PR92
1M_6
1M_6
MAIND MAINON_ON_G
PQ17
PQ17
DMN601K-7
DMN601K-7
PC66
PC66
560u/2.5V_6X5.7
560u/2.5V_6X5.7
PR94
PR94
1M_6
1M_6
SUSD SUS_ON_G
3
PQ18
PQ18
DMN601K-7
DMN601K-7
1
PC65
PC65
*2.2n/50V_4
*2.2n/50V_4
+1.2V
+
+
+1.2V 4,13,17,31,35
3.5A
PC67
PC67
*2.2n/50V_4
*2.2n/50V_4
MAIND 33,36
3
+1.8VSUS
SUSD 33
MAINON
+3VSUS
S5_ON 29,33
+3VPCU
RAMP:(1/18) DEL PR103 0ohm for PU10/Pin1
12/6
0_6
0_6
PR91
PR91
MAINON
PC64
PC64
PC60
PC60
0.1u/50V_6
10u/4V_8
10u/4V_8
0.1u/50V_6
10K/F_6
10K/F_6
12/6
0_6
0_6
PR87
PR87
PC59
PC59
PC58
10u/4V_8
10u/4V_8
PC58
0.1u/50V_6
0.1u/50V_6
*10K/F_6
*10K/F_6
PR106
PR106
100K/F_6
100K/F_6
PR107
PR107
PC61
PC61
0.1u/50V_6
0.1u/50V_6
PR167
PR167
PC56
PC56
0.1u/50V_6
0.1u/50V_6
PR171
PR171
916_SHDN# 9338DRV
0_6
0_6
PC77
PC77
1u/16V_6
1u/16V_6
12/18 change
11/14 Second Source
+5VPCU
PU8
PU8
RT9025-25PSP
RT9025-25PSP
4
2
3
8
9
PC63
PC63
*0.1u/50V_6
*0.1u/50V_6
Vout =0.8(1+R1/R2)
=1.5V
11/14 Second Source
+5VPCU
PU7
PU7
RT9025-25PSP
RT9025-25PSP
4
2
3
8
9
PC57
PC57
*0.1u/50V_6
*0.1u/50V_6
Vout =0.8(1+R1/R2)
=2.5V
2
PU10
PU10
3
EN
2
GND
1
VIN
RT9013-12PB
RT9013-12PB
VPP
VEN
VIN
GND
GND
VPP
VEN
VIN
GND
GND
PGOOD
ADJ
7
PGOOD
ADJ
7
VOUT
VO
NC
VO
NC
5
4
NC
+3VSUS
1
6
PC79
PC79
*10n_6
*10n_6
PR93
PR93
100K_4
100K_4
PC78
PC78
1u/16V_6
1u/16V_6
+1.2V_S5
HWPG_1.5V 29
+1.5V
1.5A
0.2A
5
PR90
PR90
30.1K/F_6
30.1K/F_6
PC62
PC62
10u/10V_8
10u/10V_8
0.8V
PR89
PR89
34K/F_6
34K/F_6
+3VSUS
PR86
PR86
100K_4
100K_4
1
6
HWPG_2.5V 29
+2.5V
0.5A
5
PR85
PR85
73.2K/F_6
73.2K/F_6
PC55
PC55
10u/10V_8
10u/10V_8
0.8V
PR84
PR84
34K/F_6
34K/F_6
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Discharge (1.25V/1.5V)
Discharge (1.25V/1.5V)
Discharge (1.25V/1.5V)
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
1
3C
3C
3C
of
of
of
37 43 Tuesday, January 22, 2008
37 43 Tuesday, January 22, 2008
37 43 Tuesday, January 22, 2008
5
4
3
2
1
OZ826
PU5
RT8202
PU6
D D
VCC_CORE
<VRON>
+NB_CORE
<+1.2V_ON+RC>
+5VPCU
<AC/DC Insert>
+5VPCU +3VPCU
+1.8VSUS
FDS8884
PQ31
+3VPCU
<AC/DC Insert>
FDC653N
PQ22
FDC653N
PQ23
FDS8884
PQ21
RT9013
PU10
+1.8VSUS
<SUSON>
FDC653N
PQ19
G9338
PU9
RT9025
PU8
SMDDR_VTERM
<SUSON>
SMDDR_VREF
<SUSON>
VIN VIN
ISL6237
PU11
C C
B B
A A
ADAPTER
BATTERY
Charger
ISL6251A
PU4
VIN
TPS51116
PU12
+5V
<MAIND>
+3V_S5
<S5D>
+3VSUS
<SUSD>
RT9025
PU7
+3V
<MAIND>
+1.2V_S5
<S5_ON>
+1.8V
<MAINON>
+1.2V
<MAINON+RC>
A-test use MAINON + RC delay to replace it
+1.5V
<MAINON>
+2.5V
<MAINON>
POWER Distribution
VCC_CORE
+5VPCU
+3VPCU
+NB_CORE
+5V
+3V
+3V_S5
+3VSUS
+2.5V
+1.2V_S5
+1.8VSUS
+1.8V
+1.2V
+SMDDR_VTERM
+SMDDR_VREF
CPU
Battery LED , Power LED , USB , CIR , RTC
HALL SENSOR , Battery LED , RF LED , kill SW , Jumper LED , KB , Power Board , EC , ID , SPI Flash , CIR
RS690M
CAMERA , Card Reader LED , ODD/HDD LED , Felica , T/P , T/sensor , CRT , HDMI , SB600 , CPU FAN , MXM , Headphone , EC , INT SPK AMP
HALL SENSOR , LCD PANEL , LVDS , WLAN , HD Decoder , NEW CARD , KB , KB LED , XD LED , Blue tooth , Touch sensor , Card Reader (OZ129) , ODD/HDD ,
HDMI , CRT , TVOUT , REQUIRED STRAPS , DEBUG STRAPS , SB600 , RS690M , DDR , CPU Thermal monitor , CPU FAN , CLK , MXM , VR , FM Tuner MDC ,
Headphone , EC , LAN , Codec(CX 20561)
WLAN , NEW CARD , SB600 , MXM , LAN
Finger print , SB600
CPU
SB600
SB600 , DDR , CPU , HDT
SB600 , LCD , LVDS , RS690M
SB600 , RS690M , CPU , WLAN , HD Decoder , NEW CARD
DDR , CPU
DDR
+5V_S5
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Power Tree
Power Tree
Power Tree
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
3C
3C
3C
of
of
of
38 43 Tuesday, January 22, 2008
38 43 Tuesday, January 22, 2008
38 43 Tuesday, January 22, 2008
5
SO_DIMM1
D D
2 PAIR MEM CLK
Turion Rev.G Dual-Core
Sempron
(638 S1g1 socket)
C C
SO_DIMM2
2 PAIR MEM CLK
EXTERNAL
CLK GEN.
1 PAIR CPU CLK
200MHZ
4
HTREFCLK
66MHZ
NB_OSC
14.318MHZ
NB PCIE_CLK
100MHZ
SB PCIE_CLK
100MHZ
PCIE_CLK
100MHZ
PCIE_CLK
100MHZ
PCIE_CLK
100MHZ
PCIE_CLK
100MHZ
PCIE_CLK
100MHZ
3
RS690M
465 FCBGA
SB_OSCIN
14.318MHZ
MXM module
MINI Card(WLAN)
MINI Card(HD Video Decoder)
NEW Card
8040T(10/100)/8055(GIGA)
25MHZ
HDMI_CEC
R5F211A4SP5
*8MHZ
SB600
549 BGA
2
PCI_CLK1
33MHZ
PCI_CLK0
33MHZ
PCI_CLK5
33MHZ
BIT_CLK_AUDIO
24MHZ
PCIE DEBUG CARD
OZ129T(card reader/1394)
24.576MHZ
KBC
WPCE775
32.768KHZ
TPCLK
Azalia Audio Codec
CX20561
1
KEYBOARD
TP
PCIE_CLK
100MHZ
USB
48MHZ
B B
25MHZ
32.768KHZ
A A
5
14.31818MHZ
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Clock distribution diagram
Clock distribution diagram
Clock distribution diagram
Date: Sheet
Date: Sheet
3
Date: Sheet
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Quanta Computer Inc.
2
3C
3C
3C
39 43 Tuesday, January 22, 2008
39 43 Tuesday, January 22, 2008
39 43 Tuesday, January 22, 2008
of
of
of
1
5
4
3
2
1
Model
BD3A
D D
C C
B B
A A
REV
A1A
B2A
5
CHANGE LIST
20070921
20070921
20070926
20070927
20070927
20070927
20070927
20070927
20070928
20071016
20071016
20071016
20071016
20071016
20071016
20071016
20071016
20071016
20071016
20071016
20071016
20071016
20071016
20071016
20071016
20071016
20071016
20071016
20071017
20071017
20071018
20071018
20071018
20071018
20071018
20071019
20071019
20071021
20071021
20071021
20071021
20071021
20071022
20071022
20071022
20071022
20071022
20071023
20071023
20071023
20071023
20071023
20071024
20071024
20071024
20071024
20071025
20071025
20071025
20071025
20071025
20071025
20071025
20071025
20071025
20071026
FIRST RELEASED : Import BOM ECN E200709-3025
Page14: change C285 to CH6221M9A07 (CH6222M9A01 EOL issue) Circuit modify
Page30: Swap Q46 Pin1/Pin3 (leakage issue)
Page03: Add 10k(R665) PU to +3V (NEW Card ckt issue)
Page25: Reserve R666 PU to +3V_S5 for U34/Pin1 (NEW Card ckt issue)
Page25: Change U34/Pin5 from +3V_S5 to +3V (NEW Card ckt issue)
Page29: Remove R527, already PU 100k to +3VPCU on Battery CONN (CN20/Pin4)
Page14: Safety request design with two resistor (two 8.66K),Add R667. (RTC circuit issue)
Page14: Change R582 from 0603 to 0402 (RTC circuit issue)
Page12: Add "IV@" value for Q26 (Remove Q26 in EV sku BOM)
Page18: fix CRT connect error
Page20: Remove PX function,change D6,D7 to R524,R525 (0 ohm)
Page20: Remove PX function, Modify backlight control ckt (follow original design)
Page20: Modify LVDS CONN Pin5 from NC to INVCC0
Page21: Add "EV@" for R203,R208 (remove it for UMA sku BOM)
Page22: Stuff R372 for FM sku
Page23: Remove FM function in MDC CONN
Page25: Change C364,C306,C623,C635 from 0805(CH5472K9A02) to 0603(CH5471M9907) for Hight limit issue
Page25: Stuff R262,R259 for debug card function
Page28: Change C41 +3VPCU to +5VPCU
Page28: Change USB CONN CN31,CN35 footprint and pin-define (follow USB CONN Standard)
Page29: Add "EV@" for D43 (remove it for UMA sku BOM)
Page32: Modify PL12 footprint to slove SMT A-open issue
Page35: Change PR81 from 10k(no stuff) to 100k(stuff)
Page ALL: Remove PX function
Page28: Add FM CKT
Page30: Change LED5/6 to right angle type
Page22: Remove CN36 (FM tuner CONN)
Page22: change PCBEEP from AGND to GND
Page31: update Hole7,2835,33,40 footprint
Page31: update Hole15 footprint
Page16: Add LOW_DET to GPIO48(SB600)
Page15: change USB sequence for layout route smoothly
Page30: change LED7/8 footprint (follow ME)
Page19: update CN25 HDMI footpritnt to HDMI-C12816-119A5-L-19P-H-BL5
Page29: Remove EC Pin111,Pin113,Pin10 from MMB LED control Pin to NC pin
Page29: GPIO04 and GPIO52, GPIO46 and GPIO77 can’t co-exist. Change BT_EN from Pin27 to Pin111.Change CRT_SENSE# from Pin84 to Pin113
Page25: update new card CONN footprint
Page28: Change Power board CONN (CN8) footprint & P/N
Page28: Change Felica CONN (CN12) footprint and PN
Page28: Change Main strem MMB CONN (CN7) from 10pin to 6pin, update footprint & P/N
Page28: Change FM CONN (CN42) footprint
Page29: change CIR LED footprint and pin-define
Page19: add level shift for CEC circuit
Page22: U38/Pin16,17,18 reserve circuit for WHQL
Page32~37: update power schematic
Page20: Change CN4 PN from DFHS40FS825 to DFWF40MS000 (SMT-ME suggest )
Page29: EC pin10 connect CHG_EN (active high) to battery charger
Page29: EC pin117 connect LOM_DISABLE# to LAN IC.
Page24: LAN IC pin10 need to add “LOM_DISABLE#” signal connect to EC pin117 (to decrease LAN power consumption).
Page28: DEL net“FELICA_DE” in FELICA CONN(CN12/Pin6)
Page16: add FM CONN/Pin7 (LOW_DET) to SB600 GPIO48, add PU R453 10k to +3.3V
Page18: change CN22(S-video) to 4 pin, remove TV_COMP circuit
Page16: change C320,C325 from 10p to 27p (base on TXC report)
Page26: change C381,C380 from 22p to 18p (base on TXC report)
Page29: change C575,C579 from 6.8p to 15p (base on TXC report)
Page15: add R473,R475 (0 ohm) for USB port7 -EMI suggestion
Page15: add R461,R472 (0 ohm) for USB port0 -EMI suggestion
Page15: add R476,R498 (0 ohm) for USB port6 -EMI suggestion
Page15: add R670,R671 (0 ohm) for USB port2 -EMI suggestion
Page30: Modify WiMAX LED circuit (default no stuff)
Page31: Add EMI 0.1uF Solution: (1)+5V *14pcs (2)+5VPCU *22PCS (3)+3VPCU *21PCS (4)VIN *21PCS(5)+1.2V_S5 *1PC
Page22: Change C403,C409,C413,C416 footprint for EMI debug
Page22: Add R611,Remove R632 for Audio circuit
Page03: Add WLAN & LAN CLKREQ circuit (BOI request)
Page31: Add0805 footprint for HOLE15,17,18 (EMI debug)
4
3
NOTE DATE
ECN Release
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
2
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
Change List01
Change List01
Change List01
40 43 Tuesday, January 22, 2008
40 43 Tuesday, January 22, 2008
40 43 Tuesday, January 22, 2008
of
of
1
of
3C
3C
3C
5
4
3
2
1
Model
BD3A
D D
C C
B B
A A
REV
B2A
C3A
5
20071026
Page28: Short R165 for CN11/Pin7 Circuit modify
20071026
Page18: no stuff D4 for CRT CONN CN18/Pin11 (BOI request)
20071026
Page29: Add BATLED0/BATLED1/PWRLED PU to +3VPCU
20071026
Page16: Add R686 to +3V, no stuff R361 for leakage issue
20071026
Page31: Remove all ESD pad
20071026
Page15: SWAP USBP7 & USBP9 (BT can't exist with USB)
20071026
Page15: Modify USB OC pin control in SB side
20071026
Page06: For floating issue,DEL C437, Add 100ohm (R687) to GND
20071026
Page20: Change HALL Sensor(MR4)PN
20071026
Page30: Change LED7,LED8 PN
20071029
Page24: Change Giga LAN frim 8055 to 8072
20071029
Page28: Change CN6/Pin1 from MX1 to MX5
20071030
Page25: no support WiMAX, no stuff R423
20071030
Page33: Stuff PR127 for DDPWRGD(PU11/Pin13,28)
20071030
Page06: Change Thermal sensor(U6) from MAX6657 to GMT G781 for Cost down
20071030
PageALL: Change T117,T91,T99,T114,T105,T115,T92,T87,T88 footprint from TP3075 to TP3050
20071101
Page23: Stuff R390,R654. No stuff U22,C407,R388,Q41 for VR can't smothly issue.
20071126
Page25: Add PCIE Debud card circuit for CN21
20071127
Page28: Add level shift circuit for TP LED
20071127
Page23: reserve a smith trigger in the VR portion
20071127
Page29: Stuff R510, no-stuff R509 (slove BT module can't bring up issue)
20071129
Page19: HDMI CONN SMT B open issue : update HDMI CONN footprint from HDMI-C12816-119A5-L-19P-H-BL5 to HDMI-C12816-119A5-L-19P-V-BL5-1
20071129
Page18: Board ID issue:Change external Pull down to 1K ohm for all BOARD_ID and LOW_DET circuit
20071129
Page25: Short CPPE#,CPUSB# together and connect to USB_OC4#/GPM4#(ball A6) of SB600
20071130
Page19: Change LCD DISPLAY circuit to slove LCD panel will flash when system into S3/S4/S5 and change mode issue.
20071205
Page14: Remove Delay PCIE Power for A-Link IF
20071206
Page32~37: update power schematic
20071206
Page30: update LED5,LED6 footprint and PN
20071206
Page24: Change R669(0 ohm) to D6(Diode) for leakage issue (3VPCU to 3V_S5)
20071206
Page22: Stuff R399,R379,R627 for ESD issue
20071206
Page22: no Stuff R371 for Audio issue:When flash BIOS with B machine, there is not "bi bi" sound, but "bo bo" sound.
20071206
Page23: Slove Audio issue:When plug in-out headphone, headphone has bo sound.1. Change R652&R651 to C741,C742(10U/6.3V 0603)
2. Stuff R386/R387 to 1K(0402)
20071206
Page22: Remove D19 to slove Audio issue Switch Mute to Un-mute, sound will delay about 2 seconds.
20071206
Page15: Add D56,D57 for leakage issue (3VPCU to 3V_S5)
20071206
Page31: Add EMI CAP 30pcs
20071207
Page19: update HDMI footprint to HDMI-C12816-119A5-L-19P-H-BD3
20071207
Page32: Change PR148,PR145 footprint to slove Battery charge/discharge fail issue
20071207
Page18: Add C185 for EMI issue
20071207
Page24: Add PI-type filter for LAN Transformer Power +2.5V_1.8V_LAN (EMI request)
20071207
Page24: Add L71 Bead for LAN Power +1.2V_LAN (EMI request)
20071207
Page28: Co-layout L72,L73,L74 (commond choke) for USB CONN-Daughter board and BT module CONN (EMI request)
20071207
Page32: Add Diode to avoid burn issue when BATTERY+(Pin2 ) and ID(PIN3) short
20071207
Page26: Change Card reader CONN(CN33)damping resister from 0 ohm to 33ohm
20071207
Page25: Change New card footprint to NCARD-13180151-T-26P-L-BL5S
20071209
Page31: Update Hole43,44 footprint
20071211
Page29: Change U41(CIR) from BEBK0081D00 to BEBK0081D01
20071211
Page18: Change CN22(S-Video) from DFMD04FR296(Yellow Color) to DFMD04FR006(Black Color)
20071214
Page14,20,28,31: Add EMI CAP 83pcs
20071217
Page18: Change L4,L5,L6 from CX8BA220007 to CX0HM121008 (EMI issue)
20071217
Page15: Stuff C387 to 22pF(CH02206JB08) for EMI issue
20071217
Page20: Stuff C20,C23 to 100pF (CH11006JB18) for EMI issue
20071217
Page20: No stuff C431(CH11006JB18) for HDMI function
20071217
Page28: Remove R613,R612,R624,R626 (CS00003J951); Stuff L73,L74 (CX216900002) for EMI issue
20071217
Page28: Remove R276,R278 (CS00003J951); Stuff L72 (CX216900002) for EMI issue
20071217
Page26: Stuff L68/L69 to CX0900JT005, remove RN34,RN35(CJ000042N12) for EMI issue
20071217
Page26: Stuff C398 to CH02206JB08 for EMI issue
20071217
Page23: Follow TE1: change L41,L42,L43,L44 from 0 ohm (CS00003J951) to CX8LL121002
20071217
Page24: Stuff C799,C625 to 0.1uF(CH41002KB93) for EMI request
20071217
Page23: No stuff R386 and R387(CS21002JB34) to meet HP Jack signal measure and HP plug- unplug haven't happen bobo-sound
20071217
Page23: Stuff C404 and C405 to 0.1u(CH41002KB93) to enhance avoid 3G noise and meet HP Jack signal measure
20071217
Page22: Stuff C396(CH41002KB93) for EMI issue
20071218
Page21: Stuff C568,C548(CH41006K911) for EMI issue
20071218
Page31: Stuff C217,C71,C746,C748,C750,C755,C770,C794,C798,C817,C822 = 0.1uf (CH41002KB93) for EMI issue
20071218
Page15: Change R369 from CS03302JB29 to CX5HM121104 for EMI issue
20071218
Page31: Stuff R680,R681,R682 for ESD issue
4
CHANGE LIST
3
NOTE DATE
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
Circuit modify
2
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
Change List02
Change List02
Change List02
41 43 Tuesday, January 22, 2008
41 43 Tuesday, January 22, 2008
41 43 Tuesday, January 22, 2008
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3C
3C
3C
5
4
3
2
1
Model
BD3A
D D
C C
B B
A A
REV
C3C
5
20080108
Page14: Modify RTC circuit. (Change R581 from 4.7k to 6.8k. Change R571,R667 from 8.66k to 2k) Circuit modify
20080108
Page14: Change RTC Battery from VARTA (AHL03001441) to MATSUSHITA (AHL03002005)
20080108
Page19: Change back HDMI connector(CN25) footprint from HDMI-C12816-119A5-L-19P-H-BD3 to HDMI-C12816-119A5-L-19P-H-BL5
20080108
Page23: Change Location name from R386,R387 to C437,C571 for Head-phone circuit
20080108
Page19: Correct HDMI-CEC-SMBUS net name for U11/Pin17,18
20080109
Page20: EnegryStar 4.0 Idle power issue, When BLON= High, Turn ON LCD then turn ON MMB. When BLON= Low, Turn OFF LCD then turn OFF MMB
20080109
Page29: Reserve D58,D59 for EC leakage issue(Default stuff R566,R567)
20080115
Page24: Change CN28 (RJ45 CONN) from DFTJ12FR024 to DFTJ12FR035
20080115
Page27: Change CN32(2nd SATA CONN) from DFHS22FR064 to DFHS22FR094
20080115
Page10~18: Update U24,U32 (RS690M/SB600) PN
20080115
Page27: Change CN32 footprint from SATA-127043FR022XX27ZR-22P-L-H to SATA-127043FR022G285ZR-22P-L
20080115
Page30: DEL CN10 (Keyboard CONN) Co-kay footprint 196130-340201-34P-L (SMT open issue)
20080115
Page03: Add C572(18pF) for SB_OSCIN , Stuff R558 to 68 ohm, C603 to 22pF (EMI issue)
20080115
Page03: Add C186(10pF) for NB_OSC, Stuff R122 to 68 ohm, C171 to 22pF (EMI issue)
20080115
Page06: ADD D29,D35 (Varistor) for CN19 Pin1/3 (ESD issue)
20080115
Page06: Change Location name from R468 to L75, Change PN from CS00002JB38 to CX8LM25003, Change footprint from RC0402 to RC0603(ESD)
20080115
Page06: Add C573,C574 for LDT_RST#, CPU_HT_RESET# (ESD issue)
20080115
Page08: DEL R84,R75,C78,C89 footprint
20080115
Page25: Add "IV@" for CN30
20080115
Page12: Reserve R84 (0 ohm) for HDMI buffer circuit
20080115
Page18: Stuff D9,D11 for TV CONN(ESD issue)
20080115
Page18,29: DEL D4,D5 footprint and DEL CRT_SENSE# net, No stuff R218
20080115
Page20: Add D36(Varistor) for LID591#(MR4/Pin2) (ESD issue)
20080115
Page21: Remove R492,R517, Short CN27/Pin189,190 to VIN directly.
20080115
Page28: Reserve C584,C585(100pF) for 3ND_MBDATA,3ND_MBCLK (EMI issue)
20080115
Page11: Add "IV@" for C454,C459
20080115
Page22: Stuff Varistor for C403,C409,C413,C416 (ESD issue)
20080115
Page23: Refer to HP circuit, ADD 4pcs .1uF CAP(C410,C411,C600,C601) for MIC CONN
20080115
Page26:ADD D60,D61,D62,D63 (0402 Varistor) for 1394 CONN (ESD issue)
20080115
Page26: DEL RN34,RN35 Co-lay footprint (1394 circuit)
20080115
Page28: Remove Felica circuit (No-stuff Q57,Q56,C476,R450,CN12,R178,R179)
20080115
Page28: Change L72 from CX216900002 to cx163210007, DEL R276,R278 Co-lay footprint (BT circuit)
20080115
Page28: Add C78 (100pF) to CN14/Pin9 (USB_DETACH) for EMI issue
20080115
Page28: DEL C42, Add D45 for CN8/Pin2 (ESD issue) - default no stuff
20080115
Page28: Change L73,L74 from CX216900002 to cx163210007,DEL R613,R612,R624,R626 Co-lay footprint (USB-daughter circuit)
20080115
Page28: Stuff L64,L65 to cx163210007,DEL R607,R608,R572,R569 Co-lay footprint (USB-MB circuit)
20080115
Page28: ADD D46,D64 for USB CONN, and Stuff D49,50,51,52 (ESD issue)
20080115
Page30: DEL debug LED circuit, DEL R210,LED4
20080115
Page31: No stuff E-SATA NUT for REV.G platform. Remove Hole31,Hole37
20080115
Page31: DEL R680,R681,R682, Short directly for Hole15,17,18
20080115
Page19: Add R651,R652 0 ohm for CEC SDA/SCL net
20080115
Page19: DEL L56,L57,L58,L59,R465,R474,R493,R495,R486,R488,R478,R483,C226,C227 for HDMI circuit
20080115
Page25: Add +3V_WL_VDD for CN21/Pin39,41, Reserve R465 0 ohm for debug use
20080115
Page08: Change CN23 footprint from DDR-C-292564-200P to DDR-C-292564-200P-BD3A (SMT open issue)
20080115
Page08: Change CN24 footprint from DDR-C-1734071-200P to DDR-C-1734071-200P-BD3A (SMT open issue)
20080115
Page30: Change SW4 footprint from SW-NSS506-212F-CCCD1T-3P to SW-NSS506-212F-CCCD1T-3P-BD3A (SMT open issue)
20080115
Page23: Change CN43 footprint from MDC-1-179373-2-12P-RUV to MDC-1-179373-2-12P-RUV-BD3A (SMT open issue)
20080115
Page23: Stuff D24 for ESD issue (HP CONN)
20080115
Page31: ADD C823,C824 for VIN and +NB_CORE (EMI issue)
20080115
Page35: Change PL15 Footprint from CDRH104R to CDRH104R-BD3A (SMT open issue)
20080115
Page22: Add R386 for VISTA WHQL circuit
20080115
Page20: DEL L50 footprint , DEL RP33(short directly) for CCD circuit
20080115
Page28: Add C606,C607 for CN7/Pin1,2 (EMI issue)
20080116
Page31: Add "MD@" for Hole32, only stuff for Modern SKU
20080116
Page31: Follow BL5, update Hole footprint (13pcs)
20080116
Page24: Change RJ45 footprint from LAN-100073FR012G101ZL-12P to rj45-c100s7-10806-l-12P
20080116
Page30: Update LED7,LED8 footprint to LED27-21-BHC-ZL1M2TY-3C
20080117
Page19: SWAP RN6,RN7,RN8 for HDMI layout routing
20080117
Page28: ADD D65,66,67 ESD solution for CN13 (Finger printer CONN)
20080117
Page28: ADD D68,69,72 ESD solution for CN14 (BT CONN)
20080117
Page20: ADD D73,74,75 ESD solution for CN4 (LCD CONN - CCD signal)
20080117
Page21: Reserve C825 (0.1uF) for PLTRST# (CN27/Pin103)
20080117
Page25: Reserve C827 (0.1uF) for PLTRST# (U33/Pin6)
20080117
Page14: Reserve C828 (0.1uF) for PLTRST# (R348)
20080117
Page19: Reserve C826 (0.1uF) for PLTRST# (U7/Pin2)
20080117
Page23: Connect pin 9,10 of CN40(Headphone) toD-GND.
4
CHANGE LIST
3
NOTE DATE
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2
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
Change List03
Change List03
Change List03
42 43 Tuesday, January 22, 2008
42 43 Tuesday, January 22, 2008
42 43 Tuesday, January 22, 2008
of
of
1
of
3C
3C
3C
5
4
3
2
1
Model
BD3A
D D
C C
B B
A A
REV
C3C
5
20080117
Page23: ADD D76 (Varistor) for SPDIF_OUT (CN40/Pin8). ADD D77 (Varistor) for HP_JD (CN40/Pin5)
20080118
Page31: ADD C803,C806,C807,C808,D78~81 for +1.2V (ESD issue)
20080118
Page37: DEL PR103 0ohm for PU10/Pin1
20080118
Page30: Change LED8(Wireless) P/N from BE0R0041Z00 to BE0R0053Z00
20080118
Page30: Change LED7(WiMAX) P/N from BEBL0004Z22 to BEBL0074Z04
20080118
Page30: Change CN9 footprint from 88171-3400L-34P-L to 91504-340N-34P-L
20080118
Page23: No stuff D24, already Stuff D77(Varistor)
20080118
Page28: ADD "BT@" for L72,C78,C618,D68,D69,D72
20080118
Page28: ADD "FP@" for D65,D66,D67
20080118
Page28: Default no stuff R689 for RAMP
20080120
Page25: Change the footprint of R33 and R330 from 1206 to 0805
20080120
Page23: ADD D82 (Varistor) for +3V_SPD(CN40/Pin7)
20080120
Page27: ADD D83~90 for two SATA CONN (ESD issue)
20080120
Page31: Update Hole43 and Hole44 footprint
20080121
Page27: Delete R494,R597,R270. Let CN26,CN34,CN32 connect +5V directly.
20080121
Page27: DEL HOLE31,37 (E-SATA NUT)
20080121
Page28: Add C809 (0.1uF) for BT_RESET (CN14/Pin6) BT CONN
20080121
Page22: ADD R801 (0 ohm) between AGND and DGND
20080121
Page27: ADD D91,D92(0603 Varistor) for two SATA CONN CN32 & CN34 (+5V power pin)
20080121
Page23: ADD C811 for HP_JD (ESD solution)
20080121
Page06: Change back L75 from baed to 0 ohm, no stuff C573,C574
20080121
Page18: Change L4,L5,L6 to CX0HS470001
20080121
Page24: Change U16 to DB0Z03LAN00 (Giga LAN Transformer)
20080121
Page??: ADD snubber (add resister 2.2ohm at PR61,PR146,PR144,PR39,PR50, and 2200pf at PC40,PC127,PC117,PC24,PC35)
20080118
Page31: ADD C803,C806,C807,C808,D78~81 for +1.2V (ESD issue)
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4
CHANGE LIST
3
NOTE DATE
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2
PROJECT : BD3A
PROJECT : BD3A
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
Change List04
Change List04
Change List04
43 43 Tuesday, January 22, 2008
43 43 Tuesday, January 22, 2008
43 43 Tuesday, January 22, 2008
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1
of
3C
3C
3C