QUANTA AJ6 Schematics

1
2
3
4
5
6
7
8
PCB STACK UP
LAYER 1 : TOP LAYER 2 : SVCC
DDRII-SODIMM1
LAYER 3 : IN1
A A
LAYER 4 : IN2 LAYER 5 : GND
DDRII-SODIMM2
LAYER 6 : BOT
LAN
PCIE-LAN
B B
MARVELL_88E8057
(10/100/GagaLAN)
PAGE 21
AJ6 SYSTEM DIAGRAM
PAGE 6,7
PAGE 6,7
Express Card X1
(NEW CARD)
PAGE 30
DDRII 667/800 MHz
DDRII 667/800 MHz
PCI-E
Mini PCI-E Card
(Wireless LAN)
PAGE 25
AMD Griffin
S1G2 Processor
638P (uPGA)/35W
PAGE 3,4,5
HT3
NORTH BRIDGE
RS780MN
29mm X 29mm, 528pin BGA
PAGE 8,9,10,11,
Lion Sabie
CPU THERMAL SENSOR
PAGE 5
PCI-Express 16X
CPU_CLK NBGFX_CLK NBGPP_CLK SBLINK_CLK
HDMI
PAGE 18
CRT
PAGE 20
LVDS
PAGE 19
14.31818MHz
CLOCK GEN
SLG8SP628
PAGE 2
MXM CONN
PAGE 17
RJ45
PAGE 21
SYSTEM CHARGER
PAGE 31
SYSTEM POWER
SATA - HDD
PAGE 24
PAGE 32
DDR II SMDDR_VTERM
1.8V/1.8VSUS
C C
VCCP +1.2V & +1.1V
PAGE 34
SATA - ODD
PAGE 24
SATA0 300MB
SATA4 300MB
PAGE 33
Keyboard Touch Pad
CPU CORE +VCORE0 +VCORE1
PAGE 29 PAGE 29
PAGE 37
SMBUS TABLE
Clock gen
SB--SCL0/SD0
D D
SB--SCL1/SD1
SB--SCL2/SD2
EC --SCL/SD
EC--SCL2/SD2
/DDR2/DDR2 thermal/Accelerometer
Wlan Card
epress card
Battery charge/discharge
VGA thermal/system thermal
1
+3V
+3V/S5
+3v/S5
+3VPCU
+3V
2
3
FAN
PAGE 28
PCIE X4
SOUTH BRIDGE
21mm X 21mm, 528pin BGA
PAGE 12,13.14.15.16
LPC
KBC
ITE IT8502
PAGE 28
SPI FLASH
PAGE 28
4
SB700
MDC CONN
4.5W(Ext)
4.3W(Int)
PAGE 26
RJ11
PAGE 26
USB2.0
7
Camera
PAGE 19
Azalia
AUDIO CONN
(Phone/ MIC)
PAGE 23
5
1
Bluetooth
PAGE 26
PCI BUS / 33MHz
CX20561
AUDIO CODEC
PAGE 23
AUDIO Amplifier TPA6017A2
PAGE 23
Speaker Conn.
PAGE 23
6
SBSRC_CLK
4,5
Mini PCI-E X2
PAGE 25
CARD reader
OZ126T
PAGE 22
Express Card X1 (NEW CARD)
PAGE 30
11
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet of
Date: Sheet of
Date: Sheet
7
0,2,8,9
USB2.0 Ports
PAGE27
X2
USB (small/B)
PAGE26
X2
PROJECT : AJ6
PROJECT : AJ6
PROJECT : AJ6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Block Diagram
Block Diagram
Block Diagram
of
139Monday, August 18, 2008
139Monday, August 18, 2008
139Monday, August 18, 2008
8
1A
1A
1A
5
4
3
2
1
60 ohm, 0.5A
L43
+1.2V
L43 BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
600 ohms@100Mhz
C648
C648
100P/50V/NPO_4
100P/50V/NPO_4
C532
C532 10U/6.3V_8
10U/6.3V_8
C512
C512
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C515
C515
0.1U/10V/X5R_4
0.1U/10V/X5R_4
EMI request. 18/08/2008
D D
+3.3V
DCR: 0.5 ohm
600 ohms@100Mhz
L45
L45
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
60 ohm, 0.5A
+3V_CLKVDD
C537
C537 10U/6.3V_8
10U/6.3V_8
C516
C516
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C526
C526
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+1.2V_CLKVDDIO
C531
C531
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+3V_CLKVDD
C538
C538
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C513
C513
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C546
C546
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C547
C547
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C524
C524
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C514
C514
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C530
C530
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C511
C511
0.1U/10V/X5R_4
0.1U/10V/X5R_4
NBGFX_CLKP NBGFX_CLKN
EXT_GFX_CLKP EXT_GFX_CLKN
NBGPP_CLKP NBGPP_CLKN
SBLINK_CLKP SBLINK_CLKN
UMA RS780CLOCKS name
RP64 STUFF
RP5053 NC to M86-M external reference clock
RP70 STUFF
RP64 STUFF
RP5053 STUFF
RP70 NC
RP72 STUFF RP72 STUFF
to NB for VGA reference clock
to NB for RX780 for PCIEX2 interface reference clock only RS780 is internal share with AC-LINK clock,RS780 not need
to NB for AC-LINK reference clock
Clock pin function
EMI reserved
CPUCLKN
NBGFX_CLKP NBGFX_CLKN EXT_GFX_CLKPEXTGFXCLK0P
PCIE_LAN_CLKP PCIE_LAN_CLKN SBLINK_CLKP SBLINK_CLKN
PCIE_MINI1_CLKP PCIE_MINI1_CLKN PCIE_MINI2_CLKP PCIE_MINI2_CLKN NBGPP_CLKP NBGPP_CLKN PCIE_NEW_CLKP PCIE_NEW_CLKN SBSRC_CLKP SBSRC_CLKN
C536
C536 *10P/50VC0G_4
*10P/50VC0G_4
SEL_SATA SEL_27
R385 *261_4R385 *261_4
CPUCLKP
NBHT_REFCLKP (10) NBHT_REFCLKN (10)
CLK_48M_USB (13)
2
CPUCLKP (3) CPUCLKN (3)
NBGFX_CLKP (10) NBGFX_CLKN (10) EXT_GFX_CLKP (17) EXT_GFX_CLKN (17)
PCIE_LAN_CLKP (21) PCIE_LAN_CLKN (21) SBLINK_CLKP (10) SBLINK_CLKN (10)
PCIE_MINI1_CLKP (25) PCIE_MINI1_CLKN (25) PCIE_MINI2_CLKP (25) PCIE_MINI2_CLKN (25) NBGPP_CLKP (10) NBGPP_CLKN (10) PCIE_NEW_CLKP (30) PCIE_NEW_CLKN (30) SBSRC_CLKP (12) SBSRC_CLKN (12)
Ra
R377 158/F_4R377 158/F_4 R389 90.9/F_4R389 90.9/F_4
Rb
1.8V
82.5RRa
130RRb
RES CHIP 130 1/16W +-1%(0402)L-F -->CS11302FB15 RES CHIP 158 1/16W +-1%(0402) -->CS11582FB00 RES CHIP 90.9 1/16W +-1%(0402) -->CS09092FB15 RES CHIP 82.5 1/16W +-1%(0402) -->CS08252FB11
CLK_PD#
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet of
Date: Sheet of
Date: Sheet
R373 8.2K_4R373 8.2K_4
PROJECT : AJ6
PROJECT : AJ6
PROJECT : AJ6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Clock Gen
Clock Gen
Clock Gen
RS780RX780
1.1V
158R
90.9R
1
EXT_NB_OSC (10)
+3.3V
239Thursday, August 21, 2008
239Thursday, August 21, 2008
239Thursday, August 21, 2008
3B
3B
3B
of
U23
U23
+3V_CLKVDD
1 2
Place very close to C/G
CG_XIN
CG_XOUT
+3V_CLK_VDDA
C552
C552
0.1U/10V/X5R_4
0.1U/10V/X5R_4
MINI1CLK_REQ#(25) MINI2CLK_REQ#(25)
NEW-CARD_CLK_REQ#(30)
+1.2V_CLKVDDIO
CG_XIN CG_XOUT
PCLK_SMB(6,7,13) PDAT_SMB(6,7,13)
PCLK_SMB PDAT_SMB
CLK_PD#
+3V_CLKVDD
L44
L44
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
C C
C289 33P/50V/NPO_4C289 33P/50V/NPO_4
C288 33P/50V/NPO_4C288 33P/50V/NPO_4
B B
C545
C545
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
Y2
Y2
14.318MHZ
14.318MHZ
4
VDDDOT
16
VDDSRC
26
VDDATIG
35
VDDSB_SRC
40
VDDSATA
48
VDDCPU
55
VDDHTT
56
VDDREF
63
VDD48
11
VDDSRC_IO0
17
VDDSRC_IO1
25
VDDATIG_IO
34
VDDSB_SRC_IO
47
VDDCPU_IO
1
GND48
7
GNDDOT
10
GNDSRC0
18
GNDSRC1
24
GNDATIG
33
GNDSB_SRC
43
GNDSATA
46
GNDCPU
52
GNDHTT
60
GNDREF
61
X1
62
X2
2
SMBCLK
3
SMBDAT
51
PD#
23
CLKREQ0#
45
CLKREQ1#
44
CLKREQ2#
39
CLKREQ3#
38
CLKREQ4#
SLG8SP628VTR
SLG8SP628VTR
CPUK8_0T
CPUK8_0C
SB_SRC0T SB_SRC0C SB_SRC1T SB_SRC1C
QFN64
QFN64
SRC6T/SATAT
SRC6C/SATAC
SRC7T/27M_SS
SRC7C/27M_NS
HTT0T/66M
HTT0C/66M
48MHz_0
REF0/SEL_HTT66
REF1/SEL_SATA
REF2/SEL_27
TGND065TGND166TGND267TGND368TGND469TGND570TGND671TGND772TGND873TGND9
74
ATIG0T ATIG0C ATIG1T ATIG1C
SRC0T SRC0C SRC1T SRC1C SRC2T SRC2C SRC3T SRC3C SRC4T SRC4C
CPUCLK0P
50
CPUCLK0N
49
NBGFXCLK0P
30
NBGFXCLK0N
29 28
EXTGFXCLK0N EXT_GFX_CLKN
27
PCILANCLK0P
37
PCILANCLK0N
36
SBLINKCLK0P
32
SBLINKCLK0N
31
PCIEMINICLK1P
22
PCIEMINICLK1N
21
PCIEMINICLK2P
20
PCIEMINICLK2N
19
NBGPPCLK0P
15
NBGPPCLK0N
14
PCIENEWCLK0P
13
PCIENEWCLK0N
12
SBSRCCLK0P
9
SBSRCCLK0N
8
42 41
CLK_VGA_27M_SS
6
CLK_VGA_27M_NSS
5
CLK48MUSB
SEL_HT66SEL_HT66SEL_HT66SEL_HT66 SEL_SATASEL_SATASEL_SATASEL_SATASEL_SATASEL_SATASEL_SATASEL_SATA SEL_27
NBHTREFCLK0P NBHTREFCLK0N
54 53
64
59 58 57
Place within 0.5" of CLKGEN
RP51 0_4P2RRP51 0_4P2R
4
3
2
1
RP43 0_4P2RRP43 0_4P2R
4
3
2
RP44 0_4P2RRP44 0_4P2R
RP48 0_4P2RRP48 0_4P2R RP42 0_4P2RRP42 0_4P2R
RP46 0_4P2RRP46 0_4P2R RP45 0_4P2RRP45 0_4P2R RP47 0_4P2RRP47 0_4P2R RP49 0_4P2RRP49 0_4P2R RP50 0_4P2RRP50 0_4P2R
R375 0_4R375 0_4 R374 0_4R374 0_4
R363 33_4R363 33_4
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
T38T38 T37T37 T39T39 T113T113
NBHT_REFCLKP NBHT_REFCLKN
CLK_48M_USB
RELTAK AL000880001
R175
R175
*8.2K_4
*8.2K_4
+3V_CLKVDD
R171
R171
8.2K_4
8.2K_4
RS780M/RX780M
R376
R376
8.2K_4
8.2K_4
Clock chip has internal serial terminations for differencial pairs, external resistors are reserved for debug purpose.
A A
SLG8SP628VTR RTM880N-796
P/N : AL8SP628000 P/N : AL000880000
5
* default
SEL_HTT66
SEL_SATA
SEL_27
66 MHz 3.3V single ended HTT clock
1
100 MHz differential HTT clock
*0
1*
100 MHz non-spreading differential SRC clock 100 MHz spreading differential SRC clock
0
27MHz and 27M SS outputs
1 0*
100 MHz SRC clock
4
3
5
+2.5V
+1.2V
D D
HT_NB_CPU_CAD_H[15..0](8) HT_NB_CPU_CAD_L[15..0](8) HT_NB_CPU_CLK_H[1..0](8) HT_NB_CPU_CLK_L[1..0](8) HT_NB_CPU_CTL_H[1..0](8) HT_NB_CPU_CTL_L[1..0](8) HT_CPU_NB_CAD_H[15..0](8) HT_CPU_NB_CAD_L[15..0](8) HT_CPU_NB_CLK_H[1..0](8) HT_CPU_NB_CLK_L[1..0](8)
C C
HT_CPU_NB_CTL_H[1..0](8) HT_CPU_NB_CTL_L[1..0](8)
C446 4.7U/6.3V_6C446 4.7U/6.3V_6 C459 0.22U/6.3V_4C459 0.22U/6.3V_4 C535 180P/50V_4C535 180P/50V_4
HT_NB_CPU_CAD_H[15..0] HT_NB_CPU_CAD_L[15..0]
HT_NB_CPU_CLK_H[1..0]
HT_NB_CPU_CLK_L[1..0]
HT_NB_CPU_CTL_H[1..0]
HT_NB_CPU_CTL_L[1..0] HT_CPU_NB_CAD_H[15..0] HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CLK_L[1..0]
HT_CPU_NB_CTL_H[1..0]
HT_CPU_NB_CTL_L[1..0]
HT_NB_CPU_CAD_H0 HT_NB_CPU_CAD_L0 HT_NB_CPU_CAD_H1 HT_NB_CPU_CAD_L1 HT_NB_CPU_CAD_H2 HT_NB_CPU_CAD_L2 HT_NB_CPU_CAD_H3 HT_NB_CPU_CAD_L3 HT_NB_CPU_CAD_H4 HT_NB_CPU_CAD_L4 HT_NB_CPU_CAD_H5 HT_NB_CPU_CAD_L5 HT_NB_CPU_CAD_H6 HT_NB_CPU_CAD_L6 HT_NB_CPU_CAD_H7 HT_NB_CPU_CAD_L7 HT_NB_CPU_CAD_H8 HT_NB_CPU_CAD_L8 HT_NB_CPU_CAD_H9 HT_NB_CPU_CAD_L9 HT_NB_CPU_CAD_H10 HT_NB_CPU_CAD_L10 HT_NB_CPU_CAD_H11 HT_NB_CPU_CAD_L11 HT_NB_CPU_CAD_H12 HT_NB_CPU_CAD_L12 HT_NB_CPU_CAD_H13 HT_NB_CPU_CAD_L13 HT_NB_CPU_CAD_H14 HT_NB_CPU_CAD_L14 HT_NB_CPU_CAD_H15 HT_NB_CPU_CAD_L15
HT_NB_CPU_CLK_H0 HT_NB_CPU_CLK_L0 HT_NB_CPU_CLK_H1 HT_NB_CPU_CLK_L1
HT_NB_CPU_CTL_H0 HT_NB_CPU_CTL_L0 HT_NB_CPU_CTL_H1 HT_NB_CPU_CTL_L1
BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8 C224
C224
10U/6.3V_8
10U/6.3V_8
+1.2V +1.2V +1.2V +1.2V
L14
L14
U18A
U18A
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
SOCKET_638_PIN
SOCKET_638_PIN
4
HT LINK
HT LINK
+CPUVDDA
C216
C216
4.7U/6.3V_6
4.7U/6.3V_6
VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0 L0_CLKOUT_L0 L0_CLKOUT_H1 L0_CLKOUT_L1
L0_CTLOUT_H0 L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1
3
W/S= 15 mil/20mil
C206
C206
C202
0.22U/6.3V_4
0.22U/6.3V_4
C202 3300P/50V_4
3300P/50V_4
+1.2V
AE2
+1.2V
AE3
+1.2V CPU_SVC_R
AE4
+1.2V
AE5
HT_CPU_NB_CAD_H0
AD1
HT_CPU_NB_CAD_L0
AC1
HT_CPU_NB_CAD_H1
AC2
HT_CPU_NB_CAD_L1
AC3
HT_CPU_NB_CAD_H2
AB1
HT_CPU_NB_CAD_L2
AA1
HT_CPU_NB_CAD_H3
AA2
HT_CPU_NB_CAD_L3
AA3
HT_CPU_NB_CAD_H4
W2
HT_CPU_NB_CAD_L4
W3
HT_CPU_NB_CAD_H5
V1
HT_CPU_NB_CAD_L5
U1
HT_CPU_NB_CAD_H6
U2
HT_CPU_NB_CAD_L6
U3
HT_CPU_NB_CAD_H7
T1
HT_CPU_NB_CAD_L7
R1
HT_CPU_NB_CAD_H8
AD4
HT_CPU_NB_CAD_L8
AD3
HT_CPU_NB_CAD_H9
AD5
HT_CPU_NB_CAD_L9
AC5
HT_CPU_NB_CAD_H10
AB4
HT_CPU_NB_CAD_L10
AB3
HT_CPU_NB_CAD_H11
AB5
HT_CPU_NB_CAD_L11
AA5
HT_CPU_NB_CAD_H12
Y5
HT_CPU_NB_CAD_L12
W5
HT_CPU_NB_CAD_H13
V4
HT_CPU_NB_CAD_L13
V3
HT_CPU_NB_CAD_H14
V5
HT_CPU_NB_CAD_L14
U5
HT_CPU_NB_CAD_H15
T4
HT_CPU_NB_CAD_L15
T3
HT_CPU_NB_CLK_H0
Y1
HT_CPU_NB_CLK_L0
W1
HT_CPU_NB_CLK_H1
Y4
HT_CPU_NB_CLK_L1
Y3
HT_CPU_NB_CTL_H0
R2
HT_CPU_NB_CTL_L0
R3
HT_CPU_NB_CTL_H1
T5
HT_CPU_NB_CTL_L1
R5
CPU CLK
CPUCLKP(2) CPUCLKN(2)
Keep trace from resisor to CPU within 0.6" keep trace from caps to CPU within 1.2"
R37
R37
*300_4
*300_4
R142
R142
*300_4
*300_4
CPUCLKIN CPUCLKP
CPUCLKN
R138
R138
*300_4
*300_4
R141
R141
*300_4
*300_4
C4454.7U/6.3V_6 C4454.7U/6.3V_6C534 4.7U/6.3V_6C534 4.7U/6.3V_6 C4490.22U/6.3V_4 C4490.22U/6.3V_4 C448180P/50V_4 C448180P/50V_4
CPUTEST12 CPUTEST14 CPUTEST15
CPUTEST18 CPUTEST19 CPUTEST20
AMD recommends 12/18
CPUTEST21 CPUTEST22 CPUTEST24
R58
R58
R57
R57
300_4
300_4
*300_4
*300_4
CPUCLKP CPUCLKN
R340 169/F_4R340 169/F_4
C502 3900P/25V/X7R_4C502 3900P/25V/X7R_4 C501 3900P/25V/X7R_4C501 3900P/25V/X7R_4
SideBand Temp sense I2C
R90
R90
*300_4
*300_4
R56
R56
*300_4
*300_4
R36
R36
300_4
300_4
+1.8V_SUS
CPU_LDT_RST#(12)
CPU_PWRGD(12)
CPU_LDT_STOP#(10,12)
+1.2V
+1.8V_SUS
CPUCLKIN#
R84 44.2/F_4R84 44.2/F_4 R137 44.2/F_4R137 44.2/F_4
CPU_VDD0_RUN_FB_H(35) CPU_VDD0_RUN_FB_L(35)
CPU_VDD1_RUN_FB_H(35) CPU_VDD1_RUN_FB_L(35)
R94 510_4R94 510_4 R91 *510_4R91 *510_4
R59 300_4R59 300_4
R316 0_4R316 0_4
2
+CPUVDDA
W/S= 15 mil/20mil
+CPUVDDA +CPUVDDA
CPUCLKIN CPUCLKIN#
CPU_LDT_RST# CPU_PWRGD CPU_LDT_STOP# CPU_LDT_REQ#_CPU
CPU_SIC CPU_SID CPU_ALERT
place them to CPU within 1.5"
CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI
T7T7 T35T35
T34T34
T9T9 T2T2 T4T4 T5T5 T8T8
CPU_THERMDC CPU_THERMDA
CPU_LDT_RST# CPU_LDT_STOP# CPU_PWRGD CPU_LDT_REQ#_CPU
CPU_HTREF0 CPU_HTREF1
CPUTEST23 CPUTEST18
CPUTEST19 CPUTEST25H
CPUTEST25L
CPUTEST21 CPUTEST20 CPUTEST24 CPUTEST22 CPUTEST12 CPUTEST27
U18D
U18D
F8
VDDA1
F9
VDDA2
A9
CLKIN_H
A8
CLKIN_L
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
C6
LDTREQ_L
AF4
SIC
AF5
SID
AE6
ALERT_L
R6
HT_REF0
P6
HT_REF1
F6
VDD0_FB_H
E6
VDD0_FB_L
Y6
VDD1_FB_H
AB6
VDD1_FB_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
AD7
TEST23
H10
TEST18
G9
TEST19
E9
TEST25_H
E8
TEST25_L
AB8
TEST21
AF7
TEST20
AE7
TEST24
AE8
TEST22
AC8
TEST12
AF8
TEST27
C2
TEST9
AA6
TEST6
A3
RSVD1
A5
RSVD2
B3
RSVD3
B5
RSVD4
C1
RSVD5
SOCKET_638_PIN
SOCKET_638_PIN
R134300_4 R134300_4 R140300_4 R140300_4 R323300_4 R323300_4 R327300_4 R327300_4
KEY1 KEY2
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC THERMDA
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TEST28_H
TEST28_L
TEST17 TEST16 TEST15 TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD10
RSVD9 RSVD8 RSVD7 RSVD6
SVC SVD
TDO
H_THRMDC (5) H_THRMDA (5)
+1.8V
M11 W18
A6
CPU_SVD_R
A4
CPU_THERMTRIP_L#
AF6
CPU_PROCHOT_L#
AC7
CPU_MEMHOT_L#
AA8
CPU_THERMDC
W7
CPU_THERMDA
W8
VDDIO_FB_H
W9
VDDIO_FB_L
Y9 H6
G6
CPU_DBREQ#
E10
CPU_TDO
AE9
CPUTEST28H
J7
CPUTEST28L
H8
CPUTEST17
D7
CPUTEST16
E7
CPUTEST15
F7
CPUTEST14
C7 C3
K8 C4
CPUTEST29H
C9
CPUTEST29L
C8
H18 H19 AA7 D5 C5
1
VDDIO_FB_H (34)
VDDIO_FB_L (34)
CPU_VDDNB_RUN_FB_H (35) CPU_VDDNB_RUN_FB_L (35)
T15T15 T16T16
T22T22 T27T27 T19T19 T28T28
T25T25 T24T24
R326 *2.2K_4R326 *2.2K_4 R128 1K_4R128 1K_4
+1.8V_SUS
CPU_SVC_R CPU_SVD_R CPU_SVD CPU_PWRGD
VFIX MODE
HDT Connector
3
2
3
Q44
Q44 BSS138_NL/SOT23
BSS138_NL/SOT23
2
1 3
+3.3V
Q9
Q9 MMBT3904
MMBT3904
R342
R342 1K_4
1K_4
CPU_LDT_RST_HTPA#CPU_LDT_REQ#_CPU
CPU_THERMTRIP# (13)
B B
A A
R344 20K_4R344 20K_4
+3.3V
Q43 *BSS138_NL/SOT23Q43 *BSS138_NL/SOT23
1
R341 0_4R341 0_4
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
R42 10K_4R42 10K_4
R43 300_4R43 300_4
CPU_MEMHOT_L# CPU_MEMHOT#
R38 10K_4R38 10K_4
R39 300_4R39 300_4
CPU_PROCHOT_L#
C504 0.1U/10V/X5R_4C504 0.1U/10V/X5R_4
R345 34.8K_4R345 34.8K_4
2
3
2
2
Q7
Q7
1 3
MMBT3904
MMBT3904
5
CNTR_VREF
Q8
Q8 MMBT3904
MMBT3904
13
CPU_LDT_REQ# (10)
CPU_PROCHOT# (12)
CPU_LDT_RST#
12
CPU_MEMHOT# (7,13)
+1.8V_SUS
+1.8V_SUS
CPU_THERMTRIP_L#
R343
R343 0_4
0_4
1
G1
G1 *SHORT_ PAD1
*SHORT_ PAD1
for debug only
R40 10K_4R40 10K_4
R41 300_4R41 300_4
4
R131 1K_4R131 1K_4 R133 0_4R133 0_4
R130 0_4R130 0_4 R325 0_4R325 0_4
R132 *220_4R132 *220_4 R129 *220_4R129 *220_4 R322 *220_4R322 *220_4
CPU_SVC
CPU_PWRGD_SVID_REG
VID Override Circuit
SVC SVD Voltage Output
00 0
1 0
1
11
CPU_DBRDY CPU_DBREQ# CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO CPU_LDT_RST_HTPA#
1.4V
1.2V
1.0V
0.8V
T20T20 T23T23 T6T6 T3T3 T96T96 T95T95 T94T94 T110T110
Serial VID
CPU_SVC (35) CPU_SVD (35) CPU_PWRGD_SVID_REG (35)
2
NB2/RD1
NB2/RD1
NB2/RD1
+1.8V_SUS
R53
R53 390_4
390_4
CPU_SIC
CPU_SID
PROJECT : AJ6
PROJECT : AJ6
PROJECT : AJ6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
S1G2 HT,CTL I/F 1/3
S1G2 HT,CTL I/F 1/3
S1G2 HT,CTL I/F 1/3
Date: Sheet
Date: Sheet
Date: Sheet
AMD recommends 12/18
R55
R55
R54
R54
1K_4
1K_4
390_4
390_4
CPU_ALERT
CPU_DBREQ#
1
R139
R139
300_4
300_4
339Monday, August 18, 2008
339Monday, August 18, 2008
339Monday, August 18, 2008
of
of
of
1A
1A
1A
A
B
C
D
E
+0.9VSMVTT +0.9VSMVTT
PLACE THEM CLOSE TO CPU WITHIN 1"
R300 39.2/F_4R300 39.2/F_4
MEM_MA0_ODT0(6,7) MEM_MA0_ODT1(6,7)
MEM_MA0_CS#0(6,7) MEM_MA0_CS#1(6,7)
MEM_MA_CLK1_P(6) MEM_MA_CLK1_N(6) MEM_MA_CLK7_P(6) MEM_MA_CLK7_N(6)
MEM_MA_BANK0(6,7) MEM_MA_BANK1(6,7) MEM_MA_BANK2(6,7)
MEM_MA_RAS#(6,7) MEM_MA_CAS#(6,7) MEM_MA_WE#(6,7)
MEM_MA_CKE0(6,7) MEM_MA_CKE1(6,7)
R301 39.2/F_4R301 39.2/F_4
T26T26
A
+1.8V_SUS
4 4
MEM_MA_ADD[0..15](6,7)
3 3
2 2
1 1
M_ZP M_ZN
MEM_MA_RESET#
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MB_CLK7_P
MEM_MB_CLK7_N MEM_MB_CLK1_P
MEM_MB_CLK1_N
U18B
U18B
D10
VTT1
C10
VTT2
B10
VTT3
AD10
VTT4
AF10
MEMZP
AE10
MEMZN
H16
RSVD_M1
T19
MA0_ODT0
V22
MA0_ODT1
U21
MA1_ODT0
V19
MA1_ODT1
T20
MA0_CS_L0
U19
MA0_CS_L1
U20
MA1_CS_L0
V20
MA1_CS_L1
J22
MA_CKE0
J20
MA_CKE1
N19
MA_CLK_H5
N20
MA_CLK_L5
E16
MA_CLK_H1
F16
MA_CLK_L1
Y16
MA_CLK_H7
AA16
MA_CLK_L7
P19
MA_CLK_H4
P20
MA_CLK_L4
N21
MA_ADD0
M20
MA_ADD1
N22
MA_ADD2
M19
MA_ADD3
M22
MA_ADD4
L20
MA_ADD5
M24
MA_ADD6
L21
MA_ADD7
L19
MA_ADD8
K22
MA_ADD9
R21
MA_ADD10
L22
MA_ADD11
K20
MA_ADD12
V24
MA_ADD13
K24
MA_ADD14
K19
MA_ADD15
R20
MA_BANK0
R23
MA_BANK1
J21
MA_BANK2
R19
MA_RAS_L
T22
MA_CAS_L
T24
MA_WE_L
SOCKET_638_PIN
SOCKET_638_PIN
+0.9VSMVTT
4.7U/6.3V_6
4.7U/6.3V_6
+0.9VSMVTT
1000P/50V_4
1000P/50V_4
C443
C443
1.5P/50V_4
1.5P/50V_4
C195
C195
1.5P/50V_4
1.5P/50V_4
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
VTT5 VTT6 VTT7 VTT8 VTT9
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0 MB0_ODT1 MB1_ODT0
MB0_CS_L0 MB0_CS_L1 MB1_CS_L0
MB_CKE0 MB_CKE1
MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4
MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8
MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15
MB_BANK0 MB_BANK1 MB_BANK2
MB_RAS_L MB_CAS_L
MB_WE_L
Place close to socket
C207
C207
C442
C442
4.7U/6.3V_6
4.7U/6.3V_6
C217
C217
1000P/50V_4
1000P/50V_4
Close to CPU within 1200 mils
C33
C33
4.7U/6.3V_6
4.7U/6.3V_6
1000P/50V_4
1000P/50V_4
C208
C208
C31
C31
W10 AC10 AB10 AA10 A10
CPU_VTT_SENSE
Y10
MEMVREF_CPU
W17
MEM_MB_RESET#
B18 W26
W23 Y26
V26 W25 U22
J25 H26
P22 R22 A17 A18 AF18 AF17 R26 R25
MEM_MB_ADD0
P24
MEM_MB_ADD1
N24
MEM_MB_ADD2
P26
MEM_MB_ADD3
N23
MEM_MB_ADD4
N26
MEM_MB_ADD5
L23
MEM_MB_ADD6
N25
MEM_MB_ADD7
L24
MEM_MB_ADD8
M26
MEM_MB_ADD9
K26
MEM_MB_ADD10
T26
MEM_MB_ADD11
L26
MEM_MB_ADD12
L25
MEM_MB_ADD13
W24
MEM_MB_ADD14
J23
MEM_MB_ADD15
J24 R24
U26 J26
U25 U24 U23
4.7U/6.3V_6
4.7U/6.3V_6
1000P/50V_4
1000P/50V_4
B
C34
C34
C203
C203
750 mA
CPU_VTT_SENSE (34)
T30T30
MEM_MB0_ODT0 (6,7) MEM_MB0_ODT1 (6,7)
MEM_MB0_CS#0 (6,7) MEM_MB0_CS#1 (6,7)
MEM_MB_CKE0 (6,7) MEM_MB_CKE1 (6,7)
MEM_MB_CLK1_P (6) MEM_MB_CLK1_N (6) MEM_MB_CLK7_P (6) MEM_MB_CLK7_N (6)
MEM_MB_BANK0 (6,7) MEM_MB_BANK1 (6,7) MEM_MB_BANK2 (6,7)
MEM_MB_RAS# (6,7) MEM_MB_CAS# (6,7) MEM_MB_WE# (6,7)
C440
C440
0.22U/6.3V_4
0.22U/6.3V_4
C439
C439
180P/50V_4
180P/50V_4
MEM_MA_CLK7_P
MEM_MA_CLK7_N MEM_MA_CLK1_P
MEM_MA_CLK1_N
+1.8V_SUS
MEM_MB_ADD[0..15] (6,7)
C204
C204
0.22U/6.3V_4
0.22U/6.3V_4
1.5P/50V_4
1.5P/50V_4
1.5P/50V_4
1.5P/50V_4
C441
C441
180P/50V_4
180P/50V_4
C63
C63
C172
C172
0.22U/6.3V_4
0.22U/6.3V_4
R79
R79 2K/F_4
2K/F_4
R80
R80 2K/F_4
2K/F_4
C213
C213
C51
C51
180P/50V_4
180P/50V_4
MEM_MB_DATA[0..63](6)
+0.9VSMVREF (6,34)
Reserved
R78
R78 *0_4
*0_4
C68
C68
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C37
C37
0.22U/6.3V_4
0.22U/6.3V_4
C214
C214
180P/50V_4
180P/50V_4
C
C70
C70
1000P/50V_4
1000P/50V_4
MEM_MB_DM[0..7](6)
Processor Memory Interface
U18C
U18C
MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
MEM_MB_DQS0_P(6) MEM_MB_DQS0_N(6) MEM_MB_DQS1_P(6) MEM_MB_DQS1_N(6) MEM_MB_DQS2_P(6) MEM_MB_DQS2_N(6) MEM_MB_DQS3_P(6) MEM_MB_DQS3_N(6) MEM_MB_DQS4_P(6) MEM_MB_DQS4_N(6) MEM_MB_DQS5_P(6) MEM_MB_DQS5_N(6) MEM_MB_DQS6_P(6) MEM_MB_DQS6_N(6) MEM_MB_DQS7_P(6) MEM_MB_DQS7_N(6)
C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23
G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11
Y11 AE14 AF14 AF11 AD11
A12
B16
A22
E25 AB26 AE22 AC16 AD12
C12
B12
D16
C16
A24
A23
F26
E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12
SOCKET_638_PIN
SOCKET_638_PIN
MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63
MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7
MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7
MEM:DATA
MEM:DATA
D
MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8
MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63
MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7
MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7
G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12
E12 C15 E19 F24 AC24 Y19 AB16 Y13
G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13
MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet of
Date: Sheet of
Date: Sheet
MEM_MA_DATA[0..63] (6)
MEM_MA_DM[0..7] (6)
MEM_MA_DQS0_P (6) MEM_MA_DQS0_N (6) MEM_MA_DQS1_P (6) MEM_MA_DQS1_N (6) MEM_MA_DQS2_P (6) MEM_MA_DQS2_N (6) MEM_MA_DQS3_P (6) MEM_MA_DQS3_N (6) MEM_MA_DQS4_P (6) MEM_MA_DQS4_N (6) MEM_MA_DQS5_P (6) MEM_MA_DQS5_N (6) MEM_MA_DQS6_P (6) MEM_MA_DQS6_N (6) MEM_MA_DQS7_P (6) MEM_MA_DQS7_N (6)
PROJECT : AJ6
PROJECT : AJ6
PROJECT : AJ6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
S1G2 DDRII MEMORY I/F 2/3
S1G2 DDRII MEMORY I/F 2/3
S1G2 DDRII MEMORY I/F 2/3
E
1A
1A
1A
of
439Monday, August 18, 2008
439Monday, August 18, 2008
439Monday, August 18, 2008
5
U18E
U18E
G4
VDD0_1
H2
VDD0_2
J9
VDD0_3
J11
VDD0_4
J13
VDD0_5
D D
+CPUVDDNB
3A
+1.8V_SUS
2A
C C
B B
J15
VDD0_6
K6
VDD0_7
K10
VDD0_8
K12
VDD0_9
K14
VDD0_10
L4
VDD0_11
L7
VDD0_12
L9
VDD0_13
L11
VDD0_14
L13
VDD0_15
L15
VDD0_16
M2
VDD0_17
M6
VDD0_18
M8
VDD0_19
M10
VDD0_20
N7
VDD0_21
N9
VDD0_22
N11
VDD0_23
K16
VDDNB_1
M16
VDDNB_2
P16
VDDNB_3
T16
VDDNB_4
V16
VDDNB_5
H25
VDDIO1
J17
VDDIO2
K18
VDDIO3
K21
VDDIO4
K23
VDDIO5
K25
VDDIO6
L17
VDDIO7
M18
VDDIO8
M21
VDDIO9
M23
VDDIO10
M25
VDDIO11
N17
VDDIO12
SOCKET_638_PIN
SOCKET_638_PIN
VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8
VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26
VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13
+VCORE1+VCORE0 +VCORE0
P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2
Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18
+1.8V_SUS
4
U18F
U18F
AA4
VSS1
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
SOCKET_638_PIN
SOCKET_638_PIN
VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129
J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6
3
2
1
BOTTOM SIDE DECOUPLING
C142
C142
22U/6.3V_8
22U/6.3V_8
+VCORE1
+CPUVDDNB
C5
C5
22U/6.3V_8
22U/6.3V_8
C19
C19
22U/6.3V_8
22U/6.3V_8
C140
C140
22U/6.3V_8
22U/6.3V_8
C67
C67
22U/6.3V_8
22U/6.3V_8
C16
C16
22U/6.3V_8
22U/6.3V_8
C219
C219
22U/6.3V_8
22U/6.3V_8
C6
C6
22U/6.3V_8
22U/6.3V_8
C21
C21
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
+1.8V_SUS
C7
C73
C73
22U/6.3V_8
22U/6.3V_8
C150
C150 22U/6.3V_8
22U/6.3V_8
C116
C116
0.22U/6.3V_4
0.22U/6.3V_4
22U/6.3V_8
22U/6.3V_8
C89
C89
0.22U/6.3V_4
0.22U/6.3V_4
C102
C102
C122
C122
0.01U/16V_4
0.01U/16V_4
C94
C94
0.01U/16V_4
0.01U/16V_4
C163
C163
0.22U/6.3V_4
0.22U/6.3V_4
C135
C135
180P/50V_4
180P/50V_4
C81
C81
180P/50V_4
180P/50V_4
C129
C129
0.22U/6.3V_4
0.22U/6.3V_4
C82
C82
0.01U/16V_4
0.01U/16V_4
C59
C59
180P/50V_4
180P/50V_4
C148
C148
180P/50V_4
180P/50V_4
C65
C65
180P/50V_4
180P/50V_4
C7
DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.8V_SUS
C128
4.7U/6.3V_6
4.7U/6.3V_6
+1.8V_SUS
0.22U/6.3V_4
0.22U/6.3V_4
C168
C168
C159
C159
C62
C62
4.7U/6.3V_6
4.7U/6.3V_6
C112
C112
0.22U/6.3V_4
0.22U/6.3V_4
C144
C144
4.7U/6.3V_6
4.7U/6.3V_6
C141
C141
0.01U/16V_4
0.01U/16V_4
4.7U/6.3V_6
4.7U/6.3V_6
C123
C123
0.01U/16V_4
0.01U/16V_4
C128
0.22U/6.3V_4
0.22U/6.3V_4
C49
C49
180P/50V_4
180P/50V_4
C120
C120
C57
C57
0.22U/6.3V_4
0.22U/6.3V_4
C58
C58
180P/50V_4
180P/50V_4
PROCESSOR POWER AND GROUND
+VCORE0
C78
C78
0.01U/16V_4
0.01U/16V_4
add 0.01uF stitching caps at RS780 (near HT pin out) side for connecting CPU_CORE and GND planes. (Around 1 cap with 6~8 HT pairs)
+VCORE0 +VCORE1
C119 0.01U/16V_4C119 0.01U/16V_4 C108 0.01U/16V_4C108 0.01U/16V_4 C106 0.01U/16V_4C106 0.01U/16V_4 C107 0.01U/16V_4C107 0.01U/16V_4
For fix HyperTransport nets across plane splits
3
C156
C156
0.01U/16V_4
0.01U/16V_4
PROJECT : AJ6
PROJECT : AJ6
PROJECT : AJ6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
S1G2 PWR & GND 3/3
S1G2 PWR & GND 3/3
2
S1G2 PWR & GND 3/3
Date: Sheet of
Date: Sheet of
Date: Sheet
2A
2A
2A
of
539Tuesday, August 19, 2008
539Tuesday, August 19, 2008
539Tuesday, August 19, 2008
1
VCC DXP DXN GND
R67
R67
200/F_6
200/F_6
+3.3V
C30
C30
0.1U/10V/X5R_4
0.1U/10V/X5R_4
1 2 3 5
C29
C29 2200P/50V_4
2200P/50V_4
H_THRMDA (3)
H_THRMDC (3)
10K_4
10K_4
3 1
Q68
Q68
R52
R52
+3.3V
+3.3V
2
R44
R44
10K_4
10K_4
10K_4
10K_4
R34 0_4R34 0_4
R35
R35
R574
R574
10K_4
10K_4
Address: 98H
U3
U3
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
G786P81U
G786P81U
4
+3.3V
Q66
Q66
3 1
3 1
Q67
Q67
+3.3V
PM_THERM#(13)
5
2
2
SYS_SHDN#(32,37)
2N7002W-7-F
2N7002W-7-F
2N7002W-7-F
2N7002W-7-F
ABCLK(28,29)
ABDATA(28,29)
2N7002W-7-F
2N7002W-7-F
A A
5
+1.8V_SUS +1.8V_SUS
103
MEM_MA_ADD[0..15](4,7)
D D
MEM_MA_BANK[0..2](4,7)
MEM_MA_DQS0_P(4) MEM_MA_DQS1_P(4) MEM_MA_DQS2_P(4) MEM_MA_DQS3_P(4) MEM_MA_DQS4_P(4) MEM_MA_DQS5_P(4) MEM_MA_DQS6_P(4)
C C
B B
A A
MEM_MA_DQS7_P(4) MEM_MA_DQS0_N(4)
MEM_MA_DQS1_N(4) MEM_MA_DQS2_N(4) MEM_MA_DQS3_N(4) MEM_MA_DQS4_N(4) MEM_MA_DQS5_N(4) MEM_MA_DQS6_N(4) MEM_MA_DQS7_N(4)
MEM_MA_CLK1_P(4) MEM_MA_CLK1_N(4) MEM_MA_CLK7_P(4) MEM_MA_CLK7_N(4)
MEM_MA_CKE0(4,7) MEM_MA_CKE1(4,7)
MEM_MA_RAS#(4,7) MEM_MA_CAS#(4,7) MEM_MA_WE#(4,7) MEM_MA0_CS#0(4,7) MEM_MA0_CS#1(4,7)
MEM_MA0_ODT0(4,7) MEM_MA0_ODT1(4,7)
PDAT_SMB(2,7,13) PCLK_SMB(2,7,13)
+3.3V
C225
C225
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8
MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
PDAT_SMB PCLK_SMB
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C226
1000P/50V_4
1000P/50V_4
C227
C227
0.1U/10V/X5R_4
0.1U/10V/X5R_4
DIM1_SA0 DIM1_SA1
C9
C9
102
A0
101
A1
100
99 98 97 94 92 93 91
105
90 89
116
86 84
107 106
85 10
26 52
67 130 147 170 185
13
31
51
70 131 148 169 188
11
29
49
68 129 146 167 186
30
32 164 166
79
80 108
113 109 110 115
114 119
198 200
195 197
199
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
BA0 BA1 BA2
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
CK0 CK0 CK1 CK1
CKE0 CKE1
RAS CAS WE S0 S1
ODT0 ODT1
SA0 SA1
SDA SCL
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20
59
DDR SO-DIMM SOCKET 1.8V
DDR SO-DIMM SOCKET 1.8V
H=4
R287 10K/F_4R287 10K/F_4 R288 10K/F_4R288 10K/F_4
104
VDD7
SO-DIMM
(Normal)
SO-DIMM
(Normal)
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
SMbus address A0
5
111
121
112
VDD8
VDD9
VSS30
VSS29
122
117
118
VDD10
VSS31
128
127
DIM1_SA0 DIM1_SA1
VDD11
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
NC/TEST
VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34
VSS33
VSS32
132
4
CN22
CN22
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9
NC1 NC2 NC3 NC4
4
MEM_MA_DATA0
5
MEM_MA_DATA1
7
MEM_MA_DATA2
17
MEM_MA_DATA3
19
MEM_MA_DATA4
4
MEM_MA_DATA5
6
MEM_MA_DATA6
14
MEM_MA_DATA7
16
MEM_MA_DATA8
23
MEM_MA_DATA9
25
MEM_MA_DATA10
35
MEM_MA_DATA11
37
MEM_MA_DATA12
20
MEM_MA_DATA13
22
MEM_MA_DATA14
36
MEM_MA_DATA15
38
MEM_MA_DATA16
43
MEM_MA_DATA17
45
MEM_MA_DATA18
55
MEM_MA_DATA19
57
MEM_MA_DATA20
44
MEM_MA_DATA21
46
MEM_MA_DATA22
56
MEM_MA_DATA23
58
MEM_MA_DATA24
61
MEM_MA_DATA25
63
MEM_MA_DATA26
73
MEM_MA_DATA27
75
MEM_MA_DATA28
62
MEM_MA_DATA29
64
MEM_MA_DATA30
74
MEM_MA_DATA31
76
MEM_MA_DATA36
123
MEM_MA_DATA37
125
MEM_MA_DATA35
135
MEM_MA_DATA39
137
MEM_MA_DATA38
124
MEM_MA_DATA32
126
MEM_MA_DATA33
134
MEM_MA_DATA34
136
MEM_MA_DATA40
141
MEM_MA_DATA41
143
MEM_MA_DATA46
151
MEM_MA_DATA47
153
MEM_MA_DATA44
140
MEM_MA_DATA45
142
MEM_MA_DATA42
152
MEM_MA_DATA43
154
MEM_MA_DATA52
157
MEM_MA_DATA49
159
MEM_MA_DATA54
173
MEM_MA_DATA55
175
MEM_MA_DATA53
158
MEM_MA_DATA48
160
MEM_MA_DATA51
174
MEM_MA_DATA50
176
MEM_MA_DATA61
179
MEM_MA_DATA60
181
MEM_MA_DATA63
189
MEM_MA_DATA62
191
MEM_MA_DATA56
180
MEM_MA_DATA57
182
MEM_MA_DATA58
192
MEM_MA_DATA59
194
MEMHOT_SODIMM#_1
50 69 83 120
MEM_MA_NC5
163
196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133
3
MEM_MA_DATA[0..63] (4)
R109 0_4R109 0_4
T17T17
T97T97
+0.9VSMVREF_DIMM+0.9VSMVREF_DIMM
+0.9VSMVREF(4,34)
MEMHOT_SODIMM# (7)
+0.9VSMVREF_DIMM
R146 *0_4R146 *0_4
Only for reserved
MEM_MB_ADD[0..15](4,7) MEM_MB_DATA[0..63] (4)
MEM_MB_BANK[0..2](4,7)
MEM_MB_DM[0..7](4)MEM_MA_DM[0..7](4)
MEM_MB_DQS0_P(4) MEM_MB_DQS1_P(4) MEM_MB_DQS2_P(4) MEM_MB_DQS3_P(4) MEM_MB_DQS4_P(4) MEM_MB_DQS5_P(4) MEM_MB_DQS6_P(4) MEM_MB_DQS7_P(4)
MEM_MB_DQS0_N(4) MEM_MB_DQS1_N(4) MEM_MB_DQS2_N(4) MEM_MB_DQS3_N(4) MEM_MB_DQS4_N(4) MEM_MB_DQS5_N(4) MEM_MB_DQS6_N(4) MEM_MB_DQS7_N(4)
MEM_MB_CLK1_P(4) MEM_MB_CLK1_N(4) MEM_MB_CLK7_P(4) MEM_MB_CLK7_N(4)
MEM_MB_CKE0(4,7) MEM_MB_CKE1(4,7)
MEM_MB_RAS#(4,7) MEM_MB_CAS#(4,7)
MEM_MB_WE#(4,7) MEM_MB0_CS#0(4,7) MEM_MB0_CS#1(4,7)
MEM_MB0_ODT0(4,7) MEM_MB0_ODT1(4,7)
+3.3V
C230
C230
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
+0.9VSMVREF_DIMM
C232
C232
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+1.8V_SUS
R148
R148 1K/F_4
1K/F_4
R147
R147 1K/F_4
1K/F_4
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8
MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
DIM2_SA0MEM_MA_RESET#1 DIM2_SA1
PDAT_SMB PCLK_SMB
C435
C435
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C231
C231 1000P/50V_4
1000P/50V_4C226
102 101 100
99 98 97 94 92 93 91
105
90 89
116
86 84
107 106
85 10
26 52
67 130 147 170 185
13
31
51
70 131 148 169 188
11
29
49
68 129 146 167 186
30
32 164 166
79
80 108
113 109 110 115
114 119
198 200
195 197
199
1 2
o
3 8
9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54
DIM2_SA0 DIM2_SA1
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
BA0 BA1 BA2
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
CK0 CK0 CK1 CK1
CKE0 CKE1
RAS CAS WE S0 S1
ODT0 ODT1
SA0 SA1
SDA SCL
VDDspd VREF VSS0
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20
SMbus address A2
3
2
103
111
104
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
59
R295 10K/F_4R295 10K/F_4 R293 10K/F_4R293 10K/F_4
VDD8
VDD7
SO-DIMM
SO-DIMM
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
121
2
112
117
118
CN21
CN21
MEM_MB_DATA4
5
DQ0
MEM_MB_DATA5
7
DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
NC1 NC2 NC3 NC4
MEM_MB_DATA2
17
MEM_MB_DATA3
19
MEM_MB_DATA0
4
MEM_MB_DATA1
6
MEM_MB_DATA6
14
MEM_MB_DATA7
16
MEM_MB_DATA13
23
MEM_MB_DATA12
25
MEM_MB_DATA11
35
MEM_MB_DATA10
37
MEM_MB_DATA8
20
MEM_MB_DATA9
22
MEM_MB_DATA14
36
MEM_MB_DATA15
38
MEM_MB_DATA16
43
MEM_MB_DATA17
45
MEM_MB_DATA18
55
MEM_MB_DATA19
57
MEM_MB_DATA20
44
MEM_MB_DATA21
46
MEM_MB_DATA22
56
MEM_MB_DATA23
58
MEM_MB_DATA24
61
MEM_MB_DATA25
63
MEM_MB_DATA26
73
MEM_MB_DATA27
75
MEM_MB_DATA28
62
MEM_MB_DATA29
64
MEM_MB_DATA30
74
MEM_MB_DATA31
76
MEM_MB_DATA37
123
MEM_MB_DATA36
125
MEM_MB_DATA34
135
MEM_MB_DATA35
137
MEM_MB_DATA33
124
MEM_MB_DATA32
126
MEM_MB_DATA38
134
MEM_MB_DATA39
136
MEM_MB_DATA40
141
MEM_MB_DATA45
143
MEM_MB_DATA47
151
MEM_MB_DATA46
153
MEM_MB_DATA44
140
MEM_MB_DATA41
142
MEM_MB_DATA43
152
MEM_MB_DATA42
154
MEM_MB_DATA52
157
MEM_MB_DATA53
159
MEM_MB_DATA50
173
MEM_MB_DATA51
175
MEM_MB_DATA48
158
MEM_MB_DATA49
160
MEM_MB_DATA54
174
MEM_MB_DATA55
176
MEM_MB_DATA56
179
MEM_MB_DATA60
181
MEM_MB_DATA58
189
MEM_MB_DATA59
191
MEM_MB_DATA61
180
MEM_MB_DATA57
182
MEM_MB_DATA62
192
MEM_MB_DATA63
194
MEMHOT_SODIMM#_2
50
MEM_MB_RESET#2
69 83 120
MEM_MB_NC5
163
196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133
NB2/RD1
NB2/RD1
NB2/RD1
VDD9
VDD10
VDD11
NC/TEST
VSS56
(REVERSE)
(REVERSE)
VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34
VSS33
VSS32
VSS31
VSS30
DDR SO-DIMM SOCKET 1.8V
DDR SO-DIMM SOCKET 1.8V
132
128
127
122
H=8
+3.3V
1
R100 0_4R100 0_4 T18T18
T1T1
PROJECT : AJ6
PROJECT : AJ6
PROJECT : AJ6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
DDR2 SODIMMS: A/B CHANNEL
DDR2 SODIMMS: A/B CHANNEL
DDR2 SODIMMS: A/B CHANNEL
Date: Sheet
Date: Sheet
Date: Sheet
MEMHOT_SODIMM#
1
639Monday, August 18, 2008
639Monday, August 18, 2008
639Monday, August 18, 2008
of
of
of
1A
1A
1A
5
4
3
2
1
4 2 4 2 2 4 2 4 4 2 4 2 4 2 4 2
4 2 4 2
4 2
2 4
4 2
4 2
MEM_MA_ADD[0..15] MEM_MA_BANK[0..2]
+0.9VSMVTT
3 1 3 1 1 3 1 3 3 1 3 1 3 1 3 1
3 1 3 1
3 1
1 3
3 1
3 1
C126 0.1U/10V/X5R_4C126 0.1U/10V/X5R_4 C154 0.1U/10V/X5R_4C154 0.1U/10V/X5R_4 C84 0.1U/10V/X5R_4C84 0.1U/10V/X5R_4 C130 0.1U/10V/X5R_4C130 0.1U/10V/X5R_4 C99 0.1U/10V/X5R_4C99 0.1U/10V/X5R_4 C44 0.1U/10V/X5R_4C44 0.1U/10V/X5R_4 C90 0.1U/10V/X5R_4C90 0.1U/10V/X5R_4 C97 0.1U/10V/X5R_4C97 0.1U/10V/X5R_4
C93 0.1U/10V/X5R_4C93 0.1U/10V/X5R_4 C47 0.1U/10V/X5R_4C47 0.1U/10V/X5R_4 C111 0.1U/10V/X5R_4C111 0.1U/10V/X5R_4 C117 0.1U/10V/X5R_4C117 0.1U/10V/X5R_4
C74 0.1U/10V/X5R_4C74 0.1U/10V/X5R_4 C48 0.1U/10V/X5R_4C48 0.1U/10V/X5R_4 C88 0.1U/10V/X5R_4C88 0.1U/10V/X5R_4 C109 0.1U/10V/X5R_4C109 0.1U/10V/X5R_4
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
MEM_MB_ADD[0..15](4,6) MEM_MB_BANK[0..2](4,6)
MEM_MB_CKE0(4,6)
MEM_MB_WE#(4,6) MEM_MB_CAS#(4,6) MEM_MB0_ODT1(4,6) MEM_MB0_CS#1(4,6) MEM_MB_CKE1(4,6)
MEM_MB0_CS#0(4,6)MEM_MA0_CS#0(4,6) MEM_MB_RAS#(4,6)
MEM_MB0_ODT0(4,6)
MEM_MB_CKE0 MEM_MB_BANK2 MEM_MB_ADD12 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD5 MEM_MB_ADD3 MEM_MB_ADD1 MEM_MB_ADD10 MEM_MB_BANK0 MEM_MB_WE# MEM_MB_CAS# MEM_MB0_ODT1 MEM_MB0_CS#1 MEM_MB_CKE1 MEM_MB_ADD15
MEM_MB_ADD7 MEM_MB_ADD14
MEM_MB_ADD6 MEM_MB_ADD11
MEM_MB_ADD2 MEM_MB_ADD4
MEM_MB_BANK1 MEM_MB_ADD0
MEM_MB0_CS#0 MEM_MB_RAS#
MEM_MB0_ODT0 MEM_MB_ADD13
+1.8V_SUS
MEM_MA_ADD[0..15](4,6) MEM_MA_BANK[0..2](4,6)
D D
C C
MEM_MA_CKE0(4,6)
MEM_MA_WE#(4,6) MEM_MA_CAS#(4,6) MEM_MA0_ODT1(4,6) MEM_MA0_CS#1(4,6)
MEM_MA_CKE1(4,6)
MEM_MA_RAS#(4,6)
MEM_MA0_ODT0(4,6)
MEM_MA_CKE0 MEM_MA_BANK2 MEM_MA_ADD12 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD5 MEM_MA_ADD3 MEM_MA_ADD1 MEM_MA_ADD10 MEM_MA_BANK0 MEM_MA_WE# MEM_MA_CAS# MEM_MA0_ODT1 MEM_MA0_CS#1 MEM_MA_ADD15 MEM_MA_CKE1
MEM_MA_ADD7 MEM_MA_ADD14 MEM_MA_ADD6 MEM_MA_ADD11
MEM_MA_ADD2 MEM_MA_ADD4
MEM_MA_BANK1 MEM_MA_ADD0
MEM_MA0_CS#0 MEM_MA_RAS#
MEM_MA_ADD13 MEM_MA0_ODT0
+1.8V_SUS
RP35 47_4P2R_4RP35 47_4P2R_4 RP32 47_4P2R_4RP32 47_4P2R_4 RP27 47_4P2R_4RP27 47_4P2R_4 RP23 47_4P2R_4RP23 47_4P2R_4 RP17 47_4P2R_4RP17 47_4P2R_4 RP14 47_4P2R_4RP14 47_4P2R_4 RP9 47_4P2R_4RP9 47_4P2R_4 RP34 47_4P2R_4RP34 47_4P2R_4
RP30 47_4P2R_4RP30 47_4P2R_4 RP26 47_4P2R_4RP26 47_4P2R_4
RP21 47_4P2R_4RP21 47_4P2R_4
RP19 47_4P2R_4RP19 47_4P2R_4
RP12 47_4P2R_4RP12 47_4P2R_4
RP10 47_4P2R_4RP10 47_4P2R_4
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
MEM_MB_ADD[0..15] MEM_MB_BANK[0..2]
+0.9VSMVTT
RP31 47_4P2R_4RP31 47_4P2R_4
4
3
2
RP28 47_4P2R_4RP28 47_4P2R_4 RP24 47_4P2R_4RP24 47_4P2R_4 RP22 47_4P2R_4RP22 47_4P2R_4 RP16 47_4P2R_4RP16 47_4P2R_4 RP13 47_4P2R_4RP13 47_4P2R_4 RP8 47_4P2R_4RP8 47_4P2R_4 RP33 47_4P2R_4RP33 47_4P2R_4
RP29 47_4P2R_4RP29 47_4P2R_4
RP25 47_4P2R_4RP25 47_4P2R_4
RP20 47_4P2R_4RP20 47_4P2R_4
RP18 47_4P2R_4RP18 47_4P2R_4
RP15 47_4P2R_4RP15 47_4P2R_4
RP11 47_4P2R_4RP11 47_4P2R_4
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
1
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
C103 0.1U/10V/X5R_4C103 0.1U/10V/X5R_4 C121 0.1U/10V/X5R_4C121 0.1U/10V/X5R_4 C66 0.1U/10V/X5R_4C66 0.1U/10V/X5R_4 C95 0.1U/10V/X5R_4C95 0.1U/10V/X5R_4 C52 0.1U/10V/X5R_4C52 0.1U/10V/X5R_4 C79 0.1U/10V/X5R_4C79 0.1U/10V/X5R_4 C76 0.1U/10V/X5R_4C76 0.1U/10V/X5R_4 C69 0.1U/10V/X5R_4C69 0.1U/10V/X5R_4 C113 0.1U/10V/X5R_4C113 0.1U/10V/X5R_4 C151 0.1U/10V/X5R_4C151 0.1U/10V/X5R_4 C153 0.1U/10V/X5R_4C153 0.1U/10V/X5R_4 C155 0.1U/10V/X5R_4C155 0.1U/10V/X5R_4 C45 0.1U/10V/X5R_4C45 0.1U/10V/X5R_4
C152 0.1U/10V/X5R_4C152 0.1U/10V/X5R_4 C127 0.1U/10V/X5R_4C127 0.1U/10V/X5R_4 C157 0.1U/10V/X5R_4C157 0.1U/10V/X5R_4
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
C54
C54
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C60
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C75
C75
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C61
C61
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C167
C167
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C92
C92
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C143
C143
0.1U/10V/X5R_4
0.1U/10V/X5R_4
PLACE CLOSE TO SOCKET( PER EMI/EMC)
B B
+3.3V
+3.3V
R289
R289 *10K/F_4
*10K/F_4
Close DDR2 socket
+VS
O.S
GND
+3.3V
C434 0.1U/10V/X5R_4C434 0.1U/10V/X5R_4
8
MEMHOT_SODIMM#
3
4
Address:92h
4
2
Q32
Q32
*2N7002E-G
*2N7002E-G
MEMHOT_SODIMM# (6)
R286 *33_4R286 *33_4
3
1
*2N7002E-G
*2N7002E-G
U17
U17
7
A0
+3.3V
+3.3V
PDAT_SMB PCLK_SMB
PDAT_SMB(2,6,13) PCLK_SMB(2,6,13)
A A
5
6
A1
5
A2
1
SDA
2
SCL
*DS75U+T&R
*DS75U+T&R
R292 10K/F_4R292 10K/F_4
MEMHOT_SODIMM#
Q31
Q31
R285
R285 *10K/F_4
*10K/F_4
3
2
1
3
CPU_MEMHOT# (3,13)
C80
C80
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C145
C145
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C164
C164
0.1U/10V/X5R_4
0.1U/10V/X5R_4
PLACE CLOSE TO SOCKET( PER EMI/EMC)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
2
Custom Date: Sheet of
Date: Sheet of
Date: Sheet
C46
C55
C55
0.1U/10V/X5R_4
0.1U/10V/X5R_4
PROJECT : AJ6
PROJECT : AJ6
PROJECT : AJ6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
DDR2 SODIMMS TERMINATIONS
DDR2 SODIMMS TERMINATIONS
DDR2 SODIMMS TERMINATIONS
C46
0.1U/10V/X5R_4
0.1U/10V/X5R_4
1
of
739Monday, August 18, 2008
739Monday, August 18, 2008
739Monday, August 18, 2008
1A
1A
1A
C60
5
HT_CPU_NB_CAD_H0 HT_CPU_NB_CAD_L0 HT_CPU_NB_CAD_H1 HT_CPU_NB_CAD_L1 HT_CPU_NB_CAD_H2 HT_CPU_NB_CAD_L2 HT_CPU_NB_CAD_H3 HT_CPU_NB_CAD_L3 HT_CPU_NB_CAD_H4 HT_CPU_NB_CAD_L4 HT_CPU_NB_CAD_H5 HT_CPU_NB_CAD_L5
D D
C C
HT_CPU_NB_CAD_H6 HT_CPU_NB_CAD_L6 HT_CPU_NB_CAD_H7 HT_CPU_NB_CAD_L7
HT_CPU_NB_CAD_H8 HT_CPU_NB_CAD_L8 HT_CPU_NB_CAD_H9 HT_CPU_NB_CAD_L9 HT_CPU_NB_CAD_H10 HT_CPU_NB_CAD_L10 HT_CPU_NB_CAD_H11 HT_CPU_NB_CAD_L11 HT_CPU_NB_CAD_H12 HT_CPU_NB_CAD_L12 HT_CPU_NB_CAD_H13 HT_CPU_NB_CAD_L13 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H15 HT_CPU_NB_CAD_L15
HT_CPU_NB_CLK_H0 HT_CPU_NB_CLK_L0 HT_CPU_NB_CLK_H1 HT_CPU_NB_CLK_L1
HT_CPU_NB_CTL_H0 HT_CPU_NB_CTL_L0 HT_CPU_NB_CTL_H1 HT_CPU_NB_CTL_L1
HT_RXCALP HT_RXCALN
4
Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25
AC24 AC25 AB25 AB24 AA24 AA25
Y22
Y23 W21 W20
V21
V20
U20
U21
U19
U18
T22
T23
AB23 AA22
M22 M23
R21
R20
C23
A24
U19A
U19A
HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N
HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N
HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N
HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N
HT_RXCALP HT_RXCALN
RS780(RX780)
RS780(RX780)
3
HT_NB_CPU_CAD_H0
PART 1 OF 6
PART 1 OF 6
HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N
HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P
HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
D24
HT_NB_CPU_CAD_L0
D25
HT_NB_CPU_CAD_H1
E24
HT_NB_CPU_CAD_L1
E25
HT_NB_CPU_CAD_H2
F24
HT_NB_CPU_CAD_L2
F25
HT_NB_CPU_CAD_H3
F23
HT_NB_CPU_CAD_L3
F22
HT_NB_CPU_CAD_H4
H23
HT_NB_CPU_CAD_L4
H22
HT_NB_CPU_CAD_H5
J25
HT_NB_CPU_CAD_L5
J24
HT_NB_CPU_CAD_H6
K24
HT_NB_CPU_CAD_L6
K25
HT_NB_CPU_CAD_H7
K23
HT_NB_CPU_CAD_L7
K22
HT_NB_CPU_CAD_H8
F21
HT_NB_CPU_CAD_L8
G21
HT_NB_CPU_CAD_H9
G20
HT_NB_CPU_CAD_L9
H21
HT_NB_CPU_CAD_H10
J20
HT_NB_CPU_CAD_L10
J21
HT_NB_CPU_CAD_H11
J18
HT_NB_CPU_CAD_L11
K17
HT_NB_CPU_CAD_H12
L19
HT_NB_CPU_CAD_L12
J19
HT_NB_CPU_CAD_H13
M19
HT_NB_CPU_CAD_L13
L18
HT_NB_CPU_CAD_H14
M21
HT_NB_CPU_CAD_L14
P21
HT_NB_CPU_CAD_H15
P18
HT_NB_CPU_CAD_L15
M18
HT_NB_CPU_CLK_H0
H24
HT_NB_CPU_CLK_L0
H25
HT_NB_CPU_CLK_H1
L21
HT_NB_CPU_CLK_L1
L20
HT_NB_CPU_CTL_H0
M24
HT_NB_CPU_CTL_L0
M25
HT_NB_CPU_CTL_H1
P19
HT_NB_CPU_CTL_L1
R18
HT_TXCALP
B24
HT_TXCALN
B25
2
HT_CPU_NB_CAD_H[15..0] HT_CPU_NB_CAD_L[15..0] HT_CPU_NB_CLK_H[1..0] HT_CPU_NB_CLK_L[1..0] HT_CPU_NB_CTL_H[1..0] HT_CPU_NB_CTL_L[1..0] HT_NB_CPU_CAD_H[15..0] HT_NB_CPU_CAD_L[15..0] HT_NB_CPU_CLK_H[1..0] HT_NB_CPU_CLK_L[1..0] HT_NB_CPU_CTL_H[1..0] HT_NB_CPU_CTL_L[1..0]
signals
HT_TXCALP
HT_TXCALN
HT_RXCALP
HT_RXCALN
R641R655
R310 300/F_4R310 300/F_4R307 300/F_4R307 300/F_4
HT_CPU_NB_CAD_H[15..0] (3)
HT_CPU_NB_CAD_L[15..0] (3)
HT_CPU_NB_CLK_H[1..0] (3)
HT_CPU_NB_CLK_L[1..0] (3)
HT_CPU_NB_CTL_H[1..0] (3)
HT_CPU_NB_CTL_L[1..0] (3)
HT_NB_CPU_CAD_H[15..0] (3)
HT_NB_CPU_CAD_L[15..0] (3)
HT_NB_CPU_CLK_H[1..0] (3)
HT_NB_CPU_CLK_L[1..0] (3)
HT_NB_CPU_CTL_H[1..0] (3)
HT_NB_CPU_CTL_L[1..0] (3)
RS780 RX780
R641 300 ohm 1%
R655 300 ohm 1%
R641
1.21k ohm 1%
R655
1.21k ohm 1%
RES CHIP 1.21K 1/16W +-1%(0402) P/N : CS21212FB18
RES CHIP 300 1/16W +-1%(0402) P/N : CS13002FB00
1
This block is for UMA RS780 only , RX780 NC
U19D
U19D
AB12
MEM_A0(NC)
AE16
MEM_A1(NC)
V11
MEM_A2(NC)
AE15
MEM_A3(NC)
AA12
MEM_A4(NC)
AB16
MEM_A5(NC)
AB14
MEM_A6(NC)
AD14
MEM_A7(NC)
B B
A A
5
4
AD13
MEM_A8(NC)
AD15
MEM_A9(NC)
AC16
MEM_A10(NC)
AE13
MEM_A11(NC)
AC14
MEM_A12(NC)
Y14
MEM_A13(NC)
AD16
MEM_BA0(NC)
AE17
MEM_BA1(NC)
AD17
MEM_BA2(NC)
W12
MEM_RASb(NC)
Y12
MEM_CASb(NC)
AD18
MEM_WEb(NC)
AB13
MEM_CSb(NC)
AB18
MEM_CKE(NC)
V14
MEM_ODT(NC)
V15
MEM_CKP(NC)
W14
MEM_CKN(NC)
AE12
MEM_COMPP(NC)
AD12
MEM_COMPN(NC)
RS780(RX780)
RS780(RX780)
3
PAR 4 OF 6
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC) MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
IOPLLVDD18(NC)
IOPLLVDD(NC) IOPLLVSS(NC)
MEM_VREF(NC)
AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21
Y17 W18 AD20 AE21
W17 AE19
AE23 AE24
AD23 AE18
2
+1.8V
+1.1V
PROJECT : AJ6
PROJECT : AJ6
PROJECT : AJ6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
RS780MN-HT LINK I/F 1/4
RS780MN-HT LINK I/F 1/4
RS780MN-HT LINK I/F 1/4
Date: Sheet of
Date: Sheet of
Date: Sheet
1
of
839Monday, August 18, 2008
839Monday, August 18, 2008
839Monday, August 18, 2008
1A
1A
1A
5
4
3
2
1
to solve the HDMI issue . 7/10
U19B
PEG_RXP0 PEG_RXN0 PEG_RXP1 PEG_RXN1 PEG_RXP2
D D
PCIE_RXP_LAN(21)
C C
PCIE_RXN_LAN(21)
PCIE_SB_NB_RX0P(12) PCIE_SB_NB_RX0N(12) PCIE_SB_NB_RX1P(12) PCIE_SB_NB_RX1N(12) PCIE_SB_NB_RX2P(12) PCIE_SB_NB_RX2N(12) PCIE_SB_NB_RX3P(12) PCIE_SB_NB_RX3N(12)
PEG_RXN2 PEG_RXP3 PEG_RXN3 PEG_RXP4 PEG_RXN4 PEG_RXP5 PEG_RXN5 PEG_RXP6 PEG_RXN6 PEG_RXP7 PEG_RXN7 PEG_RXP8 PEG_RXN8 PEG_RXP9 PEG_RXN9 PEG_RXP10 PEG_RXN10 PEG_RXP11 PEG_RXN11 PEG_RXP12 PEG_RXN12 PEG_RXP13 PEG_RXN13 PEG_RXP14 PEG_RXN14 PEG_RXP15 PEG_RXN15
PCIE_RXP_LAN PCIE_RXN_LAN
PCIE_RXP1(25) PCIE_RXN1(25) PCIE_RXP2(25) PCIE_RXN2(25) PCIE_RXP3(30) PCIE_RXN3(30)
T13T13 T14T14 T11T11 T12T12
PCIE_RXP1 PCIE_RXN1 PCIE_RXP2 PCIE_RXN2 PCIE_RXP3 PCIE_RXN3 PCIE_RXP4 PCIE_RXN4 PCIE_RXP5 PCIE_RXN5
U19B
D4
GFX_RX0P
C4
GFX_RX0N
A3
GFX_RX1P
B3
GFX_RX1N
C2
GFX_RX2P
C1
GFX_RX2N
E5
GFX_RX3P
F5
GFX_RX3N
G5
GFX_RX4P
G6
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N
M8
GFX_RX9P
L8
GFX_RX9N
P7
GFX_RX10P
M7
GFX_RX10N
P5
GFX_RX11P
M5
GFX_RX11N
R8
GFX_RX12P
P8
GFX_RX12N
R6
GFX_RX13P
R5
GFX_RX13N
P4
GFX_RX14P
P3
GFX_RX14N
T4
GFX_RX15P
T3
GFX_RX15N
AE3
GPP_RX0P
AD4
GPP_RX0N
AE2
GPP_RX1P
AD3
GPP_RX1N
AD1
GPP_RX2P
AD2
GPP_RX2N
V5
GPP_RX3P
W6
GPP_RX3N
U5
GPP_RX4P
U6
GPP_RX4N
U8
GPP_RX5P
U7
GPP_RX5N
AA8
SB_RX0P
Y8
SB_RX0N
AA7
SB_RX1P
Y7
SB_RX1N
AA5
SB_RX2P
AA6
SB_RX2N
W5
SB_RX3P
Y5
SB_RX3N
RS780(RX780)
RS780(RX780)
PART 2 OF 6
PART 2 OF 6
GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N
PCIE I/F GFX
PCIE I/F GFX
GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N
SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N
A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2
AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2
AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5
AC8 AB8
C_PEG_TX0 C_PEG_TX#0 C_PEG_TX1 C_PEG_TX#1 C_PEG_TX2 C_PEG_TX#2 C_PEG_TX3 C_PEG_TX#3 C_PEG_TX4 C_PEG_TX#4 C_PEG_TX5 C_PEG_TX#5 C_PEG_TX6 C_PEG_TX#6 C_PEG_TX7 C_PEG_TX#7 C_PEG_TX8 C_PEG_TX#8 C_PEG_TX9 C_PEG_TX#9 C_PEG_TX10 C_PEG_TX#10 C_PEG_TX11 C_PEG_TX#11
C_PEG_TX#12 C_PEG_TX13 C_PEG_TX#13 C_PEG_TX14
C_PEG_TX15 C_PEG_TX#15
PCIE_TXP0_C PCIE_TXN0_C PCIE_TXP1_C PCIE_TXN1_C PCIE_TXP2_C PCIE_TXN2_C PCIE_TXP3_C PCIE_TXN3_C PCIE_TXP4_C PCIE_TXN4_C PCIE_TXP5_C PCIE_TXN5_C
A_TX0P_CA_TX0P_C A_TX0N_CA_TX0N_C A_TX1P_CA_TX1P_C A_TX1N_CA_TX1N_C A_TX2P_C A_TX2N_C A_TX3P_C A_TX3N_C
NB_PCIECALRP NB_PCIECALRN
R45 E@0_4R45 E@0_4 R51 E@0_4R51 E@0_4 R64 E@0_4R64 E@0_4 R65 E@0_4R65 E@0_4 R68 E@0_4R68 E@0_4 R69 E@0_4R69 E@0_4
R73 E@0_4R73 E@0_4 C253 E@0.1U/16V/X7R_4C253 E@0.1U/16V/X7R_4 C252 E@0.1U/16V/X7R_4C252 E@0.1U/16V/X7R_4 C251 E@0.1U/16V/X7R_4C251 E@0.1U/16V/X7R_4 C250 E@0.1U/16V/X7R_4C250 E@0.1U/16V/X7R_4 C249 E@0.1U/16V/X7R_4C249 E@0.1U/16V/X7R_4 C248 E@0.1U/16V/X7R_4C248 E@0.1U/16V/X7R_4 C275 E@0.1U/16V/X7R_4C275 E@0.1U/16V/X7R_4 C274 E@0.1U/16V/X7R_4C274 E@0.1U/16V/X7R_4 C244 E@0.1U/16V/X7R_4C244 E@0.1U/16V/X7R_4 C243 E@0.1U/16V/X7R_4C243 E@0.1U/16V/X7R_4 C273 E@0.1U/16V/X7R_4C273 E@0.1U/16V/X7R_4 C272 E@0.1U/16V/X7R_4C272 E@0.1U/16V/X7R_4 C242 E@0.1U/16V/X7R_4C242 E@0.1U/16V/X7R_4 C241 E@0.1U/16V/X7R_4C241 E@0.1U/16V/X7R_4 C271 E@0.1U/16V/X7R_4C271 E@0.1U/16V/X7R_4 C270 E@0.1U/16V/X7R_4C270 E@0.1U/16V/X7R_4 C246 E@0.1U/16V/X7R_4C246 E@0.1U/16V/X7R_4 C245 E@0.1U/16V/X7R_4C245 E@0.1U/16V/X7R_4 C269 E@0.1U/16V/X7R_4C269 E@0.1U/16V/X7R_4 C268 E@0.1U/16V/X7R_4C268 E@0.1U/16V/X7R_4 C256 E@0.1U/16V/X7R_4C256 E@0.1U/16V/X7R_4 C255 E@0.1U/16V/X7R_4C255 E@0.1U/16V/X7R_4 C267 E@0.1U/16V/X7R_4C267 E@0.1U/16V/X7R_4 C266 E@0.1U/16V/X7R_4C266 E@0.1U/16V/X7R_4
C463 0.1U/10V/X5R_4C463 0.1U/10V/X5R_4 C462 0.1U/10V/X5R_4C462 0.1U/10V/X5R_4 C465 0.1U/10V/X5R_4C465 0.1U/10V/X5R_4 C464 0.1U/10V/X5R_4C464 0.1U/10V/X5R_4 C467 0.1U/10V/X5R_4C467 0.1U/10V/X5R_4 C466 0.1U/10V/X5R_4C466 0.1U/10V/X5R_4 C468 0.1U/10V/X5R_4C468 0.1U/10V/X5R_4 C469 0.1U/10V/X5R_4C469 0.1U/10V/X5R_4
T10T10 T100T100 T101T101 T102T102
C451 0.1U/10V/X5R_4C451 0.1U/10V/X5R_4 C452 0.1U/10V/X5R_4C452 0.1U/10V/X5R_4 C455 0.1U/10V/X5R_4C455 0.1U/10V/X5R_4 C456 0.1U/10V/X5R_4C456 0.1U/10V/X5R_4 C453 0.1U/10V/X5R_4C453 0.1U/10V/X5R_4 C454 0.1U/10V/X5R_4C454 0.1U/10V/X5R_4 C458 0.1U/10V/X5R_4C458 0.1U/10V/X5R_4 C457 0.1U/10V/X5R_4C457 0.1U/10V/X5R_4
R305 1.27K/F_4R305 1.27K/F_4 R304 2K/F_4R304 2K/F_4
C_PEG_TX0_H C_PEG_TX#0_H C_PEG_TX1_H C_PEG_TX#1_H C_PEG_TX2_H C_PEG_TX#2_H C_PEG_TX3_H C_PEG_TX#3_H
PEG_TXP4 PEG_TXN4 PEG_TXP5 PEG_TXN5 PEG_TXP6 PEG_TXN6 PEG_TXP7 PEG_TXN7 PEG_TXP8 PEG_TXN8 PEG_TXP9 PEG_TXN9 PEG_TXP10 PEG_TXN10 PEG_TXP11 PEG_TXN11 PEG_TXP12C_PEG_TX12 PEG_TXN12 PEG_TXP13 PEG_TXN13 PEG_TXP14 PEG_TXN14C_PEG_TX#14 PEG_TXP15 PEG_TXN15
PCIE_TXP_LAN (21) PCIE_TXN_LAN (21)
PCIE_TXP1 (25) PCIE_TXN1 (25) PCIE_TXP2 (25) PCIE_TXN2 (25) PCIE_TXP3 (30) PCIE_TXN3 (30)
PCIE_NB_SB_TX0P (12) PCIE_NB_SB_TX0N (12) PCIE_NB_SB_TX1P (12) PCIE_NB_SB_TX1N (12) PCIE_NB_SB_TX2P (12) PCIE_NB_SB_TX2N (12) PCIE_NB_SB_TX3P (12) PCIE_NB_SB_TX3N (12)
C260 E@0.1U/16V/X7R_4C260 E@0.1U/16V/X7R_4 C259 E@0.1U/16V/X7R_4C259 E@0.1U/16V/X7R_4 C265 E@0.1U/16V/X7R_4C265 E@0.1U/16V/X7R_4 C264 E@0.1U/16V/X7R_4C264 E@0.1U/16V/X7R_4 C258 E@0.1U/16V/X7R_4C258 E@0.1U/16V/X7R_4 C257 E@0.1U/16V/X7R_4C257 E@0.1U/16V/X7R_4 C277 E@0.1U/16V/X7R_4C277 E@0.1U/16V/X7R_4R72 E@0_4R72 E@0_4 C263 E@0.1U/16V/X7R_4C263 E@0.1U/16V/X7R_4
TO PCIE-LAN
TO WLAN TO EPRESS CARD
TO PCIE CARD READER
+1.1V
PEG_RXN[15:0](17) PEG_RXP[15:0](17)
PEG_TXP0 PEG_TXN0 PEG_TXP1 PEG_TXN1 PEG_TXP2 PEG_TXN2 PEG_TXP3 PEG_TXN3
PEG_RXN[15:0] PEG_TXN[15:0]
PEG_TXP[15:0]PEG_RXP[15:0]
Close to North Bridge
C_PEG_TX0 C_PEG_TX#0
C_PEG_TX1 C_PEG_TX#1
C_PEG_TX2 C_PEG_TX#2
C_PEG_TX3 C_PEG_TX#3
C_PEG_TX0 (18) C_PEG_TX#0 (18)
C_PEG_TX1 (18) C_PEG_TX#1 (18)
C_PEG_TX2 (18) C_PEG_TX#2 (18)
C_PEG_TX3 (18) C_PEG_TX#3 (18)
To HDMI CONN
PEG_TXN[15:0] (17) PEG_TXP[15:0] (17)
RS780
RX780/RS740/RS780 difference table (PCIE LINK)
B B
A A
NB_PCIECALRP
GPP4
GPP5
5
RX780/RS780
1.27K (GND)
GPP4
GPP5
4
RS780 Display Port Support (muxed on GFX)
DP0
DP1
GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1
PROJECT : AJ6
PROJECT : AJ6
PROJECT : AJ6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
RS780MN-PCIE I/F 2/4
RS780MN-PCIE I/F 2/4
NB2/RD1
NB2/RD1
3
2
NB2/RD1
RS780MN-PCIE I/F 2/4
Date: Sheet
Date: Sheet
Date: Sheet
1
939Thursday, August 21, 2008
939Thursday, August 21, 2008
939Thursday, August 21, 2008
3A
3A
3A
of
of
of
5
NB_PLTRST#(12)
RS780
R119 0_4R119 0_4
North Bridge RESET
NB_RST#_IN
C186
C186 *1000P/16V/X7R_4
*1000P/16V/X7R_4
NB_PWRGD_IN
C484
C484 *1000P/16V/X7R_4
*1000P/16V/X7R_4
ESD recommend
D D
+3.3V +3.3V
R115 E@0_4R115 E@0_4
R114
R114
E@4.7K_4
E@4.7K_4
HDTV_DET
D8 E@CH501H-40PTD8 E@CH501H-40PT
Q15
Q15
*2N7002E
*2N7002E
1
D9
D9
*E@CH501H-40PT
*E@CH501H-40PT
DEL D9 , for AMD recommend. 8/20
C C
R315 *4.7K_4R315 *4.7K_4
+3.3V
R312 4.7K_4R312 4.7K_4 R313 4.7K_4R313 4.7K_4
R120
R120 *10K_4
*10K_4
3
2
R98
R98 *I@10K_4
*I@10K_4
HDTV_DET NB_I2C_DATA NB_I2C_CLK
PX_EN (12)
PX_LVDS_SWITCH (19,20)
INT_LVDS_PNDAT(19) INT_LVDS_PNLCLK(19)
HDMI_DDC_CLK(18) HDMI_DDC_DATA(18)
4
ESD recommend
PX_LVDS_SWITCH(19,20)
INT_CRT_RED(20) INT_CRT_GRN(20) INT_CRT_BLU(20)
INT_HSYNC(20)
INT_VSYNC(20) INT_CRT_DDCDAT(20) INT_CRT_DDCCLK(20)
NB_PWRGD_IN(16,19)
NBHT_REFCLKP(2)
NBHT_REFCLKN(2)
EXT_NB_OSC(2)
+1.1V
NBGFX_CLKP(2) NBGFX_CLKN(2) NBGPP_CLKP(2) NBGPP_CLKN(2) SBLINK_CLKP(2)
SBLINK_CLKN(2)
R113 4.7K_4R113 4.7K_4
R318 0_4R318 0_4 R319 0_4R319 0_4
R308 0_4R308 0_4 R311 0_4R311 0_4
R97 *0_4R97 *0_4
R104 0_4R104 0_4 R103 150/F_4R103 150/F_4 R106 0_4R106 0_4 R105 150/F_4R105 150/F_4 R108 0_4R108 0_4 R107 150/F_4R107 150/F_4
R332 0_4R332 0_4 R331 0_4R331 0_4 R124 0_4R124 0_4 R125 0_4R125 0_4
R127 715/F_6R127 715/F_6
R112 4.7K_4R112 4.7K_4
DYN_PWR_EN(33)
+3V_AVDD_NB +1.8V_AVDDDI_NB +1.8V_AVDDQ_NB
DAC_RSET_NBDAC_RSET_NB +1.1V_PLLVDD
+1.8V_PLLVDD18
+1.8V_VDDA18HTPLL +1.8V_VDDA18PCIEPLL
NB_RST#_IN NB_PWRGD_IN NB_LDT_STOP# NB_ALLOW_LDTSTOP
NBHT_REFCLKP NBHT_REFCLKN
R93 0_4R93 0_4 R102 0_4R102 0_4
NBGFX_CLKP NBGFX_CLKN
NBGPP_CLKP NBGPP_CLKN
SBLINK_CLKP SBLINK_CLKN
T21T21 T109T109
R321 0_4R321 0_4
T107T107
CRT_R_1 CRT_G_1 CRT_B_1
HSYNC_INT VSYNC_INT DDCDATA_INT DDCCLK_INT
NB_REFCLK_P NB_REFCLK_N
NB_I2C_DATANB_I2C_DATA NB_I2C_CLKNB_I2C_CLK HDTV_DET
RS780_AUX_CAL
STRP_DATA
3
U19C
U19C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5)
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT_GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT_GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DAC_VSYNC(PWM_GPIO6)
E8
DAC_SDA(PCE_TCALRN)
F8
DAC_SCL(PCE_RCALRN)
G14
DAC_RSET(PWM_GPIO1)
A12
PLLVDD(NC)
D14
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN(OSCIN)
F11
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
A9
I2C_DATA
B9
I2C_CLK
B8
DDC_DATA/AUX0N(NC)
A8
DDC_CLK/AUX0P(NC)
B7
AUX1P(NC)
A7
AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL(NC)
RS780(RX780)
RS780(RX780)
I/O
I/O
PART 3 OF 6
PART 3 OF 6
TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
CRT/TVOUT
TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)
LVTM
LVTM
PM
PM
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U0P(NC) TXOUT_U0N(NC)
TXOUT_U2P(NC) TXOUT_U2N(NC)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3)
VDDLTP18(NC)
VSSLTP18(NC)
VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)
VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)
TMDS_HPD(NC)
HPD(NC)
TVCLKIN(PWM_GPIO5)
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
2
A22 B22 A21 B21 B20 A20 A19 B19
B18 A18 A17 B17 D20 D21 D18 D19
B16 A16 D16 D17
A13 B13
A15 B15 A14 B14
C14 D15 C16 C18 C20 E20 C22
E9 F7 G12
D9 D10
D12 AE8
AD8 D13
LA_DATAP0 LA_DATAN0 LA_DATAP1 LA_DATAN1 LA_DATAP2 LA_DATAN2 LA_DATAP3 LA_DATAN3
LB_DATAP0 LB_DATAN0 LB_DATAP1 LB_DATAN1 LB_DATAP2 LB_DATAN2 LB_DATAP3 LB_DATAN3
LA_CLK LA_CLK# LB_CLK LB_CLK#
+1.8V_VDDLTP18_NB
+1.8V_VDDLT_18_NB
TMDS_HPD0 TMDS_HPD1
SUS_STAT#_NB R_NB_THRMDA
R_NB_THRMDC
TEST_EN
T106T106 T105T105
T108T108 T104T104
R117 0_4R117 0_4 R118 0_4R118 0_4 R101 *0_4R101 *0_4
T103T103
R126 0_4R126 0_4
R309
R309
1.82K/F_4
1.82K/F_4
LA_DATAP0 (19) LA_DATAN0 (19) LA_DATAP1 (19) LA_DATAN1 (19) LA_DATAP2 (19) LA_DATAN2 (19)
LB_DATAP0 (19) LB_DATAN0 (19) LB_DATAP1 (19) LB_DATAN1 (19) LB_DATAP2 (19) LB_DATAN2 (19)
LA_CLK (19)
LA_CLK# (19)
LB_CLK (19)
LB_CLK# (19)
R117/R118/R101
DISP_ON_NB LVDS_BLON_NB DPST_PWM
R317
R317 0_4
0_4
TMDS_HPD (17,18)
T99T99 T98T98
SUS_STAT# (13)
1
UMA Hybrid
V V
DISP_ON_NB (19) LVDS_BLON_NB (19) DPST_PWM (19)
BLM18PG221SN1D(220,1.4A)_6
RX780 -->NC / RS780 --- ADD
L8
L8
+3.3V
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
AVDD-DAC Analog not applicable to RX780
Enables Debug Bus acess
B B
through memory T/O pads and GPIO. 0 : Enable RS780 , Default 1 : Disable RS780 (RS780 use VSYNC#)
Indicates if memory Side port is available or not 0: available RS780 , Default 1: Not available RS780 ( RS780 use HSYNC#)
INT_VSYNC
INT_HSYNC
For extrnal EEPROM Debug only
STRP_DATA
A A
5
R337 10K/F_4R337 10K/F_4
R320 *10K/F_4R320 *10K/F_4
RS780
R330 3K_4R330 3K_4
RS780
R334 3K_4R334 3K_4 R333 *3K_4R333 *3K_4
RS780/RX780
+VDDG_NB
+3.3V
+3.3V
+1.8V
L11
L11
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
C38
C38 10U/6.3V_8
10U/6.3V_8
PLLVDD18 - Graphics PLL not applicable to RX780
change value form 2.2u to 10u (CH6101M995) . 7/14
+1.8V
VDDA18PCIEPLL -PCIE PLL
L9
L9
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
VDDA18HTPLL -HT LINK PLL
L13
L13
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
4
+3V_AVDD_NB
C179
C179 10U/6.3V/X5R_6
10U/6.3V/X5R_6
+1.8V_PLLVDD18
C191
C191 10U/6.3V/X5R_6
10U/6.3V/X5R_6
20mils width
+1.8V_VDDA18PCIEPLL
C187
C187
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
20mils width
+1.8V_VDDA18HTPLL
C193
C193
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
BLM18PG221SN1D(220,1.4A)_6
+1.1V
L39
L39
+1.8V
R87 0R87 0
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
L12
L12
CPU_LDT_STOP#(3,12)
RS780 : remove level shifter
CPU_LDT_REQ#(3)
ALLOW_LDTSTOP(12)
3
+1.1V_PLLVDD
C491
C491 10U/6.3V/X5R_6
10U/6.3V/X5R_6
+1.8V_AVDDDI_NB
C125
C125 10U/6.3V/X5R_6
10U/6.3V/X5R_6
+1.8V_AVDDQ_NB
C192
C192 10U/6.3V/X5R_6
10U/6.3V/X5R_6
R335 0_4R335 0_4
PLLVDD - Graphics PLL not applicable to RX780
AVDDI-DAC Digital not applicable to RX780
AVDDQ-DAC Bandgap Reference not applicable to RX780
+VDDG_NB
R338
R338 *4.7K_4
*4.7K_4
+VDDG_NB
R329
R329 *4.7K_4
*4.7K_4
NB_ALLOW_LDTSTOP
NB_LDT_STOP#
R339 0_4R339 0_4
R328 0_4R328 0_4
+1.8V
L38
L38
L40
L40
2
BLM18PG221SN1D(220,1.4A)_6
BLM18PG221SN1D(220,1.4A)_6
C489
C489
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8
C490
C490
C487
4.7U/6.3V_6
4.7U/6.3V_6
C487
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+3.3V +VDDG_NB
RS780
NB2/RD1
NB2/RD1
NB2/RD1
+1.8V_VDDLTP18_NB
VDDLTP18 - LVDS or DVI/HDMI PLL not applicable to RX780
+1.8V_VDDLT_18_NB
VDDLT18 - LVDS or DVI/HDMI digital not applicable to RX780
R336 0R336 0
PROJECT : AJ6
PROJECT : AJ6
PROJECT : AJ6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
RS780MN-SYSTEM I/F 3/4
RS780MN-SYSTEM I/F 3/4
RS780MN-SYSTEM I/F 3/4
Date: Sheet
Date: Sheet
Date: Sheet
1
10 39Thursday, August 21, 2008
10 39Thursday, August 21, 2008
10 39Thursday, August 21, 2008
3A
3A
3A
of
of
of
5
4
3
2
1
G1
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
U19F
U19F
VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6
VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
D D
PART 6/6
PART 6/6
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSS11
Y21
W25
AD25
C50
C50
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C64
C64
4.7U/6.3V_6
4.7U/6.3V_6
R88 0R88 0
R303 0R303 0
VSS12
L12
N13
M14
330U/2.5V_ESR9_7
330U/2.5V_ESR9_7
12
330U/2.5V_ESR9_7
330U/2.5V_ESR9_7
12
C96
C96
0.1U/10V/X5R_4
0.1U/10V/X5R_4
VSSAHT20
J22
L17
L22
L24
A25
E22
D23
G22
G24
C C
VDDHT - HT LINK digital I/O for RX780/RS780
VDDHTRX - HT LINK RX I/O for RX780/RS780
+1.2V 2A for RS780M+SB700
L5
+1.2V
B B
BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8
VDDA18PCIE ­PCIE TX stage I/O for RX780/RS780
A A
L5
BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8
VDDHTTX - HT LINK TX I/O for RX780/RS780
+1.8V 1A for RS780M+SB700
+1.8V
L25
H19
G25
P20
N22
R19
R22
R24
R25
M20
+1.1V
H20
+1.1V 2A for RS780M
BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8
0.6A
L7
L7
BLM21PG221SN1D(220,100M,2A)_8
BLM21PG221SN1D(220,100M,2A)_8
0.45A
L41
L41
0.5A
C36
C36
4.7U/6.3V_6
4.7U/6.3V_6
L6
L6
VDD18 - RS780 I/O transform
600mA
C71
C71
4.7U/6.3V_6
4.7U/6.3V_6
VDD18_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform
+1.8V
V19
U22
W22
W24
C1-Test Modify
+1.8V
VSSAPCIE37
GROUND
GROUND
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
T12
P12
P15
R11
R14
U14
C110
C110
C56
C56
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C160
C160
C493
C493
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C43
C43
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C85
C85
0.1U/10V/X5R_4
0.1U/10V/X5R_4
0.005A
C124
C124
1U/10V_4
1U/10V_4
0.005A
do not install C568 when Side-port not using.
AE1
AE4
AB2
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS20
VSS21
VSS22
V12
U11
U15
W11
C450
C450 *1U/10V_4
*1U/10V_4
D11
E14
AE14
VSS2
VSS3G8VSS4
VSS1
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
Y18
W15
AA14
AB11
AC12
+1.1V_VDDHT
C115
C115
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+1.1V_VDDHTRX
C488
C488
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+1.2V_VDDHTTX
C53
C53
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+1.8V_VDDA18PCIE
C77
C77
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+1.8V_VDDG18_NB
+1.8V_VDD18_MEM
E15
J12
K14
J15
VSS5
VSS7
VSS6
VSS29
VSS30
VSS31
AB15
AB17
AB19
AE20
C101
C101
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C486
C486
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C83
C83
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C91
C91
0.1U/10V/X5R_4
0.1U/10V/X5R_4
M11
VSS8
VSS9
VSS32
VSS33
AB21
L15
VSS10
VSS34
K11
U19E
U19E
J17
VDDHT_1
K16
VDDHT_2
L16
VDDHT_3
M16
VDDHT_4
P16
VDDHT_5
R16
VDDHT_6
T16
VDDHT_7
H18
VDDHTRX_1
G19
VDDHTRX_2
F20
VDDHTRX_3
E21
VDDHTRX_4
D22
VDDHTRX_5
B23
VDDHTRX_6
A23
VDDHTRX_7
AE25
VDDHTTX_1
AD24
VDDHTTX_2
AC23
VDDHTTX_3
AB22
VDDHTTX_4
AA21
VDDHTTX_5
Y20
VDDHTTX_6
W19
VDDHTTX_7
V18
VDDHTTX_8
U17
VDDHTTX_9
T17
VDDHTTX_10
R17
VDDHTTX_11
P17
VDDHTTX_12
M17
VDDHTTX_13
J10
VDDA18PCIE_1
P10
VDDA18PCIE_2
K10
VDDA18PCIE_3
M10
VDDA18PCIE_4
L10
VDDA18PCIE_5
W9
VDDA18PCIE_6
H9
VDDA18PCIE_7
T10
VDDA18PCIE_8
R10
VDDA18PCIE_9
Y9
VDDA18PCIE_10
AA9
VDDA18PCIE_11
AB9
VDDA18PCIE_12
AD9
VDDA18PCIE_13
AE9
VDDA18PCIE_14
U10
VDDA18PCIE_15
F9
VDDG18_1(VDD18_1)
G9
VDDG18_2(VDD18_2)
AE11
VDD18_MEM1(NC)
AD11
VDD18_MEM2(NC)
RS780(RX780)
RS780(RX780)
PART 5/6
PART 5/6
PIN NAME VDDHT VDDHTRX VDDHTTX VDDA18PCIE
VDD18_MEM VDDPCIE VDDC VDD_MEM VDDG33 IOPLLVDD18
VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8
VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8
VDDC_9 VDDC_10 VDDC_11
POWER
POWER
VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22
VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)
VDDG33_1(NC) VDDG33_2(NC)
RX780/RS780 POWER DIFFERENCE TABLE
RX780
+1.1V +1.1V +1.2V +1.8V +1.8VVDDG18 NC +1.1V +1.1V +1.8V +1.1V NC
+1.8V/1.5V
NC
+1.1V_VDD_PCIE
A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9
K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16
AE10 AA11 Y11 AD10 AB10 AC10
H11 H12
C118
C118
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C42
C42
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C39
C39
0.1U/10V/X5R_4
0.1U/10V/X5R_4
+3V_VDDG33
C170
C170
0.1U/10V/X5R_4
0.1U/10V/X5R_4
RS780
+1.1V +1.1V +1.2V +1.8V +1.8V +1.8V
+1.1V
+3.3V +1.8VNC
PIN NAME IOPLLVDD
AVDDDI AVDDQ PLLVDD PLLVDD18 VDDA18PCIEPLL VDDA18HTPLL VDDLTP18 VDDLT18 VDDLT33
C104
C104
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C105
C105
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C40
C40
0.1U/10V/X5R_4
0.1U/10V/X5R_4
R99 0R99 0
C174
C174
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C171
C171 1U/10V_4
1U/10V_4
C86
C86
0.1U/10V/X5R_4
0.1U/10V/X5R_4
RX780 RS780
NC
+1.1V
NC
+3.3VAVDD NC +1.8V NC +1.8V
+1.1V
NC
+1.8V
NC
+1.8V +1.8V
+1.8V
+1.8V
NC NC
+1.8V NC
NC
0.7A
C134
C134 1U/10V_4
1U/10V_4
C87
C87
0.1U/10V/X5R_4
0.1U/10V/X5R_4
C41
C41
0.1U/10V/X5R_4
0.1U/10V/X5R_4
RS780
3.3V(0.03A)
VDD33 - 3.3V I/O Not applicable to RX780
VDDPCIE - PCIE-E Main power
R110 0_8R110 0_8
C178
C178
4.7U/6.3V_6
4.7U/6.3V_6
VDDC - Core Logic power
7A
+3.3V
+1.1V
+1.1V_DYN
VDD_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform
PROJECT : AJ6
PROJECT : AJ6
PROJECT : AJ6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
RS780MN-POWER 4/4
RS780MN-POWER 4/4
5
4
3
2
RS780MN-POWER 4/4
Date: Sheet of
Date: Sheet of
Date: Sheet
11 39Thursday, August 21, 2008
11 39Thursday, August 21, 2008
11 39Thursday, August 21, 2008
1
3B
3B
3B
of
5
4
3
2
PCI_CLK3
1
NB_PLTRST#(10)
PCIE_RST#(17)
LAN_PLTRST#(21)
EPRESS_PLTRST#(30)
MINI_PLTRST#(25)
PCIE_SB_NB_RX0P(9)
D D
PLACE THESE PCIE AC COUPLING CAPS CLOSE TO U24
+1.2V
C C
B B
Y4
Y4
23
1
R221
R221
*20M_6
*20M_6
A A
4
32.768KHZ
32.768KHZ
R426 20M_6R426 20M_6
C359
C359 18P/50V_4
18P/50V_4
CPU_PWRGD
C533
C533 *1000P/16V/X7R_4
*1000P/16V/X7R_4
ESD recommend
5
PCIE_SB_NB_RX0N(9) PCIE_SB_NB_RX1P(9) PCIE_SB_NB_RX1N(9) PCIE_SB_NB_RX2P(9) PCIE_SB_NB_RX2N(9) PCIE_SB_NB_RX3P(9) PCIE_SB_NB_RX3N(9)
PCIE_NB_SB_TX0P(9)
To RS780
PCIE_NB_SB_TX0N(9) PCIE_NB_SB_TX1P(9) PCIE_NB_SB_TX1N(9) PCIE_NB_SB_TX2P(9) PCIE_NB_SB_TX2N(9) PCIE_NB_SB_TX3P(9) PCIE_NB_SB_TX3N(9)
+1.2V_PCIE_VDDR
L17 BLM18PG221SN1D(220,1.4A)_6L17 BLM18PG221SN1D(220,1.4A)_6
SBSRC_CLKP(2) SBSRC_CLKN(2)
T127T127 T46T46
T122T122 T123T123
T58T58
T54T54
T126T126
T43T43 T56T56
T53T53
T48T48
T61T61
T47T47 T57T57
T44T44
RTC_X1
RTC_X2
C583
C583 18P/50V_4
18P/50V_4
ALLOW_LDTSTOP(10) CPU_PROCHOT#(3)
CPU_LDT_STOP#(3,10)
T41T41
T59T59
+1.8V +3.3V
CPU_PWRGD(3)
CPU_LDT_RST#(3)
R437 33_4R437 33_4 R436 33_4R436 33_4 R430 33_4R430 33_4 R438 33_4R438 33_4 R233 33_4R233 33_4
C548 0.1U/10V/X5R_4C548 0.1U/10V/X5R_4 C549 0.1U/10V/X5R_4C549 0.1U/10V/X5R_4 C540 0.1U/10V/X5R_4C540 0.1U/10V/X5R_4 C539 0.1U/10V/X5R_4C539 0.1U/10V/X5R_4 C550 0.1U/10V/X5R_4C550 0.1U/10V/X5R_4 C551 0.1U/10V/X5R_4C551 0.1U/10V/X5R_4 C541 0.1U/10V/X5R_4C541 0.1U/10V/X5R_4 C542 0.1U/10V/X5R_4C542 0.1U/10V/X5R_4
R384 562/F_4R384 562/F_4 R180 2.05K/F_4R180 2.05K/F_4
R359 *300_4R359 *300_4 R360 10K/F_4R360 10K/F_4
PCIE_NB_SB_TX0P PCIE_NB_SB_TX0N PCIE_NB_SB_TX1P PCIE_NB_SB_TX1N PCIE_NB_SB_TX2P PCIE_NB_SB_TX2N PCIE_NB_SB_TX3P PCIE_NB_SB_TX3N
+1.2V_PCIE_PVDD
C296
C296
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
ALLOW_LDTSTOP CPU_PROCHOT# CPU_PWRGD CPU_LDT_STOP# CPU_LDT_RST#
A_RST#_SB
A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C A_RX2P_C A_RX2N_C A_RX3P_C A_RX3N_C
PCIE_CALRP_SB
PCIE_CALRN_SB
40mA
C302
C302 1U/10V_4
1U/10V_4
SBSRC_CLKPSBSRC_CLKPSBSRC_CLKPSBSRC_CLKP SBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKN
NB_DISP_CLKP NB_DISP_CLKN
NB_HT_CLKP NB_HT_CLKN
CPU_HT_CLKP CPU_HT_CLKN
SLT_GFX_CLKP SLT_GFX_CLKN
GPP_CLK0P GPP_CLK0N
GPP_CLK1P GPP_CLK1N
GPP_CLK2P GPP_CLK2N
GPP_CLK3P GPP_CLK3N
T42T42
T51T51
RTC_X1
RTC_X2
4
U24A
U24A
N2
A_RST#
V23
PCIE_TX0P
V22
PCIE_TX0N
V24
PCIE_TX1P
V25
PCIE_TX1N
U25
PCIE_TX2P
U24
PCIE_TX2N
T23
PCIE_TX3P
T22
PCIE_TX3N
U22
PCIE_RX0P
U21
PCIE_RX0N
U19
PCIE_RX1P
V19
PCIE_RX1N
R20
PCIE_RX2P
R21
PCIE_RX2N
R18
PCIE_RX3P
R17
PCIE_RX3N
T25
PCIE_CALRP
T24
PCIE_CALRN
P24
PCIE_PVDD
P25
PCIE_PVSS
N25
PCIE_RCLKP/NB_LNK_CLKP
N24
PCIE_RCLKN/NB_LNK_CLKN
K23
NB_DISP_CLKP
K22
NB_DISP_CLKN
M24
NB_HT_CLKP
M25
NB_HT_CLKN
P17
CPU_HT_CLKP
M18
CPU_HT_CLKN
M23
SLT_GFX_CLKP
M22
SLT_GFX_CLKN
J19
GPP_CLK0P
J18
GPP_CLK0N
L20
GPP_CLK1P
L19
GPP_CLK1N
M19
GPP_CLK2P
M20
GPP_CLK2N
N22
GPP_CLK3P
P22
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
J20
25M_X2
A3
X1
B3
X2
F23
ALLOW_LDTSTP
F24
PROCHOT#
F22
LDT_PG
G25
LDT_STP#
G24
LDT_RST#
SB700
SB700
IC CTRL(528P) SB700 A11(218S7EALA11FG) P/N : AJALA110T00
SB700
SB700
Part 1 of 5
Part 1 of 5
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
100MHZ
LPC
CPU
CPU
LPC
RTC
RTC
RTC XTAL
RTC XTAL
PCI CLKS
PCI CLKS
PCI INTERFACE
PCI INTERFACE
CLOCK GENERATOR
CLOCK GENERATOR
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
PCICLK0 PCICLK1 PCICLK2 PCICLK3
PCICLK4
PCICLK5/GPIO41
PCIRST#
AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30
AD31 CBE0# CBE1# CBE2# CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY# STOP#
PERR# SERR# REQ0# REQ1#
REQ2# REQ3#/GPIO70 REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72 GNT4#/GPIO73
CLKRUN#
LOCK#
INTE#/GPIO33
INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36
LPCCLK0 LPCCLK1
LAD0 LAD1 LAD2 LAD3
LFRAME#
LDRQ0#
SERIRQ
RTCCLK
INTRUDER_ALERT#
VBAT
3
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9
PAR
P4 P3 P1 P2 T4 T3
N1
U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3 Y2 AA2 AB4 AA1 AB3 AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5
AD3 AC4 AE2 AE3
G22 E22 H24 H23 J25 J24 H25 H22 AB8 AD7 V15
C3 C2 B2
PCI_CLK2_R PCI_CLK3_R PCI_CLK4_R PCI_CLK5_R
PCIRST#_L
R232 33_4R232 33_4
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
REQ0#
GNT0#
PE_GPIO1
INTE# INTF# INTG#
LPC_CLK0 LPC_CLK1 LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME# LDRQ#0 LDRQ1#_SB SB_GPIO65 SERIRQ
RTC_CLK INTRUDER_ALERT# +AVBAT
R443 22_4R443 22_4 R450 22_4R450 22_4 R224 22_4R224 22_4 R223 22_4R223 22_4
AD0 (22) AD1 (22) AD2 (22) AD3 (22) AD4 (22) AD5 (22) AD6 (22) AD7 (22) AD8 (22) AD9 (22) AD10 (22) AD11 (22) AD12 (22) AD13 (22) AD14 (22) AD15 (22) AD16 (22) AD17 (22) AD18 (22) AD19 (22) AD20 (22) AD21 (22) AD22 (22) AD23 (16,22) AD24 (16,22) AD25 (16,22) AD26 (16,22) AD27 (16,22) AD28 (16,22) AD29 (16,22) AD30 (16,22) AD31 (22) CBE0# (22) CBE1# (22) CBE2# (22) CBE3# (22) FRAME# (22) DEVSEL# (22) IRDY# (22) TRDY# (22) PAR (22) STOP# (22)
REQ0# (22)
T155T155 T70T70
GNT0# (22)
T76T76
INTE# (22)
T157T157
R186 22_4R186 22_4 R383 22_4R383 22_4
T68T68 T154T154
T158T158
LPC_LAD0 (25,28) LPC_LAD1 (25,28) LPC_LAD2 (25,28) LPC_LAD3 (25,28) LPC_LFRAME# (25,28) LDRQ#0 (25)
SERIRQ (25,28)
RTC_CLK (16)
20MIL
PCIRST#
12
G2
G2 *SHORT_ PAD1
*SHORT_ PAD1
T84T84 T91T91
40mil
PE_GPIO1 (17) FPBACK# (19)
CLKRUN# (22,25,28)
2
PCI_CLK_TPM (16) PCI_CLK3 (16,22) PCI_CLK4 (16) PCI_CLK5 (16)
PCIRST# (22)
follow AMD reference schematic
+AVBAT
C508
C508 1U/10V_4
1U/10V_4
PX_EN (10) PE_GPIO0 (17) LPC_CLK0 (16) LPC_CLK1 (16) PCLK_LPC_DEBUG (25) LPC_CLK_8502 (28)
+AVBAT
C361
C361
0.1U/10V/X5R_4
0.1U/10V/X5R_4
PE_GPIO1
SB_GPIO65
R348 510/F_4R348 510/F_4
C507
C507 1U/10V_4
1U/10V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet of
Date: Sheet of
Date: Sheet
PCLK_LPC_DEBUG LPC_CLK_8502
C600
C600 *10P/50VC0G_4
*10P/50VC0G_4
+3.3V
R431 8.2K_4R431 8.2K_4 R432 *8.2K_4R432 *8.2K_4
R425 100K/F_4R425 100K/F_4
Maybe can removePCIE_PVDD-- PCIE PLL POWER
All the PCI bus has build-in Pull-UP/Down resistors
D21 CH501H-40PTD21 CH501H-40PT
+3VRTC
CH501H-40PT
CH501H-40PT
D22
D22
+VCCRTC_2
20MIL
CN28
CN28
1 2
RTC_CON.
RTC_CON.
C544
C544 *10P/50VC0G_4
*10P/50VC0G_4
PROJECT : AJ6
PROJECT : AJ6
PROJECT : AJ6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
SB700-PCIE/PCI/CPU/LPC 1/4
SB700-PCIE/PCI/CPU/LPC 1/4
SB700-PCIE/PCI/CPU/LPC 1/4
1
40mil
+BAT
C298
C298 *10P/50VC0G_4
*10P/50VC0G_4
12 39Monday, August 18, 2008
12 39Monday, August 18, 2008
12 39Monday, August 18, 2008
+3.3V_ALW
R350
R350 0_4
0_4
of
1A
1A
1A
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