QPROX QT60320C-AS Datasheet

LQ QT60320C

NOT RECOMMENDED FOR NEW DESIGNS



Creates 32 ‘touch buttons’ through any dielectric

32-KEY QM

 100% autocal for life - no adjustments required



'N' key rollover: senses all 32 keys in parallel



Keys individually adjustable for sensitivity



Mix 'n match key sizes & shapes in one panel



Tolerates a 20:1 variance in key sizes on a panel

 Panel thicknesses to 5 cm or more



Back lit keys possible with ITO electrodes



LED status function drives



User-addressable multifunction drive pins



User-addressable internal eeprom



Simple, universal serial interface



5V single supply operation



44-pin TQFP package



One square inch (6.5 square cm) of PCB required

APPLICATIONS -

 Security keypanels  Industrial keyboards

 Appliance controls  Outdoor keypads

ATRIX

RST

Vcc

Gnd

XT2

XT1

O1 O5

 ATM machines  Touch-screens

™ C

HARGE-TRANSFER

Gnd

Vcc

X5X4X3

44 434241 403938 37 363435

11 23

O2O3O4L1L2

QT60320

1615

14 22

AIN

Vcc

GndY1Y2Y3Y4

 Automotive panels  Machine tools

I4I3I2

21192018

I11

CC1

CC2

Aref

AGnd

Vcc

The QT60320 digital charge-transfer (“QT”) QMatrix™ IC is designed to detect touch on up to 32 keys in a scanned X-Y matrix. It will project the keys through almost any dielectric, like glass, plastic, stone, ceramic, and even most kinds of wood, up to thicknesses of 5 cm or more. The touch areas are defined as simple 2-part interdigitated electrodes of conductive material, like copper, Indium-Tin-Oxide (ITO), or screened silver or carbon deposited on the rear of the control panel. Key sizes, shapes and placement are almost entirely arbitrary; sizes and shapes of keys can be mixed within a single panel of keys and can vary by a factor of 20:1 or more in area. The gain (sensitivity) and threshold of each key can be set individually via simple commands over the UART port, for example via the freeware QmBtn program. Key setups are stored internally in an onboard eeprom and do not need to be reloaded.

The IC is designed specifically to work with appliances, ATM machines, security panels, portable instruments, machine tools, or similar products that are subject to environmental 'challenges' or even physical attack. It permits the construction of 100% sealed, watertight keypanels that are immune to environmental factors such as humidity and condensation, temperature, dirt accumulation, or the physical deterioration of the panel surface from abrasion, chemicals, or abuse. To this end the QT60320 contains Quantum-pioneered self-calibration, drift compensation, and digital filtering algorithms that make the sensing function extremely robust and survivable.

The device can readily control keys over graphical LCD panels or LEDs when used with clear, conductive ITO electrodes. It does not require 'chip on glass' or other exotic fabrication techniques, thus allowing the OEM to source the keymatrix from multiple vendors.

External circuitry consists of an opamp, a common PLD, and a quad fet switch, which can fit into a footprint of roughly 1 square inch (6.5 sq. cm). The device also can control two status LEDs, and includes in addition 8 addressable output drive lines and 4 readable spare input lines which can be used to control LEDs, LCDs, or other panel functions without requiring additional control lines from the host CPU. It also makes available to the user 86 bytes of onboard writeable and readable eeprom via the serial interface, thus helping to reduce system cost by eliminating extra components.

QT60320 technology makes use of an important new variant of charge-transfer sensing, transverse charge-transfer, in an XY format that minimizes the number of required scan lines. Unlike older technologies it does not require one IC per key, and is cost competitive even with some membrane technologies. In many cases it can also replace resistive XY sense elements commonly used in touch screens, at a fraction of the price.

This part is not recommended for new designs. Consult Quantum for advice on alternatives.

-40

C to +1050C

AVAILABLE OPTIONS

QT60320C-AS

TQFPT

QT60320C R1.08/01.03

1 - OVERVIEW

The QT60320 is a digital burst mode charge-transfer (QT) sensor designed specifically for matrix geometry touch controls; it includes all signal processing functions necessary to provide stable sensing under a wide variety of changing conditions. Only a few low cost external parts are required for operation. The entire circuit can be built within about 1 square inch of PCB area (smt).

Figure 1-1 Field flow between X and Y elements

overlying panel

eleme nt

The 60320 uses burst-mode charge transfer methods pioneered and patented by Quantum, including charge cancellation methods which allow for a wide range of key sizes and shapes to be mixed together in a single keypanel. These features permit the construction of entirely new classes of keypanels never before contemplated, such as touch-sliders, back-illuminated keys, and arbitrary shape keypanels, all at very low cost.

The QT60320 uses an asynchronous serial (uart) interface running at 9600 baud to allow key data to be extracted and to permit individual key parameter setup. The interface protocol uses simple ASCII commands and responds with either ASCII or binary results depending on the command.

In addition to normal operating and setup commands the device can also report back actual key signal strength and error codes. Spare eeprom memory (over 80 bytes) can also be written to and read to save the system designer from having to install and interface to a separate eeprom.

The IC also includes 4 readable input (I1..I4) pins and 8 settable output (O1..O4) pins which can be used in any way desired, including to scan a secondary keypad of up to 32 contact closures. Alternatively they can be used to remotely activate panel LEDs, buzzers, or other types of indicators.

QmBtn software for the PC can be used to program a board containing the IC as well as read back key status and signal levels in real time.

The QT60320 employs transverse charge-transfer ('QT') sensing, a new technology that senses the charge forced across an electrode set by a digital edge.

element

of the X drive pulse. The charge emitted by the X electrode is partly received onto the corresponding Y electrode which is then processed. The QT60320 matrix uses 8 'X' edge-driven rows and 4 'Y' sense columns to allow up to 32 keys.

The charge flows are absorbed by the touch of a human finger (Figure 1-2) resulting in a decrease in coupling from X to Y; coupled charge increases in the presence of a conductive film like water (Figure 1-3) which acts to bridge the two elements. Increasing signals due to water films are quite easy to discern and are not detected by the IC.

1.2 CIRCUIT MODEL

An electrical circuit model is shown in Figure 1-4. The coupling capacitance between X and Y electrodes is represented by Cx. While the reset switch is open, a sampling switch is gated so that it transfers charge flows only from the rising edge of X into the sample capacitor Cs. Cs is a large value capacitor, typically in the range of 1 - 50nF. The voltage rise captured on Cs after each X edge is quite small, on the order of a millivolt, while changes due to touch are on typically the order of 10's of microvolts. The X pulse can be repeated in a burst consisting of up to several hundred pulses to build up the voltage (and the change in voltage due to touch) to a larger value. Longer bursts increase system gain by collecting more charge; gain can thus be digitally manipulated to achieve the required sensitivity on a key-by-key basis during scanning.

If the voltage on Cs rises excessively it can fall outside of the ADC's range. To reduce the voltage again without affecting gain, one of two (or both) Cz capacitors can be switched to

Figure 1-2 Field Flows When Touched

overlying panel

element

Figure 1-3 Fields With a Conductive Film

element

1.1 FIELD FLOWS

Figure 1-1 shows how charge is transferred across the electrode set to permeate the overlying panel material; this charge flow exhibits a rapid dQ/dt during the edge transitions

2 QT60320C R1.08/01.03

Figure 1-4 QT60320 Circuit Model

X1X2X3X

switch (1 of 4)

Amp

Sample

8-bit ADC

011

Reset

switch

X drive (1 of 8)

electrode

X Drive

Reset switch

Sample switch

Amp out

Y electrode

receive line

(1 o f 4)

out

subtract charge from Cs to create a negative-going offset, bringing the signal back to a usable level. This action occurs during the course of the burst and is not illustrated in the timing diagram of Figure 1-4. This mechanism has the benefit of allowing high levels of Cx while remaining highly sensitive to small changes in charge coupling due to touch; the circuit permits the designer to create very large, highly interdigitated touch keys that are very sensitive.

The large Cs capacitor creates a virtual ground termination, making the Y lines appear as a low impedance; this effectively eliminates cross-coupling among Y lines due to voltage spikes, while dramatically lowering susceptibility to EMI. The circuit is also highly tolerant of capacitive loading on the Y lines, since stray C from Y to ground appears merely as a parallel capacitance to a much larger value of Cs.

The QT60320 circuit design maintains high gain levels independent of Cx or stray coupling C to ground. It also readily compensates for field-related issues like electrode design or the composition of the overlying panel, as it has individual programmable gain and threshold settings for each key.

Short sample gate dwell times after the X edge can be used to limit the effect of moisture spreading from key to key by taking advantage of the RC filter-like nature of continuous films; the shorter the dwell time, the less time that the charge has to travel through the impedance of the film. This effect is completely independent of the frequency of burst repetition, intra-burst pulse spacing, or X drive pulse width.

Burst mode operation permits reduced power consumption and reduces RF emissions, while permitting excellent response time.

1.3 MATRIX CONFIGURATION

The matrix scanning configuration is shown in part in Figure 1-5. The X drives are conventional CMOS push-pull outputs which are sequentially pulsed in

groupings of bursts; a 4-pole analog switch acts as the sample switch for all 4 Y lines. At the intersection of each X and Y line is an interdigitated electrode set as shown in Figure 1-6. Typically the outermost electrode

Cancellation switch (1 of 2)

is connected to X and the inner electrode connected to Y. Remaining Y lines not being sampled are grounded.

(1 of 2 )

1.4 'X' ELECTRODE DRIVES

The 8 'X' lines can be directly connected to the matrix without buffering. Only the X lines' positive edges are used to create the transient field flows used to scan the keys. Only one X line is active at a time, and it will pulse for a burst length determined by the 'gain' setting parameter.

If desired an external 22V10 type CMOS PLD can be used to create the short gate dwell times necessary to enhance moisture suppression (Section 1.2). The PLD takes as its input all 'X' and 'Y' lines, and with added RC time constants creates the required short dwell time on the Y switches. The code for the PLD is available freely on

the Quantum web site and can also be found in Section 5.

1.5 'Y' GATE DRIVES

There are 4 'Y' gate drives (Y1..Y4) which are active-high; only one Y line is used during a burst for a particular key. The chosen Y line goes high just before an X line transitions high, and goes low again just after the X line rises. It is used to gate on an analog switch, such as a 74HC4066, to capture charge coupled through a key to the sample capacitor Cs.

An inverted version of the Y lines can be used to gate unselected Y lines to ground, to suppress residual cross-key coupling that might be caused by cross-pickup from adjacent X drive traces. See Section 2.2.

Y gate signals can be manipulated externally so that the gate dwell time is very short to suppress the effects of surface conductivity due to water films. See Section 2.3.

Figure 1-5 QT60320 Matrix Configuration

drives

(4 of 8 shown)

Y2Y3Y

Reset switch

Interdigitated keys

ADC

3 QT60320C R1.08/01.03

Figure 1-6 Sample Electrode Geometries

PARALLEL LINES SERPENTINE SPIRAL

1.6 SIGNAL PROCESSING

The QT60320 calibrates and processes all signals using a number of algorithms pioneered by Quantum. These algorithms are specifically designed to provide for high survivability in the face of adverse environmental challenges.

1.6.1 S

The QT60320 is fully self-calibrating. On powerup the IC scans the matrix key by key and sets appropriate calibration points for each in accordance with setup information in its internal eeprom, or on the fly from a host MPU. Since the circuit can tolerate a very wide dynamic range, it is capable of adapting to a wide mix of key sizes and shapes having wildly varying Cx coupling capacitances. No special operator or factory calibration or circuit tweak is required to bring keys into operation, except for a gain and threshold batch setup which can be performed in seconds from a file saved on a PC. Once set, there should never be a need to readjust these parameters.

1.6.2 D

Signal drift can occur because of changes in Cx and Cs over time. It is crucial that drift be compensated for, otherwise false detections, non-detections, and sensitivity shifts will follow.

Drift compensation (Figure 1-7) is performed by making the reference level track the raw signal at a slow rate, but only while there is no detection in effect. The rate of adjustment must be performed slowly, otherwise legitimate detections could be ignored. The QT60320 drift compensates using a slew-rate limited change to the reference level; the threshold and hysteresis values are slaved to this reference.

When a finger is sensed, the signal falls since the human body acts to absorb charge from the cross-coupling between X and Y lines. An isolated, untouched foreign object (a coin, or a water film) will cause the signal to rise slightly due to the enhanced coupling thus created. These effects are contrary to the way most capacitive sensors operate.

Once a finger is sensed, the drift compensation mechanism ceases since the signal is legitimately low, and therefore should not cause the reference level to change.

The QT60320's drift compensation is 'asymmetric': the drift-compensation occurs in one direction faster than it does in the other. Specifically, it compensates faster for increasing signals than for decreasing signals. Decreasing signals should not be compensated for quickly, since an approaching finger could be compensated for partially or entirely before even touching the sense pad. However, an obstruction over the sense pad, for which the sensor has already made full allowance for, could suddenly

ELF-CALIBRATION

RIFT COMPENSATION ALGORITHM

Hysteresis

Threshold

Output

be removed leaving the sensor with an artificially suppressed reference level and thus become insensitive to touch. In this latter case, the sensor will compensate for the object's removal by raising the reference level quickly.

1.6.3 T

The threshold value is established as an offset to the reference level. As Cx and Cs drift, the reference drift compensates with the changes and the threshold level is automatically recomputed in real time so that it is never in error. Since key touches result in negative signal swings, the threshold is set below the signal reference level.

The QT60320 employs a hysteresis of 25% of the delta between the reference and threshold levels. The signal must rise by 25% of the distance from threshold to reference before the detection event drops out and the key registers as untouched.

1.6.4 MAX ON-D

If a foreign object contacts a key the signal may change enough to create a 'false' detection lasting for the duration of the contact. To overcome this, the IC includes a timer which monitors detection duration. If a detection exceeds the timer setting, the timer causes the sensor to perform a full recalibration. This is known as the Max On-Duration feature.

After the Max On-Duration interval has expired and the recalibration has taken place, the affected key will once again function normally even if still contacted by the foreign object, to the best of its ability. The Max On-Duration is fixed at 10 seconds of continuous detection.

1.6.5 D

To suppress false detections caused by spurious events like electrical noise, the QT60320 incorporates a detection integration counter that increments with each detection sample until a limit is reached, at which point a detection is confirmed. If no detection is sensed on any of the samples prior to the final count, the counter is reset immediately to zero, forcing the process to restart. The required count is 4.

HRESHOLD AND HYSTERESIS CALCULATIONS

URATION

ETECTION INTEGRATOR

2 - CIRCUIT SPECIFICS

A basic QT60320 circuit is shown in Figure 2-1.

2.1 SIGNAL PATH

The QT60320 requires an external sampling capacitor, two Cz capacitors, an amplifier, some analog switches, and an R2R ladder DAC to operate.

The Cs capacitor performs the charge integration function by collecting charge coupled though a selected key during the

Figure 1-7 Drift Compensation

Reference

Signal

4 QT60320C R1.08/01.03

dV/dt of the rising edge of an

Figure 2-1 Basic QT60320 Circuit

'X' scan line. The charge is sampled 'n' times during the course of a burst of switching cycles of length 'n'. As the burst progresses the charge on Cs increases in a staircase fashion (Figure 1-4).

At the burst's end the voltage on Cs, which is on the order of a few tenths of a volt, is amplified by a gain circuit which includes an offset current from the R2R ladder DAC driven by the X drive lines. The offset current from the R2R ladder repositions the output of the amplifier chain to coincide as closely as possible with the center span of the 60320's ADC, which can convert voltages between 0 and 5 volts. Between bursts the Cs reset mosfet is activated to reset the Cs capacitor to

Vcc

UART IN

UART OUT

USE R PO RT PINS

CAL L ED

STAT LED

DS1811

8MHz

Vcc

51727 38

VVV

Rst

XT1

XT2

GGGG

618 39

X4 X5

YS1

YS2

QT6032 0

YS3

YS4

CC1

CC2

AIN

ground.

Gain is directly controlled by burst length 'n', amplifier gain Av, and the values of Cs, Cz1 and Cz2. Only 'n' can be adjusted on a key by key basis whereas Av and the capacitances can only be adjusted for all keys. The amplifier should typically have a total positive gain of 100 +/- 20%..

Figure 2-2 Improved Circuit to Suppress Water Films

Vcc

8MH z

33 34 35 36

11 12

13 14 23 24 25

51727 38

VVV

Rst

I2 I3 I4

O1 O2 O3 O4

O5 O6 O7

QT60320

XT1

XT2

GGGG

618 39

YS3

CC1

CC2

YS1

YS2

YS4

AIN

X2 X3

X4 X5 X6 X7 X8

41 42 43 44 1

2 3

C6 (Cz 1) 820pF

C7 (Cz2) 820pF

BSN 20

R2R dac 100K

R4 100 K

22V10

R3 68K

TLC2272

R6 10K

USE R POR T PINS

Vcc

DS1811

Vcc

UART IN UART OUT

CAL LED

STAT LED

Keymatrix

1/4

HC4066

R5 10K

Y3 Y2Y4 Y1

1/4

HC4066

C5 ( Cs)

15nF

1/4

HC4066

1/4

HC4066

1/4

74AC04

HC4066

40 41

C6 (Cz1) 8 20pF

C7 (Cz2) 8 20pF

BSN20

R2R dac 100K

R4 100K

R3 68 K

TLC2272

R6 10 K

If there is a large amount of coupling between X and Y lines, and where burst length 'n' is set to a high number, charge accumulation on Cs may reach a point where the ladder DAC can no longer offset the signal back into the ADC's usable range. In this case the circuit will employ one or two of the Cz capacitors to 'knock back' or cancel the charge accumulated

on Cs; each Cz will cancel charge in a discrete step as required.

Components shown in Figure 2-1 include:

Keymatrix

Y3 Y2Y4 Y1

 An LVD reset (e.g. Dallas

DS1811) suitable for 5 volt supplies and an active-low on low-voltage output;

 An R2R ladder network (CTS

750-107R100K or equivalent);

 A >2MHz GBW CMOS rail-rail

output opamp capable of sensing ground on the inputs;

 An 8MHz crystal or resonator,

I/O I/O I/O I/O

E E

QS31 25

I/O I/O I/O I/O

or a ceramic resonator with built-in capacitors;

 Two indicator LEDs (optional)

to show sensing state and calibration status;

 74AC04 inverters to drive the

R5 10K

C5 ( Cs)

15nF

two banks of analog switches in opposite states;

 Two 74HC4066 analog

switches;

 A reset mosfet, most any

small-signal mosfet with a guaranteed on-state at 4 volts

1/4

HC4066

1/4

HC4066

1/4

HC4066

5 QT60320C R1.08/01.03

+ 9 hidden pages