QDI QD15AL01 Specification

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Product Specification
U OPTRONICS CORPORATION
Module
Model Name
15.4” WSXGA+ Color TFT-LCD
B154SW01 V7
Customer Date
Checked &
Approved by
Approved by Date
Jerry Chen 2007/05/23
Prepared by
Note: This Specification is subject to change without notice.
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Derrick Lee 2007/05/23
MDBU Marketing Division /
AU Optronics corporation
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Contents
1. Handling Precautions....................................................................................... 4
2. General Description.......................................................................................... 5
2.1 Display Characteristics ...................................................................................................... 5
2.2 Optical Characteristics ....................................................................................................... 6
3. Functional Block Diagram.............................................................................. 11
4. Absolute Maximum Ratings........................................................................... 12
4.1 TFT LCD Module ............................................................................................................. 12
4.2 Backlight Unit................................................................................................................... 12
4.3 Absolute Ratings of Environment..................................................................................... 12
5. Electrical characteristics ............................................................................... 13
5.1 TFT LCD Module ............................................................................................................. 13
5.2 Backlight Unit................................................................................................................... 15
6. Signal Characteristic ...................................................................................... 17
6.1 Pixel Format Image..........................................................................................................17
6.2 The input data format.......................................................................................................18
6.3 Signal Description ............................................................................................................ 19
6.4 Interface Timing ............................................................................................................... 22
6.5 Power ON/OFF Sequence ............................................................................................... 24
7. Connector & Pin Assignment ........................................................................ 25
7.1 TFT LCD Module ............................................................................................................. 25
7.2 Backlight Unit................................................................................................................... 25
7.3 Signal for Lamp connector............................................................................................... 25
8. Vibration and Shock Test............................................................................... 26
8.1 Vibration Test ................................................................................................................... 26
8.2 Shock Test Spec: ............................................................................................................. 26
9. Reliability......................................................................................................... 27
10. Mechanical Characteristics ......................................................................... 28
10.1 LCM Outline Dimension ................................................................................................. 28
10.2 Screw Hole Depth and Center Position ......................................................................... 30
11. Shipping and Package ................................................................................. 31
11.1 Shipping Label Format................................................................................................... 31
11.2. Carton package............................................................................................................. 32
11.3 Shipping package of palletizing sequence ..................................................................... 32
12. Appendix: EDID description......................................................................... 33
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Record of Revision
Version and Date Page Old description New Description Remark
0.1 2006/10/18 All First Edition for Customer
0.2 2007/05/23 1 First Edition for Customer Final Edition for Customer
1 B154SW01 V7 QD15AL01 (B154SW01 V7)
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1. Handling Precautions
1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration or spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure human earth when handling.
7) Do not open nor modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) In case if a Module has to be put back into the packing container slot after once it was taken out from the container, do not press the center of the CCFL Reflector edge. Instead, press at the far ends of the CFL Reflector edge softly. Otherwise the TFT Module may be damaged.
10) At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor tilt the Interface Connector of the TFT Module.
11) After installation of the TFT Module into an enclosure (Notebook PC Bezel, for example), do not twist nor bend the TFT Module even momentary. At designing the enclosure, it should be taken into consideration that no bending/twisting forces are applied to the TFT Module from outside. Otherwise the TFT Module may be damaged.
12) Cold cathode fluorescent lamp in LCD contains a small amount of mercury. Please follow local ordinances or regulations for disposal.
13) Small amount of materials having no flammability grade is used in the LCD module. The LCD module should be supplied by power complied with requirements of Limited Power Source(, IEC60950 or UL1950), or be applied exemption.
14) The LCD module is designed so that the CCFL in it is supplied by Limited Current Circuit(IEC60950 or UL1950). Do not connect the CCFL in Hazardous Voltage Circuit.
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2. General Description
B154SW01 V7 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel, a driver circuit, and backlight system. The screen format is intended to support the WSXGA+ (1680(H) x 1050(V)) screen and 262k colors (RGB 6-bits data driver). All input signals are LVDS interface compatible. Inverter of backlight is not included.
B154SW01 V7 is designed for a display unit of notebook style personal computer and industrial machine.
2.1 General Specification
The following items are characteristics summary on the table at 25 к condition:
Items Unit Specifications
Screen Diagonal [mm] 390.8 (15.4”W)
Active Area [mm] 331.38 X 207.11
Pixels H x V 1680 x 3(RGB) x 1050
Pixel Pitch [mm] 0.19725X0.19725
Pixel Arrangement R.G.B. Vertical Stripe
Display Mode Normally White
2
White Luminance (ICCFL=6.0mA) Note: I
CCFL is lamp current
[cd/m
] 200 typ. (5 points average)
180 min. (5 points average)
Note1
Luminance Uniformity 1.3 max. (5 points) Contrast Ratio 400 typ
300 min.
Optical Rise Time/Fall Time [msec] 6/10 typ.
Nominal Input Voltage VDD [Volt] +3.3 typ.
Power Consumption [Watt] 2.5 max.(without inverter)
Weight (with Inverter) [Grams] 620 max.
Physical Size [mm] 344.0 typ. x 222.0 typ. x 6.5 max.
Electrical Interface 2 channel LVDS
Surface Treatment Anti-glare, Hardness 3H
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Support Color 262K colors ( RGB 6-bit )
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U OPTRONICS CORPORATION
Temperature Range
Operating Storage (Non-Operating)
o
C]
[
o
C]
[
0 to +50
-20 to +60
RoHS Compliance RoHS Compliance
2.2 Optical Characteristics
The optical characteristics are measured under stable conditions at 25к (Room Temperature):
Item Unit Conditions Min. Typ. Max. Note
2
White Luminance
CCFL=6.0mA
I Viewing Angle
Luminance Uniformity 5 Points
Luminance Uniformity 13 Points
CR: Contrast Ratio
Cross talk %
Response Time
Color / Chromaticity Coordinates (CIE 1931)
[cd/m
[degree] [degree]
[degree] [degree]
] 5 points average 180 200 - 1, 4, 5.
Horizontal (Right) CR = 10 (Left)
Vertical (Upper) CR = 10 (Lower)
300:1 400:1 - 6
[msec] Rising
[msec] Falling
[msec] Rising + Falling
Red x
Red y
Green x
Green y
Blue x
Blue y
White x
White y
60
60
40
50
65
65
45
55
-
-
-
-
8
1.3 1
1.52 2
47
-
6
8
8
- 10 17
16 25
0.556 0.576 0.596
2,8
0.310 0.330 0.350
0.292 0.312 0.332
0.530 0.550 0.570
0.141 0.161 0.181
0.128 0.148 0.168
0.293 0.313 0.333
0.309 0.329 0.349
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Note 1: 5 points position (Display area : 331.38mm x 207.11mm)
W/4 W/4 W/4 W/4
H/4
W
H
Note 2: 13 points position
H
H/4
H/4
H/4
H/4
H/4
10
10
W/4
1
6
W/4
2
W/4
10
3
1
3
45
W
W/4
2
45
7
8
H/4
10
13
H/4
10
11
9
12
Note 3: The luminance uniformity of 5 and 13 points is defined by dividing the maximum luminance values by the minimum test point luminance
Maximum Brightness offive points
Ӭ
=
W5
Ӭ
W13
Note 4: Measurement method
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Minimum Brightness of five points
Maximum Brightness o
thirteen points
=
Minimum Brightness of thirteen points
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The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change
during measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight
for 30 minutes in a stable, windless and dark room. ʳ
Photo detector
Field=2
Note 5Κ Definition of Average Luminance of White (Y
Measure the luminance of gray level 63 at 5 pointsΔY
L (x) is corresponding to the luminance of the point X at Figure in Note (1).
Note 6Κ Definition of contrast ratio:
Contrast ratio is calculated with the following formula.
Bri
htness on the “White” state
):
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
L
Contrast ratio (CR)=
htness on the “Black” state
Bri
Note 7Κ Definition of Cross Talk (CT)
CT = | Y
B – YA | / YA  100 (%)
-
Where
Y
A = Luminance of measured location without gray level 0 pattern (cd/m2)
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YB = Luminance of measured location with gray level 0 pattern (cd/m2)
Note 8: Definition of response time:
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The output signals of BM-7 or equivalent are measured when the input signals are changed from “Black” to
“White” (falling time) and from “White” to “Black” (rising time), respectively. The response time interval between the
10% and 90% of amplitudes. Refer to figure as below.
"Black"
100%
S ig
90%
n a l
( R
e la
t
iv e v
a lu
10%
e )
0%
Tr
Tf
"White""White"
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Note 8. Definition of viewing angle
Viewing angle is the measurement of contrast ratio Њ10, at the screen center, over a 180° horizontal and
180° vertical range (off-normal viewing angles). The 180° viewing angle range is broken down as follows; 90° (Ӱ)
horizontal left and right and 90° (ӥ) vertical, high (up) and low (down). The measurement direction is typically
perpendicular to the display surface with the screen rotated about its center to develop the desired
viewing angle.
measurement
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3. Functional Block Diagram
The following diagram shows the functional block of the 15.4 inches wide Color TFT/LCD Module:
X-Driver
(4 pairs LVDS)
RxIN0 RxIN1 RxIN2
RxCLKIN
VDD
GND
LCD DRIVE BOARD
LCD Connector(30pin
JAE FI-XB30SL-HF10
Mating Housing JAE FI-X30H
LCD Controller
DC-DC
Converter
Ref circuit
Y-D riv e r
TFT ARRAY/CELL
1680(R/G/B) x 3 x 1050
Backlight Unit
Lam
Connector(2pin
JST BHSR-02VS-1
Mating Type SM02B-BHSS-1-TB
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4. Absolute Maximum Ratings
Absolute maximum ratings of the module is as following:
4.1 Absolute Ratings of TFT LCD Module
Item Symbol Min Max Unit Conditions
Logic/LCD Drive Voltage Vin -0.3 +4.0 [Volt] Note 1,2
4.2 Absolute Ratings of Backlight Unit
Item Symbol Min Max Unit Conditions
CCFL Current ICCFL - 7.0 [mA] rms Note 1,2
4.3 Absolute Ratings of Environment
Item Symbol Min Max Unit Conditions
Operating Temperature TOP 0 +50 [oC] Note 3
Operation Humidity HOP 5 95 [%RH] Note 3
Storage Temperature TST -20 +60 [oC] Note 3
Storage Humidity HST
5 95
[%RH]
Note 3
Note 1: At Ta (25к )
Note 2: Permanent damage to the device may occur if exceed maximum values
Note 3: For quality performance, please refer to AUO IIS(Incoming Inspection Standard).
Twb=39° C
Operating Range Storage Range
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5. Electrical characteristics
5.1 TFT LCD Module
5.1.1 Power Specification
Input power specifications are as follows;
Symble Parameter Min Typ Max Units Note
VDD Logic/LCD Drive
Volta
PDD VDD Power 2.5 [Watt] Note 1 IDD IDD Current
IRush Inrush Current 2000 [mA]
VDDrp Allowable
Logic/LCD Drive Ripple Voltage
e
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3.0 3.3 3.6 [Volt]
700 800
100 [mV]
[mA]
p-p
Note 1
Note 2
Note 1 : Maximum Measurement ConditionΚBlack Patterm
Note 2ΚMeasure Condition
90%
3.3V
10%
0V
0.5ms
Vin rising time
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5.1.2 Signal Electrical Characteristics
Input signals shall be low or High-impedance state when VDD is off. It is recommended to refer the specifications of THC63LVDF84A(Thine Electronics Inc.) in detail.
Signal electrical characteristics are as follows;
Parameter Condition Min Max Unit
Differential Input High
Vth
Threshold (Vcm=+1.2V) 100 [mV]
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Differential Input Low
Vtl
Vcm
Note: LVDS Signal Waveform
V t
Threshold (Vcm=+1.2V) -100 [mV]
Differential Input
Common Mode Voltage
VSS
Vcm
1.125
1.375
[V]
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(
к
)
5.2 Backlight Unit
Parameter guideline for CCFL Inverter
Parameter Min Typ Max Units Condition
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White Luminance 5 points average 180 200 - [cd/m
CCFL current(ICCFL) 2.0 6.0 7 [mA] rms
CCFL Frequency(FCCFL) 50 55 60 [KHz]
CCFL Ignition Voltage(Vs)
CCFL Ignition Voltage(Vs)
CCFL Voltage (Reference)
CCFL)
(V
CCFL Power consumption
CCFL)
(P
Note 1: Typ are AUO recommended Design Points.
*1 All of characteristics listed are measured under the condition using the AUO Test inverter.
*2 In case of using an inverter other than listed, it is recommended to check the inverter carefully. Sometimes,
interfering noise stripes appear on the screen, and substandard luminance or flicker at low power may happen.
*3 In designing an inverter, it is suggested to check safety circuit very carefully. Impedance of CCFL, for
instance, becomes more than 1 [M ohm] when CFL is damaged.
*4 Generally, CCFL has some amount of delay time after applying kick-off voltage. It is recommended to keep
on applying kick-off voltage for 1 [Sec] until discharge.
*5 CCFL discharge frequency must be carefully chosen so as not to produce interfering noise stripes on the
screen.
*6 Reducing CCFL current increases CCFL discharge voltage and generally increases CCFL discharge
frequency. So all the parameters of an inverter should be carefully designed so as not to produce too much
leakage current from high-voltage output of the inverter.
Note 2: It should be employed the inverter which has “Duty Dimming”, if ICCFL is less than 4mA.
Note 3: CCFL discharge frequency should be carefully determined to avoid interference between inverter and TFT
LCD.
Note 4: The frequency range will not affect to lamp life and reliability characteristics.
1650
1460
700 730 945
- 4.38
[Volt] rms
[Volt] rms
[Volt] rms
2
[Watt]
]
Ta=25
(Ta=25к)
Note 2
(Ta=25к) Note 3,4
(Ta= 0к) Note 5
(Ta= 25к) Note 5
(Ta=25к) Note 6
(Ta=25к) Note 6
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Note 5: CCFL inverter should be able to give out a power that has a generating capacity of over 1,430 voltage.
Lamp units need 1,400 voltage minimum for ignition.
Note 6: Calculator value for reference (I
Note 7: Requirements for a system inverter design, which is intended to have a better display performance, a better
power efficiency and a more reliable lamp, are following.
It shall help increase the lamp lifetime and reduce leakage current.
a. The asymmetry rate of the inverter waveform should be less than 10%.
b. The distortion rate of the waveform should bewithin Ѕ2 10%.
* Inverter output waveform had better be more similar to ideal sine wave.
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CCFL×VCCFL=PCCFL)
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6. Signal Characteristic
6.1 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format.
0 1 1278 1680
1st Line
1050th Line
R G B R G B
R G B R G B
R G B R G B
R G B R G B
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6.2 The input data format
Signal Name Description
R5 R4 R3 R2 R1 R0
Red Data 5 (MSB) Red Data 4 Red Data 3 Red Data 2 Red Data 1 Red Data 0 (LSB)
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Red-pixel Data Each red pixel's brightness data consists of these 6 bits pixel data.
Red-pixel Data
G5 G4 G3 G2 G1 G0
Green Data 5 (MSB) Green Data 4 Green Data 3 Green Data 2 Green Data 1 Green Data 0 (LSB)
Green-pixel Data Each green pixel's brightness data consists of these 6 bits pixel data.
Green-pixel Data B5 B4 B3 B2 B1 B0
Blue Data 5 (MSB)
Blue Data 4
Blue Data 3
Blue Data 2
Blue Data 1
Blue Data 0 (LSB)
Blue-pixel Data Each blue pixel's brightness data consists of these 6 bits pixel data.
Blue-pixel Data RxCLKIN Data Clock The typical frequency is 64.9 MHZ.. The signal
is used to strobe the pixel data and DE signals. All pixel data shall be valid at the falling edge when the DE signal is high.
DE Display Timing This signal is strobed at the falling edge of
RxCLKIN. When the signal is high, the pixel
data shall be valid to be displayed. VS Vertical Sync The signal is synchronized to RxCLKIN . HS Horizontal Sync The signal is synchronized to RxCLKIN .
Note: Output signals from any system shall be low or High-impedance state when VDD is off.
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6.3 Signal Description/Pin Assignment
LVDS is a differential signal technology for LCD interface and high speed data transfer device.
PIN# Signal Name Description
1 GND Ground
2 VDD +3.3V Power Supply (typical)
3 VDD +3.3V Power Supply (typical)
4V
5 NC Reserved for supplier test point
6 CLK
7 DATA
8 RxIN0- LVDS differential data input(R0-R5, G0) (odd pixels)
9 RxIN0+ LVDS differential data input(R0-R5, G0) (odd pixels)
10 GND Ground
11 RxIN1- LVDS differential data input(G1-G5, B0-B1) (odd pixels)
12 RxIN1+ LVDS differential data input(G1-G5, B0-B1) (odd pixels)
13 GND Ground
14 RxIN2- LVDS differential data input(B2-B5, HS, VS, DE) (odd pixels)
15 RxIN2+ LVDS differential data input(B2-B5, HS, VS, DE) (odd pixels)
16 GND Ground
17 RxCLKIN- LVDS differential clock input (odd pixels)
18 RxCLKIN+ LVDS differential clock input (odd pixels)
19 GND Ground
EDID
EDID
EDID
+3.3V EDID Power
EDID Clock Input
EDID Data Input
20 Even_RxIN0- LVDS differential data input (R0-R5,G0) (even pixels)
21 Even_RxIN0+ LVDS differential data input (R0-R5,G0) (even pixels)
22 GND Ground
23 Even_RxIN1- LVDS differential data input (G1-G5,B0-B1) (even pixels)
24 Even_RxIN1+ LVDS differential data input (G1-G5,B0-B1) (even pixels)
25 GND Ground
26 Even_RxIN2- LVDS differential data input (B2-B5,HS,VS,DE) (even pixels)
27 Even_RxIN2+ LVDS differential data input (B2-B5,HS,VS,DE) (even pixels)
28 GND Ground
29 Even_RxCLKIN- LVDS differential clock input (even pixels) , 2.1V
30 Even_RxCLKIN+ LVDS differential clock input (even pixels) , 2.1V
μNote 1νRelation between LVDS signals and actual data shows below section(4-2).
μNote 2νThe shielding case is connected with signal GND.
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NC
r
Note1: Start from right side
Connecto
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30
Note2: Input signals shall be low or High-impedance state when VDD is off.
1
GND
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internal circuit of LVDS inputs are as following. The module uses a 100ohm resistor between positive and negative data lines of each receiver input
Signal Input
Pin No.
8
9
11
12
14
15
RxIN0-
R
RxIN0+
RxIN1-
R
RxIN1+
RxIN2-
R
RxIN2+
LVDS Receiver
17
18
RxCLKIN-
R
RxCLKIN+
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6.4 Interface Timing
6.4.1 Timing Characteristics
Basically, interface timings should match the 1680x1050 /60Hz manufacturing guide line timing.
Parameter Symbol Min. Typ. Max. Unit
Frame Rate - 50 60 - Hz
Clock frequency 1/ T
Period T
Vertical
Active T
Section
Blanking T
Period T
Horizontal
Active T
Section
Blanking T
Note : DE mode only
40 59.5 80 MHz
Clock
V
VD
VB
H
HD
HB
1080 1080 1080
1050 1050 1050
30 30 30
1840 1840 1840
1680 1680 1680
160 160 160
T
T
Clock
Line
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6.4.2 Timing diagram
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DOTCLK
Input Data
DE
DE
T
CLOCK
Invaild
Data
T
HB
Input Timing Definition ( DE Mode)
Pixel
1
T
VB
Pixel
2
T
Pixel
3
T
HD
H
T
V
Pixel
N-1
T
VD
Pixel
N
Invaild
Data
Pixel
1
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6.5 Power ON/OFF Sequence
VDD power and lamp on/off sequence is as follows. Interface signals are also shown in the chart. Signals from any system shall be Hi-Z state or low level when VDD is off.
T1
90%
90%
Power Supply VDD
Backlight On
10%
T2
T5
Power Sequence Timing
Parameter
Min. Typ. Max.
Value
VALID DATA
T6
T3
Units
T7
10%
T4
T1 0.5 - 10 (ms)
T2 0 - 50 (ms)
T3 0 - 50 (ms)
T4 400 - - (ms)
T5 200 - - (ms)
T6 200 - - (ms)
T7 0 - 10 (ms)
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AU OPTRONICS CORPORATION
7. Connector Description
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following components.
7.1 TFT LCD Module
Connector Name / Designation For Signal Connector
Manufacturer JAE or compatible
Type / Part Number FI-XB30SL-HF10 or compatible
Mating Housing/Part Number FI-X30H or compatible
7.2 Backlight Unit
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following components.
Connector Name / Designation For Lamp Connector
Manufacturer JST
Type / Part Number BHSR-02VS-1
Mating Type / Part Number SM02B-BHSS-1-TB
7.3 Signal for Lamp connector
Pin # Cable color Signal Name
1 Red Lamp High Voltage
2
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White Lamp Low Voltage
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8. Vibration and Shock Test
8.1 Vibration Test
Test Spec:
z Test method: Non-Operation
z Acceleration: 2.16G
z Frequency: 10 - 500Hz Random
z Sweep: 30 Minutes each Axis (X, Y, Z)
8.2 Shock Test Spec:
Test Spec:
z Test method: Non-Operation
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Product Specification
AU OPTRONICS CORPORATION
z Acceleration: 220 G , Half sine wave
z Active time: 2 ms
z Pulse: X,Y,Z .one time for each side
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9. Reliability
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Product Specification
AU OPTRONICS CORPORATION
Items
Temperature Humidity Bias High Temperature Operation Low Temperature Operation
On/Off Test
Hot Storage
Cold Storage
Thermal Shock Test
Hot Start Test
Cold Start Test
Shock Test (Non-Operating)
Vibration Test (Non-Operating)
Required Condition Note
40к/95%,250Hr
50к/Dry,250Hr
0к,250Hr
25к,150hrs(ON/10 sec. OFF/10sec., 30,000 cycles) 60к/35% RH ,240 hours
-20к/50% RH ,240 hours
-20к/30 min ,60к/30 min 100cycles 50к/1 Hr min. power on/off per 5 minutes, 5 times 0к/1 Hr min. power on/off per 5 minutes, 5 times
200G, 2ms, Half-sine wave, 3 times for each ±x,y,z direction
Random vibration, 2.16 G zero-to-peak, 10 to 500 Hz,
30 mins in each of three mutually perpendicular axes.
ESD
Contact : 8KV/ operation
Note 1
Air : 15KV / operation
Room temperature Test
Note1: According to EN61000-4-2 , ESD class B: Some performance degradation allowed. No data lost
. Self-recoverable. No hardware failures.
Note2: CCFL Life time: 10,000 hours minimum under normal module usage.
Note3: MTBF (Excluding the CCFL): 30,000 hours with a confidence level 90%
25к, 2000hours, Operating with loop pattern
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10. Mechanical Characteristics
10.1 LCM Outline Dimension
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10.2 Screw Hole Depth and Center Position
Screw hole minimum depth, from side surface =2.55 mm (See drawing)
Screw hole center location, from front surface = 3.7 r 0.2mm (See drawing) Screw Torque: Maximum 2.5 kgf-cm
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11. Shipping and Package
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B154SW01
11.1 Shipping Label Format
Week code
QD15AL01 Rev04
Model name
Control code
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11.2. Carton package
The outside dimension of carton is 455 (L)mm x 380 (W)mm x 355 (H)mm
11.3 Shipping package of palletizing sequence
11.3 Shipping package of palletizing sequence
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ʳ
ʳ
12. Appendix: EDID description
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Address FUNCTION Value Value Value Note
HEX
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
B154SW01 V7 EDID Code Release time 2006/10/20 00:00
Header 00 00000000 0
ʳ FF 11111111 255
ʳ FF 11111111 255
ʳ FF 11111111 255
ʳ FF 11111111 255
ʳ FF 11111111 255
ʳ FF 11111111 255
ʳ 00 00000000 0
EISA Manuf. Code LSB 06 00000110 6
Compressed ASCII AF 10101111 175
΁ΣΠΕΦΔΥʹΠΕΖ
ΙΖΩͽ΄ͳΗΚΣΤΥ
32-bit ser # 00 00000000 0
HEX BIN DEC
7B 01111011 123
17 00010111 23
0D
0E
0F
10
11
12
13
14
15
16
17
18
19
1A
1B
ʳ 00 00000000 0
ʳ 00 00000000 0
ʳ 00 00000000 0
Week of manufacture 01 00000001 1
Year of manufacture 10 00010000 16
EDID Structure Ver. 01 00000001 1
EDID revision # 03 00000011 3
Video input def. (digital I/P, non-TMDS, CRGB)
Max H image size (rounded to cm)
Max V image size (rounded to cm)
Display Gamma (=(gamma*100)-100)
Feature support (no DPMS, Active OFF, RGB, tmg
Blk#1)
Red/green low bits (Lower 2:2:2:2 bits)
Blue/white low bits (Lower 2:2:2:2 bits)
Red x (Upper 8 bits)
80 10000000 128
22 00100010 34
16 00010110 22
78 01111000 120
0A 00001010 10
FF 11111111 255
D5 11010101 213
90 10010000 144
1C
1D
1E
1F
20
21
22
Red y/ higher 8 bits 51 01010001 81
Green x 50 01010000 80
Green y 8D 10001101 141
Blue x 2A 00101010 42
Blue y 29 00101001 41
White x 50 01010000 80
White y 54 01010100 84
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23
24
25
26
27
28
29
2A
2B
2C
2D
2E
2F
30
31
32
Established timing 1 00 00000000 0
Established timing 2 00 00000000 0
Established timing 3 00 00000000 0
Standard timing #1 01 00000001 1
ʳ 01 00000001 1
Standard timing #2 01 00000001 1
ʳ 01 00000001 1
Standard timing #3 01 00000001 1
ʳ 01 00000001 1
Standard timing #4 01 00000001 1
ʳ 01 00000001 1
Standard timing #5 01 00000001 1
ʳ 01 00000001 1
Standard timing #6 01 00000001 1
ʳ 01 00000001 1
Standard timing #7 01 00000001 1
33
34
35
36 Pixel Clock/10000 LSB
37 Pixel Clock/10000 USB
38
39
3A
3B
3C
3D
3E HorzSync. Offset
3F HorzSync.Width
40 VertSync.Offset : VertSync.Width
41
42 Horizontal Image Size Lower 8bits
Horz active Lower 8bits
Horz blanking Lower 8bits
HorzAct:HorzBlnk Upper 4:4 bits
Vertical Active Lower 8bits
Vertical Blanking Lower 8bits
Vert Act : Vertical Blanking (upper 4:4 bit)
Horz&Vert Sync Offset/Width Upper 2bits
Standard timing #8 01 00000001 1
ʳ 01 00000001 1
ʳ 01 00000001 1
7C 01111100 124
2E 00101110 46
90 10010000 144
A0 10100000 160
60 01100000 96
1A 00011010 26
1E 00011110 30
40 01000000 64
30 00110000 48
20 00100000 32
36 00110110 54
00 00000000 0
58 01011000 88
43 Vertical Image Size Lower 8bits
44 Horizontal & Vertical Image Size (upper 4:4 bits)
45
46 Vertical Border (zero for internal LCD)
47 Signal (non-intr, norm, no stero, sep sync, neg pol)
48
49
4A
4B
Horizontal Border
(zero for internal LCD) 00 00000000 0
Detailed timing/monitor 00 00000000 0
descriptor #2 00 00000000 0
ʳ 00 00000000 0
ʳ 0F 00001111 15
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DE 11011110 222
10 00010000 16
00 00000000 0
18 00011000 24
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4C
4D
4E
4F
50
51
52
53
54
55
56
57
58
59
5A
5B
ʳ 00 00000000 0
ʳ 00 00000000 0
ʳ 00 00000000 0
ʳ 00 00000000 0
ʳ 00 00000000 0
ʳ 00 00000000 0
ʳ 00 00000000 0
ʳ 00 00000000 0
ʳ 00 00000000 0
ʳ 00 00000000 0
ʳ 00 00000000 0
ʳ 00 00000000 0
ʳ 00 00000000 0
ʳ 20 00100000 32
Detailed timing/monitor 00 00000000 0
descriptor #3 00 00000000 0
5C
5D
5E
5F
60
61
62
63
64
65
66
67
68
69
6A
6B
ʳ 00 00000000 0
ʳ FE 11111110 254
ʳ 00 00000000 0
Manufacture 41 01000001 65
Manufacture 55 01010101 85
Manufacture 4F 01001111 79
ʳ 0A 00001010 10
ʳ 20 00100000 32
ʳ 20 00100000 32
ʳ 20 00100000 32
ʳ 20 00100000 32
ʳ 20 00100000 32
ʳ 20 00100000 32
ʳ 20 00100000 32
ʳ 20 00100000 32
ʳ 20 00100000 32
A
U
O
6C
6D
6E
6F
70
71
72
73
74
Detailed timing/monitor 00 00000000 0
descriptor #4 00 00000000 0
ʳ 00 00000000 0
ʳ FE 11111110 254
ʳ 00 00000000 0
Manufacture P/N 42 01000010 66
Manufacture P/N 31 00110001 49
Manufacture P/N 35 00110101 53
Manufacture P/N 34 00110100 52
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B
1
5
4
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75
76
77
78
79
7A
7B
7C
7D
7E
7F
Manufacture P/N 53 01010011 83
Manufacture P/N 57 01010111 87
Manufacture P/N 30 00110000 48
Manufacture P/N 31 00110001 49
Manufacture P/N 20 00100000 32
Manufacture P/N 56 01010110 86
Manufacture P/N 37 00110111 55
ʳ 20 00100000 32
ʳ 0A 00001010 10
Extension Flag 00 00000000 0
Checksum 49 01001001 73
S
W
0
1
V
7
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