QCT 1S1EZZZ0ST2 User Manual
STRATOS S910 Series
S910-X31E
High Efficient,Dependable,
and Intelligent 3U Microserver
User's Guide
Document Version: 1.0.3
CONVENTIONS
WARNING!
CAUTION!
Note:
Conventions
Several different typographic conventions are used throughout
this technical guide. Refer to the following examples for common usage.
Bold type face denotes menu items, buttons and application
names.
Italic type face denotes references to other sections, and the
names of the folders, menus, programs, and files.
<Enter> type face denotes keyboard keys.
Warning information appears before the text it references and
should not be ignored as the content may prevent damage to
the device.
CAUTIONS APPEAR BEFORE THE TEXT IT REFERENCES, SIMILAR TO
NOTES AND WARNINGS. CAUTIONS, HOWEVER, APPEAR IN CAPITAL
LETTERS AND CONTAIN VITAL HEALTH AND SAFETY INFORMATION.
Highlights general or useful information and tips.
XIV
ACRONYMS
Acronyms
T
TERM DEFINITION
A/D Analog to Digital
ACPI Advanced Configuration and Power Interface
ASF Alerting Standard Forum
Active-high (positive true) signals are asserted when in
Asserted
BIOS Basic Input/Output System
BIST Built-In Self Test
BMC
Bridge
BSP Bootstrap processor
Byte 8-bit quantity
CLI Command Line Interface
CMOS
CPU Central Processing Unit
the high electrical state (near power potential). Activelow (negative true) signals are asserted when in the
low electrical state (near ground potential).
At the heart of the IPMI architecture is a microcontroller
called the Baseboard management controller (BMC)
Circuitry connecting one computer bus to another,
allowing an agent on one to access the other
In terms of this specification, this describes the PC-AT
compatible region of battery-backed 128 bytes of memory, which normally resides on the baseboard
Deasserted
DTC Data Transfer Controller
EEPROM
EMP Emergency Management Port
FRU Field Replaceable Unit
GB 1024 MB.
GPIO General Purpose Input/Out
HSC Hot-Swap Controller
Hz Hertz (1 cycle/second)
I
IANA Internet Assigned Numbers Authority
IBF Input buffer
ICH I/O Controller Hub
ICMB Intelligent Chassis Management Bus
IERR Internal Error
IP Internet Protocol
IPMB Intelligent Platform Management Bus
IPMI Intelligent Platform Management Interface
ERM DEFINITION
A signal is deasserted when in the inactive state.
Active-low signal names have “_L” appended to the
end of the signal mnemonic. Active-high signal names
have no “_L” suffix. To reduce confusion when referring
to active-high and active-low signals, the terms one/
zero, high/low, and true/false are not used when
describing signal states.
Electrically Erasable Programmable Read-Only Memory
2
C
Inter-Integrated Circuit bus
XV
ACRONYMS
T
ERM DEFINITION
ITP In-Target Probe
KB 1024 bytes.
KCS Keyboard Controller Style
KVM Keyboard, Video, Mouse
LAN Local Area Network
LCD Liquid Crystal Display
LCT Lower Critical Threshold
LED Light Emitting Diode
LNCT Lower Non-Critical Threshold
LNRT Lower Non-Recoverable Threshold
LPC Low Pin Count
LSI Large Scale Integration
LUN Logical Unit Number
MAC Media Access Control
MB 1024 KB
MD2 Message Digest 2 – Hashing Algorithm
MD5
Message Digest 5 – Hashing Algorithm – Higher Security
Ms Milliseconds
Mux Multiplexer
NIC Network Interface Card
NMI Non-maskable Interrupt
NM Node Management
OBF Output buffer
OEM Original Equipment Manufacturer
Ohm Unit of electrical resistance
PDB Power Distribution Board
T
ERM DEFINITION
PEF Platform Event Filtering
PEP Platform Event Paging
PERR Parity Error
POH Power-On Hours
POST Power-On Self Test
PWM Pulse Width Modulation
RAC Remote Access Card
RAM Random Access Memory
RMCP Remote Management Control Protocol
ROM Read Only Memory
RTC
Real-Time Clock. Component of the chipset on the
baseboard.
RTOS Real Time Operation System
SCI Serial Communication Interface
SDC SCSI Daughter Card
SDR Sensor Data Record
SEEPROM
Serial Electrically Erasable Programmable Read-Only
Memory
SEL System Event Log
SERR System Error
2
C protocol. The
SMBus
A two-wire interface based on the I
SMBus is a low-speed bus that provides positive
addressing for devices, as well as bus arbitration
SMI
Server Management Interrupt. SMI is the highest priority non-maskable interrupt
SMM Server Management Mode
SMS Server Management Software
SNMP Simple Network Management Protocol
XVI
ACRONYMS
T
ERM DEFINITION
SOL Serial Over LAN
UART Universal Asynchronous Receiver/Transmitter
UCT Upper Critical Threshold
UDP User Datagram Protocol
UNCT Upper Non-Critical Threshold
UNRT Upper Non-Recoverable Threshold
WDT Watchdog Timer
Word 16-bit quantity
XVII
SAFETY INFORMATION
Safety Information
Important Safety Instructions
Read all caution and safety statements in this document before
performing any of the instructions.
Warnings
Heed safety instructions: Before working with the server,
whether using this technical guide or any other resource as a
reference, pay close attention to the safety instructions. Adhere
to the assembly instructions in this technical guide to ensure
and maintain compliance with existing product certifications and
approvals. Use only the described, regulated components
specified in this technical guide. Use of other products / components will void the UL listing and other regulatory approvals of
the product and will most likely result in non-compliance with
product regulations in the region(s) in which the product is sold.
System power on/off: The power button DOES NOT turn off
the system AC power. To remove power from system, you must
unplug the AC power cord from the wall outlet. Make sure the
AC power cord is unplugged before opening the chassis, adding, or removing any components.
Hazardous conditions, devices and cables: Hazardous elec-
trical conditions may be present on power, telephone, and communication cables. Turn off the server and disconnect the
power cord, telecommunications systems, networks, and
modems attached to the server before opening it. Otherwise,
personal injury or equipment damage can result.
Electrostatic discharge (ESD) and ESD protection: ESD can
damage drives, boards, and other parts. We recommend that
you perform all procedures in this chapter only at an ESD workstation. If one is not available, provide some ESD protection by
wearing an antistatic wrist strap attached to chassis ground any
unpainted metal surface on the server when handling parts.
ESD and handling boards: Always handle boards carefully.
They can be extremely sensitive to electrostatic discharge
(ESD). Hold boards only by their edges. After removing a board
from its protective wrapper or from the server, place the board
component side up on a grounded, static free surface. Use a
conductive foam pad if available but not the board wrapper. Do
not slide board over any surface.
Installing or removing jumpers: A jumper is a small plastic
encased conductor that slips over two jumper pins. Some jumpers have a small tab on top that can be gripped with fingertips
or with a pair of fine needle nosed pliers. If the jumpers do not
have such a tab, take care when using needle nosed pliers to
remove or install a jumper; grip the narrow sides of the jumper
with the pliers, never the wide sides. Gripping the wide sides
can damage the contacts inside the jumper, causing intermittent
problems with the function controlled by that jumper. Take care
to grip with, but not squeeze, the pliers or other tool used to
remove a jumper, or the pins on the board may bend or break.
XVIII
REVISION HISTORY
Revision History
Refer to the table below for the updates made to this technical guide.
201
DATE CHAPTER UPDATES
2013.10 Version 1.0.0 official release
2013.12 ~ 2014.04 Version 1.0.1 official release
2014.06 Version 1.0.2 official release
2014.09 Version 1.0.3 official release
Copyright
Copyright © 2014 Quanta Computer Inc. This publication,
including all photographs, illustrations and software, is protected under international copyright laws, with all rights
reserved. Neither this technical guide, nor any of the material
contained herein, may be reproduced without the express written consent of the manufacturer. All trademarks and logos are
copyrights of their respective owners.
Version 1.0.3 / 2014 - 09
XIX
Disclaimer
The information in this document is subject to change without
notice. The manufacturer makes no representations or warranties with respect to the contents hereof and specifically disclaims any implied warranties of merchantability or fitness for
any particular purpose. Furthermore, the manufacturer reserves
the right to revise this publication and to make changes from
time to time in the content hereof without obligation of the manufacturer to notify any person of such revision or changes.
For the latest information and updates please see
www.QuantaQCT.com
All the illustrations in this technical guide are for reference only
and are subject to change without prior notice.
REVISION HISTORY
About the Book
This technical guide is written for system technicians who are
responsible for troubleshooting, upgrading, and repairing the
server chassis. This document provides an overview of the
hardware features of the chassis, troubleshooting information,
and instructions on how to add and replace components of the
multi-node server series. The document also provides information on the BIOS, and Baseboard Management Controller
(BMC).
For the latest version of this technical guide, see
www.QuantaQCT.com.
XX
About the Server
Chapter 1
ABOUT THE SERVER INTRODUCTION
1.1. Introduction
System Features
The 3U chassis of STRATOS S910-X31E compromises up to 9
or 12 server nodes (sleds). The microserver system is built on
the latest Intel’s 22 nm-manufacturing technology, supporting
Intel® Xeon® product family processors like E3-1200 v3.
The compute density of STRATOS S910-X31E is four times
higher than three traditional one-socket 1U servers stacked
together. With the special multi-node design, the microserver
system is optimized for the applications of dedicated hosting,
front-end web, content delivery networks (CDN), and cloud
computing.
See more details on system features in the following section.
Specifications
System Specifications
SPECIFICATION DESCRIPTION
Form Factor X3 (3U chassis)
Chassis Size
(W x L x H)
447 mm x 758.0 mm x 130.8 mm
17.6" x 29.8" x 5.1"
System Specifications (Continued)
SPECIFICATION DESCRIPTION
Mainboard Size
(W x L )
Processor
Chipset
SAS Controller
Memory
254.0 mm x 118.9 mm
10.0" x 4.7"
9-Sled
®
C226
®
Xeon® processor E3-1200 v3 family
®
Xeon® processor E3-1200 v3 family
(1) Intel
per node, up to 84W
12-Sled
(1) Intel
per node, up to 82W
Intel
9-Sled
Quanta LSISAS 2308 mezzanine card (optional)
12-Sled
N/A
9-Sled
(4) DDR3 1333/1600 MHz ECC UDIMM slots
per sled, up to 32 GB
12-Sled
(4) DDR3 1333/1600 MHz ECC VLP UDIMM
slots per sled, up to 32 GB
1-1
ABOUT THE SERVER SYSTEM FEATURES
System Specifications (Continued)
SPECIFICATION DESCRIPTION
9-Sled
(4) 2.5" SATAIII or SASII HDD per sled or
Drive Bay
Onboard Storage
Device
PCIe Expansion
(2) 3.5" SATAIII or SASII HDD per sled
12-Sled
(4) 2.5" SATAII HDD per sled or
(2) 3.5" SATAII HDD per sled
9-Sled/12-Sled
(4) SATA connector signals from Intel
9-Sled/12-Sled
(1) SDHC (optional)
9-Sled
(1) PCIe x8 G3 Quanta LSISAS/RAID 2308
mezzanine slot or
(1) PCIe x8 G2 10GbE SFP+ mezzanine slot
12-Sled
N/A
®
C226
System Specifications (Continued)
SPECIFICATION DESCRIPTION
9-Sled/12-Sled
®
Intel
SW RAID
2.5” HDD SKU
®
C226 RAID 0/1/10/5
®
C226 RAID 0/1
RAID 0/1/10
RAID 0/1/10
®
Powerville i350 GbE RJ45 ports per
Software RAID
Options
Network
Intel
3.5” HDD SKU
Intel
9-Sled
LSI SW RAID
2.5” HDD SKU
Quanta LSISAS 2308 mezzanine card for
3.5” HDD SKU
Quanta LSISAS 2308 mezzanine card for
(2) Intel
sled, share NIC 10/100 Mbps for management
on NIC1
(2) 10GbE SFP+ ports for uplink on chassis via
the built-in switch (optional)
1-2
Management Port
Integrated Graphics BMC
(1) Dedicated 10/100 RJ45 management port on
the system
Aspeed AST2300 8M DDR3 video memory
ABOUT THE SERVER SYSTEM FEATURES
System Specifications (Continued)
SPECIFICATION DESCRIPTION
(2) USB 2.0 + (1) VGA (by Y-cable) per sled
(2) GbE RJ45 per sled
Front I/O
Power Supply
TPM
(1) 10/100 RJ45 management port on the sys-
tem
(1) Switch console port on the system (optional)
(2) 10GbE SFP+ ports on the system (optional)
(2) high efficiency redundant PSU, 80+ Platinum at
230VAC (meet EPA, CSCI)
1200W at 200-240VAC, 50/60 Hz
1000W at 100-127VAC, 50/60 Hz
Yes (optional)
SDHC and TPM share the same onboard connec-
tor and cannot be used simultaneously.
Node Management Support
System Management
Operating Environment
Yes
IPMI v2.0 Compliant, on board "KVM over IP" support
Operating temperature: 10
o
F)
95
Non-operating temperature: -40
o
F to 158oF)
(-40
Operating relative humidity: 50% to 85% RH
Non-operating relative humidity: 20% to 95%
o
C to 35oC (50oF to
o
C to 70oC
RH
1-3
ABOUT THE SERVER PACKAGE CONTENTS
1.2. Package Contents
(1) 3U chassis
(9) or (12) sleds
(9) or (12) processor heat sinks (one per sled)
(2) power supply
(2) power cord (optional)
(1) utility CD (Technical Guide included)
(1) rail kit
(1) Y cable
(1) X3 Ethernet switch (optional)
(1) console cable
1-4
ABOUT THE SERVER A TOUR OF THE SYSTEM
1.3. A Tour of the System
System Block Diagrams
S910-X31E With X3 Ethernet Switch
System Block Diagram With X3 Switch
1-5
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