PowerTech 486DX, 486SX User's Manual

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Page 1

User's Manual for 486DX/SX

VL-Bus with Deep Green Main Board

WESPEED YOUR WORLD

Page 2

MB 455/456 80486 VL-BUS MAIN BOARD with Deep Green PC

470-024551990

Page 3

USER'S MANUAL

CHAPTER 1 INTRODUCTION


2
3
1

CHAPTER 2 CONFIGURATION

Jumper Setting and Connector	5
2-1 CPU type select	5
2-2 Cache size setting	6
2-3 VESA BUS jumper	7
2-4 CPU clock setting	7
2-5 CPU power setting	8
2-6 Other on board jumper setting	9
2-7 DRAM installation	10
2-8 CACHE MEMORY INSTALL	12
CHAPTER 3 SYSTEM BIOS SETUP
Award BIOS Setup	13
3-1 Standard CMOS Setup	14
3-2 BIOS Feature Setup	15
3-3 Chipset Feature Setup	16

3-4 Power management Setup ....................................

Page 4

CHAPTER 4 APPENDIX
A ISA slot pin out specification	.21
B Summary of VL-Bus feature	23
C Installing CPU	26
D AT Technical information	27
D-1: I/O & Memory map	27
D-2: TIMER & DMA channels	28
D-3: INTERRUPT map	29
D-4: RTC & CMOS RAM map	30

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Chapter 1

Feature

CPU TYPE

Intel 486SX,486DX,486DX2,486DX4, Overdrive P24T,P24D,P24C and S-series SMM CPU AMD 486DX,DX2,DXL,DXL2/66 Cyrix M6, M7 UMC 486 CPU

Cache memory : 64KB/128KB/256KB 2nd CACHE memory selectable Write-back direct mapped CACHE operation Supports SRAM type 8Kx8, 32Kx8, 64Kx8

Main Memory : 64MB max on board Using 256K, 1M, 4M and 16M SIMM DRAM Supports 30pin and 72pin SIM module and auto - banking of every DRAM banks

I/O Slot : 3 VL-BUS Slots, Seven 16-bit ISA Slots,

BIOS : Award, AMI or other

Dimension : 25 cm x 22 cm

CPU Vcc Input : MB 455 for 5V only MB 456 supports 5V, 3.45V, 3V Voltage

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Green Function

Supports the EPA Energy Star PC specification with Deep Green system Design. It supports the advanced SMM CPU. Accommodated with Intel S series CPU or AMD DXL, DXL2 CPU, system performs stop clock mode. The function for power saving options are:

. HDD Standby Timer : The Hard disk entering power down mode.

. Display Power Down : The display screen will be closed.

System power down mode : Full-on : System runs in full speed CPU clock Doze : Sytem runs in lower CPU clock Standby : System scales-down the CPU clock Suspend : With SMM CPU, performs stop clock in suspend mode

Pressing any Key or moving Mouse to Wake up the system.

Page 7

Page 8

System Board Layout

U24 5V -> 3V Regulator -

Page 9

Chapter 2 Jumper setting and connector

2-1 CPU TYPE SELECT:


	JP11	JP12	JP13	JP17	JP18	JP19
486SX	OPEN	2 - 3	2 - 3	OPEN	OPEN	OPEN
486DX	OPEN	2-3	1 - 2 3 - 4	1-2	OPEN	OPEN
486DX-SL	1 - 2	1-2	1 - 2 3 - 4	1 - 2	5 - 6	1 - 2 3 - 4
P24D	1 - 2 4 - 5	1 - 2 4 - 5	1 - 2 3 - 4	1-2	3 - 4 5 - 6	1 - 2 3 - 4
P24T	1-2	1-2	1 - 2 3 - 4	2-3	5 - 6	1 - 2 3 - 4
M6 Cyrix	1 - 2 3 - 4 5 - 6 #	1 - 2 3 - 4 5 - 6	2-3	OPEN	2 - 3 4 - 5	2 - 3 4 - 5
M7 Cyrix	1 - 2 3 - 4 5 - 6 #	1 - 2 3 - 4 5 - 6	1 - 2 3 - 4	1-2	2 - 3 4 - 5	2-3
AMD486DXL	2-3	2-3	1 - 2 3 - 4	1 - 2 3 - 4	1 - 2	OPEN
UMC486	2 - 3	2-3	2-3	3 - 4	1 - 2	OPEN

MARK ' # ' IS FOR DOUBLE CLOCK

P24C : Jumper setting is same as 486DX-SL JP20 : OPEN : --> INT. CLK x 3 1 - 2 : --> x 2.5 2 - 3 : --> x 2 Others type CPU this (JP20) is open

Page 10

Jumper Location :

2-2 CACHE SIZE SETTING :

	256K TWO BANK 32K x 8	256K ONE BANK 64K x 8	128K	64K
JP7	ON	ON	OFF	OFF
JP8	ON	ON	ON	OFF
JP9	2-3	1 - 2 , 3 - 4	1 - 2	OPEN
JP10	2-3	1 - 2	1 - 2	2 - 3

SRAM Jumper location :

Page 11

2-3 VESA BUS JUMPER

JP21 -- Close for VESA clock > 33 MHz Open for VESA clock <= 33 MHz
JP22 -- Close for VESA 1 wait state Open for VESA 0 wait state

Jumper location :

2-4 CPU CLOCK SETTING:

	JP6	JP5	JP4
25MHz	CLOSE	OPEN	OPEN
33MHz	CLOSE	CLOSE	CLOSE
100ALL-	CLOSE	CLOSE	OPEN

40MHzCLOSECLOSEOLOSEOLOSE50MHzOPENOPENOPENCLOSE

JP30 : Normal close for output clock speed select

Page 12

Jumper Location :

2 - 5 CPU POWER SETTING U24 for 5V --> 3.3V, 3.45V regulator, LT 1085 must be installed (for Model : MB456 only)

	JP14	JP15	JP16	JP23
3.3V	1 - 2	1 - 2	1 - 2	CLOSE
3.45V	1 - 2	1 - 2	1 - 2	OPEN
5 V	2 - 3	2 - 3	2 - 3	OPEN

CPU

Jumper Location :

Page 13

2-6 OTHER ON BOARD JUMPER SETTING

P1 : Power Connector
KB1 : Keyboard Connector
JP26 : Hardware Reset
D1 : Turbo LED
JP27 : Turbo Switch
JP29 : Power LED and Key Lock
JP28 : Speaker

JP28

JP29

JP17 : Normal close for internal KBC. keylock
JP1 : For on board battery --> Normal 2 3 For extend battery --> Pin 1 "+", Pin 4 "-"

JP27 JP26

Page 14

2-7 DRAM INSTALLATION

The memory is capable of supporting a minimum 1 Megabyte of memory up to total 64 megabytes memory. The 256KB /1MB / 4MB/16MB SIMM memory are available.

The mainboard allows you to install and expand the system memory via on board four 30-pin SIMM and two 72-pin SIMM sockets. It supports fast-page mode DRAM SIMM memory, with a minimum 70ns RAS (Row Address Strobe) access time. There are four banks of memory (Bank0/1/2/3), you don't care which one is Bank0 because the BIOS will automatically test which one is Bank0.

DRAM TYPE SUPPORT :

30-pin SIMM (1 Bank) + 72-pin DRAM single bank + 72-pin DRAM double bank BK0/2, BK1/3 for 72-pin SIMM double density, BK2 for 30-pin SIMM.

Before you even consider altering the memory configuration on your main-board, please read this section as below:

Page 15

Note : If Bank2 has been installed, the bank 'BK0/2' cann't be used double density SIMM. you just use single side 72pin SIMM. Because the BK2 was being used for 30-pin SIMM. So if you want to use BK2(30-pin) and BK0/2(72pin) at the sametime then the BK0/2(72-pin) SIMM must be used as single side SIMM.

Page 16

2-8 CACHE MEMORY INSTALL

This mainboard supports Cache SRAM configurations: 64KB,128KB and 256KB.

Before you can consider altering the CACHE memory configuration on your main-board, please read this section as below:

	U14	U10 - U13	U17 - U20
	TAG.R	BANK 0	BANK 1
64KB	8Kx8	8Kx8	8Kx8
128KB	32Kx8	32Kx8	32Kx8
256KB	32Kx8	32Kx8	32Kx8
256KB	32Kx8	64Kx8	None

SRAM Location :

Page 17

AWARD BIOS SETUP

When the system is being powered on or reset, the BIOS will display a copyright message on the first line of the screen, then the BIOS will perform the diagnostics and initialization. After all of the above tests have been passed, the message

"Press DEL to enter SETUP, ESC to skip memory test"

is displayed. If the [DEL] key or [ctrl-alt-esc] is pressed, the screen will be cleared and then the following message will be showed:

ROM ISA BIOS (XXXXXXXX) CMOS SETUP UTILITY AWARD SOFTWARE. INC.

STANDARD CMOS SETUP	PASSWORD SETTING
BIOS FEATURES SETUP	IDE HDD AUTO DETECTION
CHIPSET FEATURES SETUP	SAVE & EXIT SETUP
POWER MANAGEMENT SETUP	EXIT WITHOUT SAVING
LOAD BIOS DEFAULTS
LOAD SETUP DEFAULTS

Page 18

3 - 1 Standard CMOS Setup

Date (mn/date/year) : Sat, Jan 1 1994 Time (hh/min/sec) : 16 : 45 : 44
	CYLS	HEADS	PRECOMP	LANDZONE	SECTORS
Drive C: None ( 0Mb)	0	0	0	0	0
Drive D: None (0Mb)	0	0	0	0	0
Drive A: : 1.2M , 5.25 in.
			Base	Memory:	640K
Video : EGA/VGA			Extended	Memory: 3	328K
			Expended	Memory:	OK
Halt On : All Errors		Other Memory: 128K
			Total	Memory: 4	096K

The setup program is completely menu-driven:

1.Use arrow keys to select entry : Data, Time, Hard Disk(C/D), Floppy, and Display.
2.Use PgUp/PgDn key to modify the option of each entry.
3. Use Esc to exit this screen.

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3 - 2 BIOS Feature Setup

If you don't really understand the meanings of each item, please don't change the default values. The default setting maybe different from those shown below:

ROM ISA BIOS (XXXXXXX) BIOS FEATURES SETUP AWARD SOFTWARE, INC.

Virus Warning	: Disabled	System BIOS Shadow	: Enabled
CPU Internal Cache	: Enabled	Video BIOS Shadow	: Enabled
External Cache	: Enabled	C8000-CBFFF Shadow	: Disabled
Quick Power on Seft Test	: Enabled	CC000-CFFFF Shadow	: Disabled
Boot Sequence	: A, C	D0000-D3FFF Shadow	: Disabled
Swap Floppy Driver	: Disabled	D4000-D7FFF Shadow	: Disabled
Boot Up Floppy Seek	: Enabled	D8000-DBFFF Shadow	: Disabled
Boot Up NumLock Status	: On	DC000-DFFFF Shadow	: Disabled
Boot Up System Speed	: High	E0000-E3FFF Shadow	: Disabled
HDD IDE Block Mode	: Disabled	E4000-E7FFF Shadow	: Disabled
Gate A20 Option.	: Fast	E8000-EBFFF Shadow	: Disabled
Memory Parity Check	: Enabled	EC000-EFFFF Shadow	: Disabled
Typematic Reat Setting	: Disabled
Typematic Reat (Chars/Sec)	:6
Typematic Reat (Msec)	: 250
Security Option	: Setup

Page 20

3 - 3 Chipset Features Setup

The Chipset Features Setup is entirely chipset specific portion and requires full knowledge about the detail definition of UMC chipset. Each option is tightly corresponding with the hardware structure. Without our engineering change notice, we strongly recommend"don't change any contents in advanced chipset setup menu".

ROM ISA BIOS (XXXXXXXX) CHIPSET FEATURES SETUP AWARD SOFTWARE, INC.

Auto Configuration DRAM Wait State select DRAM Type L2 Cache Read Wait State L2 Cache Write Wait State L2 Cache Write Wait State Keyboard Controller Clock ISA Bus Clock Option System BIOS Cacheable IO Recovery (Bus/Onboard) Weitek Ready Out Delay Local Ready Delay Setting Signal LDEV# Sample Time CPU ADS# Delay 1T or Not	: Enabled : 2 WS : Normal Page : 3-2-2-2 : 2WS : 9.5 MHz : 01sabled : 01sabled : 01sabled : 5/ 3 : 2WS : 0elay 1T : 1n T2 : 0elay 1T : 1n T2	Alt Bit in Tag SRAM ISA Bus Refresh Mode DRAM Hiddern Refresh LOWA20# Emulation RC Reset Emulation Weitek type coprocessor Non-Cacheable Block 0 Size Non-Cacheable Block 0 Size Non-Cacheable Block 1 Size Non-Cacheable Block 1 Size Non-Cacheable Block 1 Size	: 7 + 1 Bit : Fast : Disabled : Disabled : Absent : Disabled : 1MB : 1000000H : Disabled : 1MB : 1000000H
Force Miss when Deturbo Hold CPU Percentage	: Disabled : 4/16

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3 - 4 Power Management Setup

Supporting the EPA Energy Star PC specification with Deep

Green system Design. It supports the advanced SMM CPU. Accommodated with Intel S series CPU or AMD DXL, DXL2 CPU, system performs stop clock mode. The function for power savings options are:

. HDD Standby Timer :

The Hard disk entering power down mode.

. Display Power Down :

The display screen will be closed.

. System power down mode :

Full-on : System runs in full speed CPU clock Doze : Sytem runs in lower CPU clock Standby : System scales-down the CPU clock Suspend : With SMM CPU, performs stop clock in suspend mode

Page 22

ROM ISA BIOS (XXXXXXXX) POWER MANAGEMENTSETUP AWARD SOFTWARE, INC.

Power Management	: Disabled	* Monitor Even In Full (	On Mode
		VESA Slave Activity	: Disabled
Video Off Method	: Blank Screen	LPT Port Activity	: Enabled
HDD Standby Timer	: Disabled	COM Port Activity	: Enabled
Doze Timer Select	: 512 Min	ISA Master Activity	: Enabled
Standby Timer Select	: 512 Min	IDE Activity	: Enabled
Inactive Timer Select	: 512 Min	Floppy Activity	: Enabled
	ODUL OLIZ MOA	VGA Activity	: Disabled
Control Item	: CPU CLK VGA	Keyboard Active	: Enabled
Doze mode Control	: 1/4 CLKI On
Standby Mode Control	: 1/8 CLKI Off
Inactive Mode Control	: STOP CLK Off
Suspend Switch Select	: Disabled

POWER MANAGEMENT Timer Selection :

Disabled : HDD Standby Timer : Disabled Doze Timer Select : 512 Min Standy Timer Select : 512 Min INactive Timer Select : 512 Min

Min Saving : HDD Standby Timer : 15 Min Doze Timer Select : 512 Min Standy Timer Select : 512 Min Inactive Timer Select : 512 Min

Max Saving : HDD Standby Timer : 1 Min

Doze Timer Select: 0.5 MinStandy Timer Select: 2 MinInactive Timer Select<td: 2 Min</td>

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Optimize : HDD Standby Timer : 3 Min Doze Timer Select : 8 Min Standy Timer Select : 8 Min Inactive Timer Select : 8 Min

User Define : HDD Standby Timer : Disabled Doze Timer Select : 512 Min Standy Timer Select : 512 Min Inactive Timer Select : 512 Min

Control Item Select :

CPU CLK : For CPU input Clock Control 1/4 CLKI --> Slow Down CPU to Clock/4 1/8 CLKI --> Slow Down CPU to Clock/8 STOP CLK --> CPU Clock Stop VGA : On --> Display screen open Off--> The display screen will be closed.

Wake up the system:

Pressing any Key or moving Mouse to Wake up the system.

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3-5 Standard type of hard disk

Tune	Sizo	Cylinders	Heads	Sec	W-Pcomp	L-Lone
Type	IOMB	306	4	17	128	305
1	20MB	615	4	17	300	615
2	20MB	615	6	17	300	615
3	62MB	940	8	17	512	940
4	AGMB	940	6	17	512	940
5	20MB	615	4	17	None	615
0	20MB	462	8	17	256	511
0	30MB	733	5	17	None	733
0	112MB	900	15	17	None	901
9	20MB	820	3	17	None	820
10	35MB	855	5	17	None	855
12	49MB	855	7	17	None	855
13	20MB	306	8	17	128	319
13	42MB	733	7	17	None	733
15	Reserve	ed be		and the second second
16	20MB	612	4	17	0	663
17	40MB	977	5	17	300	977
18	56MB	977	7	17	None	977
10	59MB	1024	7	17	512	1023
20	30MB	733	5	17	300	732
20	42MB	733	7	17	300	732
21	30MB	306	5	17	300	733
22	10MB	977	4	17	0	336
23	AOMB	1024	5	17	None	976
24	76MB	1224	9	17	None	1023
25	71MB	1224	7	17	None	1223
20	111MB	1224	11	17	None	1223
21	152MB	1024	15	17	None	1223
20	68MB	1024	8	17	None	1023
20	03MB	918	11	17	None	1023
21	83MB	925	11	17	None	1023
22	60MB	1024	0	17	None	926
22	05MD	1024	10	17	None	1023
24	102MD	1024	10	17	None	1023
34	1102MD	1024	12	17	None	1023
35	110MD	1024	13	17	None	1023
30	17MD	1024	14	17	None	1023
31	1/MB	1024	16	17	None	1023
38	136MB	1024	10	17	None	1023
39	II4MB	918	15	17	None	1023
40	40MB	820	6	17	None	1023
41	42MB	1024	5	17	None	1023
42	65MB	1024	5	26	None	1023
43	40MB	809	6	17	None	852
44	61MB	809	6	26	None	852
45	100MB	776	8	33	None	775
46	203MB	684	16	38	None	685
USER			1. J. J. 14	The section in

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APPENDIX A:

ISA SLOT PIN OUT SPECIFICATIONS :

2
)		A1 : IOCHCK#	A17: SA14
NN -		A2 : SD7	A18: SA13
		A3 : SD6	A19: SA12
		A4 : SD5	A20: SA11
10		A5 : SD4	A21: SA10
14		A6 : SD3	A22: SA9
14 41		A7 : SD2	A23: SA8
		A8 : SD1	A24: SA7
		A9 : SD0	A25: SA6
816		A10: IOCHRDY	A26: SA5
		A11: BAEN	A27: SA4
ר	С	A12: SA19	A28: SA3
•		A13: SA18	A29: SA2
11.11.4		A14: SA17	A30: SA1
and and		A15: SA16	A31: SA0
Sur 1		A16: SA15
1

Page 26

R1 · GND	C1 : SBHE#	D1 : MEMCS16#
B2 · SYSRST	C2 · SA23	D2 : IOCS16#
B2 · Vcc	C3 · SA22	D3 : IRQ10
$DJ \cdot VCC$ $DA \cdot IDOO$	C4 · SA21	D4 : IRQ11
D4 . INQ 9 D5 . 50	CS · SA20	D5 : IRO12
DJ - JV DG - DD()	C6 · SA19	D6 : IRÔ15
DO . DRQ ²	C7 · SA18	D7 · IRO14
DO . WCOH	CR · SA17	D8 · DACK0#
B8 : W30#	CO · MEMR#	D9 · DRO0
B9 T 12V	CIO NENAW	D10. DACK5#
BIU: GIND	CIU. IVILIVI VV T	D11. DROS
BII: SMENW#	CIA CDO	D12. DACK6#
BI2: SMEMK#	C12: SD9	D12. DACAOn D12. DD06
B13: IOW#	CIS: SDIU	DIJ. DACK7#
B14: IOR#	CI4: SDII	DI4. DACA/#
B15: DACK3#	CI5: SD12	DIS: DRQ/
B16: DRQ3	C16: SD13	DIG: VCC
B17: DACK1#	C17: SD14	DI7: MASIEK#
B18: DRQ1	C18: SD15	D18: GND
B19: RFSH#
B20: SYSCLK
B21: IRQ7
B22: IRÔ6
B23 · IRO5
B24· IRO4
R25. IRO3
D25. INQS D26. DACK2#
D20. DAUN2#
B27. IC DOG DATE

B28: BALE

B29: Vcc

B30: OSC B31: GND

Page 27

APPENDIX B:

SUMMARY OF VL-BUS FEATURES :

The VL - Bus design is capable of operating zero to three VL-Bus slots. A slotless VL - Bus device would physically reside directly on the mainboard. Regardless of the number of slots, the maximum number of devices supported is three. Loading requirements allow some VL-Bus implementations to connect directly to the CPU bus without buffering address, data, and control signals. Optionally, the VL-Bus may buffer address, data, and control signals. Optionally, the VL -Bus may buffer address, data, and control signals to meet the loading requirements of full three-slot implementations.

VL-BUS INTERFACE BLOCK DIAGRAM :

Page 28

VL-BUS PIN OUT SPECIFICATIONS


1 : PD1	29: PA18
2 : PD3	30: PA16
3 : GND	31: PA14
4 : PD5	32: PA12
5 : PD7	33: PA10
6 : PD9	34: PA8
7 : PD11	35: GND
8 : PD13	36: PA6
9 : PD15	37: PA4
10: GND	38: HITM#
11: PD17	39: BE0#
12: Vcc	40: Vcc
13: PD19	41: BE1#
14: PD21	42: BE2#
15: PD23	43: GND
16: PD25	44: BE3#
17: GND	45: PADS#
18: PD27	46: LRDY#
19: PD29	47: LDEV2#
20: PD31	48: LREQ2#
2:1: PA30	49: GND
22: PA28	50: LGNT#
23: PA26	51: Vcc
24: GND	52: ID2
25: PA24	53: ID3
26: PA22	54: GND
27: Vcc	55: KEN#
28: PA20	56: PEADS#

Page 29

-
5	7: PD0	85:	GND
58	8: PD2	86:	PA17
59	9: PD4	87:	PA15
60	0: PD6	88:	Vcc
6	1: PD8	89:	PA13
62	2: GND	90:	PA11
6.	3: PD10	91:	PA9
64	4: PD12	92:	PA7
6	5: GND	93:	PA5
60	5: PD14	94:	GND
6'	7: PD16	95:	PA3
68	8: PD18	96:	PA2
69	9: PD20	97:	N/C
70	D: GND	98:	SYSRST#
7	1: PD22	99:	PDC
72	2: PD24	100:	PMIO
7.	3: PD26	101:	PWR
74	4: PD28	102:	PRDY#
7:	5: PD30	103:	GND
70	5: Vcc	104:	IRQ9
7	7: PA31	105:	BRDY#
78	B: GND	106:	BLAST#
79	9: PA29	107:	GND
80	D: PA27	108:	ID1
8	1: PA25	109:	GND
82	2: PA23	110:	VCLKI
8	3: PA21	111:	Vcc
84	4: PA19	112:	BS16#
1			- Mathematica E

Page 30

APPENDIX C:

INSTALLING CPU:

The system board is specifically designed to support Intel, AMD, Cyrix and UMC CPU as below : Intel 486SX,486DX,486DX2,486DX4, Overdrive P24T,P24D,P24C and S-series SMM CPU AMD 486DX,DX2,DXL,DXL2/66 Cyrix M6, M7 UMC 486 CPU

Note : Place the CPU into the socket. Make sure pin 1 on

the CPU lines up with pin 1 on the socket.

Page 31

APPENDIX D: AT TECHNICAL INFORMATION

D-1: I/O & MEMORY MAP

MEMORY MAP :
[0000000-009FFFF]	System memory used by DOS and application program.
[00A0000-00BFFFF]	Display buffer memory for VGA/EGA/CGA/ Monochrome adapter.
[00C0000-00DFFFF]	Reserved for I/O device BIOS ROM or RAM buffer.
[00E0000-00EFFFF]	Reserved for BASIC ROM.
[00F0000-00FFFFF]	System BIOS ROM.
[0100000-1FFFFFF]	System extension memory.

I/O MAP :

From	То	Description
001	01F	DMA controller.(MASTER)
020	021	INTERRUPT controller.(MASTER)
022	023	CHIPSET control registers I/O ports.
040	05F	TIMER control registers.
060	06F	KEYBOARD interface controller.(8042)
070	07F	RTC ports & CMOS I/O ports.
080	09F	DMA register.
0A0	0BF	INTERRUPT controller.(SLAVE)
0 C 0	ODF	DMA controller.(SLAVE)
0F0	OFF	MATH COPROCESSOR
1F0	1F8	HARD DISK controller
There is

278 27F PARALLEL port-2 2B0 2DF GRAPHICS adapter controller. 2F8 2FF SERIAL port-2

Page 32

From	То	Description
360	36F	NETWORK ports.
378	37F	PARALLEL ports-1.
3B0	3BF	MONOCHROME & PRINTER adapter.
3C0	3CF	EGA adapter.
3D0	3DF	CGA adapter
3F0	3F7	FLOPPY DISK controller.
3F8	3FF	SERIAL port-1.

D-2: TIMER & DMA CHANNELS MAP

TIMER MAP:

TIMER Channel-0 system timer interrupt TIMER Channel-1 DRAM REFRESH request TIMER Channel-2 speaker tone generator

DMA CHANNELS:

DMA Channel-0 Available DMA Channel-1 IBM SDLC DMA Channel-2 FLOPPY DISK adapter DMA Channel-3 Available DMA Channel-4 Cascade for DMA controller 1 DMA Channel-5 Available DMA Channel-6 Available DMA Channel-7 Available

Page 33

D-3 : INTERRUPT MAP

NMI: Parity check error

IRQ(H/W): 0 System TIMER interrupt from TIMER-0 1 KEYBOARD output buffer full
- 2 Cascade for IRQ 8-15
  - 3 SERIAL port 2
  - 4 SERIAL port 1
  - 5 PARALLEL port 2
  - 6 FLOPPY DISK adapter
  - 7 PARALLEL port 1
  - 8 RTC clock
  - 9 Available
- 10 Available
- 11 Available
- 12 Available
- 13 MATH coprocessor
- 14 HARD DISK adapter
- 15 Available

Page 34

D-4 RTC & CMOS RAM MAP

RTC & CMOS:

c civico.
00	Seconds
01	Second alarm
• 02	Minutes
03	Minutes alarm
04	Hours
05	Hours alarm
06	Day of week
07	Day of month
08	Month
09	Year
0A	Status register A
0B	Status register B
0C	Status register C
0D	Status register D
0E	Diagnostic status byte
0F	Shutdown byte
10	FLOPPY DISK drive type byte
11	Reserve
12	HARD DISK type byte
13	Reserve
14	Equipment type
15	Base memory low byte
16	Base memory high byte
17	Extension memory low byte
18	Extension memory high byte
19-2D	) Reserve
2E-2F	² 2-byte, COMS RAM chechsum
30	Reserve for extension memory low byte
31	Reserve for extension memory high but
32	DATE CENTURY hute

INFORMATION FLAG 34-3F Reserve 40-7F Reserve for CHIPSET SETTING DATA

Page 35

PowerTech 486DX, 486SX User's Manual

User's Manual for 486DX/SX

WESPEED YOUR WORLD

MB 455/456 80486 VL-BUS MAIN BOARD with Deep Green PC

470-024551990

USER'S MANUAL

Table of Contents

CHAPTER 1 INTRODUCTION

CHAPTER 2 CONFIGURATION

3-4 Power management Setup ....................................

Chapter 1

CPU TYPE

CPU Vcc Input : MB 455 for 5V only MB 456 supports 5V, 3.45V, 3V Voltage

Green Function

Chapter 2

Jumper setting and connector

2-1 CPU TYPE SELECT:

P24C : Jumper setting is same as 486DX-SL JP20 : OPEN : --> INT. CLK x 3 1 - 2 : --> x 2.5 2 - 3 : --> x 2 Others type CPU this (JP20) is open

2-2 CACHE SIZE SETTING :

40MHzCLOSECLOSEOLOSEOLOSE50MHzOPENOPENOPENCLOSE

Jumper Location :

2 - 5 CPU POWER SETTING U24 for 5V --> 3.3V, 3.45V regulator, LT 1085 must be installed (for Model : MB456 only)

2-6 OTHER ON BOARD JUMPER SETTING

2-7 DRAM INSTALLATION

DRAM TYPE SUPPORT :

2-8 CACHE MEMORY INSTALL

AWARD BIOS SETUP

"Press DEL to enter SETUP, ESC to skip memory test"

ROM ISA BIOS (XXXXXXXX) CMOS SETUP UTILITY AWARD SOFTWARE. INC.

3 - 1 Standard CMOS Setup

3 - 2 BIOS Feature Setup

ROM ISA BIOS (XXXXXXX) BIOS FEATURES SETUP AWARD SOFTWARE, INC.

3 - 3 Chipset Features Setup

ROM ISA BIOS (XXXXXXXX) CHIPSET FEATURES SETUP AWARD SOFTWARE, INC.

3 - 4 Power Management Setup

ROM ISA BIOS (XXXXXXXX) POWER MANAGEMENTSETUP AWARD SOFTWARE, INC.

POWER MANAGEMENT Timer Selection :

Control Item Select :

Wake up the system:

3-5 Standard type of hard disk

ISA SLOT PIN OUT SPECIFICATIONS :

APPENDIX B:

SUMMARY OF VL-BUS FEATURES :

VL-BUS INTERFACE BLOCK DIAGRAM :

VL-BUS PIN OUT SPECIFICATIONS

APPENDIX C:

INSTALLING CPU:

the CPU lines up with pin 1 on the socket.

APPENDIX D: AT TECHNICAL INFORMATION

D-1: I/O & MEMORY MAP

278 27F PARALLEL port-2 2B0 2DF GRAPHICS adapter controller. 2F8 2FF SERIAL port-2

D-2: TIMER & DMA CHANNELS MAP

D-3 : INTERRUPT MAP

D-4 RTC & CMOS RAM MAP

RTC & CMOS:

INFORMATION FLAG 34-3F Reserve 40-7F Reserve for CHIPSET SETTING DATA