Power Integrations RDR-83 User Manual

Reference Design Report for 1.6 W,

Title

Linear Replacement Adapter with 10 kV
surge withstand

Specification
Application

85–265 VAC Input, 7.7 V, 210 mA Output

Cordless Phone Adapter

Author Power Integrations Applications Department
Document

RDR-83

Number
Date Sept 29, 2006
Revision 1.0

Summary and Features

• Highly efficient, low cost switching solution

• Replacement for existing AC line transformer based design

• Designed to withstand 10 kV common-mode surges

• Ideal for applications connected to telephone network

• EcoSmart

standards including: CECP (China), CEC, EPA, AGO, European Commission

• No-load power consumption <220 mW at 265 VAC

• 61.3% active-mode efficiency (exceeds requirement of 53.2%)

• Integrated LinkSwitch safety/reliability features:

• Accurate (± 5%), auto-recovering, hysteretic thermal shutdown function

maintains safe PCB temperatures under all conditions

• Auto-restart protects against output short circuits and open feedback loops

• Meets EN55022 and CISPR-22 Class B conducted EMI with >15 dBµV margin

• Meets IEC61000-4-5 Class 4 AC line surge

The products and applications illustrated herein (including circuits external to the products and transformer
construction) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign
patent applications assigned to Power Integrations. A complete list of Power Integrations’ patents may be found at

www.powerint.com.

®

– meets all existing and proposed harmonized energy efficiency

RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand 29-Sept-06

Table Of Contents

1 Introduction................................................................................................................. 3

2 Power Supply Specification ........................................................................................ 4

2.1 Typical Output Characteristic and limits ..............................................................5

3 Schematic...................................................................................................................6

4 Circuit Description ......................................................................................................7

4.1 Input Stage ..........................................................................................................7

4.2 LinkSwitch-LP......................................................................................................7

4.3 Feedback.............................................................................................................8

4.4 Output Rectification .............................................................................................9

5 PCB Layout ..............................................................................................................10

6 Bill Of Materials ........................................................................................................11

7 Transformer Specification......................................................................................... 12

7.1 Electrical Diagram .............................................................................................12

7.2 Electrical Specifications..................................................................................... 12

7.3 Materials............................................................................................................12

7.4 Transformer Build Diagram ...............................................................................13

7.5 Transformer Construction.................................................................................. 13

8 Design Spreadsheets ...............................................................................................14

9 Performance Data ....................................................................................................19

9.1 Efficiency ...........................................................................................................19

9.1.1 Active Mode ENERGY STAR / CEC Efficiency Measurement Data........... 20

9.2 No-load Input Power.......................................................................................... 21

9.3 Available Standby Output Power.......................................................................21

9.4 Regulation ......................................................................................................... 22

9.4.1 VI Curve vs. Input Voltage..........................................................................22

10 Thermal Performance ...........................................................................................23

10.1 LNK562 Temperature Rise................................................................................23

10.2 Thermal Image ..................................................................................................23

11 Waveforms............................................................................................................ 24

11.1 Drain Voltage and Current, Normal Operation................................................... 24

11.2 Output Voltage Start-up Profile.......................................................................... 24

11.3 Drain Voltage and Current Start-up Profile ........................................................25

11.4 Load Transient Response (50% to 100% Load Step) .......................................26

11.5 Output Ripple Measurements............................................................................ 27

11.5.1 Ripple Measurement Technique ................................................................27

11.5.2 Measurement Results ................................................................................28

12 Line Surge.............................................................................................................29

13 Conducted EMI .....................................................................................................30

14 Revision History ....................................................................................................32

Important Note:

Although this board is designed to satisfy safety isolation requirements, the engineering prototype
has not been agency approved. Therefore, all testing should be performed using an isolation
transformer to provide the AC input to the prototype board.

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1 Introduction

This reference design report describes a switched-mode power supply that was designed
to replace line frequency transformer based solutions. The supply uses a member of the

LinkSwitch-LP family of devices, and is capable of withstanding common-mode line

surges of up to 10 kV. That is often a requirement for applications that connect to a
telephone line, such as modems, cordless phones and answering machines.

The report includes the power supply specification, a circuit diagram, a bill of materials,
transformer documentation, a printed circuit layout board, and performance data.

Figure 1 – Populated Circuit Board Photograph.

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2 Power Supply Specification

Description Symbol Min Typ Max Units Comment

Input

Voltage
Frequency
No-load Input Power (230 VAC) 0.3 W

Output

Output Voltage 1
Output Ripple Voltage 1
Output Current 1

Total Output Power

Continuous Output Power
No Load Output Voltage

Efficiency

Full Load
Required average efficiency at

25, 50, 75 and 100 % of P

OUT

Environmental

Conducted EMI

Safety

Surge
Differential Mode
Common Mode

Surge 2 KV

Ambient Temperature

V

f

LINE

IN

85 265 VAC
47 50/60 64 Hz

2 Wire – no P.E.

6.7 7.7 8.7 V

V

OUT1

V

RIPPLE1

I

OUT1

400 mV

0.21 0.21 A

20 MHz bandwidth

1.4 1.6 W

P

OUT

11 V

η

η

CEC

60 %

53

%

Measured at P

Per ENERGY STAR / CEC

requirements

Meets CISPR22B / EN55022B

T

AMB

Designed to meet IEC950, UL1950

2
6

0 50

10

Class II

1.2/50 µs surge, IEC 1000-4-5,

kV
kV

o

C

Series Impedance:
Differential Mode: 2 Ω
Common Mode: 12 Ω

100 kHz ring wave, 500 A short

circuit current, differential

Free convection, sea level

OUT

25

o

C

Page 4 of 36

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2.1 Typical Output Characteristic and Limits

The following diagram shows the output characteristic of the LinkSwitch-LP solution and

that of the linear transformer solution it was designed to replace. As can be seen, the

LinkSwitch-LP solution provides a more controlled output characteristic.

18

115 VAC

16

14

12

10

Volts

8

6

4

UPPER LIMIT
LOWER LIMIT
Linear Adapter
RD-83 115 VAC

2

0

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8

Amps

Figure 2 – Output Characteristic Comparison and Limits.

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3 Schematic

Figure 3 – Schematic.

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4 Circuit Description

4.1 Input Stage

Components C1, C6, L1 and L3 comprise a balanced π filter. Resistor R5 dampens low
frequency conducted EMI. The supply needs no Y1-type capacitor (that normally bridges
the primary to secondary isolation barrier) due to U1’s frequency jitter function and the

E-Shield™ techniques used in the design of transformer T1. This minimizes audible

noise in applications connected to a phone line, by eliminating a path for line frequency
leakage currents to pass onto the output of the supply. The supply easily meets
EN55022B conducted EMI limits, with more than 15 dBµV of margin.

A metal oxide varistor (RV1) and a wire wound resistor (RF1) attenuate differential line
surges. The varistor is required to meet the 2 kV differential surge requirement. In
applications where only 1 kV of surge immunity is required, RV1 can be eliminated. The
wire wound resistor (RF1) must be able to withstand high transient dissipation from initial
inrush current (when AC power is applied) and during line surges.

4.2 LinkSwitch-LP

The LinkSwitch-LP family of ICs were designed to replace linear transformer solutions in

low-power charger and adapter applications. Feedback to the LNK562P IC (U1) is
derived from a resistor divider (R1 and R2) across the bias supply (D3 and C3), which
lowers cost by eliminating the need for an optocoupler.

Linear transformers typically use thermal fuses (over temperature cut-outs) for overload
protection. However, once a thermal fuse trips, the entire charger or adapter must be
thrown away, since thermal fuses cannot be reset or repaired. Latching thermal
shutdown functions are typically used in ringing choke converter (RCC) based supplies.
However, AC input power must be removed and reapplied to reset most thermal latches.
Since customers typically don’t know this, they often return good units they thought were

defective, simply because the thermal latch tripped and shut the unit off. The LinkSwitch-
LP family’s hysteretic thermal shutdown function has a very tight tolerance (142 °C,

±5%), and automatically restarts the power supply once the IC temperature drops below
the lower temperature threshold. This maintains the average PCB temperature at a safe
level under all conditions, and reduces the return rate of good units from the field. The
auto-recovery feature also eliminates the noise sensitivity and component aging
problems associated with discrete latching circuits.

Pin 6 is eliminated from the IC package to extend the creepage distance between the
DRAIN pin and all other low voltage pins; both at the package and on the PCB. This
reduces the likelihood that tracking or arcing will occur due to moisture or board surface
contamination (from dust and dirt), which improves reliability in high humidity and high
pollution environments. During an output short circuit or an open loop condition, the

LinkSwitch-LP’s auto-restart function limits output power to about 12% of the maximum.

This protects both the load and the supply during prolonged overload conditions.

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The LinkSwitch-LP family of ICs are self-biased, via a high-voltage current source that is

internally connected to the DRAIN pin of the package. A capacitor (C2) connected to the
BYPASS (BP) pin of the IC provides energy storage and local decoupling of the internal
chip power. To further reduce no-load power consumption, a resistor can be used to
provide operating current to the IC from the bias winding (once the power supply is
operating). In this design, the bias winding voltage is about 14 V and the BP pin voltage
is 5.8 V. Therefore, R6 (100 kΩ) provides about 80 µA of current to the BP pin. If the
value of R6 were reduced, it could provide the entire 220 µA of IC supply current, which
would further reduce the no-load power consumption of the supply.

The worst-case, no-load power consumption of this supply is approximately 200 mW at
an input voltage of 265 VAC, which is well below the maximum limit of most energy
efficiency standards. Heat generation is also kept to a minimum in this design, given the
high operating efficiency at all line and load conditions.

4.3 Feedback

The output voltage of the supply is regulated based on feedback from the primary-side
bias supply. The bias winding voltage is rectified and filtered by D3 and C3. The leakage
inductance between the output winding and the bias winding induces error in the bias
winding voltage. Using a standard rectifier diode for D3 makes the bias winding voltage
more accurately track the output voltage. Resistor R7 preloads (3 mA) the output of the
bias supply, which further reduces the error and also limits the no-load output voltage.

A resistor divider (R1 and R2) provides the feedback voltage to the FB pin of U1. The
values of R1 and R2 are selected so that when the output voltage is at the desired
nominal value, the voltage on the FB pin is 1.69 V, and about 70 µA flows into the FB pin.

The LinkSwitch-LP family of devices use ON/OFF control to regulate the output of the

supply. During constant voltage (CV) operation, switching cycles are skipped when the
current into the FB pin exceeds 70 µA. As the load on the output of the supply reduces,
more switching cycles are skipped. As the load increases, fewer cycles are skipped.
The result is that the average or effective switching frequency varies with the load. This
makes the efficiency fairly consistent over the entire load range, since the switching
losses scale with the load on the output of the supply.

When the load on the output of the supply reaches its maximum power capability, no
switching cycles are skipped. If the load is increased beyond that point, the output
voltage of the supply will start to drop. As the output voltage drops, the voltage on the FB
pin also drops, and the IC linearly reduces its switching frequency. This keeps the output
current from increasing significantly. Once the FB pin voltage falls below 0.8 V for more

than 100 ms, all LinkSwitch-LP devices enter an auto-restart mode. While in auto-restart,

the controller enables MOSFET switching for 100 ms. If the FB pin voltage does not
exceed 0.8 V during the 100 ms, the controller disables MOSFET switching. MOSFET
switching is alternately enabled and disables at a duty cycle of about 12% until the fault
condition clears. This protects both the supply and the load.

Page 8 of 36

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4.4 Output Rectification

The transformer secondary winding is rectified by D4 and filtered by C4. A small preload
resistor (R8) limits the no-load output voltage. Decreasing the value of the preload
resistor will further reduce the no-load output voltage, at the expense of increasing the
no-load input power consumption. In this design, a fast diode (rather than an ultra-fast)
was used for D4 to lower cost and EMI emissions.

Page 9 of 36

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5 PCB Layout

During a common mode surge, the specified surge voltage appears across the isolation
barrier. Elimination of the optocoupler and Y1-type capacitor in the design allowed the
necessary PCB clearance and creepage distance to be obtained, so that the supply can
withstand a 10 kV surge without resorting to expensive, special components.

To increase the creepage and clearance, the standard triple insulated wire used for the
secondary winding was terminated as flying leads that were soldered directly into the
PCB, instead of being terminated to transformer bobbin pins.

A 0.185 inch long, 4.7 mm wide slot was placed along the isolation barrier. Additionally,
the primary and secondary traces are separated by 0.4 inches (10 mm). A spark gap
was added across the isolation barrier (marked as points (B) in Figure 4), so that any
arcing that might occur would take place at a designated point with a well defined path.
On the primary side of the isolation barrier, the spark gap trace returns directly to C6,
which keeps surge currents away from the low-voltage pins of U1. Two additional spark
gaps were placed across L1 and L3, to prevent the breakdown of insulation on those

parts. Note: During 10 kV common mode surge testing, no arcing occurred across any

of the spark gaps.

(A)

(B)

(B)

Figure 4 – RD83 Printed Circuit Layout (2.175” x 1.475” / 55.25 mm x 37.47 mm).

Page 10 of 36

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6 Bill Of Materials

Item Qty

1 2 C1, C6

2 1 C2 100 nF, 50 V, Ceramic, Z5U Panasonic ECU-S1H104MEA

3 1 C3

4 1 C4

5 1 D1 600 V, 1 A, Fast Recovery Diode, 200 ns, DO-41 Vishay 1N4937

6 2 D2, D3 600 V, 1 A, Rectifier, DO-41 Vishay 1N4005

7 1 D4 50 V, 1 A, Fast Recovery, 200 ns, DO-41 Vishay 1N4933

8 2 J1, J2 Test Point, WHT, THRU-HOLE MOUNT Keystone 5012

9 1 J3

10 2 J4, J5 PCB Terminal Hole, 22 AWG N/A N/A

11 2 L1, L3 1 mH, 0.15 A, Ferrite Core Tokin SBCP-47HY102B

12 1 R1

13 1 R2

14 3 R5, R7,

15 1 R6

Ref
Des

R8

Description Manufacturer Manufacturer Part #

3.3 µF, 400 V, Electrolytic, (8 x 11.5)

10 µF, 50 V, Electrolytic, Gen. Purpose, (5 x 11)

100 µF, 25 V, Electrolytic, Low ESR,
250 mΩ, (6.3 x 11.5)

Output cord, 6 ft, 22 AWG, 0.25 Ω,

2.1 mm connector

22.1 kΩ, 1%, 1/4 W, Metal Film

3.01 kΩ, 1%, 1/4 W, Metal Film

4.7 kΩ, 5%, 1/4 W, Carbon Film

100 kΩ, 5%, 1/4 W, Carbon Film

Nippon Chemi-Con ESMQ401ELL3R3MHB5D

Nippon Chemi-Con EKMG500ELL100ME11D

Nippon Chemi-Con ELXZ250ELL101MFB5D

Generic

Yageo MFR-25FBF-22K1

Yageo MFR-25FBF-3K01

Yageo CFR-25JB-4K7

Yageo CFR-25JB-100K

16 1 RF1

17 1 RV1 275 V, 23 J, 7 mm, RADIAL Littlefuse V275LA4

18 1 T1

19 1 U1 LinkSwitch-LP, LNK562P, DIP-8B Power Integrations LNK562P

Note: For reduced line frequency ripple at 85 VAC, increase the values of C1 and C6 to 4.7 µF.

10 Ω, 2.5 W, Fusible/Flame Proof Wire Wound

Custom Transformer
Core: EE16,
See Power Integration's document EPR-83 for
Transformer Specification

Bobbin: Horizontal Extended Creepage 5+5 pin Taiwan Shulin

Vitrohm CRF253-4 10R

Hical Magnetics SIL6043

CWS EP-83

Santronics SNX1388

TF-1613

www.bobbin.com.tw

Page 11 of 36

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7 Transformer Specification

7.1 Electrical Diagram

WD #1

Bias/Core

Cancellation

29T #37AWG X 2

1 LAYER

WD #2

Primary

176T #37AWG

3 LAYERS

Figure 5 –Transformer Electrical Diagram.

7.2 Electrical Specifications

Electrical Strength
Primary Inductance
Resonant Frequency
Primary Leakage Inductance

1 second, 60 Hz, from Pins 1-4 to Flying leads 6000 VAC
Pins 1-2, all other windings open, measured at

100 kHz, 0.4 VRMS

Pins 1-2, all other windings open 250 kHz (Min.)

Pins 1-2, with flying leads shorted, measured at
100 kHz, 0.4 VRMS

3

FL

Secondary

WD #4

17T

#30AWG TIW

4
2

FL

NC

Shield

WD #3

15T

#32 AWG X 2

1

1

3.5 mH, ±10%

115 µH (Max.)

7.3 Materials

Item Description

[1]
[2]
[3]
[4]
[5]
[6]
[7]

Page 12 of 36

Core: PC40EE16-Z, TDK or equivalent gapped for AL of 114 nH/T
Bobbin: EE16 Horizontal 10 pin
Magnet Wire: #37 AWG
Magnet Wire: #32 AWG
Triple Insulated Wire: #30 AWG
Tape, 3M 1298 Polyester Film, 2.0 Mils thick, 8 mm wide
Varnish

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Taiwan Shulin TF-1613 or equivalent

2

. Gap approx. 0.2 mm.

29-Sept-06 RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand

7.4 Transformer Build Diagram

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8 Design Spreadsheets

ACDC_LinkSwitch­LP_053106; Rev.1.12;
Copyright Power
Integrations 2006

ENTER APPLICATION VARIABLES RDR-83

VACMIN 85 Volts Minimum AC Input Voltage

VACMAX 265 Volts Maximum AC Input Voltage

fL 50 Hertz AC Mains Frequency

VO 7.70

IO 0.21 Amps Power Supply Output Current (For CV/CC

Constant Voltage /
Constant Current Output

Output Cable Resistance 0.25 0.25 Ohms Enter the resistance of the output cable (if used)

PO 1.63 Watts Output Power (VO x IO + dissipation in output

Feedback Type BIAS Bias

Add Bias Winding YES Yes Choose 'YES' in the 'Bias Winding' drop down

Clampless design YES Clample

n 0.65 0.65 Efficiency Estimate at output terminals. For CV

Z 0.35 0.35 Loss Allocation Factor (Secondary side losses /

tC 2.90 mSeconds Bridge Rectifier Conduction Time Estimate

CIN 9.40 UFarads Input Capacitance
Input Rectification Type H HChoose H for Half Wave Rectifier and F for Full

ENTER LinkSwitch-LP VARIABLES

LinkSwitch-LP LNK562

Chosen Device

ILIMITMIN

ILIMITMAX

fSmin

INPUT INFO OUTPUT UNIT ACDC_LinkSwitch-LP_053106_Rev1-12.xls;

LinkSwitch-LP Continuous/Discontinuous
Flyback Transformer Design Spreadsheet

YES CVCC Volts Choose "YES" from the 'CV/CC output' drop

Winding

LNK562

Volts Output Voltage (main) measured at the end of

output cable (For CV/CC designs enter typical
CV tolerance limit)

designs enter typical CC tolerance limit)

down box at the top of this spreadsheet for
approximate CV/CC output. Choose "NO" for CV
only output

cable)
Choose 'BIAS' for Bias winding feedback and
'OPTO' for Optocoupler feedback from the
'Feedback Type' drop down box at the top of this
spreadsheet

box at the top of this spreadsheet to add a Bias
winding. Choose 'NO' to continue design without
a Bias winding. Addition of Bias winding can
lower no load consumption

Choose 'YES' from the 'clampless Design' drop

ss

Amps Minimum Current Limit

0.124

Amps Maximum Current Limit

0.146

Hertz Minimum Device Switching Frequency

61000

down box at the top of this spreadsheet for a
clampless design. Choose 'NO' to add an
external clamp circuit. Clampless design lowers
the total cost of the power supply

only designs enter 0.7 if no better data available

Total losses)

Wave Rectification from the 'Rectification' drop
down box at the top of this spreadsheet

LinkSwitch-LP device

Page 14 of 36

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I^2fMIN 1099 A^2Hz I^2f Minimum value (product of current limit

squared and frequency is trimmed for tighter ­tolerance)

I^2fTYP 1221 A^2Hz I^2f typical value (product of current limit squared

and frequency is trimmed for tighter tolerance)

VOR 90.00

VDS 10 Volts LinkSwitch-LP on-state Drain to Source Voltage

VD 0.90 0.9 Volts Output Winding Diode Forward Voltage Drop

KP 1.99 Ripple to Peak Current Ratio (0.9<KRP<1.0 :

ENTER TRANSFORMER CORE/CONSTRUCTION VARIABLES

Core Type EE16

Core
Bobbin

AE 0.192 cm^2 Core Effective Cross Sectional Area

LE 3.5 cm Core Effective Path Length

AL 1140 nH/T^2 Ungapped Core Effective Inductance

BW 8.6 mm Bobbin Physical Winding Width

M 0 mm Safety Margin Width (Half the Primary to

L

NS 17 Number of Secondary Turns

NB 44 Number of Bias winding turns

VB 22.26 Volts Bias Winding Voltage

R1 37.47 k-ohms Resistor divider component between bias

R2 3.00 k-ohms Resistor divider component between FB pin of

Recommended Bias Diode 1N4003 Place this diode on the return leg of the bias

DC INPUT VOLTAGE PARAMETERS

VMIN

VMAX 375 Volts Maximum DC Input Voltage

CURRENT WAVEFORM SHAPE PARAMETERS

DMAX 0.45 Maximum Duty Cycle

IAVG 0.04 Amps Average Primary Current

IP

IR 0.12 Amps Primary Ripple Current

IRMS 0.05 Amps Primary RMS Current

TRANSFORMER PRIMARY DESIGN PARAMETERS

LP 3486 uHenries Typical Primary Inductance. +/- 10%

LP_TOLERANCE 10 % Primary inductance tolerance

EE16

EE16_B

OBBIN

0.12 Amps Minimum Peak Primary Current

90 Volts Reflected Output Voltage

1.0<KDP<6.0)

EE16

P/N:
P/N:

2 Number of primary layers

73 Volts Minimum DC Input Voltage

User-Selected transformer core

PC40EE16-Z

EE16_BOBBIN

Secondary Creepage Distance)

wiinding and FB pin of LinkSwitch-LP

LinkSwitch-LP and primary RTN

winding for optimal EMI. See LinkSwitch-LP
Design guide for more information

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RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand 29-Sept-06

NP 178 Primary Winding Number of Turns

ALG 110 nH/T^2 Gapped Core Effective Inductance

BM

BAC 745 Gauss AC Flux Density for Core Loss Curves (0.5 X

ur 1654 Relative Permeability of Ungapped Core

LG

BWE 17.2 Mm Effective Bobbin Width

OD 0.10 Mm Maximum Primary Wire Diameter including

INS 0.02 Mm Estimated Total Insulation Thickness (= 2 * film

DIA 0.07 Mm Bare conductor diameter

AWG 41 AWG Primary Wire Gauge (Rounded to next smaller

CM 8 Cmils Bare conductor effective area in circular mils

CMA

TRANSFORMER SECONDARY DESIGN PARAMETERS
Lumped parameters

ISP 1.30 Amps Peak Secondary Current

ISRMS 0.47 Amps Secondary RMS Current

IRIPPLE 0.42 Amps Output Capacitor RMS Ripple Current

CMS 93 Cmils Secondary Bare Conductor minimum circular

AWGS 30 AWG Secondary Wire Gauge (Rounded up to next

DIAS 0.26 Mm Secondary Minimum Bare Conductor Diameter

ODS 0.51 Mm Secondary Maximum Outside Diameter for Triple

INSS 0.12 Mm Maximum Secondary Insulation Wall Thickness

VOLTAGE STRESS PARAMETERS

VDRAIN - Volts Peak Drain Voltage is highly dependent on

PIVS 44 Volts Output Rectifier Maximum Peak Inverse Voltage

TRANSFORMER SECONDARY DESIGN PARAMETERS (MULTIPLE OUTPUTS)
1st output

VO1

IO1 0.211 Amps Output DC Current

PO1 1.63 Watts Output Power

VD1 0.9 Volts Output Diode Forward Voltage Drop

NS1 17.00 Output Winding Number of Turns

1490 Gauss Maximum Operating Flux Density, BM<1500 is

recommended

Peak to Peak)

0.20 Mm Gap Length (Lg > 0.1 mm)

insulation

thickness)

standard AWG value)

150 Cmils/Amp Primary Winding Current Capacity (150 < CMA <

500)

mils

larger standard AWG value)

Insulated Wire

Transformer capacitance and leakage
inductance. Please verify this on the bench and
ensure that it is below 650 V to allow 50 V
margin for transformer variation.

7.7 Volts Main Output Voltage (if unused, defaults to
single output design)

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ISRMS1 0.470 Amps Output Winding RMS Current

IRIPPLE1 0.42 Amps Output Capacitor RMS Ripple Current

PIVS1 44 Volts Output Rectifier Maximum Peak Inverse Voltage

Recommended Diodes SB160,

11DQ06

Pre-Load Resistor 3 k-Ohms Recommended value of pre-load resistor

CMS1 94 Cmils Output Winding Bare Conductor minimum

AWGS1 30 AWG Wire Gauge (Rounded up to next larger standard

DIAS1 0.26 mm Minimum Bare Conductor Diameter

ODS1 0.51 mm Maximum Outside Diameter for Triple Insulated

2nd output

VO2

IO2 Amps Output DC Current

PO2 0.00 Watts Output Power

VD2 0.7 Volts Output Diode Forward Voltage Drop

NS2 1.38 Output Winding Number of Turns

ISRMS2 0.000 Amps Output Winding RMS Current

IRIPPLE2 0.00 Amps Output Capacitor RMS Ripple Current

PIVS2 3 Volts Output Rectifier Maximum Peak Inverse Voltage

Recommended Diode Recommended Diodes for this output

CMS2 0 Cmils Output Winding Bare Conductor minimum

AWGS2 AWG Wire Gauge (Rounded up to next larger standard

DIAS2 mm Minimum Bare Conductor Diameter

ODS2 mm Maximum Outside Diameter for Triple Insulated

3rd output

VO3

IO3 Amps Output DC Current

PO3 0.00 Watts Output Power

VD3 0.7 Volts Output Diode Forward Voltage Drop

NS3 1.38 Output Winding Number of Turns

ISRMS3 0.000 Amps Output Winding RMS Current

IRIPPLE3 0.00 Amps Output Capacitor RMS Ripple Current

PIVS3 3 Volts Output Rectifier Maximum Peak Inverse Voltage

Recommended Diode Recommended Diodes for this output

CMS3 0 Cmils Output Winding Bare Conductor minimum

AWGS3 AWG Wire Gauge (Rounded up to next larger standard

DIAS3 mm Minimum Bare Conductor Diameter

ODS3 mm Maximum Outside Diameter for Triple Insulated

Volts Output Voltage

Volts Output Voltage

Page 17 of 36

Recommended Diodes for this output

circular mils

AWG value)

Wire

circular mils

AWG value)

Wire

circular mils

AWG value)

Wire

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RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand 29-Sept-06

Total power

Negative Output N/A If negative output exists enter Output number;

1.63 Watts Total Output Power

eg: If VO2 is negative output, enter 2

Page 18 of 36

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29-Sept-06 RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand

9 Performance Data

All measurements performed at room temperature, 60 Hz input frequency.

9.1 Efficiency

90

80

70

60

Efficiency (%)

50

40

30

50 75 100 125 150 175 200 225 250 275 300

AC Input Voltage (V)

Figure 7

– Efficiency vs. Input Voltage, Room Temperature, 60 Hz.

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RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand 29-Sept-06

9.1.1 Active Mode ENERGY STAR / CEC Efficiency Measurement Data
All single output cordless phone adapters manufactured for sale in California after

July 1st, 2007 must meet the CEC requirement for minimum active mode efficiency and
no-load input power. Cordless phone adapters must also meet this specification on a
voluntary basis to be able to display the ENERGY STAR logo. Minimum active mode
efficiency is defined as the average efficiency of 25, 50, 75 and 100% of rated output
power, based on the nameplate output power:

ENERGY STAR / CEC Active Mode Efficiency Specification

Nameplate
Output (P

< 1 W
≥ 1 W to ≤ 49 W 0.09 × ln (PO) + 0.49 [ln = natural log]

> 49 W 0.84 x PO

)

O

Minimum Efficiency in Active Mode
of Operation

0.49 × P

O

For adapters that are single input voltage only, the measurement is made at the rated,
single nominal input voltage (115 VAC or 230 VAC). For universal input adapters, the
measurement for ENERGY STAR qualification is made at both nominal input voltages
(115 VAC and 230 VAC); for CEC qualification, measurements are made at 115 VAC
only. To meet the standard, the measured average efficiency (or efficiencies for
universal input supplies) must be greater than or equal to the efficiency specified by the
CEC / ENERGY STAR standard.

Percent of
Full Load

25
50
75

100

Average

CEC
specified
minimum
average
efficiency (%)

Efficiency (%)

115 VAC 230 VAC

61.0

65.4

66.5

67.4

65.1

53.2

56.1

62.6

63.6

62.9

61.3

More states within the USA and other countries are adopting this standard. For the latest
information, please visit the PI Green Room at:

http://www.powerint.com/greenroom/regulations.htm

Page 20 of 36

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29-Sept-06 RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand

9.2 No-load Input Power

The supply easily meets the ENERGY STAR / CEC and European no-load power
consumption specifications of 0.5 W and 0.3 W (respectively).

0.3

0.25

0.2

0.15

0.1

Input Power (W)

0.05

0

0 50 100 150 200 250 300

AC Input Voltage (V)

Figure 8 – No Load Input Power vs. Input Line Voltage, Room Temperature, 60 Hz.

9.3 Available Standby Output Power

The supply provides >500 mW of available output power, at an input power of 1 W.

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

Available Output Power (W)

0.2

0.1

0

0 50 100 150 200 250 300

AC Input Voltage (V)

Figure 9 – Available Output Power at 1 Watt Input Power vs. Input Voltage.

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RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand 29-Sept-06

9.4 Regulation

9.4.1 VI Curve vs. Input Voltage

12

LOWER LIMIT

10

8

6

4

Output Voltage (V)

2

0

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8

Output Current (A)

Figure 10 – Output VI Curve, Room Temperature.

UPPER LIMIT
115 VAC
85 VAC
230 VAC
265 VAC

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29-Sept-06 RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand

10 Thermal Performance

10.1 LNK562 Temperature Rise

The RD-83 was installed within a sealed plastic enclosure, placed inside a sealed
cardboard box, and placed into a thermal chamber at 50 °C. The cardboard box
prevented the chamber circulation fan from blowing air across the plastic enclosure. A
thermocouple, attached to pin 2 of U1, was used to monitor its temperature.

Item

Ambient
LinkSwitch (U1)

Temperature (°C)

85 VAC 265 VAC

50 50

78 84

This result indicates acceptable thermal margin of approximately of 16 °C to the
recommended maximum SOURCE pin temperature of 100 °C

10.2 Thermal Image

An infrared thermograph of the board was taken to measure the temperature of other
components. This identified U1 and D4 as the highest temperature components. Using
the results from the previous section, this indicates that D4 would also have an
acceptable temperature rise at 50 °C ambient.

Figure 11 – Thermal Image of the RD-83 at Full Load, 85 VAC Input and Ambient Temperature of 22 °C.

Page 23 of 36

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RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand 29-Sept-06

11 Waveforms

11.1 Drain Voltage and Current, Normal Operation

Figure 12 – 85 VAC, Full Load .

Upper: I
Lower: V

, 0.1 A / div.

DRAIN

, 200 V/Div, 2 µs / div.

DRAIN

Figure 13 – 265 VAC, Full Load.

Upper: I
Lower: V

DRAIN

DRAIN

11.2 Output Voltage Start-up Profile

The output was loaded with a 39 Ω resistive load.

Figure 14 – Start-up Profile, 115VAC.

2 V, 20 ms / div.

Figure 15 – Start-up Profile, 230 VAC.

2 V, 20 ms / div.

The start-up waveforms show minimal output overshoot (<200 mV).

, 0.1 A / div.

, 200 V/Div, 2 µs / div.

Page 24 of 36

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29-Sept-06 RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand

11.3 Drain Voltage and Current Start-up Profile

The output was loaded with a 39 Ω resistive load and the output profile captured. These
waveforms show no sign of core saturation and acceptable margin to the recommended
maximum drain voltage of 650 VPK.

Figure 16 – 85 VAC Input and Maximum Load.

Upper: I
Lower: V

, 0.1 A / div.

DRAIN

, 100 V & 1 ms / div.

DRAIN

Figure 17 – 265 VAC Input and Maximum Load.

Upper: I
Lower: V

, 0.1 A / div.

DRAIN

, 200 V & 1 ms / div.

DRAIN

Page 25 of 36

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RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand 29-Sept-06

11.4 Load Transient Response (50% to 100% Load Step)

In the figures shown below, signal averaging was used to better enable viewing the load
transient response. The oscilloscope was triggered using the load current step as a
trigger source. Since the output switching and line frequency occur essentially at random
with respect to the load transient, contributions to the output ripple from these sources
will average out, leaving the contribution only from the load step response.

Figure 18 – Transient Response, 115 VAC, 50-100-

50% Load Step.
Top: Load Current, 0.1 A/div.
Bottom: Output Voltage

200 mV, 500 µs / div.

Figure 19 – Transient Response, 230 VAC, 50-100-

50% Load Step.
Upper: Load Current, 0.1 A/ div.
Bottom: Output Voltage

200 mV, 500 uS / div.

These results were significantly lower than the linear adapter where ripple and transient
response variation was greater than 1 V

P-P

.

Page 26 of 36

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29-Sept-06 RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand

11.5 Output Ripple Measurements

11.5.1 Ripple Measurement Technique
For DC output ripple measurements, a modified oscilloscope test probe must be utilized

in order to reduce the pickup of spurious signals. Details of the probe modification are

provided in Figure 20 and Figure 21.

The 5125BA probe adapter (from probe master) is affixed with two capacitors tied in
parallel across the probe tip. The capacitors include one (1) 0.1 µF/50 V ceramic type
and one (1) 1.0 µF/50 V aluminum electrolytic. The aluminum electrolytic type capacitor

is polarized, so proper polarity across DC outputs must be maintained (see Figure 21).

Probe Ground

Probe Tip

Figure 20 – Oscilloscope Probe Prepared for Ripple Measurement (End Cap and Ground Lead Removed).

Figure 21 – Oscilloscope Probe with Probe Master 5125BA BNC Adapter (Modified with wires for probe

ground for ripple measurement, and two parallel decoupling capacitors added).

Page 27 of 36

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RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand 29-Sept-06

11.5.2 Measurement Results

Figure 22 – Ripple, 85 VAC, Full Load.

5 ms, 50 mV / div (240 mV

Figure 24 – Ripple, 230 VAC, Full Load.

5 ms, 50 mV /div (130mV

P-P

P-P

).

).

Figure 23 – Ripple, 115 VAC, Full Load.

5 ms, 50 mV / div (80 mV

P-P

).

Figure 25 – Ripple of a Linear adaptor, 115 VAC

Input, Full Load.
2 ms, 200 mV/div (800 mV

P-P

).

Figure 22 shows increased line frequency ripple. If required, this could be lowered to the
level shown in Figure 23 by increasing the value of C6 and C1 to 4.7 µF.

Page 28 of 36

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29-Sept-06 RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand

12 Line Surge

Differential and common mode 1.2/50 µs surge testing was completed on a single test
unit, to IEC61000-4-5. Input voltage was set at 230 VAC / 60 Hz. The output of the
supply was loaded to full load, and correct operation was verified following each surge
event.

Surge

Level (V)

+2000 230 L to N 90 Pass

-2000 230 L to N 90 Pass

[phone] L,N to RTN 90 Pass

-10000 230 L,N to RTN 90 Pass

Unit passed under all test conditions.

Input

Voltage

(VAC)

Injection
Location

Injection

Phase (°)

Test Result

(Pass/Fail)

Page 29 of 36

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RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand 29-Sept-06

R

V

R

13 Conducted EMI

Measurements were made with the output RTN of the supply connected to the artificial
hand connection on the LISN (line impedance stabilization network) to represent worst­case conditions.

The results show excellent margin of >15 dBµV to both the quasi-peak and the average
limit lines.

Power Integrations

28.Aug 06 09:43

dBµV dBµV

80

70

1 QP

EN55022Q

CLRW

60

EN55022A

2 A
CLRW

50

RBW 9 kHz
MT 500 ms
PREAMP OFFAtt 10 dB AUTO

1 MHz 10 MHz

LIMIT CHECK MARG
LINE EN55022A MARG
LINE EN55022Q MARG

Marker 1 [T1 ]

28.50 dBµV

182.849162999 kHz

SGL

TDF

40

1

30

20

10

0

-10

-20

150 kHz 30 MHz

Figure 26 – Conducted EMI, Maximum Steady State Load, 115 VAC, 60 Hz, and EN55022 B Limits.

Page 30 of 36

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29-Sept-06 RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand

R

V

R

Power Integrations

28.Aug 06 09:53

dBµV dBµV

80

70

1 QP

EN55022Q

CLRW

60

EN55022A

2 A
CLRW

50

40

1

30

20

10

0

-10

-20

150 kHz 30 MHz

1 MHz 10 MHz

LIMIT CHECK MARG
LINE EN55022A MARG
LINE EN55022Q MARG

RBW 9 kHz
MT 500 ms
PREAMP OFFAtt 10 dB AUTO

Marker 1 [T1 ]

28.76 dBµV

182.849162999 kHz

SGL

TDF

Figure 27 – Conducted EMI, Maximum Steady State Load, 230 VAC, 60 Hz, and EN55022 B Limits.

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RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand 29-Sept-06

14 Revision History

Date Author Revision Description & changes Reviewed

29-Sept-06 JAC 1.0 Initial Release PV, JJ, DA

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29-Sept-06 RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand

Notes

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RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand 29-Sept-06

Notes

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29-Sept-06 RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand

Notes

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RDR-83 7.7 V, 210 mA Adapter with 10 kV surge withstand 29-Sept-06

For the latest updates, visit our we bsite :

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Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power
Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS
MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT
LIMITATIO N, THE IMPLIE D WARRANTI ES OF M ERCHAN TABILI TY, FITNE SS FOR A PARTICU LAR PURP OSE, AND
NON-INFRINGEMENT OF THIRD PARTY RIGHTS.

PATENT INFORMATION

The products and applications illustrated herein (including transformer construction and circuits external to the products) may be
covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power
Integrations. A complete list of Power Integrations’ patents may be found at www.powerint.com. Power Integrations grants its
customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm.

The PI Lo go,

TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, EcoSmart, Clampless, E-Shield

Filterfuse, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective

companies. ©Copyright 2006 Power Integrations, Inc.

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