Reference Design Report for a 35 W Power
Supply Using TOP258PN
90 VAC to 265 VAC Input
Specification
5 V, 2.2 A and 12 V, 2 A Output
Application
Author
LCD Monitor
Power Integrations Applications Department
Document
RDR-142
Number
Date
Revision
Summary and Features
• Low cost, low component count, high efficiency
• Delivers 35 W at 50°C ambient without requiring an external heat sink
• Meets output cross regulation requirements without linear regulators
• EcoSmart® – meets requirements for low no-load and standby power
consumption
• 0.42 W output power for <1 W input
• No-load power consumption < 300 mW at 230 VAC
• >82% full load efficiency
• Integrated safety/reliability features:
• Accurate, auto-recovering, hysteretic thermal shutdown function maintains
safe PCB temperatures under all conditions
• Auto-restart protects against output short circuits and open feedback loops
• Output OVP protection configurable for latching or self recovering
• Input UV prevents power up / power down output glitches
• Meets EN55022 and CISPR-22 Class B conducted EMI with > 10 dBµV margin
The products and applications illustrated herein (including circuits external to the products and transformer
construction) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign
patent applications assigned to Power Integrations. A complete list of Power Integrations’ patents may be found at
Although this board is designed to satisfy safety isolation requirements, the engineering
prototype has not been agency approved. Therefore, all testing should be performed
using an isolation transformer to provide the AC input to the prototype board.
This document is an engineering report describing a LCD Monitor power supply utilizing a
TOP258PN. This power supply is intended as a general purpose evaluation platform for
TOPSwitch-HX.
The document contains the power supply specification, schematic, bill of materials,
transformer documentation, printed circuit layout, and performance data.
Figure 1 – Populated Circuit Board Photograph (5”L x 2.84”W x 1.16”H)
A Flyback converter configuration built around TOP258PN is used in this power supply to
obtain two output voltages. The 5 V output can supply a load current of 2.2 A, and the 12
V output can supply a load current of 2.0 A. This power supply can operate between 90
– 264 VAC. The 5 V output is the main regulated output. This output is regulated using a
TL431 voltage reference. Some feedback is also derived from the 12 V output for
improved cross regulation.
4.1 Input EMI Filtering
The three wire AC supply is connected to the circuit using connector J1. Fuse F1
provides protection against circuit faults and effectively isolates the circuit from the AC
supply source. Thermistor RT1 limits the inrush current drawn by the circuit at start up.
Optional capacitors C1 and C2 are Y capacitors connected from the Line/Neutral to Earth
to reduce common mode EMI.
Capacitor C3 is the X capacitor and helps to reduce the differential mode EMI. Resistors
R1 and R2 discharge C3 on AC removal, preventing potential user shock. Inductor L1 is
a common-mode inductor and helps in filtering common-mode EMI from coupling back to
the AC source.
Diodes D1, D2, D3 and D4 form a bridge rectifier. The bridge rectifier rectifies the
incoming AC supply to DC, which is filtered by capacitor C4.
Diodes D1 and D3 are fast recovery type diodes. These diodes recover very quickly
when the voltage across them reverses. This reduces excitation of stray line inductance
in the AC input by reducing the subsequent high frequency turnoff snap and hence EMI.
Only 2 of the 4 diodes in the bridge need to be fast recovery type, since 2 diodes conduct
in each half cycle.
4.2 TOPSwitch-HX Primary
Resistor R3 and R4 provide line voltage sensing and provide a current to U1, which is
proportional to the DC voltage across capacitor C4. At approximately 95 V DC, the
current through these resistors exceeds the line under-voltage threshold of 25 µA, which
results in enabling of U1.
The TOPSwitch-HX regulates the output using PWM-based voltage mode control. At
high loads the controller operates at full switching frequency (66 kHz for P package
devices). The duty cycle is controlled based on the control pin current to regulate the
output voltage.
The internal current limit provides cycle-by-cycle peak current limit protection. The
TOPSwitch-HX controller has a second current limit comparator allowing monitoring the
actual peak drain current (IP) relative to the programmed current limit I
falls below 55%, the peak drain current is held constant. The
output is then regulated by modulating the switching frequency (variable frequency PWM
control). As the load decreases further, the switching frequency decreases linearly from
full frequency down to 30 kHz.
Once the switching frequency has reached 30 kHz the controller keeps this switching
frequency constant and the peak current is reduced to regulate the output (fixed
frequency, direct duty cycle PWM control).
As the load is further reduced and the ratio IP/I
LIMITEXT
falls below 25%, the controller will
enter a multi-cycle-modulation mode for excellent efficiency at light load or standby
operation and low no-load input power consumption.
Diode D5, together with R6, R7, C6 and Zener VR1, forms a clamp network that limits the
drain voltage of U1 at the instant of turn-off. Zener VR1 provides a defined maximum
clamp voltage and typically only conducts during fault conditions such as overload. This
allows the RCD clamp (R6, C6 and D5) to be sized for normal operation, thereby
maximizing efficiency at light load. Resistor R7 is required due to the choice of a fast
recovery diode for D5. A fast versus ultra fast recovery diode allows some recovery of
the clamp energy but requires R7 to limit reverse diode current and dampen high
frequency ringing.
The output of the bias winding is rectified by diode D6 and filtered by resistor R10 and
capacitor C10. This rectified and filtered output is used by the optocoupler U2 to provide
the control current to the control terminal of U1.
Should the feedback circuit fail (open loop condition), the output of the power supply will
exceed the regulation limits. This increased voltage at output will also result in an
increased voltage at the output of the bias winding. Zener VR2 will break down and
current will flow into the “M” pin of IC U1, thus initiating a hysteretic OVP shutdown with
automatic restart attempts. Resistor R5 limits the current into the M pin; if latching OVP
is desired, the value of R5 can be reduced to 20 Ω.
The output voltage of the power supply is maintained in regulation by the feedback circuit
on the secondary side of the circuit. The feedback circuit controls the output voltage by
changing the optocoupler current. Change in the optocoupler diode current results in a
change of current into the control pin of IC U1. Variation of this current results in
variation of duty cycle and hence the output voltage of the power supply.
4.3 Output Rectification
Output rectification for the 5 V output is provided by diode D8. Low ESR capacitor C17
provides filtering. Inductor L3 and capacitor C18 form a second stage filter that
significantly attenuates the switching ripple across C17 and ensures a low ripple output.
Output rectification for the 12 V output is provided by diode D7. Low ESR capacitors C13
and C14 provide filtering. Inductor L2 and capacitor C15 form a second stage filter that
significantly attenuates the switching ripple and ensures low ripple at the output.
Snubber networks comprising R11, C12 and R12, and C16 damp high frequency ringing
across diodes D7 and D8, which results from leakage inductance of the transformer
windings and the secondary trace inductances.
4.4 Output Feedback
Output voltage is controlled using the shunt regulator TL431 (U3). Diode D9, capacitor
C20 and resistor R16 form the soft finish circuit. At start-up, capacitor C20 is discharged.
As the output voltage starts rising, current flows into the optocoupler diode (U2A) via
resistor R13 and diode D9. This provides feedback to the circuit on the primary side.
The current in the optocoupler diode U2A gradually decreases as capacitor C20 charges
and U3 becomes operational. This ensures that the output voltage increases gradually
and settles to the final value without any overshoot. Resistor R16 provides a discharge
path for C20 into the load at power down. Diode D9 isolates C20 from the feedback
circuit after startup.
Resistor R18, R20 and R21 form a voltage divider network that senses the output voltage
from both the outputs for better cross-regulation. Resistor R19 and Zener VR3 improve
cross regulation when only the 5 V output is loaded, which results in the 12 V output
operating at the higher end of the specification.
Resistors R13, R17 and capacitor C21 set the frequency response of the feedback
circuit. Capacitor C19 and resistor R14 form the phase boost network that provides
adequate phase margin to ensure stable operation over the entire operating voltage
range.
Resistor R15 provides the bias current required by the IC U3 and is placed in parallel with
U2A to ensure that the bias current to the IC does not become a part of the feedback
current. Resistor R13 sets the overall DC loop gain and limits the current through U2A
during transient conditions.
1 second, 60 Hz, from Pins 2,3,4,5,6 to Pins 7,9,11 3000 VAC
Pins 2-4, all other windings open, measured at 100
kHz, 0.4 VRMS
Pins 2-4, all other windings open 1000 kHz (Min.)
Pins 2-4, with Pins 7-9 shorted, measured at
100 kHz, 0.4 VRMS
1040 µH, ±10%
20 µH (Max.)
6.3 Materials
Item Description
[1] Core: EER28 gapped for ALG of 213 nH/T
[2] Bobbin: EER28, Horizontal 12 pins (6/6), YC-2806-5
[3] Magnet Wire: #27 AWG, double coated.
[4] Magnet Wire: #26 AWG, double coated.
[5] Tape: 3M Polyester Film, 2.0 mils thick, 16.0 mm wide.
[6] Tape: 3M Polyester Film, 2.0 mils thick, 10.0 mm wide.
[7] Copper Foil, 2 mils thick, 142mm long, 8.5mm wide. To be wrapped over with tape item [6].
[8] Tape: 3M Polyester Film, 2.0 mils thick, 13.5 mm wide.
[9] Bare Wire: #22 AWG
[10] Tape: 3M Polyester Film, 2.0 mils thick, 8.0 mm wide.
[11] Varnish.
Primary side of the bobbin orients to the left hand side. Place 3.1 mm margin tape
on both sides for all windings except WD1 due to built-in 3.1 mm margin of bobbin.
Winding direction is clockwise.
1/2 Primary
Insulation
Insulation
st
Secondary
1
Insulation
nd
2
Secondary
Insulation
2/2 Primary
Insulation
Assembly
WD1
WD2
Bias
WD3
WD4
WD5
Finish
Start on pin 4, wind 24 turns of item [3] from left to right with tight tension and bring
the wire across the bobbin to terminate at pin 3.
2 layers of tape item [5].
Start on pin 6, wind 7 turns bifilar of item [4] from left to right, spread the winding
evenly, and bring the wire across the bobbin to terminate on pin 5.
2 layers of tape item [5].
Start on pin 11, wind 3 turns of item [7] and terminate at pin 9.
1 layer of tape item [5].
Start on pin 7, wind 4 turns quadfilar of item [4] from right to left, spread the winding
evenly across the bobbin, and bring the wire back to the right to terminate on pin11.
2 layers of tape item [5].
Start on pin 3, wind 23 turns of item [3] from left to right with tight tension, place 1
layer tape item [6], then wind another 23 turns of item [3] from right to left, also with
tight tension, and terminate at pin 2.
3 layers of tape item [5].
Grind the cores to get 1038 µH with ALG of 213 nH/T
Secure the cores by wrapping around 2 halves of cores with item [10]. Dip varnish
ACDC_TOPSwitchHX_09
0607; Rev.1.2; Copyright
Power Integrations 2007
ENTER APPLICATION VARIABLES RD-142
VACMIN 90 Volts Minimum AC Input Voltage
VACMAX 265 Volts Maximum AC Input Voltage
fL 50 Hertz AC Mains Frequency
VO 5.00
PO_AVG 35.00
PO_PEAK 35.00 Watts Peak Output Power
n 0.80 %/100 Efficiency Estimate
Z 0.50 Loss Allocation Factor
VB 12
tC 3.00 mSeco
CIN 100.0 100 uFara
ENTER TOPSWITCH-HX VARIABLES
TOPSwitch-HX TOP258PN Univer
Chosen Device
KI 1.00
ILIMITMIN_EXT 1.534 Amps Use 1% resistor in setting external ILIMIT
ILIMITMAX_EXT 1.766 Amps Use 1% resistor in setting external ILIMIT
Frequency (F)=132kHz,
(H)=66kHz
fS
fSmin
fSmax
High Line Operating Mode FF
VOR 128.00 Volts Reflected Output Voltage
VDS 5.63 5.63 Volts TOPSwitch on-state Drain to Source Voltage
VD 0.50 Volts Output Winding Diode Forward Voltage Drop
VDB 0.70 Volts Bias Winding Diode Forward Voltage Drop
KP 0.69
LP 1040 uHenries Primary Inductance
LP Tolerance 10 Tolerance of Primary Inductance
NP 70 Primary Winding Number of Turns
NB 7 Bias Winding Number of Turns
ALG 213 nH/T^2 Gapped Core Effective Inductance
BM 2101 Gauss Maximum Flux Density at PO, VMIN
BP 3524 Gauss Peak Flux Density (BP<4200) at ILIMITMAX
BAC 725 Gauss AC Flux Density for Core Loss Curves (0.5 X
ur 1780 Relative Permeability of Ungapped Core
LG
BWE 32.1 mm Effective Bobbin Width
OD 0.46 mm Maximum Primary Wire Diameter including
INS 0.06 mm Estimated Total Insulation Thickness (= 2 * film
DIA 0.40 mm Bare conductor diameter
AWG 27 AWG Primary Wire Gauge (Rounded to next smaller
CM 203 Cmils Bare conductor effective area in circular mils
CMA
VO1 5.00
IO1_AVG 2.20 2.2 Amps Average DC Output Current
PO1_AVG 11.00 Watts Average Output Power
VD1 0.5 Volts Output Diode Forward Voltage Drop
NS1 3.00 Output Winding Number of Turns
ISRMS1 3.782 Amps Output Winding RMS Current
IRIPPLE1 3.08 Amps Output Capacitor RMS Ripple Current
PIVS1 21 Volts Output Rectifier Maximum Peak Inverse
CMS1 756 Cmils Output Winding Bare Conductor minimum
AWGS1 21 AWG Wire Gauge (Rounded up to next larger
DIAS1 0.73 mm Minimum Bare Conductor Diameter
ODS1 3.57 mm Maximum Outside Diameter for Triple Insulated
2nd output
VO2 12.00
IO2_AVG 2.00 Amps Average DC Output Current
PO2_AVG 24.00 Watts Average Output Power
VD2 0.7 Volts Output Diode Forward Voltage Drop
NS2 6.93 Output Winding Number of Turns
ISRMS2 3.438 Amps Output Winding RMS Current
IRIPPLE2 2.80 Amps Output Capacitor RMS Ripple Current
PIVS2 49 Volts Output Rectifier Maximum Peak Inverse
CMS2 688 Cmils Output Winding Bare Conductor minimum
AWGS2 21 AWG Wire Gauge (Rounded up to next larger
DIAS2 0.73 mm Minimum Bare Conductor Diameter
ODS2 1.54 mm Maximum Outside Diameter for Triple Insulated
3rd output
VO3
IO3_AVG Amps Average DC Output Current
PO3_AVG 0.00 Watts Average Output Power
VD3 0.7 Volts Output Diode Forward Voltage Drop
NS3 0.38 Output Winding Number of Turns
ISRMS3 0.000 Amps Output Winding RMS Current
IRIPPLE3 0.00 Amps Output Capacitor RMS Ripple Current
PIVS3 2 Volts Output Rectifier Maximum Peak Inverse
CMS3 0 Cmils Output Winding Bare Conductor minimum
AWGS3 N/A AWG Wire Gauge (Rounded up to next larger
DIAS3 N/A mm Minimum Bare Conductor Diameter
ODS3 N/A mm Maximum Outside Diameter for Triple Insulated
Total Continuous Output Power
Negative Output N/A If negative output exists enter Output number;
All measurements performed at room temperature, 60 Hz input frequency.
8.1 Efficiency
Efficiency
84.5%
84.0%
83.5%
83.0%
82.5%
82.0%
81.5%
Efficiency (%)
81.0%
80.5%
80.0%
20.0%40.0%60.0%80.0%100.0%
115 VAC
230 VAC
Load (A)
Figure 6 – Efficiency vs. Input Voltage, Room Temperature, 60 Hz.
8.1.1 Active Mode CEC Measurement Data
All single output adapters, including those provided with products, for sale in California
st
after Jan 1
, 2008 must meet the California Energy Commission (CEC) requirement for
minimum active mode efficiency and no load input power. Minimum active mode
efficiency is defined as the average efficiency of 25, 50, 75 and 100% of rated output
power with the limit based on the nameplate output power:
Nameplate Output (PO) Minimum Efficiency in Active Mode of Operation
< 1 W
≥ 1 W to ≤ 49 W 0.09 × ln (PO) + 0.5 [ln = natural log]
> 49 W 0.85
0.49 × P
O
For adapters that are single input voltage only, then the measurement is made at the
rated single nominal input voltage (115 VAC or 230 VAC); for universal input adapters the
measurement is made at both nominal input voltages (115 VAC and 230 VAC).
To meet the standar, the measured average efficiency (or efficiencies for universal input
supplies) must be greater than or equal to the efficiency specified by the CEC/Energy
Star standard.
Percent of
Full Load
25 80.6 80.5
50 82.7 83.7
75 83.0 83.9
100 82.7 84.0
Average 82.2 83.0
CEC
specified
minimum
average
efficiency (%)
Efficiency (%)
115 VAC 230 VAC
82.0*
*Although the CEC standard does not apply to this design, the data is provided for
reference
More states within the USA and other countries are adopting this standard, for the latest
up to date information please visit the PI Green Room:
The chart below shows the available output power vs line voltage for an input power of 1
W, 2 W and 3 W. This measurement was taken by loading the 5 Volt output.
Available Output Power
1.800
1.600
1.400
1.200
1 W Input Power
1.000
0.800
Output Power (W)
0.600
2 W Input Power
3 W Input Power
0.400
0.200
85105125145165185205225245265
Input Voltage (VAC)
Figure 8 – Available Standby Output Power for Fixed Levels of Input Power
11.4 Load Transient Response (75% to 100% Load Step)
In the figures shown below, signal averaging was used to better enable viewing of the
load transient response. The oscilloscope was triggered using the load current step as a
trigger source. Since the output switching and line frequency occur essentially at random
with respect to the load transient, contributions to the output ripple from these sources
will average out, leaving the contribution only from the load step response.
Figure 20 – 5 Volt Transient Response, 90 VAC,
75-100-75% Load Step.
Output Voltage 20 mV/div, Output
Current 1 A / div, 10 ms / div.
Note
: 12 volt output maintained at full load
Figure 21 – 5 Volt Transient Response, 265 VAC,
75-100-75% Load Step
Output Voltage 20 mV/div, Output
Current 1 A / div, 10 ms / div.
11.6.1 Ripple Measurement Technique
For DC output ripple measurements, a modified oscilloscope test probe must be utilized
in order to reduce spurious signals due to pickup. Details of the probe modification are
provided below.
The 4987BA probe adapter is affixed with two capacitors tied in parallel across the probe
tip. The capacitors include one (1) 0.1 µF/50 V ceramic type and one (1) 1.0 µF/50 V
aluminum electrolytic. The aluminum electrolytic type capacitor is polarized, so proper
polarity across DC outputs must be maintained (see below).
Probe Ground
Probe Tip
Figure 23 – Oscilloscope Probe Prepared for Ripple Measurement. (End Cap and Ground Lead Removed)
Differential input line 1.2/50 µs surge testing was completed on a single test unit to
IEC61000-4-5. Input voltage was set at 230 VAC / 60 Hz. Output was loaded at full load
and operation was verified following each surge event.
Surge
Level (V)
+500 230 L to N 90 Pass
-500 230 L to N 270 Pass
+1000 230 L to N 90 Pass
-1000 230 L to N 270 Pass
+2000 230 L,N to G 90 Pass
-2000 230 L,N to G 270 Pass
Note: Unit passes under all test conditions.
Use a Slow Blow fuse at the input (F1) to increase differential surge withstand to 2 kV
Conducted EMI measurements were made with the output connected to the earth ground
connection on the LISN. The result below represents the worst case results.
Figure 32 – Conducted EMI, Neutral Conductor, Maximum Steady State Load, 230 VAC, 60 Hz, and
For the latest updates, visit our website:www.powerint.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power
Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS
MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT
LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
PATENT INFORMATION
The products and applications illustrated herein (including transformer construction and circuits external to the products)
may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications
assigned to Power Integrations. A complete list of Power Integrations’ patents may be found at www.powerint.com
.
Power Integrations grants its customers a license under certain patent rights as set forth at
http://www.powerint.com/ip.htm.