Power Innovations TISP83121D, TISP83121DR Datasheet

DUAL-GATE UNIDIRECTIONAL OVERVOLTAGE PROTECTOR

device symbol

K
G1
G2
SD6XAKA
A
Programmable Pr otection Configurations up to ±100 V
Typically 5 Lines Protected by Two TISP83121D + Diode Steering Networks
High Surge Current
- 150 A 10/1000 µs
- 150 A 10/700 µs
- 500 A 8/20 µs
Pin compatible with the LCP3121
- Functional Replacement in Diode Steering Network Applications
- 50% more surge current
Small Outline Surface Mount Package
- Available Ordering Options
CARRIER PART #
Tube TISP83121D
Taped and reeled TISP83121DR
TISP83121D
FEBRUARY 1999Copyright © 1999, Power Innovations Limited, UK
D PACKAGE
(TOP VIEW)
1
K G1 G2
For operation at the rated current values connect pins 1, 4, 5 and 8 together.
2 3 4
K
8
K
7
A
6
A
5
K
MD6XAYA

description

The TISP83121D is a dual-ga te reverse-blocking unidirectional thyristor designed for the protection of dual-voltage ringing SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction.
The device chip is a four-layer NPNP silicon thyristor structure which has an electrode connection to every layer. For negative overvoltage protection the TISP83121D is used in a common anode configuration with the voltage to be limited applied to the cathod e (K) terminal and the negative reference potential applied to the gate 1 (G1 ) terminal. For positive overvoltage protection the TISP83121D is used in a common cathode configuration with the voltage to be limited applied to the anode (A) terminal and the positive reference potential applied to the gate 2 (G2) terminal.
The TISP83121D is a unidirectional protector and to prevent reverse bias, requires the use of a series diode between the protected line conductor and the protector. Further, the gate reference supply voltage requires an appropriately poled series diode to prevent the
supply from being shorted when the TISP83121D crowbars.
Under low level power cross conditions the TISP83121D gate current will charge the gate reference supply. If the reference su pply cannot absorb the charging current its potential will increase, possibly to damaging levels. To avoid excessive voltage levels a clamp (zener or avalanche breakdown diode) may be added in shunt with the supply. Alternatively, a grounded collector emitter -follower may be used to reduce the charging current by the transistors H
value.
FE
This monolithic protection device is mad e with a ion-implanted epi taxial-planar tech nology to give a consistent protection performance and be virtually transparent to the system in normal operation.
PRODUCT INFORMATION
Information is current as of publication date. Produc ts conform to specifications in accordance with the terms of Power Innovations standard warranty. Production processing does not necessarily include testing of all parameters.
1
TISP83121D
DUAL-GATE UNIDIRECTIONAL OVERVOLTAGE PROTECTOR
FEBRUA RY 1999

absolute maximum ratings

RATING SYMBOL VALUE UNIT
Repetitive peak off-state voltage, 0 °C to 70 °C V Non-repetitive peak on-state pulse current (see Notes 1 and 2)
10/1000 µs (GR-1089-CORE, open-circuit voltage wave shape 10/1000 µs) 150 5/310 µs (CCITT K20/21, open-circuit voltage wave shape 7 kV10/700 µs) 150 8/20 µs (ANSI C62.41, open-circuit voltage wave shape 1.2/50 µs) 500
Non-repetitive peak on-state current, 50 Hz, halfwave rectified sinewave, (see Notes 1 and 2)
100 ms 1 s
900 s Junction temperature T Storage temperature range T
I
I
TSM
DRM
TSP
J
stg
100 V
22
8 3
-40 to +150 °C
-65 to +150 °C
A
A
NOTES: 1. Initially the protector must be in thermal equilibrium with 0 °C < T
its initial conditions. For operation at the rated current value, pins 1, 4, 5 and 8 must be connected together.
< 70 °C. The surge may be repeated after the device returns to
J
2. Above 70 °C, derate linearly to zero at 150 °C lead temperature.
electrical characteristics, TJ = 25 °C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Off-state current Vd=70V, IG=0 A
I
D
Repetitive peak off-state
I
DRM
current
Holding current IT= 1 A, di/dt = -1A/ms
I
H
Reverse current VR=0.3V 1mA
I
R
I
Gate G1 trigger current IT=+1A, t
G1T
Gate G2 trigger current IT=+1A, t
I
G2T
G1-K trigger voltage IT=+1A, t
V
G1T
G2-A trigger voltage IT=+1A, t
V
G2T
Anode to cathode off-
C
AK
state capacitance
V
d=VDRM
f=1MHz, V
= 100 V, IG= 0, 0 °C to 70 °C 10 µA
T
= 0 to 70 °C
J
= 25 °C
T
J
= 70 °C
T
J
= 20 µs +200 mA
p(g)
= 20 µs -180 mA
p(g)
=20µs +1.8 V
p(g)
=20µs -1.8 V
p(g)
=1V
d
, VD=5V, IG= 0 (see Note 3) 100 pF
RMS
90 60
300
mA
NOTE 3: These capacitance measurements employ a three terminal capacitance bridge incor porating a guard circuit. The unmeasured
device terminals are decoupled to the guard terminal of the bridge.
thermal characterist ics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
R
Junction to free air thermal resistance
θ
JA
PRODUCT INFORMATION
2
= 25 °C, EIA/JESD51-3 PCB,
T
A
EIA/JESD51-2 environment, I
= I
T
TSM(900)
105 °C/W
DUAL-GATE UNIDIRECTIONAL OVERVOLTAGE PROTECTOR
PARAMETER MEASUREMENT INFORMATION
+i
I
H
TISP83121D
FEBRUARY 1999
QUADRANT 1 ANODE POSITIVE
SWITCHING CHARACTERISTIC
V
GT
I
V
-v
QUADRANT III
ANODE NEGATIVE
REVERSE CHARACTERISTIC
R
D
V
I
R
-i
DRM
REFERENCE
VOLTAGE
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC

multiple line overvoltage protectio n

Figure 2 shows two TISP83121D devices protecting many lines. Line conductor positive overvoltage protection is given by the steering diode ar ray connected to the anode of the upper TISP83121D and the TISP83121D itself. The TISP83 121D gate reference voltage is the positive batter y supply, +V limiting voltage will be the sum of the voltages of the batter y, th e forward biased conductor diode, the gate trigger of the TISP8312 1D and the forward biased reference voltage blocking diode. Typic ally the conductor voltage will be initially limited at 2.5 V above the +V
BAT
value.
Line conductor negative overvoltage protecti on i s given by the diode ste ering array connected to the cathode of the lower TISP83121D and the TISP83121D itself. The TISP83121D gate reference voltage is the negative battery sup ply, -V
. The initial limiting voltage wil l be the sum of the voltages of the batter y, the forward
BAT
biased conductor diode, the gate trigger of the TISP83121D and the forward biased reference voltage blocking diode. Typically the conductor voltage will be initially limited at 2.5 V below the -V
When an TISP83121D crowbars and grounds all conductors of the appropriate polarity, the device current will be the sum of all the SLIC output currents. This will usually exceed the TISP83121D holding current. To switch off the TISP83121D and re sto re normal operation , the grou nde d cond iti on of the SLIC output must be detected and the SLIC outputs turned off.
BAT
BAT
value.
+v
PM6XAGB
. The initial
The 150 A rating of the TISP83121D a llows a large number of li nes to be prot ected agains t currents cau sed by lightning. For example, if a recommendation K.20 10 /700 generator was connected to all lines, together
PRODUCT INFORMATION
3
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