The TISP61089 is a dual forward-conducting
buffered p-gate overvoltage protector. It is
designed to protect monolithic SLICs (Subscriber
Line Interface Circuits) against overvoltages on
the telephone line caused by lightning, a.c.
power contact and induction. Th e TISP61089 limits voltages that exceed the SLIC supp ly rail voltage. The
TISP61089 parameters are specified to allow equipment compliance with Bellcore GR-1089-CORE, Issue 1.
The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage in the region of
-10 V to -75 V. The protector gate is connected to this negative supply. This references the protection
(clipping) voltage to the ne gative supply voltage. As the pro tectio n voltage wil l then track the nega tive supply
voltage the overvoltage stress on the SLIC is minimised.
Positive overvoltages are cl ipped to ground by diode forward condu ction. Negative overvoltages are i nitially
clipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, then
PRODUCT INFORMATION
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
the protector will c rowbar int o a low voltage on-s tate cond ition. As the overvoltage subs ides the high holdi ng
current of the crowbar prevents d.c. latchup.
The TISP61089 is intended to be used with a series combination of a 25Ω or higher resistance and a suitable
overcurrent protector. Power fault compliance requires the series overcurrent element to open-circuit or
become high impedance (see Applications Information). For equipment compliant to ITU-T recommendations
K20 or K21 only, the series resistor value is set by the power cross requirements. For K20 and K21, a
minimum series resistor value of 10Ω is recommended.
These monolithic protection devices a re fabricated in ion-impla nted planar ver tical power structures for high
reliability and in normal system operation they are virtually transparent. The TISP61089 buffered gate design
reduces the loading on the SLIC supply during overvoltages caused by power cross and induction. The
TISP61089 is available in 8-pin plastic small-outline surface mount package and 8-pin plastic dual-in-line
package.
absolute maximum ratings
RAT INGSYMBOLVALUEUNIT
≤
Repetitive peak off-state voltage, I
Repetitive peak gate-cathode voltage, V
Non-repetitive peak on-state pulse current (see Notes 1 and 2)
Non-repetitive peak on-state current, 60 Hz (see Notes 1 and 2)
0.1 s11
1s
5s
300 s
900 s
Non-repetitive peak gate current, 1/2 µs pulse, cathodes commoned (see Notes 1 and 2)I
Operating free-air temperature rangeT
Junction temperatureT
Storage temperature rangeT
= 0, -40°C≤T
G
= 0, -40°C≤T
KA
85°CV
J
≤
85°CV
J
DRM
GKRM
I
TSP
I
TSM
GSM
A
J
stg
-100V
-85V
30
40
4.5
2.4
0.95
0.93
40A
-40 to +85°C
-40 to +150°C
-40 to +150°C
A
A
NOTES: 1. Initially the protector must be in thermal equilibrium with -40°C≤T
its initial conditions.
2. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground ter minal pairs. Additionally, both
terminal pairs may have thei r rated current values applied simultaneously (in this case the Ground terminal current will be twice the
rated current value of an individual terminal pair). Above 85°C, derate linearly to zero at 150°C lead temperature.
recommended operating conditions
C
Gate decoupling capacitor100220nF
G
TISP61089 series resistor for first-level and second-level surge survival
R
S
TISP61089 series resistor for first-level surge survival
PRODUCT INFORMATION
2
≤
85°C. The surge may be repeated after the device returns to
ure 2. NON-REPETITIVE PEAK ON-STATE CURRENT AGAINST DURATION
APPLICATIONS INFORMATION
gated protectors
This section covers three topics. Firstly, it is explained why gated protectors are needed. Second, the voltage
limiting action of the protector is described. Third, an example application circuit is described.
purpose of gated protectors
Fixed voltage thyristor overvoltage protectors have been used si nce the early 1980s to protect mo nolithic
SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c.
power contact and induction. As the SLIC was usuall y powered from a fixed voltage negative supply rail, the
limiting voltage of the protector could als o be a fixed value. The TISP1072F3 is a typical example of a fixed
voltage SLIC protector.
SLICs have become more sophisticated. T o minimise power consumption, some designs automatically adjust
the supply voltage, V
supply voltage would be set low, but for long lines, a higher supply voltage would be generated to drive
sufficient line curren t. The optimum protection for this type of SLIC would be given by a protection voltage
which tracks the SLIC supply voltage. This can be achieved by connecting the protection thyr istor ga te t o the
SLIC supply, Figure 3. This gated (programmable) protection arrangement minimises the voltage stress on
the SLIC, no matter what value of supply voltage.
, to a value that is just sufficient to drive the requir ed line cu rrent. For shor t line s the
Figures 4. and 5. show how the TISP61089 limits neg ative and positive overvoltages. Positive overvoltages
(Figure 5) are clipped by the antiparallel diodes in th e TISP61089 and the resulting current is diver ted to
ground. Negative overvoltages (Figure 4.) are initially clipped clos e to the SLIC negative supply rail value
). If sufficient curren t is available from the overvoltage, then the protector (Th5) wil l crowbar into a low
(V
BAT
voltage on-state conditio n. As the overvoltage sub sides th e high holdin g current o f th e crowbar prevents d.c.
latchup. The protection voltage will be th e sum of t he gate su pply (V
(V
). The protection voltage will be i nc reas ed if th er e is a l ong c on necti on bet ween t he gat e d ec oup li ng
GK(BO)
capacitor, C1, and the gate terminal. During the in iti al rise of a fast impulse, the gat e c ur rent (I
as the cathode current (I
). Rates of 70 A/µs can cause inductive voltages of 0.7 V in 2.5 cm of printed wiring
K
) and the peak gate-c athode voltage
BAT
) is the same
G
track. To minimi se this inductive voltage increase of protection voltage, the length of the c apacitor to gate
terminal tracking should be minimised. Inductive voltages in the protector cathode wiring will also increase the
protection voltage. These voltages can be minimised by routing the SLIC connection through the protector as
shown in Figure 3.