PMC-Sierra PM8385 User Manual

QuadPHY RT

4-Port Gigabit Ethernet and 1/2G Fibre Channel Repeater or Retimer

PM8385

Released

GENERAL

• Supports four physical interfaces for Gigabit Ethe rnet at 1.25 Gbit/s per IEEE 802.3z or Fibre Chan nel phys ical interfaces at 1.0 625 or 2.125 Gbit/s per Fibre Channel Physical Interface (FCPI) for repeating or retiming applications.

• Backplane repeating/retiming signal integrity features enable standards compliance, link extension and robust gigabit-serial operation in the hostile backplane environment.

• Provides direct connection to highspeed serial backplanes, coax stacking cables, or optical / copper Small Form Factor Pluggable (SFP) modules.

• Provides non-blocking cross-bar for protection switching and data bi-cast, multi-cast or broadcast.

• Fast high-speed serial lock times and low device latency.

• Rate detection/auto-s elec tion betwe en 1G and 2G Fibre Channel.

• Extensive per port backplane monitoring for loss of sign al, error rate s, and link level violations.

• Supports single-ended or differential 125 MHz reference clock for Gigabit Ethernet, or 106.25 MHz reference clock for Fibre Channel applications.

HIGH-SPEED INTERFACE

• High-speed outputs wi th sel ec tab le output amplitude and programmable pre-emphasis per port to counteract dielectric losses and allow maximum reach on printed circuit boards and cables.

• Programmable receive input equalization provides robust data recovery of highly degraded input signals.

• Minimal board footprint and exceptional signal integrity achieved:

• No external compone nts are require d

to interface the high-speed signal s due to internal AC coupling.

• Programmable receive input

termination of 100 ohm or 150 ohm differential.

• Programmable output impedance of

100 ohm or 150 ohm differential.

TEST AND CONTROL

• Digital loss of link (DLOL) detect pin provides status output for monitoring individual or multiple links.

• DLOL and optional interrupt pin can be programmed to indicate:

• Analog loss of signal.

• Excessive 8B/10B code and disp arity

violations.

• Fibre Channel comma density.

• Loss of synchronization to detect Gigabit Ethernet or Fibre Channel framing errors.

• Internal packet generator and comparator features simplify backplane and jitter testing via:

• Programmable pattern (can be used

with GE high, low and mixed frequency tests).

LOCK DIAGRAM

TDOP[1]

TDOP[0] TDON[0]

TCK TMS

TDO

TRSTB

RDIP[1] RDIN[1]

TDON1]

RDIP[0] RDIN[0]

TDI

Retimer/

SERDES/

Reclocker

SERDES/

Reclocker

JTAG

CDRU

RPRES

CLK_SEL

REFCLK_S

REFCLK_P

Monitor

Control

RX100/

150[3:0]

Cross-bar

Two Wire

Interface

MDC_SCL

DVPRTAD[4:0]

TWISEL

RESETB

MDIO_SDA

Retimer/

Monitor

Control

Impedance

Control

EXTCAP

TX100/

REFCLK_N

150[3:0]

Retimer/

Monitor

Control

Retimer/

Monitor

Control

RET_MODE

DLOLBYP_MASK

Pattern

Generator/

Comparator

Control Block

HALF_RATE

FC_GE_RET_SEL

AUTO_RATE_SEL

SERDES/

Reclocker

SERDES/

Reclocker

]

[ E Z

L A U

PREEMPH[1:0]

Q E C E R

RDIP[2] RDIN[2]

TDOP[2] TDON[2]

RDIP[3] RDIN[3]

TDOP[3] TDON[3]

DLOLB PORT_DLOLB[3:0] PORT_2G_RATE[3:0]

INTRB

PMC-2030741 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., © Copyright PMC-Sierra, Inc. 2003. Issue 2 AND FOR ITS CUSTOMERS’ INTERNAL USE All right s reserved .

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

PM8385 QuadPHY RT

4-Port Gigabit Ethernet and 1/2G Fibre Channel Repeater or Retimer

• Compliant RPAT test.

• Low Transition Density Pattern.

• Compliant Jitter Tolerance .

• Low Frequency Patter.

• Supply Noise Pattern.

• Internal serial loopback modes for testing and debugging.

• Multple device control options for configuration and diagnostic access:

• External control pins with register

PHYSICAL

• 0.18 um CMOS, 1.8V and 3.3V supply.

• Small 15mm x 15mm footprint 196-pin BGA with 1mm ball pitch.

• Ultra-low operating power of 1.1W typical with all 4 channels active at

1.25 Gbit/s .

• Extended temperature range of -40°C to +85°C for challenging system environments.

override.

• 2-pin serial Two-Wire Interface.

• 2-pin serial MDC/MDIO.

• Provides a standard 5-signal IEEE

1149.1 JTAG test port for boundary scan board testing purposes.

APPLICATIONS

• High-speed back plane driv er operating from 1.0625 Gbit/s to 2.125 Gbit/s including 1.25 Gbit/s for Gigabit Ethernet.

uadPHY RT as Dual Bi-directional Gi gabit Ethernet Retimer

Optical SFP Optical SFP Copper SFP Copper SFP Copper SFP

SFP Socket SFP Socket SFP Socket

Optical SFP Optical SFP Copper SFP Copper SFP Copper SFP

SFP Socket

Serial Links Exceed Jitter Specifications

OctalPHY

Serial Links Exceed Jitter Specifications

Flexible Gigabit Ethernet Line Card

PM8352

Flexible Gigabit Ethernet Line Card

PM8373 HexPHY

1GR

Controller ASIC

GMII/TBI Interface

Controller ASIC

MAC/Port

Serial Backplane Links

up to 48" + 2 connections

PM8352

OctalPHY

Serial Backplane Links

up to 48" + 2 connections

PM8373 HexPHY

• Distributed switch fabrics or protection switches via data bi-cast, multi-cast or broadcast to fabric elements.

• Enterprise Ethernet or Fibre Channel switches.

• Gigabit Ethernet Retimer including 1000BASE-CX driver.

• Fibre Channel retimer.

• Wireless base-station interconnect.

• Performance computing and blade server systems.

• Aerospace, scientific, and medical imaging systems.

• Digital broadcast video.

• Inter-medium connections.

Switch Fabric

PM8385

QuadPHY RT

Connector

a B

Connector

Switch ASIC w/

Integrated

SERDES

PM8385

QuadPHY RT

5 bit RGMII/TBI Interface

Retransmitted 2 G Serial Backplane After Retimer2 G Serial Backplane After 60" Before Retimer

PM8385

QuadPHY RT

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PMC-2030741 (R2) For a complete list of PMC-Sierra’s

trademarks, see our web site at

http://www.pmc-sierra.com/legal/

Other product and company names mentioned herein may be the trademarks of their respective owners.