PMC PM8355 Datasheet

Preliminary

SPECTRA-9953

SONET/SDH Payload Extractor/Aligner for 9953 Mbit/s

PM5317

FEATURES

• Monolithic single channel STS192/STM-64 or quad channel STS48/STM-16 SONET/SDH Payload extractor/aligner.

• Designed for use in interface applications operating at serial interface speeds of up to OC-192 rates:

• single STS- 192c (STM-6 4/

AU4-64c);

• single STS-192 (STM-64/AU4-

16c/AU4-4c/AU4/AU3) channelized to STS-1;

• quad STS-48c (STM-16/AU4-16c);

• quad STS-48 (STM-16/

AU4-4c/AU4/AU3);

• pointer processing for STS-1,

STS-3c, STS-12c, STS-24c, STS48c, and STS-192c traffic.

• In single STS-192/STM-64 mode, supports a duplex 16-bit 622 MHz LVDS line side interface for direct connection to external clock recovery,

clock synthesis and serializerdeserializer components.

• In quad STS-48/STM-16 mode, supports four duplex 4-bit 622 MHz LVDS line side interfaces for direct connection to external clock recovery, clock synthesis and serializerdeserializer components.

• Standard OIF SFI-4 (16 x 622 Mbit/s) line side interface.

• Each channel provides termination for SONET Section, Line and Path overhead or SDH Regenerator Section, Multiplexer Section and High Order Path overhead.

• Provides a 16-bit 622 Mbit/s 8B10B encoded (777.7 MHz) ADD and DROP serial TelecomBus interface for grooming a single STS-192/STM-64 stream.

• Provides four 4-bit 622 Mbit/s 8B10B encoded (777.7 MHz) ADD and DROP serial TelecomBus interfaces for grooming four STS-48/STM-16 streams.

• Maps SONET/SDH payloads to system timing, accommodating plesiochronous timing offsets between the line and system timing references, through pointer processing.

• Provides STS-12 cross-connect capability for grooming traffic at the ADD and DROP TelecomBus interface.

• The entire SONET/SDH transport overhead is extracted to and inserted from dedicated pins. Path BIP-8 error counts are extracted to dedicated pins.

• Frames to the SONET/SDH receive stream, inserts framing by tes and STS identification into the transmit stream, and processes or inserts the transport overhead.

• Interprets or generates the STS (AU) pointer bytes (H1, H2, H3), extracts or inserts the synchronous payload envelope(s) and processes or inserts the path overhead.

BLOCK DIAGRAM

Status

Information

Rx Ring Control

Port

OC-192 Mode: 16 x 622 MHz LVDS

4 x OC-48 Mode: 4 x 4 x 622 MHz LVDS

OC-192 Mode: 16 x 622 MHz LVDS

4 x OC-48 Mode: 4 x 4 x 622 MHz LVDS

Rx Line

Interface

Tx Line

Interface

Receive O/H Clock, Frame

Receive Transport Overhead

Receive Section/Line DCC and

Transport

Processing Slice x 4

Rx APS

Sync

Extractor

Bit Error

Monitor

Section

Processor

RX Transport

O/H Processor

SONET/SDH

Alarm Reporting Controller

Section

Trace Processor

Tx Transport

O/H Processor

Tx Ring

Control Port

Trace

Pulse

Clock

Path

Trace

Processor

Rx Path O/H

Processor

Path

Trace

Processor

Tx Path O/H

Processor

B3E

Path Processing Slice:

192 x STS-1

Telecom

Aligner

JTAG Test

Access Port

Aligner

Tx Pointer Interpreter

Mode

STS-12XC8B/10B

Encoder

STS-12XC8B/10B

Decoder

Microprocessor Interface

PISO

DRU

LVDS

Transmitter

LVDS

Receiver

OC-192 Mode: 16 x 777 MHz LVDS

4 x OC-48 Mode: 4 x 4 x 777 MHz LVDS

Alarm Reporting

OC-192 Mode: 16 x 777 MHz LVDS

4 x OC-48 Mode: 4 x 4 x 777 MHz LVDS

Control

Transmit

and

Transport

Status Information

PMC-2000992 (P2) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  Copyright PMC-Sierra, Inc. 2001

O/H

Test Data

Quad 2488

or 9953

16-bit

Microprocessor

Bus

Preliminary PM5317 SPECTRA-9953

SONET/SDH Payload Extractor/Aligner for 9953 Mbit/s

• Supports Automatic Protection Switching (APS):

• Ring control port communication of

path REI and path RDI alarms;

• Filters the APS channel (K1,K2)

bytes into internal registers; inserts the APS channel into the transmit stream.

• Supports line loopback from the line side receive stream to the transmit stream and d iagnostic loop-back from an ADD TelecomBus interface to a DROP TelecomBus interface.

TYPICAL APPLICATION

OC-192 TO DS3 CARD

Optics

OC-192 CDR +

SERDES

• Provides a standard 5 signal IEEE

1149.1 JTAG test port for boundary scan board test purposes.

• Provides a generic 16-bit microprocessor bus interface for configuration, control, and status monitoring.

• Low power, 1.8 V CMOS core logic with 3.3 V CMOS/TTL digital inputs and digital outputs (2.5 V tolerant).

• Industrial temperatu re rang e (- 40 °C to +85 °C).

• 1152 pin FCBGA package.

16 x 622 MHz

PM5317 SPECTRA-

9953

APPLICATIONS

• Channelized STS-192/STM-64 or 4 x STS-48/STM-16 Interfaces for:

• Optical cross connects;

• Digital cross connects;

• Router and switch line cards;

• ADM aggregate cards for TDM and

multiservice applications;

• Terminal multiplexers;

• SONET/SDH test equipment.

PM7390

S/UNI-MACH48

PM7390

S/UNI-MACH48

PM7390

S/UNI-MACH48

160 GIGABIT STS-1 CROSS-CONNECT

Optics Optics Optics Optics

PM5395

CRSU

4x2488

•

PM5395

CRSU

4x2488

PM5395

CRSU

4x2488

PM5317

SPECTRA-

9953

PM5317

SPECTRA-

9953

PM5317

SPECTRA-

9953

PM5372

TSE

PM5372

TSE

PM5372

TSE

PM5372

TSE

4 x 4 x 777

MHz

PM5317

SPECTRA-

9953

PM5317

SPECTRA-

9953

PM5317

SPECTRA-

9953

PM7390

S/UNI-MACH48

PM5395

CRSU

4x2488

•

PM5395

CRSU

4x2488

PM5395

CRSU

4x2488

Optics Optics Optics Optics

Head Office: PMC-Sierra, Inc. #105 - 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: 604.415.6000 Fax: 604.415.6200

To order documentation, send email to: document@pmc-sierra.com or contact the head office, Attn: Document Coordinator

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

All product documentation is available on our web site at: http://www.pmc-sierra.com For corpo rate information, send email to: info@pmc-sierra.com

trademark and SPECTRA is a trademark of PMC-Sierra, Inc.

PMC PM8355 Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

BLOCK DIAGRAM

APPLICATIONS