PMC PM7382 Datasheet

Frame Engine and Data Link Manager 32P256

PM7382

FREEDM-32P256

OVERVIEW

The FREEDM-32P256 chip offers the
following features:

• Single-chip multi-channel HDLC
controller with a 66 MHz, 32-bit
Peripheral Component Interconnect
(PCI) 2.1 compatible bus for
configuration, monitoring, and transfer
of packet data.

• An on-chip DMA controller with
scatter/gather capabilities.

• Supports up to 256 bi-directiona l
HDLC channels assigned to a
maximum of 32 channelized T1/J1/E1
links. You can program the number of
time-slots assigned to an HDLC
channel from 1 to 24 (for T1/J1) and
from 1 to 31 (for E1).

• Supports up to 256 bi-directiona l
HDLC channels assigned to a
maximum of 32 MVI P d igi tal te le pho ny
buses at 2.048 Mbit/s per link, or
8 H-MVIP buses at 8.192 Mbit/s per
link.

• Supports up to 32 bi-directional HDLC
channels, each assigned to an
unchannelized arbitrary-rate link,
subject to a maximum aggregate link
clock-rate of 64 MHz in ea ch dire cti on.

• Channels assigned to links 0 to 2
support clock rates up to 52 MHz.
Channels assigned to links 3 to 31
support clock rates up to 10 MHz. In
the special case wher e no more th an 3
high-speed links are used, the
maximum aggregate link clock-rate is
156 MHz.

• Links configured for channelized
T1/J1/E1 or unchannelized operation
support the gapped-clock method for
determining time-slots, which is
backwards compatible with the
FREEDM-8 and FREEDM-32 devices.

• For each channel, the HDLC receiver
supports programmabl e flag-sequence
detection, bit de-stuffing and
frame-check sequence validation. The
receiver supports the vali dation of b oth

CRC-CCITT and CRC-32 frame-check
sequences.

• For each channel, the HDLC
transmitter supports programmable
flag-sequence generation, bit stuffing
and frame-check sequence
generation. The transmitter supports
the generation of both CRC-CCITT
and CRC-32 frame-check sequences.
The transmitter also aborts packets
under the direction of the host or
automatically when the channel
underflows.

• Provides 32 kbytes of o n-c hip me mo ry
for partial packet buffering in both the
transmit and receive directions. You
can configure this mem ory to support a
variety of different channel
configurations: from a single channel
with 32 kbytes of buffering, to 256
channels, each with a minimu m of 48
bytes of buffering.

• Provides a standard five signal
P1149.1 JTAG test-port for boundary
scan board-test purposes.

BLOCK DIAGRAM

RD[31:0]

RCLK[31:0]

RFPB[3:0]

RMVCK[3:0]

RMV8DC

RMV8FPC

RFP8B

TD[31:0]

TCLK[31:0]

TFPB[3:0]

TMVCK[3:0]

TMV8DC

TMV8FPC

TFP8B

RBCLK

RBD

Receive

Channel

Assigner

(RCAS256)

Transmit
Channel

Assigner

(TCAS256)

TBCLK

TBD

Receive HDLC

Processor/Partial

Packet Buffer

(RHDL256)

Performance

Monitor (PMON)

Transmit HDLC

Processor/ Partial

Packet Buffer

(THDL256)

PMCTEST

SYSCLK

Receive

DMA

Controller

(RMAC256)

Transmit

DMA

Controller

(TMAC256)

RSTB

Controller
(GPIC256)

JTAG Port

TMS

TRSTB

TDI

TCK

TDO

PCI

AD[31:0]
C/BEB[3:0]

PAR
FRAMEB

TRDYB
IRDYB

STOPB
DEVSELB
IDSEL
LOCKB
REQB
GNTB

PERRB
SERRB
PCIINTB
PCICLK
PCICLKO
M66EN

PMC-2011578 (r2) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE © Copyright PMC-Sierra, Inc. 2001

PM7382 FREEDM-32P256

Frame Engine and Data Link Manager 32P256

• Supports 5 Volt tolerant I/Os for non­PCI signals. Supports a 3.3 Volt PCI
signaling environment.

• 329-pin plastic ball grid-array (PBGA)
package.

HIGH DENSITY T1/E1 LINE CARD

8

8

32xT1/E1/J1

8

APPLICATIONS

• IETF PPP interfaces for routers.

• Frame Relay interfaces for ATM or

Frame Relay switches and
multiplexers.

SBI

PM4318
OCTLIU

PM4318
OCTLIU

PM4318
OCTLIU

PM4332

TE-32

• FUNI or Frame Relay service inter­working interfaces for ATM switches
and multiplexers.

• Internet/Intranet access equipm en t.

• Packet-based DSLAM equipment.

PCI Bus

Packet

PM7382

FREEDM-

32P256

Mamory

Processor

8

PM4318
OCTLIU

Head Office:
PMC-Sierra, Inc.
8555 Baxter Place
Burnaby, B.C. V5A 4V7
Canada
Tel: [phone]
Fax: [phone]

To order documentation,
send email to:
[e-mail]
or contact the head office,
Attn: Document Coordinator

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

All product documentation is available
on our web site at:
http://www.pmc-sierra.com
For corporate informatio n,
send email to:
[e-mail]

PMC-2011578 (r2)

© Copyright PMC-Sierra, Inc. 2001. All
rights reserved. August 2001

FREEDM-32, FREEDM-8, OCTLIU, TE-32,
SBI, Any-PHY, and PMC-Sierra are
trademarks of PMC-Sierra, Inc.