PMC PM73487QSE Datasheet
PM73487
Released
PMC-Sierra,In
c.
622 MBPS ATM Traffic Management Device
QRT
PMC-1980619(R3) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE © Copyright PMC-Sierra, Inc. 2001.
FEATURES
QUEUING AL GO RITHMS
Receive
• Maintains 64 weighted, bandwidthcontrolled Service Classes (SCs) with
per-VC queues.
• Provides round-robin servicing of
queues within each SC
• Provides per-channel (VP or VC), perSC, and per-direction congested and
maximum queue depth limits
• Provides up to 64K cell buffers
Transmit
• Provides 31 VOs
• Maintains 16 SCs for each virtual
output (VO) w ith per-VC accounting
• Provides per-channel (VP or VC), perSC Queue (SCQ), per-SC, per-VO,
and per-direction congested and
maximum queue depth limits
• Provides up to 64K cell buffers
CONGESTION MANAGEMENT
ALGORITHMS
• Supports EPD and Partial Packet
Discard (PPD) for UBR traffic, and as
a backup for ABR traffic
• Supports CLP-based cell discard and
Explicit Forward Congestion Indicator
(EFCI) cell marking
• Supports three congestion limits (as
well as EPD, CLP, and EFCI, and/or
backpressure) for logical multicast on
the transmit side
SWITCHING
• Supports VC and VP switching.
• Supports up to 16K VCs
ADDRESS MAPPING
• Supports all 12 VP and 16 VC bits
through use of a double, indirect
lookup table
• Performs header translation at both
the input (receive) and output
(transmit) directions. Input header
translation is used to pass the output
queue channel number through the
switch
MULTICAST
Supports logical multicast with a superior
queue-clearing algorithm
DIAGNOSTIC/ROBUSTNESS
FEATURES
• Checks the header parity
• Counts tagged cells
• Runs error checks continually on all
fabric lines
• Checks liveness of c ont rol signal lines
at both switch fabric and UTOPIA
interfaces, working around partial
fabric failures
• Checks Static Random Access
Memory (SRAM) and Dynamic
Random Access Memory (DRAM)
parity
STATISTICS FEATURES
• In the receive direction, counts cells
transmitted and dropped.
• In the transmit direction, counts cells
transmitted and dropped on a per-VC
basis
I/O FEATURES
• Provides four switch element
interfaces with phase align ers. The
phase aligners allow for external
serialization of the data stream
enabling systems to be built that
support device separation of up to
10 meters.
• Provides a UTOPIA Level 2 Multi-PH Y
(MPHY) 16-bit, 50 MHz interface
• Provides a 2-level priority servicing
algorithm for high and low bandwidth
UTOPIA PHY layer de vices
• Provides a multiplexed address/data
CPU interface
• Provides two 100 MHz, 32-bit,
synchronous DRAM cell buffer
interfaces
• Provides three 100 MHz, sy nchronous
SRAM control interfaces
• Provides a JTAG boundary scan
interface
COMPATIBILITY FEATURES
• Compatible with the ATM Forum 3.0,
3.1, and 4.0 specification s
• Compatible with the ATM Forum
UTOPIA Level 1 and Level 2
50 MHz 100 MHz 66 MHz
50 MHz 100 MHz 66 MHz
Receive UTOPIA
Transmit UTOPIA
To QSE
From QSE
BP/Ack from QSE
BP/Ack to QSE
TX DRA M
Control
TX DRAM
Cell Buffer
MC RAM
TU RAM
TSC RAM
TSF RAM
TS RAM
VO RAM
Queue
Engine
CH RAM
Control
CH RAM
AL RAM
AL R AM
Control
UTO PIA
Loopback
RSC RA M
RSF RA M
RS RAM
ABR RAM
Contro l
RX DR A M
Contro l
RU RAM
Microprocessor
Interface
Microprocessor
RX DRAM
C ell Buffe r
ABR RAM
JTAG
BLOCK DIAGRAM
Head Office:
PMC-Sierra, Inc.
8555 Baxter Place
Burnaby, B.C. V5A 4V7
Canada
Tel: 604.415.6000
Fax: 604.415.6200
622 MBPS ATM Traffic Management Device
To order documentation,
send email to:
document@pmc-sierra.com
or contact the head office,
Attn: Document Coordinator
All product documentation is available
on our web site at:
http://www.pmc-sierra.com
For corporate inform ation,
send email to:
info@pmc-sierra.com
PMC-1980619(R3)
© Copyright PMC-Sierra,
Inc. 2001. All rights reserved.
SATURN and S/UNI are
registered trademarks of
PMC-Sierra, Inc. Any-PHY,
FREEDM, and POS-PHY
Level 3 are trademarks of
PMC-Sierra, Inc.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNA L USE
Released PM73487
specifications
• Compatible with the PM73488 QSE
PHYSICAL CHARACTERISTICS
• 3.3 V supply voltage
• 5 V tolerant inputs on the
microprocessor and UTOPIA
interfaces
• Available in a 503-pin Enhanced
Plastic Ball Grid Array (EPBGA)
package
TYPICAL APPLICATIONS
• A Stand-Alone 622 Mbit/s Switch
• A 5 Gbit/s to 20 Gbit/s Scalable
Switch Architecture
• A 2.4 Gbit/s to 80 Gbit/s Scalable
Switch Architecture
• A 5 Gbit/s to 320 Gbit/s Scalable
Switch Architecture
PM73487
QRT™
622 Mbit/s ATM Traffic
Management Device
PM7324
Atlas-800
ATM Layer Cell Routing
Control, Monitoring, and
Policing 800 Mbit/s
PHY Device
PM73488
QSE™
PM73487 #1
QRT™
Receive Input
PM73487 #8
QRT™
Receive Input
622 Mbit/s
Aggregate
Receive
UTOPIA
Level 2
PM73487 #1
QRT™
Transmit Output
PM73487 #8
QRT™
Transmit Output
622 Mbit/s
Aggregate
PM73487 #9
QRT™
Receive Input
PM73487 #16
QRT™
Receive Input
PM73487 #9
QRT™
Transmit Output
PM73487 #16
QRT™
Transmit Output
Transmit
UTOPIA
Level 2
622 Mbit/s
Aggregate
622 Mbit/s
Aggregate
Receive
UTOPIA
Level 2
622 Mbit/s
Aggregate
×
16
×
16
Transmit
UTOPIA
Level 2
622 Mbit/s
Aggregate
622 Mbit/s
Aggregate
622 Mbit/s
Aggregate
PM73488
QSE™
×
16
×
16
PM73488
QSE™
PM73488
QSE™
PM73488
QSE™
PM73488
QSE™
•
•
•
•
•
•
x4
x4
x4
x4
TYPICAL APPLICATION- QRT Used as a standalone 622 Mbps ATM switch
64X64 SWITCH APPLICATION (10GBPS)
Loading...