PMC-Sierra,Inc.
155 Mb/s SATURN User Network Interface for WANs
PM5347
S/UNI-155-PLUS
FEATURES
• Monolithic SATURN™-compatible
Asynchronous Transfer Mode (ATM)
network interface.
• Implements the ATM transmission
convergence (TC) sublayer for ATM
according to ATM Forum specifications
and ITU-T recommendation s using the
SONET/SDH 155.52 Mb/s format. Also
implements ATM Forum specified
“Mid-range PHY” rates of 51.52, 25 .92
and 12.96 Mb/s.
• Includes on-chip clock recovery and
clock synthesis at all rates. Clocking
can be bypassed for use with external
clock sources. Operates in master or
slave (loop timed) timing modes.
• Provides TTL-compatible inputs and
outputs. Provides differential pseudoECL-compatible se rial line sid e inpu ts .
• Supports Fiber Optic, Un shielded
Twisted Pair and Shielded interfaces.
• Processes all SONET/SDH UNI
overhead.
• Provides access to section and line
datalinks and all additional transport
and path overhead to allow additional
external processing for full SONET/
SDH Network-Node Interface (NNI)
compliance.
• Provides synchronous 8-bit or 16-bit
SCI-PHY™ system side interface with
4-cell deep FIFO buffers in transmit
and receive paths with parity support.
• Inserts and extracts ATM payloads
using cell delineation.
• Provides a generic 8-bit
microprocessor bus interface for
configuration, control, and status
monitoring.
• Software-compatible with the PM5345
S/UNI-155™, PM5346 S/UNI-155LITE™ and the PM5355 S/UNI-622™.
• Provides a standard 5-signal P1149.1
JTAG test port for boundary scan
board test purposes.
• Low power, +5 V CMOS technology.
• Packaged in a 208 pin (28mm x
28mm) PQFP with 0.5mm pin pitch.
• Industrial temperature ra nge ope ration
(-40°C to +85°C).
• Counts received cells written into the
receive FIFO, received HCS errored
cells that are discarded, and received
HCS errored cells that are corrected
and passed through the receive FIFO.
TRANSMIT SECTION
• Counts transmit cells read from the
transmit FIFO.
• Inserts a register programmable path
signal label (C2).
• Inserts path B3, path FEBE
indications, line B2, line FEBE
indications, and section B1 to allow
performance monitoring at the far end.
• Optionally inserts the 16- or 64-byte
section trace (J0) sequ ence and the 16
or 64 byte path trace (J1) sequence
from internal register banks.
• Optionally inserts an externally
generated section user channel (F1),
order wire channels (E1, E2) and the
DCC channels (D1-D3 and D4-D12)
via serial interfaces.
• Optionally inserts path AIS, path RDI,
line AIS, and line RDI.
• Optionally inserts re gister
programmable APS (K1, K2) and
synchronization status (Z1) bytes.
RECEIVE SECTION
• Filters and captures the automatic
protection switch channel (K1, K2)
bytes in readable registers and detects
APS byte failure.
BLOCK DIAGRAM
Line Side
TSDCLK,TOWCLK
TSD,TSOW,TSUC
TLDCLK
TLAIS
Transmit
Processor
Receive
Processor
LOF
LOS
RSDCLK,ROWCLK
TLRDI
TTOH
TTOHFP
TTOHCLK
TLD,TLOW
Transport
O/H
Extract
Transmit
Line O/H
Processor
Section
Trace
Buffer
Receive
Line O/H
Processor
Transport
O/H
Extract
LAIS
LRDI
RTOH
RLDCLK
RLD, RLOW
RSD,RSOW,RSUC
TRCLK+/-
TXD+/TXC+/-
RXDO+/-
RXD+/-
ALOS+/-
RRCLK+/-
TATP
Clock
Recovery
SIPO
Clock
Recovery
SIPO
FLO
LF+/-
TBYP
RATP
Section O/H
Section O/H
RBYP
• Extracts the 16- or 64-byte section
trace (J0) sequence and the 16- or 64byte path trace (J1) sequence into
internal register banks.
• Extracts the DCC channels (D1-D3
and D4-D12) for optional external
processing.
• Detects Loss Of Signal (LOS), Out Of
Frame (OOF), Loss Of Frame ( LOF),
line Alarm Indication Signal (AIS), line
Remote Defect Indication (RDI-L),
Loss Of Pointer (LOP), path AIS, path
RDI (RDI-P) and Loss Of Cell
Delineation (LCD).
• Counts received secti on B1 errors, line
B2 errors, line FEBEs, path B3 errors
and path FEBEs for performance
monitoring purposes.
APPLICATIONS
• ATM Switching Systems
• ATM Access Systems
• LAN Switches, Hubs and Routers
• ATM Test Equipment
• SONET or SDH ATM Interfaces
System Side
TOHFP
GTOCLK
TPOH
TPOHFP
TPOHCLK
TTOHEN
GTOCLK
ROHFP
RTOHFP
GROCLK
RTOHCLK
TPOHEN
Path
O/H
Extract
Transmit
Path Overhead
Processor
Path
Trace
Buffer
Receive
Path Overhead
Processor
Path
O/H
Extract
LOP
RPOH
RPOCLK
RPOHFP
PRDI
TPAIS
TPRDI
Input/Output Port
PYEL
POP[3:0]
PIP[3:0]
Parallel
Transmit
ATM
Cell Processor
Receive
ATM
Cell Processor
Microprocessor
LCD
A[7:0]
D[7:0]
Interface
ALE
CSB
WRB
TCP
TGFC
Transmit
ATM 4-Cell
FIFO
Receive
ATM 4-Cell
FIFO
RDB
RSTB
TDO
XOFF
JTAG Test
Access Port
RCP
INTB
TDI
TCK
TMS
TRSTB
TSOC
TDAT[15:0]
TXPRTY[1:0]
TCA
TWRENB
TFCLK
Drop
Side
I/F
RSOC
RDAT[15:0]
RXPRTY[1:0]
RCA
RRDENB
RFCLK
BUS8
TSEN
RGFC
PMC-930909 (R7) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 1998 PMC-Sierra, Inc. October,
PM5347 S/UNI-155-PLUS
155 Mb/s SATURN User Network Interface for WANs
TYPICAL APPLICATION
155 Mb/s ATM SWITCH PORT INTERFACE
Reference
Clock
TRCLK+/-
E/O
RRCLK+/-
O/E
ALOS+/-
STS-3C/STM-1 OVERHEAD BYTE USAGE
Transmit
Overhead
Insert
TXD+/-
RXD+/-
Transmit
Alarm Insert
Signals
PM5347
681,3/86
155 Mb/s SATURN™ User Network Inter-
Receive
Overhead
Extract
face for WANs
Receive
Alarm Detect
Signals
™
Microprocessor Bus for Configu-
ration, Status, and Control
TCA
TXPRTY[1:0]
TDAT[15:0]
TSOC
TWRENB
TFCLK
RCA
RXPRTY[1:0]
RDAT[15:0]
RSOC
RRDENB
RFCLK
Transmit
ATM
Process
Receive
ATM
Process
Switching
Network
Head Office:
PMC-Sierra, Inc.
#105 - 8555 Baxter Place
Burnaby, B.C. V5A 4V7
Canada
Tel: 604.415.6000
Fax: 604.415.6200
To order doc umentation,
send email to:
document@pmc-sierra.com
or contact the head office,
Attn: Document Coordinator
All product documentation is
available on our web site at:
http://www.pmc-sierra.com
For corporate information,
send email to:
info@pmc-sierra.com
PMC-930909 (R7)
1998 PMC-Sierra, Inc.
October, 1998
SATURN, SCI-PHY, S/UNI-155,
S/UNI-155-LITE, S/UNI-155-PLUS, and
S/UNI-622 are trademarks of PMC-Sierra, Inc.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE