PMC PM3351 Datasheet

PMC-Sierra,Inc.
Preliminary
Single-Port 10/100 Mbit/s Ethernet Switch
PM3351
FEATURES
• Single-chip, 1-port, full-duplex or half­duplex, 10/100BaseT switching dev ice for low-cost unmanag ed and manag ed networks.
• On-chip SmartPath 50 MHz RISC CPU core, multi-channel DMA controller, MAC-layer interface logic, FIFOs, PCI-based expans ion port, and a flexible memory controller.
• CPU supports backgro und applications running on local OS (e.g., SNMP), and real-time data-oriented applications (e.g., packet forwarding and filtering decisions).
• Performs packet switching at a rate of 200 Mbit/s (full-duplex) or 100 Mbit/s (half-duplex).
• Fully compatible with th e PM3350 8-port 10 Mbit/s switc h dev ic e; m ay be used to create a compact and inexpensive mixed 10/100 Mbit/s switching hub.
• Filtering and switching at wire rates (up to 148,8000 packets per second), supporting a mix of Ethernet and IEEE 802.3 protocols.
• Expansion port supports a peak system bandwidth of 1 Gbit/s, and is compatible with industry-standard PCI bus (version 2.1).
• Performs all address learning, ad dress table management, and aging functions for up to 32,768 MAC addresses (limited by external memory). Address learning rate of up to 10,000 addresses per second.
• Maximum broadcast/multicast at wire rates with configurable broadcast storm rate limiting.
• Low-latency operation in both unicast and broadcast modes.
• Configuration, management, MIB statistics, and diagnostics available in­band.
• Store-and-forward operation with full error checki ng and filtering.
• Flow contr ol supported for both full­duplex and half-duplex operation; supports IEEE 802.3x PAUSE frame flow control in full-duplex mode, and supports user-enabled backpressure flow control in half-duplex mode.
• Maintains and collects per-port and per-host statistics at wire rates.
• Interfaces directly to industry-standard 100 Mbit/s transceivers with no glue logic via the built-in Medium Independent Interface (MII) port with full support for the autonegotiation function implemented by the PHY devices.
• Fully static CMOS operati on at 50 MHz clock rates.
• Implemented with a 3.3 V core and a 5 V-compatible I/O.
• Available in a 208-pin PQFP package.
BLOCK DIAGRAM
PCI Expansion
Bus
PCI Bus
Interface
Expansion
Registers
50 MHz Embedded RISC CPU
I
CacheD Cache
Transmit
Channel Logic
Receive DMA
Controller
External
Memory
Interface
Transmit
FIFO
Receive
FIFO
100BaseT
Transmit MAC
100BaseT
Receive MAC
100BaseT
MII Interface
PMC-970278 (P4)
SRAM/EPROM
1998 PMC-Sierra, Inc. October, 1998
Preliminary
PM3351 ELAN 1x100
Single-Port 10/100 Mbit/s Ethernet Switch
TYPICAL APPLICATION
LOW-COST 10/100 Mbit/s ETHERNET SWITCH
The ELAN 1×100 chip is used to build low-cost 10/100 Mbit/s switches for server/backbone applications. A switch can be created from the following:
• PM3351s (one for every 100 Mbit/s port required),
• one to seven PM3350s (one for every eight 10 Mbit/s ports required),
• a bank of memory per device (60 ns EDO DRAM for each PM3350,
• 15 ns SRAM for each PM3351) for holding frame buffers and switching tables,
• a single 256k × 8-bit EPROM or EEPROM (initialization, configuration, and SNMP support firmware),
• quad 10BaseT interface adapters (LXT944) for the PM3350s,
• one 100 Mbit/s PHY device per PM3351, and
• appropriate passive components. A block diagram of a typical 32-port 10BaseT stackable switch with two 10/100 Mbit/s ports is shown. The PCI expansion bus is
used to seamlessly connect the ELAN 8×10s and ELAN 1×100s.
8×10BaseT
Quad
PHY
PM3350
(/$1[
EEPROM
Quad
PHY
PM3350
(/$1[
Quad
Quad
PHY
PHY
8×10BaseT
8×10BaseT
Quad
PHY
PM3350
(/$1[
EDO
DRAM
PCI Backplane
EDO
DRAM
Quad
PHY
PM3350
(/$1[
Quad
PHY
8×10BaseT
Quad
PHY
EDO
(/$1[
DRAM
10/100BaseT
10/100 PHY
PM3351
EDO
DRAM
SRAM
PM3351
(/$1[
10/100 PHY
10/100BaseT
SRAM
Head Office: PMC-Sierra, Inc. #105 - 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: 604.415.6000 Fax: 604.415.6200
To order documentation, send email to: document@pmc-sierra.com or contact the head office, Attn: Document Coordinator
All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate info rmation, send email to: info@pmc-sierra.com
PMC-970278 (P4) 1998 PMC-Sierra, Inc. October, 1998 SmartPath is a trademark of PMC-Sierra, Inc.
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