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TZA3033

SDH/SONET STM1/OC3
transimpedance amplifier

Product specification
Supersedes data of 1998 Jul 08
File under Integrated Circuits, IC19

2000 Sep 29

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

FEATURES

• Low equivalent input noise of 1 pA/√Hz (typical)

• Wide dynamic range from 0.25 µA to 1.6 mA (typical)

• Differential transimpedance of 44 kΩ

• Bandwidth typical 130 MHz

• Differential outputs

APPLICATIONS

• Digital fibre optic receiver in short, medium and long
haul optical telecommunications transmission systems
or in high speed data networks

• Wideband RF gain block.

GENERAL DESCRIPTION

• On-chip Automatic Gain Control (AGC)

• No external components required

• Single supply voltage from 3.0 to 5.5 V

• Bias voltage for PIN diode

• Pin compatible with SA5223.

TheTZA3033isalow-noisetransimpedanceamplifierwith
AGC designed to be used in STM1/OC3 fibre optic links.
It amplifies the current generated by a photo detector
(PIN diode or avalanche photodiode) and converts it to a
differential output voltage.

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

TZA3033T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
TZA3033U − bare die in waffle pack carriers; die dimensions 1.030 × 1.300 mm −

BLOCK DIAGRAM

handbook, full pagewidth

V

CC

1 nF

DREF

The numbers in brackets refer to the pad numbers of the bare die version.
(1) AGC analog I/O is only available on the TZA3033U (pad 15).

1 (1)

3 (5)IPhoto

250 Ω

CONTROL

65 pF

TZA3033

3

2, 4, 5 (3, 4, 7, 8, 9, 10)

GND

Fig.1 Block diagram.

(1)

AGC

GAIN

peak detector

A1

low noise

amplifier single-ended to

A2

differential converter

BIASING

V

CC

8 (13, 14)(15)

(12) 7 OUTQ
(11) 6 OUT

MGR368

2000 Sep 29 2

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

PINNING

SYMBOL

PIN

TZA3033T

PAD

TZA3033U

TYPE DESCRIPTION

DREF 1 1 analog output bias voltage for PIN diode; cathode should be connected to

this pin
TESTA − 2 − for test purposes only; to be left open in application
GND 2 3, 4 ground ground
IPhoto 3 5 analog input current input; anode of PIN diode should be connected to this

pin; DC bias voltage is 1048 mV
TESTB − 6 − for test purposes only; to be left open in application
GND 4 7, 8 ground ground
GND 5 9, 10 ground ground
OUT 6 11 output data output; pin OUT goes HIGH when current flows into

pin IPhoto
OUTQ 7 12 output data output; compliment of pin OUT
V

CC

8 13, 14 supply supply voltage

AGC − 15 input/output AGC analog I/O

handbook, halfpage

DREF

IPhoto

GND

1
2

TZA3033T

3
4

MGR369

V

8

CC

OUTQGND

7

OUT

6

GND

5

Fig.2 Pin configuration.

2000 Sep 29 3

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

FUNCTIONAL DESCRIPTION

The TZA3033 is a transimpedance amplifier intended for
use in fibre optic links for signal recovery in STM1/OC3
applications. It amplifies the current generated by a photo
detector (PIN diode or avalanche photodiode) and
transforms it into a differential output voltage. The most
important characteristics of theTZA3033 are highreceiver
sensitivity and wide dynamic range.

Highreceiver sensitivity is achieved by minimizing noisein
the transimpedance amplifier. The signal current
generated by a PIN diode can vary between

0.25 µA to 1.6 mA (p-p). An AGC loop (see Fig.1) is
implemented to make it possible to handle such a wide
dynamic range. The AGC loop increases the dynamic
range of the receiver by reducing the feedback resistance
of the preamplifier.

handbook, full pagewidth

V

CC

266 Ω 266 Ω

The AGC loop hold capacitor is integrated on-chip, so an
external capacitor is not needed for AGC. The AGC
voltage can be monitored at pad 15 on the bare die
(TZA3033U).Pad 15isnotbondedin the packaged device
(TZA3033T). This pad can be left unconnected during
normal operation. It can also be used to force an external
AGC voltage. If pad 15 (AGC) is connected to VCC, the
internal AGC loop is disabled and the receiver gain is at a
maximum. The maximum input current is then
approximately 10 µA.

A differential amplifier converts the output of the
preamplifier to a differential voltage (see Fig.3).

The logic level symbol definitions are shown in Fig.4.

30 Ω

30 Ω

OUTQ
OUT

handbook, full pagewidth

4.5 mA

2 mA

4.5 mA

MGT547

Fig.3 Data output circuit.

V

CC

V

O(max)

V

OQH

V

OH

V

o(p-p)

V

V

O(min)

OQL

V

OL

V

OO

MGR243

Fig.4 Logic level symbol definitions for data outputs OUT and OUTQ.

2000 Sep 29 4

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

PIN diode bias voltage DREF

The transimpedance amplifier together with the PIN diode
determine to a large extent the performance of an optical
receiver. The key parameters of a transimpedance
amplifier like sensitivity, bandwidth, and the PowerSupply

250 Ω

C1
65 pF

R1

V

CC

8

TZA3033

MGT548

Rejection Ratio (PSSR), are especially influenced by how
the PIN diode is connected to the input and the layout
around the input pin. The total capacitance at the input pin
is critical to obtain the highest sensitivity. It should be kept
to a minimum by reducing the capacitor of the PIN diode
and the parasitics around the input pin. The PIN diode
should be placed very close to the IC to reduce the
parasitics. Because the capacitance of the PIN diode
depends on the reverse voltage across it, the reverse
voltage should be selected as high as possible.

The PIN diode can be connected to the input as shown in
Fig.5. In Fig.5 the PIN diode is connected between DREF
and IPhoto. Pin DREF provides an easy bias voltage for
thePIN diode. The voltage atDREFis derived from VCCby
a low-pass filter. The low-pass filter consisting of the
internal resistor R1, the internal capacitor C1 and the
externalcapacitor C2rejectsthesupplyvoltagenoise.The
external capacitor C2 should be equal to or larger than
1 nF for a high PSRR.

DREF

1

C2

1 nF

I

i

3IPhoto

Fig.5 Connecting the PIN diode to the input.

It is preferable to connect the cathode of the PIN diode to
a voltage higher than VCC when such a voltage source is
available on the board. In this case the DREF pin can be
left unconnected.

The reverse voltage across the PIN diode is 3.95 V
(5 − 1.05 V) for a 5 V supply and 2.25 V (3.3 − 1.05 V) for
a 3.3 V supply.

2000 Sep 29 5

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

AGC

The TZA3033 transimpedance amplifier can handle input
currents from 0.25 µA to 1.6 mA. This means a dynamic
range of 79 dB. At low input currents, the transimpedance
mustbehigh to obtain an adequate output voltage,andthe
noise should be suitably low to guarantee minimum bit
error rate. At high input currents however, the
transimpedance should be low to avoid pulse width
distortion. This means that the gain of the amplifier has to
vary depending on the input signal level to handle such a
wide dynamic range. This is achieved in the TZA3033 by
implementing an Automatic Gain Control (AGC) loop.

TheAGCloop consists of a peak detector, aholdcapacitor
and a gain control circuit. The peak amplitude of the signal
is detected by the peak detector and stored on the hold
capacitor. The voltage across the hold capacitor is
compared to athreshold level. The threshold level is set at
an input current of 2.5 µA (p-p). AGC becomes active only
for input signals larger than the threshold level. It is
disabled for smaller signals. The transimpedance is then
at its maximum value (44 kΩ differential).

When the AGC is active, the feedback resistance of the
transimpedance amplifier is reduced to keep the output
voltage constant. The transimpedance is regulated from
44 kΩat low currents (I < 2.5 µA) to200 Ωat high currents
(I < 500 µA). Above 500 µA the transimpedance is at its
minimum and can not be reduced further but the front-end
remains linear until input currents of 1.6 mA (p-p).

The upper graph of Fig.5 shows the output voltages V
and V

of the TZA3033 as a function of the DC input

OUTQ

OUT

current for a supply voltage of 3 V. In the lower graph the
difference between both output voltages, V

, is shown

o(dif)

for supply voltages of 3, 3.3 and 5 V. It can seen from the
graph that the output changes linearly up to an input
current of 2.5 µA where the AGC becomes active. From
this point on, the AGC tries to keep the differential output
voltage constant around 110 mV for medium range input
currents (input currents < 200 µA). The AGC can not
regulate for input currents above 500 µA, and the output
voltage rises again with the input current.

2.05

handbook, full pagewidth

V

o

(V)

1.95

1.85

1.75

1.65
300

V

o(dif)

(mV)

200

100

0

−1

10

(1) VCC= 3.0 V.
(2) VCC= 3.3 V.
(3) VCC= 5.0 V.

(1)

11010

2103

(2)

(3)

V

OUT

VCC = 3 V

V

OUTQ

Ii (µA)

MGT562

4

10

Fig.5 AGC characteristics.

2000 Sep 29 6

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL PARAMETER MIN. MAX. UNIT

V
V

I

P
T
T
T

CC
n

n

tot
stg
j
amb

supply voltage −0.5 +5.5 V
DC voltage

pin 3/pad 5: IPhoto −0.5 +2 V
pins 6 and 7/pads 11 and 12: OUT and OUTQ −0.5 V
pad 15: AGC (TZA3033U only) −0.5 V
pin 1/pad 1: DREF −0.5 V

+ 0.5 V

CC

+ 0.5 V

CC

+ 0.5 V

CC

DC current

pin 3/pad 5: IPhoto −1 +2.5 mA
pins 6 and 7/pads 11 and 12: OUT and OUTQ −15 +15 mA
pad 15: AGC (TZA3033U only) −0.2 +0.2 mA

pin 1/pad 1: DREF −2.5 +2.5 mA
total power dissipation − 300 mW
storage temperature −65 +150 °C
junction temperature − 150 °C
ambient temperature −40 +85 °C

HANDLING

Precautions should be taken to avoid damage through electrostatic discharge. This is particularly important during
assembly and handling of the bare die. Additional safety can be obtained by bonding the VCC and GND pads first, the
remaining pads may then be bonded to their external connections in any order.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th(j-s)

thermal resistance from junction to solder point 160 K/W

2000 Sep 29 7

Philips Semiconductors Product specification

SDH/SONET STM1/OC3 transimpedance amplifier TZA3033

CHARACTERISTICS

For typical values T
temperature range and process spread; all voltages are measured with respect to ground; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

I

CC

P

tot

T

j

T

amb

R

tr

supply voltage 3 5 5.5 V
supply current AC coupled; RL=50Ω

total power dissipation VCC= 5 V 100 190 330 mW

junction temperature −40 − +125 °C
ambient temperature −40 +25 +85 °C
small-signal transresistance

of the receiver

f

−3dB(h)

high frequency −3 dB point AC coupled; measured

PSRR power supply rejection ratio measured differentially;

Bias voltage: pin DREF

R

DREF

resistance between pins
DREF and V

Input: pin IPhoto

V

bias(IPhoto)

input bias voltage on
pin IPhoto

I

i(IPhoto)(p-p)

input current on pin IPhoto
(peak-to-peak value)

R

i

I

n(tot)

small-signal input resistance fi= 1 MHz;

total integrated RMS noise
current over bandwidth
(referenced to input)

=25°C and VCC= 5 V; minimum and maximum values are valid over the entire ambient

amb

V

=5V 203860mA

CC

V

=3.3V 203550mA

CC

V

= 3.3 V 60 116 180 mW

CC

AC coupled; measured
differentially

R

= ∞ 42 90 112 kΩ

L

R

=50Ω 21 45 66 kΩ

L

differentially; Ci= 0.7 pF;
RL=50Ω

= 125 °C 90 130 − MHz

T

j

T

= 100 °C 100 130 − MHz

j

note 1

f = 100 kHz to 10 MHz − 0.5 −µA/V
f = 100 MHz − 10 −µA/V

DC tested 210 245 290 Ω

CC

800 1050 1300 mV

note 2

V

=5V 011800µA

CC

V

= 3.3 V 0 1 1600 µA

CC

− 330 −Ω

input current < 0.5 µA
∆f = 90 MHz; note 3 − 16 − nA

2000 Sep 29 8