Philips TZA3014VH, TZA3014HT, TZA3014U Datasheet

INTEGRATED CIRCUITS

DATA SHEET

TZA3014

2.5 Gbits/s postamplifier with level detector

Product specification

2001 Jun 25

Supersedes data of 2000 Aug 09

File under Integrated Circuits, IC19

Philips Semiconductors	Product specification
2.5 Gbits/s postamplifier with level detector	TZA3014

FEATURES

∙Single 3.3 V power supply

∙Wideband operation from 50 kHz to 2.5 GHz (typical value)

∙Fully differential

∙On-chip DC-offset compensation without external capacitor

∙Interfacing with supplied positive or negative logic

∙Positive Emitter Coupled Logic (PECL) or Current-Mode Logic (CML) compatible data outputs adjustable from 200 to 800 mV (p-p) single-ended

∙Power-down capability for unused output or detector

∙Rise and fall times of 80 ps (typical value)

∙Inverted output possible

∙Input level detection circuit for Received Signal Strength Indicator (RSSI) and Loss Of Signal (LOS), programmable from 0.4 to 400 mV (p-p) single-ended, with open-drain comparator output for directly interfacing positive or negative logic

∙Reference voltage for output level and LOS adjustment

∙HTQFP32 and HBCC32 plastic packages with exposed pad

∙Mute input.

ORDERING INFORMATION

APPLICATIONS

∙Postamplifier for SDH/SONET transponder

∙SDH/SONET wavelength converter

∙PECL driver

∙Fibre channel arbitrated loop

∙Signal level detectors

∙Swing converter CML 200 mV (p-p) to PECL 800 mV (p-p)

∙2.5 GHz clock amplification.

GENERAL DESCRIPTION

The TZA3014 is a low gain postamplifier with a LOS detector and a RSSI designed for use in critical signal path control applications, such as loop-through or Wavelength Division Multiplexing (WDM). The signal path is capable of operating from 50 kHz up to 2.5 GHz.

The TZA3014 can be delivered in HTQFP32 and HBCC32 packages and as bare die.

TYPE		PACKAGE
NUMBER	NAME	DESCRIPTION	VERSION
TZA3014HT	HTQFP32	plastic, heatsink thin quad flat package; 32 leads; body 5 × 5 × 1.0 mm	SOT547-2
TZA3014VH	HBCC32	plastic, heatsink bottom chip carrier; 32 terminals; body 5 × 5 × 0.65 mm	SOT560-1
TZA3014U	−	bare die; 2.22 × 2.22 × 0.28 mm	−

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Philips Semiconductors	Product specification
2.5 Gbits/s postamplifier with level detector	TZA3014
BLOCK DIAGRAM

GNDA	32 (40)	disable LOS output			(31) 25	GNDB
		comparator
	10 (12)
LOSTH
		RSSI		5 kΩ	(35) 27	LOS
					(34) 26
		1×				RSSI
		offset compensation	offset compensation
LEVEL	12 (15)		level
INV	29 (37)
	1				(30) 24	VCCB
VCCA
	2				(29) 23
IN						OUT
	3				(28) 22
INQ						OUTQ
					(27) 21
	4	cross-over	buffer	amplifier		VCCB
VCCA
		switch
TEST	15 (19)	TZA3014	BAND GAP		(17) 14	V	ref
			REFERENCE
	31 (39)
MUTE
					MGU122

The numbers in parentheses refer to the pad numbers of the bare die version.

Fig.1 Block diagram.

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Philips Semiconductors					Product specification
2.5 Gbits/s postamplifier with level detector						TZA3014
PINNING
SYMBOL	PIN		PAD	TYPE(1)	DESCRIPTION
VCCA	1		1	S	supply voltage for input and LOS detector
IN	2		2	I	differential input; complimentary to pin INQ; DC bias level is set internally
					at approximately VCC − 0.33 V
INQ	3		3	I	differential input; complimentary to pin IN; DC bias level is set internally at
					approximately VCC − 0.33 V
VCCA	4		4	S	supply voltage for input and LOS detector
n.c.	−		5	−	not connected
n.c.	−		6	−	not connected
n.c.	5		7	−	not connected
n.c.	6		8	I	not connected
n.c.	7		9	I	not connected
n.c.	8		10	S	not connected
n.c.	9		11	S	not connected
LOSTH	10		12	I	input for setting threshold level of LOS detector; threshold level is set by
					connecting external resistors between pins VCCA and Vref; when forced to
					GNDA or not connected, the LOS detector is switched off
n.c.	11		13	I	not connected
n.c.	−		14	−	not connected
LEVEL	12		15	I	input for setting AC level of the output circuit; output signal level is set by
					connecting external resistors between pins VCCA and Vref; when forced to
					VCCA or not connected, pins OUT and OUTQ will be switched off
n.c.	13		16	I	not connected
Vref	14		17	O	reference voltage for programming output level circuit and LOS threshold;
					typical value is VCC − 1.6 V; no external capacitor allowed
n.c.	−		18	−	not connected
TEST	15		19	I	for test purposes only; to be left open-circuit in the application
n.c.	16		20	S	not connected
n.c.	17		21	S	not connected
n.c.	18		22	O	not connected
n.c.	19		23	O	not connected
n.c.	20		24	S	not connected
n.c.	−		25	−	not connected
n.c.	−		26	−	not connected
VCCB	21		27	S	supply voltage for output circuit
OUTQ	22		28	O	PECL or CML compatible differential output; complimentary to pin OUT
OUT	23		29	O	PECL or CML compatible differential output; complimentary to pin OUTQ
VCCB	24		30	S	supply voltage for output circuit
GNDB	25		31	S	ground for output circuit
n.c.	−		32	O	not connected
n.c.	−		33	O-DRN	not connected

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Philips Semiconductors						Product specification
2.5 Gbits/s postamplifier with level detector						TZA3014
SYMBOL	PIN		PAD	TYPE(1)	DESCRIPTION
RSSI	26		34	O	RSSI output
LOS	27		35	O-DRN	output of LOS detector; direct drive to either positive or negative supplied
					logic via internal 5 kΩ resistor
n.c.	28		36	TTL	not connected
INV	29		37	TTL	input to invert the signal at pins OUT and OUTQ; supports positive or
					negative logic
n.c.	30		38	TTL	not connected
MUTE	31		39	TTL	input to mute the output signal on pins OUT (‘0’) and OUTQ (‘1’); supports
					positive or negative logic
GNDA	32		40	S	ground for input and LOS detector
GNDp	pad		−	S	ground pad (exposed die pad)

Note

1. Pin type abbreviations: O = output, I = input, S = power supply, TTL = logic input and O-DRN = open-drain output.

			GNDA		MUTE		n.c.			INV		n.c.		LOS		RSSI		GNDB
			32		31		30			29		28		27		26		25
VCCA	1																			24	VCCB
IN	2							exposed pad												23	OUT
INQ	3																			22	OUTQ
VCCA	4							TZA3014HT												21	VCCB
n.c.	5																			20	n.c.
n.c.																					n.c.
	6																			19
n.c.																					n.c.
	7													GNDp						18
n.c.																					n.c.
	8																			17
			9		10		11			12		13		14		15		16		MGU123
			n.c.		LOSTH		n.c.			LEVEL		n.c.		V		TEST
																		n.c.
														ref

Fig.2 Pin configuration HTQFP32 package.

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Philips Semiconductors	Product specification
2.5 Gbits/s postamplifier with level detector	TZA3014

		GNDA	MUTE	n.c.	INV	n.c.	LOS	RSSI	GNDB
VCCA	1	32	31	30	29	28	27	26	25
IN	2			exposed pad					24	VCCB
INQ	3								23	OUT
VCCA	4								22	OUTQ
n.c.	5			TZA3014VH					21	VCCB
n.c.	6								20	n.c.
n.c.	7								19	n.c.
n.c.	8						GNDp		18	n.c.
	9	10	11	12	13	14	15	16	17	n.c.
	n.c.	LOSTH	n.c.	LEVEL	n.c.	ref	TEST	n.c.		MGU124
						V

Fig.3 Pin configuration HBCC32 package.

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Philips Semiconductors	Product specification
2.5 Gbits/s postamplifier with level detector	TZA3014

FUNCTIONAL DESCRIPTION

The TZA3014 is a postamplifier with a RSSI circuit to provide output signals for RSSI and LOS (see Fig.1). The input signal can be amplified to a programmable level. An active level control circuit ensures this level. The control voltage on pin INV inverts the outputs, so avoiding a required complicated Printed Circuit Board (PCB) layout. An offset compensation circuit minimizes the effect of any voltage offset present at the input.

The RSSI and LOS detector are based on a 7-stage ‘successive detection’ circuit which provides a logarithmic output. The LOS detector is followed by a comparator with a programmable threshold. The input signal level detection is implemented to check if the input signal is above the user-programmed level. The user can ensure that data will only be transmitted when the input signal-to-noise ratio is sufficient for low bit error rate system operation. A second offset compensation circuit minimizes the effect of any voltage offset present in the logarithmic amplifier.

RF input circuit

The input circuit contains internal 50 Ω resistors decoupled to VCCA via an internal common mode 12 pF capacitor (see Fig.4).

The inputs IN and INQ are DC-biased at approximately VCCA − 0.33 V by an internal reference generator. The TZA3014 can be DC-coupled, but AC coupling is preferred. When DC-coupled, the drive source must operate within the allowable input range

(VCCA − 1.0 V to VCCA + 0.3 V). The DC-offset voltage should stay below a few millivolts since the internal

DC-offset compensation circuit has a limited correction range. When AC-coupled, do not use capacitors that cause a 3 dB cut-off point at 50 kHz (postamplifier cut-off point) or at 1 MHz (RSSI cut-off point).

RF output circuit

Matching the outputs of the postamplifier (see Fig.5) is not mandatory. In most applications, the receiving end of the transmission line will be properly matched, causing very few reflections.

Matching the transmitting end of the transmission line to absorb reflections only, is recommended for very sensitive applications.

In such cases, 100 Ω pull-up resistors should be

connected to VCCB and pins OUT and OUTQ as close as possible to the IC. However, for most applications these

matching resistors are not required.

handbook, halfpage	VCCA

12 pF	420 Ω
50 Ω	50 Ω
IN
INQ

GNDA

MGU125

Fig.4 RF input circuit.

RF output level adjustment

The output level can be made compatible with CML or PECL by adjusting the voltage on pin LEVEL. The DC voltages on pins OUT and OUTQ relate to the

DC voltage on pin LEVEL. Due to the effect of the 50 Ω load resistance at the receiving end, for a given peak-to-peak value on pins OUT and OUTQ, a different voltage is required on pin LEVEL in case the output is AC-coupled and when the output is DC-coupled

(see Figs 5 and 6).

When pin LEVEL is not connected or connected to VCCA, the postamplifier is in power-down state (see Fig.5).

DC-offset compensation loop

A DC-offset compensation loop connected between the amplifier output and the buffer input maintains the toggle point at the buffer input when there is no input signal (see Fig.1). This active control circuit is integrated and does not require an external capacitor. The loop

time constant determines the lower cut-off frequency of the amplifier chain, and is internally fixed at approximately 5 kHz.

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Philips Semiconductors	Product specification
2.5 Gbits/s postamplifier with level detector	TZA3014

VCCA	4		(27) 21	VCCB
R1		100 Ω	100 Ω		50	50
					Ω	Ω
			(29) 23	OUT	Vo
			(28) 22	OUTQ
LEVEL	12 (15)	VLEVEL			Transmission
					lines
R2		REG		VCC
Vref	14 (17)			VLEVEL	Vo(se)(p-p)
				Vo
				(V)		MGU126
VLEVEL = 0.5 × Vo(se)(p-p).

V V × R1

LEVEL = ref ----------------------

R1 + R2

VLEVEL = VCC for power-down mode.

The numbers in parentheses refer to the pad numbers of the bare die version.

a. DC-coupled.

handbook, full pagewidth VCCA	4	(27)	21	VCCB
R1	100 Ω	100 Ω			50	50
					Ω	Ω
		(29)	23	OUT	Vo
		(28)	22	OUTQ
LEVEL	12 (15) VLEVEL				Transmission
					lines
				VCC
R2	REG
Vref	14 (17)
				VLEVEL	Vo(se)(p-p)
				Vo
				(V)		MGU127
VLEVEL = 1.5 × Vo(se)(p-p).

V V × R1

LEVEL = ref ----------------------

R1 + R2

VLEVEL = VCC for power-down mode.

The numbers in parentheses refer to the pad numbers of the bare die version.

b. AC-coupled.

Fig.5 RF output configurations.

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Philips Semiconductors	Product specification
2.5 Gbits/s postamplifier with level detector	TZA3014

					MGU128
1000
Vo(se)(p-p)
(mV)
800
		DC-coupled		AC-coupled
600
400
200
0	20	40	60	80	100
0
				VLEVEL (% of Vref)

Fig.6 Output signal as a function of VLEVEL.

TTL logic inputs MUTE and INV

It should be noted that switch control voltages in positive logic are inverted in case a negative supply voltage is used (see Fig.7).

Output signal as a function of inputs MUTE and INV

The default logic level for inputs MUTE and INV is 0 in case these pins are not connected. See Tables 1 and 2.

Table 1	OUT and OUTQ as a function of input MUTE
MUTE		OUT	OUTQ
	0	IN	INQ
	1	‘0’	‘1’
Table 2	OUT and OUTQ as a function of input INV
	INV	OUT	OUTQ
	0	IN	INQ
	1	INQ	IN

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