11.1Transfer functions for normalizedservo signals
11.2Laser power control signals (alpha circuit)
11.3Wobble pre-processor
12APPLICATION AND TEST INFORMATION
13PACKAGE OUTLINE
14SOLDERING
14.1Introduction to soldering surface mount
packages
14.2Reflow soldering
14.3Wave soldering
14.4Manual soldering
14.5Suitability of surface mount IC packages for
wave and reflow soldering methods
15DATA SHEET STATUS
16DEFINITIONS
17DISCLAIMERS
18PURCHASE OF PHILIPS I2C COMPONENTS
2000 Oct 302
Philips SemiconductorsProduct specification
Pre-amplifiers for CD-RW systemsTZA1020; TZA1020A
1FEATURES
• Dataamplifierfor read speed up to twelve times nominal
data speed
• Normalized and filtered error signals for servo control
• Wobble pre-processor with switchable low-pass filter
• Calculation of signals for real-time laser power control
for write speed up to four times
• Calculation of signals for optimum laser calibration for
write speed up to four times
• Fast track count amplifier
• Spot position measurement for alignment of photo
diodes
• Reference voltage for laser controller
• On-chip band gap and DACs for accurate and
adjustable current/gain settings
• I2C-bus microcontroller interface for programmable
gain, speed switching and function selection
• All functions available for CD-R and CD-RW systems.
2GENERAL DESCRIPTION
TZA1020 (AEGER2) is an analog pre-processor IC for
CD-RandCD-RWsystemswith 3-spots push-pull tracking
system. The IC interfaces directly to the photo diodes.
The device generates signals for laser power calibration
and laser power control during disc writing. Normalized
error signals are generated for servo control and wobble
detection. An HF current amplifier is implemented to
detect the actual HF data signal. The Fast Track Count
(FTC) amplifier generates a radial error signal to allow fast
track counting.
TZA1020A (AEGER2A) is similar to the TZA1020, except
for non-clamped MIRN, which allows operation with
IGUANA.
3QUICK REFERENCE DATA
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
V
DD
V
SS
I
i(cd)
B
−3dB(norm)
positive supply voltage4.55.05.5V
negative supply voltage−5.5−5.0−4.5V
central diode input current range0−4000µA
−3 dB bandwidth normalized
4860−kHz
error signals (servo)
B
−3dB(CAHF)
∆t
d(g)(CAHF)
−3 dB bandwidth pin CAHFCi=12pF17−−MHz
group delay variations pin CAHFf = 0.1 to 12 MHz;
UOUT1reference voltage output
RREF2reference current input
C23central photo diode current input
SA14satellite photo diode current input
SB15satellite photo diode current input
C36central photo diode current input
C47central photo diode current input
SA28satellite photo diode current input
SB29satellite photo diode current input
C110central photo diode current input
CAGAIN11set-point laser power on disc,
current input
SDA12I
SCL13I
2
C-bus data input/output
2
C-bus clock input
AMON14alpha measurement on switch
(write/read state)
ERON15normalized error signals on switch
V
DD2
16positive supply voltage 2
GND217ground 2
V
SS2
18negative supply voltage 2
ASTROBE19control signal sample-and-hold in
alpha measurement
AINTON20control signal integrator in alpha
measurement
ALS21DALPHA output enabled/disabled
AINT22integrator capacitor for alpha
measurement
CAHF23central aperture high-frequency
current output
DALPHA24alpha error signal for laser power
control
AZIN25set-point alpha control
SYMBOLPINDESCRIPTION
PPN26normalized, balanced push-pull
signal voltage
CWBL27capacitor for EFM noise reduction
loop
V
DD1
28positive supply voltage 1
GND129ground 1
V
SS1
30negative supply voltage 1
RE31fast track count signal voltage
output
MEAS132combination of photo diode
currents for adjustment 1
MEAS233combination of photo diode
currents for adjustment 2
XDN34normalized spot position error
current output
FEN35normalized focus error current
output
REN36normalized radial error current
output
TLN37normalized track-loss current
output
MIRN38mirror output (disc reflection)
current output
CALPF39capacitor to define CALF
bandwidth
HCA140capacitor to define time constant
peak detector A1
HCA241capacitor to define time constant
peak detector A2
A242pit amplitude relative to CALF,
voltage output
A143land amplitude relative to CALF,
voltage output
CALF44low-pass filtered aperture signal,
voltage output
2000 Oct 305
Philips SemiconductorsProduct specification
Pre-amplifiers for CD-RW systemsTZA1020; TZA1020A
handbook, full pagewidth
CALF
44
A1
43
A2
42
HCA2
41
HCA1
40
MIRN
CALPF
39
38
TLN
37
REN
36
FEN
35
XDN
34
UOUT
RREF
C2
SA1
SB1
C3
C4
SA2
SB2
C1
CAGAIN
22
AINT
33
MEAS2
MEAS1
32
31
RE
V
30
GND1
29
V
28
CWBL
27
PPN
26
AZIN
25
24
DALPHA
CAHF
23
MGR810
SS1
DD1
1
2
3
4
5
6
7
8
9
10
11
12
13
SCL
SDA
TZA1020HP
TZA1020HP/A
14
15
16
V
ERON
AMON
DD2
17
GND2
18
V
SS2
19
20
AINTON
ASTROBE
21
ALS
Fig.2 Pin configuration.
handbook, halfpage
ACB
C1C4C2
SA1 SA2
S1 S2
Fig.3 Quadrant diode configuration.
2000 Oct 306
C3
SB1 SB2
MGR811
Philips SemiconductorsProduct specification
Pre-amplifiers for CD-RW systemsTZA1020; TZA1020A
7FUNCTIONAL DESCRIPTION
All functions are designed in such a way that a read speed
up to twelve times nominal speed is possible
(N = 1, 2, 4, 8 or 12). Recording speed up to four is
possible (N = 1, 2 or 4). The maximum recording speed
must be determined.
7.1Data amplifier
The central diodes currents (C1 to C4) are fed to a high
bandwidth current amplifier. The gain of the current
amplifier can be switched by means of the I2C-bus
microcontroller interface to compensate for differences in
CD-R and CD-RW disc reflection. Data signals up to
twelve times nominal data speed can be read.
7.2Normalizer
The currents from the central diodes (C1 to C4), the
currentfrom the satellite diodes (SA1, SA2, SB1 and SB2)
and the laser set-point current (CAGAIN) are (optionally
sampled) fed to the first low-pass filters with a bandwidth
of 60 kHz. The normalizing circuit generates error signals
for servo control that are independent of the diode current
level. The gain of the error signals is controlled by the
I2C-bus microcontroller interface. A dropout concealment
becomes active if the input current level is below a certain
threshold value. This threshold value is also controlled by
the I2C-bus.
7.3Wobble pre-processor
The wobble signal of the pre-groove is detected by means
of the PPN signal. The currents from inputs C1 to C4 are
filtered and processed to provide optimal signal-to-noise
ratio. The bandwidth of the filter may be adapted to the
disc speed via the I2C-bus. The bandwidth of a noise
reduction loop is controlled by an external capacitor, the
I2C-bus interface controls the total operation of the
processor.
7.4Beta detector
The beta detector generates signals necessary for the
symmetry detection of the HF signal. By measuring peak
values (A1 and A2) and average value of the signal
(CALF), an optimum laser writing power can be
determined. The gain of the measured values is controlled
by the I2C-bus. The time constant of the peak detectors
and bandwidth of the low-pass filtered aperture signal can
also be adapted to the disc speed by the I2C-bus.
7.5Alpha detector
The alpha detector determines a parameter called ‘alpha’
during disc writing. Alpha must be kept constant to allow
recording over a fingerprint or black dot. The definition of
alpha is different for CD-R and CD-RW; for CD-R the light
absorption of the disc is measured, for CD-RW alpha is
determined by actual laser power and disc reflection. The
gain of the measured signals and the CD-R and CD-RW
selection is performed by the I2C-bus.
7.6Fast track count
The fast track count circuit generates a Radial Error (RE)
signal for fast track counting. A gain switch compensates
for difference in CD-R and CD-RW disc reflection.
7.7Spot position measurement
To allow alignment of photo diodes via the TZA1020, a
number of linear combinations of input currents can be
realized (MEAS1 and MEAS2). Selection of the actual
combination is performed by the I2C-bus.
2000 Oct 307
Philips SemiconductorsProduct specification
Pre-amplifiers for CD-RW systemsTZA1020; TZA1020A
8I2C-BUS PROTOCOL
8.1Addressing and data bytes
Full control of the TZA1020 is accomplished via the 2-wire I2C-bus. Up to 400 kbits/s bus speed can be used in
accordance with the I2C-bus fast-mode specification.
For programming the device (write mode) eight data byte registers are available/addressable via eight subaddresses.
Automatic subaddress incrementing enables the writing of successive data bytes in one transmission. During power-on,
data byte registers are reset to a default state by use of a Power-On Reset (POR) circuit whose signal is derived from
the internally generated I2C-bus supply voltage (V
For reading from the device (read mode) one data byte register is available without subaddressing.
8.1.1WRITE MODETable 1 Slave address; 34H
Slave address00110100
Table 2 Subaddress 00H to 07H
Subaddress0
(1)
(1)
0
).
SS1
(1)
0
(1)
0
00/10/10/1
Note
1. The use of subaddresses F0H to F7H (11110XXX) instead of 00H to 07H (00000XXX) disables the automatic
subaddress incrementing allowing continuous writing to a single data byte register (e.g. DAC testing).