Philips TJA1054 Datasheet

INTEGRATED CIRCUITS

DATA SHEET

TJA1054

Fault-tolerant CAN transceiver

Preliminary specification			1999 Feb 11
File under Integrated Circuits, IC18

Philips Semiconductors	Preliminary specification
Fault-tolerant CAN transceiver	TJA1054

FEATURES

Optimized for in-car low-speed communication

∙Baud rate up to 125 kBaud

∙Up to 32 nodes can be connected

∙Supports unshielded bus wires

∙Very low Radio Frequency Interference (RFI) due to built-in slope control function and a very good matching of the CANL and CANH bus outputs

∙Fully integrated receiver filters

∙Permanent dominant monitoring of transmit data input

∙Good immunity performance of ElectroMagnetic Compatibility (EMC) in normal operating mode and in low power modes.

Bus failure management

∙Supports single-wire transmission modes with ground offset voltages up to 1.5 V

∙Automatic switching to single-wire mode in the event of bus failures, even when the CANH bus wire is short-circuited to VCC

∙Automatic reset to differential mode if bus failure is removed

∙Fully wake-up capability during failure modes.

Protection

∙Short-circuit proof to battery and ground in 12 V powered systems

∙Thermally protected

∙Bus lines protected against transients in an automotive environment

∙An unpowered node does not disturb the bus lines.

Support for low power modes

∙Low current sleep and standby mode with wake-up via the bus lines

∙Power-on reset flag on the output.

ORDERING INFORMATION

GENERAL DESCRIPTION

The TJA1054 is the interface between the protocol controller and the physical wires of the bus lines in a Control Area Network (CAN). It is primarily intended for low-speed applications, up to 125 kBaud, in passenger cars. The device provides differential transmit capability but will switch in error conditions to single-wire transmitter and/or receiver.

The TJA1054T is pin and upwards compatible with the PCA82C252T and the TJA1053T. This means that these two devices can be replaced by the TJA1054T with retention of all functions.

The most important improvements are:

∙Very low RFI due to a very good matching of the CANL and CANH bus lines outputs

∙Good immunity performance of EMC, especially in low power modes

∙Fully wake-up capability during failure modes

∙Extended bus failure management including short-circuit of the CANH bus line to VCC

∙Supports easy fault localization

∙Two-edge sensitive wake-up input signal via pin WAKE.

TYPE		PACKAGE
NUMBER	NAME	DESCRIPTION	VERSION
TJA1054T	SO14	plastic small outline package; 14 leads; body width 3.9 mm	SOT108-1

1999 Feb 11

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Philips Semiconductors				Preliminary specification
Fault-tolerant CAN transceiver					TJA1054
QUICK REFERENCE DATA
SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
VCC	supply voltage on pin VCC		4.75	-	5.25	V
VBAT	battery voltage on pin BAT	no time limit	-0.3	-	+40	V
		operating mode	5.0	-	27	V
		load dump	-	-	40	V
IBAT	battery current on pin BAT	Sleep mode; VCC = 0 V;	-	30	50	mA
		VBAT = 12 V
VCANH	CANH bus line voltage	VCC = 0 to 5.5 V;	-40	-	+40	V
		VBAT ³ 0 V;
		no time limit
VCANL	CANL bus line voltage	VCC = 0 to 5.5 V;	-40	-	+40	V
		VBAT ³ 0 V;
		no time limit
DVCANH	CANH bus line transmitter voltage drop	ICANH = -40 mA	-	-	1.4	V
DVCANL	CANH bus line transmitter voltage drop	ICANL = 40 mA	-	-	1.4	V
tPD	propagation delay	TXD to RXD	-	1	-	ms
tr	bus line output rise time	10 to 90%; C1 = 10 nF	-	0.6	-	ms
tf	bus line output fall time	90 to 10%; C1 = 1 nF	-	0.3	-	ms
Tamb	operating ambient temperature		-40	-	+125	°C

1999 Feb 11

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Philips Semiconductors	Preliminary specification
Fault-tolerant CAN transceiver	TJA1054
BLOCK DIAGRAM

			BAT	VCC
			14	10
INH	1
	7		TEMPERATURE
		WAKE-UP
WAKE			PROTECTION
	5	STANDBY
STB				9
		CONTROL
	6			RTL
EN				11
				CANH
	VCC
				12
				CANL
	2		DRIVER	8
TXD				RTH
	TIMER
	VCC		TJA1054
	4	FAILURE DETECTOR
ERR		PLUS WAKE-UP
		PLUS TIME-OUT
	VCC			FILTER
	3		RECEIVER
RXD
				FILTER
	13			MGL421
	GND

Fig.1 Block diagram.

1999 Feb 11

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Philips Semiconductors							Preliminary specification
	Fault-tolerant CAN transceiver								TJA1054
PINNING
	SYMBOL				PIN	DESCRIPTION
	INH				1	inhibit output for switching an external voltage regulator if a wake-up signal occurs
	TXD				2	transmit data input for activating the driver to the bus lines
	RXD				3	receive data output for reading out the data from the bus lines
					4	error, wake-up and power-on indication output; active LOW in normal operating mode when the
	ERR
						bus has a failure and in low power modes (wake-up signal or in power-on standby)
					5	standby digital control signal input (active LOW); defines together with input signal on pin EN the
	STB
						state of the transceiver (in normal and low power modes); see Table 2 and Fig.3
	EN				6	enable digital control signal input; defines together with input signal on pin			the state of the
								STB
						transceiver (in normal and low power modes); see Table 2 and Fig.3
					7	local wake-up signal input; falling and rising edges are both detected
	WAKE
	RTH				8	termination resistor connection; in case of a CANH bus wire error the line is terminated with a
						selectable impedance
	RTL				9	termination resistor connection; in case of a CANL bus wire the line is terminated with a
						selectable impedance
	VCC				10	supply voltage
CANH					11	HIGH-level voltage bus line
CANL					12	LOW-level voltage bus line
GND					13	ground
BAT					14	battery supply

handbook, halfpage

		INH		1						14			BAT
	TXD			2							13		GND
RXD				3							12		CANL
									TJA1054T
ERR				4							11		CANH
	STB			5							10		VCC
		EN		6							9		RTL
WAKE				7							8		RTH
									MGL422

Fig.2 Pin configuration.

1999 Feb 11

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Philips Semiconductors	Preliminary specification
Fault-tolerant CAN transceiver	TJA1054

FUNCTIONAL DESCRIPTION

The TJA1054 is the interface between the CAN protocol controller and the physical wires of the CAN bus

(see Fig.7). It is primarily intended for low speed applications, up to 125 kBaud, in passenger cars.

The device provides differential transmit capability to the CAN bus and differential receive capability to the CAN controller.

To reduce RFI, the rise and fall slope are limited. This allows the use of an unshielded twisted pair or a parallel pair of wires for the bus lines. Moreover, it supports transmission capability on either bus line if one of the wires is corrupted. The failure detection logic automatically selects a suitable transmission mode.

In normal operating mode (no wiring failures) the differential receiver is output on pin RXD (see Fig.1). The differential receiver inputs are connected to pins CANH and CANL through integrated filters.

The filtered input signals are also used for the single-wire receivers. The receivers connected to pins CANH

and CANL have threshold voltages that ensure a maximum noise margin in single-wire mode.

A timer has been integrated at pin TXD. This timer prevents the TJA1054 from driving the bus lines to a permanent dominant state.

Failure detector

The failure detector is fully active in the normal operating mode. After the detection of a single bus failure the detector switches to the appropriate mode (see Table 1).

Table 1 Bus failures

FAILURE	DESCRIPTION
1	CANH wire interrupted
2	CANL wire interrupted
3	CANH short-circuited to battery
3a	CANH short-circuited to VCC
4	CANL short-circuited to ground
5	CANH short-circuited to ground
6	CANL short-circuited to battery
6a	CANL short-circuited to VCC
7	CANL mutually short-circuited to CANH

The differential receiver threshold voltage is set at −3.2 V typically (VCC = 5 V). This ensures correct

reception with a noise margin as high as possible in the normal operating mode and in the event of failures 1, 2, 4 and 6a. These failures, or recovery from them, do not destroy ongoing transmissions.

Failures 3 and 6 are detected by comparators connected to the CANH and CANL bus lines, respectively. If the comparator threshold is exceeded for a certain period of time, the reception is switched to the single-wire mode. This time is needed to avoid false triggering by external RF fields. Recovery from these failures is detected automatically after a certain time-out (filtering) and no transmission is lost. In the event of failure 3 the CANH driver and pin RTH are switched off. In the event of failure 6 the CANL driver and pin RTL are switched off. The pull-up current on pin RTL and the pull-down current on pin RTH will not be switched off.

Failures 3a, 4 and 7 initially result in a permanent dominant level on pin RXD. After a time-out, the CANL driver and pin RTL are switched off (failures 4 and 7) or the CANH driver and pin RTH are switched off (failure 3a). Only a weak pull-up on pin RTL or a weak pull-down on pin RTH remains. Reception continues by switching to the single-wire mode via pins CANH or CANL. When failures 3a, 4 or 7 are removed, the recessive bus levels are restored. If the differential voltage remains below the recessive threshold level for a certain period of time, reception and transmission switch back to the differential mode.

If any of the wiring failure occurs, the output signal on pin ERR will become LOW. On error recovery, the output signal on pin ERR will become HIGH again.

During all single-wire transmissions, the EMC performance (both immunity and emission) is worse than in the differential mode. The integrated receiver filters suppress any HF noise induced into the bus wires.

The cut-off frequency of these filters is a compromise between propagation delay and HF suppression. In the single-wire mode, LF noise cannot be distinguished from the required signal.

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