Philips TJA1041A User Manual

TJA1041

INTEGRATED CIRCUITS

DATA SHEET

TJA1041A

High speed CAN transceiver

Product specification			2004 Feb 20
Supersedes data of 2003 Sep 29

Philips Semiconductors	Product specification
High speed CAN transceiver	TJA1041A

FEATURES

Optimized for in-vehicle high speed communication

∙Fully compatible with the ISO 11898 standard

∙Communication speed up to 1 Mbit/s

∙Very low ElectroMagnetic Emission (EME)

∙Differential receiver with wide common-mode range, offering high ElectroMagnetic Immunity (EMI)

∙Passive behaviour when supply voltage is off

∙Automatic I/O-level adaptation to the host controller supply voltage

∙Recessive bus DC voltage stabilization for further improvement of EME behaviour

∙Listen-only mode for node diagnosis and failure containment

∙Allows implementation of large networks (more than 110 nodes).

Low-power management

∙Very low-current in standby and sleep mode, with local and remote wake-up

∙Capability to power down the entire node, still allowing local and remote wake-up

∙Wake-up source recognition.

Protection and diagnosis (detection and signalling)

∙TXD dominant clamping handler with diagnosis

∙RXD recessive clamping handler with diagnosis

∙TXD-to-RXD short-circuit handler with diagnosis

ORDERING INFORMATION

∙Over-temperature protection with diagnosis

∙Undervoltage detection on pins VCC, VI/O and VBAT

∙Automotive environment transient protected bus pins and pin VBAT

∙Short-circuit proof bus pins and pin SPLIT (to battery and to ground)

∙Bus line short-circuit diagnosis

∙Bus dominant clamping diagnosis

∙Cold start diagnosis (first battery connection).

GENERAL DESCRIPTION

The TJA1041A provides an advanced interface between the protocol controller and the physical bus in a Controller Area Network (CAN) node. The TJA1041A is primarily intended for automotive high-speed CAN applications (up to 1 Mbit/s). The transceiver provides differential transmit capability to the bus and differential receive capability to the CAN controller. The TJA1041A is fully compatible to the ISO 11898 standard, and offers excellent EMC performance, very low power consumption, and passive behaviour when supply voltage is off. The advanced features include:

∙Low-power management, supporting local and remote wake-up with wake-up source recognition and the capability to control the power supply in the rest of the node

∙Several protection and diagnosis functions including short circuits of the bus lines and first battery connection

∙Automatic adaptation of the I/O-levels, in line with the supply voltage of the controller.

TYPE		PACKAGE
NUMBER	NAME	DESCRIPTION	VERSION
TJA1041AT	SO14	plastic small outline package; 14 leads; body width 3.9 mm	SOT108-1
TJA1041AU	−	bare die; 1920 × 3190 × 380 μm	−

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Philips Semiconductors			Product specification
High speed CAN transceiver				TJA1041A
QUICK REFERENCE DATA
SYMBOL	PARAMETER	CONDITIONS	MIN.		MAX.	UNIT
VCC	DC voltage on pin VCC	operating range	4.75		5.25	V
VI/O	DC voltage on pin VI/O	operating range	2.8		5.25	V
VBAT	DC voltage on pin VBAT	operating range	5		27	V
IBAT	VBAT input current	VBAT = 12 V	10		30	μA
VCANH	DC voltage on pin CANH	0 < VCC < 5.25 V; no time limit	−27		+40	V
VCANL	DC voltage on pin CANL	0 < VCC < 5.25 V; no time limit	−27		+40	V
VSPLIT	DC voltage on pin SPLIT	0 < VCC < 5.25 V; no time limit	−27		+40	V
Vesd	electrostatic discharge voltage	Human Body Model (HBM)
		pins CANH, CANL and SPLIT	−6		+6	kV
		all other pins	−4		+4	kV
tPD(TXD-RXD)	propagation delay TXD to RXD	VSTB = 0 V	40		255	ns
Tvj	virtual junction temperature		−40		+150	°C

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Philips Semiconductors	Product specification
High speed CAN transceiver	TJA1041A

BLOCK DIAGRAM
			VI/O	VCC	VBAT
			5	3	10
				TJA1041A
TXD	1				7	INH
				TEMPERATURE
			TIME-OUT
				PROTECTION
	6		LEVEL
EN		ADAPTOR
					13	CANH
				DRIVER
	14					CANL
STB					12
		VBAT
WAKE	9		WAKE	VCC
		COMPARATOR
			MODE		11
			CONTROL	SPLIT		SPLIT
		VI/O
			+
			FAILURE
			DETECTOR
ERR	8		+
			WAKE-UP
				VBAT
			DETECTOR
			RXD	LOW POWER
			RECESSIVE
		VI/O		RECEIVER
			DETECTION
				VCC
RXD	4
				NORMAL
				RECEIVER
			2
					MNB115
			GND

Fig.1 Block diagram.

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Philips Semiconductors	Product specification
High speed CAN transceiver	TJA1041A

PINNING

		SYMBOL			PIN	DESCRIPTION
	TXD				1	transmit data input
	GND				2	ground
	VCC				3	transceiver supply voltage input
	RXD				4	receive data output; reads out data
						from the bus lines
	VI/O				5	I/O-level adapter voltage input
	EN				6	enable control input
	INH				7	inhibit output for switching external
						voltage regulators
					8	error and power-on indication output
		ERR
						(active LOW)
	WAKE				9	local wake-up input
	VBAT				10	battery voltage input
	SPLIT				11	common-mode stabilization output
	CANL				12	LOW-level CAN bus line
	CANH				13	HIGH-level CAN bus line
					14	standby control input (active LOW)
	STB

FUNCTIONAL DESCRIPTION

The primary function of a CAN transceiver is to provide the CAN physical layer as described in the ISO 11898 standard. In the TJA1041A this primary function is complemented with a number of operating modes, fail-safe features and diagnosis features, which offer enhanced system reliability and advanced power management functionality.

handbook, halfpage
TXD	1			14		STB
GND					CANH
	2			13
VCC					CANL
	3			12
RXD			TJA1041AT		SPLIT
	4			11
VI/O					VBAT
	5			10
					WAKE
EN	6			9
INH	7			8		ERR
			MDB635

Fig.2 Pinning configuration.

Operating modes

The TJA1041A can be operated in five modes, each with specific features. Control pins STB and EN select the operating mode. Changing between modes also gives access to a number of diagnostics flags, available via pin ERR. The following sections describe the five operating modes. Table 1 shows the conditions for selecting these modes. Figure 3 illustrates the mode transitions when VCC, VI/O and VBAT are present.

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Philips Semiconductors									Product specification
High speed CAN transceiver										TJA1041A
Table 1 Operating mode selection
CONTROL PINS						INTERNAL FLAGS			OPERATING MODE		PIN INH
			EN		UVNOM		UVBAT	pwon, wake-up
	STB
	X		X		set		X	X(1)	sleep mode; note 2		floating
					cleared		set	one or both set	standby mode		H
								both cleared	no change from sleep mode		floating
									standby mode from any other mode		H
	L		L		cleared		cleared	one or both set	standby mode		H
								both cleared	no change from sleep mode		floating
									standby mode from any other mode		H
	L		H		cleared		cleared	one or both set	standby mode		H
								both cleared	no change from sleep mode		floating
									go-to-sleep command mode from any		H(3)
									other mode; note 3
	H		L		cleared		cleared	X	pwon/listen-only mode		H
	H		H		cleared		cleared	X	normal mode; note 4		H

Notes

1.Setting the pwon flag or the wake-up flag will clear the UVNOM flag.

2.The transceiver directly enters sleep mode and pin INH is set floating when the UVNOM flag is set (so after the undervoltage detection time on either VCC or VI/O has elapsed before that voltage level has recovered).

3.When go-to-sleep command mode is selected for longer than the minimum hold time of the go-to-sleep command, the transceiver will enter sleep mode and pin INH is set floating.

4.On entering normal mode the pwon flag and the wake-up flag will be cleared.

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Philips Semiconductors	Product specification
High speed CAN transceiver	TJA1041A

STB = H and EN = H

PWON / LISTEN-

STB = H

NORMAL

and

ONLY MODE

MODE

EN = L

STB = H

and

STB = H

EN = H

and

STB = H

EN = L

STB = H

and

and

EN = L

EN = H

STB = L

and

STB

= L and EN = H

(EN

= L or flag set)

and

flags cleared

STB = L

and

EN = L

STB = L and EN = H

STANDBY

MODE

STB = L and EN = H and

flags cleared

STB = L and

(EN = L or flag set)

GO-TO-SLEEP COMMAND MODE

STB = H and EN = L and

UVNOM cleared

				flags cleared
	STB = L
				and
		and
				t > th(min)
		flag set
				SLEEP
				MODE

STB = H and EN = H and

UVNOM cleared

LEGEND:

= H, = L	logical state of pin	MGU983
flag set	setting pwon and/or wake-up flag
flags cleared	pwon and wake-up flag both cleared

Fig.3 Mode transitions when VCC, VI/O and VBAT are present.

NORMAL MODE

Normal mode is the mode for normal bi-directional CAN communication. The receiver will convert the differential analog bus signal on pins CANH and CANL into digital data, available for output to pin RXD. The transmitter will convert digital data on pin TXD into a differential analog signal, available for output to the bus pins. The bus pins

are biased at 0.5VCC (via Ri(cm)). Pin INH is active, so voltage regulators controlled by pin INH (see Fig.4) will be

active too.

PWON/LISTEN-ONLY MODE

In pwon/listen-only mode the transmitter of the transceiver is disabled, effectively providing a transceiver listen-only

behaviour. The receiver will still convert the analog bus signal on pins CANH and CANL into digital data, available for output to pin RXD. As in normal mode the bus pins are biased at 0.5VCC, and pin INH remains active.

STANDBY MODE

The standby mode is the first-level power saving mode of the transceiver, offering reduced current consumption. In standby mode the transceiver is not able to transmit or receive data and the low-power receiver is activated to monitor bus activity. The bus pins are biased at ground

level (via Ri(cm)). Pin INH is still active, so voltage regulators controlled by this pin INH will be active too.

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Philips Semiconductors			Product specification
High speed CAN transceiver			TJA1041A

Pins RXD and ERR will reflect any wake-up requests (provided that VI/O and VCC are present).

GO-TO-SLEEP COMMAND MODE

The go-to-sleep command mode is the controlled route for entering sleep mode. In go-to-sleep command mode the transceiver behaves as if in standby mode, plus a go-to-sleep command is issued to the transceiver. After remaining in go-to-sleep command mode for the minimum

hold time (th(min)), the transceiver will enter sleep mode. The transceiver will not enter the sleep mode if the state of

pins STB or EN is changed or the UVBAT, pwon or wake-up flag is set before th(min) has expired.

SLEEP MODE

The sleep mode is the second-level power saving mode of the transceiver. Sleep mode is entered via the go-to-sleep

command mode, and also when the undervoltage detection time on either VCC or VI/O elapses before that voltage level has recovered. In sleep mode the transceiver still behaves as described for standby mode, but now pin INH is set floating. Voltage regulators controlled by

pin INH will be switched off, and the current into pin VBAT is reduced to a minimum. Waking up a node from sleep

mode is possible via the wake-up flag and (as long as the UVNOM flag is not set) via pin STB.

Internal flags

The TJA1041A makes use of seven internal flags for its fail-safe fallback mode control and system diagnosis support. Table 1 shows the relation between flags and operating modes of the transceiver. Five of the internal flags can be made available to the controller via pin ERR. Table 2 shows the details on how to access these flags. The following sections describe the seven internal flags.

Table 2 Accessing internal flags via pin ERR

Internal flag	Flag is available on pin		(1)	Flag is cleared
		ERR
UVNOM	no			by setting the pwon or wake-up flag
UVBAT	no			when VBAT has recovered
pwon	in pwon/listen-only mode (coming from standby			on entering normal mode
	mode, go-to-sleep command mode, or sleep mode)
wake-up	in standby mode, go-to-sleep command mode, and			on entering normal mode, or by setting the
	sleep mode (provided that VI/O and VCC are present)			pwon or UVNOM flag
wake-up source	in normal mode (before the fourth dominant to			on leaving normal mode, or by setting the
	recessive edge on pin TXD; note 2)			pwon flag
bus failure	in normal mode (after the fourth dominant to			on re-entering normal mode
	recessive edge on pin TXD; note 2)
local failure	in pwon/listen-only mode (coming from normal			on entering normal mode or when RXD is
	mode)			dominant while TXD is recessive (provided
				that all local failures are resolved)

Notes

1.Pin ERR is an active-LOW output, so a LOW level indicates a set flag and a HIGH level indicates a cleared flag. Allow pin ERR to stabilize for at least 8 μs after changing operating modes.

2.Allow for a TXD dominant time of at least 4 μs per dominant-recessive cycle.

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