Philips TEF6894H User Guide

INTEGRATED CIRCUITS

DATA SH EET

TEF6894H

Car radio integrated signal processor

Product speciﬁcation 2003 Oct 21

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

CONTENTS

1 FEATURES

1.1 General

1.2 I2C-bus

1.3 Stereo decoder

1.4 Noise blanking

1.5 Weak signal processing

1.6 Tone/volume part 2 GENERAL DESCRIPTION 3 ORDERING INFORMATION 4 QUICK REFERENCE DATA 5 BLOCK DIAGRAM 6 PINNING 7 FUNCTIONAL DESCRIPTION

7.1 Stereo decoder

7.2 FM and AM noise blanker

7.3 High cut control and de-emphasis

7.4 Noise detector

7.4.1 FM noise detector

7.4.2 AM noise detector

7.5 Multipath/weak signal processing

7.6 Tone/volume control

7.6.1 Input selector

7.6.2 Loudness

7.6.3 Volume/balance

7.6.4 Treble

7.6.5 Bass

7.6.6 Fader/mute

7.6.7 Beep generator and NAV input with output mixer

8 LIMITING VALUES 9 THERMAL CHARACTERISTICS 10 CHARACTERISTICS 11 I2C-BUS PROTOCOL

11.1 Read mode

11.1.1 Data byte 1; STATUS

11.1.2 Data byte 2; LEVEL

11.1.3 Data byte 3; USN and WAM

11.2 Write mode

11.2.1 Subaddress 2H; RDSCLK

11.2.2 Subaddress 4H; CONTROL

11.2.3 Subaddress 5H; CSALIGN

11.2.4 Subaddress 6H; MULTIPATH

11.2.5 Subaddress 7H; SNC

11.2.6 Subaddress 8H; HIGHCUT

11.2.7 Subaddress 9H; SOFTMUTE

11.2.8 Subaddress AH; RADIO

11.2.9 Subaddress BH; INPUT and ASI

11.2.10 Subaddress CH; LOUDNESS

11.2.11 Subaddress DH; VOLUME

11.2.12 Subaddress EH; TREBLE

11.2.13 Subaddress FH; BASS

11.2.14 Subaddress 10H; FADER

11.2.15 Subaddress 11H; BALANCE

11.2.16 Subaddress 12H; MIX

11.2.17 Subaddress 13H; BEEP

11.2.18 Subaddress 1FH; AUTOGATE 12 TEST AND APPLICATION INFORMATION 13 PACKAGE OUTLINE 14 SOLDERING

14.1 Introduction to soldering surface mount packages

14.2 Reflow soldering

14.3 Wave soldering

14.4 Manual soldering

14.5 Suitability of surface mount IC packages for wave and reflow soldering methods

15 DATA SHEET STATUS 16 DEFINITIONS 17 DISCLAIMERS 18 PURCHASE OF PHILIPS I2C COMPONENTS

2003 Oct 21 2

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

1 FEATURES

1.1 General

• High integration

• No external components except couplingcapacitors for

signal inputs and outputs

• QFP44 package with small Printed-Circuit Board (PCB) footprint.

1.2 I

C-bus

• Fast mode 400 kHz I2C-bus, interfaces to logic levels ranging from 2.5 to 5 V

• Gated I2C-bus loop through to tuner IC – Eases PCB layout (crosstalk) – Allows mix of 400 kHz and 100 kHz busses – Low bus load reduces crosstalk – Buffered I/O circuit – Supply voltage shift between both buses allowed.

• Shortgate function offers easy control with automatic gating of a single transmission; suited for TEA684x

• Autogate function offers transparent microcontroller control with automatic on/off gating (programmable address).

1.3 Stereo decoder

1.5 Weak signal processing

• FM weak signal processing with detectors for RF level, Ultrasonic Noise (USN) and Wideband AM (WAM) information

• AM weak signal processing with detectors for level information

• AM processing with soft mute and High Cut Control (HCC)

• FM processing with soft mute, stereo blend and HCC

• Setting of the sensitivity of the detectors and start and

slope of the control functions via I

C-bus

• Weather band de-emphasis

• Level, USN and WAM read-out via I2C-bus (signal

quality detectors)

• Full support of tuner AF update functions with TEA684x tuner ICs, FM audio processing holds the detectors for the FM weak signal processing in their present state during RDS updating.

• FMstereodecoderwithhighimmunitytobirdynoiseand excellent pilot cancellation

• Integrated IF roll-off correction controlled via I2C-bus

• De-emphasis selectable between 75 and 50 µs via

I2C-bus.

1.4 Noise blanking

• New fully integrated AM noise blanker with excellent performance

• Fully integrated FM noise blanker with superior performance.

2003 Oct 21 3

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

1.6 Tone/volume part

• Input selector for four inputs: – Two external stereo inputs (CD and TAPE) – One mono input (PHONE) – One internal stereo input (AM or FM).

• Integrated tone control and audio filters without external components

• Volume control from +20 to −79 dB in 1 dB steps; programmable 20 dB loudness control included

• Programmable loudness control with bass boost or as bass and treble boost

• Treble control from −14 to +14 dB in 2 dB steps

• Bass control from −14 to +14 dB in 2 dB steps with

selectable characteristics

• Good undistorted performance for any step size, including mute

• Audio Step Interpolation (ASI) availablefor the following audio controls:

– Mute – Loudness – Volume/balance – Bass – Fader.

• ASI also realizes Alternative Frequency (AF) mute for inaudible RDS update

• Integrated beep generator

• Navigation (NAV) input

• Output mixer circuit for beep or NAV signal at output

stages.

2 GENERAL DESCRIPTION

The TEF6894H is a monolithic BiMOS integrated circuit comprising the stereo decoder function, weak signal processing and ignition noise blanking facility for AM and FM combined with input selector and tone/volume control forAM and FM car radio applications. The deviceoperates with a supply voltage of 8 to 9 V.

3 ORDERING INFORMATION

TYPE

NUMBER

TEF6894H QFP44 plastic quad ﬂat package; 44 leads (lead length 1.3 mm);

2003 Oct 21 4

NAME DESCRIPTION VERSION

body 10 × 10 × 1.75 mm

PACKAGE

SOT307-2

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

4 QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Stereo decoder path

S/N signal-to-noise ratio f THD total harmonic distortion FM mode; f

Tone/volume control

i(max)(rms)

i(NAV)(max)(rms)

THD total harmonic distortion TAPE and CD inputs;

vol

step(vol)

loudness

treble

step(treble)

bass

step(bass)

supply voltage 8.0 8.5 9.0 V supply current normal mode − 24 − mA

standby − 15 − mA

channel separation f

maximum input voltage level at

THD = 0.1%; G

= 1 kHz 40 −− dB

FMMPX

=20Hzto15kHz 75 −− dB

FMMPX

= 1 kHz −−0.3 %

FMMPX

= −6dB 2 −− V

vol

pins TAPEL, TAPER, CDL, CDR, CDCM, PHONE and PHCM (RMS value)

maximum input voltage level at

THD = 1%; f

= 1 kHz 0.3 −− V

NAV

pin NAV (RMSvalue)

− 0.01 0.1 %

= 20 Hz to 20 kHz;

audio

Vi= 1 V (RMS)

volume/balance gain control maximum setting − 20 − dB

minimum setting −−59 − dB step resolution gain (volume) − 1 − dB loudness gain control f

loudness(low)

= 50 Hz; high boost on maximum setting; 1 kHz tone − 0 − dB minimum setting; 1 kHz tone −−20 − dB

treble gain control maximum setting − 14 − dB

minimum setting −−14 − dB step resolution gain (treble) − 2 − dB bass gain control maximum setting; symmetrical boost − 14 − dB

minimum setting; asymmetrical cut −−14 − dB step resolution gain (bass) − 2 − dB

2003 Oct 21 5

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2003 Oct 21 6

5 BLOCK DIAGRAM

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

CDL

CDR CDCM TAPEL

TAPER

PHONE

PHCM

FMMPX

MPXRDS

LEVEL

SCLG

SDAG

AFSAMP

AFHOLD

FREF

input select

−

level

sclg sdag

INPUT

SELECT

− +

MPX

USN

WAM

ref

23 25 26

0 to −20 dB

low f: 50/100 Hz

high boost

LOUDNESS

asi

19 kHz

REFERENCE

ref

TEF6894H

DETECT

vol: +20 to −59 dB

bal: L/R, 0 to −79 dB

mute

VOLUME/

BALANCE/

MUTE

asi

38 kHz

level

usn

wam

afus afumute

afu-

mute

STEREO

DECODER

stereo 57 kHz

ref

amfm-

softmute

PILOT

CANCEL

PILOT/

PLL

reset/hold

8, 12, 13, 14, 15, 19, 31, 33 34, 35, 36, 37, 38, 39, 40

i.c.

+14 to −14 dB

f: 8 to 15 kHz

TREBLE

AUDIO STEP INTERPOLATION (asi)

asi time asi active

stereo adjustroll-off correction fm/am

fmsnc

nb sensitivity

usn sensitivity

wam sensitivity

+14 to −14 dB f: 60 to 120 Hz

shelve/band-pass

NOISE

DETECT

NOISE

DETECT

detection timings

and control

MULTIPATH/

WEAK SIGNAL

DETECTION AND LOGIC

hold

BASS

asi

BLANKER

amnb

NOISE

PULSE TIMER

fmnb

SNC HCC

front/rear

0 to −59 dB

FRONT/

REAR

FADER

f: 1.5 to 15 kHz/wide

amfmhcc

snc start, slope hcc start, slope

sm start, slope

LF, RF,

LR, RR

MUTE

asi asi

BEEP

HIGH

CUT

amnb

fmnb

fmsnc amfm-

hcc amfm-

softmute

mute:

level/off

pitch

50/75 µs

DE-EMPHASIS

standby

ref

sclg

sdag

mix:

LF, RF,

LR, RR

MIX

SUPPLY

C-BUS

INTERFACE

read write

autogate

on/off

addr

27 28 29 30

16 17

18 41

MHC422

LFOUT RFOUT LROUT RROUT

NAV

CC AGND

CREF

DGND

ADDR

SCL SDA

GND

handbook, full pagewidth

Fig.1 Block diagram.

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

6 PINNING

SYMBOL PIN DESCRIPTION

LEVEL 1 level detector input GND 2 ground SCLG 3 gated I SDAG 4 gated I FMMPX 5 FM-MPX input for audio processing MPXRDS 6 FM-MPX input for weak signal processing and noise blanker AM 7 AM audio input i.c. 8 internally connected AFHOLD 9 FM weak signal processing hold input AFSAMP 10 trigger signal input for quality measurement FREF 11 reference frequency input 75.4 kHz i.c. 12 internally connected i.c. 13 internally connected i.c. 14 internally connected i.c. 15 internally connected V

16 supply voltage AGND 17 analog ground CREF 18 reference voltage capacitor i.c. 19 internally connected CDR 20 CD right input CDCM 21 CD common input CDL 22 CD left input TAPER 23 tape right input TAPEL 24 tape left input PHONE 25 phone input PHCM 26 phone common input LFOUT 27 left front output RFOUT 28 right front output LROUT 29 left rear output RROUT 30 right rear output i.c. 31 internally connected NAV 32 audio input for navigation voice signal i.c. 33 internally connected i.c. 34 internally connected i.c. 35 internally connected i.c. 36 internally connected i.c. 37 internally connected i.c. 38 internally connected i.c. 39 internally connected i.c. 40 internally connected

C-bus clock port

C-bus data port

2003 Oct 21 7

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

SYMBOL PIN DESCRIPTION

DGND 41 digital ground SDA 42 I SCL 43 I ADDR 44 address select input

handbook, full pagewidth

C-bus data input or output

C-bus clock input

ADDR

SCL

SDA

DGND 41

i.c. 40

i.c. 39

i.c. 38

i.c. 37

i.c. 36

i.c. 35

i.c. 34

LEVEL

GND

SCLG

SDAG

i.c.

FREF

i.c.

TEF6894H

15 i.c.

6 7 8

9 10 11

i.c.

FMMPX

MPXRDS

AFHOLD AFSAMP

Fig.2 Pin configuration.

7 FUNCTIONAL DESCRIPTION

7.1 Stereo decoder

The FMMPX input is the input for the MPX signal from the tuner. The input gain can be selected in three settings to match the input to the RF front-end circuit. A fourth setting is used for weather band mode, which may require a gain of 23.5 dB.

A low-pass filter provides the necessary signal delay for FM noise blanking and suppression of high frequency interferences into the stereo decoder input. The output signalofthisfilterisfedtotheroll-offcorrectioncircuit.This circuit compensates the frequency response caused by the low-pass characteristic of the tuner circuit with its IF filters. The roll-off correction circuit is adjustable in four

i.c.

NAV

i.c.

RROUT

LROUT

RFOUT

LFOUT

PHCM

PHONE

TAPEL

TAPER

MHC421

AGND

CREF

i.c.

CDR

CDCM

CDL

settings to compensate different frequency responses of the tuner part.

The MPX signal is decoded in the stereo decoder part. A PLL is used for the regeneration of the 38 kHz subcarrier. The fully integrated oscillator is adjusted by a digitalauxiliaryPLLintothecapturerangeofthemain PLL. The auxiliary PLL needs an external reference frequency (75.4 kHz) which is provided by the tuner ICs of the NICE family(TEA684x). The required 19 and 38 kHz signals are generated by division of the oscillator output signal in a logic circuit. The 19 kHz quadrature phase signal is fed to the 19 kHz phase detector, where it is compared with the incoming pilot tone. The DC output signal of the phase detector controls the oscillator (PLL).

2003 Oct 21 8

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

The pilot detector is driven by an internally generated in-phase 19 kHz signal. Its pilot dependent voltage activates the stereo indicator bit and sets the stereo decoder to stereo mode. The same voltage is used to controlthe amplitude of an anti-phase internally generated 19 kHz signal. In the pilot canceller, the pilot tone is compensated by this anti-phase 19 kHz signal.

The signal is then decoded in the decoder part. The side signal is demodulated and combined with the main signal to the left and right audio channels. A fine adjustment of the roll-off compensation is done by adjusting the gain of the L-R signal in 16 steps. A smooth mono to stereo takeover is achieved by controlling the efficiency of the matrix by the FMSNC signal from the weak signal processing block.

7.2 FM and AM noise blanker

The FM/AM switch selects the output signal of the stereo decoder (FM mode) or the signal from the AM input for the noise blanker block. In FM mode the noise blanker operates as a sample and hold circuit, while in AM mode it mutes the audio signal during the interference pulse. The blanking pulse which triggers the noise blanker is generated in the noise detector block.

7.3 High cut control and de-emphasis

The High Cut Control (HCC) part is a low-pass filter circuit with eight different static roll-off response curves. The cut-offfrequenciesofthesefiltercurvescanbeselectedby I2C-bus to match different application requirements. The HCC circuit also provides a dynamic control of the filter response. This function is controlled by the AMFMHCC signal from the weak signal processing.

The signal passes the de-emphasis block with two de-emphasisvalues(50and75 µs), which can be selected via I2C-bus, and is fed to the input selector.

7.4 Noise detector

7.4.1 FM NOISE DETECTOR Thetrigger signal for the FMnoise detector is derived from

the MPXRDS input signal and the LEVEL signal. In the MPXRDS path a four pole high-pass filter (100 kHz) separates the noise spikes from the wanted MPX signal. Another detector circuit triggers on noise spikes on the level voltage. The signals of both detectors are combined to achieve a reliable trigger signal for the noise blanker. AGC circuits in the detector part control the gain depending on the average noise in the signals to prevent false triggering. The sensitivity of the triggering from the

MPXRDS signal can be adjusted in four steps, the triggering from the LEVEL signal in three steps.

7.4.2 AM NOISE DETECTOR The trigger pulse for the AM noise blanker is derived from

the AM audio signal. The noise spikes are detected by a slew rate detector, which detects excessive slew rates which do not occur in normal audio signals. The sensitivity of the AM noise blanker can be adjusted in four steps.

7.5 Multipath/weak signal processing

The multipath (MPH)/weak signal processing block detectsqualitydegradationsintheincomingFMsignaland controls the processing of the audio signal accordingly. There are three different quality criteria:

• The average value of the level voltage

• The AM components on the level voltage

[Wideband AM (WAM)]

• The high frequency components in the MPX signal [Ultrasonic Noise (USN)].

The level voltage is converted to a digital value by an 8-bit analog-to-digital converter. A digital filter circuit (WAM filter) derives the wideband AM components from the level signal.ThehighfrequencycomponentsintheMPXsignals are measured with an analog-to-digital converter (USN ADC) at the output of the 100 kHz high-pass filter in the MPXRDS path.

The values of these three signals are externally available via the I2C-bus.

In the weak signal processing block the three digital signals are combined in a specific way and used for the generation of control signals for soft mute, stereo blend (stereo noise control, FMSNC) and high cut control (AMFMHCC).

The sensitivities of the detector circuits (WAM and USN) are adjustable via the I2C-bus.

Alsothestartvaluesandtheslopesofthecontrolfunctions soft mute, stereo blend and high cut control can be set via the I2C-bus.

Soft mute, stereo blend and HCC are set on hold during the AF updating (quality check of alternative frequency) to avoid an influence of the tuning procedure on the weak signal processing conditions.

In AM mode the soft mute and high cut control are available too, the weak signal block is controlled by the average value of the level voltage.

2003 Oct 21 9

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

7.6 Tone/volume control

The tone/volume control part consists of the following stages:

• Input selector

• Loudness control

• Volume/balance control with muting

• Treble control

• Bass control

• Fader and output mute

• Beep generator

• NAV input

• Output mixer.

The settings of all stages are controlled via the I2C-bus. The stages input selector, loudness, volume/balance,

bass, and fader/output mute include the Audio Step Interpolation (ASI) function. This minimizes pops by smoothing the transitions in the audio signal during the switching of the controls. The transition time of the ASI function is programmable by I2C-bus in four steps.

7.6.1 INPUT SELECTOR

7.6.4 TREBLE

The signal is then fed to the treble control stage. The control range is between +14 and −14 dB in steps of 2 dB. Figure 20 shows the control characteristic. Four different filter frequencies can be selected.

7.6.5 BASS

The characteristic of the bass attenuation curves can be set to shelve or band-pass. Four different frequencies can be selected as centre frequency of the band-pass curve. Figures 21 and 22show the bass curves with a band-pass filter frequency of 60 Hz. The control range is between +14 and −14 dB in steps of 2 dB.

7.6.6 FADER/MUTE

The four fader/mute blocks are located at the end of the tone/volume chain. The control range of these attenuators is 0 to −59 dB. The step size is:

• 1 dB between 0 and −15 dB

• 2.5 dB between −15 and −45 dB

• 3 dB between −45 and −51 dB

• 4 dB between −51 and −59 dB.

The input selector selects one of four input sources:

• Two external stereo inputs (CD and TAPE)

• One external mono input (PHONE)

• One internal stereo input (AM/FM).

7.6.2 LOUDNESS The output of the input selector is fed into the loudness

circuit. Four different loudness curves can be selected via the I2C-bus. The control range is between 0 and −20 dB with a step size of 1 dB; see Figs 16 to 19.

7.6.3 VOLUME/BALANCE Thevolume/balance control is used for volumesetting and

also for balance adjustment. The control range of the volume/balance control is between +20 and −59 dB in steps of 1 dB.

Thecombination of loudness and volume/balance realizes an overall control range of +20 to −79 dB.

7.6.7 BEEP GENERATOR AND NAVINPUT WITH OUTPUT

MIXER

The output mixer circuit can add anadditional audio signal to any of the four outputs together with the main signal or instead of the main signal.

The additional signal can be generated internally by the beep generator with four different audio frequencies or applied to the NAV input, for instance a navigation voice signal.

2003 Oct 21 10

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

8 LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

stg

amb

esd

Notes

1. Machine model (R = 0 Ω, C = 200 pF).

2. Human body model (R = 1.5 kΩ, C = 100 pF).

9 THERMAL CHARACTERISTICS

supply voltage −0.3 +10 V input voltage for any pin −0.3 VCC+ 0.3 V storage temperature −65 +150 °C ambient temperature −40 +85 °C electrostatic discharge voltage note 1 −200 +200 V

note 2 −2000 +2000 V

SYMBOL PARAMETER CONDITIONS VALUE UNIT

th(j-a)

thermal resistance from junction to ambient in free air 61 K/W

10 CHARACTERISTICS

FM part: f V

= 967 mV (RMS) (100% AM). Treble: 10 kHz ﬁlter frequency. Bass: 60 Hz ﬁlter frequency. Loudness: 50 Hz ﬁlter

frequency; treble loudness on. V

FMMPX

= 1 kHz at V

= 767 mV (RMS); pilot off (100% FM). AM part: fAM= 1 kHz at

FMMPX

= 8.5 V; T

=25°C; see Fig.23; unless otherwise speciﬁed.

amb

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

supply voltage 8.0 8.5 9.0 V supply current normal mode − 24 − mA

standby − 15 − mA

Logic pins

HIGH-level input voltage pins SDA, SCL, ADDR and SDAG 1.75 − 5.5 V

pins AFHOLD and AFSAMP 1.75 − 5.5 V

LOW-level input voltage pins SDA, SCL, ADDR and SDAG −0.2 − +1.0 V

pins AFHOLD and AFSAMP −0.2 − +1.0 V

LOW-level output voltage pin SCLG; IOL= 3 mA; note 1 −− 0.4 V

pin SDA; I

=3mA −− 0.4 V

Stereo decoder and AM path

o(FM)(rms)

FM mono output voltage (RMS value) on

= 1 kHz; 91% FM modulation

FMMPX

without pilot (V

FMMPX

750 950 1200 mV

= 698 mV)

pins LFOUT and RFOUT

o(AM)(rms)

AM output voltage (RMS value) on

fAM= 1 kHz; VAM= 870 mV; 90% AM modulation

800 1080 1360 mV

pins LFOUT and RFOUT

2003 Oct 21 11

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

c(L-R)

f(L-R)

S/N signal-to-noise ratio f

THD total harmonic distortion FM mode

o(bal)

α subcarrier suppression modulation off; referenced to 1 kHz

PSRR power supply ripple

input gain on pins FMMPX, MPXRDS and AM

see Table 36

ING[1:0] = 00; all inputs − 0 − dB ING[1:0] = 01; all inputs − 3 − dB ING[1:0] = 10; all inputs − 6 − dB ING[1:0] = 11; FMMPX − 23.5 − dB

ING[1:0] = 11; MPXRDS and AM − 0 − dB channel separation f roll-off correction for

coarse adjustment of separation

see Table 20; measure 1 kHz level for L − R modulation; compare to 1 kHz level for L + R modulation

= 1 kHz 40 −−dB

FMMPX

CSR[1:0] = 00 − 0 − dB

CSR[1:0] = 01 − 0.4 − dB

CSR[1:0] = 10 − 0.8 − dB

CSR[1:0] = 11 − 1.2 − dB stereo adjust for ﬁne

adjustment of separation

see Table 21; measure 1 kHz level for L − R modulation; compare to 1 kHz level for L + R modulation

CSA[3:0] = 0000 − 0 − dB

CSA[3:0] = 0001 − 0.2 − dB

: − : − dB

CSA[3:0] = 1110 − 2.8 − dB

CSA[3:0] = 1111 − 3.0 − dB

= 20 Hz to 15 kHz;

FMMPX

75 −−dB referenced to 1 kHz at 91% FM modulation; DEMP = 1 (τ

=50µs)

de-em

f V V

= 1 kHz −− 0.3 %

FMMPX

= 50%; L; pilot on −− 0.3 %

FMMPX

= 50%; R; pilot on −− 0.3 %

FMMPX

mono channel balance FM mode −1 − +1 dB

--------- V

pilot signal suppression 9% pilot; f

= 19 kHz; referenced

pilot

40 50 − dB to 1 kHz at 91% FM modulation; DEMP = 1 (τ

de-em

=50µs)

at 91% FM modulation

= 38 kHz 35 50 − dB

= 57 kHz 40 −−dB

= 76 kHz 50 60 − dB

rejection

FM mode; f V

CC(AC)=Vripple

= 100 Hz;

ripple

= 100 mV (RMS)

24 −−dB

2003 Oct 21 12

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

∆V

out

cut-off(de-em)

i(pilot)(rms)

hys

pilot

ref(min)

ref

Noise blanker

frequency response FM mode

FMMPX

cut-off frequency of de-emphasis ﬁlter

−3 dB point; see Fig.15

DEMP = 1 (τ DEMP = 0 (τ

pilot threshold modulation forautomatic switching by pilot input voltage (RMS value)

stereo

on − 4.0 5.5 % off 1.3 2.7 − %

hysteresis of pilot threshold voltage

minimum reference input voltage

reference frequency for stereo PLL

=20Hz −0.5 − +0.5 dB = 15 kHz −0.5 − +0.5 dB

=50µs) − 3.18 − kHz

de-em

=75µs) − 2.12 − kHz

de-em

− 2 − dB

−− 30 mV

75361 75368 75375 Hz

FM PART t

sup(min)

MPXRDS(M)

LEVEL(M)

PART

sup(min)

minimum suppression time

noise blanker sensitivity at MPXRDS input (peak value of noise pulses)

see Table 37; t repetition frequency f = 300 Hz

NBS[1:0] = 00 − 90 − mV NBS[1:0] = 01 − 150 − mV NBS[1:0] = 10 − 210 − mV NBS[1:0] = 11 − 270 − mV

noise blanker sensitivity at LEVEL input (peak value of noise pulses)

see Table 40; t repetition frequency f = 300 Hz

NBL[1:0] = 00 − 9 − mV NBL[1:0] = 01 − 18 − mV NBL[1:0] = 10 − 28 − mV

minimum suppression time

noise blanker sensitivity see Table 37; f

NBS[1:0] = 00 − 110 − % NBS[1:0] = 01 − 140 − % NBS[1:0] = 10 − 175 − % NBS[1:0] = 11 − 220 − %

pulse

audio

− 15 −µs

=10µs;

− 200 −µs

= 2 kHz

2003 Oct 21 13

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Weak signal processing

DETECTORS V

eq(USN)

eq(WAM)

LEVEL(attack)

LEVEL(decay)

USNsensitivityequivalent level voltage

WAM sensitivity equivalent level voltage

level detector attack time (soft mute and HCC)

level detector decay time (soft mute and HCC)

see Fig.5; f V

MPXRDS

= 250 mV (RMS);

= 150 kHz;

HCMP = 1; note 2

USS[1:0] = 00 − 2.5 − V USS[1:0] = 01 − 2 − V USS[1:0] = 10 − 1.5 − V USS[1:0] = 11 − 0.5 − V

see Fig.6; V

= 200 mV (p-p) at

LEVEL

f = 21 kHz on the level voltage; HCMP = 1; note 2

WAS[1:0] = 00 − 2.5 − V WAS[1:0] = 01 − 2 − V WAS[1:0] = 10 − 1.5 − V WAS[1:0] = 11 − 0.5 − V

see Table 24; LETF = 0; SEAR = 0

LET[1:0] = 00 − 3 − s LET[1:0] = 01 − 3 − s LET[1:0] = 10 − 1.5 − s LET[1:0] = 11 − 0.5 − s

see Table 24; LETF = 1; SEAR = 0

LET[1:0] = 00 − 0.5 − s LET[1:0] = 01 − 0.17 − s LET[1:0] = 10 − 0.06 − s

LET[1:0] = 11 − 0.06 − s search mode; SEAR = 1 − 60 − ms see Table 24; LETF = 0; SEAR = 0

LET[1:0] = 00 − 3 − s

LET[1:0] = 01 − 6 − s

LET[1:0] = 10 − 1.5 − s

LET[1:0] = 11 − 1.5 − s see Table 24; LETF = 1; SEAR = 0

LET[1:0] = 00 − 0.5 − s

LET[1:0] = 01 − 0.5 − s

LET[1:0] = 10 − 0.17 − s

LET[1:0] = 11 − 0.06 − s search mode; SEAR = 1 − 60 − ms

2003 Oct 21 14

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

MPH(attack)

MPH(decay)

USN(attack)

USN(decay)

∆USS USN detector

WAM(attack)

WAM(decay)

peak(USN)(attack)

peak(USN)(decay)

peak(WAM)(attack)

peak(WAM)(decay)

multipath detector attack time (SNC)

multipath detector decay time (SNC)

USN detector attack time (soft mute and SNC)

USN detector decay time (soft mute and SNC)

desensitization

WAMdetector attack time (SNC)

WAMdetector decay time (SNC)

peak detector for USN attack time for read-out via I2C-bus

peak detector for USN decay time for read-out via I2C-bus

peak detector for WAM attack time for read-out via I2C-bus

peak detector for WAM decay time for read-out via I2C-bus

see Table 25; SEAR = 0

MPT[1:0] = 00 − 0.5 − s

MPT[1:0] = 01 − 0.5 − s

MPT[1:0] = 10 − 0.5 − s

MPT[1:0] = 11 − 0.25 − s search mode; SEAR = 1 − 60 − ms see Table 25; SEAR = 0

MPT[1:0] = 00 − 12 − s

MPT[1:0] = 01 − 24 − s

MPT[1:0] = 10 − 6 − s

MPT[1:0] = 11 − 6 − s search mode; SEAR = 1 − 60 − ms

− 1 − ms

USN sensitivity setting (USS) versus levelvoltage (USN sensitivity setting is automatically reduced as level voltage decreases)

1.25V>V

1.125 V > V

1.0V>V

> 1.25 V −− 3−

LEVEL

> 1.125 V −− 2−

LEVEL

> 1.0 V −− 1−

LEVEL

−− 0−

− 1 − ms

− 10 − ms

− 1 − ms

− 10 − ms

2003 Oct 21 15

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

CONTROL FUNCTIONS V

start(mute)

mute

mute(max)

start(SNC)

SNC

soft mute start voltage see Fig.12; voltage at pin LEVEL

that causes α

mute

= 3 dB;

MSL[1:0] = 11

MST[2:0] = 000 − 0.75 − V

MST[2:0] = 001 − 0.88 − V

MST[2:0] = 010 − 1 − V

MST[2:0] = 011 − 1.12 − V

MST[2:0] = 100 − 1.25 − V

MST[2:0] = 101 − 1.5 − V

MST[2:0] = 110 − 1.75 − V

MST[2:0] = 111 − 2 − V

soft mute slope see Fig.13; slope of soft mute

mute

∆

mute

-----------------

∆

attenuation with respect to level voltage; MST[2:0] = 000

MSL[1:0] = 00 − 8 − dB/V

MSL[1:0] = 01 − 16 − dB/V

MSL[1:0] = 10 − 24 − dB/V

MSL[1:0] = 11 − 32 − dB/V

maximum soft mute attenuation by USN

see Fig.14; f V

MPXRDS

= 0.6 V (RMS);

MPXRDS

= 150 kHz;

USS[1:0] = 11

UMD[1:0] = 00 − 3 − dB

UMD[1:0] = 01 − 6 − dB

UMD[1:0] = 10 − 9 − dB

UMD[1:0] = 11 − 12 − dB

SNC stereo blend start voltage

see Fig.7; voltage at pin LEVEL that causes channel separation = 10 dB; SSL[1:0] = 10

SST[3:0] = 0000 − 1.5 − V

: − : − V

SST[3:0] = 1000 − 2.0 − V

: − : − V

SST[3:0] = 1111 − 2.45 − V

SNC slope see Fig.8; slope of channel

SNC

αcs∆

------------ -

∆

separation between 30 dB and 10 dB with respect to level voltage; SST[3:0] = 1010

SSL[1:0] = 00 − 38 − dB/V

SSL[1:0] = 01 − 51 − dB/V

SSL[1:0] = 10 − 63 − dB/V

SSL[1:0] = 11 − 72 − dB/V

2003 Oct 21 16

Philips Semiconductors Product speciﬁcation

Car radio integrated signal processor TEF6894H

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

start(HCC)

HCC

HCC(max)

cut-off

Analog-to-digital converters for I

HCC start voltage see Fig.9; f

pin LEVEL that causes α HSL[1:0] = 10

HST[2:0] = 000 − 1.17 − V

HST[2:0] = 001 − 1.42 − V

HST[2:0] = 010 − 1.67 − V

HST[2:0] = 011 − 1.92 − V

HST[2:0] = 100 − 2.17 − V

HST[2:0] = 101 − 2.67 − V

HST[2:0] = 110 − 3.17 − V

HST[2:0] = 111 − 3.67 − V

HCC slope see Fig.10; f

HCC

∆

HCC

-----------------

∆

HST[2:0] = 010

HSL[1:0] = 00 − 9 − dB/V

HSL[1:0] = 01 − 11 − dB/V

HSL[1:0] = 10 − 14 − dB/V

HSL[1:0] = 11 − 18 − dB/V

maximum HCC attenuation

see Fig.10; f

HCSF = 1 − 10 − dB

HCSF = 0 − 14 − dB

cut-off frequency of ﬁxed HCC

see Table 31; −3 dB point (first order filter)

HCF[2:0] = 000 − 1.5 − kHz

HCF[2:0] = 001 − 2.2 − kHz

HCF[2:0] = 010 − 3.3 − kHz

HCF[2:0] = 011 − 4.7 − kHz

HCF[2:0] = 100 − 6.8 − kHz

HCF[2:0] = 101 − 10 − kHz

HCF[2:0] = 110 − wide −−

HCF[2:0] = 111 − unlimited −−

C-bus

= 10 kHz; voltage at

audio

= 10 kHz;

audio

=10kHz

audio

HCC

= 3 dB;

LEVEL ANALOG-TO-DIGITAL CONVERTER (8-BIT); see Fig.4 V

LEVEL(min)

lower voltage limit of conversion range

LEVEL(max)

upper voltage limit of conversion range

∆V

LEVEL

bit resolution voltage − 15.7 − mV

2003 Oct 21 17

− 0.25 − V

− 4.25 − V

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