Philips TEF6894H User Guide

INTEGRATED CIRCUITS

DATA SHEET

TEF6894H

Car radio integrated signal processor

Product specification			2003 Oct 21

Philips Semiconductors	Product specification
Car radio integrated signal processor	TEF6894H

CONTENTS

1 FEATURES

1.1General

1.2I2C-bus

1.3Stereo decoder

1.4Noise blanking

1.5Weak signal processing

1.6Tone/volume part

2GENERAL DESCRIPTION

3ORDERING INFORMATION

4QUICK REFERENCE DATA

5BLOCK DIAGRAM

6PINNING

7FUNCTIONAL DESCRIPTION

7.1Stereo decoder

7.2FM and AM noise blanker

7.3High cut control and de-emphasis

7.4Noise detector

7.4.1FM noise detector

7.4.2AM noise detector

7.5Multipath/weak signal processing

7.6Tone/volume control

7.6.1Input selector

7.6.2Loudness

7.6.3Volume/balance

7.6.4Treble

7.6.5Bass

7.6.6Fader/mute

7.6.7Beep generator and NAV input with output mixer

8LIMITING VALUES

9THERMAL CHARACTERISTICS

10CHARACTERISTICS

11I2C-BUS PROTOCOL

11.1Read mode

11.1.1Data byte 1; STATUS

11.1.2Data byte 2; LEVEL

11.1.3Data byte 3; USN and WAM

11.2Write mode

11.2.1Subaddress 2H; RDSCLK

11.2.2Subaddress 4H; CONTROL

11.2.3Subaddress 5H; CSALIGN

11.2.4Subaddress 6H; MULTIPATH

11.2.5Subaddress 7H; SNC

11.2.6Subaddress 8H; HIGHCUT

11.2.7Subaddress 9H; SOFTMUTE

11.2.8Subaddress AH; RADIO

11.2.9Subaddress BH; INPUT and ASI

11.2.10Subaddress CH; LOUDNESS

11.2.11Subaddress DH; VOLUME

11.2.12Subaddress EH; TREBLE

11.2.13Subaddress FH; BASS

11.2.14Subaddress 10H; FADER

11.2.15Subaddress 11H; BALANCE

11.2.16Subaddress 12H; MIX

11.2.17Subaddress 13H; BEEP

11.2.18Subaddress 1FH; AUTOGATE

12TEST AND APPLICATION INFORMATION

13PACKAGE OUTLINE

14SOLDERING

14.1Introduction to soldering surface mount packages

14.2Reflow soldering

14.3Wave soldering

14.4Manual soldering

14.5Suitability of surface mount IC packages for wave and reflow soldering methods

15DATA SHEET STATUS

16DEFINITIONS

17DISCLAIMERS

18PURCHASE OF PHILIPS I2C COMPONENTS

2003 Oct 21

2

Philips Semiconductors	Product specification
Car radio integrated signal processor	TEF6894H

1 FEATURES

1.1General

∙High integration

∙No external components except coupling capacitors for signal inputs and outputs

∙QFP44 package with small Printed-Circuit Board (PCB) footprint.

1.2I2C-bus

∙Fast mode 400 kHz I2C-bus, interfaces to logic levels ranging from 2.5 to 5 V

∙Gated I2C-bus loop through to tuner IC

–Eases PCB layout (crosstalk)

–Allows mix of 400 kHz and 100 kHz busses

–Low bus load reduces crosstalk

–Buffered I/O circuit

–Supply voltage shift between both buses allowed.

∙Shortgate function offers easy control with automatic gating of a single transmission; suited for TEA684x

∙Autogate function offers transparent microcontroller control with automatic on/off gating (programmable address).

1.3Stereo decoder

∙FM stereo decoder with high immunity to birdy noise and excellent pilot cancellation

∙Integrated IF roll-off correction controlled via I2C-bus

1.5Weak signal processing

∙FM weak signal processing with detectors for RF level, Ultrasonic Noise (USN) and Wideband AM (WAM) information

∙AM weak signal processing with detectors for level information

∙AM processing with soft mute and High Cut Control (HCC)

∙FM processing with soft mute, stereo blend and HCC

∙Setting of the sensitivity of the detectors and start and slope of the control functions via I2C-bus

∙Weather band de-emphasis

∙Level, USN and WAM read-out via I2C-bus (signal quality detectors)

∙Full support of tuner AF update functions with TEA684x tuner ICs, FM audio processing holds the detectors for the FM weak signal processing in their present state during RDS updating.

∙De-emphasis selectable between 75 and 50 μs via I2C-bus.

1.4Noise blanking

∙New fully integrated AM noise blanker with excellent performance

∙Fully integrated FM noise blanker with superior performance.

2003 Oct 21

3

Philips Semiconductors	Product specification
Car radio integrated signal processor	TEF6894H

1.6Tone/volume part

∙Input selector for four inputs:

–Two external stereo inputs (CD and TAPE)

–One mono input (PHONE)

–One internal stereo input (AM or FM).

∙Integrated tone control and audio filters without external components

∙Volume control from +20 to −79 dB in 1 dB steps; programmable 20 dB loudness control included

∙Programmable loudness control with bass boost or as bass and treble boost

∙Treble control from −14 to +14 dB in 2 dB steps

∙Bass control from −14 to +14 dB in 2 dB steps with selectable characteristics

∙Good undistorted performance for any step size, including mute

∙Audio Step Interpolation (ASI) available for the following audio controls:

2 GENERAL DESCRIPTION

The TEF6894H is a monolithic BiMOS integrated circuit comprising the stereo decoder function, weak signal processing and ignition noise blanking facility for AM and FM combined with input selector and tone/volume control for AM and FM car radio applications. The device operates with a supply voltage of 8 to 9 V.

–Mute

–Loudness

–Volume/balance

–Bass

–Fader.

∙ASI also realizes Alternative Frequency (AF) mute for inaudible RDS update

∙Integrated beep generator

∙Navigation (NAV) input

∙Output mixer circuit for beep or NAV signal at output stages.

3 ORDERING INFORMATION

TYPE		PACKAGE
NUMBER	NAME	DESCRIPTION	VERSION
TEF6894H	QFP44	plastic quad flat package; 44 leads (lead length 1.3 mm);	SOT307-2
		body 10 × 10 × 1.75 mm

2003 Oct 21

4

Philips Semiconductors				Product specification
Car radio integrated signal processor				TEF6894H
4 QUICK REFERENCE DATA
SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
VCC	supply voltage		8.0	8.5	9.0	V
ICC	supply current	normal mode	−	24	−	mA
		standby	−	15	−	mA
Stereo decoder path
αcs	channel separation	fFMMPX = 1 kHz	40	−	−	dB
S/N	signal-to-noise ratio	fFMMPX = 20 Hz to 15 kHz	75	−	−	dB
THD	total harmonic distortion	FM mode; fFMMPX = 1 kHz	−	−	0.3	%
Tone/volume control
Vi(max)(rms)	maximum input voltage level at	THD = 0.1%; Gvol = −6 dB	2	−	−	V
	pins TAPEL, TAPER, CDL, CDR,
	CDCM, PHONE and PHCM
	(RMS value)
Vi(NAV)(max)(rms)	maximum input voltage level at	THD = 1%; fNAV = 1 kHz	0.3	−	−	V
	pin NAV (RMS value)
THD	total harmonic distortion	TAPE and CD inputs;	−	0.01	0.1	%
		faudio = 20 Hz to 20 kHz;
		Vi = 1 V (RMS)
Gvol	volume/balance gain control	maximum setting	−	20	−	dB
		minimum setting	−	−59	−	dB
Gstep(vol)	step resolution gain (volume)		−	1	−	dB
Gloudness	loudness gain control	floudness(low) = 50 Hz; high boost on
		maximum setting; 1 kHz tone	−	0	−	dB
		minimum setting; 1 kHz tone	−	−20	−	dB
Gtreble	treble gain control	maximum setting	−	14	−	dB
		minimum setting	−	−14	−	dB
Gstep(treble)	step resolution gain (treble)		−	2	−	dB
Gbass	bass gain control	maximum setting; symmetrical boost	−	14	−	dB
		minimum setting; asymmetrical cut	−	−14	−	dB
Gstep(bass)	step resolution gain (bass)		−	2	−	dB

2003 Oct 21

5

_

21 Oct 2003

6

CDL

CDR

CDCM

TAPEL

TAPER

PHONE

PHCM

FMMPX

AM

MPXRDS

LEVEL

SCLG

SDAG

AFSAMP

AFHOLD

FREF

22

20

21

24

23

25

26

5

7

6

1

3

4

10

9

11

input select

0 to −20 dB

vol: +20 to −59 dB

+14 to −14 dB

+14 to −14 dB

front/rear

mute:

mix:

low f: 50/100 Hz

bal: L/R, 0 to −79 dB

f: 8 to 15 kHz

f: 60 to 120 Hz

0 to −59 dB

LF, RF,

LF, RF,

high boost

mute

shelve/band-pass

LR, RR

LR, RR

+

+

27

LFOUT

−

VOLUME/

TREBLE

BASS

FRONT/

28

RFOUT

+

INPUT

LOUDNESS

BALANCE/

REAR

MUTE

MIX

29

+

MUTE

asi

FADER

LROUT

30

SELECT

asi

asi

asi

asi

RROUT

+

on/off

AUDIO STEP INTERPOLATION (asi)

level/off

−

amfm-

afu-

32

+

pitch

NAV

softmute

mute

+

asi time

asi active

BEEP

roll-off correction

stereo adjust

fm/am

f: 1.5 to 15 kHz/wide

50/75 µs

MPX

PILOT

STEREO

CANCEL

NOISE

HIGH

DECODER

DE-EMPHASIS

19 kHz

38 kHz

BLANKER

CUT

level

fmsnc

16

PILOT/

stereo

amnb

fmnb

amfmhcc

standby

VCC

17

REFERENCE

AGND

fref

PLL

57 kHz

SUPPLY

18

Vref

CREF

Iref

41

NOISE

PULSE

amnb

DGND

DETECT

TIMER

44

addr

ADDR

USN

TEF6894H

nb sensitivity

I2C-BUS

INTERFACE

43

read

SCL

NOISE

PULSE

fmnb

42

level

DETECT

TIMER

write

SDA

detection timings

snc start, slope

autogate

and control

hcc start, slope

usn

sm start, slope

sclg

DETECT

usn

fmsnc

sclg

sensitivity

MULTIPATH/

SNC

WEAK SIGNAL

HCC

amfm-

sdag

sdag

wam

DETECTION

hcc

WAM

DETECT

wam

AND LOGIC

SM

amfm-

sensitivity

softmute

reset/hold

hold

afus

fref

				afumute	pagewidth
		8, 12, 13, 14, 15, 19, 31, 33
		34, 35, 36, 37, 38, 39, 40			full
i.c.					handbook,

Fig.1 Block diagram.

2

GND

MHC422

DIAGRAM BLOCK 5

processor signal integrated radio Car

TEF6894H

Semiconductors Philips

specification Product

Philips Semiconductors			Product specification
Car radio integrated signal processor			TEF6894H
6 PINNING
SYMBOL	PIN	DESCRIPTION
LEVEL	1	level detector input
GND	2	ground
SCLG	3	gated I2C-bus clock port
SDAG	4	gated I2C-bus data port
FMMPX	5	FM-MPX input for audio processing
MPXRDS	6	FM-MPX input for weak signal processing and noise blanker
AM	7	AM audio input
i.c.	8	internally connected
AFHOLD	9	FM weak signal processing hold input
AFSAMP	10	trigger signal input for quality measurement
FREF	11	reference frequency input 75.4 kHz
i.c.	12	internally connected
i.c.	13	internally connected
i.c.	14	internally connected
i.c.	15	internally connected
VCC	16	supply voltage
AGND	17	analog ground
CREF	18	reference voltage capacitor
i.c.	19	internally connected
CDR	20	CD right input
CDCM	21	CD common input
CDL	22	CD left input
TAPER	23	tape right input
TAPEL	24	tape left input
PHONE	25	phone input
PHCM	26	phone common input
LFOUT	27	left front output
RFOUT	28	right front output
LROUT	29	left rear output
RROUT	30	right rear output
i.c.	31	internally connected
NAV	32	audio input for navigation voice signal
i.c.	33	internally connected
i.c.	34	internally connected
i.c.	35	internally connected
i.c.	36	internally connected
i.c.	37	internally connected
i.c.	38	internally connected
i.c.	39	internally connected
i.c.	40	internally connected

2003 Oct 21

7

Philips Semiconductors			Product specification
Car radio integrated signal processor			TEF6894H
SYMBOL	PIN		DESCRIPTION
DGND	41	digital ground
SDA	42	I2C-bus data input or output
SCL	43	I2C-bus clock input
ADDR	44	address select input

ADDR		SCL		SDA		DGND		i.c.		i.c.		i.c.		i.c.		i.c.		i.c.		i.c.
44		43		42		41		40		39		38		37		36		35		34

LEVEL 1

GND 2

SCLG 3

SDAG 4

FMMPX 5

MPXRDS

6

TEF6894H

AM 7

i.c. 8

AFHOLD 9

AFSAMP 10

FREF 11

12		13		14		15		16		17		18		19		20		21		22
i.c.		i.c.		i.c.		i.c.		CC		AGND		CREF		i.c.		CDR		CDCM		CDL
								V

33 i.c.

32 NAV

31 i.c.

30 RROUT

29 LROUT

28 RFOUT

27 LFOUT

26 PHCM

25 PHONE

24 TAPEL

23 TAPER

MHC421

Fig.2 Pin configuration.

7 FUNCTIONAL DESCRIPTION

7.1Stereo decoder

The FMMPX input is the input for the MPX signal from the tuner. The input gain can be selected in three settings to match the input to the RF front-end circuit. A fourth setting is used for weather band mode, which may require a gain of 23.5 dB.

A low-pass filter provides the necessary signal delay for FM noise blanking and suppression of high frequency interferences into the stereo decoder input. The output signal of this filter is fed to the roll-off correction circuit. This circuit compensates the frequency response caused by the low-pass characteristic of the tuner circuit with its

IF filters. The roll-off correction circuit is adjustable in four

settings to compensate different frequency responses of the tuner part.

The MPX signal is decoded in the stereo decoder part. A PLL is used for the regeneration of the 38 kHz subcarrier. The fully integrated oscillator is adjusted by a

digital auxiliary PLL into the capture range of the main PLL. The auxiliary PLL needs an external reference frequency (75.4 kHz) which is provided by the tuner ICs of the NICE family (TEA684x). The required 19 and 38 kHz signals are generated by division of the oscillator output signal in a logic circuit. The 19 kHz quadrature phase signal is fed to the 19 kHz phase detector, where it is compared with the incoming pilot tone. The DC output signal of the phase detector controls the oscillator (PLL).

2003 Oct 21

8

Philips Semiconductors	Product specification
Car radio integrated signal processor	TEF6894H

The pilot detector is driven by an internally generated in-phase 19 kHz signal. Its pilot dependent voltage activates the stereo indicator bit and sets the stereo decoder to stereo mode. The same voltage is used to control the amplitude of an anti-phase internally generated 19 kHz signal. In the pilot canceller, the pilot tone is compensated by this anti-phase 19 kHz signal.

The signal is then decoded in the decoder part. The side signal is demodulated and combined with the main signal to the left and right audio channels. A fine adjustment of the roll-off compensation is done by adjusting the gain of the L-R signal in 16 steps. A smooth mono to stereo takeover is achieved by controlling the efficiency of the matrix by the FMSNC signal from the weak signal processing block.

7.2FM and AM noise blanker

MPXRDS signal can be adjusted in four steps, the triggering from the LEVEL signal in three steps.

7.4.2AM NOISE DETECTOR

The trigger pulse for the AM noise blanker is derived from the AM audio signal. The noise spikes are detected by a slew rate detector, which detects excessive slew rates which do not occur in normal audio signals. The sensitivity of the AM noise blanker can be adjusted in four steps.

7.5Multipath/weak signal processing

The multipath (MPH)/weak signal processing block detects quality degradations in the incoming FM signal and controls the processing of the audio signal accordingly. There are three different quality criteria:

∙ The average value of the level voltage

The FM/AM switch selects the output signal of the stereo decoder (FM mode) or the signal from the AM input for the noise blanker block. In FM mode the noise blanker operates as a sample and hold circuit, while in AM mode it mutes the audio signal during the interference pulse. The blanking pulse which triggers the noise blanker is generated in the noise detector block.

7.3High cut control and de-emphasis

The High Cut Control (HCC) part is a low-pass filter circuit with eight different static roll-off response curves. The cut-off frequencies of these filter curves can be selected by I2C-bus to match different application requirements. The HCC circuit also provides a dynamic control of the filter response. This function is controlled by the AMFMHCC signal from the weak signal processing.

The signal passes the de-emphasis block with two de-emphasis values (50 and 75 μs), which can be selected via I2C-bus, and is fed to the input selector.

7.4Noise detector

7.4.1FM NOISE DETECTOR

The trigger signal for the FM noise detector is derived from the MPXRDS input signal and the LEVEL signal. In the MPXRDS path a four pole high-pass filter (100 kHz) separates the noise spikes from the wanted MPX signal. Another detector circuit triggers on noise spikes on the level voltage. The signals of both detectors are combined to achieve a reliable trigger signal for the noise blanker. AGC circuits in the detector part control the gain depending on the average noise in the signals to prevent false triggering. The sensitivity of the triggering from the

∙The AM components on the level voltage [Wideband AM (WAM)]

∙The high frequency components in the MPX signal [Ultrasonic Noise (USN)].

The level voltage is converted to a digital value by an 8-bit analog-to-digital converter. A digital filter circuit (WAM filter) derives the wideband AM components from the level signal. The high frequency components in the MPX signals are measured with an analog-to-digital converter (USN ADC) at the output of the 100 kHz high-pass filter in the MPXRDS path.

The values of these three signals are externally available via the I2C-bus.

In the weak signal processing block the three digital signals are combined in a specific way and used for the generation of control signals for soft mute, stereo blend (stereo noise control, FMSNC) and high cut control (AMFMHCC).

The sensitivities of the detector circuits (WAM and USN) are adjustable via the I2C-bus.

Also the start values and the slopes of the control functions soft mute, stereo blend and high cut control can be set via the I2C-bus.

Soft mute, stereo blend and HCC are set on hold during the AF updating (quality check of alternative frequency) to avoid an influence of the tuning procedure on the weak signal processing conditions.

In AM mode the soft mute and high cut control are available too, the weak signal block is controlled by the average value of the level voltage.

2003 Oct 21

9

Philips Semiconductors	Product specification
Car radio integrated signal processor	TEF6894H

7.6Tone/volume control

The tone/volume control part consists of the following stages:

∙Input selector

∙Loudness control

∙Volume/balance control with muting

∙Treble control

∙Bass control

∙Fader and output mute

∙Beep generator

∙NAV input

∙Output mixer.

The settings of all stages are controlled via the I2C-bus.

The stages input selector, loudness, volume/balance, bass, and fader/output mute include the Audio Step Interpolation (ASI) function. This minimizes pops by smoothing the transitions in the audio signal during the switching of the controls. The transition time of the ASI function is programmable by I2C-bus in four steps.

7.6.1INPUT SELECTOR

The input selector selects one of four input sources:

∙Two external stereo inputs (CD and TAPE)

∙One external mono input (PHONE)

∙One internal stereo input (AM/FM).

7.6.2LOUDNESS

The output of the input selector is fed into the loudness circuit. Four different loudness curves can be selected via the I2C-bus. The control range is between 0 and −20 dB with a step size of 1 dB; see Figs 16 to 19.

7.6.3VOLUME/BALANCE

The volume/balance control is used for volume setting and also for balance adjustment. The control range of the volume/balance control is between +20 and −59 dB in steps of 1 dB.

The combination of loudness and volume/balance realizes an overall control range of +20 to −79 dB.

7.6.4TREBLE

The signal is then fed to the treble control stage. The control range is between +14 and −14 dB in steps of 2 dB. Figure 20 shows the control characteristic. Four different filter frequencies can be selected.

7.6.5BASS

The characteristic of the bass attenuation curves can be set to shelve or band-pass. Four different frequencies can be selected as centre frequency of the band-pass curve. Figures 21 and 22 show the bass curves with a band-pass filter frequency of 60 Hz. The control range is between +14 and −14 dB in steps of 2 dB.

7.6.6FADER/MUTE

The four fader/mute blocks are located at the end of the tone/volume chain. The control range of these attenuators is 0 to −59 dB. The step size is:

∙1 dB between 0 and −15 dB

∙2.5 dB between −15 and −45 dB

∙3 dB between −45 and −51 dB

∙4 dB between −51 and −59 dB.

7.6.7BEEP GENERATOR AND NAV INPUT WITH OUTPUT

MIXER

The output mixer circuit can add an additional audio signal to any of the four outputs together with the main signal or instead of the main signal.

The additional signal can be generated internally by the beep generator with four different audio frequencies or applied to the NAV input, for instance a navigation voice signal.

2003 Oct 21

10

Philips Semiconductors				Product specification
Car radio integrated signal processor				TEF6894H
8 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL	PARAMETER	CONDITIONS	MIN.	MAX.	UNIT
VCC	supply voltage		−0.3	+10	V
Vi	input voltage for any pin		−0.3	VCC + 0.3	V
Tstg	storage temperature		−65	+150	°C
Tamb	ambient temperature		−40	+85	°C
Vesd	electrostatic discharge voltage	note 1	−200	+200	V
		note 2	−2000	+2000	V

Notes

1.Machine model (R = 0 Ω, C = 200 pF).

2.Human body model (R = 1.5 kΩ, C = 100 pF).

9	THERMAL CHARACTERISTICS
	SYMBOL	PARAMETER	CONDITIONS	VALUE	UNIT
Rth(j-a)		thermal resistance from junction to ambient	in free air	61	K/W
10	CHARACTERISTICS

FM part: fFMMPX = 1 kHz at VFMMPX = 767 mV (RMS); pilot off (100% FM). AM part: fAM = 1 kHz at

VAM = 967 mV (RMS) (100% AM). Treble: 10 kHz filter frequency. Bass: 60 Hz filter frequency. Loudness: 50 Hz filter frequency; treble loudness on. VCC = 8.5 V; Tamb = 25 °C; see Fig.23; unless otherwise specified.

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
VCC	supply voltage		8.0	8.5	9.0	V
ICC	supply current	normal mode	−	24	−	mA
		standby	−	15	−	mA
Logic pins
VIH	HIGH-level input voltage	pins SDA, SCL, ADDR and SDAG	1.75	−	5.5	V
		pins AFHOLD and AFSAMP	1.75	−	5.5	V
VIL	LOW-level input voltage	pins SDA, SCL, ADDR and SDAG	−0.2	−	+1.0	V
		pins AFHOLD and AFSAMP	−0.2	−	+1.0	V
VOL	LOW-level output voltage	pin SCLG; IOL = 3 mA; note 1	−	−	0.4	V
		pin SDA; IOL = 3 mA	−	−	0.4	V
Stereo decoder and AM path
Vo(FM)(rms)	FM mono output voltage	fFMMPX = 1 kHz; 91% FM modulation	750	950	1200	mV
	(RMS value) on	without pilot (VFMMPX = 698 mV)
	pins LFOUT and RFOUT
Vo(AM)(rms)	AM output voltage	fAM = 1 kHz; VAM = 870 mV;	800	1080	1360	mV
	(RMS value) on	90% AM modulation
	pins LFOUT and RFOUT

2003 Oct 21

11

Philips Semiconductors				Product specification
Car radio integrated signal processor					TEF6894H
SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.		MAX.	UNIT
Gi	input gain on	see Table 36
	pins FMMPX, MPXRDS	ING[1:0] = 00; all inputs	−	0		−	dB
	and AM	ING[1:0] = 01; all inputs	−	3		−	dB
		ING[1:0] = 10; all inputs	−	6		−	dB
		ING[1:0] = 11; FMMPX	−	23.5		−	dB
		ING[1:0] = 11; MPXRDS and AM	−	0		−	dB
αcs	channel separation	fFMMPX = 1 kHz	40	−		−	dB
gc(L-R)	roll-off correction for	see Table 20; measure 1 kHz level
	coarse adjustment of	for L − R modulation; compare to
	separation	1 kHz level for L + R modulation
		CSR[1:0] = 00	−	0		−	dB
		CSR[1:0] = 01	−	0.4		−	dB
		CSR[1:0] = 10	−	0.8		−	dB
		CSR[1:0] = 11	−	1.2		−	dB
gf(L-R)	stereo adjust for fine	see Table 21; measure 1 kHz level
	adjustment of separation	for L − R modulation; compare to
		1 kHz level for L + R modulation
		CSA[3:0] = 0000	−	0		−	dB
		CSA[3:0] = 0001	−	0.2		−	dB
		:	−	:		−	dB
		CSA[3:0] = 1110	−	2.8		−	dB
		CSA[3:0] = 1111	−	3.0		−	dB
S/N	signal-to-noise ratio	fFMMPX = 20 Hz to 15 kHz;	75	−		−	dB
		referenced to 1 kHz at 91% FM
		modulation; DEMP = 1
		(τde-em = 50 μs)
THD	total harmonic distortion	FM mode
		fFMMPX = 1 kHz	−	−		0.3	%
		VFMMPX = 50%; L; pilot on	−	−		0.3	%
		VFMMPX = 50%; R; pilot on	−	−		0.3	%
Vo(bal)	mono channel balance	FM mode	−1	−		+1	dB
	VoL
	---------
	VoR
α19	pilot signal suppression	9% pilot; fpilot = 19 kHz; referenced	40	50		−	dB
		to 1 kHz at 91% FM modulation;
		DEMP = 1 (τde-em = 50 μs)
α	subcarrier suppression	modulation off; referenced to 1 kHz
		at 91% FM modulation
		fsc = 38 kHz	35	50		−	dB
		fsc = 57 kHz	40	−		−	dB
		fsc = 76 kHz	50	60		−	dB
PSRR	power supply ripple	FM mode; fripple = 100 Hz;	24	−		−	dB
	rejection	VCC(AC) = Vripple = 100 mV (RMS)

2003 Oct 21

12

Philips Semiconductors				Product specification
Car radio integrated signal processor					TEF6894H
SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.		MAX.	UNIT
Vout	frequency response	FM mode
		fFMMPX = 20 Hz	−0.5	−		+0.5	dB
		fFMMPX = 15 kHz	−0.5	−		+0.5	dB
fcut-off(de-em)	cut-off frequency of	−3 dB point; see Fig.15
	de-emphasis filter	DEMP = 1 (τde-em = 50 μs)	−	3.18		−	kHz
		DEMP = 0 (τde-em = 75 μs)	−	2.12		−	kHz
mi(pilot)(rms)	pilot threshold modulation	stereo
	for automatic switching by	on	−	4.0		5.5	%
	pilot input voltage	off	1.3	2.7		−	%
	(RMS value)
hyspilot	hysteresis of pilot		−	2		−	dB
	threshold voltage
Vref(min)	minimum reference input		−	−		30	mV
	voltage
fref	reference frequency for		75361	75368		75375	Hz
	stereo PLL
Noise blanker
FM PART
tsup(min)	minimum suppression		−	15		−	μs
	time
VMPXRDS(M)	noise blanker sensitivity	see Table 37; tpulse = 10 μs;
	at MPXRDS input	repetition frequency f = 300 Hz
	(peak value of noise	NBS[1:0] = 00	−	90		−	mV
	pulses)	NBS[1:0] = 01	−	150		−	mV
		NBS[1:0] = 10	−	210		−	mV
		NBS[1:0] = 11	−	270		−	mV
VLEVEL(M)	noise blanker sensitivity	see Table 40; tpulse = 10 μs;
	at LEVEL input	repetition frequency f = 300 Hz
	(peak value of noise	NBL[1:0] = 00	−	9		−	mV
	pulses)	NBL[1:0] = 01	−	18		−	mV
		NBL[1:0] = 10	−	28		−	mV
AM PART
tsup(min)	minimum suppression		−	200		−	μs
	time
MAM	noise blanker sensitivity	see Table 37; faudio = 2 kHz
		NBS[1:0] = 00	−	110		−	%
		NBS[1:0] = 01	−	140		−	%
		NBS[1:0] = 10	−	175		−	%
		NBS[1:0] = 11	−	220		−	%

2003 Oct 21

13

Philips Semiconductors				Product specification
Car radio integrated signal processor					TEF6894H
SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.		MAX.	UNIT
Weak signal processing
DETECTORS
Veq(USN)	USN sensitivity equivalent	see Fig.5; fMPXRDS = 150 kHz;
	level voltage	VMPXRDS = 250 mV (RMS);
		HCMP = 1; note 2
		USS[1:0] = 00	−	2.5		−	V
		USS[1:0] = 01	−	2		−	V
		USS[1:0] = 10	−	1.5		−	V
		USS[1:0] = 11	−	0.5		−	V
Veq(WAM)	WAM sensitivity	see Fig.6; VLEVEL = 200 mV (p-p) at
	equivalent level voltage	f = 21 kHz on the level voltage;
		HCMP = 1; note 2
		WAS[1:0] = 00	−	2.5		−	V
		WAS[1:0] = 01	−	2		−	V
		WAS[1:0] = 10	−	1.5		−	V
		WAS[1:0] = 11	−	0.5		−	V
tLEVEL(attack)	level detector attack time	see Table 24; LETF = 0; SEAR = 0
	(soft mute and HCC)	LET[1:0] = 00	−	3		−	s
		LET[1:0] = 01	−	3		−	s
		LET[1:0] = 10	−	1.5		−	s
		LET[1:0] = 11	−	0.5		−	s
		see Table 24; LETF = 1; SEAR = 0
		LET[1:0] = 00	−	0.5		−	s
		LET[1:0] = 01	−	0.17		−	s
		LET[1:0] = 10	−	0.06		−	s
		LET[1:0] = 11	−	0.06		−	s
		search mode; SEAR = 1	−	60		−	ms
tLEVEL(decay)	level detector decay time	see Table 24; LETF = 0; SEAR = 0
	(soft mute and HCC)	LET[1:0] = 00	−	3		−	s
		LET[1:0] = 01	−	6		−	s
		LET[1:0] = 10	−	1.5		−	s
		LET[1:0] = 11	−	1.5		−	s
		see Table 24; LETF = 1; SEAR = 0
		LET[1:0] = 00	−	0.5		−	s
		LET[1:0] = 01	−	0.5		−	s
		LET[1:0] = 10	−	0.17		−	s
		LET[1:0] = 11	−	0.06		−	s
		search mode; SEAR = 1	−	60		−	ms

2003 Oct 21

14

Philips Semiconductors				Product specification
Car radio integrated signal processor					TEF6894H
SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.		MAX.	UNIT
tMPH(attack)	multipath detector attack	see Table 25; SEAR = 0
	time (SNC)	MPT[1:0] = 00	−	0.5		−	s
		MPT[1:0] = 01	−	0.5		−	s
		MPT[1:0] = 10	−	0.5		−	s
		MPT[1:0] = 11	−	0.25		−	s
		search mode; SEAR = 1	−	60		−	ms
tMPH(decay)	multipath detector decay	see Table 25; SEAR = 0
	time (SNC)	MPT[1:0] = 00	−	12		−	s
		MPT[1:0] = 01	−	24		−	s
		MPT[1:0] = 10	−	6		−	s
		MPT[1:0] = 11	−	6		−	s
		search mode; SEAR = 1	−	60		−	ms
tUSN(attack)	USN detector attack time		−	1		−	ms
	(soft mute and SNC)
tUSN(decay)	USN detector decay time		−	1		−	ms
	(soft mute and SNC)
USS	USN detector	USN sensitivity setting (USS) versus
	desensitization	level voltage (USN sensitivity setting
		is automatically reduced as level
		voltage decreases)
		VLEVEL > 1.25 V	−	−		3	−
		1.25 V > VLEVEL > 1.125 V	−	−		2	−
		1.125 V > VLEVEL > 1.0 V	−	−		1	−
		1.0 V > VLEVEL	−	−		0	−
tWAM(attack)	WAM detector attack time		−	1		−	ms
	(SNC)
tWAM(decay)	WAM detector decay time		−	1		−	ms
	(SNC)
tpeak(USN)(attack)	peak detector for USN		−	1		−	ms
	attack time for read-out
	via I2C-bus
tpeak(USN)(decay)	peak detector for USN		−	10		−	ms
	decay time for read-out
	via I2C-bus
tpeak(WAM)(attack)	peak detector for WAM		−	1		−	ms
	attack time for read-out
	via I2C-bus
tpeak(WAM)(decay)	peak detector for WAM		−	10		−	ms
	decay time for read-out
	via I2C-bus

2003 Oct 21

15

Philips Semiconductors				Product specification
Car radio integrated signal processor					TEF6894H
SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.		MAX.	UNIT
CONTROL FUNCTIONS
Vstart(mute)	soft mute start voltage	see Fig.12; voltage at pin LEVEL
		that causes αmute = 3 dB;
		MSL[1:0] = 11
		MST[2:0] = 000	−	0.75		−	V
		MST[2:0] = 001	−	0.88		−	V
		MST[2:0] = 010	−	1		−	V
		MST[2:0] = 011	−	1.12		−	V
		MST[2:0] = 100	−	1.25		−	V
		MST[2:0] = 101	−	1.5		−	V
		MST[2:0] = 110	−	1.75		−	V
		MST[2:0] = 111	−	2		−	V
Cmute	soft mute slope	see Fig.13; slope of soft mute
	αmute	attenuation with respect to level
	Cmute = -----------------	voltage; MST[2:0] = 000
	Veq	MSL[1:0] = 00	−	8		−	dB/V
		MSL[1:0] = 01	−	16		−	dB/V
		MSL[1:0] = 10	−	24		−	dB/V
		MSL[1:0] = 11	−	32		−	dB/V
αmute(max)	maximum soft mute	see Fig.14; fMPXRDS = 150 kHz;
	attenuation by USN	VMPXRDS = 0.6 V (RMS);
		USS[1:0] = 11
		UMD[1:0] = 00	−	3		−	dB
		UMD[1:0] = 01	−	6		−	dB
		UMD[1:0] = 10	−	9		−	dB
		UMD[1:0] = 11	−	12		−	dB
Vstart(SNC)	SNC stereo blend start	see Fig.7; voltage at pin LEVEL that
	voltage	causes channel separation = 10 dB;
		SSL[1:0] = 10
		SST[3:0] = 0000	−	1.5		−	V
		:	−	:		−	V
		SST[3:0] = 1000	−	2.0		−	V
		:	−	:		−	V
		SST[3:0] = 1111	−	2.45		−	V
CSNC	SNC slope	see Fig.8; slope of channel
	αcs	separation between
	CSNC = ------------	30 dB and 10 dB with respect to
	Veq	level voltage; SST[3:0] = 1010
		SSL[1:0] = 00	−	38		−	dB/V
		SSL[1:0] = 01	−	51		−	dB/V
		SSL[1:0] = 10	−	63		−	dB/V
		SSL[1:0] = 11	−	72		−	dB/V

2003 Oct 21

16

Philips Semiconductors				Product specification
Car radio integrated signal processor				TEF6894H
SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
Vstart(HCC)	HCC start voltage	see Fig.9; faudio = 10 kHz; voltage at
		pin LEVEL that causes αHCC = 3 dB;
		HSL[1:0] = 10
		HST[2:0] = 000	−	1.17	−	V
		HST[2:0] = 001	−	1.42	−	V
		HST[2:0] = 010	−	1.67	−	V
		HST[2:0] = 011	−	1.92	−	V
		HST[2:0] = 100	−	2.17	−	V
		HST[2:0] = 101	−	2.67	−	V
		HST[2:0] = 110	−	3.17	−	V
		HST[2:0] = 111	−	3.67	−	V
CHCC	HCC slope	see Fig.10; faudio = 10 kHz;
	αHCC	HST[2:0] = 010
	CHCC = ----------------	HSL[1:0] = 00	−	9	−	dB/V
	Veq
		HSL[1:0] = 01	−	11	−	dB/V
		HSL[1:0] = 10	−	14	−	dB/V
		HSL[1:0] = 11	−	18	−	dB/V
αHCC(max)	maximum HCC	see Fig.10; faudio = 10 kHz
	attenuation	HCSF = 1	−	10	−	dB
		HCSF = 0	−	14	−	dB
fcut-off	cut-off frequency of fixed	see Table 31; −3 dB point (first order
	HCC	filter)
		HCF[2:0] = 000	−	1.5	−	kHz
		HCF[2:0] = 001	−	2.2	−	kHz
		HCF[2:0] = 010	−	3.3	−	kHz
		HCF[2:0] = 011	−	4.7	−	kHz
		HCF[2:0] = 100	−	6.8	−	kHz
		HCF[2:0] = 101	−	10	−	kHz
		HCF[2:0] = 110	−	wide	−	−
		HCF[2:0] = 111	−	unlimited	−	−
Analog-to-digital converters for I2C-bus
LEVEL ANALOG-TO-DIGITAL CONVERTER (8-BIT); see Fig.4
VLEVEL(min)	lower voltage limit of		−	0.25	−	V
	conversion range
VLEVEL(max)	upper voltage limit of		−	4.25	−	V
	conversion range
VLEVEL	bit resolution voltage		−	15.7	−	mV

2003 Oct 21

17