INTEGRATED CIRCUITS
DATA SHEET
TEA1081
Supply circuit with power-down for telephone set peripherals
Product specification |
September 1994 |
Supersedes data of February 1988 |
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File under Integrated Circuits, IC03 |
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Philips Semiconductors
Philips Semiconductors Product specification
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Supply circuit with power-down for |
TEA1081 |
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telephone set peripherals |
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FEATURES |
GENERAL DESCRIPTION |
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∙ |
High input impedance for audio signals |
The TEA1081 is an integrated circuit for use in |
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∙ |
Low DC series resistance |
line-powered telephone sets to supply peripheral circuits |
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for extended dialling and/or loudspeaker facilities. |
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∙ |
High output current |
The IC uses a part of the surplus line current normally |
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∙ |
Large audio signal handling capability |
drawn by the voltage regulator of the speech/transmission |
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Low distortion |
circuit. A power-down function isolates the IC from its load |
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and reduces the input current. |
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∙Two modes of operation:
–output voltage that follows the DC line voltage
–regulated output voltage
∙Power-down input
∙Low number of external components.
QUICK REFERENCE DATA
SYMBOL |
PARAMETER |
CONDITIONS |
MIN. |
TYP. |
MAX. |
UNIT |
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VLN |
operating DC line voltage |
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2.5 |
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12.0 |
V |
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VO |
DC output voltage |
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2.0 |
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10.0 |
V |
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VLN-O |
voltage drop from line to output |
IO = 0 mA |
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0.5 |
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V |
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RS |
internal series resistance |
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20 |
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Ω |
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IO |
output current (pin 7) |
VLN = 4 V |
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TEA1081 |
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30 |
mA |
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TEA1081T |
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20 |
mA |
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VLN(rms) |
AC line voltage (RMS value) |
VLN = 4 V; IO = 15 mA; |
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1.5 |
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V |
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THD = 2% |
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IINT |
internal supply current |
VLN = 4 V; IO = 0 mA; |
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0.8 |
1.4 |
mA |
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PD = LOW; VSP = VO |
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Tamb |
operating ambient temperature |
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−25 |
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+70 |
°C |
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ORDERING INFORMATION |
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TYPE NUMBER |
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PACKAGE |
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NAME |
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DESCRIPTION |
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VERSION |
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TEA1081 |
DIP8 |
plastic dual in-line package; 8 leads (300 mil) |
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SOT97-1 |
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TEA1081T |
SO8 |
plastic small outline package; 8 leads; body width 3.9 mm |
SOT96-1 |
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September 1994 |
2 |
Philips Semiconductors |
Product specification |
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Supply circuit with power-down for
TEA1081
telephone set peripherals
BLOCK DIAGRAM
handbook, full pagewidth |
RS |
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1 |
TR1 |
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7 |
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LN |
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QS |
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0.5 V |
TR2 |
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A2 |
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5 |
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A1 |
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8 |
IF |
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POWER- |
SP |
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4 |
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DOWN |
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PD |
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3 |
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AD |
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REFERENCE |
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1/2 V O |
CURRENT |
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6 |
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A3 |
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VA |
2 |
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VN |
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TEA1081 |
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MLC166 |
Fig.1 Block diagram.
PINNING |
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SYMBOL |
PIN |
DESCRIPTION |
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LN |
1 |
positive line terminal |
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page |
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LN |
1 |
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8 |
SP |
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VN |
2 |
negative line terminal |
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VN |
2 |
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7 |
QS |
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AD |
3 |
amplifier decoupling |
TEA1081 |
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AD |
3 |
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6 |
VA |
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PD |
4 |
power-down input |
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IF |
5 |
low-pass filter input |
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PD |
4 |
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5 |
IF |
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VA |
6 |
output voltage adjustment |
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MLC167 |
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QS |
7 |
power supply output |
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Fig.2 |
Pin configuration. |
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SP |
8 |
supply input; power-down circuit |
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September 1994 |
3 |
Philips Semiconductors |
Product specification |
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|
Supply circuit with power-down for
TEA1081
telephone set peripherals
FUNCTIONAL DESCRIPTION
The TEA1081 is a supply interface between telephone line and peripheral devices in the telephone set. The high input impedance of the circuit allows direct connection to the telephone line (via a diode bridge). An inductor function is obtained by amplifier A1, resistor RS (see Fig.1) and an external low-pass RC filter.
Under the control of amplifier A2, transistor TR1 supplies peripheral devices and transistor TR2 minimizes line signal distortion by momentarily diverting input current to ground whenever the instantaneous value of the line voltage drops below the output voltage.
Internal circuits are biased by a temperature and line voltage compensated reference current source.
The power-down circuit isolates the supply circuit from external circuitry.
Line terminals: LN and VN (pins 1 and 2)
The input terminals LN and VN can be connected directly to the line. The minimum DC line voltage required at the input is expressed by formula (1); see also Table 1.
VLN = I1 × RS + VLNmin + VLN ( P) ( V) |
(1) |
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Table 1 Explanation of formula (1). |
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SYMBOL |
DESCRIPTION |
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I1 |
input current |
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RS |
internal series resistance |
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VLNmin |
minimum instantaneous line voltage |
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(1.4 V at IO = 5 mA) |
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VLN(P) |
required peak level of AC line voltage |
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The internal current (IINT) at IO = 0 mA is typically 0.8 mA at VLN = 4 V and reaches a maximum of 1.4 mA at
VLN = 12 V.
Supply terminals: QS and VA (pins 7 and 6)
Peripheral devices are supplied from QS (pin 7). Two modes of output voltage regulation are available.
OUTPUT VOLTAGE FOLLOWS LINE VOLTAGE (SEE FIG.3)
The TEA1081 operates in this mode when there is no external resistor (RV) between QS and VA (see Fig.6).
The output voltage follows the line voltage and is |
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expressed by formula (2); see also Table 2. |
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VO = VLN–( I1 × RS + 0.5) ( V) |
(2) |
Table 2 Explanation of formula (2).
SYMBOL |
DESCRIPTION |
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VLN |
line voltage |
I1 |
input current |
RS |
internal series resistance |
REGULATED OUTPUT VOLTAGE (SEE FIG.4)
The circuit operates in this mode when an external resistor (RV) is connected between QS and VA (see Fig.6).
The output voltage is held constant at VO = 2 × I6 × RV (V) as soon as the line voltage
VLN > (2 × I6 × RV + I1 × RS + 0.5) (V) The control current I6 is typically 20 μA.
10 |
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MLC168 |
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handbook, halfpage |
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VO |
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(V) |
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8 |
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(1) |
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6 |
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(2) |
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4 |
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(3) |
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2 |
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0 |
2 |
4 |
6 |
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10 |
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VLN (V) |
Application without RV.
(1)I1 = 5 mA.
(2)I1 = 20 mA.
(3)I1 = 30 mA; not valid for TEA1081T.
Fig.3 Output voltage as a function of line voltage.
September 1994 |
4 |
Philips Semiconductors |
Product specification |
|
|
Supply circuit with power-down for
TEA1081
telephone set peripherals
MLC169
6 handbook, halfpage
VO
(V)
4 |
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RV = 100 kΩ |
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(1) |
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(2) |
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75 kΩ |
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(3) |
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50 kΩ |
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2 |
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0 |
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0 |
2 |
4 |
6 |
8 |
10 |
VLN (V)
RV connected between QS and VA.
(1)I1 = 5 mA.
(2)I1 = 20 mA.
(3)I1 = 30 mA; not valid for TEA1081T.
Fig.4 Output voltage as a function of line voltage.
Input current at VLN(rms) = 1 V and without RV approximates to:
I1 = IINT + 2 × IO (mA)
The maximum supply current (within the specified output current limits) available for peripheral devices is shown by:
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ILINEmin –ILNmin –IINT |
IOmax = |
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2 |
Where:
ILINEmin is the minimum line current of the telephone set;
ILNmin is the specified minimum input current of the speech/transmission circuit.
Input low-pass filter: IF (pin 5)
The input impedance between LN and VN at audio frequencies is determined by the filter elements CL (between pins 1 and 5), RL (between pins 5 and 7) and the internal resistor RS (typical value 20 Ω).
At audio frequencies the TEA1081 behaves as an inductor of the value LI = CL × RL × RS (H). The typical value of LI at CL = 2.2 μF and RL = 100 kΩ is 4.4 H.
Amplifier decoupling: AD (pin 3)
Input and output currents I1 and IO (pins 1 and 7)
The maximum available current into pin 1 (I1) is determined by:
∙The minimum line current (ILINEmin) that is available for the telephone set
∙The specified minimum input current (ILNmin) for the speech/transmission circuit.
That is I1max = ILINEmin − ILNmin.
At VLN(rms) < 150 mV, the input current I1 is approximately: I1 = IINT + k × IO (mA)
Where:
IINT = internal supply current (0.8 mA at VLN = 4 V);
k = correction factor (k < 1.1 for the specified output current range).
With large line signals the instantaneous line voltage may drop below VO + 0.4 V. Normally (when VLN > VO + 0.4 V), instantaneous current flows from LN to QS (pin 1 to pin 7) to the output load.
When VLN < VO + 0.4 V, the instantaneous current is diverted to pin 2 to prevent distortion of the line signal.
To ensure stability, a 68 pF decoupling capacitor is required between AD (pin 3) and LN (pin 1).
If IOmin < 1.5 mA, a 47 pF capacitor has to be added between AD (pin 3) and VA (pin 6).
Power-down inputs: PD and SP (pins 4 and 8)
During pulse dialling or register recall, or if the input current to pin 1 is insufficient to maintain the output current, the supply to peripheral devices can be switched off by activating the PD input at pin 4. With PD = HIGH, the input current is reduced to 40 μA (typ.) at VLN = 4 V and the internal circuits are isolated from the load at QS (pin 7).
The power-down circuit is supplied via the SP input (pin 8).
SP can be wired to QS in conditions where VO > VSPmin during line interruptions. When VO < VSPmin, SP should be
wired to an external supply point (e.g. to VCC of the TEA1060 family circuit).
When power-down is not required, the PD and SP inputs can be left open-circuit.
September 1994 |
5 |
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