Philips TDA9964 User Manual

1. Description

2. Features

TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
Rev. 03 — 16 January 2001 Objective specification
The TDA9964 is a 12-bit analog-to-digital interface for CCD cameras. The device includes a correlated double sampling circuit, PGA, clamp loops and a low-power 12-bit ADC together with its reference voltage regulator.
The PGA gain and the ADC input clamp level are controlled via the serial interface. An additional DAC is provided for additional system controls; its output voltage range
is 1.0 V p-p, which is available at pin OFDOUT.
c
c

3. Applications

Correlated Double Sampling (CDS), Programmable Gain Amplifier (PGA), 12-bit
Analog-to-Digital Converter (ADC) and reference regulator included
Fully programmable via a 3-wire serial interface
Sampling frequency up to 30 MHz
PGA gain range of 24 dB (in steps of 0.1 dB)
Low power consumption of only 175 mW at 2.7 V
Power consumption in standby mode of 4.5 mW (typ.)
3.0 V operation and 2.5 to 3.6 V operation for the digital outputs
All digital inputs accept 5 V signals
Active control pulses polarity selectable via serial interface
8-bit DAC included for analog settings
TTL compatible inputs, CMOS compatible outputs.
Low-power, low-voltage CCD camera systems.
Philips Semiconductors
TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras

4. Quick reference data

Table 1: Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
CCA
V
CCD
V
CCO
I
CCA
I
CCD
I
CCO
ADC
res
V
i(CDS)(p-p)
f
pix(max)
f
pix(min)
DR
PGA
N
tot(rms)
E
in(rms)
P
tot
analog supply voltage 2.7 3.0 3.6 V digital supply voltage 2.7 3.0 3.6 V digital outputs supply voltage 2.5 2.7 3.6 V analog supply current all clamps active 60 mA digital supply current 3 mA digital outputs supply current f
= 30 MHz; CL= 10 pF; input ramp
pix
1 mA
response time is 800 µs ADC resolution 12 bits maximum CDS input voltage
(peak-to-peak value)
VCC= 2.85 V 650 −−mV
3.0 V 800 −−mV
V
CC
maximum pixel frequency 30 −−MHz minimum pixel frequency tbf −−MHz PGA dynamic range 24 dB total noise from CDS input to
PGA gain = 0 dB; see Figure 8 1.5 LSB ADC output
equivalent input noise (RMS
gain=24dB 70 −µV value)
total power consumption V
CCA=VCCD=VCCO
V
CCA=VCCD=VCCO
=3V 195 mW = 2.7 V 175 mW

5. Ordering information

Table 2: Ordering information
Type number Package
Name Description Version
TDA9964HL LQFP48 plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm SOT313-2
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 2 of 23
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 3 of 23
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6. Block diagram

Philips Semiconductors
CLK
43
DATA FLIP­FLOP
20
BLK
BLANKING
42
STDBY
SHD
AGND4
V
CCA1
1
46
SHIFT
V
ref
13
AGND5
SHP
45
CDS CLOCK GENERATOR
CPCDS1
CPCDS2
V
CCA2
AGND2
V
CCA3
AGND3
OFDOUT
© Philips Electronics N.V. 2001. All rights reserved.
8
9 7
3
CORRELATED
4
IN
14
5
11
DOUBLE
SAMPLING
OFD DAC
12 6
TEST
CLAMP
AGND1
2
CLAMP
V
CCA4
41
AGND6
40
PGA
8-BIT
REGISTER
8-BIT
REGISTER
CLPDM
CLPOB
44
15
OPGA OPGAC
48
TDA9964
16
BLACK LEVEL
SHIFT
SEN
19
7-BIT
REGISTER
SERIAL
INTERFACE
18
SCLK
SDATA
12-bit ADC
17
VSYNC
47
REGULATOR
OE
39
OUTPUT BUFFER
22 21
37
38 36 35 34 33 32 31 30 29 28 27 26 25
24 23
10
FCE515
DGND1 V
CCD1
OGND2
V
CCO2
D11 D10
D9 D8 D7 D6 D5 D4 D3 D2 D1
D0
OGND1
V
CCO1
DCLPC
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
Fig 1. Block diagram.
TDA9964
Philips Semiconductors

7. Pinning information

7.1 Pinning

TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
Fig 2. Pin configuration.
V
CCA1 AGND1 AGND2
AGND3
AGND4 V
CCA2
CPCDS1
CPCDS2
DCLPC
OFDOUT
TEST
CLPDM 48
1 2 3 4
IN
5 6 7 8 9
10 11
12
13
AGND5
SHD
CLK
474645
141516
CCA3
OPGA
V
SHP
CLPOB 44
TDA9964HL
17
SDATA
OPGAC
BLK 43
181920
SCLK
STDBY
42
SEN
VSYNC
CCA4
V 414039
V
CCO2
AGND6
V
OE
38
21
22
23
CCD1VCCO1
DGND1
OGND2
37
24
OGND1
36 35 34 33 32 31 30 29 28 27 26 25
FCE516
D11 D10
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

7.2 Pin description

Table 3: Pin description
Symbol Pin Description
V
CCA1
AGND1 2 analog ground 1 AGND2 3 analog ground 2 IN 4 input signal from CCD AGND3 5 analog ground 3 AGND4 6 analog ground 4 V
CCA2
CPCDS1 8 clamp storage capacitor pin 1 CPCDS2 9 clamp storage capacitor pin 2 DCLPC 10 regulator decoupling pin OFDOUT 11 analog output of the additional 8-bit control DAC TEST 12 test mode input pin (should be connected to AGND5) AGND5 13 analog ground 5 V
CCA3
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 4 of 23
1 analog supply voltage 1
7 analog supply voltage 2
14 analog supply 3
© Philips Electronics N.V. 2001. All rights reserved.
Philips Semiconductors
TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
Table 3: Pin description
…continued
Symbol Pin Description
OPGA 15 PGA output (test pin) OPGAC 16 PGA complementary output (test pin) SDATA 17 serial data input for serial interface control SCLK 18 serial clock input for serial interface SEN 19 strobe pin for serial interface VSYNC 20 vertical sync pulse input V
CCD1
21 digital supply voltage 1 DGND1 22 digital ground 1 V
CCO1
23 output supply voltage 1 OGND1 24 digital output ground 1 D0 25 ADC digital output 0 (LSB) D1 26 ADC digital output 1 D2 27 ADC digital output 2 D3 28 ADC digital output 3 D4 29 ADC digital output 4 D5 30 ADC digital output 5 D6 31 ADC digital output 6 D7 32 ADC digital output 7 D8 33 ADC digital output 8 D9 34 ADC digital output 9 D10 35 ADC digital output 10 D11 36 ADC digital output 11 (MSB) OGND2 37 output digital ground 2 V
CCO2
38 output supply voltage 2 OE 39 output enable control input (LOW: outputs active; HIGH:
outputs are high impedance) AGND6 40 analog ground 6 V
CCA4
41 analog supply voltage 4
STDBY 42 standby mode control input (LOW: TDA9964 active; HIGH:
TDA9964 standby) BLK 43 blanking control input CLPOB 44 clamp pulse input at optical black SHP 45 preset sample-and-hold pulse input SHD 46 data sample-and-hold pulse input CLK 47 data clock input CLPDM 48 clamp pulse input at dummy pixel
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 5 of 23
© Philips Electronics N.V. 2001. All rights reserved.
Philips Semiconductors
TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras

8. Limiting values

Table 4: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V V V V
V I
o
T T T
CCA CCD CCO
CC
i
stg amb j
analog supply voltage digital supply voltage digital outputs supply voltage supply voltage difference:
between V between V between V
CCA CCA CCD
and V and V and V
CCD CCO CCO
input voltage referenced to AGND 0.3 +7.0 V data output current −±10 mA storage temperature 55 +150 °C ambient temperature 20 +75 °C junction temperature 150 °C
[1]
0.3 +7.0 V
[1]
0.3 +7.0 V
[1]
0.3 +7.0 V
0.5 +0.5 V
0.5 +1.2 V
0.5 +1.2 V
[1] The supply voltages V
VCC remains as indicated.
CCA
, V
CCD
and V
may have any value between 0.3 and +7.0 V provided that the supply voltage difference
CCO

9. Thermal characteristics

Table 5: Thermal characteristics
Symbol Parameter Conditions Value Unit
R
th(j-a)
thermal resistance from junction to ambient in free air 76 K/W

10. Characteristics

Table 6: Characteristics
V
CCA=VCCD
Symbol Parameter Conditions Min Typ Max Unit
Supplies
V
CCA
V
CCD
V
CCO
I
CCA
I
CCD
I
CCO
= 3.0 V; V
CCO
= 2.7 V; f
= 30 MHz; T
pix
=25°C; unless otherwise specified.
amb
analog supply voltage 2.7 3.0 3.6 V digital supply voltage 2.7 3.0 3.6 V digital outputs supply voltage 2.5 2.7 3.6 V analog supply current all clamps active 60 mA digital supply current 3 mA digital outputs supply current CL= 10 pF on all data
1 mA outputs; input ramp response time is 800 µs
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 6 of 23
© Philips Electronics N.V. 2001. All rights reserved.
Philips Semiconductors
TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
Table 6: Characteristics
V
CCA=VCCD
= 3.0 V; V
…continued
= 2.7 V; f
CCO
= 30 MHz; T
pix
=25°C; unless otherwise specified.
amb
Symbol Parameter Conditions Min Typ Max Unit
Digital inputs
Pins: SHP, SHD and CLK (referenced to DGND)
V
IL
V
IH
I
i
Z
i
C
i
Pins: CLPDM, CLPOB, SEN, SCLK, SDATA, STBY,
V
IL
V
IH
I
i
LOW-level input voltage 0 0.6 V HIGH-level input voltage 2.2 5.5 V input current 0 Vi≤ 5.5 V −3 +3 µA input impedance f input capacitance f
= 30 MHz 50 k
CLK
= 30 MHz −− 2pF
CLK
OE, BLK, VSYNC
LOW-level input voltage 0 0.6 V HIGH-level input voltage 2.2 5.5 V input current 0 Vi≤ 5.5 V −2 +2 µA
Clamps
Global characteristics of the clamp loops
t
W(clamp)
clamp active pulse width in number of pixels
PGA code = 255 for maximum 4 LSB error
12 −−pixels
Input clamp (driven by CLPDM)
g
m(CDS)
CDS input clamp
20 mS
transconductance
Correlated Double Sampling (CDS)
V
i(CDS)(p-p)
V
reset(max)
maximum peak-to-peak CDS input amplitude (video signal)
maximum CDS input reset
VCC= 2.85 V 650 −−mV
3.0 V 800 −−mV
V
CC
500 −−mV
pulse amplitude
I
i(IN)
C
i
t
CDS(min)
input current into pin IN at floating gate level tbf tbf µA input capacitance 2 pF CDS control pulsesminimum
active time
V
i(CDS)(p-p)
= 800 mV
black to white transition in
8 −−ns
1 pixel with 98.5%
recovery
V
i
t
h(IN;SHP)
CDS input hold time (pin IN)
see Figure 3 and 4 4 −−ns compared to control pulse SHP
t
h(IN;SHD)
CDS input hold time (pin IN)
see Figure 3 and 4 4 −−ns compared to control pulse SHD
Amplifier
DR G
PGA PGA
PGA dynamic range 24 dB PGA gain step 0.08 0.10 0.12 dB
Analog-to-Digital Converter (ADC)
DNL differential non linearity f
= 30 MHz; ramp input −±0.5 ±0.9 LSB
pix
Total chain characteristics (CDS + PGA + ADC)
f
pix(max)
maximum pixel frequency 30 −−MHz
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 7 of 23
© Philips Electronics N.V. 2001. All rights reserved.
Philips Semiconductors
TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
Table 6: Characteristics
V
CCA=VCCD
= 3.0 V; V
…continued
= 2.7 V; f
CCO
= 30 MHz; T
pix
=25°C; unless otherwise specified.
amb
Symbol Parameter Conditions Min Typ Max Unit
f
pix(min)
t
CLKH
t
CLKL
t
d(SHD;CLK)
minimum pixel frequency tbf −−MHz CLK pulse width HIGH 12 −−ns CLK pulse width LOW 12 −−ns time delay between
see Figure 3 and 4 10 −−ns SHD and CLK
t
su(BLK;SHD)
set-up timeofBLK compared
see Figure 3 and 4 5 −−ns to SHD
V
i(IN)
N
tot(rms)
video input dynamic signal for ADC full-scale output
total noise from CDS input to ADC output (RMS value)
PGA code = 00 800 −−mV
PGA code = 255 50 −−mV
see Figure 8
PGA gain = 0 dB 1.5 LSB PGA gain = 9 dB 2.2 LSB
E
in(rms)
O
CCD(max)
equivalent input noise voltage (RMS value)
maximum offset between
PGA gain = 24 dB 70 −µV
PGA gain = 9 dB 140 −µV
100 +100 mV CCD floating level and CCD dark pixel level
Digital-to-analog converter (OFDOUT DAC)
V
OFDOUT(p-p)
additional 8-bit control DAC
Ri=1MΩ−1.0 V (OFD) output voltage (peak-to-peak value)
V
OFDOUT(0)
V
OFDOUT(255)
DC output voltage for code 0 AGND V DC output voltage for
AGND + 1.0 V
code 255
TC
DAC
DAC output range
250 ppm/°C
temperature coefficient
Z
OFDOUT
I
OFDOUT
Digital outputs (f
V
OH
V
OL
I
OZ
DAC output impedance 2000 −Ω OFD output current drive static −− 100 µA
= 30 MHz; CL= 10 pF); see Figure 3 and 4
pix
HIGH-level output voltage IOH= 1mA V
0.5 V
CCO
CCO
V LOW-level output voltage IOL=1mA 0 0.5 V output current in 3-state
0.5 V < Vo<V
CCO
20 +20 µA
mode
t t
C
h(o) d(o)
L
output hold time 5 −−ns output delay time CL= 10 pF; V
= 10 pF; V
C
L
= 3.0 V 12 tbf ns
CCO
= 2.7 V 14 tbf ns
CCO
output load capacitance −− 15 pF
Serial interface
f
SCLK(max)
maximum frequency of serial
10 −−MHz
interface
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 8 of 23
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 9 of 23
Philips Semiconductors
hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh
IN
SHP
t
h(IN;SHP)
SHD
CLK
DATA
© Philips Electronics N.V. 2001. All rights reserved.
BLK
0.6 V
N
0.6 V
t
h(IN;SHD)
2.2 V
N 4
N + 1N + 2N + 3N + 4N + 5
t
CDS(min)
2.2 V
t
CDS(min)
t
CLKH
t
d(SHD;CLK)
2.2 V
0.6 V
t
h(o)
0.6 V
0.6 V
50%
N 3N 2N − 1
2.2 V
t
d(o)
2.2 V
t
2.2 V
N
su(BLK;SHD)
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
ADC CLAMP
CODE
FCE517
TDA9964
Fig 3. Pixel frequency timing diagram; all polarities active HIGH.
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 10 of 23
Philips Semiconductors
hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh
IN
SHP
t
h(IN;SHP)
SHD
CLK
DATA
BLK
© Philips Electronics N.V. 2001. All rights reserved.
2.2 V
N
2.2 V
t
h(IN;SHD)
t
CLKL
0.6 V
N 4
N + 1N + 2N + 3N + 4N + 5
0.6 V
t
CDS(min)
2.2 V
0.6 V
t
CDS(min)
2.2 V 2.2 V
0.6 V
t
d(SHD;CLK)
50%
N 3N 2N − 1
t
h(o)
t
d(o)
0.6 V
0.6 V
N
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
ADC CLAMP
CODE
Fig 4. Pixel frequency timing diagram; all polarities active LOW.
t
su(BLK;SHD)
FCE518
TDA9964
Philips Semiconductors
TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
FCE519
1.0
OFDOUT
DAC voltage
output
(V)
0
0
OFDOUT control DAC input code
Fig 5. DAC voltage output as a function of DAC input code.
CLPOB
WINDOW
AGCOUT VIDEO OPTICAL BLACK
CLPOB (active HIGH)
CLPDM (active HIGH)
BLK (active HIGH)
HORIZONTAL FLYBACK DUMMY VIDEO
BLK window
255
CLPDM
WINDOW
FCE520
Fig 6. Line frequency timing diagram.
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 11 of 23
© Philips Electronics N.V. 2001. All rights reserved.
Philips Semiconductors
TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
FCE521
25.9
192
PGA input code
TOTAL
gain (dB)
30
24
18
12
6
1.9
0
0 64 128 255
Fig 7. Total gain from CDS input to ADC input as a function of PGA input code.
6
handbook, halfpage
N
tot(rms)
(LSB)
5
FCE522
4
3
2
1
0
0 64 128 255
192
PGA code
Noise measurement at ADC outputs: Coupling capacitor at input is grounded, so only noise contribution of the front-end is evaluated. Front-end works at 30 Mpixels with line of 1024 pixels of which the first 40 lines are used to run CLPOB and the last 40 lines for CLPDM. Data at the ADC outputs is measured during the other pixels. As a result, the standard deviation of the codes statistic is computed, resulting in the noise. No quantization noise is taken into account as there is no input.
Fig 8. Typical total noise performance as a function of PGA gain.
9397 750 07918
© Philips Electronics N.V. 2001. All rights reserved.
Objective specification Rev. 03 — 16 January 2001 12 of 23
Philips Semiconductors
TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
SDATA
SCLK
SEN
SCLK
OFDOUT DAC
LATCHES
FLIP-FLOP
8-bit DAC
SD0
LSB
8 8 7 10
PGA GAIN
LATCHES
FLIP-FLOP
PGA control
Fig 9. Serial interface block diagram.
SD2SD1
SD3
SD4
ADC CLAMP
LATCHES
FLIP-FLOP
ADC clamp
control
SD5
12
SHIFT REGISTER
SD6
SD7
CONTROL PULSE
POLARITY
LATCHES
control pulses
polarity settings
SD9 SD10 SD11
SD8
VSYNC
FCE523
MSB
A0
A1 A2 A3
LATCH
SELECTION
t
su2
t
hd4
SD7 SD6 SD5 SD4 SD3
SDATA
SCLK
SEN
t
su1=tsu2=tsu3
A3
t
su1
= 10 ns (min.); t
A1A2
A0
hd3=thd4
MSB
SD10
SD11
= 10 ns (min.)
SD9
SD8
Fig 10. Loading sequence of control input data via the serial interface.
LSB
SD2 SD1 SD0
t
su3
t
hd3
FCE524
9397 750 07918
© Philips Electronics N.V. 2001. All rights reserved.
Objective specification Rev. 03 — 16 January 2001 13 of 23
Philips Semiconductors
Table 7: Serial interface programming
Address bits Data bits D9 to D0 A3 A2 A1 A0
0 0 0 0 PGA gain control (SD7 to SD0) 0001DAC OFDOUT output control (SD7 to SD0) 0 0 1 0 ADC clamp reference control (SD6 to SD0); from code 0 to 127 0 0 1 1 control pulses (pins SHP, SHD, CLPDM, CLPOB, BLK and CLK)
0 1 0 0 SD7 = 0 by default; SD7 = 1 PGA gain up to 36 dB but noise and
1 1 1 1 initialization (SD11 to SD0 = 0) other addresses test modes
Table 8: Polarity settings
Symbol Pin Serial control bit Active edge or level
SHP and SHD 45 and 46 SD4 1 = HIGH; 0 = LOW CLK 47 SD5 1 = rising; 0 = falling CLPDM 48 SD0 1 = HIGH; 0 = LOW CLPOB 44 SD1 1 = HIGH; 0 = LOW BLK 43 SD3 1 = HIGH; 0 = LOW VSYNC 20 SD8 0 = rising; 1 = falling
TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
polarity settings; SD2, SD6, SD7 and SD9 should be set to logic 1; for SD6 and SD7 see Table 9, 10, 11, and 12
clamp behaviour are not guaranteed
Table 9: Standby control using pin STDBY
Bit SD7 of register 0011
1 1 last logic state 1.5 mA
0 1 active 65 mA
Table 10: Output enable selection using output enable pin (
Bit SD6 of register 0011 OE ADC digital outputs D11 to D0
1 0 active, binary
0 0 high impedance
Table 11: Standby control by serial interface (register
address A3 = 0, A2 = 0, A1 = 1 and A0 = 1); pin STDBY connected to ground
SD7 ADC digital outputs D11 to D0 I
0 last logic state 1.5 mA 1 active 65 mA
STDBY ADC digital outputs
D11 to D0
0 active 65 mA
0 test logic state 1.5 mA
1 high impedance
1 active binary
CCA+ICCO+ICCD
I
CCA+ICCO+ICCD
OE)
(typ.)
(typ.)
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 14 of 23
© Philips Electronics N.V. 2001. All rights reserved.
Philips Semiconductors
Table 12: Output enable control by serial interface (register address A3 = 0, A2 = 0,
A1 = 1 and A0 = 1); output enable pin (
SD6 ADC digital outputs D11 to D0
0 high impedance 1 active binary

11. Application information

TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
OE) connected to ground
handbook, full pagewidth
V
CCA
CCD
100
nF
(2)
1 µF
V
CCA
1 µF
1 µF
1 µF
V
CCA1 AGND1 AGND2
AGND3
AGND4 V
CCA2
CPCDS1 CPCDS2
DCLPC
OFDOUT
TEST
V
(2) (2)
CLK
SHD
CLPDM
48 47 46 45 44 43 42 41 40 39 38 37 1 2 3
IN
4 5 6 7 8 9 10 11 12
13 14 15 16 17 18 19 20 21 22 23 24
SHP
BLK
CLPOB
TDA9964
STDBY
CCA
100 nF
CCA4
V
V
CCD
AGND6
OE
V
CCO
CCO2
V
V
CCD
100 nF
OGND2
D11
36
D10
35
D9
34
D8
33
D7
32
D6
31
D5
30
D4
29
D3
28
D2
27
D1
26
D0
25
SEN
CCA3
AGND5
V
V
CCA
OPGA
100 nF
SDATA
OPGAC
SCLK
serial
interface
VSYNC
(1)
V
CCD1
V
100 nF
CCD
CCO1
V
DGND1
V
CCO
OGND1
100 nF
FCE525
(1) Pins SEN and VSYNC should be interconnected when the vertical sync signal is not available. (2) Input signals IN, SHD and SHP must be adjusted to comply with timing signals t
h(IN;SHP)
and t
h(IN;SHD)
(see Section 10
“Characteristics”).
Fig 11. Application diagram.
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 15 of 23
© Philips Electronics N.V. 2001. All rights reserved.
Philips Semiconductors

11.1 Power and grounding recommendations

When designing a printed-circuit board for applications such as PC cameras, surveillance cameras, camcorders and digital still cameras, care should be taken to minimize the noise.
For the front-end integrated circuit, the basic rules of printed-circuit board design and implementation of analog components (such as classical operational amplifiers) must be respected, particularly with respect to power and ground connections.
The following additional recommendation is given for the CDS input pin(s) which is (are) internally connected to the programmable gain amplifier:
The connections between CCD interface and CDS input should be as short as possible and a ground ring protection around these connections can be beneficial. Separate analog and digital supplies provide the best solution. If it is not possible to do this on the board, the analog supply pins must be decoupled effectively from the digital supply pins. If the same power supply and ground are used for all the pins, the decoupling capacitors must be placed as closely as possible to the IC package.
To minimize the noise caused by package and die parasitics in a two-ground system, the following recommendation must be implemented:
TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
All analog and digital supply pins must be decoupled to the analog ground plane. Only the ground pin associated with the digital outputs must be connected to the digital ground plane. All other ground pins should be connected to the analog ground plane. The analog and digital ground planes must be connected together at one point as closely as possible to the ground pin associated with the digital outputs.
The digital output pins and their associated lines should be shielded by the digital ground plane, which can then be used as return path for digital signals.
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 16 of 23
© Philips Electronics N.V. 2001. All rights reserved.
Philips Semiconductors

12. Package outline

TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm
c
y
X
36
37
pin 1 index
48
25
Z
24
E
e
w M
b
p
13
A
H
E
E
A
2
A
SOT313-2
(A )
A
1
L
3
θ
L
p
1
e
DIMENSIONS (mm are the original dimensions)
UNIT
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
A
A1A2A3b
max.
0.20
0.05
1.45
1.35
1.60
mm
OUTLINE
VERSION
SOT313-2 MS-026136E05
IEC JEDEC EIAJ
b
p
0.25
w M
D
H
D
p
0.27
0.17
12
Z
D
B
0 2.5 5 mm
(1)
(1) (1)(1)
cE
D
7.1
0.18
0.12
7.1
6.9
6.9
REFERENCES
Fig 12. SOT313-2.
v M
A
v M
B
scale
eH
H
D
9.15
0.5
8.85
9.15
8.85
E
LL
0.75
0.45
detail X
Zywv θ
p
0.12 0.10.21.0
EUROPEAN
PROJECTION
Z
0.95
0.55
D
E
0.95
7
0.55
0
ISSUE DATE
99-12-27 00-01-19
o o
9397 750 07918
© Philips Electronics N.V. 2001. All rights reserved.
Objective specification Rev. 03 — 16 January 2001 17 of 23
Philips Semiconductors

13. Handling information

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be completely safe, it is desirable to take normal precautions appropriate to handling integrated circuits.

14. Soldering

14.1 Introduction to soldering surface mount packages

This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our
Packages
There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended.
TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
Data Handbook IC26; Integrated Circuit
(document order number 9398 652 90011).
14.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method.
Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 220 °C for thick/large packages, and below 235 °C small/thin packages.

14.3 Wave soldering

Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems.
To overcome these problems the double-wave soldering method was specifically developed.
If wave soldering is used the following conditions must be observed for optimal results:
Use a double-wave soldering method comprising a turbulent wave with high
upward pressure followed by a smooth laminar wave. For packages with leads on two sides and a pitch (e):
larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be
parallel to the transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the
transport direction of the printed-circuit board.
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 18 of 23
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Philips Semiconductors
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.

14.4 Manual soldering

Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C.
When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
The footprint must incorporate solder thieves at the downstream end. For packages with leads on four sides, the footprint must be placed at a 45° angle
to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners.

14.5 Package related soldering information

Table 13: Suitability of surface mount IC packages for wave and reflow soldering
methods
Package Soldering method
Wave Reflow
BGA, HBGA, LFBGA, SQFP, TFBGA not suitable suitable HBCC, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, HVQFN, SMS
[3]
PLCC LQFP, QFP, TQFP not recommended SSOP, TSSOP, VSO not recommended
[1] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the
[2] These packages are not suitable for wave soldering as a solder joint between the printed-circuit board
[3] If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave
[4] Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger
[5] Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than
, SO, SOJ suitable suitable
maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the
Circuit Packages; Section: Packing Methods
and heatsink (at bottom version) can not be achieved,and as solder may stick to the heatsink (on top version).
direction. The package footprint must incorporate solder thieves downstream and at the side corners.
than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
not suitable
.
[2]
[3][4] [5]
Data Handbook IC26; Integrated
suitable
suitable suitable
[1]
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 19 of 23
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Philips Semiconductors
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras

15. Revision history

Table 14: Revision history
Rev Date CPCN Description
03 20010116 - Objective specification; third version 02 20000801 - Objective specification; second version 01 20000502 - Objective specification; initial version
TDA9964
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 20 of 23
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Philips Semiconductors

16. Data sheet status

TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
Datasheet status Product status Definition
Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may
change in any manner without notice.
Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any
time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued data sheet before initiating or completing a design.
17. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
[1]

18. Disclaimers

Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
9397 750 07918
© Philips Electronics N.V. 2001 All rights reserved.
Objective specification Rev. 03 — 16 January 2001 21 of 23
Philips Semiconductors
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
Philips Semiconductors - a worldwide company
TDA9964
Argentina: see South America Australia: Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Tel. +43 160 101, Fax. +43 160 101 1210 Belarus: Tel. +375 17 220 0733, Fax. +375 17 220 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Tel. +359 268 9211, Fax. +359 268 9102 Canada: Tel. +1 800 234 7381 China/Hong Kong: Tel. +852 2 319 7888, Fax. +852 2 319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Tel. +45 3 288 2636, Fax. +45 3 157 0044 Finland: Tel. +358 961 5800, Fax. +358 96 158 0920 France: Tel. +33 14 099 6161, Fax. +33 14 099 6427 Germany: Tel. +49 40 23 5360, Fax. +49 402 353 6300 Hungary: Tel. +36 1 382 1700, Fax. +36 1 382 1800 India: Tel. +91 22 493 8541, Fax. +91 22 493 8722 Indonesia: see Singapore Ireland: Tel. +353 17 64 0000, Fax. +353 17 64 0200 Israel: Tel. +972 36 45 0444, Fax. +972 36 49 1007 Italy: Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Tel. +81 33 740 5130, Fax. +81 3 3740 5057 Korea: Tel. +82 27 09 1412, Fax. +82 27 09 1415 Malaysia: Tel. +60 37 50 5214, Fax. +60 37 57 4880 Mexico: Tel. +9-5 800 234 7381 Middle East: see Italy
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For all other countries apply to: Philips Semiconductors,
Marketing Communications, Building BE, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 272 4825
Internet: http://www.semiconductors.philips.com
(SCA71)
9397 750 07918
Objective specification Rev. 03 — 16 January 2001 22 of 23
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Philips Semiconductors
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
Contents
1 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
5 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
9 Thermal characteristics. . . . . . . . . . . . . . . . . . . 6
10 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6
11 Application information. . . . . . . . . . . . . . . . . . 15
11.1 Power and grounding recommendations . . . . 16
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17
13 Handling information. . . . . . . . . . . . . . . . . . . . 18
14 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
14.1 Introduction to soldering surface mount
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
14.2 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 18
14.3 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 18
14.4 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 19
14.5 Package related soldering information . . . . . . 19
15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 20
16 Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 21
17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
18 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
TDA9964
© Philips Electronics N.V. 2001. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Date of release: 16 January 2001 Document order number: 9397 750 07918
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