Philips tda9808 DATASHEETS

INTEGRATED CIRCUITS

DATA SH EET

TDA9808

Single standard VIF-PLL with
QSS-IF and FM-PLL demodulator

Preliminary specification
File under Integrated Circuits, IC02

February 1995

Philips Semiconductors Preliminary specification

Single standard VIF-PLL with QSS-IF

TDA9808

and FM-PLL demodulator

FEATURES

• 5 V positive supply voltage

• Applicable for IF frequencies of 38.9 MHz, 45.75 MHz

and 58.75 MHz

• Gain controlled wide band VIF-amplifier (AC-coupled)

• True synchronous demodulation with active carrier

regeneration (very linear demodulation, good
intermodulation figures, reduced harmonics, excellent
pulse response)

• VIF AGC detector for gain control, operating as peak
sync detector

• Tuner AGC with adjustable take over point (TOP)

• AFC detector without extra reference circuit

QUICK REFERENCE DATA

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V

P

I

P

V

i VIF

V

o CVBS

positive supply voltage (pin 18) 4.5 5 5.5 V
supply current 72 85 98 mA
vision IF input signal sensitivity (RMS value; pins 1 and 2) − 60 100 µV

CVBS output signal on pin 9 (peak-to-peak value) 1.2 1.35 1.5 V
B −3 dB video bandwidth on pin 9 7 8 − MHz
S/N (W) weighted signal-to-noise ratio for video 56 60 − dB

α
α
α

V
V

0.92

2.76
H
i SIF
o

intermodulation attenuation 58 64 − dB

suppression of harmonics in video signal 35 40 − dB

sound IF input signal sensitivity (RMS value; pins 19 and 20) − 50 100 µV

audio output signal for FM standard M, N (RMS value; 25 kHz

modulation)
THD total harmonic distortion; 25 kHz modulation for FM − 0.15 − %
S/N (W) weighted signal-to-noise ratio; 25 kHz modulation for FM − 60 − dB

• SIF input for Single Reference QSS mode (PLL
controlled); SIF AGC detector for gain controlled SIF
amplifier; Single Reference QSS for high performance

• AC coupled limiter amplifier for sound intercarrier signal

• PLL-FM demodulator with high linearity, alignment-free

• Stabilizer circuit for ripple rejection and to achieve

constant output signals.

GENERAL DESCRIPTION

The TDA9808 is an integrated circuit for singlestandard
(negative modulated) vision IF signal processing and FM
demodulation, with single reference QSS-IF in TV and
VTR sets.

58 64 − dB

− 0.5 − V

ORDERING INFORMATION

EXTENDED

TYPE NUMBER

TDA9808 20 DIL plastic SOT146

TDA9808T 20 SO plastic SOT163A

Note

1. SOT146-1; 1996 November 22.

2. SOT163-1; 1996 November 22.

February 1995 2

PINS

PIN

POSITION

PACKAGE

MATERIAL CODE

(1)

(2)

Philips Semiconductors Preliminary specification

Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator

TDA9808

February 1995 3

Fig.1 Block diagram.

Philips Semiconductors Preliminary specification

Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator

PINNING

SYMBOL PIN DESCRIPTION

V

i VIF

TADJ 3 tuner AGC takeover adjust

T

PLL

C

SAGC

V

o AF

C

AF

C

Vp/2

V

o CVBS

V

o QSS

V

i FM

TAGC 12 tuner AGC output
AFC 13 AFC output
VCO1 14 VCO reference circuit for 2f
VCO2 15
GND 16 ground
C

VAGC

V

P

V

i SIF

1 VIF differential input signal
2

(TOP)
4 PLL loop filter
5 SIF AGC capacitor
6 audio frequency output
7 decoupling capacitor
8V

/2 reference capacitor

P

9 CVBS output signal

10 single reference QSS output
11 sound intercarrier input

17 VIF AGC capacitor
18 positive supply voltage
19 SIF differential input signal
20

PC

TDA9808

Fig.2 Pin configuration.

February 1995 4

Philips Semiconductors Preliminary specification

Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator

FUNCTIONAL DESCRIPTION
Vision IF amplifier

The vision IF amplifier consists of three AC-coupled
differential amplifier stages. Each differential stage
comprises a controlled feedback network by means of
emitter degeneration.

Tuner and VIF AGC

The AGC capacitor voltage is transferred to an internal IF
control signal, to control the vision IF amplifier. Additionally
it is fed into the tuner AGC amplifier to generate the tuner
AGC output current on pin 12 (open-collector output). The
tuner AGC take over point can be adjusted at pin 3. This
allows the tuner and the SWIF filter to be matched to
achieve the optimum IF input level.
The AGC detector charges/discharges the AGC capacitor
to the required voltage for setting of VIF and tuner gain in
order to keep the video signal at a constant level.
Therefore the sync level of the video signal is detected.

Frequency-Phase detector (FPLL)

The VIF amplifier output signal is fed into a frequency
detector and into a phase detector via a limiting amplifier.
During acquisition the frequency detector produces a DC
current which is proportional to the frequency difference
between the input and the VCO signal. After frequency
lock-in the phase detector produces a DC current
proportional to the phase difference between the VCO and
the input signal. Via the loop filter the DC current of either
frequency detector or phase detector is converted into a
DC voltage, which controls the VCO frequency.

VCO and AFC

TDA9808

Video demodulator and amplifier

The video demodulator is realized by a multiplier which is
designed for low distortion and large bandwidth. The vision
IF input signal is multiplied with the ‘in phase’ VCO output
signal.
The demodulator output signal is fed via an integrated
low-pass for attenuation of the carrier harmonics to the
video amplifier. The video amplifier is realized by an
operational amplifier with internal feedback and high
bandwidth. A low-pass filter is integrated to achieve an
attenuation of the carrier harmonics. The video output
signal at pin 9 is 1.35 V (p-p) for nominal vision IF
modulation.

SIF amplifier and AGC

The sound IF amplifier consists of two AC coupled
differential amplifier stages. Each differential stage
comprises a controlled feedback network provided by
emitter degeneration.
The SIF AGC detector is related to the SIF signals
(average level of FM carriers) at pin 19 and pin 20 (SIF
input) and controls the SIF amplifier to provide a constant
SIF signal at the SIF amplifier output.

Single reference QSS mixer

The single reference QSS mixer is realized by a multiplier.
The SIF amplifier output signal is fed to the single
reference QSS mixer and converted to intercarrier
frequency by the regenerated picture carrier (VCO). The
mixer output signal is fed via a high-pass for attenuation of
the video signal components to the output pin 10. With this
system a high performance Hi-Fi stereo sound processing
can be achieved.

The VCO operates with a symmetrically connected
resonance circuit (with L and C in parallel). It is tuned to the
double VIF picture carrier frequency. The VCO is
controlled by two integrated varicaps. The control voltage
required to tune the VCO from its free running frequency
to actual double the PC frequency is generated by
the frequency-phase detector and fed via the loop filter to
the first varicap (FPLL). This control voltage is amplified,
and additionally converted into a current which represents
the AFC output signal. At centre frequency the AFC output
current is equal to zero.
The oscillator signal is divided-by-two. Two differential
output signals were generated with 90 degree phase
difference independent of the frequency.

February 1995 5

FM detector

The FM detector consists of a limiter, an FM-PLL and an
AF amplifier. The limiter provides the amplification and
limitation of the FM sound intercarrier signal before
demodulation. The result is high sensitivity and AM
suppression. The amplifier consists of 7 stages which are
internally AC coupled in order to minimize the DC offset
and to save pins for DC decoupling.

Philips Semiconductors Preliminary specification

Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator

The FM-PLL consists of an integrated RC oscillator, an
integrated loop filter and a phase detector. The oscillator is
locked to the limited FM intercarrier signal. As a result of
locking, the oscillator tracks with the frequency modulation
of the input signal. The oscillator control voltage is
superimposed by the AF voltage. By this way the FM-PLL
operates as an FM-demodulator.
The AF amplifier consists of two parts:

1. The AF pre-amplifier is an operational amplifier with
internal feedback, high gain and high common mode
rejection. The AF output voltage from the PLL
demodulator, by principle a small output signal, is
amplified by approximately 33 dB. The low-pass
characteristic of this pre-amplifier reduces the
harmonics of the intercarrier signal at the sound output
terminal.
An additional DC control circuit is implemented to keep
the DC level constant, independent of process
spreadings.

TDA9808

2. The AF output amplifier (10 dB) provides the required
output level by means of a rail-to-rail output stage.

Internal voltage stabilizer and V

The bandgap circuit internally generates a voltage of
approximately 1.25 V, independent of supply voltage and
temperature.
A voltage regulator circuit, connected to this voltage,
produces a constant voltage of 3.6 V which is used as an
internal reference voltage.
For all audio output signals this constant reference voltage
cannot be used because large output signals are required.
Therefore these signals refer to half the supply voltage to
achieve a symmetrical headroom, especially for the
rail-to-rail output stage. For ripple and noise attenuation
the V

/2 voltage has to be filtered via a low-pass by using

P

an external capacitor at pin 8 together with an integrated
resistor (fg≈ 5 Hz). For a fast setting to VP/2 an internal
start-up circuit is added.

/2-reference

P

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER MIN. MAX. UNIT

V

P

supply voltage (pin 18) for a maximum
chip temperature (note 1)

SOT146 at +120 °C − 7.6 V
SOT163A at +120 °C − 5.9 V

V

i

t

s max

V

12

T

stg

T

amb

V

ESD

voltage at pins 1 to 8, 11 to 13, 16 to 20 0 5.5 V
maximum short-circuit time − 10 s
tuner AGC output voltage 0 13.2 V
storage temperature −25 +150 °C
operating ambient temperature −20 +70 °C
electrostatic handling for all pins (note 2) −±300 V

Notes to the Limiting Values

1. I

= 98 mA; T

18

amb

= +70 °C.

2. Charge device model class B: equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.

THERMAL RESISTANCE

SYMBOL PARAMETER THERMAL RESISTANCE

R

th j-a

from junction to ambient in free air

SOT146 65 K/W
SOT163A 85 K/W

February 1995 6

Philips Semiconductors Preliminary specification

Single standard VIF-PLL with QSS-IF and

TDA9808

FM-PLL demodulator

CHARACTERISTICS

The following characteristics apply for T
f

= 41.25 MHz (M), fSC= 54.25 MHz (M); input level V

SC

value (SC), IF input from 50 Ω via broadband transformer 1:1; video modulation DSB; residual carrier M: 10%;
video signal: NTC-7 composite; test circuit according to Fig.3 unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply (pin 18)

V

18

I

18

supply voltage note 1 4.5 5 5.5 V

supply current 72 85 98 mA
Vision IF amplifier (pins 1 and 2)
V

i VIF

input sensitivity (RMS value) at

45.75 MHz

input sensitivity (RMS value) at

58.75 MHz

maximum input signal (RMS value) at

45.75 MHz

maximum input signal (RMS value) at

58.75 MHz

∆V

o int.

internal IF amplitude difference

between picture and sound carrier

G

IF

R

i

C

i

V

1/2

IF gain control range see Fig.4

input resistance (differential) note 2 1.7 2.2 2.7 kΩ

input capacitance (differential) 1.2 1.7 2.5 pF

DC voltage − 3.4 − V
True synchronous video demodulator (note 3)
f

VCO

maximum oscillator frequency for

carrier regeneration
∆f

VCO

oscillator drift (free running) as a

function of temperature
V

0 ref

oscillator swing at pins 14 and 15

(RMS value)
∆f

t

acqu

V

pc

i VIF

vision carrier capture range M standard ±1.5 ±2 − MHz

acquisition time note 5; BL = 60 kHz −−30 ms

VIF input signal sensitivity for PLL to

be locked (RMS value; pins 1 and 2)
I

Loop

FPLL loop offset current at pin 4 note 7 −−±4.5 µA

= +25 °C, VP= 5 V, fpc= 45.75 MHz (M), fpc= 58.75 MHz (M),

amb

= 10 mV RMS value (sync-level); V

i IF1,2

−1 dB video at output − 60 90 µV

− 70 100 µV

+1 dB video at output 140 200 − mV

200 300 − mV

within AGC range;

− 0.7 1 dB
M standard;
∆f = 4.5 MHz

45.75 MHz 65 70 − dB

58.75 MHz 68 73 − dB

f = 2f

pc

125 130 − MHz

note 4 −−±750 Hz/K

fpc= 45.75 MHz − 100 − mV

= 58.75 MHz − 80 − mV

f

pc

note 6;

− 60 90 µV
maximum IF gain

i IF19,20

= 4.5 mV RMS

February 1995 7