Philips TDA9806-V1 Datasheet

DATA SH EET

Preliminary specification
File under Integrated Circuits, IC02

1995 Sep 05

INTEGRATED CIRCUITS

TDA9806

Multistandard VIF-PLL and
FM-PLL demodulator

1995 Sep 05 2

Philips Semiconductors Preliminary specification

Multistandard VIF-PLL and
FM-PLL demodulator

TDA9806

FEATURES

• 5 V supply voltage

• Gain controlled wide band VIF-amplifier (AC-coupled)

• True synchronous demodulation with active carrier

regeneration (very linear demodulation,
good intermodulation figures, reduced harmonics,
excellent pulse response)

• Separate video amplifier for sound trap buffering with
high video bandwidth

• VIF AGC detector for gain control, operating as peak
sync detector for B/G

• Tuner AGC with adjustable takeover point (TOP)

• AFC detector without extra reference circuit

• AC-coupled limiter amplifier for sound intercarrier signal

• Alignment-free FM-PLL demodulator with high linearity,

switchable de-emphasis for FM

• Stabilizer circuit for ripple rejection and to achieve
constant output signals.

GENERAL DESCRIPTION

The TDA9806 is an integrated circuit for multistandard
vision IF signal processing and FM sound demodulation in
TV and VCR sets.

ORDERING INFORMATION

TYPE NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA9806 SDIP32 plastic shrink dual in-line package; 32 leads (400 mil) SOT232-1

1995 Sep 05 3

Philips Semiconductors Preliminary specification

Multistandard VIF-PLL and
FM-PLL demodulator

TDA9806

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

P

supply voltage 4.5 5 5.5 V

I

P

supply current 82 96 110 mA

V

i VIF(rms)

vision IF input signal voltage sensitivity
(RMS value)

−1 dB video at output − 60 100 µV

V

o CVBS(p-p)

CVBS output signal voltage
(peak-to-peak value)

1.7 2.0 2.3 V

B

−3

−3 dB video bandwidth on pin CVBS B/G standard; CL< 20 pF;

R

L

> 1kΩ; AC load

78−MHz

S/N (W) weighted signal-to-noise ratio for video 56 60 − dB
IM

α1.1

intermodulation attenuation at ‘blue’ f = 1.1 MHz 58 64 − dB

IM

α3.3

intermodulation attenuation at ‘blue’ f = 3.3 MHz 58 64 − dB

α

H(sup)

suppression of harmonics in video
signal

35 40 − dB

V

o(rms)

audio output signal voltage for FM
(RMS value)

B/G standard;
54% modulation

− 0.5 − V

THD total harmonic distortion for FM 54% modulation − 0.15 0.5 %
S/N (W) weighted signal-to-noise ratio for FM 54% modulation − 60 − dB

1995 Sep 05 4

Philips Semiconductors Preliminary specification

Multistandard VIF-PLL and

FM-PLL demodulator

TDA9806

BLOCK DIAGRAM

h

andbook, full pagewidth

INTERCARRIER

MIXER

VCO TWD

AFC DETECTOR

TUNER AND VIF-AGC

FPLL

VIDEO DEMODULATOR

AND AMPLIFIER

INTERNAL VOLTAGE

STABILIZER

FM DETECTOR (PLL)

AF AMPLIFIER

VIF AMPLIFIER

VIF

TDA9806

29 27 26 9

10

21

22

15

12

23242571928 63

2
1

32
31

5 V

VP1/2

11 20 17

5.5
SIF

14 13

16

n.c. n.c.n.c.

8

n.c.

AF

de-emphasis

VIDEO

BUFFER

CVBS

2 V (p-p)

video

1 V (p-p)

AFC

2 x f

PC
tuner
AGC

loop
filter

n.c.

4

n.c.5n.c.

18

n.c.

30

n.c.

n.c.
n.c.

TOP

C

AGC

MHA054

V

i(vid)

Fig.1 Block diagram.

1995 Sep 05 5

Philips Semiconductors Preliminary specification

Multistandard VIF-PLL and
FM-PLL demodulator

TDA9806

PINNING

SYMBOL PIN DESCRIPTION

V

i VIF1

1 VIF differential input signal voltage 1

V

i VIF2

2 VIF differential input signal voltage 2
n.c. 3 not connected
n.c. 4 not connected
n.c. 5 not connected
TADJ 6 tuner AGC takeover adjust (TOP)
T

PLL

7 PLL loop filter
n.c. 8 not connected
n.c. 9 not connected
V

o CVBS

10 CVBS output signal voltage
n.c. 11 not connected
V

oAF

12 audio voltage frequency output
DEEM

I

13 de-emphasis input
DEEM

O

14 de-emphasis output
C

DEC

15 decoupling capacitor
n.c. 16 not connected
V

iFM

17 sound intercarrier input voltage
n.c. 18 not connected
TAGC 19 tuner AGC output
V

o(int)

20 sound intercarrier output voltage
V

o(vid)

21 composite video output voltage
V

i(vid)

22 video buffer input voltage
AFC 23 AFC output
VCO1 24 VCO1 reference circuit for 2f

PC

VCO2 25 VCO2 reference circuit for 2f

PC

C

ref

261⁄2VP reference capacitor
GND 27 ground
C

VAGC

28 VIF AGC capacitor
V

P

29 supply voltage
n.c. 30 not connected
n.c. 31 not connected
n.c. 32 not connected

Fig.2 Pin configuration.

handbook, halfpage

TDA9806

MHA053

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

V
V

TADJ

T

V

V

n.c.

n.c.

n.c.

n.c.

n.c.

n.c.

n.c.

V
C

GND

n.c.

n.c.

n.c.

C

VCO2
VCO1
AFC

V
V
V

TAGC
n.c.

o AF

DEEM

I

DEEM

O

C

DEC

o CVBS

PLL

i VIF2

i VIF1

P

VAGC

ref

V

i FM

o(int)

o(vid)

i(vid)

1995 Sep 05 6

Philips Semiconductors Preliminary specification

Multistandard VIF-PLL and
FM-PLL demodulator

TDA9806

FUNCTIONAL DESCRIPTION
Vision IF amplifier

The vision IF amplifier consists of three AC-coupled
differential amplifier stages. Each differential stage
comprises a feedback network controlled by emitter
degeneration.

Tuner and VIF AGC

The AGC capacitor voltage is transferred to an internal IF
control signal, and is fed to the tuner AGC to generate the
tuner AGC output current (open-collector output). The
tuner AGC takeover point can be adjusted. This allows the
tuner and the SWIF filter to be matched to achieve the
optimum IF input level.

The AGC detector charges/discharges the AGC capacitor
to the required voltage for setting of VIF and tuner gain in
order to keep the video signal at a constant level.
Therefore for negative video modulation the sync level of
the video signal is detected.

Frequency Phase Locked Loop detector (FPLL)

The VIF-amplifier output signal is fed into a frequency
detector and into a phase detector via a limiting amplifier.
During acquisition the frequency detector produces a DC
current proportional to the frequency difference between
the input and the VCO signal. After frequency lock-in the
phase detector produces a DC current proportional to the
phase difference between the VCO and the input signal.
The DC current of either frequency detector or phase
detector is converted into a DC voltage via the loop filter,
which controls the VCO frequency.

VCO, travelling wave divider and AFC

The VCO operates with a resonance circuit (with L and C
in parallel) at double the PC frequency. The VCO is
controlled by two integrated variable capacitors. The
control voltage required to tune the VCO from its
free-running frequency to actually double the PC
frequency is generated by the Frequency-Phase detector
and fed via the loop filter to the first variable capacitor
(FPLL). This control voltage is amplified and additionally
converted into a current which represents the AFC output
signal. At centre frequency the AFC output current is equal
to zero.

The oscillator signal is divided-by-two with a Travelling
Wave Divider (TWD) which generates two differential
output signals with a 90 degree phase difference
independent of the frequency.

Video demodulator and amplifier

The video demodulator is realized by a multiplier which is
designed for low distortion and large bandwidth. The vision
IF input signal is multiplied with the ‘in-phase’ signal of the
travelling wave divider output.

The demodulator output signal is fed via an integrated
low-pass filter for attenuation of the carrier harmonics to
the video amplifier. The video amplifier is realized by an
operational amplifier with internal feedback and high
bandwidth. A low-pass filter is integrated to achieve an
attenuation of the carrier harmonics. The video output
signal is 1 V (p-p) for nominal vision IF modulation.

Video buffer

For an easy adaption of the sound traps an operational
amplifier with internal feedback is used. This amplifier is
featured with a high bandwidth and 7 dB gain. The input
impedance is adapted for operating in combination with
ceramic sound traps. The output stage delivers a nominal
2 V (p-p) positive video signal. Noise clipping is provided.

Intercarrier mixer

The intercarrier mixer is realized by a multiplier. The VIF
amplifier output signal is fed to the intercarrier mixer and
converted to intercarrier frequency by the regenerated
picture carrier (VCO). The mixer output signal is fed via a
high-pass for attenuation of the video signal components.

1995 Sep 05 7

Philips Semiconductors Preliminary specification

Multistandard VIF-PLL and
FM-PLL demodulator

TDA9806

FM detector

The FM detector consists of a limiter, an FM-PLL and an
AF amplifier. The limiter provides the amplification and
limitation of the FM sound intercarrier signal before
demodulation. The result is high sensitivity and AM
suppression. The amplifier consists of 7 stages which are
internally AC-coupled in order to minimize the DC offset
and to save pins for DC decoupling.

The FM-PLL consists of an integrated relaxation oscillator,
an integrated loop filter and a phase detector. The
oscillator is locked to the FM intercarrier signal, output
from the limiter. As a result of locking, the oscillator
frequency tracks with the modulation of the input signal
and the oscillator control voltage is superimposed by the
AF voltage. The FM-PLL operates as an FM-demodulator.

The AF amplifier consists of two parts:

1. The AF preamplifier for FM sound is an operational
amplifier with internal feedback, high gain and high
common mode rejection. The AF voltage from the PLL
demodulator, by principle a small output signal, is
amplified by approximately 33 dB. The low-pass
characteristic of the amplifier reduces the harmonics of
the intercarrier signal at the sound output terminal, at
which the de-emphasis network for FM sound is
applied. An additional DC control circuit is
implemented to keep the DC level constant,
independent of process spread.

2. The AF output amplifier (10 dB) provides the required
output level by a rail-to-rail output stage. This amplifier
makes use of an input selector for switching to FM
de-emphasis or mute state, controlled by the mute
switching voltage.

Internal voltage stabilizer and

1

⁄2VP-reference

The bandgap circuit internally generates a voltage of
approximately 1.25 V, independent of supply voltage and
temperature. A voltage regulator circuit, connected to this
voltage, produces a constant voltage of 3.6 V which is
used as an internal reference voltage.

For all audio output signals the constant reference voltage
cannot be used because large output signals are required.
Therefore these signals refer to half the supply voltage to
achieve a symmetrical headroom, especially for the
rail-to-rail output stage. For ripple and noise attenuation
the

1

⁄2VPvoltage has to be filtered via a low-pass filter by

using an external capacitor together with an integrated
resistor (fg= 5 Hz). For a fast setting to 1⁄2VP an internal
start-up circuit is added.

1995 Sep 05 8

Philips Semiconductors Preliminary specification

Multistandard VIF-PLL and
FM-PLL demodulator

TDA9806

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Notes

1. I

P

= 110 mA; T

amb

=70°C; R

th j-a

= 60 K/W.

2. Charge device model class B: equivalent to discharging a 200 pF capacitor via a 0 Ω series resistor.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

P

supply voltage (pin 29) maximum chip temperature

of 120 °C; note 1

0 5.5 V

V

i

voltage at pins 1 to 7, 12 to 19, 22, 23, 28
and 29

0V

P

V

t

s(max)

maximum short-circuit time − 10 s

V

19

tuner AGC output voltage 0 13.2 V

T

stg

storage temperature −25 +150 °C

T

amb

operating ambient temperature −20 +70 °C

V

es

electrostatic handling voltage note 2 −300 +300 V

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air 60 K/W