Datasheet TDA8926TH Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA8926TH

Power stage 2 × 50 W class-D
audio amplifier

Preliminary specification
Supersedes data of 2002 Feb 07

2002 Oct 22

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

CONTENTS

1 FEATURES
2 APPLICATIONS
3 GENERAL DESCRIPTION
4 QUICK REFERENCE DATA
5 ORDERING INFORMATION
6 BLOCK DIAGRAM
7 PINNING
8 FUNCTIONAL DESCRIPTION

8.1 Power stage

8.2 Protection

8.2.1 Overtemperature

8.2.2 Short-circuit across the loudspeaker terminals

8.3 BTL operation
9 LIMITING VALUES
10 THERMAL CHARACTERISTICS
11 QUALITY SPECIFICATION
12 DC CHARACTERISTICS
13 AC CHARACTERISTICS
14 SWITCHING CHARACTERISTICS

14.1 Duty factor

TDA8926TH

15 TEST AND APPLICATION INFORMATION

15.1 BTL application

15.2 Package ground connection

15.3 Output power

15.4 Reference design

15.5 Curves measured in reference design
16 PACKAGE OUTLINE
17 SOLDERING

17.1 Introduction to soldering surface mount
packages

17.2 Reflow soldering

17.3 Wave soldering

17.4 Manual soldering

17.5 Suitability of surface mount IC packages for
wave and reflow soldering methods

18 DATA SHEET STATUS
19 DEFINITIONS
20 DISCLAIMERS

2002 Oct 22 2

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

1 FEATURES

• High efficiency (>94%)

• Operating voltage from ±15 to ±30 V

• Very low quiescent current

• High output power

• Short-circuit proof across the load, only in combination

with controller TDA8929T

• Diagnostic output

• Usable as a stereo Single-Ended (SE) amplifier or as a

mono amplifier in Bridge-Tied Load (BTL)

• Standby mode

• Electrostatic discharge protection (pin to pin)

• Thermally protected, onlyin combination with controller

TDA8929T.

2 APPLICATIONS

• Television sets

• Home-sound sets

• Multimedia systems

• All mains fed audio systems

• Car audio (boosters).

TDA8926TH

3 GENERAL DESCRIPTION

The TDA8926TH is the switching power stage of a
two-chip set for a high efficiency class-D audio power
amplifier system. The system is split into two chips:

• TDA8926TH: a digital power stage in a HSOP24 power

package

• TDA8929T: the analog controller chip in a SO24

package.

With this chip set a compact 2 × 50 W audio amplifier
systemcanbebuilt,operatingwithhighefficiency and very
low dissipation. No heatsink is required, or depending on
supply voltage and load, a very small one. The system
operates over a wide supply voltage range from
±15 up to ±30 V and consumes a very low quiescent
current.

4 QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

General; VP= ±25 V

V

P

I

q(tot)

η efficiency P

supply voltage ±15 ±25 ±30 V
total quiescent current no load connected − 35 45 mA

=30W − 94 − %

o

Stereo single-ended configuration

P

o

output power RL=8Ω; THD = 10%; VP= ±25 V 30 37 − W

=4Ω; THD = 10%; VP= ±21 V 40 50 − W

R

L

Mono bridge-tied load configuration

P

o

output power RL=8Ω; THD = 10%; VP= ±21 V 80 100 − W

5 ORDERING INFORMATION

PACKAGE

TYPE NUMBER

NAME DESCRIPTION VERSION

TDA8926TH HSOP24 plastic, heatsink small outline package; 24 leads; low stand-off

height

SOT566-3

2002 Oct 22 3

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

6 BLOCK DIAGRAM

handbook, full pagewidth

LIM

EN1

SW1

REL1

STAB

DIAG

POWERUP

EN2

SW2

REL2

STAB

17

24
21
22
6

23

14

13
16
15
7

CONTROL

HANDSHAKE

temp

current

CONTROL

HANDSHAKE

TDA8926TH

DRIVER

HIGH

AND

DRIVER

LOW

TEMPERATURE SENSOR

AND

CURRENT PROTECTION

DRIVER

HIGH

AND

DRIVER

LOW

V

DD2VDD1

11 2

V

V

SS1

DD2

TDA8926TH

3

BOOT1

4

OUT1

10

BOOT2

9

OUT2

1, 7, 12, 18, 20

n.c.

V

Fig.1 Block diagram.

19 5 8

SS(sub)

V

SS1VSS2

MGW139

2002 Oct 22 4

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

7 PINNING

SYMBOL PIN DESCRIPTION

n.c. 1 not connected
V

DD1

BOOT1 3 bootstrap capacitor; channel 1
OUT1 4 PWM output; channel 1
V

SS1

STAB 6 decoupling internal stabilizer for

n.c. 7 not connected
V

SS2

OUT2 9 PWM output; channel 2
BOOT2 10 bootstrap capacitor; channel 2
V

DD2

n.c. 12 not connected
EN2 13 digital enable input; channel 2
POWERUP 14 enable input for switching on

REL2 15 digital control output; channel 2
SW2 16 digital switch input; channel 2
LIM 17 pin reserved for testing; connect

n.c. 18 not connected
V

SS(sub)

n.c. 20 not connected
SW1 21 digital switch input; channel 1
REL1 22 digital control output; channel 1
DIAG 23 digital open-drain output for

EN1 24 digital enable input; channel 1

2 positive power supply; channel 1

5 negative power supply; channel 1

logic supply

8 negative power supply; channel 2

11 positive power supply; channel 2

internal reference sources

to VSS in the application

19 negative supply (substrate)

overtemperature and overcurrent
report

handbook, halfpage

EN1
DIAG
REL1

SW1

n.c.

V

SS(sub)

n.c.
LIM

SW2

REL2

POWERUP

EN2

24
23
22
21
20
19
18
17

16
15
14
13

TDA8926TH

MGW143

Fig.2 Pin configuration.

TDA8926TH

n.c.

1

V

2

DD1

BOOT1

3

OUT1

4

V

5

SS1

STAB

6

n.c.

7
8

V

SS2

OUT2

9

BOOT2

10

V

11

DD2

n.c.

12

2002 Oct 22 5

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

8 FUNCTIONAL DESCRIPTION

The combination of the TDA8926TH and the controller
TDA8929T produces a two-channel audio power amplifier
system using the class-D technology (see Fig.3). In the
TDA8929T controller the analog audio input signal is
converted into a digital Pulse Width Modulation (PWM)
signal.

The power stage TDA8926TH is used for driving the
low-passfilter and theloudspeakerload. It performs alevel
shiftfromthelow-powerdigitalPWMsignal, at logic levels,
to a high-power PWM signal that switches between the
main supply lines. A 2nd-order low-pass filter converts the
PWM signal into an analog audio signal across the
loudspeaker.

For a description of the controller, see data sheet

“TDA8929T, Controller class-D audio amplifier”

8.1 Power stage

The power stage contains the high-power DMOS
switches,the drivers, timing and handshakingbetweenthe
power switches and some control logic. For protection, a
temperature sensor and a maximum current detector are
built-in on the chip.

For interfacing with the controller chip the following
connections are used:

• Switch (pins SW1 and SW2): digital inputs; switching
from VSS to VSS+ 12 V and driving the power DMOS
switches

• Release (pins REL1 and REL2): digital outputs;
switching from VSSto VSS+ 12 V; follow SW1 and SW2
with a small delay

• Enable (pins EN1 and EN2): digital inputs; at a level of
VSSthe power DMOS switches are open and the PWM
outputs are floating; at a level of VSS+ 12 V the power
stage is operational and controlled by the switch pin if
pin POWERUP is at VSS+12V

• Power-up (pin POWERUP): analog input; at LOW level
with respect to VSS the device is in standby mode and
the supply current is practically zero. With a HIGH level
on this pin, the device is in operating mode

• Diagnostics(pin DIAG): digital open-drain output; pulled
to VSS if the temperature or maximum current is
exceeded.

.

TDA8926TH

8.2 Protection

Temperature and short-circuit protection sensors are
included in the TDA8926TH. The protection circuits are
operational only in combination with the controller
TDA8929T. In the event that the maximum current or
maximum temperature is exceeded the diagnostic output
is activated. The controller has to take appropriate
measures by shutting down the system.

8.2.1 OVERTEMPERATURE
If the junction temperature (Tj) exceeds 150 °C, then

pin DIAG becomes LOW. The diagnostic pin is released if
the temperature is dropped to approximately 130 °C, so
there is a hysteresis of approximately 20 °C.

8.2.2 SHORT-CIRCUIT ACROSS THE LOUDSPEAKER

TERMINALS

When the loudspeaker terminals are short-circuited This
will be detected by the current protection. If the output
current exceeds the maximum output current of 5 A, then
pin DIAG becomes LOW. The controller should shut down
the system to prevent damage. Using the TDA8929T the
system is shut down within 1 µs, and after 220 ms it will
attempt to restart the system again. During this time the
dissipation is very low, therefore the average dissipation
during a short circuit is practically zero.

2002 Oct 22 6

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2002 Oct 22 7

V

OUT1

BOOT2

OUT2

DDA

BOOT1

V

SSA

+25 V

−25 V

MBL510

V

SSA

V

V

i(1)

MODE

V

i(2)

R

OSC

IN1−

IN1+

SGND1

OSC

MODE

SGND2

IN2+

IN2−

V

SSAVDDA

4

5

2

SGND

7

6

SGND

11

8

9

V

SS2(sub)

V

SS1VDD1

3

1

TDA8929T

INPUT

STAGE

mute

OSCILLATOR

MODE

mute

INPUT

STAGE

12 10

V

SSAVDDA

PWM

MODULATOR

PWM

MODULATOR

V

DD2

R

fb

STABI

MANAGER

R

fb

18

V

SSD

20

23
24

21
19

22
15

16

13
14
17

PWM1

REL1
SW1

EN1

STAB

DIAGCUR

DIAGTMP

EN2

SW2
REL2

PWM2

REL1

SW1

EN1

STAB

DIAG

POWERUP

EN2

SW2

REL2

TDA8926TH

22

CONTROL

21

AND

24

HANDSHAKE

6

TEMPERATURE SENSOR

23

CURRENT PROTECTION

14

13

CONTROL

16

AND

HANDSHAKE

15

1, 7, 12, 18, 20
n.c.

AND

19

V

SS(sub)

DRIVER

HIGH

DRIVER

LOW

DRIVER

HIGH

DRIVER

LOW

V

V

DD2VDD1

11 2

58

17

V

LIM

V

SSD

DDD

SS1

V

V

SS1

DD2

10

V

3

4

9

SS2

SGND

(0 V)

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio

amplifier

TDA8926TH

Fig.3 Typical application schematic of the class-D system using the controller TDA8929T and the TDA8926TH.

handbook, full pagewidth

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

8.3 BTL operation

BTL operation can be achieved by driving the audio input
channels of the controller in the opposite phase and by
connecting the loudspeaker with a BTL output filter
between the two outputs (pins OUT1 and OUT2) of the
power stage (see Fig.4).

handbook, full pagewidth

TDA8926TH

EN1

SW1

REL1

STAB

DIAG

POWERUP

EN2

SW2

REL2

24
21
22
6

23

14

13
16
15

CONTROL

AND

HANDSHAKE

temp

TEMPERATURE SENSOR

current

CURRENT PROTECTION

CONTROL

AND

HANDSHAKE

TDA8926TH

In this way the system operates as a mono BTL amplifier
and with the same loudspeaker impedance a four times
higher output power can be obtained.

For more information see Chapter 15.

V

DD2VDD1

11 2

3

BOOT1

DRIVER

AND

HIGH

DRIVER

LOW

V
V

DRIVER

HIGH

DRIVER

LOW

SS1
DD2

OUT1

4

SGND

(0 V)

10

BOOT2

OUT2

9

1, 7, 12, 18, 20 8

n.c.

V

Fig.4 Mono BTL application.

2002 Oct 22 8

19

SS(sub)

LIM

17

V

SS1VSS2

5

MBL511

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio

TDA8926TH

amplifier

9 LIMITING VALUES

In accordance with the Absolute Maximum Rate System (IEC 60134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

P

V

P(sc)

I

ORM

T

stg

T

amb

T

vj

V

es(HBM)

V

es(MM)

supply voltage −±30 V
supply voltage for

−±30 V

short-circuits across the load
repetitive peak current in

− 5A

output pins
storage temperature −55 +150 °C
ambient temperature −40 +85 °C
virtual junction temperature − 150 °C
electrostatic discharge

voltage (HBM)

note 1

all pins with respect to V
all pins with respect to V

(class 1a) −1000 +1000 V

DD

(class 1a) −1000 +1000 V

SS

all pins with respect to each other

−500 +500 V

(class 1a)

electrostatic discharge
voltage (MM)

note 2

all pins with respect to V
all pins with respect to V

(class A1) −150 +150 V

DD

(class B) −200 +200 V

SS

all pins with respect to each other

−100 +100 V

(class A1)

Notes

1. Human Body Model (HBM); R

= 1500 Ω; C = 100 pF.

s

2. Machine Model (MM); Rs=10Ω; C = 200 pF; L = 0.75 µH.

10 THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R
R

th(j-a)
th(j-c)

thermal resistance from junction to ambient in free air 40 K/W
thermal resistance from junction to case in free air 1 K/W

11 QUALITY SPECIFICATION

In accordance with

“SNW-FQ611-part D”

if this device is used as an audio amplifier (except for ESD, see also Chapter 9).

2002 Oct 22 9

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio

TDA8926TH

amplifier

12 DC CHARACTERISTICS

VP= ±25 V; T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V

P

I

stb

I

q(tot)

Internal stabilizer logic supply (pin STAB)

V

O(STAB)

Switch inputs (pins SW1 and SW2)

V

IH

V

IL

Control outputs (pins REL1 and REL2)

V

OH

V

OL

Diagnostic output (pin DIAG, open-drain)

V

OL

I

LO

Enable inputs (pins EN1 and EN2)

V

IH

V

IL

V

EN(hys)

I

I(EN)

Switching-on input (pin POWERUP)

V

POWERUP

I

I(POWERUP)

Temperature protection

T

diag

T

hys

=25°C; measured in test diagram of Fig.6; unless otherwise specified.

amb

supply voltage note 1 ±15 ±25 ±30 V
standby current V

EN1=VEN2

V

POWERUP

=0V;

=0V

− 25 100 µA

total quiescent current no load connected − 35 45 mA

outputs floating − 510mA

stabilizer output voltage 11 13 15 V

HIGH-level input voltage referenced to V
LOW-level input voltage referenced to V

HIGH-level output voltage referenced to V
LOW-level output voltage referenced to V

LOW-level output voltage I

= 1 mA; note 2 0 − 1.0 V

DIAG

SS
SS

SS
SS

10 − V

STAB

0 − 2V

10 − V

STAB

0 − 2V

output leakage current no error condition −−50 µA

HIGH-level input voltage referenced to V
LOW-level input voltage referenced to V

SS
SS

− 9V

STAB

05−V
hysteresis voltage − 4 − V
input current −−300 µA

switching-on input voltage referenced to V

SS

operating level 5 − 12 V
standby level 0 − 2V

input current V

temperature activating diagnostic V
hysteresis on temperature

POWERUP

DIAG=VDIAG(LOW)

V

DIAG=VDIAG(LOW)

=12V − 100 170 µA

150 −−°C

− 20 −°C

diagnostic

V

V

V

Notes

1. The circuit is DC adjusted at V

= ±15 to ±30 V.

P

2. Temperature sensor or maximum current sensor activated.

2002 Oct 22 10

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio

TDA8926TH

amplifier

13 AC CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Single-ended application; note 1

P

o

output power RL=8Ω; THD = 0.5%; VP= ±25 V 25

THD total harmonic distortion P

G

v(cl)

closed-loop voltage gain 29 30 31 dB

η efficiency P
Mono BTL application; note 5
P

o

output power RL=8Ω; VP= ±21 V

THD total harmonic distortion P

G

v(cl)

closed loop voltage gain 35 36 37 dB

η efficiency P

R

=8Ω; THD = 10%; VP= ±25 V 30

L

R

=4Ω; THD = 0.5%; VP= ±21 V 30

L

=4Ω; THD = 10%; VP= ±21 V 40

R

L

= 1 W; note 3

o

f

= 1 kHz − 0.01 0.05 %

i

f

= 10 kHz − 0.1 − %

i

= 30 W; fi= 1 kHz; note 4 − 94 − %

o

THD = 0.5% 70
THD = 10% 80

= 1 W; note 3

o

f

= 1 kHz − 0.01 0.05 %

i

f

= 10 kHz − 0.1 − %

i

= 30 W; fi= 1 kHz; note 4 − 94 − %

o

(2)

30 − W

(2)

37 − W

(2)

40 − W

(2)

50 − W

(2)

80 − W

(2)

100 − W

Notes

1. V

= ±25 V; RL=4Ω;fi= 1 kHz; f

P

= 310 kHz; Rs= 0.1 Ω(seriesresistance of filter coil);T

osc

=25°C; measured

amb

in reference design (SE application) shown in Fig.7; unless otherwise specified.

2. Indirectly measured; based on R

measurement.

ds(on)

3. Total Harmonic Distortion (THD) is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using
a low-order low-pass filter a significantly higher value will be found, due to the switching frequency outside the audio
band.

4. Efficiency for power stage; output power measured across the loudspeaker load.

5. VP= ±25 V;RL=8Ω;fi= 1 kHz; f

= 310 kHz; Rs= 0.1 Ω(seriesresistance of filter coil);T

osc

=25°C; measured

amb

in reference design (BTL application) shown in Fig.4; unless otherwise specified.

2002 Oct 22 11

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio

TDA8926TH

amplifier

14 SWITCHING CHARACTERISTICS

VP= ±25 V; T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

PWM outputs (pins OUT1 and OUT2); see Fig.5

t

r

t

f

t

blank

t

PD

t

W(min)

R

ds(on)

Note

1. When used in combination with controller TDA8929T, the effective minimum pulse width during clipping is 0.5t

14.1 Duty factor

For the practical useable minimum and maximum duty factor (δ) which determines the maximum output power:

t

×

W(min)fosc

------------------------------­2

=25°C; measured in Fig.6; unless otherwise specified.

amb

rise time − 30 − ns
fall time − 30 − ns
blanking time − 70 − ns
propagation delay from pin SW1 (SW2) to

− 20 − ns

pin OUT1 (OUT2)
minimum pulse width note 1 − 220 270 ns
on-resistance of the output

− 0.2 0.3 Ω

transistors

×

t

W(min)fosc



× 100% < δ < × 100%

–

1

-------------------------------



2

W(min)

.

Using the typical value this becomes 3.5% < δ < 96.5%.

2002 Oct 22 12

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

handbook, full pagewidth

V

DD

PWM

output

(V)

0 V

V

SS

t

r

t

PD

V

STAB

V

SW

(V)

V

SS

t

f

1/f

osc

t

blank

TDA8926TH

V

V

REL
(V)

STAB

V

SS

100 ns

Fig.5 Timing diagram PWM output, switch and release signals.

MGW145

2002 Oct 22 13

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2002 Oct 22 14

12 V

12 kΩ

POWERUP

handbook, full pagewidth

EN1

24

SW1

21

REL1

22

STAB

6

DIAG

23

14

TDA8926TH

CONTROL

AND

HANDSHAKE

temp

TEMPERATURE SENSOR

current

CURRENT PROTECTION

AND

DRIVER

HIGH

DRIVER

LOW

V

DD2VDD1

11 2

V

SS1

V

DD2

BOOT1

3

15 nF

OUT1

4

V

V

OUT1

BOOT2

10

15 TEST AND APPLICATION INFORMATION

amplifier

2V

DD

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio

EN2

V

REL2

SW2

REL2

13

CONTROL

16
15

AND

HANDSHAKE

1, 7, 12, 18, 20 8

n.c.

100

nF

V

V

V

V

V

EN

12 V

SW1

0

V

REL1

STAB

V

V

DIAG

V

POWERUP

V

12 V

V

SW2

0

19
V

SS(sub)

DRIVER

HIGH

DRIVER

LOW

17

LIM

15 nF

OUT2

9

V

V

5
V

V

SS1

OUT2

SS2

MBL509

TDA8926TH

Fig.6 Test diagram.

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio

TDA8926TH

amplifier

15.1 BTL application

When using the system in a mono BTL application (for more output power), the inputs of both channels of the PWM
modulator must be connected in parallel; the phase of one of the inputs must be inverted. In principle the loudspeaker
can be connected between the outputs of the two single-ended demodulation filters.

15.2 Package ground connection

The heatsink of the TDA8926TH is connected internally to VSS.

15.3 Output power

The output power in single-ended applications can be estimated using the formula

R

-----------------------------------------------­RLR

=

P

o(1%)

--------------------------------------------------------------------------------------------------------------------------

The maximum current should not exceed 5 A.

L

++()

ds(on)Rs

2R

I

O(max)

=

1t

V

P

×

VP1t

----------------------------------------------------------------

W(min)fosc

L

W(min)fosc

R

R

++

L

ds(on)Rs

The output power in BTL applications can be estimated using the formula

2

×–()××

×–()×[]

R

----------------------------------------------------------

P

o(1%)

RL2R

=

----------------------------------------------------------------------------------------------------------------------------------------

The maximum current should not exceed 5 A.

L

+()×+

ds(on)Rs

I

O(max)

2V

2R

×

2VP1t

=

-------------------------------------------------------------------- ­R

1t

P

L

2R

L

W(min)fosc

×–()×[]

W(min)fosc

+()×+

ds(on)Rs

2

×–()××

Where:

RL= load impedance
Rs= series resistance of filter coil
P

= output power just at clipping

o(1%)

The output power at THD = 10%: P

o(10%)

= 1.25 × P

o(1%)

.

15.4 Reference design

The reference design for a two-chip class-D audio amplifier for TDA8926TH and controller TDA8929T is shown in Fig.7.

2002 Oct 22 15

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2002 Oct 22 16

V

mode select

DDA

R1

R2

39 kΩ

39 kΩ

on

D1

mute

V

SS

off

V

(pin 12)

470 nF

R5
10 kΩ

J2

S1

SSA

GND

J5
J6

C7

J3J1

inputs

(5.6 V)

GND

C6

C5

470 nF

470 nF

R4
10 kΩ

C9

1 nF

QGND QGND

27 kΩ

220 nF

330 pF

330 pF

470 nF

R6
10 kΩ

1 nF

C10

R3

C2

J4

C1
220 nF

C3

C4

C8

input 2input 1

V

DDA

MODE

OSC

SGND1

SGND2

IN1

IN1
IN2

IN2

R7
10 kΩ

V

DD1

6

7

2

11

+

5

−

4

+

8

−

9

C11
C12

V

DD2

3

10 12

TDA8929T

CONTROLLER

+

GND

−

n.c.

25 V

25 V

U2

15

220 nF
220 nF

V

100 nF
V

V

100 nF

SS2

V

V

DDD

V

SSA

V

SS1

1

PWM2

17

SW2

13

REL2

14

EN2

16

STAB

19

18

22

21
23
24
20

QGND

C16

DD
1
2
3

SS

C17

QGND

V

SSD

DIAGCUR

EN1
REL1
SW1
PWM1

QGND

C13
220 nF

C15
180 pF

bead

R9
10 kΩ

R10

9.1 kΩ

bead

V

SSD

V

SSA

L5

L6

R8

1 kΩ

V

V

SSD

SSD

bead

V

DDD

V

SSD

L7

POWERUP

C14

220 nF

V

SS(sub)

SW2

REL2

EN2

STAB

DIAG

EN1

REL1

SW1

LIM

19

16
15
13

U1

TDA8926TH

14

or

TDA8927TH

6

23

POWER STAGE

24
22
21

17

1, 7, 12, 18, 20

n.c.

C18

C19

220 nF

220 nF

C20

C21

220 nF

220 nF

power supply

560 pF

9

OUT2

10

BOOT2

V

DD1

2

V

DD2

11

220 nF

V

SS2

8

V

SS1

5

BOOT1

3

OUT1

4

560 pF

C22
47 µF
(35 V)

C23
47 µF
(35 V)

C24

R12

5.6 Ω

C27

R14

5.6 Ω
C34

V

GND

V

C33
15 nF

V

DDA

SSA

C26
15 nF

DDDVSSD

MGU717

SSD

C28
220

nF

C25
560 pF

R13

5.6 Ω

R15

5.6 Ω
C35

560 pF

C29
220 nF

C30
220 nF

33 µH

C31
1500 µF
(35 V)

C32
1500 µF
(35 V)

33 µH

QGND

C40

R16
24 Ω

C38
220 nF

C39
220 nF

R17
24 Ω

15 nF

C41

15 nF

C42

15 nF

C43

15 nF

QGND

GND

QGND

QGND

L2

C36

470 nF

V

DDD

V

SSD

C37

470 nF

L4

OUT2

OUT2

OUT2

OUT1

OUT1

OUT1

−

1

2

+

−

2

1

+

−

2

1

+

outputs

4 or 8 Ω

SE

8 Ω

BTL

4 or 8 Ω

SE

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio

amplifier

Resistor R1 value ≤Ω.

V

---------------------------------------- -

Working voltage of SMD capacitors connected between V

DD(min)

100 µA

5.6 V–

and VSS must be at least 63 V.

DD

Capacitors C31 and C32 are electrolytic capacitors with low ESR.
Capacitors C36 and C37 are MKT types.
R9 and R10 are necessary only in BTL applications with asymmetrical supply.
In BTL applications: remove input 2; remove R6, R7, C4, C7 and C8; close J5 and J6.
In BTL applications: demodulation coils L2 and L4 should be matched.
Inputs referred to QGND (close J1 and J4) or referred to VSS (close J2 and J3).

Fig.7 Two-chip class-D audio amplifier application diagram for TDA8926TH and controller TDA8929T.

TDA8926TH

handbook, full pagewidth

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

15.5 Curves measured in reference design

2

10

handbook, halfpage

THD+N

(%)

10

1

−1

10

−2

10

−3

10

−2

10

2 × 8 Ω SE; VP= ±25 V.
(1) 10 kHz.
(2) 1 kHz.
(3) 100 Hz.

(1)

(2)

(3)

−1

10

1

10 10

MLD627

2

Po (W)

3

10

2

10

handbook, halfpage

THD+N

(%)

10

1

−1

10

−2

10

−3

10

10 10

2 × 8 Ω SE; VP= ±25 V.
(1) Po=10W.
(2) Po=1W.

TDA8926TH

MLD628

(1)

(2)

2

3

10

4

10

fi (Hz)

5

10

Fig.8 Total harmonic distortion plus noise as a

function of output power.

2

10

handbook, halfpage

THD+N

(%)

10

1

−1

10

−2

10

−3

10

−2

10

2 × 4 Ω SE; VP= ±21 V.
(1) 10 kHz.
(2) 1 kHz.
(3) 100 Hz.

(1)

(2)

(3)

−1

10

1

10 10

MGU859

2

Po (W)

Fig.9 Total harmonic distortion plus noise as a

function of input frequency.

2

10

handbook, halfpage

THD+N

(%)

10

1

−1

10

−2

10

−3

3

10

10

10 10

2

(1)

(2)

3

10

2 × 4 Ω SE; VP= ±21 V.
(1) Po=10W.
(2) Po=1W.

MLD630

4

10

fi (Hz)

5

10

Fig.10 Total harmonic distortion plus noise as a

function of output power.

2002 Oct 22 17

Fig.11 Total harmonic distortion plus as a function

of input frequency.

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

2

10

handbook, halfpage

THD+N

(%)

10

1

−1

10

−2

10

−3

10

−2

10

1 × 8 Ω BTL; VP= ±21 V.
(1) 10 kHz.
(2) 1 kHz.
(3) 100 Hz.

(1)

(2)

(3)

−1

10

1

10 10

MGU860

2

Po (W)

3

10

2

10

handbook, halfpage

THD+N

(%)

10

1

−1

10

−2

10

−3

10

10 10

1 × 8 Ω BTL; VP= ±21 V.
(1) Po=10W.
(2) Po=1W.

TDA8926TH

MLD632

(1)

(2)

2

3

10

4

10

fi (Hz)

5

10

Fig.12 Total harmonic distortion plus noise as a

function of output power.

25

handbook, halfpage

P

(W)

20

15

10

5

0

−2

10

VP= ±21 V; fi= 1 kHz.
(1) 2 × 4 Ω SE.
(2) 1 × 8 Ω BTL.
(3) 2 × 8 Ω SE.

(1)

−1

10

1

10 10

MGU855

(2)

(3)

2

Po (W)

Fig.14 Power dissipation as a function of output

power.

Fig.13 Total harmonic distortion plus noise as a

function of input frequency.

100

handbook, halfpage

η

(%)

(3)

(1)

80

60

40

20

3

10

0

0

20 40 60 80

VP= ±21 V; fi= 1 kHz.
(1) 2 × 4 Ω SE.
(2) 1 × 8 Ω BTL.
(3) 2 × 8 Ω SE.

MGU856

(2)

Po (W)

100

Fig.15 Efficiency as a function of output power.

2002 Oct 22 18

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

200

handbook, halfpage

P

o

(W)

160

120

80

40

0

10

THD+N=0.5%; fi= 1 kHz.
(1) 1 × 8 Ω BTL.
(2) 2 × 4 Ω SE.
(3) 2 × 8 Ω SE.

15

(1)

(2)

20 25 30

MGU857

(3)

35

VP (V)

200

handbook, halfpage

P

o

(W)

160

120

80

40

0

10

THD + N = 10%; fi= 1 kHz.
(1) 1 × 8 Ω BTL.
(2) 2 × 4 Ω SE.
(3) 2 × 8 Ω SE.

TDA8926TH

MGU858

(1)

(2)

15

20 25 30

(3)

35

VP (V)

Fig.16 Output power as a function of supply

voltage.

handbook, halfpage

0

α

cs

(dB)

−20

−40

−60

−80

−100

10

2 × 8 Ω SE; VP= ±21 V.
(1) Po=10W.
(2) Po=1W.

10

(1)

(2)

2

3

10

4

10

MLD613

fi (Hz)

Fig.17 Output power as a function of supply

voltage.

handbook, halfpage

5

10

0

α

cs

(dB)

−20

−40

−60

−80

−100

10

2 × 4 Ω SE; VP= ±21 V.
(1) Po=10W.
(2) Po=1W.

10

(1)

(2)

2

3

10

MLD614

4

10

fi (Hz)

5

10

Fig.18 Channel separation as a function of input

frequency.

2002 Oct 22 19

Fig.19 Channel separation as a function of input

frequency.

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

45

handbook, halfpage

G

(dB)

40

35

30

25

20

10

2

10

3

10

VP= ±21 V; Vi= 100 mV; Rs=10kΩ/Ci= 330 pF.
(1) 1 × 8 Ω BTL.
(2) 2 × 8 Ω SE.
(3) 2 × 4 Ω SE.

MLD615

(1)

(2)

(3)

4

10

fi (Hz)

5

10

45

handbook, halfpage

G

(dB)

40

35

30

25

20

10

2

10

VP= ±21 V; Vi= 100 mV; Rs=0Ω.
(1) 1 × 8 Ω BTL.
(2) 2 × 8 Ω SE.
(3) 2 × 4 Ω SE.

TDA8926TH

MLD616

(1)

(2)

(3)

3

10

4

10

fi (Hz)

5

10

Fig.20 Gain as a function of input frequency.

handbook, halfpage

0

SVRR

(dB)

−20

−40

(1)

−60

−80

−100

10

VP= ±21 V; V

ripple(p-p)

10

(2)
(3)

2

=2V.
(1) Both supply lines in antiphase.
(2) Both supply lines in phase.
(3) One supply line rippled.

3

10

10

4

MLD617

fi (Hz)

Fig.21 Gain as a function of input frequency.

handbook, halfpage

0

SVRR

(dB)

−20

−40

−60

(1)

(2)
(3)

−80

5

10

−100
05

1

234

V

ripple(p-p)

VP= ±21 V.
(1) f
(2) f
(3) f

ripple
ripple
ripple

= 1 kHz.
= 100 Hz.
=10Hz.

MLD618

(V)

Fig.22 Supply voltage ripple rejection as a function

of input frequency.

2002 Oct 22 20

Fig.23 Supply voltage ripple rejection as a function

of ripple voltage (peak-to-peak value).

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

100

handbook, halfpage

I

q

(mA)

80

60

40

20

0

0102030

MLD619

37.5

V

(V)

P

380

handbook, halfpage

f

clk

(kHz)

372

364

356

348

340

0102030

TDA8926TH

MLD620

40

V

(V)

P

RL= open-circuit.

Fig.24 Quiescent current as a function of supply

voltage.

MLD621

(1)

(2)

Po (W)

V

ripple

(V)

5

4

3

2

1

0

−2

10

handbook, halfpage

−1

10

11010

2

RL= open-circuit.

Fig.25 Clock frequency as a function of supply

voltage.

handbook, halfpage

5

SVRR

(%)

4

3

(1)

2

1

(2)

0

10 10

2

10

3

10

fi (Hz)

MLD622

4

VP= ±21 V; 1500 µF per supply line; fi=10Hz.
(1) 1 × 4 Ω SE.
(2) 1 × 8 Ω SE.

Fig.26 Supply voltage ripple as a functionofoutput

power.

2002 Oct 22 21

VP= ±21 V; 1500 µF per supply line.
(1) Po= 30 W into 1 × 4 Ω SE.
(2) Po= 15 W into 1 × 8 Ω SE.

Fig.27 Supply voltage ripple rejection as a function

of input frequency.

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

f

(1)

(2)

(3)

clk

MLD623

(kHz)

600100

10

handbook, halfpage

THD+N

(%)

1

−1

10

−2

10

−3

10

VP= ±21 V; Po= 1 W in 2 × 8 Ω.
(1) 10 kHz.
(2) 1 kHz.
(3) 100 Hz.

200 300 400 500

TDA8926TH

50

handbook, halfpage

P

o

(W)

40

30

20

10

0

100 600

VP= ±21 V; RL=2×8Ω; fi= 1 kHz; THD+N=10%.

200

300 400 500

f

clk

MLD624

(kHz)

Fig.28 Total harmonic distortion plus noise as a

function of clock frequency.

150

handbook, halfpage

I

q

(mA)

120

90

60

30

0

100 600

200

300 400 500

f

clk

MLD625

(kHz)

Fig.29 Output power as a function of clock

frequency.

1000

handbook, halfpage

V

r(PWM)

(mV)

800

600

400

200

0

100 600

200

300 400 500

f

clk

MLD626

(kHz)

VP= ±25 V; RL= open circuit.

Fig.30 Quiescent current as a function of clock

frequency.

2002 Oct 22 22

VP= ±25 V; RL=2×8Ω.

Fig.31 PWM residual voltage as a function of clock

frequency.

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

16 PACKAGE OUTLINE

HSOP24: plastic, heatsink small outline package; 24 leads; low stand-off height

D

c

y

D

1

1

pin 1 index

12

D

2

x

E

E

2

H

E

TDA8926TH

SOT566-3

A

X

v M

A

E

1

24

Z

DIMENSIONS (mm are the original dimensions)

A

UNIT

mm

Notes

1. Limits per individual lead.

2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

A

2

max.

3.5

3.5 0.35

3.2

e

(1)

bpc

A

A

4

3

+0.08

0.53

−0.04

0.40

0.32

0.23

D

16.0

15.8

13

w M

b

p

0 5 10 mm

scale

(2)

D

1

13.0

12.6

D

1.1

0.9

(2)

E

E

2

11.1

10.9

1

6.2

5.8

E

2.9

2.5

Q

A

2

A

4

detail X

H

L

Q

1.7

1.5

v

0.25w0.25

e

E

14.5

13.9

p

1.1

0.8

2

1

L

x

0.03

(A3)

p

0.07

A

θ

yZ

2.7

2.2

θ

8°
0°

OUTLINE

VERSION

SOT566-3

IEC JEDEC JEITA

REFERENCES

2002 Oct 22 23

EUROPEAN

PROJECTION

ISSUE DATE

02-01-30

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

17 SOLDERING

17.1 Introduction to soldering surface mount
packages

Thistext gives a very brief insight toacomplex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering can still be used for
certainsurface mount ICs, but itisnot suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.

17.2 Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
totheprinted-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.

17.3 Wave soldering

Conventional single wave soldering is not recommended
forsurface mount devices (SMDs) orprinted-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

TDA8926TH

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackages with leads on foursides,the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

17.4 Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

2002 Oct 22 24

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio

TDA8926TH

amplifier

17.5 Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable
HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN,

HVSON, SMS

(4)

PLCC
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

Notes

1. Formoredetailed information on the BGA packages refer to the

2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder

4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.

5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not

6. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is

, SO, SOJ suitable suitable

from your Philips Semiconductors sales office.

temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.

The package footprint must incorporate solder thieves downstream and at the side corners.

suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

(1)

not suitable

“(LF)BGAApplicationNote

SOLDERING METHOD

WAVE REFLOW

(3)

suitable

(4)(5)

suitable

(6)

suitable

”(AN01026);order a copy

(2)

.

2002 Oct 22 25

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio

TDA8926TH

amplifier

18 DATA SHEET STATUS

LEVEL

I Objective data Development This data sheet contains data from the objective specification for product

II Preliminary data Qualification This data sheet contains data from the preliminary specification.

III Product data Production This data sheet contains data from the product specification. Philips

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

DATA SHEET

STATUS

(1)

PRODUCT

STATUS

(2)(3)

development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.

Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.

Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).

DEFINITION

19 DEFINITIONS Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
atthese or at any other conditions above thosegiveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentation or warranty thatsuchapplications will be
suitable for the specified use without further testing or
modification.

20 DISCLAIMERS Life support applications  These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomers using or sellingthese products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes  Philips Semiconductors
reserves the right to make changes in the products ­including circuits, standard cells, and/or software ­described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.

2002 Oct 22 26

Philips Semiconductors Preliminary specification

Power stage 2 × 50 W class-D audio
amplifier

TDA8926TH

NOTES

2002 Oct 22 27

Philips Semiconductors – a w orldwide compan y

Contact information

For additional information please visit http://www.semiconductors.philips.com. Fax: [phone]
For sales offices addresses send e-mail to: [e-mail].

© Koninklijke Philips Electronics N.V. 2002
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Printed in The Netherlands 753503/02/pp28 Date of release: 2002 Oct 22 Document order number: 9397 750 09588

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