Philips TDA8559T User Manual

TDA8559T

Low-voltage stereo headphone ampliﬁer

Rev. 03 — 15 May 2006 Product data sheets

1. General description

The TDA8559T is a stereo ampliﬁer that operates over a wide supply voltage range from

1.9 V to 30 V and consumes a very low quiescent current. This makes it suitable for battery fed applications (2 ×1.5 V cells). Because of an internal voltage buffer, this device can be used with or without a capacitor connected in series with the load. It can be applied as a headphone ampliﬁer, but also as a mono ampliﬁer with a small speaker (25 Ω), or as a line driver in mains applications.

2. Features

n Operating voltage from 1.9 V to 30 V n Very low quiescent current n Low distortion n Few external components n Differential inputs n Usable as a mono ampliﬁer in Bridge-Tied Load (BTL) or stereo Single-Ended (SE) n Single-ended mode without loudspeaker capacitor n Mute and Standby mode n Short-circuit proof to ground, to supply voltage (< 10 V) and across load n No switch on or switch off clicks n ESD protected on all pins

3. Applications

n Portable telephones n MP3 players n Portable audio n Mains fed equipment

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4. Quick reference data

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

Supplies

q(tot)

stb

Stereo application

THD total harmonic distortion P

BTL application

THD total harmonic distortion P

[1] Measured with low-pass ﬁlter 30 kHz.

TDA8559T

Low-voltage stereo headphone ampliﬁer

operating supply voltage 1.9 3 30 V total quiescent current open load - 2.75 4 mA standby supply current open load - - 10 µA

output power THD = 10 % 30 35 - mW

= 20 mW;

= 1 kHz

= 20 mW;

=10kHz

voltage gain 25 26 27 dB small signal roll-off

−1 dB - 750 - kHz

frequency

output power THD = 10 % 125 140 - mW

= 70 mW;

= 1 kHz

= 70 mW;

=10kHz

voltage gain 31 32 33 dB

[1]

- 0.075 0.15 %

[1]

- 0.1 - %

- 0.05 0.1 %

- 0.1 - %

5. Ordering information

Table 2. Ordering information

Type number Package

Name Description Version

TDA8559T SO16 plastic small outline package; 16 leads; body width 3.9 mm; body thickness

1.47 mm

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SOT109-1

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6. Block diagram

TDA8559T

Low-voltage stereo headphone ampliﬁer

STANDBY

+IN1

−IN1

MUTE

MODE

+IN2

−IN2

SVRR

2 3

7 8

5 6

REFERENCE

50 kΩ

kΩ

100 kΩ

V/I

−

50 kΩ

INPUT LOGIC

V/I

−

50 kΩ

TDA8559T

− +

−

BUFFER

50 kΩ

DQC

50 kΩ

1615

OUT1

OUT2

BUFFER

Fig 1. Block diagram

139,10

mgd115

n.c. GND

Product data sheets Rev. 03 — 15 May 2006 3 of 36

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7. Pinning information

7.1 Pinning

TDA8559T

Low-voltage stereo headphone ampliﬁer

STANDBY V

Top view

+IN1 V

−IN1 OUT1

SVRR GND

+IN2 BUFFER

−IN2 OUT2

MUTE n.c.

MODE n.c.

Fig 2. Pin conﬁguration

7.2 Pin description

Table 3. Pin description

Symbol Pin Description

STANDBY 1 standby select +IN1 2 non-inverting input 1

−IN1 3 inverting input 1 SVRR 4 supply voltage ripple rejection +IN2 5 non-inverting input 2

−IN2 6 inverting input 2 MUTE 7 mute select MODE 8 input mode select n.c. 9 not connected n.c. 10 not connected OUT2 11 output 2 BUFFER 12 buffer output (0.5V GND 13 ground OUT1 14 output 1 V

15 high supply voltage 16 low supply voltage

TDA8559T

001aae802

)

Product data sheets Rev. 03 — 15 May 2006 4 of 36

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8. Functional description

The TDA8559T contains two ampliﬁers with differential inputs, a 0.5VPoutput buffer and a high supply voltage stabilizer. Each ampliﬁer consists of a voltage-to-current converter (V/I), an output ampliﬁer and a common dynamic quiescent current controller. The gain of each ampliﬁer is internally ﬁxed at 26 dB (= 20 ×). The 0.5VP output can be used as a replacement for the single-ended capacitors. The two ampliﬁers can also be used as a mono ampliﬁer in a BTL conﬁguration thereby resulting in more output power.

With three mode select pins, the device can be switched into the following modes:

1. Standby mode (IP<10µA)

2. Mute mode

3. Operation mode, with two input selections (the input source is directly connected or connected via coupling capacitors at the input).

The ripple rejection in the stereo application with a single-ended capacitor can be improved by connecting a capacitor between the 0.5VP capacitor pin and ground.

TDA8559T

Low-voltage stereo headphone ampliﬁer

The device is fully protected against short-circuiting of the output pins to ground, to the low supply voltage pin and across the load.

8.1 V/I converters

The V/I converters have a transconductance of 400 µS. The inputs are completely symmetrical and the two ampliﬁers can be used in opposite phase. The Mute mode causes the V/I converters to block the input signal. The input mode pin selects two applications in which the V/I converters can be used.

The ﬁrst application (input mode pin ﬂoating) is used with a supply voltage below 6 V.The input DC level is at ground level (the unused input pin connected to ground) and no input coupling capacitors are necessary. The maximum converter output current is sufﬁcient to obtain an output swing of 3 V (peak).

In the second application with a supply voltage greater than 6 V (input mode pin HIGH), the input mode pin is connected to VP. In this conﬁguration (input DC level is

0.5VP+ 0.6 V) the input source must be coupled with a capacitor and the two unused input pins must be connected via a capacitor to ground, to improve noise performance. This application has a higher quiescent current, because the maximum output current of the V/I converter is higher to obtain an output voltage swing of 9 V (peak).

8.2 Output ampliﬁers

The output ampliﬁers have a transresistance of 50 kΩ, a bandwidth of approximately 750 kHz and a maximum output current of 100 mA. The mid-tap output voltage equals the voltage applied at the non-inverting pin of the output ampliﬁer.This pin is connected to the output of the 0.5VP buffer. This reduces the distortion when the load is connected between an output ampliﬁer and the buffer (because feedback is applied over the load).

8.3 Buffer

The buffer delivers 0.5VPto the output with a maximum output (sink and source) current of 200 mA (peak).

Product data sheets Rev. 03 — 15 May 2006 5 of 36

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8.4 Dynamic quiescent controller

The Dynamic Quiescent Current controller (DQC) gives the advantage of low quiescent current and low distortion. When there are high frequencies in the output signal, the DQC will increase the quiescent current of the two output ampliﬁers and the buffer. This will reduce the crossover distortion that normally occurs at high frequencies and low quiescent current. The DQC gives output currents that are linear with the amplitude and the frequency of the output signals. These currents control the quiescent current.

8.5 Stabilizer

The TDA8559T has a voltage supply range from 1.9 V to 30 V. This range is divided over two supply voltage pins. Pin 16 is 1.9 V to 18 V (breakdown voltage of the process); this pin is preferred for supply voltages less than 18 V. Pin 15 is used for applications where VPis approximately 6 V to 30 V. The stabilizer output is internally connected to the supply voltage pin 16. In the range from 6 V to 18 V, the voltage drop to pin 16 is 1 V.In the range from 18 V to 30 V the stabilizer output voltage (to pin 16) is approximately 17 V.

8.6 Input logic

TDA8559T

Low-voltage stereo headphone ampliﬁer

The MUTE pin (pin 7) selects the Mute mode of the V/I converters. LOW (TTL/CMOS) levelis mute. A voltage between 0.5 V (low level) and 1.5 V (high level) causes a soft mute to operate (no plops). When pin 7 is ﬂoating or greater than 1.5 V it is in the operating condition.

The input mode pin must be connected to VPwhen the supply voltage is greater than 6 V. The input mode logic raises the tail current of the V/I converters and enables the two buffers to bias the inputs of the V/I converters.

8.7 Reference

This circuit supplies all currents needed in this device. With the Standby mode pin 1 (TTL/CMOS), it is possible to switch to the Standby mode and reduce the total quiescent current to below 10 µA.

Product data sheets Rev. 03 — 15 May 2006 6 of 36

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9. Internal circuitry

Table 4. Internal circuits

Symbol Pin Equivalent circuit

STANDBY 1

TDA8559T

Low-voltage stereo headphone ampliﬁer

10 kΩ

kΩ

mgd110

+IN1, −IN1, +IN2 and −IN2

SVRR 4

2, 3, 5 and 6

mgd106

50 kΩ

mgd107

Product data sheets Rev. 03 — 15 May 2006 7 of 36

Philips Semiconductors

TDA8559T

Low-voltage stereo headphone ampliﬁer

Table 4. Internal circuits

…continued

Symbol Pin Equivalent circuit

MUTE 7

MODE 8

1 kΩ

mgd112

250 kΩ

5 kΩ

mgd113

Product data sheets Rev. 03 — 15 May 2006 8 of 36

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TDA8559T

Low-voltage stereo headphone ampliﬁer

Table 4. Internal circuits

…continued

Symbol Pin Equivalent circuit

OUT2 and OUT1 11 and 14

50 Ω

buffer output

BUFFER 12

100 Ω

mgd108

buffer output

and V

15 and 16

2 kΩ

mgd109

mgd111

Product data sheets Rev. 03 — 15 May 2006 9 of 36

Philips Semiconductors

TDA8559T

Low-voltage stereo headphone ampliﬁer

10. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

P2(max)

P1(max)

i(max)

ORM

tot

amb

stg

maximum supply voltage (pin 15) - 30 V maximum supply voltage (pin 16) - 18 V maximum input voltage - 18 V peak output current repetitive - 150 mA total power dissipation - 1.19 W ambient temperature −40 +85 °C storage temperature −55 +150 °C virtual junction temperature - 150 °C short-circuiting time VP<10V - 1 h

11. Thermal characteristics

Table 6. Thermal characteristics

Symbol Parameter Conditions Typ Unit

th(j-a)

thermal resistance from junction to ambient in free air 105

K/W

12. Characteristics

Table 7. Characteristics

VP = 3 V; T

Symbol Parameter Conditions Min Typ Max Unit

DC characteristics

q(tot)

stb

bias

Single-ended stereo application (R

THD total harmonic distortion P

 channel unbalance - - 1 dB

∆G

= 25°C; fi = 1 kHz; unless otherwise speciﬁed.

amb

operating supply voltage

[1]

1.9 3 30 V total quiescent current open load - 2.75 4 mA standby supply current open load - - 10 µA Standby mode voltage standby 0 - 0.5 V

operating 1.5 - 18 V

Mute mode voltage mute 0 - 0.5 V

operating 1.5 - 18 V

input bias current - 100 300 nA

= 32 Ω)

output power THD = 10 % 30 35 - mW

= 20 mW; fi= 1 kHz

= 20 mW; fi=10kHz

[2]

- 0.075 0.15 %

[2]

- 0.1 - % voltage gain 25 26 27 dB small signal roll-off

−1 dB - 750 - kHz

frequency channel separation Rs = 5 kΩ 40--dB

Product data sheets Rev. 03 — 15 May 2006 10 of 36

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TDA8559T

Low-voltage stereo headphone ampliﬁer

Table 7. Characteristics

VP = 3 V; T

= 25°C; fi = 1 kHz; unless otherwise speciﬁed.

amb

…continued

Symbol Parameter Conditions Min Typ Max Unit

no(mute)

noise output voltage noise output voltage in

[3]

-7085µV

[3]

-2030µV mute

o(mute)

output voltage in mute mid-tap voltage 1.4 1.5 1.6 V input impedance 75 100 125 kΩ DC output offset voltage

SVRR supply voltage ripple

[4]

--30µV

[5]

- - 100 mV

[6]

45 55 - dB

rejection

BTL application (R

THD total harmonic distortion P

= 25 Ω)

output power THD = 10 % 125 140 - mW

= 70 mW; fi= 1 kHz - 0.05 0.1 %

= 70 mW; fi= 10 kHz - 0.1 - %

voltage gain 31 32 33 dB small signal roll-off

−1 dB - 750 - kHz

frequency

no(mute)

noise output voltage noise output voltage in

[3]

- 100 120 µV

[3]

-2540µV mute

o(mute)

output voltage in mute input impedance 39 50 61 kΩ DC output offset voltage

SVRR supply voltage ripple

[4]

--40µV

[7]

- - 150 mV

[6]

39 49 - dB

rejection

Line driver application (R

line output voltage 0.1 - 2.9 V

= 1 kΩ)

[1] The supply voltage range at pin VP1 is from 1.9 V to 18 V. Pin VP2 is used for the voltage range from 6 V to 30 V. [2] Measured with low-pass ﬁlter 30 kHz. [3] Noise output voltage measured with a bandwidth of 20 Hz to 20 kHz, unweighted. Rs=5kΩ. [4] RMS output voltage in mute is measured with Vi= 200 mV (RMS); f = 1 kHz. [5] DC output offset voltage is measured between the signal output and the 0.5VP output. [6] The ripple rejection is measured with a ripple voltage of 200 mV (RMS) applied to the positive supply rail (Rs=0kΩ). [7] DC output offset voltage is measured between the two signal outputs.

13. Application information

13.1 General

For applications with a maximum supply voltage of 6 V (input mode low) the input pins need a DC path to ground (see Figure 3 and Figure 4). For applications with supply voltages in the range from 6 V to 18 V (input mode HIGH) the input DC level is

0.5VP+ 0.6 V. In this situation the input conﬁgurations illustrated in Figure 5 and Figure 6 have to be used.

Product data sheets Rev. 03 — 15 May 2006 11 of 36

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