Philips TDA8443A User Manual
INTEGRATED CIRCUITS
DATA SH EET
TDA8443A
2
I
C-bus controlled YUV/RGB switch
Product specification
Supersedes data of November 1992
File under Integrated Circuits, IC02
Philips Semiconductors
1995 Mar 07
Philips Semiconductors Product specification
I2C-bus controlled YUV/RGB switch
FEATURES
• Two RGB/YUV selectable clamped inputs with
associated synchronization
• RGB/YUV matrix
• 3-state switching with an OFF-state
• Selectable gain
• I2C-bus or non-I2C-bus mode
• Address selection for 7 devices
• Fast switching.
GENERAL DESCRIPTION
The TDA8443A is a general purpose two-channel switch
for YUV or RGB signals. One channel provides matrixing
from RGB to YUV, which can be bypassed.
The IC is controlled via I
addresses or can be used in a non-I2C-bus mode. In the
non-I2C-bus mode, control of the circuit is achieved by DC
voltages.
2
C-bus by seven different
TDA8443A
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
P
I
P
supply voltage (pin 18) 10.8 12.0 13.2 V
supply current − 65 90 mA
RGB/YUV channels
Z
19-22
Z
20-22
Z
21-22
output impedance (pin 19) − 730Ω
output impedance (pin 20) − 730Ω
output impedance (pin 21) − 730Ω
B bandwidth −3 dB; mode 0 or 2 − 25 − MHz
+3 dB; mode 0 or 2 − 12 − MHz
±3 dB; mode 1 − 10 − MHz
V
O(p−p)
T
amb
maximum output amplitude of YUV
signals (peak-to-peak value)
operating ambient temperature 0 − +70 °C
gain × 1 2.1 −−V
gain × 2 4.2 −−V
ORDERING INFORMATION
TYPE
NUMBER
NAME DESCRIPTION VERSION
PACKAGE
TDA8443A DIP24 plastic dual in-line package; 24 leads (600 mil) SOT101-1
1995 Mar 07 2
Philips Semiconductors Product specification
I2C-bus controlled YUV/RGB switch
BLOCK DIAGRAM
handbook, full pagewidth
V
P
TDA8443A
SDA SCL S0 S1 S2
2
I C-BUS INTERFACE/
DECODER
outputs
R/ (R Y)
B/ (B Y)
input
A4 A3 A2 A1
G/Y
input
20 21 2319 22181716151413 24
input
GND
SYNC
output
TDA8443A
clamp pulse
generator
FAST
SWITCHING
ON
input
CLAMP CLAMP CLAMP
B/ (B Y)
input
SYNC1
G/Y
input
channel 1 channel 2
R/ (R Y)
input
internal
voltage
B3 B2 B1
MATRIX
RGB/YUV
CLAMP CLAMP CLAMP
G/Y
input
input
R/ (R Y)
input
2456710111289
SYNC2B/ (B Y)
CLAMP PULSE
GENERATOR
3 1
SELfast
switching
MLD003
Fig.1 Block diagram.
1995 Mar 07 3
Philips Semiconductors Product specification
I2C-bus controlled YUV/RGB switch
PINNING
SYMBOL PIN DESCRIPTION
SEL 1 select input
SYNC2 2 synchronization input for
FS 3 fast switching input
R/±(R−Y)IN 4 R or (R−Y) signal input
G/Y IN 5 G or Y signal input
B/±(B−Y)IN 6 B or (B−Y) signal input
VINT 7 internal voltage supply
SYNC1 8 synchronization input for
ON 9 ON input
R/−(R−Y)IN 10 R or −(R−Y) signal input
G/Y IN 11 G or Y signal input
B/−(B−Y)IN 12 B or −(B−Y) signal input
SDA 13 serial data input/output; I
SCL 14 serial clock input; I
S0 15 address selection input 0
S1 16 address selection input 1
S2 17 address selection input 2
V
P
18 supply voltage
B/−(B−Y)OUT 19 B or −(B−Y) signal output
G/Y OUT 20 G or Y signal output
R/−(R−Y)OUT 21 R or −(R−Y) signal output
GND 22 ground
SYNC 23 synchronization output
CLAMP 24 clamping pulse generator
2
C-bus mode only)
(non-I
Channel 2
Channel 1
input/output
2
C-bus
2
C-bus
handbook, halfpage
R/ (R Y) IN
B/ (B Y) IN
R/ (R Y) IN
B/ (B Y) IN
1
SEL
FS
G/Y IN
2
3
4
5
6
SYNC2
TDA8443A
7
V INT
ON
G/Y IN
8
9
10
11
12
MLD004
SYNC1
Fig.2 Pin configuration.
TDA8443A
24
CLAMP
23
SYNC
22
GND
21
R/ (R Y) OUT
20
G/Y OUT
19
B/ (B Y) OUT
V
18
P
17
S2
16
S1
15
S0
14
SCL
13
SDA
1995 Mar 07 4
Philips Semiconductors Product specification
I2C-bus controlled YUV/RGB switch
FUNCTIONAL DESCRIPTION
The circuit contains two sets of inputs (see Fig.1). Both
channels can receive RGB or YUV signals. Each set of
inputs has its own synchronization input, which internally
generates a pulse to clamp the inputs. The internal
clamping pulse can also be controlled by a signal (e.g. a
sandcastle pulse) applied to pin 24. The pulse will occur
during the time that the signal at pin 24 is between
5.5 and 6.5 V. If both a sync signal and a pin 24 signal are
used the signal should be applied to pin 24 via a 1 kΩ
resistor.
RGB signals of Channel 2 can be matrixed to YUV signals.
The outputs can be set in a high impedance OFF state,
which allows the use of seven devices in parallel
2
C-bus mode).
(I
The circuit can be controlled by an I2C-bus compatible
microcontroller or directly by DC voltages. The fast
switching input can be operated via pin 16 of the
peritelevision connector.
TDA8443A
2
C-bus mode
I
The protocol for the devices in I2C-bus mode is shown
in Fig.3.
Table 1 Protocol bit description
BIT DESCRIPTION
STA start condition
MA2 to MA0 address selection bits; see Table 2
ACK acknowledge bit
D7 channel selection bit; see Table3
D6 matrix selection bit; see Table3
D5 to D3 gain control bits; see Table 4
D2 fast switching priority bit; see Table5
D1 and D0 output state control bits; see Table 6
STO stop condition
handbook, full pagewidth
See Table1.
STA 1 1 0 1 MA2 MA1 MA0 0 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK STO
MSA003
Fig.3 I2C-bus protocol.
1995 Mar 07 5
Philips Semiconductors Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
Table 2 Address selection
ADDRESS SELECT PINS
(1)(2)
ADDRESS SELECT BITS
S2 (PIN 17) S1 (PIN 16) S0 (PIN 15) MA2 MA1 MA0
LLL∗
(3)
(3)
∗
LLH001
LHL010
LHH011
HLL100
HLH101
HHL110
HHH111
Notes
1. L = LOW level input voltage.
2. H = HIGH level input voltage.
2
3. ∗ = non-I
C-bus operation.
Table 3 Mode control bits D7 and D6
(3)
∗
MODE D7 D6 FUNCTION
0 0 0 Channel 2 selected, no matrix
1 0 1 Channel 2 selected, matrix active
2 1 0 Channel 1 selected
− 1 1 not allowed
Table 4 Gain setting (see also Table 9)
D5 D4 D3 A1 A2, A3, A4 B1, B3 B2
00011−1 0.45
0011111
0 1 0 not allowed −−
01111−1 0.45
10022−1 0.45
1012111
1102211
11121−1 0.45
Matrix equations
The relationship between output and input signals of the matrix is as follows:
Y = 0.3R + 0.59G + 0.11B
R−Y = 0.7R − 0.59G − 0.11B
B−Y=−0.3R − 0.59G + 0.89B
1995 Mar 07 6
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