TDA6107JFDBS9MPFplastic DIL-bent-SIL medium power package with fin; 9 leadsSOT111-1
NAMEDESCRIPTIONVERSION
GENERAL DESCRIPTION
The TDA6107JF includes three video output amplifiers
andis intendedto drivethethree cathodesof acolourCRT
directly. The device is contained in a plastic DIL-bent-SIL
9-pin medium power (DBS9MPF) package, and uses
high-voltage DMOS technology.
To obtain maximum performance, the amplifier should be
used with black-current control.
PACKAGE
2002 Oct 182
Philips SemiconductorsProduct specification
Triple video output amplifierTDA6107JF
BLOCK DIAGRAM
handbook, full pagewidth
V
,
i(1)
1, 2, 3
V
,
i(2)
V
i(3)
CURRENT
SOURCE
MIRROR 1
THERMAL
PROTECTION
CIRCUIT
R
i
R
a
3×
VIP
REFERENCE
MIRROR 3
TDA6107JF
DIFFERENTIAL
MIRROR 2
MIRROR 4
STAGE
V
DD
6
MIRROR 5
CASCODE 1
3×
V
1×
1×
R
f
CASCODE 2
9, 8, 7
oc(3),
V
oc(2),
V
oc(1)
5
I
o(m)
Fig.1 Block diagram (one amplifier shown).
PINNING
SYMBOLPINDESCRIPTION
V
i(1)
V
i(2)
V
i(3)
1inverting input 1
2inverting input 2
3inverting input 3
GND4ground (fin)
I
V
V
V
V
om
DD
oc(3)
oc(2)
oc(1)
5black-current measurement output
6supply voltage
7cathode output 3
8cathode output 2
9cathode output 1
handbook, halfpage
V
1
i(1)
V
2
i(2)
V
3
i(3)
GND
4
I
5
om
TDA6107JF
V
6
DD
V
7
oc(3)
V
8
oc(2)
V
9
oc(1)
MBL524
Fig.2 Pin configuration.
4
MBL525
2002 Oct 183
Philips SemiconductorsProduct specification
Triple video output amplifierTDA6107JF
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages measured with respect to pin 4
(ground); currents as specified in Fig.1; unless otherwise specified.
SYMBOLPARAMETERMIN.MAX.UNIT
V
DD
V
i
V
o(m)
V
oc
I
ocsm(L)
I
ocsm(H)
T
stg
T
j
V
es
supply voltage0250V
input voltage at pins 1 to 3012V
measurement output voltage06V
cathode output voltage0V
LOW non-repetitive peak cathode output current at a flashover
03A
DD
V
discharge of 100 µC
HIGH non-repetitive peak cathode output current at a flashover
06A
discharge of 100 nC
storage temperature−55+150°C
junction temperature−20+150°C
electrostatic handling voltage
Human Body Model (HBM)−3000V
Machine Model (MM)−300V
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices (see
“Handling MOS Devices”
).
QUALITY SPECIFICATION
Quality specification
“SNW-FQ-611 part D”
is applicable and can be found in the
“Quality reference Handbook”
.
The handbook can be ordered using the code 9397 750 00192.
2002 Oct 184
Philips SemiconductorsProduct specification
Triple video output amplifierTDA6107JF
THERMAL CHARACTERISTICS
SYMBOLPARAMETERCONDITIONSVALUEUNIT
R
th(j-a)
R
th(j-fin)
R
th(h-a)
Note
1. An external heatsink is necessary.
P
(W)
8
tot
6
handbook, halfpage
thermal resistance from junction to ambient56K/W
thermal resistance from junction to finnote 111K/W
thermal resistance from heatsink to ambient18K/W
Thermal protection
The internal thermal protectioncircuit gives a decrease of
MBH989
the slew rate at high temperatures: 10% decrease at
130 °C and30% decreaseat 145 °C(typical valueson the
spot of the thermal protection circuit).
(1)
4
2
0
−40
(1) Infinite heatsink.
(2) No heatsink.
0
Fig.3 Power derating curves.
(2)
4080160120
T
amb
(°C)
handbook, halfpage
outputs
5 K/W
thermal protection circuit
6 K/W
fin
MGK279
Fig.4 Equivalent thermal resistance network.
2002 Oct 185
Philips SemiconductorsProduct specification
Triple video output amplifierTDA6107JF
CHARACTERISTICS
Operating range: Tj= −20 to +150 °C; VDD= 180 to 210 V. Test conditions: T
V
o(c1)=Vo(c2)=Vo(c3)
=1⁄2VDD; CL= 10 pF (CL consists of parasitic and cathode capacitance); R
(measured in test circuit of Fig.8); unless otherwise specified.
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
I
q
V
ref(int)
quiescent supply current5.66.67.6mA
internal reference voltage
(input stage)
R
i
input resistance−3.6−kΩ
Ggain of amplifier47.551.055.0
∆Ggain difference−2.50+2.5
V
O(oc)
nominal output voltage at
Ii=0µA116129142V
pins 7, 8 and 9 (DC value)
∆V
O(oc)(offset)
differential nominal output
Ii=0µA−05V
offset voltage between
pins 7 and 8, 8 and 9 and
9 and 7 (DC value)
∆V
o(c)(T)
output voltage temperature
drift at pins 7, 8 and 9
∆V
o(c)(T)(offset)
differential output offset
voltage temperature drift
between pins 7 and 8,
8 and 9 and 7 and 9
I
o(m)(offset)
∆I
/∆I
o(m)
offsetcurrent ofmeasurement
output (for three channels)
linearity of current transfer
o(c)
(for three channels)
I
=0µA;
o(c)
1.5 V < Vi< 5.5 V;
1.8 V < V
−100 µA<I
o(m)
o(c)
<6V
< 100 µA;
1.5 V < Vi< 5.5 V;
1.8 V < V
−100 µA ≤ I
o(m)
<6V
<10mA;
o(c)
1.5 V < Vi< 5.5 V;
I
o(c)(max)
maximum peak output current
1.8 V < V
50V<V
<4V
o(m)
o(c)<VDD
− 50 V−20−mA
(pins 7, 8 and 9)
V
o(c)(min)
V
o(c)(max)
B
S
minimum output voltage
(pins 7, 8 and 9)
maximum output voltage
(pins 7, 8 and 9)
small signal bandwidth
Vi= 7.0 V; at I
o(c)
= 0 mA;
note 1
Vi= 1.0 V; at I
o(c)
= 0 mA;
note 1
V
= 60 V (p-p)−5.5−MHz
o(c)
(pins 7, 8 and 9)
B
L
large signal bandwidth
V
= 100 V (p-p)−4.5−MHz
o(c)
(pins 7, 8 and 9)
t
Pco
cathode output propagation
time 50% input to 50% output
(pins 7, 8 and 9)
V
= 100 V (p-p) square
o(c)
wave; f <1 MHz;
tr=tf=40ns
(pins 1, 2 and 3);
see Figs 6 and 7
=25°C; VDD= 200 V;
amb
= 18 K/W
th(h-a)
−2.5−V
−10−mV/K
−0−mV/K
−50−+50µA
−0.9−1.0−1.1
−0.9−1.0−1.1
−−10V
VDD− 15 −−V
−60−ns
2002 Oct 186
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