Philips so145406 DATASHEETS

Philips Semiconductors Linear Products Product specification
MC145406EIA-232-D/V.28 driver/receiver
467
August 31, 1994 853-1430 13721

DESCRIPTION

The MC145406 is a silicon-gate CMOS IC that combines 3 drivers and 3 receivers to fulfill the electrical specifications of standards EIA-232-D and CCITT V.28. The drivers feature true TTL input
compatibility, slew-rate limited output, 300
power-off source
impedance, and output typically switching to within 25% of the supply rails. The receivers can handle up to +
25V while presenting 3 to 7k impedance. Hysteresis in the receiver aids reception of noisy signals. By combining both drivers and receivers in a single CMOS chip, the MC145406 provides efficient, low-power solutions for EIA-232-D and V.28 applications.

APPLICATIONS

Modem interface
Voice/data telephone interface
Lap-top computers
UART interface

FEATURES

Drivers
+5 to +12V supply range
300 power-off source impedance
Output current limiting
TTL compatible

PIN CONFIGURATION

V
DD
RX
1
V
CC
DO1 DI1 DO2 DI2 DO3
GND
D and N Packages
1 2 3 4 5 6 7 8
9
10
11
12
13
14
16 15
TX
1
V
SS
RX
2
TX
2
RX
3
TX
3
DI3
NOTE:
D = Driver R = Receiver
R
D
R
D
R
D
Maximum slew rate = 30V/µs
Receivers
+25V input voltage range over the full supply range
3 to 7k input impedance
Hysteresis on input switchpoint
General
Very low supply currents for long battery life
Operation is independent of power supply sequencing

ORDERING INFORMATION

DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG #
16-Pin Plastic Dual In-Line (DIP) Package
0 to +70°C
MC145406N 0406C
16-Pin Small Outline Large (SOL) Package
0 to +70°C
MC145406D 0171B

ABSOLUTE MAXIMUM RATINGS

SYMBOL PARAMETER RATING UNITS
V
CC
Supply voltage -0.5 to +6.0 V
V
DD
Supply voltage -0.5 to +13.5 V
V
SS
Supply voltage +0.5 to -13.5 V
V
IR
Input voltage range
RX
1-3
inputs
DI
1-3
inputs
(VSS - 15) to (VDD + 15)
-0.5 to (V
CC
+ 0.5)
V
DC current per pin +100 mA
P
D
Power dissipation (package) 1.0 W
T
A
Operating temperature range 0 to +70
°C
T
STG
Storage temperature range -65 to +150
°C
θ
JA
Thermal impedance N package
D package
80
105
°C/W
NOTE: This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND <
VDI < VDD and GND < V
DO
< VCC. Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to VSS < V
TX1-3
< VDD. Unused inputs
must always be tied to an appropriate logic voltage level (e.g., GND or V
CC
for DI, and VSS or VDD for RX).
Philips Semiconductors Linear Products Product specification
MC145406EIA-232-D/V.28 driver/receiver
August 31, 1994
468

BLOCK DIAGRAM

RECEIVER
DO
DI
1.4V
LEVEL
SHIFT
DRIVER
HYSTERESIS
300
15k
5.4k
RX
TX
V
CC
V
SS
V
CC
V
DD
V
SS
V
CC
1.0V
1.8V
+
+
PIN # SYMBOL PIN DESCRIPTION
1 V
DD
Positive power supply. The most positive power supply pin, which is typically 5 to 12 volts.
8 V
SS
Negative power supply. The most negative power supply pin, which is typically -5 to -12 volts.
16 V
CC
Digital power supply. The digital supply pin, which is connected to the logic power supply (maximum +5.5V).
9 GND Ground. Ground return pin is typically connected to the signal ground pin of the EIA-232-D connector (Pin 7)
as well as to the logic power supply ground.
2, 4, 6 RX1, RX2, RX3Receive Data Input. These are the EIA-232-D receive signal inputs whose voltages can range from +25 to
-25V. A voltage between +3 and +25 is decoded as a space and causes the corresponding DO pin to swing to ground (0V); a voltage between -3 and -25V is decoded as a mark and causes the DO pin to swing up to V
CC
. The actual turn-on input switchpoint is typically biased at 1.8V above ground, and includes 800mV of hysteresis for noise rejection. The nominal input impedance is 5k. An open or grounded input pin is interpreted as a mark, forcing the DO pin to V
CC
.
11, 13, 15 DO1, DO2, DO3 Data Output. These are the receiver digital output pins, which swing from VCC to GND. A space on the RX
pin causes DO to produce a logic zero; a mark produces a logic one. Each output pin is capable of driving one LSTTL input load.
10, 12, 14 DI1, DI2, DI3 Data Input. These are the high-impedance digital input pins to the drivers. TTL compatibility is accomplished
by biasing the input switchpoint at 1.4V above ground. However, 5V CMOS compatibility is maintained as well. Input voltage levels on these pins must be between V
CC
and GND.
3, 5, 7 TX1, TX2, TX3 Transmit Data Output. These are the EIA-232-D transmit signal output pins, which swing toward VDD and VSS.
A logic one at a DI input causes the corresponding TX output to swing toward V
SS
. A logic zero causes the
output to swing toward V
DD
(the output voltages will be slightly less than VDD or VSS depending upon the output
load). Output slew rates are limited to a maximum of 30V/µs. When the MC145406 is off (V
DD
= VSS = V
CC
= GND), the minimum output impedance is 300Ω.
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