Philips SD-4 Service Manual

DVD-Video Player DVD Module SD-4

CL 16532163-013.eps

170102

Contents Page

1 Technical Specifications 2
2 Safety Instructions, Warnings, and Notes 4
3 Directions for Use (not available) 5
4 Mechanical Instructions 5
5 Test Instructions Mono Board DVD-SD4.00 9

Diagnostic Software Description 20
6 Block Diagram 29
7 Electrical Diagrams & Pwb’s Diagr. PWB

Front-End Processor and

Laser Supply - DVDalas2 (Diagram M1) 30 37-42

Front-End Processor Iguana (Diagram M2) 31 37-42

Front-End Loader Interface (Diagram M3) 32 37-42

Back-End Memory (Diagram M4) 33 37-42

Back-End SDRAM and

Service Interface (Diagram M5) 34 37-42

Back-End Host Processor (Diagram M6) 35 37-42

Back-End Module Interface (Diagram M7) 36 37-42

Testpoint Overview 43
8 Alignments (not available) 45
9 Circuit Description, List of Abbreviation

and IC Data 45
10 Spare Part List 56

©

Copyright 2002 Philips Consumer Electronics B.V. Eindhoven, The Netherlands.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic,
mechanical, photocopying, or otherwise without the prior permission of Philips.

Published by PF0261 Service Singapore Printed in the Netherlands Subject to modification EN 3122 785 12230

EN 2 SD-41.

Technical Specifications

1. Technical Specifications

1.1 Connections

1.1.1 Connector 1701: Basic Connector

1. I2CSCL/SIOCLK

2. I2CSDA/SIODATA

3. SCART1

4. SCART0

5. AGND

6. B_VID(U)

7. AGND

8. G_VID(Y)

9. AGND

10. R_VID(V)

11. AGND

12. Y_VID

13. AGND

14. C_VID

15. AGND

16. CVS_VID

17. +3V3

18. +3V3

19. +5V

20. +12V

21. +12V

22. MUTE

23. GND

24. PCMSCLK

25. PCMDATA0

26. GND

27. PCMCLK

28. PCMLRCLK

29. GND

30. SPDIFOUT

1.1.2 Connector 1702: Extension Connector 1.

1. GND

2. P6

3. P7

4. GND

5. PCMDATA3

6. PCMDATA2

7. GND

8. PCMDATA1

1.1.3 Connector 1705: Extension Connector 2.

1. P0

2. P1 / I2CSCL

3. GND

4. P2 / I2CSDA

5. P3

6. GND

7. P4

8. P5

1.1.4 Connector 1703: Digital Video Connector.

1. GND

2. YC0

3. GND

4. YC1

5. GND

6. YC2

7. GND

8. YC3

9. GND

10. YC4

11. GND

12. YC5

13. GND

14. YC6

15. GND

16. YC7

17. GND

18. HSYNC

19. GND

20. VSYNC

21. GND

22. 27MHZ CLOCK SIGNAL

1.1.5 Connector 1501: Service Connector.

1. TXD_SER

2. SERVICE

3. RXD_SER

4. RTS_SER (not used)

5. GND

6. CTS_SER (not used)

7. +5V_SER

1.1.6 Connector 1704: Karaoke Connector.

1. KOKSCLK

2. +12V

3. KOKLRCLK

4. GND

5. KOKDATA

6. GND

7. KOKPCMCLK

8. KOKVOCDET

1.2 Signal Specifications

This the specification of all signals as described under
“Connections”
H = +5V ±0.5V
h = 3V3 ±0.3V
L = 0V ±0.5V
l = 0V ±0.3V

Stby : There is no standby

mode at module level.
The module operate
in power-off and
power-on only.

Standby control line : Not available on

module level.

P50 : Connection between

front and A/V board,
and can be used as
P50 signal line.

: The signal is not

connected to the
module electronics.

Slow blanking scart : This signal has three

levels which depend
on the level of the
output ports SCART0
and SCART1. It will
be converted by the
external board to 0/6/
12 voltage level use
for scart function
switching.

Audio mute : Can be used for audio

mute transistors
during stop or power
On/Off.

Technical Specifications

EN 3SD-4 1.

: Mute on : 3V3 ±0V3
: Mute off: 0V ±0V3

I2S data0 out : I2S front data output.

: Level - h / l

I2S wordselect / I2S bitclock : I2S timing signals

: Level - h / l

I2S systemclock : 256xFS audio

systemclock.

: Level - h / l

LFE_SEL : Low frequency effect

selection for the A/V

board.
: LFE_SEL_low - l
: LFE_SEL_high - h

Center_on : Switches the center

audio to the scart

output.
: Center to scart - h
: L/R to scart - l

Karaoke : I2S input - h / l

: PCMCLK output - h / l

SPDIF out : Digital audio output

level - H / L

Hor. Sync : Video Horizontal

synchronisation
: Level - h / l

I2S data1 out : I2S surround data

output.
: Level - h / l.

I2S data2 out : I2S center/sub data

output.
: Level - h / l.

I2C clock / I2C data : I2C databus

: Level - h / l

TXD / RXD / RTS / CTS : Service UART to be

connected direct to

PC serial input.
: Output levels - H / L
: Input levels RS232

compliant

Service activation : Signal open Normal

module start-up
: Signal tied to GND

Module start-up in

service mode.

1.3 Performance:

1.3.1 Digital Output

CDDA/LPCM : according IEC60958
MPEG1 is converted to LPCM :
MPEG2, AC3 audio.MP3 : according IEC1937
DTS. : according IEC61937

amendment 1.
: Digital output level is

0V / 5V with GND as

reference. To meet

the standards a

decouple circuit is

necessary.

Number of I2S outputs : Basic 6 channels:

Front / Surround /
Center-LFE.

: Additional 2 channels:

downmix stereo

Deemphasis : Internally processed

by the module.

Audio source stream s : PCM / LPCM / MPEG1

/ MPEG2 / AC3 / MP3
/ DTS / MLP.

: No DTS decoding.

Audio processing : Dolby ProLogic

decoder / Dolby
surround downmix /
SRS TruSurround /
Circle Surround /
TruBass.

1.3.3 Analog Output

The module has no analog audio
ouput. : The analog audio

specification will be
determined by the
external DAC circuit.

1.3.4 Video.

Standards : The video output

standard will follow
the source material.

: The OSD standard is

switchable between
PAL or NTSC.

Outputs : The module has 6

analog outputs in 4
formats: Y/C ; CVBS
; RGB / YUV.

Specification. : The output comply

fully according PQR­IMS.

: DC level - sync

bottom at 0.43V ±10%
(100% white) and

0.9V ±10% (black).

: Output impedance -

75Ohm.

: The following

specification points
are significantly better
then [PQR_IMS]

: SNR on all video

outputs is better then
65dB.

: Video bandwidth -

8MHz (±3dB) / 16MHz
(±3dB) for STi5588
progressive scan.

1.3.2 I2S Output

Accuracy : Up to 24bit.
Sample rate : 32kHz / 44.1kHz /

48kHz / 64kHz /

88.2kHz / 96kHz /

128kHz / 176.4kHz /

Standard : Philips I2S output

192kHz.

EN 4 SD-42.

Safety Instructions, Warnings, and Notes

2. Safety Instructions, Warnings, and Notes

2.1 Safety Instructions

2.1.1 General Safety

Safety regulations require that during a repair:

• Connect the unit to the mains via an isolation transformer.

• Replace safety components, indicated by the symbol ,

only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard.

Safety regulations require that after a repair, you must return
the unit in its original condition. Pay, in particular, attention to
the following points:

• Route the wires/cables correctly, and fix them with the
mounted cable clamps.

• Check the insulation of the mains lead for external
damage.

• Check the electrical DC resistance between the mains plug
and the secondary side:

1. Unplug the mains cord, and connect a wire between

the two pins of the mains plug.

2. Set the mains switch to the 'on' position (keep the

mains cord unplugged!).

3. Measure the resistance value between the mains plug

and the front panel, controls, and chassis bottom.

4. Repair or correct unit when the resistance

measurement is less than 1 MΩ.

5. Verify this, before you return the unit to the customer/

user (ref. UL-standard no. 1492).

6. Switch the unit ‘off’, and remove the wire between the

two pins of the mains plug.

2.1.2 Laser Safety

This unit employs a laser. Only qualified service personnel may
remove the cover, or attempt to service this device (due to
possible eye injury).

2.2 Warnings

2.2.1 General

• All ICs and many other semiconductors are susceptible to

electrostatic discharges (ESD, "). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are at the same potential as the mass of
the set by a wristband with resistance. Keep components
and tools at this same potential.
Available ESD protection equipment:
– Complete kit ESD3 (small tablemat, wristband,

connection box, extension cable and earth cable) 4822
310 10671.

– Wristband tester 4822 344 13999.

• Be careful during measurements in the live voltage section.

The primary side of the power supply (pos. 1005), including
the heatsink, carries live mains voltage when you connect
the player to the mains (even when the player is 'off'!). It is
possible to touch copper tracks and/or components in this
unshielded primary area, when you service the player.
Service personnel must take precautions to prevent
touching this area or components in this area. A 'lightning
stroke' and a stripe-marked printing on the printed wiring
board, indicate the primary side of the power supply.

• Never replace modules, or components, while the unit is
‘on’.

2.2.2 Laser

• The use of optical instruments with this product, will
increase eye hazard.

• Only qualified service personnel may remove the cover or
attempt to service this device, due to possible eye injury.

• Repair handling should take place as much as possible
with a disc loaded inside the player.

• Text below is placed inside the unit, on the laser cover
shield:

Laser Device Unit

Type : Semiconductor laser

GaAlAs

Wavelength : 650 nm (DVD)

: 780 nm (VCD/CD)

Output Power : 20 mW

(DVD+RW writing)

:0.8 mW

(DVD reading)

:0.3 mW

(VCD/CD reading)

Beam divergence : 60 degree

Figure 2-1

Note: Use of controls or adjustments or performance of

procedure other than those specified herein, may result in
hazardous radiation exposure. Avoid direct exposure to beam.

CAUTION VISIBLE AND INVISIBLE LASER RADIATION WHEN OPEN AVOID EXPOSURE TO BEAM
ADVARSEL SYNLIG OG USYNLIG LASERSTRÅLING VED ÅBNING UNDGÅ UDSÆTTELSE FOR STRÅLING
ADVARSEL SYNLIG OG USYNLIG LASERSTRÅLING NÅR DEKSEL ÅPNES UNNGÅ EKSPONERING FOR STRÅLEN
VARNING SYNLIG OCH OSYNLIG LASERSTRÅLNING NÄR DENNA DEL ÄR ÖPPNAD BETRAKTA EJ STRÅLEN
VARO! AVATTAESSA OLET ALTTIINA NÄKYVÄLLE JA NÄKYMÄTTÖMÄLLE LASER SÄTEILYLLE. ÄLÄ KATSO SÄTEESEEN
VORSICHT SICHTBARE UND UNSICHTBARE LASERSTRAHLUNG WENN ABDECKUNG GEÖFFNET NICHT DEM STRAHL AUSSETSEN
DANGER VISIBLE AND INVISIBLE LASER RADIATION WHEN OPEN AVOID DIRECT EXPOSURE TO BEAM
ATTENTION RAYONNE MENT LASER VISIBLE ET INVISIBLE EN CAS D'OUVERTURE EXPOSITION DANGEREUSE AU FAISCEAU

!

Figure 2-2

2.2.3 Notes

Dolby

Manufactered under licence from Dolby Laboratories. “Dolby”,
“Pro Logic” and the double-D symbol are trademarks of Dolby

Laboratories. Confidential Unpublished Works.
©1992-1997 Dolby Laboratories, Inc. All rights reserved.

Figure 2-3

Trusurround

TRUSURROUND, SRS and symbol (fig 2-4) are trademarks of
SRS Labs, Inc. TRUSURROUND technology is manufactured
under licence frm SRS labs, Inc.

Figure 2-4

Directions for Use

3. Directions for Use

There is no DFU available

4. Mechanical Instructions

The SD4.0 module can be configurate into 2 options as shown :

EN 5SD-4 3.

Option 1 with monoboard below loader similar

Option 2 with monoboard beside loader to allows for a lower total height of module

CL 16532163_014.eps

290102

EN 6 SD-44.

4.1 Dismantling Instruction

Mechanical Instructions

Figure 4-1

CL 16532163_012.eps

030102

Figure 4-2

4.1.1 Dismantling of DVD Mono Board

CL 16532163_015.eps

230102

Mechanical Instructions

EN 7SD-4 4.

CL 06532147_003.eps

151100

1. See Figure 4-1 and 4-2 for dismantling of DVD module.

2. Unlock the OPU conn 1100, Sledge motor conn 1300

and disc motor conn 1301 and remove the Flex
connections.

3. Remove the wire connection to Tray motor conn 1303.

4. Remove the Mono Board.

5. If SD4.00 mechanical construction is as in Figure 4-1,

remove screw 0010 and 0011 before executing from
step 2 and 4.

Note: Flex cables are very fragile,care should be taken during
dismounting and when mounting,ensure that Flex cables are
inserted properly into the Flex socket and locked.

4.1.2 Opening of Tray Manually

Figure 4-4

It is possible to open the tray manually by moving the Slider in
the position as shown in Figure 4-4
When the slider A is not accessible when a disc is loaded,
unlock the tray by pressing the slider B inward as shown in
Figure 4-5.The Tray is now disengaged and can be pulled
outwards.

When no disc is loaded, unlocking the Tray can also be done
by moving the Slider A in the direction as shown in Figure 4-6
and pull the Tray outwards.

Figure 4-3

CL 06532147_002.eps

151100

Figure 4-5

CL 06532147_043.eps

231100

EN 8 SD-44.

4.2 Service Hints

4.2.1 DVD Module

This module can be repaired as follows:

1. The VAL6013/01 is a combination of loading mechanism
and DVD-mechanism. Both the mechanism is not a
repairable unit and in case of failure it has to be replaced
with a new loader VAL6013/01.

Note: When replacing with a new VAL6013/01 two solder
joints have to be removed after connecting the OPU flex foil
to the board.
The solder joints which shortcircuits the laser diodes to
ground are for protection against ESD. Refer to Figure 4-6
and Figure 4-7 for location of solder points.

Mechanical Instructions

CL 16532163_017.eps

170102

Figure 4-6

CL 16532163_018.eps

170102

Figure 4-7

2. The mono board has to be repaired down to component
level. Repair handling of the monoboard requires a
workshop with sophisticated desoldering tools.

Test Instructions Mono Board DVD-SD4.00

5. Test Instructions Mono Board DVD-SD4.00

EN 9SD-4 5.

5.1 General

• Impedance of measuring-equipment should be > 1MΩ.

• Most tests have to be done by software commands.

Together with the software command you will find a Ref.#
nbr. This is the number of the diagnostic nulceus used for
this test. More detailed information can be find in the
chapter “Diagnostic Nuclei”.

• Levels: Most measurements are digital measurements.
The signal levels specification in this document are defined
as follows:
low: < 0.3V
high: > 3.0V
LOW: < 0.4V
HIGH: > 4.5V

• All the waveforms measurement carried out in these test
instruction will be base on the testpoint indicated in the
Monoboard schematic diagram in the service manual.

5.2 General Start-up Measurements

5.2.1 Supply Check:

Testpoint Supply Remark

F785 +3V3 ± 5% Main supply voltage
F708 +5V ± 5% Main supply voltage
F703 +12V ± 10% Main supply voltage
F111 +2.5V ± 10% Front-end 2.5V reference

circuit

F726 +2.5V ± 5% STi55xx power supply

(VDDSTA/VDDSTD)

F728 +2.5V ± 5% STi55xx power supply

(VDDSTC)

PM3380B

ch1: dT=73.0ms V1= 65.0mV

ch1

ch2

T

1

2

CH1 2.00 V=
CH2 2.00 V= MTB50.0ms- 2.92dv ch1+

Figure 5-1 Reset

NB rising edge should be at least 50msec after the +3V3DB
(refer to Figure 5-1).
If the reset input does not go high then check the reset circuit
around transistor 7605.

5.2.3 Clock Check

To check the correct functioning of the STI5580, we first have
to check the presence of all clocks.
All clocks to be measured with 0.02% tolerance.

Name Testpoint Frequency Waveform

27M_CLK T725 27MHz Refer to Fig 5-2
PCM_CLK T716 11.2896MHz Refer to Fig 5-3

CL 16532163_019.eps

290102

The module operates in power-off and power-on only. There is
no standby mode at module level. In power-off, the module
does not response to any communication or signals.
Before starting the measurement, ensure that all power supply
are connected to the monoboard via connector 1701 and that
the PC interface cable is connected to the Service interface
connector 1501 of the monoboard.

5.2.2 Reset Check:

To ensure a proper start-up of the monoboard, the back-end
reset signal RTNB is required at the STi5580 input (testpoint
F906) after power-on.
To check the reset timing, measure the RSTNB (testpoint
F906) and the +3V3 supply (testpoint F724), reset circuit trigger
signal.

PM3380B

ch1

1

CH1 1.00 V= MTB10.0ns ch1+

Figure 5-2 27M_CLK

CL 16532163_020.eps

290102

EN 10 SD-45.

Test Instructions Mono Board DVD-SD4.00

PM3380B

ch1

1

CH1 1.00 V= MTB20.0ns ch1+

Figure 5-3 PCM_CLK

5.3 µP Environment:

5.3.1 General:

All the tests are carried out by software tests. To start the
software tests, connect a PC to the serial bus of the STI5580.
Use connector 1501 for this connection:

Connector pin Signal

1501-1 TXT_SER (STi5580 out)
1501-2 SERVICE-mode select
1501-3 RXD_SER (STi5580 in)
1501-4 RTS_SER (Not in use)
1501-5 GND
1501-6 CTS_SER (Not in use)
1501-7 +5V_SER

Now start the terminal program. Make sure that the service-pin
(pin 1501-2) of the µP is pulled low.
The terminal program of your PC should now display: “DVDv4
Diagnostic software version ...”. This message already means
that the µP is running. The first 5 commands from the
diagnostic software will be carried out automatically during
diagnostic start-up. The other commands can be carried out by
selecting the “command input” and simply type the reference
nbr. to do the test or select the “Menu - driven” test.
To be sure that the µP is able to run the diagnostic software,
serial port will be checked during start-up.

Ref. # Reference Name Remark

(1) BasicSpAcc Serial port Access test/

initialisation

(2b) BasicInterconSdram Check SDRAM

interconnection with CPU

(4) BasicSdramWrR Check Basic SDRAM

memory

With this test, the serial communication is checked in both
directions.

CL 16532163_055.eps

290102

Ref. # Command Name Remark

6 PapChksFl Checksum FLASH
16 CompSdramWrR SDRAM Write Read

CompSdramWrR checks the complete SDRAM for failures
inside the IC.The BasicInterconSDRAM check is done by
writing & reading some well chosen patterns to all address and
data interconnections of the SDRAM.
The PapChksFI calculate and verify checksum of the FLASH.
This includes the binary file checksum and the four modules.

5.4 General I/O Port & Peripherals Check

5.4.1 I2C Bus / EEprom Check

To access the EEprom, the I2C bus is used. So by writing and
reading to the EEprom the chip and the bus is checked. With
next commands a certain byte is written to the EEprom. The
original information will always be written back into the
EEprom.

Ref. # Command Name Remark

11 PapI2cNvram I2C NVRAM access

The complete Eeprom can also be checked on failures by
writing to all addresses and reading back. This test takes a long
time (110 sec).

Ref. # Command Name Remark

15 PapNvramWrR NVRAM Write Read

5.4.2 Audio Clock Switch Check

The internally generated Audio clock can be set to either 44.1
kHz (CD_DA), 48 kHz (DVD) or 96 kHZ (DVD). To check the
different mode, use the following commands and measure the
waveform as correct operation cannot be detected by the
Diagnostic Software.

Command

Ref #

Name Remark

7a PapUclkAclk

Cdda

7b PapUclkAclk

Dvd

7c PapUclkAclk

Dvd96

PM3380B

ch1

1

µClock A_CLK
in 44.1kHz
mode( Fig 5-4 )

µClockA_CLK
in 48kHz mode
( Fig 5-5 )

µClock A_CLK
in 96kHz mode
( Fig 5-6 )

Test
point Frequency

T716 11.2896MHz

± 0.02%

T716 12.288MHz

± 0.02%

T716 24.576MHz

± 0.02%

5.3.2 Memory Check:

The µP has a data bus that is connected to a Flash and also
internal link to the MPEG SDRAM inteface.
At start-up,the SDRAM bus is checked

Ref. # Command Name Remark

(2b) BasicInterconSDRAM Data and address bus

Interconnection

CH1 1.00 V= MTB20.0ns ch1+

CL 16532163_021.eps

Figure 5-4 µClock A_CLK in 44.1kHz mode

290102

PM3380B

ch1

1

CH1 1.00 V= MTB20.0ns ch1+

Test Instructions Mono Board DVD-SD4.00

Check the Mute output at testpoint T798: 0V ±0.3V

5.4.5 Audio I2S Check

To check the audio output, connect a audio DAC (on the A/V
board) to the I2S output and start-up the audio test. Look at the
audio outputs from the A/V board for both sine and pink noise.

Ref. #

21a AudioSineOn Audio Sine

20a AudioPinkNoi

20b AudioPinkNoi

CL 16532163_022.eps

290102

Command
Name Remark Audio outputs

Audio Sine signal On

signal Off

Sine, 1kHz on stereo
Press stop button

seOn

Audio
Pinknoise

Pink Noise on 6
channels

On
Audio

seOff

Pinknoise
Off

EN 11SD-4 5.

Figure 5-5 µClockA_CLK in 48kHz mode

PM3380B

ch1

1

CH1 1.00 V= MTB10.0ns ch1+

Figure 5-6 µClock A_CLK in 96kHz mode

5.4.3 Audio LFE_SEL Check

Some models digital board provide a LFE_SEL (Low frequency
effect selection) signal for the AV-board. The signal is an output
pin on PORT 0, bit 7 (pin 193) of the back-end processor. The
PIO-pin can be toggle with the following command sequence.

CL 16532163_023.eps

290102

The audio signal (sine or pink noise) will also be present on the
digital ouput (SPDif). This can be checked by connecting an
amplifier with digital input.
Check the I2S output.

NameTestpointWaveform

Name Testpoint Waveform

PCMLRCLK T718 Refer to Figure 5-7
PCMSCLK T712 Refer to Figure 5-8
PCMDATA0 T714 Refer to Figure 5-9
PCMDATA1 F775 Refer to Figure 5-9
PCMDATA2 F776 Refer to Figure 5-9
PCMDATA3 F777 Refer to Figure 5-9
PCMCLK T716 Refer to Figure 5-10
SPDIF F719 Refer to Figure 5-11

PM3394B

ch1

1

Ref. # Command Name Remark Testpoint Value

56a AudioLfePortHigh PIO-0/7 OnF778 high

56b AudioLfePortLow PIO-0/7

F778 low

Off

Note: The actual usage of this general purpose IO is dependant
on the back-end software.

5.4.4 Audio Mute Check

Switch on the Mute circuit by sending next command:

Ref. # Command Name Remark

19a AudioMuteOn AudioMuteOn

Check the Mute output again at testpoint T798: 3V3 ±10%
Switch off the Mute circuit by sending next command

Ref. # Command Name Remark

19a AudioMuteOff AudioMuteOff

CH1 2.00 V~ MTB10.0us ch1+

Figure 5-7 PCMLRCLK

CL06532065_008.eps

161100

EN 12 SD-45.

Test Instructions Mono Board DVD-SD4.00

PM3394B

ch1

1

CH1 2.00 V~ MTB 100ns ch1+

Figure 5-8 PCMSCLK

PM3394B

ch1

1

CH1 1.00 V~ MTB 500ns ch1+

Figure 5-9 PCMDATA0-3

PM3380B

ch1

CL06532065_009.eps

CL06532065_010.eps

161100

161100

PM3380B

ch1

1

CH1 2.00 V= BWL MTB100ns ch1+

CL 16532163_024.eps

230102

Figure 5-11 SPDIF

To switch the audio signal OFF, press the STOP button on the
front.
Without A/V board, the switching levels are as follows:
– PCMDATA1 to PCMDATA3 only between low and high for

pink noise. For sine, this is low.

– PCMDATA0, PCMLRCLK, PCMCLK and PCMSCLK

switches between low and high for both pink noise and
sine.

– SPDIF switches between LOW and HIGH

Alternatively, there is a check that can be done without A/V
board.
First, let the decoder generate pink noise on the audio outputs.

Ref. # Command Name Remark

20a AudioPinkNoiseOn Audio Pinknoise On

Measure then these signals on level and frequency.

Signal Level between Frequency

PCMLRCLK low/high 48kHz ± 0.02%
PCMSCLK low/high 3.072MHz ± 0.02%
PCMCLK low/high 12.288MHz ± 0.02%
PCMDATA0-3 low/high N/A
SPDIF low/high N/A

1

CH1 1.00 V= MTB20.0ns ch1+

Figure 5-10 PCMCLK

CL 16532163_022.eps

290102

Put the pink noise off:

Ref. # Command Name Remark

20b AudioPinkNoiseOff Audio Pinknoise Off

Test Instructions Mono Board DVD-SD4.00

EN 13SD-4 5.

5.5 VIDEO

5.5.1 Video Output Check

Measure the DC voltages at all video-outputs at conn 1701
while the video signal is turned off: 1V ± 10%
Generate a color-bar via next software commands:

Ref. # Command Name Remark

23a VideoColDencOn Colourbar DENC ON
61a VideoColOutRGB RGB Colourbar
61b VideoColOutYUV YUV Colourbar
23b VideoColDencOff Colourbar DENC OFF

Check video output at the next testpoints:

Name Testpoint Waveform

R_VID T795 Refer to Figure 5-12
G_VID T796 Refer to Figure 5-13
B_VID T799 Refer to Figure 5-14
CVBS F788 Refer to Figure 5-15
C_VID F791 Refer to Figure 5-16
Y_VID F792/F796 Refer to Figure 5-17
V_VID T795 Refer to Figure 5-18
U_VID F799 Refer to Figure 5-20

PM3380B

ch1

1

RUN

CH1 5 00mV~ BWL MTB20.0us ch1+

Figure 5-14 B_VID

PM3380B

ch1

CL 16532163_058.eps

290102

PM3380B

ch1

1

CH1 500mV~ BWLMTB20.0us ch1+

Figure 5-12 R_VID

PM3380B

ch1

CL 16532163_056.eps

290102

1

RUN

CH1 500mV~ BWL MTB20.0us ch1+

Figure 5-15 CVBS

PM3380B

ch1

1

CL 16532163_059.eps

290102

1

CH1 500mV~ BWLMTB20.0us ch1+

Figure 5-13 G_VID

CL 16532163_057.eps

290102

CH1 500mV~ BWL MTB20.0us L=1 ch1p

Figure 5-16 C_VID

CL 16532163_060.eps

290102

EN 14 SD-45.

PM3380B

ch1

1

Test Instructions Mono Board DVD-SD4.00

Check the level of SCART0 and SCART1 with the following
commands:

Command

Ref. #

Name

25a VideoScartLo 1 1 0-2V
25b VideoScartMi 0 1 4.5-7V
25c VideoScartHi 0 0 9.5-12V

Scart0
(PIO3.6)

Scart1
(PIO3.7)

Level on Pin 8
of scart

CH1 500mV~ BWLMTB20.0us L=1 ch1p

Figure 5-17 Y_VID

PM3380B

ch1

1

CH1 500mV~ BWLMTB20.0us L=1 ext p

Figure 5-18 V_VID

CL 16532163_061.eps

290102

CL 16532163_025.eps

230102

PM3380B

ch1

1

CH1 500mV~ BWLMTB20.0us L=1 extp

Figure 5-19 U_VID

5.5.2 Slow Blanking Scart

An aditional part of the video-path is the scart function­switching test. The scart function-switching pin has three levels
which depend on the level of the output ports SCART0 and
SCART1. These latter two signals are driven by the output pins
PIO3.6 and PIO3.7 of the STi5580.

CL 16532163_026.eps

230102

Test Instructions Mono Board DVD-SD4.00

5.5.3 Video Hsync Check.

To measure the Video Hsync, the connector 1703 must be
connected to the external video processing device such as high
quality progressive scan codex and high quality Video DAC,
else there will not be any waveform. To check for the Hsync,
the following commands can be used:

Ref. # Command Name Remark Value Waveform

23a VideoColDencOn ColourbarDENC ON 15.625 kHz 0.02% Vpeak-peak > 3V Refer to Fig 5-20
61a VideoColOutRGB RGB Colourbar ON 15.625 kHz 0.02% Vpeak-peak > 3V Refer to Fig 5-20
23b VideoColDencOff Colourbar DENC OFF No measurements needed

EN 15SD-4 5.

PM3394B

ch1

1

CH1 2.00 V~ MTB20.0us ch1+

HSYNC

Figure 5-20 Video H Sync

5.6 Servo

5.6.1 General Start-up Measurements:

Reset the Basic Engine part

Ref. # Command Name Remark

44 BeReset Reset the Basic Engine

CL06532065_019.eps

161100

PM3380B

ch1

1

CH1 2.00 V= MTB 200ns ch1+

Figure 5-21 BCLKF

PM3380B

ch1

1

CL 16532163_027.eps

230102

Check if the Servo Reset (RSTNF) at testpoint F258 goes from
low to high after executing BeReset commands.

Check Vref

Name Testpoint Value

Vref F178 2.5V ± 0.3V

Play DVD test Disc and check I2S interface

Name Testpoint Value Value

BCLKF F200 6.0 MHz ± 0.1 Refer to Figure 5-21
WCLKF F201 high Refer to Figure 5-23
DATAF F202 low Refer to Figure 5-22
FLAGF F203 low No waveform
V4F F255 low No waveform
SYNCF F256 low No waveform

CH1 2.00 V= MTB20.0ns ch1+

Figure 5-22 DATAF

PM3380B

ch1

1

CH 1 2.00 V = MTB 200ns ch1 +

Figure 5-23 WCLKF

CL 16532163_028.eps

230102

CL 16532163_029.eps

230102

EN 16 SD-45.

5.6.2 Spindle Motor:

Before switching on the discmotor, check the following
testpoints:

Name Testpoint Value

STDBY_MOTOR F308 low
MOTO1 F206 1V5 ±0.3

Test Instructions Mono Board DVD-SD4.00

PM3380B

ch1

Switch the Discmotor ON/OFF with the following commands:

Ref. # Command Name Remark

39a BeDiscmotorOn Discmotor on
39b BeDiscmotorOff Discmotor off

Check the following signals with the discmotor switched ON
and without DVD Disc inserted.

Name Testpoint Frequency

STDBY_MOTOR F308 high
MOTO1 I351 4Vpp ±0.5V (sinewave)

Refer to Figure 5-24
A3 F301 Refer to Figure 5-25
A2 F302 Refer to Figure 5-25
A1 F303 Refer to Figure 5-25
T1 F210 Refer to Figure 5-26
T2 F211 Refer to Figure 5-26
T3 F212 Refer to Figure 5-26
H1+ F306 Refer to Figure 5-27
H1- F304 Refer to Figure 5-27
H2+ F309 Refer to Figure 5-27
H2- F305 Refer to Figure 5-27
H3+ F311 Refer to Figure 5-27
H3- F313 Refer to Figure 5-27

PM3380B

ch1

1

CH1 5.00 V= MTB20.0ms ch1+

Figure 5-25 A1-A2-A3

PM3380B

ch1

1

CH1 2.00 V= MTB5.00ms ch1+

Figure 5-26 T1-T2-T3

CL 16532163_031.eps

230102

CL 16532163_032.eps

230102

1

CH1 1.00 V = MTB20.0ms ch1+

CL 16532163_030.eps

Figure 5-24 Motor 1

230102

PM3380B

ch1

1

CH1 50.0mV~ BWL MTB5.00ms ch1+

CL 16532163_033.eps

230102

Figure 5-27 H1+ ; H1- ; H2+ ; H2- ; H3+ ; H3-

When measurement is completed, switch the discmotor OFF
before executing next command

Test Instructions Mono Board DVD-SD4.00

5.6.3 Radial

Radial ON will only work when the PCB is connected to a CDM
and DVD Disc is inserted.
Switch the Radial control ON/OFF with the following
commands:

Ref. # Command Name Remark

40a BeRadialOn Radial control on
40b BeRadialOff Radial control off

Check the following signals before Radial control ON/OFF

Name Testpoint Value (Radial ON)

Rad - F132 4.3V ±0.5V
Rad + F133 4.3V ±0.5V
RA F218 Refer to Figure 5-29 and 5-30

PM3380B

ch1

1

STOP

CH1 1.00 V~ MTB 250ns ch1+

EN 17SD-4 5.

CL 16532163_036.eps

230102

PM3380B

ch1

1

CH1 200mV~ MTB50.0ms ch1+

Figure 5-28 RAD+ / RAD- (BeRadialOn)

PM3380B

ch1

1

CL 16532163_034.eps

230102

Figure 5-30 RA (BeRadialOn)

Visual check on the laser,when Radial control ON, if the
laserlight is visible.
Once the check is completed,switch the Radial control OFF
before executing next command

5.6.4 Sledge

Test need a DVD disc in the DVD player to operate properly.
Use the following commands to move the sledge:

Ref. # Command Name Remark

41a BeSledgeIn Sledge inwards
41b BeSledgeOut Sledge outwards

Check for the waveform ( Figure 5-31 ) of SL at testpoint F219

PM3394B

ch1

1

CH1 1.00 V~ MTB250ns ch1+

Figure 5-29 RA (BeRadialOff)

CL 16532163_035.eps

230102

CH1 2.00 V~ MTB 250ns ch1+

CL 16532163_054

290102

Figure 5-31 SL

Check DC vtg on the following testpoint when Sledge at Inward
/ Outward position

Name Testpoint Value

VOL - F327 4.5V ±0.5V
VOL + F326 4.5V ±0.5V

Measure peak to peak signal on VOL- and VOL+ while moving
sledge outwards.
Signal will only appear momentary during command
BeSledgeOut

EN 18 SD-45.

Test Instructions Mono Board DVD-SD4.00

Name Testpoint Value Waveform

VOL - F327 10Vpp ±0.5V Refer to Figure 5-32
VOL + F326 10Vpp ±0.5V Refer to Figure 5-32

Measure input sledge control (sledge in HOME position)

Name Testpoint Value

SINPHI F216 1.5V ±0.5V
COSPHI F217 0.5V ±0.5V

PM3380B

m1.1

CH1 2.00 V~ MTB 500ms ch1+

CL 06532147_010.eps

161100

PM3380B

ch1

1

CH1 2 .00 V= MTB 500us ch1+

Figure 5-33 VO2-

PM3380B

ch1

CL 16532163_046.eps

230102

Figure 5-32 VOL+ / VOL- ( SLEDGE OUTWARDS )

5.6.5 Tray:

To open and close the tray use the following commands:

Ref. # Command Name Remark

43a BeTrayIn Tray in
43b BeTrayOut Tray out

Measure voltage at the driver outputs of the BA5938FM for the
tray closed.

Name Testpoint Value (Tray closed)

VO2 - F340 4.3V ±2.0V
VO2 + F338 4.3V ±2.0V

Measure voltage and waveform at driver outputs while the tray
is opening.

Name Testpoint Value (Tray opening)

VO2 - F340 2.0V ±1.0V
VO2 + F338 6.0V ±1.0V

1

CH1 2.00 V= MTB 500us ch1+

CL 16532163_053.eps

Figure 5-34 VO2+

5.6.6 Focus

Test need a DVD disc in the DVD player to operate properly.
To switch the Focus motor on/off, use the following commands:

Ref. # Command Name Remark

38a BeFocusOn Focus on
38b BefocusOff Focus off

Measure the driver outputs of the BA5938FM for the Focus
OFF.

Name Testpoint Value (Focus OFF)

FOC - F134 5V ±0.5V
FOC + F130 5V ±0.5V
FO F220 1.5V ±0.3V

Switch the focus ON and measure again the driver outputs

230102

Name Testpoint Value Waveform

FOC - F134 1Vpp ±0.2V Refer to Figure 5-35
FOC + F130 1Vpp ±0.2V Refer to Figure 5-35
FO F220 Refer to Figure 5-37

Test Instructions Mono Board DVD-SD4.00

EN 19SD-4 5.

ch1

ch1

PM3394B

1

CH1 500mV~ MTB 100us ch1+

Figure 5-35 FOC+ (BefocusOn)

PM3394B

1

CL06532065_029.eps

180500

Name Testpoint Value

Ax F119 2.6V ±0.2%
B F127 2.6V ±0.2%
C F124 2.6V ±0.2%
D F122 2.6V ±0.2%
E F115 2.6V ±0.2%
F F117 2.6V ±0.2%

At outputs of diodes A, B, C, D the following waveform can be
measured : Refer to Figure 5-38

PM3394B

ch1

1

CH1 100mV~ MTB 500ns ch1+

CL06532065_031.eps

161100

Figure 5-38 Output of diodes A,B,C,D

CH1 2.00 V~ MTB 500ns ch1+

CL06532065_030.eps

161100

Figure 5-36 FO (BefocusOff)

PM3380B

Ch1

T

1

CH1 2.00 V~ MTB 500ns ch1

CL 06532147_011.eps

161100

Figure 5-37 FO (BefocusOn)

Visual check on the laser,when Focus control ON, if the
laserlight is visible.
Once the check is completed,switch the focus control OFF
before executing next command.

Measure DVDALAS outputs

Name Testpoint Value

OA F104 1V ±10%
OB F107 1V ±10%
OC F108 1V ±10%
OD F110 1V ±10%
S1 F113 1V ±10%
S2 F112 1V ±10%

At output HFN, the following waveform can be measured :
Refer to Figure 5-39

PM3394B

ch1

1

CH1 500mV~ MTB 250ns ch1+

CL06532065_032.eps

161100

Figure 5-39 HFN / HFP

5.6.7 Hf Path

Play DVD Test Disc.
Measure outputs of diodes Ax, B, C, D, E, F.

EN 20 SD-45.

Test Instructions Mono Board DVD-SD4.00

5.7 Diagnostic Software Description

5.7.1 Introduction

Purpose

This document describes all interfaces from the outside world
to the diagnostic software, what is needed to use these
interfaces and how to access them.

Scope

This document has been realised within the framework of the
product development of the second generation DVD video
player. This player forms the basis for future DVD
developments as described in the DVDv2 Overall Project
Management Plan.

5.7.2 Definitions and Abbreviations

Definitions

Control PC Automatic test equipment, part of the

production control system in the
factory, to control the execution of
Diagnostic Nuclei in the DVD player.

Diagnostic Nucleus Part of the Diagnostic Software. Each

nucleus contains an atomic and
software independent diagnostic test,
testing a functional part of the DVD
player hardware on component level.

Script Part of the Diagnostic Software. Each

script contains a sequence of
Diagnostic Nuclei to be executed.

Service PC PC used by a service- or repair-person

to communicate with the Diagnostic
Software in the DVD player.

Abbreviations

FDS Full Diagnostic Software

5.8 Overview of Interfaces

The table below shows an overview of the user interfaces of the
Diagnostic Software. The table is based on logical interface,
interfaces as seen from user perspective. A logical interface
can use one or more physical interface components. The DVD
has only a single RS232 port, implying that all interfaces using
this port are mutually exclusive.

Logical
Interface Description

S2B
interface

Used for S2B
communication with
the Basic Engine

Physical interface
components

Service PC, running a
S2B monitor program,
connected to the
RS232 port of DVD
player Test pin

Download
Interface

Used to download
diagnostic software
into the DVD player

Service PC running a
terminal emulation
program, connected to
the RS232 port of the
DVD player Test pin

In the next chapters the logical user interfaces are described in
more detail including the exact use of the physical interface
components.

5.9 Description of Interfaces

5.9.1 Menu Interface

The menu interface is part of the Level 2 / Second Line
diagnostic mode. Via the menu interface it is possible to control
the execution of the Diagnostic Nuclei.

Set-up Physical Interface Components

Hardware required:

• Service PC

• one free COM port on the Service PC

• special cable to connect DVD player to Service PC

The service PC must have a terminal emulation program (e.g.
OS2 WarpTerminal or Procomm /Windows Hyperterminal)
installed and must have a free COM port (e.g. COM1). Activate
the terminal emulation program and check that the port settings
for the free COM port are: 19200 bps, 8 data bits, no parity, 1
stop bit and no flow control. The free COM port must be
connected via a special cable to the RS232 port of the DVD
player. This special cable will also connect the test pin, which
is available on the connector, to ground (i.e. activate test pin).

Activation

Switch the player on and the following text will appear on the
screen of the terminal (program):

DVDv4 Diagnostic Software version 4.03

Logical
Interface Description

Menu
Interface

Menu-driven
activation of
individual nuclei,
used for Level 2/
Second Line
diagnostic mode.
Users are service or
repair people

Command
Line
Interface

Used during Level 1
diagnostic mode.
Used to send
commands from the
Control PC into the
DVD hardware.

Script
Interface

Used to execute
Player Test Script
(including reading
the error log) and
Dealer Test Script.

Physical interface
components

Service PC running a
terminal emulation
program, connected to
the RS232 port of the
DVD player Test pin

Control PC, running a
control program (e.g.
Asterix), connected to
RS232 port of the DVD
player Test pin

Local keyboard Local
display

SDRAM Interconnection test passed
Basic SDRAM test passed
Front Panel Processor: SLAVE4

(M)enu, (C)ommand, (F)lash Iguana or (S)2B interface ? [M]:@ m

Press ENTER to go to Main Menu
CC: >

MAIN MENU
Select>

CL 16532163_037.eps

1. The first line indicates that the Diagnostic software has
been activated and contains the version number of the
diagnostic; this is also an indication that the first basic
nucleus (nucleus number 1) has been executed
succesfully.

2. The second line indicates the results of the shared SDRAM
Interconnection test.

3. The third line indicates the results ofthe shared SDRAM
read/write test.

4. The fourth line indicates what front panel processor was
connected to the monoboard. It could be one of the
following: SLAVE 2, SLAVE 3, SLAVE 4, or Not Detected.

5. The last line is the prompt asking the user to choose the
interface format. If the menu interface is chosen, the main

230102

Test Instructions Mono Board DVD-SD4.00

menu will then appear. For the layout of the menus, see
chapter “Layout of Menu and Submenu”.

To switch between interfaces, the DVD player needs to be
switched off and on again.

Note1: For player that has no Mechanical power switch, it can
be turned on/off by connecting the power-cable.

Note2: The Dram tests are no longer executed because the
player has no DRAM .

Usage

To select, type the number of the chosen menu-item at the
prompt. Each entry must be terminated with a <RETURN>.
Invalid selections will cause an error message by the Menu
Handler.

Example:

Select > 99
Invalid menu choice, number out of range ER @
Press RETURN to continue  @

CL 16532163_038.eps

230102

EN 21SD-4 5.

DVDv4 Diagnostic Software version 4.03

SDRAM Interconnection test passed
Basic SDRAM test passed
Front Panel Processor: SLAVE4

(M)enu, (C)ommand, (F)lash Iguana or (S)2B interface ? [M]:@ C
DD: >

The first line indicates that the Diagnostic software has been
activated and contains the version number; this is also an
indication that the first basic nucleus (nucleus number 1) has
been executed succesfully. The next three lines are the
succesful result of two subsequent basic tests (nuclei 2, 3, 4
and karaoke initialisation respectively);see [SDD_DN] for an
explanation of these nuclei. If not all these messages appear
on the terminal screen, then the related nucleus found an error.
The fifth line lets the user choose between the two possible
interface forms. The last line is the prompt ("DD>"). The
diagnostic software is now ready to receive commands.

Note1: The DVDv2B player has no power-ON key, but should
be turned on by connecting the power-cable.

CL 16532163_040.eps

230102

Result and output of an activated (and terminated) nucleus will
be sent back to the service terminal. Example:

Select > 3
1601 Data line X is not connected to the SDRAM ER @
Press RETURN to continue  @

CL 16532163_039.eps

After the user presses a key, the current menu is rebuilt on
screen.
Pressing “RETURN” at the prompt without any further input at
the terminal will always rebuild the main menu.

Termination

The menu interface is terminated by switching off the DVD
player.

5.9.2 Command Line Interface

The command line interface is part of level 1 diagnostic mode.
Via a command line interface the execution of Diagnostic
Nuclei can be controlled.

Set-up Physical Interface Components

Hardware required:

• Control PC

• one free COM port on the Control PC

• special cable to connect DVD player to the Control PC

230102

Note2: When it is a player without DRAM, the DRAM tests are
left out.

Usage

The commands that can be given are the numbers of the
nuclei. A command must be terminated with a <RETURN>
character from the control PC. When typing commands, the
backspace key can be used to make corrections.
In case of typing errors in the command, an error message is
returned. Example:

DD: > CompSdarmWrR? (Nuclei name cannot be accepted)
0001 Unknown command ER @
DD: >

CL 16532163_041.eps

230102

If the command (the nucleus number) is recognised, the
nucleus is executed. Result and output of an activated (and
terminated) nucleus will be sent back to the control PC
according to the standard layout.

Example for a command without error:

DD: > 16 (Execute CompSdramWrR nuclei)
1600 OK @
DD: >

CL 16532163_042.eps

230102

The control PC must use the following port settings for the used
COM port: 19200 bps, 8 data bits, no parity, 1 stop bit and no
flow control. The control PC is connected with a special cable
to the RS232 port of the DVD player. Via the same connection
the test pin will be connected to ground.

Activation

After power on the next text will sent to the control PC

Example for a command with error:

DD:>16
1601 Address line X not connected to the SDRAM @
DD: >

CL 16532163_043.eps

Termination

The command line interface is terminated by switching off the
DVD player.

230102

EN 22 SD-45.

Test Instructions Mono Board DVD-SD4.00

5.9.3 S2B Interface

Set-up Physical Interface Components

Hardware needed:

• Control PC

• one free COM port on the Control PC

• special cable to connect DVD player to Control PC

• S2B monitor tool running on the Control PC

Activation

To start the S2B interface, connect the RS232 cable to the
Control PC in the correct manner. Then start the PC, start the
monitor tool and start the DVD player; turn off the monitor tool,
turn on S2B monitor tool. The S2B monitor tool now takes all
communication.
The S2B interface is activated by sending the bit pattern 110x
xxxx with the first character to the DVD player, when the user
is asked to choose an interface type. The command handler
will then activate the S2B pass-through nucleus. The character
sent will be passed to this nucleus without loss.

Note: The DVDv2B player has no power-ON key, but should
be turned on by connecting the power-cable.

Termination

To terminate S2B pass-through mode, switch off the DVD
player.

5.10 Script Interfaces

This interface is used during execution of the Player Script and
the Dealer Script to display output and error messages on the
local display of the stand-alone DVD player.

The activation and the usage can refer to the respective stand­alone DVD player service manual

5.10.1 Layout of Menu and Submenu

3 LCD Display [30b]
4 LCD BkLight [30c]
5 Keyboard [27]
6 LEDs [29]
7 Remote Control [28]
8 P50 Check [60]

MAIN > BASIC ENGINE MENU

1 Reset [44]
2 Version [37]
3S2B...
4 Loader Mechanism...
5 Special Diagnostics...

MAIN > PROCESSOR PERIPHERALS MENU

1 Clock...
2Flash...
3NVRAM...
4 SDRAM Write/Read [16]

MAIN > ERROR LOG MENU

1 Read Last Errors [31]
2 Read Error Bits [32]
3 Reset Error Log [33]

MAIN > MISCELLANEOUS MENU

1 Statistics Info...
2 Read DVD Application version [46]

Second Level Submenus

MAIN > AUDIO > MUTE MENU

1 Mute On [19a]
2 Mute Off [19b]

MAIN > AUDIO > PINK NOISE MENU

1 Pink Noise On [20a]
2 Pink Noise Off [20b]

Layout Of Menus And Submenus For The Service Terminal

NOTE: a symbol “--” in the menu layouts indicates that that
specific menu choice will invoke the display of a submenu. This
symbol will also be used in the implementation of the menus
(i.e. the “--” will also appear in the user interface).

Menus

MAIN MENU

1 Audio...
2 Video...
3 Front Panel...
4 Basic Engine...
5 Processor Peripherals...
6 Error Log...
7 Miscellaneous...

First Level Submenus

MAIN > AUDIO MENU

1 Mute...
2Pink Noise...
3 Sine Wave...
4 Digital Ports...

MAIN > VIDEO MENU

1 Colourbar...
2Scart...
3Digital Port...

MAIN > FRONT PANEL MENU

1 Slave Processor...
2 VFT Display [30a]

MAIN > AUDIO > SINE WAVE MENU

1 Audio Sine On [21a]
2 Audio Burst On [21b]

MAIN > AUDIO > DIGITAL PORTS MENU

1 LFE_SEL High [56a]
2 LFE_SEL Low [56b]

MAIN > VIDEO > COLOURBAR MENU

1 Colourbar DENC On (PAL) [23a]
2 Colourbar DENC On (NTSC) [23c]
3 Colourbar DENC/MPEG Off [23b]
4 ProgressiveScan MPEG On [24a]
5 Enhanced YUV MPEG On [24b]
6 Set Video Out To RGB [61a]
7 Set Video Out To YUV [61b]

MAIN > VIDEO > SCART MENU

1 I2C Scart IC Check [54]
2 Scart To DVD [55a]
3 Scart Pass Through [55b]
4 Scart Pin 8 Low (0 to 2)V [25a]
5 Scart Pin 8 Mid (4.5 to 7)V [25b]
6 Scart Pin 8 Hi(9.5 to 12)V [25c]

MAIN > VIDEO > DIGITAL PORT MENU

1 Video Port Out 0xAA [17a]
2 Video Port Out 0x55 [17b]

MAIN > FRONT PANEL > SLAVE PROCESSOR MENU

1 Bus Comms Check [12]
2 S/W Version [26]

Test Instructions Mono Board DVD-SD4.00

EN 23SD-4 5.

MAIN > BASIC ENGINE > S2B MENU

1 S2B Echo [13]
2 S2B Pass-Through [14]

MAIN > BASIC ENGINE > MECHANISM MENU

1 Disc Motor...
2 Laser...
3Tray...
4 Focus...
5 Radial...
6 Sledge...
7 Grooves...

MAIN > BASIC ENGINE > SPECIAL DIAGNOSTICS MENU

1 Read FlashID [70]
2 ROM Checksum [71]

MAIN > PROCESSOR PERIPHERALS > PCM CLOCK MENU

1 PCM_CLK In CDDA Mode (11.3MHz) [8a]
2 PCM_CLK In DVD Mode (12.3MHz) [8b]
3 PCM_CLK In DVD96kHz Mode (24.6MHz) [8c]

MAIN > PROCESSOR PERIPHERALS > FLASH MENU

1 Verify FLASH Checksum [6]
2 Show FLASH Checksum [62]
3 Flash Write Access [10]

MAIN > PROCESSOR PERIPHERALS > NVRAM MENU

1 NVRAM Config [34]
2 NVRAM Reset [35]
3 NVRAM Modify [36]
4 NVRAM Read/Wr Test [15]

MAIN > MISCELLANEOUS > STATISTICS INFO MENU

1 Total Nr Of Times Tray Open [47a]
2 Total Time Power On [47b]
3 Total Play-Time CDDA & VCD [47c]
4 Total Play-Time DVD [47d]

Third level submenus

MAIN > BASIC ENGINE > MECHANISM > DISC MOTOR MENU

1 Disc Motor On [39a]
2 Disc Motor Off [39b]

MAIN > BASIC ENGINE > MECHANISM > LASER MENU

1 CD Laser On [58a]
2 CD Laser Off [58b]
3 DVD Laser On [58c]
4 DVD Laser Off [58d]

MAIN > BASIC ENGINE > MECHANISM > TRAY MENU

1 Tray Open [43b]
2 Tray Close [43a]

MAIN > BASIC ENGINE > MECHANISM > FOCUS MENU

1 Focus On [38a] (load DVD first)
2 Focus Off [38b]

MAIN > BASIC ENGINE > MECHANISM > RADIAL MENU

1 Radial Control On [40a] (load DVD first)
2 Radial Control Off [40b]

MAIN > BASIC ENGINE > MECHANISM > SLEDGE MENU

1 Sledge Inwards [41a]
2 Sledge Outwards [41b]

MAIN > BASIC ENGINE > MECHANISM > GROOVES (Uses DVD) MENU

1 Jump ToInside Grooves [42a]
2 Jump ToMiddle Grooves [42b]

3 Jump To Outside Grooves [42c

Screen Layout With Menus

When menus are used, no specific screen layout can be given:
menu information will not be in a special format, except for the
layout as mentioned in the previous paragraphs.

A typical menu session can look as follows:

DVDv4 Diagnostic Software version 4.03

SDRAM Interconnection test passed
Basic SDRAM test passed
Slave Processor: SLAVE2

(M)enu, (C)ommand or (S)2B interface ? [M]:@ <enter>

Press ENTER to go to main menu
CC: > <enter>

MAIN MENU

1. Audio ...

2. Video ...

3. Front Panel ...

4. Basic Engine ...

5. Processor Peripherals ...

6. Error Log ...

7. Miscellaneous ...

Select > 4 <enter>

MAIN > BASIC ENGINE MENU

1. Reset [44]

2. Version [37]

3. S2B

4. Loader Mechanism ...

5. Special Diagnostics ...

Press Enter to go to Main Menu

Select > 4 <enter>

MAIN > BASIC ENGINE > LOADER MECHANISM MENU

1. Disc Motor ...

2. Laser ...

3. Tray ...

4. Focus ...

5. Radial ...

6. Sledge ...

7. Grooves ...

Press Enter to go to Main Menu

CL 16532163_044.eps

Depending on the height of the screen, the text will start
scrolling off the top of the screen.

Layout Of Results Diagnostic Nuclei On Control/service Pc

Results returned from a Diagnostic Nucleus to the control/
service PC will have a maximum length of 300 characters and
are terminated by a CR character (included in the string length)
The result has the following layout
< number >< string > [OK l ER] @< CR >
The use of the "@" enables the Asterix system on the Control
PC to parse the output string of each nucleus into a database.

< number > is a 4-digit decimal number padded with leading
zeros if its value is less than 4 digits. The first two digits identify
the generating nucleus (or goup of nuclei), the latter two digits
indicate the error number.

< string > is a text string containing information about the result
of the Diagnostic Nucleus.

< number > and < string > are defined in [SDD_DN] in the
output sections of each Nucleus.
Examples:

230102

EN 24 SD-45.

Test Instructions Mono Board DVD-SD4.00

5.11.3 Components

1. 0001 Unknown command ER @

2. 3100 OK @

3. 0901 Data line X is not connected to the DRAM ER @

4. Device ID: 0x01
Manufac ID: 0xC2
7000 OK @

CL 16532163_045.eps

5.11 Diagnostic Nuclei

Each nucleus contains an atomic and independent diagnostic
test, testing a functional part of the DVD player hardware on
component level. Each Nucleus returns a result message to its
caller. Some tests (e.g. generating a colour bar) can only return
an "OK" result. Internal communication will be done via a
uniform interface between the diagnostic Engine, Scripts and
the Diagnostic Nuclei.
The diagnostic Engine can only operate if a certain (minimal)
set of hardware is functioning properly. To test this set of
hardware, a set of basic diagnostic nuclei is embedded in the
DVD player. Each basic diagnostic nucleus will only test that
part of the hardware which is required for execution of the
diagnostic Engine, e.g. a RAM test will only test that part of
RAM that is used by the diagnostic engine. After the Diagnostic
Engine is operational it is possible to do a full RAM diagnostic.
All basic diagnostic nuclei start with prefix 'Basic'.
In the overview each Diagnostic Nucleus consists of a
reference number, a reference name and remarks. Reference
number and name are coupled and one of them is enough for
unique identification.

5.11.1 Basic Diagnostic Nuclei

Ref. # Reference Name Remark

1 BasicSpAcc Serial port Access test/

2a BasicInterconDram Data and address bus

2b BasicInterconSdram Data and address bus

3 BasicDramWrR DRAM Write Read

4 BasicSdramWrR SDRAM Write Read

5.11.2 Processor and Peripherals

Ref. # Reference Name Remark

6 PapChksFl Checksum FLASH
8a PapSgsAclkCdda Internal PLL CLK in CD-DA

8b PapSgsAclkDvd Internal PLL CLK in DVD

8c PapSgsAclkDvd96 Internal PLL CLK in DVD

10 PapFlashWrAcc FLASH Write Access

11 PapI2cNvram I2C NVRAM access
12 PapI2cDisp I2C Display PWB
13 PapS2bEcho S2B Echo
14 PapS2bPass S2B Pass-through
15 PapNvramWrR NVRAM Write Read
62 PapChksSum Show checksums stored in

initialization

Interconnection
(only for development)

interconnection

(only for development)

mode

mode

(96kHz) mode

(only for development)

flash

230102

Ref. # Reference Name Remark

16 CompSdramWrR SDRAM Write Read

5.11.4 Audio

Ref. # Reference Name Remark

18a AudioDeemp0On

18b AudioDeemp0Off

19a AudioMuteOn Audio Mute On
19b AudioMuteOff Audio Mute Off
20a AudioPinkNoiseOn Audio Pinknoise On
20b AudioPinkNoiseOff Audio Pinknoise Off
21a AudioSineOn Audio Sine signal On/Off
21b AudioSineBurst Audio Sine signal Burst
56a AudioLfePortHigh Set the LFE_SEL port to

56b AudioLfePortLow Set the LFE_SEL port to

5.11.5 Video

Ref. # Reference Name Remark

17a VidPortOutAA Output the value 0XAA at

17b VidPortOut55 Output the value 0X55 at

23a VideoColDencOnPAL Colourbar (PAL) DENC

23b VideoColDencOff Colourbar DENC Off
23c VideoColDencOnNTSC Colourbar (NTSC) DENC

24a VideoProgMPEGon Progressive -

24b VideoYuvMPEGon Enhanced YUV-

25a VideoScartLo Scart Low
25b VideoScartMi Scart Medium
25c VideoScartHi Scart High
54 VideoScartSwComm Scart Switch

55a VideoScartSwDvd Scart Switch Dvd
55b VideoScartSwPass Scart Switch Pass-

57a VideoScartPinLo PIO-pins as used in 2A

57b VideoScartPinMi PIO-pins as used in 2A

57c VideoScartPinHi PIO-pins as used in 2A

61a VideoColOutRGB

61b VideoColOutYUV

AudioDeempOn
(DVD2B)

AudioDeempOff
(DVD2B)

(ST5508)

(ST5508)

Audio De-emphasis 0 On
Audio De-emphasis On
(DVDv2B)

Audio De-emphasis 0 Off
Audio De-emphasis Off
(DVDv2B)

HIGH

LOW

the Digital Video Interfac
e Port

the Digital Video Interfac
e Port

On

On

DigitalVideo Colour Bar
ON

DigitalVideo Colour Bar

communication

through

for Scart-switching

for Scart-switching

for Scart-switching
Output RGB from

ST5508
Output YUV from

ST5508

Test Instructions Mono Board DVD-SD4.00

EN 25SD-4 5.

5.11.6 DisplayPWB (slave processor)

Ref. # Reference Name Remark

26 DispVer Version number
27 DispKeyb Keyboard
28 DispRc Remote Control
29 DispLed LEDs
30a DispDisplay VFT Display test
30b DispLCDisplay LCD Display test
30c DispLCDBkLight LCD Backlight test
60 DispP50 P50 loopback test

5.11.7 Log (Error Logging In Nvram)

Ref. # Reference Name Remark

31 LogReadErr Read last Errors
32 LogReadBits Read errors Bits
33 LogReset Reset

5.11.8 Miscellaneous

Ref. # Reference Name Remark

34 MiscReadConfig Read Configuration area

35 MiscNvramReset NVRAM Reset
36 MiscNvramMod Modify NVRAM contents
46 MiscApplVer Read version of

47a MiscTrayOpenNr Read the number of

47b MiscPowerOnTime Read the total time the

47c MiscPlayTimeCddaVcd Read the Playtime of

47d MiscPlayTimeDvd Read the Playtime of

from NVRAM

application software

times the tray opened

player's power has been
on

CDDA and VCD discs

DVD discs

5.11.10 Karaoke

Ref. # Reference Name Remark

48a KaraokeModeOff Switch Karaoke mode off
48b KaraokeModeOn Switch Karaoke mode on
49 KaraokeMicInput Check path from the

microphone input to audio
output

50a KaraokeKeyOn Set Karaoke Key to the

maximum level (1200 cent)

50b KaraokeKeyOff Set Karaoke Key to flat octave

(0 cent)
51a KaraokeEchoOn Set Echo Control fuction on
51b KaraokeEchoOff Set Echo Control function off

Note: A new Compair version for repair of the MONO boards
will be developed.

5.12 Nuclei Error Codes

In the following tables the error description of the error codes
will be described.

5.12.1 Audio Nuclei

Error
code Error text

1880 Test successful
1800 Test successful
1900 Test successful
1920 Test successful
2000 Test successful
2020 Test successful
2100 Test successful
5600 Test successful
5620 Test successful

5.11.9 Basic Engine

Ref. # Reference Name Remark

37 BeVer Version number
38a BeFocusOn Focus On
38b BeFocusOff Focus Off
39a BeDiscmotorOn Discmotor On
39b BeDiscmotorOff Discmotor Off
40a BeRadialOn Radial control On
40b BeRadialOff Radial control Off
41a BeSledgeIn Sledge Inwards
41b BeSledgeOut Sledge Outwards
42a BeGroovesIn jump Grooves to Inside
42b BeGroovesMid jump Grooves to Middle
42c BeGroovesOut jump Grooves to Outside
43a BeTrayIn Tray In
43b BeTrayOut Tray Out
44 BeReset Reset Basic Engine
58a LaserCdOn CD Laser on
58b LaserCdOff CD Laser off
58c LaserDvdOn DVD Laser on
58d LaserDvdOff DVD Laser off
59 AudioDtsCheckCommCheck I2C communication

with Motorola DSP chip

EN 26 SD-45.

Test Instructions Mono Board DVD-SD4.00

5.12.2 Basic Engine Nuclei

Error
code Error text

3900 Test successful
3901 “Parity error from Basic Engine to Serial”
3902 “Unexpected response from Basic Engine”
3903 “Communication time-out error”
3904 “Basic Engine returned error number 0xXX”
3921 “Parity error from Basic Engine to Serial”
3922 “Unexpected response from Basic Engine”
3923 “Communication time-out error”
3924 “Basic Engine returned error number 0xXX”

3800 Test successful
3801 “Parity error from Basic Engine to Serial”
3802 “Unexpected response from Basic Engine”
3803 “Communication time-out error”
3804 “Basic Engine returned error number 0xXX”
3805 “Focus loop could not be closed”
3820 Test successful
3821 “Parity error from Basic Engine to Serial”
3822 “Unexpected response from Basic Engine”
3823 “Communication time-out error”
3824 “Basic Engine returned error number 0xXX”

4200 Test successful
4201 “Parity error from Basic Engine to Serial”
4202 “Unexpected response from Basic Engine”
4203 “Communication time-out error”
4204 “Basic Engine returned error number 0xXX”
4205 “Sledge could not be moved to home

position”
4206 “Focus loop could not be closed”
4207 “Motor not on speed within time-out”
4208 “Radial loop could not be closed”
4209 “PLL could not lock in accessing or tracking

state”
4210 “Subcode or sector information could not be

read”
4211 “Requested subcode item could not be

found”
4212 “TOC could not be read in time”
4213 “Seek could not be performed”
4220 Test successful
4221 “Parity error from Basic Engine to Serial”
4222 “Unexpected response from Basic Engine”
4223 “Communication time-out error”
4224 “Basic Engine returned error number 0xXX”
4225 “Sledge could not be moved to home

position”
4226 “Focus loop could not be closed”
4227 “Motor not on speed within time-out”
4228 “Radial loop could not be closed”
4229 “PLL could not lock in accessing or tracking

state”
4230 “Subcode or sector information could not be

read”
4231 “Requested subcode item could not be

found”
4232 “TOC could not be read in time”
4233 “Seek could not be performed”
4240 Test successful
4241 “Parity error from Basic Engine to Serial”

Error
code Error text

4242 “Unexpected response from Basic Engine”
4243 “Communication time-out error”
4244 “Basic Engine returned error number 0xXX”
4245 “Sledge could not be moved to home

position”
4246 “Focus loop could not be closed”
4247 “Motor not on speed within time-out”
4248 “Radial loop could not be closed”
4249 “PLL could not lock in accessing or tracking

state”
4250 “Subcode or sector information could not be

read”
4251 “Requested subcode item could not be

found”
4252 “TOC could not be read in time”
4253 “Seek could not be performed”

4000 Test successful
4001 “Parity error from Basic Engine to Serial”
4002 “Unexpected response from Basic Engine”
4003 “Communication time-out error”
4004 “Basic Engine returned error number 0xXX”
4005 “Radial loop could not be closed”
4020 Test successful
4021 “Parity error from Basic Engine to Serial”
4022 “Unexpected response from Basic Engine”
4023 “Communication time-out error”
4024 “Basic Engine returned error number 0xXX”

4400 Test successful
4401 Test successful

4100 Test successful
4101 “Parity error from Basic Engine to Serial”
4102 “Unexpected response from Basic Engine”
4103 “Communication time-out error”
4104 “Basic Engine returned error number XX”
4120 Test successful
4121 “Parity error from Basic Engine to Serial”
4122 “Unexpected response from Basic Engine”
4123 “Communication time-out error”
4124 “Basic Engine returned error number XX”

4300 Test successful
4301 “Parity error from Basic Engine to Serial”
4302 “Unexpected response from Basic Engine”
4303 “Communication time-out error”
4304 “Basic Engine returned error number 0xXX”
4320 Test successful
4321 “Parity error from Basic Engine to Serial”
4322 “Unexpected response from Basic Engine”
4323 “Communication time-out error”
4324 “Basic Engine returned error number 0xXX”

3700 “Version: X.Y.Z”
3701 “Parity error from Basic Engine to Serial”
3702 “Unexpected response from Basic Engine”
3703 “Communication time-out error”
3704 “Basic Engine returned error number 0xXX”

5800 Test successful

Test Instructions Mono Board DVD-SD4.00

EN 27SD-4 5.

Error
code Error text

5820 Test successful
5840 Test successful
5860 Test successful
5801 "Unexpected response from Basic Engine"
7000 "Manuf. ID: <XX>" "Device ID: <YY>"
7001 "Comm Test Failed"
7002 "Load Cmd Failed"
7003 "Load Dat Failed"
7004 "Run Cmd Failed"
7100 "ROM Checksum: XXXX"
7101 "Comm Test Failed"
7102 "Load Cmd Failed"
7103 "Load Dat Failed"
7104 "Run Cmd Failed"

5.12.3 Display PWB Nuclei

Error
code Error text

3000 “Test successful”
3001 “Disp not responding”
3002 “Disp key no response”
3003 “One or more patterns not correct”
3004 “Disp type invalid”
3020 “Test successful”
3021 “Disp not responding”
3022 “Disp key no response”
3023 “One or more patterns not correct”
3040 “Test successful”
3041 “Disp not responding”
3042 “Disp key no response”
3043 “One or more patterns not correct”

2700 “Model name in wich the test is running”
2701 “Disp key no response”
2702 “Disp not responding”
2707 “Stop key not pressed”
2708 “Pause key not pressed”
2709 “Play key not pressed”
2710 “Open/close key not pressed”
2713 “Previous key not pressed”
2714 “Next key not pressed”
2715 “More than one key not pressed”
2716 " Audio key not pressed"

2900 “Test successful”
2901 “Slave not responding”
2902 “Slave keyboard not responding”
2903 “Standby led not working”

2800 “Test successful”
2801 “Slave display controller not responding”
2802 “Slave keyboard not responding”
2803 “No key press received from remote control”

2600 “The ROM version of the slave processor =

0xXX, and the internal ID = 0xYY”
2601 “I2c bus busy”
2602 “I2c bus not working“

6000 P50 test

Error
code Error text

6001 “No readback on P50”
6002 “Disp not responding “
6003 “P50 readback error”

5.12.4 Processor & Peripherals Nuclei

Error
code Error text

700 Test successful
720 Test successful
740 Test successful

600 "All checksums are correct"
601 “Following checksum is faulty: BootCode1

Checksum is 0xY2 and is not correct (must be
0xZ2)”

601 “This test is not available when stand-alone

compiled”

6200 "Checksums = 0xA1, 0xB1, 0xC1, 0xD1"
6201 “This test is not available when stand-alone

compiled”

1000 Test successful
1001 Test successful
1020 Test successful
1021 Test successful

1100 Test successful
1104 “NVRAM reply time-out”

1200 Test successful
1202 “Slave bus not working”
1203 “Slave controller not responding”
1204 “Slave response is not correct”
5900 Test successful
5901 “I2c bus busy”
5902 “I2c bus not working“
5904 “DTS chip response not correct”

1300 Test successful
1301 “Parity error from basic engine to serial”
1302 “Parity error from serial to basic engine”
1303 “No communication between serial and basic

engine”

1304 “Communication time-out error”

1600 Test successful
1601 “The DVD SDRAM is faulty”

5.12.5 Log Nuclei

Error
code Error text

3100 "Show error log"
3101 "Error log is invalid"
3102 "Error log could not be read from NVRAM"
3103 "I2C bus busy before start"

3200 "Show error bit"
3201 "Error log is invalid"
3202 "I2C bus busy before start"

EN 28 SD-45.

Test Instructions Mono Board DVD-SD4.00

Error
code Error text

3203 "Error log could not be read from NVRAM"

3300 "Error log is cleared"
3301 "Error log could not be cleared"
3302 "I2C bus busy before start"

5.12.6 Miscellaneous Nuclei

Error
code Error text

3400 Test successful
3401 “The configuration data could not be read

from NVRAM”

3402 “I2C bus busy before start”

3500 “NVRAM is cleared”
3501 “The NVRAM could not be reset.”
3502 “I2C bus busy before start”

3600 “NVRAM contents updated.”

“NVRAM contents and configuration
checksum updated.”

3601 “NVRAM contents could not be updated.”
3602 “I2C bus busy before start”
3603 “NVRAM contents could not be read”
3604 “NVRAM not accessible.”
3605 “NVRAM checksum could not be updated.”

1500 Test successful
1502 “NVRAM access time-out”
1504 “NVRAM fails”

5400 Test successful
5401 “I2c bus busy”
5402 “I2c bus not working“
5403 “Scart switch controller not responding”
5404 “Scart switch controller response not correct”

5500 Test successful
5501 “I2c bus busy”
5502 “I2c bus not working“

Error
code Error text

4720 “Total Power On time (minutes) : XX”
4721 The total power-on time could not be read

from NVRAM.
4722 I2C bus busy before start
4740 “Total CDDA & VCD disks Play-time

(minutes) : XX”
4741 The playtime of CDDA & VCD disks could not

be read from NVRAM.
4742 I2C bus busy before start
4760 “Total DVD disks Play-time (minutes) : XX”
4761 The playtime of DVD disks could not be read

from NVRAM.
4762 I2C bus busy before start

4600 “Version of Application Software : XX”
4601 “The application version could not be read

from NVRAM.”
4602 “I2C bus busy before start”

5.12.7 Video Nuclei

Error
code Error text

2300 Test successful
2320 Test successful
2340 Test successful
2400 Test successful
2401 “I2c bus busy”
2421 “I2c bus busy”
2441 “I2c bus busy”

2500 Test successful
2501 “I2c bus busy”
2502 “I2c bus not working“
2520 Test successful
2521 “I2c bus busy”
2522 “I2c bus not working“
2540 Test successful
2541 “I2c bus busy”
2542 “I2c bus not working“
6100 Test successful
6100 Test successful

5520 Test successful
5521 “I2c bus busy”
5522 “I2c bus not working“
5523 “Scart switch controller not responding”

5200 Test successful
5201 “I2c bus busy”
5202 “I2c bus not working“
5300 Test successful
5301 “I2c bus busy”
5302 “I2c bus not working“
5320 Test successful
5321 “I2c bus busy”
5322 “I2c bus not working“

4700 “Number of times Tray went Open : XX”
4701 The total number of times tray went open

4702 I2C bus busy before start

could not be read from NVRAM.

6. Block Diagram

Block Diagram

Block Diagram

29SD-4 6.

MERCURY 3 LOADER

CDM

OPU

CD-LASER

DVD-LASER

FOCUS

RADIAL

DISK MOTOR

M

HALL

SLEDGE MOTOR

M

HALL

TRAY MOTOR

M

END-SWITCH

4

FLEX 23P

FLEX 11P

FLEX 8P

SD4.0 MONOBOARD

1

DVD

4

1100

6

CD

6

4

LASER

CONTROL

1301

1300

1303

4

4

4

BA6665FM

HALL-FEEDBACK

DRIVE

MOTOR-IC

TACHO-OUT

MOTO-IN

7300

PCS-PRE-AMPL

LM833D

DRIVERS

BA5938FM

2

MUTE

7302

SLEDGE

RADIAL

FOCUS

TRAY1
TRAY2

DVDALAS2+
TZA1033

DIODE

AMPLIFIERS

MUX

SE

RVO

CONTROL

MUX

7302

DRIVEMUTE

SERIAL

INTERFACE

3

3

1

2

2

5

7100

AR GAIN
V

HFN,HFP

Header

Land

SILD
SICL
SID

A

SERVO

SIGNALS

CALF_MACE

O_CENTRAL

STB_DALAS

7200

IGUANA
SAA7812HL

CONTROL
REGISTERS

ADC

TRAY SW

CHANNEL
DECODER

2

CSS
MODULE

SERVO

8.46 MHz

TO 7302
DRIVEMUTE

INTERFACE

FLASH ROM

M29F002

7206
MC33464N

RESET

INVERTOR

7201
7202

RES_P

BLOCK
DECODER/ENCODER

CPU
INTERFACE

uPROCESSOR

7205

UDA [0-7]
UA [0-17]

4

RSTNF

TXD_S2B
RXT_S2B
CFR_S2B
SUR_S2B

V4F
SYNCF
FLAGF
DATAF
BCLKF
WCLKF

6

STi5580

S2B

I2S

6

4

DATA/ADDRESS BUS

CONTROL BUS

7600

TXD_BE
RXD_BE
CFR

SUR

B_V4
B_WCLK
B_DATA
B_BCLK
B_FLAG
B_SYNC

RSTNF

TXD_SER

RXD_SER

RTS_SER
CTS_SER

5

UART UART

FRONT END

INTERFACE

uP ST20 CPU

SERVICE SERIAL
INTERFACE

CONN. 1501

SERVICE

7501

OPTION
74HCT14D

4

AV / SUB
DEMULTIPLEXER

HOST

MEMORY INTERFACE

SYSTEM DATA BUS

SYSTEM CONTROL BUS

SYSTEM ADDRESS BUS

7401

16Mb FLASH
( SO44 )

(

7410

OPTIONAL

16Mb FLASH
( TSOP 48 )

7605

RESET

RSTNB

AUDIO

VIDEO

SUBPICTURE

SDRAM CONTROLLER

64Mb SDRAM
(TSOP 54 )
MT48LC4M16A2TG

SERVICE

OSD

MPEG
DECODER

SDRAM INTERFACE

7500

5

4

PROGRAMMABLE

KARAOKE

7603

DIGITAL YUV
OUTPUT

CONN. 1703

VSYNC
HSYNC
27M_CLK

DIGITAL YUV

I/O

AUDIO

DECODER

VIDEO

ENCODER

I2C

CONTROLLER

27MHz

I2S AUDIO OUTPUT

CONN. 1700/2/5

7

PCMDATA1-3

P0 - 7

MUTE

PCM (4X)
DIG. OUT

5

CVBS / Y
RGB / YUV
S-VHS

6

SDA
SCLK

2

4

PCMDATA0 / PCMCLK / PCMLRCLK / PCMSCLK

7716

VIDEO
FILTER

BUFFER

+3V3
+5V
+12Vstby

1

4

PCMDATA

PCMCLK
PCMSCLK

PCMLRCLK

SPDIF

R_OUT
G_OUT
B_OUT
C_OUT

CVBS_OUT

Y_OUT

SCART[0:1]

0

2

7405

32Kb
EEPROM
M24C32

KOKDATA / KOKPCMCLK / KOKLRCLK / KOKSCLK / KOKVOCDET

SCART [0:1]

MUTE

SPDIF

R/V ;G/Y ; B/U ;CVBS/Y

Y-C VID

2

I2C

1701

ANALOG VIDEO AND I2S AUDIO OUTPUT

1704

KARAOKE

I2S INPUT

1

CL 16532163_011.eps

030102

Electrical Diagrams and PWB’s

7. Electrical Diagrams and PWB’s

Front-End Processor and Laser Supply - DVDalas2

12345678910111213

Front-end processor and Laser supply - DVDalas 2

2102

100n

AGNDF

F157

+5VAF

3101

3105

F106

F109

F111

F114

F115

F117

F119

F122

F124

F127

F130

F132

F133

F134

F145

F147

F151

F152

56K

68K

2112

AGNDF

F159

3109

AGNDF

100n

3142

100R

3145

100R

7103-A
BC847BPN

2106

1u

220R

F148

0V

AGNDF

F153

0V

AGNDF

3100

F156

6100

6101

F166

3113

AGNDF

2113

100n

AGNDF

+5VA-PDIC

7111

BST82

7112

BST82

1K

BAS316

68n

2107

F158

F163 F164

BAS316

7103-B
BC847BPN

F169

1K

3114

390R

3121

4R7

THIS FUSIBLE RESISTOR IS NOT
RELEASED AS A SAFETY COMPONENT.

10K

3141

F149

0V

10K

3143

7113

BC847B

F154

3V2

AGNDF

A

B

C

+5VAF

1100

23

22

F105

21

D

E

F

LD-DVD

20

PD-DVD

19

VOL-DVD

18

17

DVD_REF1

16

+5VA-PDIC

15

E

14

F

13

Ax

12

D

11

C

10

B

9

FOC+

8

RAD-

7

RAD+

TO/FROM LOADER OPU

6

FOC-

5

4

3

2

1

LD-CD

PD-CD

VOL-CD

AGNDF

G

H

* OPTION

V DC vtg measured in STOP-mode.

1234

3106

F155

0V7

2K2

+5VAF

3147

3144

3111

10K

4K7

10K

F150

F160

22K

3102

3

2

AGNDF

LAS_SW

30SD-4 7.

8

3115

12K

7101-A
MC34072

4

F165

1

M3-1

M3-2

M3-3

M3-4

M2-5

2103

1u

F161

7107

BC847B
AGNDF

DVD-R OPTION

F162

3103

270R

7104

BST82

F167F168

10K

3110

3124

10K

F170

+12V

3112

M2-22

DVD_R

F171

1K

2K2

3131

F126

3V2

3K9

3136

2120

100n

AGNDF

+5VAF

5V

7109
BC847B

3137

2V6

1K5

3130

2137

M2-21

DVD_REF

F178

AGNDF

AGNDF

22R

2V6

100n

2118

2V6

2V6

2V6

2114

100n

0V

2116

4n7

2V6

2V6

2V6

2V6

AGNDF

100n

AGNDF

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

AGNDF

2110

1n

2101

0V5V0V

63

18 19

17

AGNDF

4n7

2104

0V7

62

2121

AGNDF

61

20

3107

1n

F135

1V4

100n

21

1%

12K

5V

59

22

3V2

F136

5101

+3V3DF

3108

F116

2108

100n

1V6

5864 60

57

7100

TZA1033

DVDALAS2

24

3V2

3V2

0V

F138

F139

F137

BLM11

SICL

SIDA

M2-6

M2-7

3104

82R

F118

56

25 2723

AGNDF

SILD

M2-8

0V8

3140

55

26

10K

2100

47p

82R

1V2

54

0V2

AGNDF

AGNDF

2109

100n

5V

52 50

53 49

51

29

28

30

5V

3V2

0V

F140

3139

F141

220R

F142

2122

AGNDF

COO

M2-9

0V

F143

100n

2105

31

5102

100n

AGNDF

32

BLM11

+5VDF

48

1V

47

1V

46

1V

45

1V

44

5V

43

42

1V

41

1V

40

0V2

39

1V8

38

1V8

37

2V6

36

2V6

35

2V6

34

0V

3316

3V

F144

3135

AGNDF

STDBY_DALAS

M2-10

F129

F131

F172

F173

F174

470K

F103

100n

2111

2119

F120

F123

F125

F128

*

18p

AGNDF

2117

82p

F175

F176

F177

3146

0R

5100

BLM11

3118

10K

10K

3123

10K

2115

82p

F121

3116

10K

3119

10K3120

3122

10K

+5VAF

3

2

56789101112

AGNDF

8

4

AGNDF

F100

F101

F102

+5VAF

F104

F107

F108

F110

F112

F113

7208-A
LM833D

HFN

HFP

VCOM

*

F146

1

CALF

CL 16532163_001.eps

13

1100 D1
2100 A10
2101 B9
2102 B2
2103 B5
2104 B9
2105 B11
2106 B3
2107 B3
2108 C9
2109 C10
2110 C8
2111 D11
2112 D2

A

2113 D3
2114 E8
2115 E12

B

C

D

E

F

G

H

2116 E8
2117 E12
2118 F8
2119 G11
2120 H6
2121 G9
2122 G10
2137 H7
3100 B3
3101 B2
3102 B4
3103 B6
3104 B10
3105 C2
3106 B4
3107 B9
3108 B10
3109 C2
3110 C6
3111 C4
3112 C6
3113 C3
3114 C3
3115 C5
3116 D12
3118 D12
3119 D12
3120 D12
3121 D3
3122 D12
3123 E12
3124 C6
3130 F7
3131 G7
3135 G11
3136 H7
3137 H7
3139 G10
3140 G10
3141 G3
3142 G2
3143 H3
3144 H4
3145 H2
3146 F12
3147 G4
5100 B12
5101 G9
5102 G11
6100 B3
6101 C3
7100 E9
7101-A B5
7103-A B2
7103-B C3
7104 B6
7107 C6
7109 G7
7111 G3
7112 H3
7113 H3
7208-A F12
F100 A13
F101 B13
F102 B13
F103 B11
F104 D13
F105 D1
F106 D2
F107 D13
F108 D13
F109 D2
F110 D13
F111 D2
F112 D13
F113 E13
F114 E2
F115 E2
F116 B10
F117 E2
F118 B10
F119 E2
F120 D11
F121 F12
F122 E2
F123 D11
F124 E2
F125 D11
F126 G6

M2-20

M2-19

M2-18

M2-17

OA

M2-16

OB

M2-15

OC

M2-14

OD

M2-13

S2

M2-12

S1

M2-11

181201

F127 F2
F128 D11
F129 D11
F130 F2
F131 E11
F132 F2
F133 F2
F134 F2
F135 B9
F136 F9
F137 F9
F138 F9
F139 F10
F140 F10
F141 F10
F142 F10
F143 F10
F144 F11
F145 G2
F146 G13
F147 G2
F148 G3
F149 G3
F150 H4
F151 G2
F152 H2
F153 H3
F154 H3
F155 H4
F156 B3
F157 B2
F158 B3
F159 B2
F160 B4
F161 B6
F162 B6
F163 C4
F164 C4
F165 C5
F166 C3
F167 B6
F168 C6
F169 C3
F170 C6
F171 B7
F172 E11
F173 E11
F174 E11
F175 E11
F176 F11
F177 F11
F178 B8

Front-End Processor Iguana

12345678910111213

Front-end

PROCESSOR IGUANA

A

1200

*

9

CFLAG

8

FLAGF

7

6

MEAS1

5

CL0

4

CL1

3

DEB

B

+3V3DF

2

MON_D

1

FOR DEV EVALUATION

MON_A

5200

BLM11

5201

2215

1210

F215

F229

100n

2227

BLM11

8M4672

AT-51CD2

2213

100n

2220

AGNDF

3269

F230

1n8

2228

AGNDF

100n

AGNDF

10K

F231

33n

2229

3243

330R

M3-26

M3-27
M3-28

M3-29

AGNDF

M1-20
M1-19

M1-18

VDRIVE

T1
T2
T3

2207

HFN
HFP

VCOM

22p

2210

22p

C

D

E

M3-30

SINPHI
COSPHI

M3-31
M1-11

CALF

+3V3AF

AGNDF

150R

5202

BLM11

F

M1-17
M1-16
M1-14
M1-15
M1-12
M2-13
M2-32

M2-33

M3-34

G

H

M3-35
M2-36

M2-37

M3-38

M3-39

M3-40

M3-41

M3-42

M3-43

3247

F270

OA
OB
OD
OC
S1
S2
UOPT

F227

ALPHA0

TRAY1
TRAY2
DEFD

WEB

STDBY_MOTOR

RA

SL

FO

REFSIN

REFCOS

I

V DC vtg measured in STOP-mode.

OPTION

connection to ICE Interface

#

*

1234

F208

F209

2211

AGNDF

+3V3DF

F232

1n8

2230

2208

2221

220n

100n

100n

F233

Electrical Diagrams and PWB’s

M6-71

M6-70

M6-69

M2-53

M3-73

M2-76, M6-76

100n

F213

F207

2231

M2-61

M2-76

M2-60

M2-46

M2-68

M2-57

2202

M2-58

M2-59

3V2

F210

5V

F211

5V

F212

5V

1V5
1V7
3V2

1V6
0V8

1V2

24K

F216
F217

F214

F226

F204

1V2

3V2
1V9
0V3

0V3
1V
2V7
0V
0V
3V2
1V
1V
1V
1V
1V
1V
1V

3V2

3V2
3V2

3244

1%

100n2216

3V2

0V

3281

3282

4K7

4K7

3230

3K9

3231

2K7

3232

3233

3K9

4K7

3249

4K7

100n

10n

MOTO1

F206

3241

F241

0V8

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52

RES_P

22K

RES ARRAY

3V2

VDD3P1
VSS3P1
T1
T2
T3
DAC_RP
DAC_RN
DAC_VPOS
DAC_VNEG
DAC_LP
DAC_LN
TEST1
TEST2
CRIN
CROUT
VDDA1
VSSA1
HFIN_DN
HFIN_DP
HFIN_SE
VCOM
IREF
WREFLO
TEST3
VSSA2
VDDA2
SIN_PHI
COS_PHI
TEST4
XDET
ACT_EMFP
ACT_EMFN
TEST5
TEST6
TEST7
UOPB
UOPT
ALPHA0
VSSA3
VDDA3
D1
D2_TLN
D3_REN
D4_FEN
S1_MIRN
S2
VRIN
FTCH
P5_7_DEFO_N
P5_6_DEFI_N
P5_5_TL
P5_4_RP_FOK

+3V3DF

FLAGF

F203

3242-A

F218

F219

F220

F221

F222

DATAF

F202

0V

208

MOTO1

F278

F279

BCLKF

F200

F239

207

BCA

WCLKF

F201

205

206

TEST10

POR_NEG

P5_2_CLO

P5_3_CE1

54

53

3V2

3235

3238

3239

100R

204

TEST8

TEST9

P5_0_SCL

P5_1_SDA

55

3V2

4K7

4K7

4K7

+3V3DF

M2-68

CL1

F237

F238

203

202

FLAG

RA

57

56

1V5

*

*

*

1V6

1V

201

DATA_SDI

BCLK_SCKI

SL

FO

58

1V5

1V5

3200

22K

*

3202

22K

*

3204

22K

3206

22K

*

3208

22K

3219

22K

3225

47R

F236

3V2

199

200

198

197

MCK

VSS3C4

VDD3C4

WCLK_WSI

RAC_SW62REF_COS

REF_SIN

60

61

59

2V4

1V6

3V2

3201

22K

3203

22K

3205

22K

3207

22K

3209

22K

196

IECO_CL1

VSS3P2

VDD3P2

63

M1-8

F280

3V2

193

194

195

VSS3P8

VDD3P8

P4_6_PXT2

P4_7_PXT2EN

64

66

65

3V2

3V2

0V

SIDA

SICL

SILD

M1-6

M2-7

XDD(15)

XDD(14)

XDD(13)

XDD(12)

F282

F283

F281

3V20V0V0V3V2

190

191

192

XDD12

XDD13

XDD14

XDD15

VSS3C1

VDD3C1

P4_4_PXT

P4_5_PXT0

69

68

67

3V2

3V20V0V

DVD_R

COO

M3-44

M1-9

M1-22

XDD(11)

F284

189

XDD11

P4_3_A19

70

TRAYSW

M1-10

5

3210

*

22K

3212

*

22K

3214

*

22K

3216 22K

22K

3218

22K

3221

*

22K

XDD(9)

XDD(8)

XDD(7)

XDD(6)

XDD(5)

XDD(10)

F288

F286

F287

F289

F290

F285

3V2

3V2

0V

3V2

0V

182

183

184

185

186

187

188

XDD10

XDD9

XDD8

XDD7

XDD6

XDD5

XDD4

179

180

181

XDD1

XDD2

XDD3

7200

SAA7812HL

IGUANA

UA1079UA1178UA1277UA13

UA14

UA15

P4_2_A18

P4_0_A1673P4_1_A17

80

76

75

72

71

74

3V2

0R

3271

*

UA(17)

F291

STDBY_DALAS

UA(16)

3280

UA(15)

UA(14)

F292

UA(13)

47R

UA(12)

3234

M6-45

UA(11)

F223

EANF

UA(10)

31SD-4 7.

Decoupling Cap For 7200

170

VDD3C3

VDD3C2

89

169

XDA9

90

168

XDA8

VSS3C2

91

167

UA(7)

3237

(SAA7812HL IGUANA)

2200

100n

100n

2201

164

165

166

160

161

162

163

XDA5

XDA6

XDA7

XDA1

XDA2

XDA3

XDA4

UA0_P1_0

UA1_P1_1

UA2_P1_2

UA3_P1_3

UA4_P1_4

UA5_P1_5

UA6_P1_692UA7_P1_7

99

98

97

96

95

94

93

UA(0)

UA(1)

UA(2)

UA(3)

UA(4)

UA(5)

UA(6)

0R

PSEN_U

M2-49

2225

100n

2204

100n

159

158

157

XDA0

VSS3P6

VDD3P6

DA2_GRD

DA1_GWR

DMACK_GRQ

DMARQ_GACK

HRESET
P3_0_RXD1
P3_1_TXD1

P3_2_INT0
P3_3_INT1

P3_4_RXD2
P3_5_TXD2
P3_6_WRN

P3_7_RDN

VSS3P4

VDD3P4

UDA0

101

100

102

2223

2219

DASP

VSS5P1
VDD5P1

PDIAG

IOCS16

INTRQ

IORDY

DIOR

DIOW

VSS5P2
VDD5P2

DD15

DD14

DD13

DD12

DD11

DD10

VSS5P3
VDD5P3

VSS3P5
VDD3P5

UDA7
UDA6
UDA5
UDA4
UDA3

UDA1

103

UDA2

100n

2203

100n

2224

100n

100n

2222

100n

2226

100n

2217

100n

2209

100n

2212

100n

2232

100n

2218

100n

+5VDF

3252

F252

3255

7206
MC33464N

*

2

+5VDF

2K7

6

2

7203-A
BC847BS

1

560R

F253

3256

470R

IN

RESET_

GND

F254

F250

3V2

3

3240

*

1K

1

5

NC

4

4K7

3253

F263

3
7203-B
BC847BS

5

4

F242

SYNCF

MON_D

MON_A

MEAS1

CFLAG

RSTNF
TXD_S2B
RXD_S2B

LAS_SW

SCRATCH

SUR_S2B
CPR_S2B

#

WR_P

#

RD_P

100p

M6-55

V4F

3259

820R

3258

33R

M6-56

+3V3DF

+5VDF

5204

5203

BLM11

32

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

RP_NC

G_

E_

W_

*

7205

M29F002

A0

VCC

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

VSS
16

3260

12

11

10

9

8

7

6

5

27

26

23

25

4

28

29

3

2

30

M2-57

DEB

M2-58

F247

M2-59

M2-60

M2-61

M2-54
M6-62
M6-63
M1-5
M2-50

M6-64
M6-65

UDA(7)
UDA(6)
UDA(5)
UDA(4)
UDA(3)

UDA(0)

UDA(1)

UDA(2)

UDA(3)

UDA(4)

UDA(5)

UDA(6)

UDA(7)

13

14

15

17

18

19

20

21

1

24

22

3268

31

10K

UDA(2)
UDA(1)
UDA(0)

3226-B

47R

3246

100R

100p

2233

3223

100R

3224

100R

47R

100p

2246

10p

2234

F255

F256

F258
F259
F240

F243
F244

*

100p

2235

F225
F224

F245
F246

F235

F234

RES ARRAY

*

3227-D

RES ARRAY

2236

3V2

156
155

CS1

154

CS0

153
152
151
150

DA0

149

0V

148
147
146
145
144
143
142
141
140
139
138
137

DD0

136
135

DD1

134
133

DD2

132

3V

131

DD3

130

3V

129

DD4

128

3V

127

DD5

126

0V7

DD9

125

DD6

124

0V

DD8

123

DD7

122
121
120

3V2

119

3V2

118

3V2

117

3V2

116

0V4

115
114
113

0V

112

0V

111

3V2

110

3V2

109
108
107
106
105

104

10K

F248

PSEN_U

M2-49

WEB

M2-37

3211

22K

3213

22K

3215

*

3217

22K

3220

*

22K

171

174

177

178

172

173

175

176

XWR

XDD0

XRAS

XDA10

VSS3P7

VSS3C3

XCAS_HI

XCAS_LO

PSENN_CS

VSS3P3

VDD3P3

UA881UA9

SCCLK

DSDEN_SRST

EAN_WAITN

ALE_ASTB

88

84

83

82

87

86

85

0V31V1V6

1V6

47R

3245

*

UA(8)

UA(9)

10K

47R

3236

#

#

PSEN_P

ALE

CL0

M2-46

6 7 8 9 10 11 12

F260

7204
BC847B

BLM11

2214

100n

UA(10)

UA(11)

UA(12)

UA(13)

UA(14)

UA(15)

UA(16)

UA(17)

UA(0)

UA(1)

UA(2)

UA(3)

UA(4)

UA(5)

UA(6)

UA(7)

UA(8)

UA(9)

3254

1K

RSTNF

3250

F264

M6-54

M2-54

1K

+3V3DF

3251

4K7

3V2

SCRATCH
DETECTOR
OPTION

F272

ALPHA0

DEFD

M2-33

M2-36

3V2

0V

F265

3257

UOPT

M2-32

7201
BC857B

3263

1K

4K7

ICE Interface

+5VAF

7209
BC847B

3272

4K7

3261

3262

3V2

1K

6

0V

2

7202-A

F267

T201

T203

T205

T207

T209

T211

T213

T215

T217

T219

T221

T223

T225

T227

T229

BC847BPN
1

GNDZ

UDA(1)

UDA(3)

UDA(5)

UDA(7)

UA(8)

UA(10)

UA(12)

UA(13)

UA(15)

PSEN_P

RD_P

WR_P

RES_P

GNDZ

UDA(0)

UDA(2)

UDA(4)

UDA(6)

GNDZ

UA(11)

+3V3DF

UA(14)

GNDZ

PSEN_U

WR_U

RES_U

+5VAF

2K7

3279

F271

1K

3278

5

AGNDF

F274

6

220n

2272

560R

AGNDF

F275

3273

*

F277

10K

5

6

39K

3277

*

3274

*

22K

3276

*

22K

AGNDF

13 14

M2-53

RES_P

RES_U

#

#

0R

3222

3V2

F261

5

2205

220n

T202

T204

T206

T208

T210

T212

UA(9)

T214

T216

T218

T220

T222

T224

RD_U

T226

T228

T230

ALE

7101-B

8

MC34072

7

4

AGNDF

F276

7208-B

*

8

LM833D

7

4

CL 16532163_002.eps

14

3V2

4

7202-B

BC847BPN
3
0V

F266

3265

F273

3275

*

22R

3264

1K

220K

M3-51

DRIVERMUTE

2206

SCRATCH

M2-50

DVD_REF

M1-21

181201

3282 H3

1200 A2
1210 D1
2200 A7
2201 B7
2202 B3
2203 A7
2204 B7
2205 C14
2206 C14
2207 D1
2208 C2
2209 B8

A

2210 D1
2211 D2
2212 B9
2213 E2
2214 E12
2215 F1
2216 F2
2217 B8
2218 B9
2219 B7
2220 F2
2221 G2
2222 B8

B

2223 A7
2224 B7
2225 A7
2226 B8
2227 I1
2228 I2
2229 I2
2230 I2
2231 I2

1u

2232 B9
2233 G9
2234 G9

C

2235 G9
2236 G8
2246 F9
2272 H13
3200 A4
3201 A5
3202 A4
3203 A5
3204 A4
3205 A5
3206 A4
3207 A5

D

3208 B4
3209 B5
3210 A6
3211 A6
3212 A6
3213 A6
3214 A6
3215 A6
3216 A6
3217 A6
3218 B6

E

3219 B4
3220 B6
3221 B6
3222 B13
3223 C9
3224 D9
3225 B4
3226-B E9
3227-D F8
3230 H3
3231 H3
3232 H3

F

3233 H3
3234 I6
3235 I4
3236 I6
3237 I7
3238 I4
3239 I4
3240 A11
3241 B3
3242-A B3
3243 D2
3244 E3

G

3245 H6
3246 F9
3247 F1
3249 I3
3250 A12
3251 B12
3252 B10
3253 B11
3254 B12
3255 C10
3256 C11

H

3257 C12
3258 C11
3259 C11
3260 H11
3261 B13
3262 B13
3263 C13
3264 C14
3265 C14
3268 H10
3269 H2
3271 H5

I

3272 H13
3273 H13
3274 I13
3275 I14
3276 I13
3277 I13
3278 G13
3279 G13
3280 I5
3281 H3
T215 E13
T216 E14
T217 E13

5200 B2
5201 C2
5202 F1
5203 E11
5204 E11
7101-B G14
7200 E6
7201 B12
7202-A C13
7202-B B14
7203-A B10
7203-B C11
7204 B11
7205 E11
7206 A11
7208-B I14
7209 H13
F200 B4
F201 B4
F202 B4
F203 B3
F204 E3
F206 B3
F207 D2
F208 B2
F209 C2
F210 C3
F211 D3
F212 D3
F213 D2
F214 G3
F215 F2
F216 E3
F217 E3
F218 H4
F219 H4
F220 H4
F221 H4
F222 I4
F223 I6
F224 F8
F225 F8
F226 F3
F227 G1
F229 H2
F230 H2
F231 H2
F232 H2
F233 I2
F234 D8
F235 C8
F236 C4
F237 B4
F238 C4
F239 C4
F240 F9
F241 B3
F242 C11
F243 F9
F244 F9
F245 F8
F246 F8
F247 E11
F248 I11
F250 A11
F252 B10
F253 C10
F254 C11
F255 C9
F256 D9
F258 F9
F259 F9
F260 B12
F261 B14
F263 B11
F264 B12
F265 C12
F266 C14
F267 C13
F270 F1
F271 G13
F272 G12
F273 H14
F274 H13
F275 H13
F276 H14
F277 I13
F278 H4
F279 H4
F280 B5
F281 B5
F282 B5
F283 B5
F284 B5
F285 B5
F286 B5
F287 B5
F288 B5
F289 B5
F290 B5
F291 I5
F292 I5
T201 D13
T202 D14
T203 D13
T204 D14
T205 D13
T206 D14
T207 D13
T208 D14
T209 E13
T210 E14
T211 E13
T212 E14
T213 E13
T214 E14
T223 F13
T224 F14
T225 F13

T218 E14
T219 E13
T220 E14
T221 E13
T222 E14

T226 F14
T227 F13
T228 F14
T229 F13
T230 F14

Front-End Loader Interface

1234

Front-end Loader Interface

A

B

C

D

E

F

G

H

I

1301

F301

A3

11

F302

10

A2

F303

A1

9

F304

H1-

8

F305

7

H2-

F306

6

H1+

F307

5

F309

4

F311

3

F313

2

1300

F344

1

F319

8

F320

7

F321

6

F322

5

F323

4

3

F326

2

F327

1

TO/FROM LOADER

DISC MOTOR CTRL

H2+

H3+

H3-

*

3308

82R

3313

82R

3305

0R

3307

0R

REFSIN

REFCOS

VOL+

VOL-

TO/FROM LOADER

SLEDGE MOTOR CTRL

1303

1

F337

2

3

4

F338

F340

TRAYSW

VO2+

VO2-

TRAY MOTOR

TO/FROM LOADER

Electrical Diagrams and PWB’s

5

+5VDF

3304

6K8

+5VAF

2301

100n
7300-A

3

2V5

+3V3AF

+5VAF

2V5

2V5

+3V3DF

10K

3330

100p

2311

2312

*

*

100p

100p

2313

*

2V5

8

LM833D

3312

33K

3316

6K8

3318

33K

4

8

4

7300-B
LM833D

1

7

2

+5VAF

5

6

3306

680R

1V9

3309

680R

0V3

REFSIN

SINPHI

REFCOS

COSPHI

M2-40

M2-51

M2-42

M2-30

M2-43

M2-31

SL

DRIVERMUTE

M2-44

3324

F310

67

1V3

0V8

3V

2V6

2V6

2V6

2V6

2V6

2V6

5V2

5V2

F300

3325

1V6

0V

5V2

5V2

3

5

7

1

2

9

10

4

6

11

12

15

13

14

1

2

3

4

7

5

6

9

11

12

13

32SD-4 7.

7301
BA6665FM

A3

A2

A1

NC1

NC2

H1+

H1-

NC3

NC4

H2+

H2-

NC5

H3+

H3-

7302
BA5938FM

VOL-

X2

VOL+

X2

VIN1

VIN2

MUTE

NC1

NC2

NC3

NC5

VO2+

X2

VO2-

X2

+

-

+

-

+

-

+

-

+

-

+

-

2306

100n
2305

100n

MUTE

VOLTAGE

CONTROL

DRIVER

GAIN

CONTROL

+

-

LOGIC
TRAY

REV

FWD

15

3V2

3V2

F343

F342

TRAY2

21

VCC3

16

TRAY1

+5VDF

VCC

GND

8

22

10

VCC1

VCC2

+

+

GND18GND2

14

-

-

25

-+

+

H BIAS

-

MT

8

2300

100n

REV

PS

+

-

MT129MT2

X2

X2

VREF

VO3+

X2

X2

GND3

30

MT1

MT2

RNF
VM2

NC6

REV

ECR

CNF

FG1

FG2

FG3

VO4-

VO4+

VIN5

VIN4

BIAS

VIN3

VO3-

9

1R

2308

3302

100n

F325

1R

1R

3338

3303

*

*

3320

2R2

0805

3322

2R2

0805

3323

6K8

3331

18K

3335

2R2

0805

3337

2R2

0805

28

12V7

27

12V7

0V

1V6

1V6

0V

5V

5V

5V

5V2

5V2

1V6

1V6

1V6

5V2

5V2

5V2

3301

F308

F312

F316

F331

F332

F315

F334

F314

F317

F339

F341

26

24

PS

23

22

EC

21

20

VH

19

18

17

16

30

27

26

25

24

23

20

19

18

17

2829

10 11

1R

F335

1 %

3328

470R

470R

*

3319

680R

3327

3315

470R

3321

3333

2302

100K

3314
100n

2304

F329

1 %

1 %

3300

*

*

6300

S1D

100n

*

6301

S1D

2303

100n

1 %

3311

6302

S1D

4K7

*

6303

S1D

+3V3AF

0R

0R

6304

S1D

F318

3329

6K8

3336

*

6305

S1D

2309

3310

4K7

3317

4K7

12

100n

3334

10K

1 %

1 %

+12V

+3V3AF

13

STDBY_MOTOR

MOTO1

VDRIVE

+12V

RAD+

VDRIVE

+12V

FOC+

RAD-

FOC-

M2-38

M2-73

M2-26

M2-27

T1

M2-28

T2

M2-29

T3

M1-2

M1-3

M2-39

RA

M2-26

M2-41

FO

M1-1

M1-4

1300 D1
1301 A1
1303 H1
2300 A8
2301 C3
2302 B10
2303 C11
2304 C10
2305 E7
2306 E7
2308 H9
2309 H12

A

2311 I2
2312 I2
2313 I2
3300 A11
3301 A9
3302 A9
3303 A9
3304 C3
3305 D2
3306 C4
3307 D2

B

3308 B2
3309 E4
3310 B12
3311 C11
3312 D3
3313 C2
3314 C10
3315 H10
3316 E3
3317 C12
3318 F3
3319 G10

C

3320 F9
3321 H10
3322 G9
3323 G9
3324 G5
3325 G6
3327 G10
3328 H10
3329 E12
3330 H2
3331 H9
3333 H10

D

3334 H12
3335 H9
3336 H12
3337 H9
3338 A9
6300 A11
6301 A11
6302 A11
6303 F11
6304 F11
6305 F12

E

7300-A D3
7300-B E3
7301 A7
7302 F7
F300 G6
F301 A1
F302 A1
F303 A1
F304 B1
F305 B1
F306 B1
F307 B1

F

F308 B9
F309 B1
F310 G5
F311 B1
F312 B9
F313 B1
F314 H9
F315 G9
F316 B9
F317 H9
F318 H11
F319 D1

G

F320 D1
F321 E1
F322 E1
F323 E1
F325 A9
F326 E1
F327 E1
F329 E10
F331 F9
F332 G9
F334 G9
F335 A10

H

F337 H1
F338 H1
F339 H9
F340 H1
F341 H9
F342 I7
F343 I7
F344 C1

I

OPTION

*

V DC vtg measured in STOP-mode.

12

M2-34

M2-35

345678

CL 16532163_003.eps

181201

9 10111213

Back-End Memory

123456789

A

B

A1

A2

A3

C

D

E

F

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19
A20

CE_ROMN

FLASH_OEN

EMI_WEN

+3V3DB

3428

3429

*

10K3402

Electrical Diagrams and PWB’s

Back end - MEMORY

SO44

5401

BLM11

0R

0R

M6-79

OPTION

F401

F402

+3V3M1

7401

Am29LV160BT

11

10

9

8

7

6

5

4

42

41

40

39

38

37

36

35

34

3

2

43

12

3V2

14

0V

44

3V2

1

33

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

CE_

OE_

WE_

RESET_

BYTE_

F400

+3V3M1

23

VCC

VSS113VSS2

2402

100n

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15|A-1

32

33SD-4 7.

10 11 12 13 14

EMI_DQML

EMI_DQMH

TSOP48
OPTION

15

17

19

21

24

26

28

30

16

18

20

22

25

27

29

31

D0

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11

D12

D13

D14

D15

M6-79

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

FLASH_OEN

EMI_WEN

+3V3M1

+3V3M1

3V2

0V

3V2

7410
Am29LV160B

25

A0

24

A1

23

A2

22

A3

21

A4

20

A5

19

A6

18

A7

8

A8

7

A9

6

A10

5

A11

4

A12

3

A13

2

A14

1

A15

48

A16

17

A17

16

A18

9

A19

26

CE_

28

OE_

11

WE_

12

RESET_

47

BYTE_

37

VCC

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15|A-1

RY|BY_

VSS146VSS2

27

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

NC2

NC3

NC4

2401

100n

+3V3M1

2410

100n

29

31

33

35

38

40

42

44

30

32

34

36

39

41

43

45

15

10

13

3427

14

*

0R

+3V3M1

D10

D11

D12

D13

D14

D15

A21

D0

D1

D2

D3

D4

D5

D6

D7

D8

D9

D0

D1

D2

D3

D4

D5

D6

D7

D15

D14

D13

D12

D11

D10

D9

D8

MT48LC4M16A2TG

15 DQML

39 DQMH

2 DQ0

4 DQ1

5 DQ2

7 DQ3

8 DQ4

10 DQ5

11 DQ6

13 DQ7

42 DQ8

DQ944

45 DQ10

47 DQ11

48 DQ12

50 DQ13

51 DQ14

53 DQ15

SDM

100n

100n

7402

DATA INPUT REGISTER DATA OUTPUT REGISTER

2412

2414

(4,096x256x16)

SENSE AMPLIFIERS

DQMH

DQM DATA LOGIC

READ DATA LATCH

NC

3640

VDDQ

BANK0

MEMORY

ARRAY

DQML

I/O GATING

WRITE DRIVERS

BANK0

LATCH &

DECODER

DEDCODER

284154

VDD

ROW­ADDR

ROW

ADDR

BANK
CTRL

LOGIC

COLUMN

ADDR

COUNTER/

LATCH

COLUMN

11427394349

REFRESH

COUNTER

MUX

100n

100n

100n

100n

VSSQVSS

CTRL

LOGIC

MODEREG

2411

2413

2415

2416

DECODE

6124652

+3V3M1

3420

37CKE

38CLK

CS_ 19

16WE_

17CAS_

18RAS_

COMMAND

20BA0

21BA1

23A0

A1 24

25A2

26A3

29A4

30A5

31A6

32A7

ADDRESS REGISTER

33A8

34A9

22A10

35A11

10K

EMI_CLK

EMI_CS0

EMI_WEN

EMI_CAS

EMI_RAS

A16

A15

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

OPTION

2401 B7
2402 B4
2410 B10
2411 B12
2412 C10
2413 C12
2414 C10
2415 C12
2416 C12
2417 H14

A

3402 F1
3420 C12
3425 G13
3426 G13
3427 F8
3428 E1
3429 F1
5401 B2
7401 B3
7402 C10
7405 H13
7410 B7

B

F400 B3
F401 E3
F402 F3
F410 G13
F411 H14
F412 I14

C

D

E

F

G

TO

H

Enhanced Memory Interface (EMI) Bus

Back end - HOST PROCESSOR

I

OPTION

*

V DC vtg measured in STOP-mode.

12

3456

G

+3V3DB

3V2

+5V

7405
M24C32

1

E0

2

E1

3

E2

6

SCL

7

WC_

0R

3426

0R

2417

5V

100n

8

VCC

H

SDA

SCL

M6-86

M6-87

VSS

SDA

F411

5

3V2

4

F412

F410

3425

*

I

CL 16532163_004.eps

7

8

9 1011121314

181201

Electrical Diagrams and PWB’s

Back-End SDRAM and Service Interface

12

Back-end SDRAM and SERVICE INTERFACE

A

F500

11427 394349

VDD

BANK0

ROW-

ADDR

LATCH &

DECODER

DECODE

REFRESH

COUNTER

ROW

ADDR

MUX

BANK

CTRL

LOGIC

COLUMN

ADDR

COUNTER/

LATCH

COLUMN

DEDCODER

VSSQ VSS

B

C

D

E

G

+3V3DB

10K

3500

7500

MT48LC4M16A2TG

F516

3V2

1V6

CLK

CSN1

WEN

CASN

RASN

AD13

AD12

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

F

AD8

AD9

AD10

AD11

2V4

3V2

2V8

3V2

19 CS_

17

24 A1

5500

BLM11

2502

100n
2508

100n
2514

100n
2520

100n

CKE37

CTRL

CLK38

LOGIC

WE_16

CAS_

RAS_18

COMMAND

MODE REG

BA020

BA121

A023

A225

A326

A429

A530

A631

A732

ADDRESS REGISTER

A833

A934

A1022

A1135

VDDQ

BANK0

MEMORY

ARRAY

(4,096x256x16)

SENSE AMPLIFIERS

DQML

I/O GATING

DQM DATA LOGIC

READ DATA LATCH

WRITE DRIVERS

28 41 546 124652

34SD-4 7.

3456

TO

Back-end HOST PROCESSOR

Share Memory Interface (SMI) Bus

2503

100n
2509

100n
2515

100n

DQML

DQ0 2

DQ1 4

DQ2 5

DQ3 7

DQ4 8

DQ5 10

DQ6

DQ7 13

DQ8 42

DQ10 45

DQ11 47

DQ12 48

DQ13 50

DQ14 51

DQ15 53

0V

DQMU

0V

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

11

44DQ9

DQ1

DQ0

DQ15

DQ10

DQ11

DQ12

DQ13

DQ14

DQ9

DQ8

SERVICE

1501

TXD_SER

1

SERVICE

2

3

RXD_SER

RTS_SER

4

5

6

CTS_SER

F512

7

5501

TO/FROM PC INTERFACE

BLM11

+5VDB

F505

2522

F507

3530

6K8

DQML 15

DQMH 39

DQMH

DATA INPUT REGISTER DATA OUTPUT REGISTER

NC

36 40

78

+5VDB

3521

0V

3

7502-B

BC847BS

4

F506

3526

100R

1n5

3528

10K

F509

1n5

2523

6K8

3535

10K

F514

F513

3537

* OPTION

91011

1K

0V7

3523

5

4K7

+3V3DB

F503

3524

4K7

2

0V

3525

10K

+5VDB

2521

100n

+5VDB

7501-C
74HCT14D

14

F508

6

5

7

+5VDB

F511

3532

100R

+5VDB

7501-D
74HCT14D

14

7

7501-E
74HCT14D

14

7

F515

98

+5VDB

11 10

3522

14

7

14

7

6
7502-A
BC847BS
1

10K

3V2

7501-A
74HCT14D

12

3529

330R

7501-B
74HCT14D

34

3536

330R

+5VDB

14

13 12

7

F501

F502

F504

7501-F
74HCT14D

3531

680R

3533

100K

3538

680R

F517F510

F518

TXD_SER

RXD_SER

SERVICE

TXD_SER

RXD_SER

RTS_SER

+3V3DB

CTS_SER

M6-89

M6-90

M6-88

M6-89

M6-90

M6-98

M6-94

12

A

B

C

D

E

G

1501 E6
2502 B2
2503 B3
2508 B2
2509 B3
2514 C2
2515 C3
2520 C2
2521 D9
2522 D7
2523 F8
3500 C1
3521 B9
3522 B9
3523 B9
3524 B9
3525 C9
3526 D7
3528 E7
3529 E10
3530 E7
3531 E10
3532 E9
3533 E10
3535 F8
3536 F10
3537 F8
3538 F10
5500 A2
5501 F6
7500 C1
7501-A D10
7501-B E10
7501-C D9
7501-D F9
7501-E G9
7501-F G10
7502-A C9
7502-B B9
F500 A2
F501 B10
F502 B10
F503 B9
F504 C10
F505 D7
F506 D7
F507 E7
F508 E9
F509 E7
F510 E8
F511 E9
F512 F6
F513 F8
F514 F9
F515 F9
F516 C1
F517 E10
F518 F10

F

OPTION

*

V DC vtg measured in STOP-mode.

1

2345

CL 16532163_005.eps

7610

89

11

12

181201

Back-End Host Processor

123

Back end
HOST PROCESSOR

A

B

TO

Backend Memory

C

D

E

F

G

H

I

EMI BUS

7600
STi5580

DATA7

148

D7
D6
D5
D4
D3
D2
D1
D0

EMI_WEN
EMI_DQML
EMI_DQMH
EMI_CAS
EMI_CS0

CE_ROMN

EMI_RAS

EMI_CLK

3634

*

47R

M2-71
M2-69
M2-70
M2-76
M2-56
M2-55

3V2
3V2
3V2
3V2
3V2

3V2

3V2

1V6

DATAF
WCLKF
BCLKF
FLAGF
SYNCF
V4F

147
146
145
144
143
142
141

138
130
128
129
139
140
134
133
132

135
117
118

DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0

RAS1n_OR_HOLDREQ
READNOTWRITE_OR_DMAACK
WE0n
WE1n
CAS0n_OR_HOLDACK
CAS1n_OR_DMAREQn
CE1n
CE2n
CE3n

CSn

RAS0n_OR_CE4n
OEn
CPU_RAM_CLK

B_DATA

16

B_WCLK

20

B_BCLK

17

B_FLAG

18

B_SYNC

19

B_V4

21
22

NRSS_OUT

0V5
3V2
1V6
0V
0V
3V2
0V

VDD3_3_14VDD3_3_247

3V2

+3V3ST

F616

V DC vtg measured in STOP-mode.

OPTION

*

12345

Electrical Diagrams and PWB’s

F600

0V

4

7605-B

BC847BS

D9

D8

D10

151

152

153

DATA8

DATA9

DATA10

D11

154

DATA11

3

D12

155

DATA12

D13

156

157

DATA13

DATA14

D14

D15

158

DATA15

0V
5

A1

161

ADR1

2

I S

Interface

FRONT-END

VSS_4

VSS_683

VDD3_3_381

100n

VDD3_3_4107

100n

2618

+3V3DB

VSS_8108

2619

VSS_15

50

100n

2616

2617

5604

BLM11

Backend SDRAM and

SERVICE INTERFACE

4u7

162

ADR2

2603

163

ADR3

A3

3615

164

ADR4

3611

10K

165

ADR5

10K

ADR6

166

167

ADR7

0V

A8A7A6A5A4

168

ADR8

7605-A
BC847BS

2

F619

A9

A10

169

170

ADR9

ADR10

3V2

173

ADR11

MEMORY interface

uP ST20cpu

A/V/Sub

demultiplexer

VSS_10137

VSS_12160

VDD3_3_6159

100n

VDD3_3_7

184

100n

2621

VSS_14185

VDD3_3_5136

100n

2620

To

+3V3DB

3604

A12

A11

174

175

ADR12

ADR13

2622

6

1

A13

176

ADR14

100n

4K7

F618

A14

3614

1K

A16

A15

177

178

ADR15

ADR16

Audio

Video

4

2604

A20A2A19

A18

A17

179

180

181

182

ADR17

ADR18

ADR19

ADR20

Subpicture

5

M6-78

M6-77

RSTNB

OS_BOOT

100n

+3V3ST

3K3

3622

A21

3V2

0V

124

115

183

ADR21

RSTn

PWM1_BOOTFROMROM

SYSTEM

USE

ADDRESS DATA

AD267AD366AD458AD559AD660AD761AD862AD9

AD069AD1

68

AD7

AD6

AD5

AD4

AD3

AD2

AD1

AD0

M4-79

FLASH_OEN

10K

3629

0V

0V

F656

131

186

187

READY

PIO-0|0

PIO-0|1

SDRAM CONTROLLER

DO084DO1

AD1273AD13

AD1070AD11

71

72

63

DQ0

AD9

AD8

AD13

AD12

AD11

AD10

M7-81

M7-80

M7-83

M7-82

M7-85

M7-84

P4

P1

P0

P2

P3

P5

0V0V0V0V0V

0V

188

189

190

191

192

193

PIO-0|2

PIO-0|3

PIO-0|4

PIO-0|5

PIO-0|6

PIO-0|7

MPEG

DECODER

DO589DO690DO791DO892DO9

DO286DO387DO4

88

85

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

SMI BUS

35SD-4 7.

678910

M6-77

10K

3620

F900

TCK

3V2

113

TCK

JTAGPORT 2 I/O PORT 3 I/O PORT 4 I/O

VSS_15199

100n

3621

F902

F903

F901

TDO

TDI

0V2

3V2

112

111

110

TDI

TDO

VDD_RGB23VDD_YCC

2V5

100n

4u7

2633

TMS

3V2

TMS

F615

OS_BOOT

10K

F905

F904

TRSTN

0V

109

TRSTn

30

2V5

F614

M6-78

RSTNB

DCU TESTLANDS

F906

F907

3630

1600

1

2

3

4

5

6

7

8

VSS_RGB24VSS_YCC

31

5605

BLM11

5606

BLM11

4u7

2634

2635 100n

VDDSTD

+3V3DB

M4-86, M7-86

SDA

3608

47R

3602

194

PIO-1|0

DO1097DO1198DO1299DO13

93

DQ9

DQ8

DQ7

DQ10

+3V3DB

M7-87, M4-87

SCL

3K3

3609

47R

3603

F603

F602

3V2

3V2

3V2

195

196

PIO-1|1

PIO-1|2

100

DQ13

DQ12

DQ11

3V2

197

PIO-1|3

DO14

101

DQ14

3V2

200

PIO-1|4

DO15

102

DQ15

3K3

M5-88

SERVICE

+3V3ST

10K

3625

3V2

202

203

201

PIO-1|5

TRIG_IN

TRIG_OUT

SDCASn

SDCS0n74SDCS1n75SDRASn76SDWEn

77

2V8

2V4

CSN1

CASN

M5-98

M5-90

TXD_SER

RXD_SER

78

3V2

3V2

WEN

RASN

M2-62

M2-63

M2-65

M2-64

TXD_S2B

RXD_S2B

CPR_S2B

SUR_S2B

0V

204

205

206

PIO-2|0

PIO-2|1

PIO-2|2

DQML79DQMU

MEMCLKIN82MEMCLKOUT

95

80

1V60V0V

47R

3635

DQMU

DQML

CLK

M7-91

SIOCLK

0V20V3V2

207

208

PIO-2|3

PIO-2|4

M7-92

SIODATA

*

*

0V5

0V

3V2

1

PIO-2|52PIO-2|63PIO-2|7

VD_STI25_114

2V5

M7-93

PCMDATA3

22p2642

*

3618100R

F617

0R

3657

0V3

VSS_215VSS_338

VDDSTC

M5-94

CTS_SER

3641

F637

10K

3627

VD_STI25_237

100n

2623

M2-45

M2-54

RSTNF

EANF

M7-95

MUTE

M7-96

M7-97

P7

P6

M7-99

M5-98

SCART1

SCART0

RTS_SER

M7-100

47R

3V2

3V2

0V

0V80V0V

0V3

3V2

10

PIO-3|511PIO-3|612PIO-3|713PIO-4|039PIO-4|140PIO-4|241PIO-4|342PIO-4|443PIO-4|544PIO-4|645PIO-4|7

PIO-3|06PIO-3|17PIO-3|28PIO-3|39PIO-3|4

Subpicture

decoder

VSS_565

VSS_796

VD_STI25_364

VD_STI25_494

100n

100n

2624

2625

OPTION

RES ARRAY

VD_STI25_5119

100n

2626

M7-102

M7-101

YC1

YC0

47R

3607-D

F648

F647

0V

VSS_9121

M7-103

YC2

F649

VD_STI25_6149

100n

2627

M7-105

M7-104

YC4

YC3

F651

F650

VSS_11150

M7-107

M7-106

YC6

YC5

F652

F653

0V0V0V0V0V

0V

VD_STI25_7171

100n

2628

M7-108

47R

3600-D

YC7

3606

F655

2605

F654

0V

46

VSS_13

172

RES ARRAY

3619

68R

100p

VD_STI25_8198

100n

2629

2632

OPTION

+3V3ST

10K

2630

11 12

M7-109

KOKVOCDET

22n

10K

2610

3601

3V2

3V2

FOR DEV EVALUTION

126IRQ1

IRQ0 127

IRQPORT 0 I/O PORT 1 I/O

AC3
LPCM
MPEG1/2

DTS

VIDEO

ENCODER

PIXCLK_27MHz

PWM0_HSYNCn

PWM2_VSYNC

120

116

114

1V63V1V6

HSYNC

VSYNC

27M_CLK

M7-128

M6-127

M7-129

6 7 8 9 10 11

100R

F601

F604

F605

3V2

125

IRQ2

AUDIO

DECODER

KARAOKE

V_REF_DAC_YCC

35

0V

F610

3644

3646

3628

3K3
3631

3K3
3632

3K3

V_REF_DAC_RGB

I_REF_DAC_YCC

28

36

0V

1V3

F611

F612

1% 13K

3K9

1%

+3V3ST

I_REF_DAC_RGB

29

1V3

F613

3645

1% 13K

3K9

3647

1%

2606

VDDA_PCM

VSSA_PCM 49

VDD_PLL 122

VSS_PLL 123

DAC_PCMOUT1

DAC_PCMOUT2

PCM_OUT0

PCM_CLK

LRCLK

SPDIF_OUT

ADC_SCLK

ADC_LRCLK

ADC_DATA

ADC_PCMCLK

R_OUT
G_OUT
B_OUT
C_OUT

CVBS_OUT

Y_OUT

12

SCLK

10u

3V2

VDDSTA

5602

2607

100n

F606

48

53

0V

54

0V

51

1V6

52

0V

55

1V6

56

1V6

57

1V6

103
104
105
106

27

0V

26

0V

25

0V

33

0V6

34

0V3

32

0V3

7603
FXO-31FL

1

TS

2V5

0V
0V
0V

1V6

5601

BLM11

F607

F621

F622

F623

R_OUT
G_OUT
B_OUT
C_OUT
CVBS_OUT
Y_OUT

+3V3DB

5603

3V2

VDD

OSC
GND

13

BLM11

10u

2608

2609

100n

3638

100R
3639

100R

3637

330R

RES ARRAY

3633-A

18

27

36

F624
F625
F626
F627

F628

F629

F630

F631

45

RES ARRAY

3640-A

18

27

36

45

100R

OPTION

BLM11

F608

2631

100n

4

3

1V5

OUT

2

3648

M7-127

M6-127

13 14

100R

OPTION

2638

100R

27M_CLK

PCMDATA1

2636

PCMDATA2

22p

2637

22p

PCMCLK

2613

22p

PCMSCLK

PCMDATA0

PCMLRCLK

SPDIF

22p

2614

KOKSCLK

KOKLRCLK

KOKDATA

KOKPCMCLK

22p

22p

2639

22p

2640

2641

CL 16532163_006.eps

2612

22p

14

F641
F642
F643
F644
F645
F646

1600 C10

F637 C8

2603 B3

F641 G14

2604 B4

F642 G14
F643 G14

2605 B9

F644 G14

2606 C12

F645 G14

2607 C12

F646 G14

2608 C13

F647 D9

2609 C13

F648 D9

2610 B11

F649 D9

2611 F14

F650 D9

2612 F14
2613 E14

F651 D9

2614 F14

F652 D9
F653 D9

2616 I2

A

2617 I2

F654 D9

2618 I3

F655 B9

2619 I3

F656 D5

2620 I3

F900 B10

2621 I3

F901 B10
F902 B10

2622 I4
2623 I8

F903 B10

2624 I8

F904 B10

2625 I8

F905 B10

2626 I9

F906 B10

2627 I9

F907 B10

2628 I9

B

2629 I9
2630 I10
2631 I13
2632 I10
2633 I10
2634 I10
2635 I10
2636 D14
2637 D14
2638 G13
2639 G14

C

2640 H13
2641 H14
2642 B8
3600-D A9
3601 C11
3602 B6
3603 B6
3604 B4
3606 B9

D

E

F

G

H

I

3607-D B9
3608 A6
3609 A6
3611 B3
3614 B4
3615 C3
3618 B8
3619 A9
3620 B10
3621 A10
3622 D5
3625 B7
3627 C8
3628 C11
3629 C5
3630 B10
3631 C11
3632 D11
3633-A E13
3634 F1
3635 I7
3637 D13
3638 D13
3639 D13
3640-A F13
3641 B8
3644 I11
3645 I11
3646 I11
3647 I11
3648 I13
3657 C8
5601 C12
5602 C12
5603 H13
5604 I2
5605 H10
5606 I10
7600 D1
7603 I12
7605-A B3
7605-B B2
F600 B3
F601 C11
F602 C6
F603 C6
F604 C11
F605 D11
F606 D12
F607 D12
F608 I13
F610 H11
F611 H11
F612 H11
F613 H11
F614 I10
F615 I10
F616 I2
F617 C8
F618 B4
F619 B3
F621 E12
F622 E12
F623 E12
F624 F13
F625 F13
F626 F13
F627 F13
F628 F13
F629 F13
F630 F13
F631 F13

M7-110

M7-111

M7-112

M7-113

M7-114

M7-115

M7-116

22p

22p

2611

*

M7-117

M7-118

M7-119

M7-120

M7-121
M7-122
M7-123
M7-124
M7-125
M7-126

181201

Back-End Module Interface

1

Back-end

A

B

C

1701

D

E

S AUDIO OUTPUT

2

F

ANALOG VIDEO & I

G

H

I

OPTION

*

V DC vtg measured in STOP-mode.

Module Interface

1

I2CSCL

/SIOCLK

2

/SIODATA

I2CSDA

3

SCART1

4

SCART0

5

6

B_VID

7

8

G_VID

9

10

R_VID

11

12

Y_VID

13

14

C_VID

15

16

CVBS_VID

17

+3V3

18

19

+5V

20

21

22

F762

23

24

25

F763

26

27

28

F716

29

F719

30

1234

(U)

(Y)

MUTE

PCMSCLK

PCMDATA0

PCMCLK

PCMLRCLK

2745

F706

F799

F796

F795

F792

F791

F752

F788

F785

F708

F703

3776

22R

22p

Electrical Diagrams and PWB’s

2345

F798

T712

T714

T716

T718

2738

F786

AGNDB

F720

100n

2V

F790

4

2728

2727

1n

2711

F787

74HCT1G125

5

3

7716

47p

47p

2708

5719

BLM11

2

1

1V5

F760

F761

F712

1n

BLM11

BLM11

M6-100

M6-99

M7-135

M7-134

M7-133

M7-138

M7-137

M7-136

+3V3

+5V

+12V

M6-95

M6-113

M6-114

M6-112

M6-115

+5VDB

SPDIF

5708

5705

+3V3

M6-116

T701

T703

+5V

+12V

*

+5V

3781

3701

0R

3K3

2721

2713

C700

C701

C702

C703

*

2746

2747

10u

3769

120R

3

*

3K3

3705

4V7

100u

7711

LF25C

1IN3

7714

LF25C

IN1OUT

7715
LD1117

IN2OUT

GND

7708
LD1117

IN3OUT

GND

100u

100u

0V5

2729

GND

GND

DT33

2722

2714

2

2

DT

1

1

2760

2761

2762

2763

100n

*

*

100n

OUT

100n

100n

3

F707

+3V3

3784

3785

2732

100n

2736

2

*

2V6

3V2

7719
BSN20

7720
BSN20

2V6

F709

2720

+12V

100u

3767

0V2

0V

10u

F726

F728

2737

270R

T702

T704

*

100n

C58
C59
C60
C61
C63
C64
C65
C66
C67
C68

5713

BLM11

5714

BLM11

5715

BLM11

5716

BLM11

5718

BLM31

5720

BLM11

5703

BLM11

5704

BLM31

5706

BLM11

5707

BLM11

5709

BLM11

5711

BLM11

STi5588
OPTION

F724

F725

F727

F729

F710

F711

F715

F717

F718

F721

C70
C71
C72
C73
C74
C75
C76
C77
C78
C79

*

567

*

3782

3741

3737

100R

3783

100R

68R

68R

+3V3DB

VDDSTD

VDDSTA

VDDSTC

VDDSTA

+3V3AF

+3V3DF

AGNDB

+5V

+5VDF

+5VAF

+5VDB

+5VAB

6

SIOCLK

SIODATA

M6-87

SCL

M6-86

SDA

M6-91

M6-92

M6-121

M6-122

M6-123

M6-124

M6-125

M6-126

36SD-4 7.

789

+5VAB

2716

100n

R_OUT

3733

AGNDB

3708

AGNDB

3760

AGNDB

3724

AGNDB

3772

AGNDB

3750

AGNDB

1%

2718

560R

G_OUT

1%

2702

560R

B_OUT

1%

2734

560R

CVBS_OUT

1%

2706

560R

C_OUT

1%

2743

560R

Y_OUT

1%

2725

560R

47p

47p

47p

47p

47p

47p

5702

12u

5700

12u

5717

12u

5701

12u

5722

12u

5710

12u

2719

2703

2735

2707

2744

2726

F700

47p

F701

47p

F702

47p

F704

47p

F705

47p

F713

47p

3734

3709

3761

3725

3773

3751

1%

560R

1%

560R

1%

560R

1%

560R

1%

560R

1%

560R

2717

2u2

2701

2u2

2733

2u2

2705

2u2

2742

2u2

2724

2u2

AGNDB

F743

2700

100n

AGNDB

F733

2731

100n

AGNDB

F753

2704

100n

AGNDB

F738

2739

100n

AGNDB

F758

2723

100n

AGNDB

F748

2V

+5VAB

2V

+5VAB

2V

+5VAB

2V

+5VAB

2V

+5VAB

2V

3728

3735

3702

3710

3755

3762

3715

3726

3765

3774

3738

3752

68K

3729

470R

F740

4V4

6

2

7707-A
BC847BPN

1

47K

3736

F744

220R

68K

3703

470R
F730

4V4

6

7701-A

2

BC847BPN

1

47K

3711

F734

220R

68K

3756

470R
F750

4V4

6

7713-A

2

BC847BPN

1

47K

3763

F754

220R

68K

3716

470R
F735

4V4

6

7705-A

2

BC847BPN

1

47K

3727

F739

220R

68K

3766

470R
F755

4V4

6

7718-A

2

BC847BPN

1

47K

3775

F759

220R

68K

3739

470R
F745

4V4

6

7710-A

2

BC847BPN

1

47K

F749

3753

220R

89

3730

100R

3731

220R

3704

100R

3706

220R

3757

100R

3758

220R

3718

100R

3722

220R

3768

100R

3770

220R

3740

100R

3742

220R

10 11 12 13

BSN20

3712

0R

3713

0R

3790

F714

F723

F732

F737

F742

T711

T713

T715

T717

T719

T720

T721

T722

T723

T724

T725

*

*

+5V

3K3

3791

F775

F776

F777

T726

3K3

T727

F780

F778

F779

F783

F784

F781

F782

4V4

F741

4V4
F731

4V4

F751

4V4

F736

4V4
F756

4V4

F746

5

F768

5

F764

5

F772

5

F766

5

F774

5

F770

4

7707-B

BC847BPN

3

2V41V4

4

7701-B

BC847BPN

3

2V41V4

4

7713-B

BC847BPN

3

2V41V4

4

7705-B

BC847BPN

3

2V41V4

4

7718-B

BC847BPN

3

2V41V4

4

7710-B

BC847BPN

3

2V41V4

3732

68R

3707

68R

3759

68R

3723

68R

3771

68R

3743

68R

M7-133

R_VID

M7-134

G_VID

M6-87

M6-86

M7-135

B_VID

M7-136

CVBS_VID

M7-137

C_VID

M7-138

Y_VID

M6-110

M6-111

M6-93

M6-97

M6-96

(V)

M6-85

M6-84

M6-83

M6-82

M6-81

M6-80

+3V3

OPTION

(Y)

7721

BSN20

SCL

SDA

(U)

M6-117

M6-118

M6-119

M6-120

M6-109

M6-101

M6-102

M6-103

M6-104

M6-105

M6-106

M6-107

M6-108

M6-128

M6-129

M6-127

3788

3789

7722

+3V3

10 11 12

BLM11

BLM11

+12V

PCMDATA1

PCMDATA2

PCMDATA3

5723

5724

1702

*

8

7

6

5

4

3

P7

2

P6

1

P5

8

P4

7

6

P3

5

P2

4

3

P1

2

P0

1

1705

47p

2751

47p

2750

KOKSCLK

KOKLRCLK

KOKDATA

KOKPCMCLK

KOKVOCDET

YC0

YC1

YC2

YC3

YC4

YC5

YC6

YC7

HSYNC

VSYNC

27M_CLK

CL 16532163_007.eps

13

C58 H5
C59 H5
C60 H5
C61 H5

1700

*

16

15

14

13

12

11

10

9

8
7

6

5

4

3

2

1

S AUDIO OUTPUT

2

I

*

1704

*

1

2

3

4

5

6

7

8

2

I S KARAOKE INPUT

1703

*

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

DIGITAL VIDEO OUTPUT

181201

C63 H5
C64 H5
C65 H5
C66 H5
C67 H5
C68 I5
C70 H6

A

C71 H6
C72 H6
C73 H6
C74 H6
C75 H6
C76 H6
C77 H6
C78 H6
C79 I6
1700 A13
1701 C1
1702 A13
1703 F13

B

1704 E13
1705 C13
2700 C8
2701 C8
2702 C7
2703 C7
2704 F8
2705 F8
2706 F7
2707 F7
2708 D2

C

2711 D2
2713 G4
2714 G4
2716 A8
2717 A8
2718 B7
2719 B7
2720 F4
2721 G4
2722 G4
2723 I8
2724 I8

D

2725 I7
2726 I7
2727 B2
2728 A2
2729 C4
2731 D8
2732 C4
2733 D8
2734 E7
2735 E7
2736 D4
2737 D5

E

2738 H2
2739 G8
2742 G8
2743 H7
2744 H7
2745 H1
2746 C4
2747 E4
2750 D13
2751 D13
2760 H4

F

2761 H4
2762 H4
2763 I4
3701 A4
3702 B8
3703 B9
3704 C9
3705 A4
3706 C9
3707 C10
3708 C7
3709 C8

G

3710 C8
3711 C9
3712 B12
3713 C12
3715 E8
3716 E9
3718 F9
3722 F9
3723 F10
3724 F7
3725 F8
3726 F8

H

3727 F9
3728 A8
3729 A9
3730 A9
3731 A9
3732 A10
3733 B7
3734 B8
3735 B8
3736 B9
3737 B6

I

3738 H8
3739 H9
3740 I9
3741 A6
3742 I9
3743 I10
3750 I7
3751 I8
3752 I8

3753 I9
3755 D8
3756 D9
3757 D9
3758 D9
3759 D10
3760 E7
3761 E8
3762 E8
3763 E9
3765 G8
3766 G9
3767 E5
3768 G9
3769 E4
3770 G9
3771 G10
3772 H7
3773 H8
3774 H8
3775 H9
3776 H2 F759 H9
3781 F4
3782 A6
3783 A6
3784 A4
3785 A4
3788 D11
3789 D11
3790 C12
3791 D12
5700 C7
5701 F7
5702 A7
5703 F5
5704 F5
5705 B3
5706 G5
5707 G5
5708 A3
5709 G5
5710 I7
5711 G5
5713 B5
5714 C5
5715 C5
5716 C5
5717 D7
5718 D5
5719 H2
5720 E5
5722 G7
5723 D12
5724 D12
7701-A C9
7701-B C10
7705-A F9
7705-B F10
7707-A A9
7707-B A10
7708 F4
7710-A I9
7710-B I10
7711 C4
7713-A D9
7713-B D10
7714 D4
7715 D4
7716 H2
7718-A G9
7718-B G10
7719 A5
7720 B5
7721 C12
7722 D12
C700 H4
C701 H4
C702 H4
C703 I4
F700 A8
F701 C8
F702 D8
F703 F2
F704 F8
F705 G8
F706 D2
F707 E4
F708 F2
F709 F5
F710 F6
F711 F6
F712 B3
F713 I8
F714 E12
F715 G6
F716 G1
F717 G6
F718 G6
F719 G1
F720 H2
F721 G6
F723 E12
F724 B5
F725 C5
F726 C5
F727 C5
F728 D5
F729 D5
F730 C9
F731 C10
F732 E12
F733 C8
F734 C9
F735 F9

F736 F10
F737 F12
F738 F8
F739 F9
F740 A9
F741 A10
F742 F12
F743 A8
F744 B9
F745 I9
F746 I10
F748 I8
F749 I9
F750 D9
F751 D10
F752 E2
F753 D8
F754 E9
F755 G9
F756 G10
F758 G8

F760 H3
F761 A3
F762 F1
F763 G1
F764 C10
F766 F10
F768 A10
F770 I10
F772 D10
F774 G10
F775 A12
F776 A12
F777 A12
F778 B12
F779 B12
F780 A12
F781 C12
F782 C12
F783 B12
F784 B12
F785 F2
F786 F2
F787 F2
F788 E2
F790 H2
F791 E2
F792 E2
F795 E2
F796 D2
F798 F2
F799 D2
T701 A3
T702 A5
T703 B3
T704 B5
T711 F12
T712 G2
T713 G12
T714 G2
T715 G12
T716 G2
T717 G12
T718 G2
T719 G12
T720 H12
T721 H12
T722 H12
T723 I12
T724 I12
T725 I12
T726 C12
T727 D12

Top View (Overview)

Electrical Diagrams and PWB’s

37SD-4 7.

PART 1

CL 16532163_08a.eps

PART 2

CL 16532163_08b.eps

CL 16532163_008.eps

030102

1100 A2
1210 B2
1300 A2
1301 A1
1303 A1
1501 D1
1600 C1
1700 B3
1701 B3
1702 B3
1703 C3
1704 C1
1705 C3
2100 A2
2101 A2
2104 A2
2105 A2
2108 A2
2109 A2
2110 A2
2111 A2
2112 A2
2113 A2
2114 A2
2115 A2
2116 A2
2117 A3
2118 A2
2119 A3
2120 A2
2121 A3
2122 A3
2137 A3
2209 B1
2217 B1
2219 B2
2220 B2
2300 A1
2302 A1
2303 A1
2304 A1
2305 A2
2306 A2
2308 A2
2309 A2
2311 A1
2312 A1
2313 A1
2402 C1
2417 D3
2521 D1
2522 C1
2603 C2
2604 C1
2606 C3
2607 C3
2608 C2
2613 C3
2632 D3
2633 D3
2634 D3
2635 D3
2636 C3
2637 C3
2642 D3
2701 B3
2705 B3
2713 A3
2714 A3
2717 B3

2720 A3
2721 A3
2722 A3
2724 B3
2727 D3
2728 D3
2729 B3
2732 B3
2733 B3
2736 B3
2737 B3
2738 C3
2742 B3
2745 C3
2746 B3
2747 B3
2750 D3
2751 D3
2760 A3
2761 A1
3103 A2
3104 A2
3107 A2
3108 A2
3112 A2
3116 A2
3118 B2
3119 B2
3120 B2
3121 A2
3122 B2
3123 B2
3130 A2
3131 A3
3135 A3
3136 A3
3137 A3
3139 A3
3140 A3
3141 A3
3142 A3
3143 A3
3144 A3
3145 A3
3146 A3
3147 A3
3223 C1
3224 B1
3225 B1
3226 B1
3235 B2
3238 B2
3239 A2
3242 C2
3245 B2
3247 B2
3269 B2
3273 B3
3275 B3
3277 B2
3278 A3
3279 A2
3300 A1
3301 A1
3302 A1
3303 A1
3305 A3
3306 A1
3307 A3
3308 A1

3309 A1
3310 A1
3311 A1
3314 A1
3315 A2
3316 A2
3317 A1
3319 A2
3320 A2
3321 A2
3322 A2
3323 A2
3324 A2
3325 A2
3327 A2
3328 A2
3329 A2
3330 A1
3331 A2
3333 A2
3334 A2
3335 A2
3336 A2
3337 A2
3338 A1
3425 D3
3426 D3
3428 D2
3429 D2
3521 C1
3522 D1
3523 D1
3524 D1
3526 C1
3529 D1
3531 D1
3533 D1
3536 D1
3538 D1
3600 C3
3602 D3
3603 D3
3604 C2
3607 C3
3608 D3
3609 D3
3611 C2
3614 C1
3615 C2
3618 D3
3635 C2
3637 C3
3638 C3
3639 C3
3648 C2
3657 D3
3701 D3
3705 D3
3712 D3
3713 D3
3737 D3
3741 D3
3767 B3
3769 B3
3776 C3
3781 A3
3782 D3
3783 D3
3784 D3
3785 D3

3788 D3
3789 D3
3790 D3
3791 D3
5100 A2
5101 A3
5102 A3
5202 B2
5401 C1
5500 C2
5501 D1
5602 C3
5603 C2
5605 D3
5606 D3
5703 A3
5704 A3
5705 D3
5706 A3
5707 A3
5708 D3
5709 A3
5713 B3
5714 B3
5715 B3
5716 B2
5718 B3
5719 B3
5720 B2
5723 D3
5724 D3
6300 A1
6301 A1
6302 A1
6303 A1
6304 A2
6305 A2
7107 A2
7109 A3
7111 A3
7112 A3
7113 A3
7200 B2
7205 B1
7208 B2
7401 C1
7405 D3
7410 D1
7500 C2
7600 D2
7603 C2
7605 C2
7708 A3
7711 B3
7714 B3
7715 B3
7716 C3
7719 D3
7720 D3
7721 D3
7722 D3

Detailed Top View Part 1

Electrical Diagrams and PWB’s

38SD-4 7.

PART 1

CL 16532163_08a.eps

030102

Detailed Top View Part 2

Electrical Diagrams and PWB’s

39SD-4 7.

PART 2

CL 16532163_08b.eps

030102

Bottom View (Overview)

Electrical Diagrams and PWB’s

40SD-4 7.

PART 1

CL 16532163_09a.eps

PART 2

CL 16532163_09b.eps

CL 16532163_009.eps

030102

2102 A2
2103 A2
2106 A2
2107 A2
2200 C2
2201 B2
2202 C2
2203 C2
2204 B2
2205 B2
2206 B2
2207 B2
2208 B2
2210 B2
2211 B2
2212 C3
2213 B2
2214 B3
2215 B2
2216 B2
2218 C2
2221 B2
2222 B3
2223 B2
2224 B3
2225 B2
2226 B3
2227 B2
2228 B2
2229 B2
2230 B2
2231 B2
2232 C2
2233 B3
2234 B3
2235 B3
2236 B3
2246 B3
2272 B2
2301 A2
2401 C3
2410 C3
2411 C3
2412 C3
2413 D3
2414 C3
2415 C2
2416 D3
2502 C2
2503 C2
2508 C2
2509 C2
2514 C1
2515 C2
2520 C2
2523 D3
2605 C2
2609 C2
2610 C2
2611 C1
2612 C1
2614 C1
2616 D1
2617 C1
2618 C2
2619 C2
2620 D2
2621 D2
2622 D2
2623 D1
2624 C1

2625 C1
2626 C2
2627 C2
2628 D2
2629 D2
2630 D1
2631 C2
2638 C2
2639 C2
2640 C2
2641 C2
2700 B1
2702 C1
2703 C1
2704 B1
2706 B1
2707 B1
2708 B1
2711 B1
2716 B1
2718 C1
2719 B1
2723 B1
2725 B1
2726 B1
2731 C1
2734 C1
2735 C1
2739 B1
2743 B1
2744 B1
2762 D3
2763 D1
3100 A2
3101 A2
3102 A1
3105 A2
3106 A2
3109 A2
3110 A2
3111 A2
3113 A2
3114 A2
3115 A2
3124 A2
3200 B2
3201 B2
3202 B2
3203 B2
3204 B2
3205 B2
3206 B2
3207 B2
3208 B2
3209 B2
3210 B2
3211 B2
3212 B2
3213 B2
3214 B2
3215 B2
3216 B2
3217 B2
3218 B2
3219 B2
3220 B2
3221 B2
3222 B2
3227 B3
3230 B2
3231 B2

3232 B2
3233 B2
3234 B2
3236 B2
3237 B3
3240 B3
3241 C2
3243 B2
3244 B2
3246 B3
3249 B2
3250 B3
3251 B2
3252 B2
3253 B2
3254 B2
3255 B2
3256 B2
3257 B2
3258 B2
3259 B2
3260 B3
3261 B2
3262 B2
3263 B2
3264 B2
3265 B2
3268 B3
3271 B2
3272 B2
3274 B2
3276 B2
3280 B2
3281 B2
3282 A2
3304 A3
3312 A3
3313 A3
3318 A2
3402 C3
3420 D3
3427 D3
3500 C1
3525 D3
3528 D3
3530 D3
3532 D3
3535 D3
3537 D3
3601 D2
3606 C2
3619 C2
3620 C2
3621 C2
3622 C2
3625 D2
3627 D1
3628 D2
3629 D2
3630 C2
3631 D2
3632 C2
3633 C1
3634 C2
3640 C2
3641 D1
3644 C1
3645 D1
3646 C1
3647 D1
3702 B1

3703 B1
3704 B1
3706 B1
3707 B1
3708 C1
3709 C1
3710 B1
3711 B1
3715 A1
3716 B1
3718 B1
3722 A1
3723 A1
3724 B1
3725 B1
3726 A1
3727 A1
3728 B1
3729 B1
3730 B1
3731 B1
3732 B1
3733 C1
3734 B1
3735 B1
3736 B1
3738 B1
3739 B1
3740 B1
3742 B1
3743 B1
3750 B1
3751 B1
3752 B1
3753 B1
3755 B1
3756 C1
3757 B1
3758 B1
3759 B1
3760 C1
3761 C1
3762 B1
3763 B1
3765 B1
3766 B1
3768 B1
3770 B1
3771 B1
3772 B1
3773 B1
3774 B1
3775 B1
5200 B3
5201 B3
5203 B3
5204 B3
5601 C2
5604 D2
5700 C1
5701 B1
5702 C1
5710 B1
5711 B1
5717 C1
5722 B1
6100 A2
6101 A2
7100 A2
7101 A2
7103 A2

7104 A2
7201 B2
7202 B2
7203 B2
7204 B2
7206 B2
7209 B1
7300 A3
7301 A3
7302 A2
7402 D3
7501 D3
7502 D3
7701 B1
7705 A1
7707 B1
7710 B1
7713 B1
7718 B1

Detailed Bottom View Part 1

Electrical Diagrams and PWB’s

41SD-4 7.

PART 1

CL 16532163_09a.eps

030102

Detailed Bottom View Part 2

Electrical Diagrams and PWB’s

42SD-4 7.

PART 2

CL 16532163_09b.eps

030102

Testpoint Overview

Electrical Diagrams and PWB’s

43SD-4 7.

CL 16532163_010.eps

230102

F100 B1
F101 B2
F102 B2
F103 A2
F104 B2
F105 A2
F106 A2
F107 B2
F108 B2
F109 A2
F110 B2
F111 B1
F112 B2
F113 B2
F114 A1
F115 A2
F116 A2
F117 A2
F118 A2
F119 A2
F120 A2
F121 B2
F122 A2
F123 B2
F124 A2
F125 B2
F126 A1
F127 A2
F128 B2
F129 B2
F130 A2
F131 B2
F132 A2
F133 A2
F134 A1
F135 A2
F136 A1
F137 A1
F138 A1
F139 A1
F140 A1
F141 B2
F142 A1
F143 B2
F144 A1
F145 A1
F146 B2
F147 A1
F148 A1
F149 A1
F150 A3
F151 A1
F152 A1
F153 A1
F154 A1
F155 A1
F156 A2
F157 A2
F158 A2
F159 A2
F160 A1
F161 A2
F162 A2
F163 A2
F164 A2
F165 A2
F166 A2
F167 A2
F168 A2
F169 A2
F170 A2

F171 A2
F172 B2
F173 B2
F174 B2
F175 B1
F176 B1
F177 A1
F178 A1
F200 C2
F201 C2
F202 C2
F203 C3
F204 B2
F206 B2
F207 B2
F208 B2
F209 B3
F210 B2
F211 B2
F212 B2
F213 B2
F214 B2
F215 B2
F216 A3
F217 A2
F218 B2
F219 B2
F220 B2
F221 B2
F222 B2
F223 B2
F224 B3
F225 B3
F226 B2
F227 B2
F229 A2
F230 A2
F231 B2
F232 A3
F233 A3
F234 B3
F235 B3
F236 C2
F237 B2
F238 C2
F239 C2
F240 B3
F241 C2
F242 B2
F243 B3
F244 C3
F245 B3
F246 B3
F247 B3
F248 B3
F250 B3
F252 B2
F253 B2
F254 B2
F255 C3
F256 B3
F258 B3
F259 B3
F260 B2
F261 B2
F263 B2
F264 B2
F265 B2
F266 B2
F267 B2
F270 B2

F271 A1
F272 B2
F273 B3
F274 B1
F275 B2
F276 B1
F277 B2
F278 B2
F279 B2
F280 B2
F281 B2
F282 B2
F283 C2
F284 B2
F285 C2
F286 B2
F287 C2
F288 B2
F289 B2
F290 B2
F291 B3
F292 B2
F300 A3
F301 A3
F302 A3
F303 A3
F304 A3
F305 A3
F306 A3
F307 A3
F308 B2
F309 A3
F310 A2
F311 A3
F312 A3
F313 A3
F314 A2
F315 A2
F316 A3
F317 A2
F318 A2
F319 A3
F320 A3
F321 A3
F322 A3
F323 A2
F325 A3
F326 A2
F327 A2
F329 A3
F331 A3
F332 A3
F334 A2
F335 A3
F337 A3
F338 A3
F339 A2
F340 A3
F341 A2
F342 A2
F343 A2
F344 A3
F400 C3
F401 C2
F402 C2
F410 D1
F411 D1
F412 D1
F500 C2
F501 D3
F502 D3

F503 D3
F504 D3
F505 C3
F506 C3
F507 D3
F508 D3
F509 D3
F510 D3
F511 D3
F512 D3
F513 D3
F514 D3
F515 D3
F516 C2
F517 D2
F518 D2
F600 C2
F601 D2
F602 D1
F603 D1
F604 D2
F605 C2
F606 C1
F607 C2
F608 C2
F610 D1
F611 D1
F612 C1
F613 D1
F614 C1
F615 D1
F616 D2
F617 D1
F618 C3
F619 C2
F621 C1
F622 C1
F623 C1
F624 C1
F625 C1
F626 C1
F627 C1
F628 C2
F629 C2
F630 C2
F631 C2
F637 D1
F641 C1
F642 C1
F643 C1
F644 C1
F645 C1
F646 C1
F647 D1
F648 C1
F649 C1
F650 C1
F651 C1
F652 C1
F653 C1
F654 C1
F655 C2
F656 D2
F700 B1
F701 C1
F702 C1
F703 A1
F704 B1
F705 B1
F706 B1
F707 B1

F708 A1
F709 A1
F710 A1
F711 A1
F712 B1
F713 B1
F714 C3
F715 A1
F716 A1
F717 A1
F718 A1
F719 A1
F720 B1
F721 B1
F723 C3
F724 B2
F725 B2
F726 B2
F727 C1
F728 B1
F729 B2
F730 B1
F731 B1
F732 C3
F733 B1
F734 B1
F735 B1
F736 A1
F737 C3
F738 A1
F739 A1
F740 B1
F741 B1
F742 C3
F743 B1
F744 B1
F745 B1
F746 B1
F748 B1
F749 B1
F750 B1
F751 B1
F752 A1
F753 B1
F754 B1
F755 B1
F756 B1
F758 B1
F759 B1
F760 C1
F761 B1
F762 A1
F763 A1
F764 B1
F766 A1
F768 B1
F770 B1
F772 B1
F774 B1
F775 B1
F776 B1
F777 B1
F778 B1
F779 B1
F780 B1
F781 C1
F782 C1
F783 C1
F784 C1
F785 A1
F786 B1

F787 A1
F788 A1
F790 B1
F791 B1
F792 B1
F795 B1
F796 B1
F798 A1
F799 B1
F900 C3
F901 C3
F902 C3
F903 C3
F904 C3
F905 C3
F906 C3
F907 C3
T201 B3
T202 B3
T203 B3
T204 B3
T205 B3
T206 B3
T207 B3
T208 B3
T209 B3
T210 B3
T211 B3
T212 B3
T213 B3
T214 B3
T215 B3
T216 B3
T217 B3
T218 B3
T219 B3
T220 B3
T221 C3
T222 C3
T223 C3
T224 C3
T225 C3
T226 C3
T227 C3
T228 C3
T229 C3
T230 C3
T701 D1
T702 D1
T703 D1
T704 D1
T711 C1
T712 A1
T713 C1
T714 A1
T715 C1
T716 A1
T717 C1
T718 A1
T719 C1
T720 C1
T721 C1
T722 C1
T723 C1
T724 C1
T725 C1
T726 D1
T727 D1

Electrical Diagrams and PWB’s

44SD-4 7.

Personal notes: Personal notes:

Alignments

8. Alignments

Not applicable.

9. Circuit Descriptions, List of Abbreviations and IC Data

EN 45SD-4 8.

Index of this chapter:

1. Introduction

2. Loader

3. Mono Board

4. Abbreviations

5. IC Data

Notes:

• Only the new circuit parts are described. For the other
descriptions, see the SD3.0 Service Manual (3122 785

11010).

• For a good understanding of the following circuit
descriptions, please also check the diagrams in chapter 6
and 7.

9.1 Introduction

9.1.1 Features

The SD4.0 modules consist of the Mercury 3 Loader
VAL6013/01 (from Philips Optical Storage), and a Mono Board.
The module is capable of analogue video (with option for digital
YUV video) and digital audio.

9.1.2 Differences

The DVD-module SD4.0 is based on its predecessor the
SD3.0, with similar functional block partitioning. However, the
implementation of most functional blocks has been redesigned
due to a new:

• Front-end (Basic Engine) processor.

• Mercury 3 Loader.

• Module interface.

• Mechanical construction.

9.1.3 Modules

The main modules are:

• Mercury 3 Loader - VAL6013/01.

• Mono Board.

9.2 Loader

The Mercury 3 Loader has an optical unit consisting of two
lasers, one for CD with a wavelength of 780 nm, and one for
DVD with a wavelength of 650 nm. The TZA1033 (item 7100)
controls the data from these lasers, and the supply to them.

9.3 Mono Board

SD4.0 Block Diagram

Loader

Front-end Loader interface DVDalas2+

Program
memory

Back-end

SMI STi55xx EMI

(SDRAM)

Audio Video Others

9.3.1 Front-end: the Servo Part

The front-end consists of:

• The loader interface.

• The analogue DVD signal processor and laser supply.

• DVD front-end processor.

• Program memory.

The Signal Processor TZA1033

The TZA1033 (or DVDALAS2plus) is an analogue pre­processor and laser supply circuit. It contains data amplifiers
and several options for radial tracking and focus control.
It is possible to optimise the dynamic range of this pre-amp/
processor combination for the LF servo and RF data paths. The
gain in both channels is separately programmable. This will
guarantee an optimal playability for all kind of discs.
Also, a dual laser supply is implemented, with fully automatic
laser control including stabilisation and an ON/OFF switch, plus
a separate supply pin for power efficiency.
In the SD3.0 module, the servo signals were fed to the MACE2
servo processor, while the HF output signal was fed to the
SAA7335 decoder. In the new SD4.0 module, these ICs are
combined into one chip: the SAA7812 Iguana.
This chip contains the following blocks: channel decoder, block
decoder, servo processor, and microcontroller.

Iguana

(front-end

processor)

(back-end

processor)

Module

interface

Figure 9-1

(Flash memory /

SDRAM)

CL 16532163_047.eps

230102

EN 46 SD-49.

Circuit Descriptions, List of Abbreviations and IC Data

The Servo Processor/Decoder SAA7812

The servo circuit in the SAA7812 (item 7200) takes care of the
servo controls.
In a CD system, there are some 12 control loops active. About
six of them are needed to adjust the servo error signals, that is
once per disc rotation. It also adjusts offsets, signal amplitudes,
and loop gains (AGCs), to enlarge system robustness and to
avoid expensive potentiometer adjustments in production.
The other six loops determine the laser spot position on the
disc in the radial, axial (focus), and tangential directions.
It also has to take care that the spot accesses a required
position as fast as possible. This access system consists of two
parts, namely the actuator and the sled, which are (within a
certain range) mechanically and electrically independent.
Therefore, during an access, the servo has to control as well
the actuator as the sled.
The analogue signals, from the diode pre-processor, are
converted into a digital representation using A/D converters.
For the communication between the host processor (STi5580)
and the servo processor, the S2B bus is used. This bus
supports full-duplex asynchronous communication.

The SAA7812 is also a combined CD/DVD compatible
decoding device. The device operates with built in hardware for
CD/DVD error correction and de-interleaving operations. It
decodes EFM or EFM+HF signals directly from the laser pre­amplifier, including analogue front-end, PLL data recovery,
demodulation, and error correction.

Its analogue front-end input (the channel decoder), converts
the HF input signal to the digital domain via an 8-bit ADC,
preceded by an AGC circuit to obtain the optimum performance
from the converter. An external resonator clocks this block.
This subsystem recovers the data from the channel stream. It
corrects asymmetry, performs noise filtering and equalisation,
and finally recovers the bit clock and data from the channel
using a digital PLL.
The demodulator part detects the frame synchronisation
signals and decodes the EFM (14 bit) and EFM+ (16 bit) data
and sub-code words into 8-bit symbols. Via the serial output
interface, the I

2

S data (audio and video) go to the DVD decoder

STi5580.

The spindle-motor interface provides both motor control signals
from the demodulator and, in addition, contains a tachometer
loop that accepts tachometer pulses from the motor unit. They
drive the motor IC (BA6665FM, item 7301).

The SAA7812 has two independent microcontroller interfaces.
The first is a serial I

2

C-bus and the second is a standard 8-bit
multiplexed parallel interface. Both of these interfaces provide
access to 32 8-bit registers for control and status.

1Mbits of the memory is accessible. Conversely, when this pin
is HIGH, the upper 1Mbits is accessible.
Under front-end normal operation, the program memory (less
than 1Mbits in size) should reside in the lower bank. Therefore,
the EANF pin should be LOW at all times. Since the actual flash
memory used is 2Mbits, the upper 1Mbits is unused. This area
is reserved for possible use by the front-end self-diagnostic
software, or flash download application.

9.3.3 Back-End: the Digital Part

The back-end consists of:

• DVD back-end processor.

• External memory.

• Audio output.

• Video output.

• Miscellaneous.

DVD Back-End Processor

The SD4.0 is designed for the Sti55xx family. Some of the DVD
related features of these ICs are:

Processor Overview

Processor overview

Function STi5580 STi5588 STi5519

Basic CD/VCD/DVD decoding X X X
Extra 2-channel of I2S output (PCMDATA3) X X
Karaoke X X
DTS XX
Audio post processing (equalizer, level meter, etc) X
DVD audio X
Progressive scan at analog video output X

Figure 9-2

The Sti5580 has the same architecture as the Sti5508 (used in
earlier DVD generations), and is pin-to-pin compatible.
It works on 3.3 V (VDD), and comprises the following functions:

• Video decoder which supports MPEG1 and MPEG2

• Audio decoder which supports AC-3, MPEG1, MPEG2,
DTS, PCM, S/PDIF, MP3.

• PAL/NTSC video encoder with simultaneously Y/C, CVBS
and RGB/YUV outputs

• The video encoder supports Closed Caption and allows
MacroVision 7.0/6.1

• Full screen On Screen Display (OSD) generator

• Three on-chip PLLs to generate all necessary clocks (as
reference the 27 MHz video clock is used).

Input

Input data comes from the I2S-bus. The front-end interface of
this device, accepts DVD, CD and CD-DA information.

CL 16532163_048.eps

240102

9.3.2 Interface

The interface between front-end (SAA7812) and back-end
(Sti55xx) is via:

• I2S bus (BCLK, DATA, WCLK, FLAG, SYNC and V4).

• S2B bus (RXD_S2B, TXD_S2B, CPR_S2B and
SUR_S2B).

• Miscellaneous I/O ports (RSTNF= front-end reset, EANF=
front-end processor boot select).

Note: These lines contain series resistors (47 or 100 Ω) for
easy hardware debugging, and for EMC/noise reduction of the
high-speed I2S lines.

The front-end processor SAA7812 (Iguana) has two boot
modes: normal boot from flash memory, or serial mode.
The boot selection is via the EANF pin. The Iguana samples the
EANF signal level once during boot-up. Once boot-up is
completed, this pin is no longer used for this purpose.
However, in the SD4.0 circuit, the EANF is also connected to
the flash memory. Therefore, when this pin is LOW, the lower

Signal Processing

For video, the input data stream is decoded to the appropriate
MPEG, Sub Picture, and OSD data streams, after which they
are fed to the PAL/NTSC encoder. This cell will convert the
digital MPEG/Sub Picture/OSD stream into a standard base
band signal and into RGB components. It handles interlaced
and non-interlaced data, can perform CC/TXT encoding, and
allows MacroVision copy protection.

For audio, the processing cell is a fully compatible DTS, Dolby
Digital (AC-3), MPEG1, MPEG2, and PCM decoder, capable of
decoding 5.1 and 2 channel streams.

Output

For video, six analogue output pins are available on which
CVBS, S-VHS (Y/C), and RGB/YUV signals are present. They
go directly to output connector 1701.

Circuit Descriptions, List of Abbreviations and IC Data

4k

4k

EN 47SD-4 9.

External Memory

The STi55xx family is capable of accessing external memory
via three buses:

• The enhanced memory interface (EMI). This interface is

configurable and can be used to access Flash, ROM, and
various flavours of DRAM. The EMI is connected to:
– Flash/ROM in Bank 3 (item 7410 and 7401 optional).

This memory holds the DVD firmware, and is controlled
by pin 186 (FLASH_OE) of the STi5580. It must be
able to perform a download (by disk or DCU ) in a
Flash-only system.

– SDRAM in Bank 0 (item 7402, optional). A 64Mbits (4M

x 16bits) 7.5ns SDRAM can be connected to the EMI
when the module is used as a Software Development
Module (SDM).

• The shared memory interface (SMI). The SMI is only

capable of accessing SDRAM. The SMI is connected to a
64Mbits (4M x 16bit) 7.5ns SDRAM (item 7500). There is
no longer the option to use two pieces of 16Mbits SDRAM.
The SDRAM has the following functions:
– It is used by the MPEG video decoder as a frame

buffer.

– It holds the software and the variables used by it.

• The I2C bus. Via this bus, the NVRAM (or EEPROM) is

accessible. This memory is used to store user settings,
player settings, and region code.

Note: The I2C controller PCF8584T is not longer used in the
SD4.0.

the other three channels (pins 32, 33 and 34) are Y, C, and
CVBS.
A new video output buffer (see diagram M7, e.g. item 7707 for
R) is implemented: an 8MHz/16MHz selectable filter stage and
a 75Ω drive stage.

Miscellaneous I/O Signals

Most general IO ports are connected directly to the module
interface. Compared with the SD3.0 module, some on-board
circuits are removed, as it made more sense (and more cost
effective) to implement these circuits externally.

SCART

Previously, an on-board circuit switches the 0|6|12V signal to
the correct voltage level. This circuit is removed, and instead,
the SCART0 and SCART1 signals are now directly available at
the module interface.

Mute

Previously, an on-board circuit provides the driving current for
the muting transistors, as well as maintains the correct time
delay (to prevent switching noise). This circuit is removed.
Instead, the MUTE signal is now directly available at the
module interface.

Service

Service Port Buffer

Audio Output

The audio interfaces available in SD4.0 are I2S and S/PDIF for
digital audio output, and I2S karaoke microphone input.

I2S audio

The STi55xx is capable of 6-channel I2S output. These
channels can be configured to output 5.1 Dolby Digital, DTS,
etc.

• PCM_OUT0: left and right.

• PCM_OUT1: centre and LFE.

• PCM_OUT2: left and right surround.
Two additional channels (available in STi5580 and STi5588)
are capable of providing down-mixed stereo.

S/PDIF

The S/PDIF signal level (item 7600, pin 57, SPDIF_OUT) is 5V
TTL at module interface. To meet the complete S/PDIF
specifications, an external de-coupling circuit (item 7716,
diagram M7) is implemented.

I2S karaoke (optional)

The STi5580 and STi5588 have built-in karaoke processing.
The internal karaoke block accepts I2S signal, acting as the
master by generating the required KOKPCMCLK frequency.
This frequency is always 1/4 the music sampling frequency.
An external analogue-to-digital converter (ADC), acting as
slave, is required to convert the microphone signals to I2S
signals.

Video Output

Digital video (optional)

Digital YUV output is routed directly from STi55xx ports to a 22­pin connector (item 1703). From the same connector, the
HSYNC, VSYNC and 27MHZ_CLK signals are available. The
digital YUV connector is the interface to external video
processing devices, such as high quality progressive scan
codex and high quality video DAC.

Analogue video

The STi55xx is capable of 6-channel analogue video. Three
channels (pins 25, 26 and 27) are RGB or YUV format, while

5V

1k

Out

100R

TXD_SER

1n5

3V3

10k

In

10k

RXD_SER

10k

6k8

CL 16532163_049.eps

Figure 9-3

The service port (see diagram M5) is simplified to reduce cost.
The unused RTS and CTS lines are no longer connected. A
transistor buffer (item 7502) is used instead of the Schmitt
Trigger buffer.
The overall loading and driving capability of the RS-232
emulator port is not greatly changed. However, as a
precaution, the Schmitt Trigger circuit remains in the layout as
an optional implementation.

5V buffers

Previously, some IO lines (centre_on and kar_bypass) are
buffered from 3.3V to 5V. These buffers are removed.
Therefore, the signal levels at the module interface are 3.3V
only.
Note: Care must be taken that the external circuitry does not
force any IO line from the module to more than 3.8V.

External DAC

In the fourth DVD player generation (VFM2002), a new external
audio DAC from AKM (AK4382) is used.

230102

EN 48 SD-49.

Circuit Descriptions, List of Abbreviations and IC Data

New FTD

In the fourth DVD player generation (VFM2002), a new FTD is
used, which requires a new serial bus (SIO instead of I2C bus).
For this bus, the following pins are used: pin 207 for the clock
signal of the bus (SIOCLK), and pin 208 for the data signal of
the bus (SIODATA).
The same voltage translator circuit (items7719 and 7720) as for
the I2C bus is used for the SIO bus:

Serial Bus Voltage Translator

5V

3k3

(optional)

3k3

3V3

5V I2C levels 3.3V I2C levels

CL 16532163_050.eps

230102

Figure 9-4

Since the 5V in the module is turned 'off' during the DVD
player’s standby mode, the pull-up to 5V on the module is not
used. Instead, pull-up resistors to a +5V standby voltage are
added outside the module.

9.3.5 Top Side Connectors

All mono board interfaces are located on the topside of the
board, as shown below:

SD4.0 Connections

71 81 4

Service Karaoke

Front

Monoboard

Top view

Extension

connectors

21

Digital video 3 Basic connector

1221 161

18 18

Figure 9-6

Loader

Tray Motor

1

Loader

Loader

OPU

30

CL 16532163_052.eps

11

1

Disc Motor

81

Sledge Motor

23

1

connector

230102

9.3.4 Power Supply (Diagram M7)

SD4.0 Power Supply Block Diagram

12V

5V

(power supply)

Module interface

3.3V

3.3V

regulator

(optional)

2.5V / 1.8V
regulator

Front-end

motor driver

Front-end

5V

Front-end

3.3V

Back-end

3.3V

Back-end

2.5V / 1.8V

CL 16532163_051.eps

Figure 9-5

The main power supplies to the module are 3.3V, 5V, and 12V
(input via connector 1701).
The back-end section mainly uses the 3.3V. On-board linear
regulators are used to generate the 2.5V or 1.8V required by
the STi55xx.
The front-end section mainly uses the 5V and 12V. An optional
on-board linear regulator can be used to generate the 3.3V
required by the front-end. The motor and servo drivers use the
12V.

230102

Circuit Descriptions, List of Abbreviations and IC Data

9.4 Abbreviation List

ADC Analogue to Digital Converter
AM Amplitude Modulation
BE Basic Engine
ComPair Computer aided rePair
CD-DA CD Digital Audio
CS Chip Select
DAC Digital to Analogue Converter
DAIO Digital Audio Input Output
DENC Digital Encoder
DFU Direction For Use: description for the

end user
DNR Dynamic Noise Reduction
DRAM Dynamic RAM
DSD Direct Stream Digital
DSP Digital Signal Processing
DTS Digital Theatre Sound
DVD Digital Versatile Disc
EEPROM Electrically Erasable and

Programmable Read Only Memory
EFM Eight to Fourteen bit Modulation
EMI External Memory Interface (STi55xx)
FFC Flat Foil Cable
FLASH Flash memory
HPF High Pass Filter
HW Hardware
I2C Integrated IC bus (signals at 5V level)
I2S Integrated IC Sound bus (signals at

3.3V level)
IC Integrated Circuit
IF Intermediate Frequency
IRQ Interrupt Request
LLD Loss Less Decoder
LPCM Linear Pulse Code Modulation
LRCLK Left/Right clock
LVTTL Low Voltage Transistor Transistor

Logic (3.3V logic)
MACE Mini All Compact Disc Engine
MPEG Motion Pictures Experts Group
NC Not Connected
NVM Non Volatile Memory: IC containing

TV related data e.g. alignments
OC Open Circuit
OPU Optical Pick-up Unit
PCB Printed Circuit Board (see PWB)
PCM Pulse Code Modulation
PCM_CLK Audio system clock for DAC
PCM_OUTx Audio serial output data
PSU Power Supply Unit
PWB Printed Wiring Board (see PCB)
RAM Random Access Memory
RGB Red, Green and Blue colour space
ROM Read Only Memory
S2B Serial to Basic Engine, communication

bus between host- and servo

processor
SCL Serial Clock I2C
SCLK Audio serial bit clock
SDA Serial Data I2C
SDRAM Synchronous DRAM
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
STBY Standby
SVCD Super Video CD
SW Software
THD Total Harmonic Distortion
TTL Transistor Transistor Logic (5V logic)
uP Microprocessor
VCD Video CD
Y/C Luminance (Y) and Chrominance (C)

signal
YUV Component video

EN 49SD-4 9.

EN 50 SD-49.

9.5 IC Data

In this paragraph, the internal blockdiagrams and pinning are
given of ICs that are drawn as 'black box' in the electrical
diagrams (with exception of 'memory' and 'logic' ICs).

9.5.1 Diagram M1

TZA1033 Device Block Diagram (item 7100)

Circuit Descriptions, List of Abbreviations and IC Data

DVDALAS2plus Advanced Analogue DVD
Signal Processor and Laser Supply

DEVICE BLOCK DIAGRAM

Diode

Ampli?ers

OPU
Interface

DVD

CD

MUX

MUX

Processing

DPD

Push Pull
Offset

compensations

Land/Groove
Swap
Mute

Var Gain

TZA1033

Balanced

HF

Data & header

Header

Land

Servo
Signals
D1-D6

Rext

V & I references

Dual Laser

Supply

Laser#1

Laser#2

3 Beam
Tracking

Figure 9-7

FTC comp.

Serial

I/Face

Control
Interface

FTC

Circuit Descriptions, List of Abbreviations and IC Data

TZA1033 Pinning (item 7100)

EN 51SD-4 9.

DVDALAS2plus Advanced Analogue DVD
Signal Processor and Laser Supply

PINNING

CD-LO

R-EXT

handbook, full pagewidth

DVD-REF

CD-A
CD-B
CD-C
CD-D

CD-REF

CD-E
CD-F

VDDA1

VSSA1

DVD-MI

DVD-A
DVD-B
DVD-C
DVD-D

DVD-LO

VDDL

CD-MI

64

63

62

1

2

3

4

5

6

7

8

9

10

11

-

12

13

14

15

16

VDDA2

61

60

59

VSSA3

VSSA2

58

57

XXX

RFN

RFP

56

55

TZA1023

VDDA3

RF-REF

54

53

TZA1033

-

---

52

51

50

49

48

O-A

47

O-B

46

O-C

45

O-D

44

VDDA4

43

VSSA4

42

S1

41

S2

40

O-CENTRAL

39

LPF-DPD2

38

LPF-DPD1

37

TD2

36

FTC-REF

35

TD1
TDO

34

FTC

33

17

18

19

20

21

22

23

24

25

26

27

28

29

COM

30

COO

VDDD5

-

­TM

LAND

HEADER

SIDA

VDDD3

SICL

SILD

COP

VSSD

31

STB

NEW

32

MXXxxx

-

Fig.2 Pin configuration.

Figure 9-8

EN 52 SD-49.

9.5.2 Diagram M2

SAA7812HL Block Diagram (item 7200)

Circuit Descriptions, List of Abbreviations and IC Data

Channel decoder

A/D

Bit Detector
& Demodulator

Motor/
Tacho interface

A/D

A/D

CD/DVD Erco

Memory Proc

PCS
accelerator

servo
accelerator

Servo

RAM

servo
processor

control
registers

Block decoder/
encoder

interface

drive
interface

subcode
interface

Figure 9-9

Erco

µP

address
decoder

1k5 aux
RAM

SFRs

DRAM interface

Memory Proc

cpu interface

Host
interface

multimedia
interface

DAC

CSS
module

cpu

1k5 ROM

736 RAM

port regs

Circuit Descriptions, List of Abbreviations and IC Data

SAA7812HL Pinning (item 7200)

EN 53SD-4 9.

VDD3P1

V

SS

DAC_RP

DAC_RN

DAC_VPOS

DAC_VNEG

DAC_LP

DAC_LN

TEST1
TEST2

CRIN

CROUT

V

DD

V
HFIN_DN
HFIN_DP

HFIN_SE

VCOM

IREF

WREFLO

TEST3

V

V

DD

SIN_PHI

COS_PHI

TEST4

XDET(auxadc)

ACT_EMFP

ACT_EMFN

TEST5

TEST6
TEST7

UOPB

UOPT

ALPHA0

V

V

DD

D2_TLN
D3_REN
D4_FEN

S1_MIRN

VRIN
FTCH

P5_7_DEFO_N

P5_6_DEFI_N

P5_5_TL

P5_4_RP_FOK

3P8

3C4

MOTO1

203

204

205

206

207

208

1

3P1

2

T1

3

T2

4

T3

5
6
7
8
9

10
11
12
13
14
15

A1

16

A1

17

SS

18
19
20
21

22
23
24

A2

25

SS

A2

26
27

28
29
30
31
32
33

34
35
36
37
38

A3

39

SS

A3

40

D1

41
42
43
44
45

S2

46
47
48
49
50
51

52

5354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899

V

198

199

200

201

202

3C4

SS

vampire2

vampire3

vampire4

vampire5

TEST8

TEST9

TEST10

POR_NEG

BCA

3P8

SS

DD

DD

vampire1

V

196

197

XDD14

XDD15

V

V

IECO_CL1

191

192

193

194

195

XDD9

XDD10

XDD11

XDD12

XDD13

186

187

188

189

190

XDD8

185

XDD7

184

XDD6

183

XDD5

182

XDD4

181

SAA7812 M3x

Iguana

XDD3

180

XDD2

179

XDD1

178

XDD0

177

3P7

SS

XWR

XDA10

V

174

175

176

3C3

3C3

DD

SS

XDA8

XDA9

V

XRAS

XCAS_HI

XCAS_LO

V

167

168

169

170

171

172

173

XDA7

166

XDA6

165

XDA5

164

XDA4

163

XDA3

162

XDA2

161

100

XDA1

160

101

XDA0

159

102

3P6

3P6

DD

SS

V

V

158

156

DASP

155

CS1

154

CS0

153

V

5P1

SS

152

V

5P1

DD

151

DA2_GRD

150

DA0

149

PDIAG

148

DA1_GWR

147

IOCS16

146

INTRQ

145

DMACK_GRQ

144

IORDY

143

DIOR

142

DIOW

141

DMARQ_GACK

140

V

5P2

SS

139

V

5P2

DD

138

DD15

137

DD0

136

DD14

135

DD1

134

DD13

133

DD2

132

DD12

131

DD3

130

DD11

129

DD4

128

DD10

127

DD5

126

DD9

125

DD6

124

DD8

123

DD7

122

V

5P3

SS

121

V

5P3

DD

120

HRESET

119

P3_0_RXD1

118

P3_1_TXD1

117

P3_2_INT0

116

P3_3_INT1

115

V

3P5

SS

V

114
113

112
111
110
109
108
107

106
105

103

104 157

3P5

DD

P3_4_RXD2

P3_5_TXD2
P3_6_WRN
P3_7_RDN
UDA7
UDA6
UDA5

UDA4
UDA3

SL

FO

RA

P5_3_CE1

P5_0_SCL

P5_2_CLO

P5_1_SDA

3P2

3P2

SS

DD

V

V

REF_SIN

RAC_SW

REF_COS

3C1

3C1

SS

DD

V

V

P4_4_PXT

P4_6_PXT2

P4_5_PXT0

P4_7_PXT2EN

UA15

UA14

UA13

P4_3_A19

P4_2_A18

P4_1_A17

UA12

P4_0_A16

3P3

UA11

UA10

SS

DD

V

V

EAN_WAITN

3P3

UA9

UA8

3C2

3C2

SS

DD

SCCLK

V

V

UA7_P1_7

UA6_P1_6

UA5_P1_5

PSENN_CS

ALE_ASTB

DSDEN_SRST

UA4_P1_4

3P4

3P4

SS

UDA0

UDA1

UDA2

DD

V

V

UA3_P1_3

UA2_P1_2

UA1_P1_1

UA0_P1_0

Figure 9-10

EN 54 SD-49.

9.5.3 Diagram M6

STi5580 Block Diagram (item 7600)

Circuit Descriptions, List of Abbreviations and IC Data

2 UART &

2 SmartCards

Ext peripherals:

Flash, additional

DRAM SDRAM

Analog/digital

video output

DVD

16, 32 or

64 Mbit

SDRAM

2

C

I

Internal peripherals

Front-end &

link interface

DMA

Programmable
CPU interface
(EMI)

Shared SDRAM
interface (SMI)

DENC

command port

MPEG

Communications

I/F

OSD, SP
decoder
and mixing

Central

DMAs

MPEG

Debug

block move

arbiter

ST20 arbiter & memory controller

SDRAM

block move

SDRAM arbiter (LMC)

Video

filtering

CPU
(C2+)

Clock

generator

CD FIFOs Command I/F

Video

decoder

Audio &
Karaoke

Refill

control

CACHE SUBSYSTEM

Diagnostic

controller

CPU arbiter

TAP

ICache

SRAM

DCache

RID

JTAG
debugging
interface

Audio in/out

Figure 9-11

Circuit Descriptions, List of Abbreviations and IC Data

STi5580 Pinning (item 7600)

PIO2[4]

208

PIO2[5]
PIO2[6]
PIO2[7]

VDD3_3

VSS

PIO3[0]
PIO3[1]
PIO3[2]
PIO3[3]
PIO3[4]
PIO3[5]
PIO3[6]
PIO3[7]

VDD2_5

VSS

B_DATA
B_BCLK
B_FLAG

B_SYNC

B_WCLK

B_V4

NRSS_OUT

VDD_RGB

VSS_RGB

B_OUT
G_OUT
R_OUT

V_REF_RG

I_REF_RG

VDD_YCC
VSS_YCC

Y_OUT
C_OUT

CV_OUT

V_REF_YC

I_REF_YC

VDD2_5

VSS

PIO4[0]
PIO4[1]
PIO4[2]
PIO4[3]
PIO4[4]
PIO4[5]
PIO4[6]
PIO4[7]

VDD3_3

VDD_PCM

VSS_PCM

VSS

DAC_SCLK

DAC_PCMOUT0

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52

5354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899

PIO2[3]

207

PIO2[2]

206

PIO2[1]

205

PIO2[0]

204

TRIGGER_OUT

203

TRIGGER_IN

202

PIO1[5]

201

PIO1[4]

200

VSS

199

VDD2_5

198

PIO1[3]

197

PIO1[2]

196

PIO1[1]

195

PIO1[0]

194

PIO0[7]

193

PIO0[6]

192

PIO0[5]

191

PIO0[4]

PIO0[3]

PIO0[2]

PIO0[1]

PIO0[0]

190

189

188

187

186

PQFP 208

VSS

VDD3_3

CPU_ADR[21]

CPU_ADR[20]

CPU_ADR[19]

CPU_ADR[18]

CPU_ADR[17]

CPU_ADR[16]

CPU_ADR[15]

185

184

183

182

181

180

179

178

177

STi5580

(rev F)

CPU_ADR[14]

176

CPU_ADR[13]

175

CPU_ADR[12]

174

CPU_ADR[11]

173

VSS

172

VDD2_5

171

CPU_ADR[10]

170

CPU_ADR[9]

169

CPU_ADR[8]

168

CPU_ADR[7]

167

CPU_ADR[6]

166

CPU_ADR[5]

165

CPU_ADR[4]

164

CPU_ADR[3]

163

CPU_ADR[2]

162

CPU_ADR[1]

161

100

VSS

160

101

VDD3_3

159

102

CPU_DATA[15]

158

103

CPU_DATA[14]

157

104

156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105

EN 55SD-4 9.

CPU_DATA[13]
CPU_DATA[12]
CPU_DATA[11]
CPU_DATA[10]
CPU_DATA[9]
CPU_DATA[8]

VSS
VDD2_5

CPU_DATA[7]
CPU_DATA[6]
CPU_DATA[5]
CPU_DATA[4]
CPU_DATA[3]
CPU_DATA[2]
CPU_DATA[1]
CPU_DATA[0]
CPU_CAS1
CPU_CAS0
CPU_RAS1

VSS
VDD3_3

CPU_CE[0]
CPU_CE[1]
CPU_CE[2]
CPU_CE[3]
CPU_WAIT
CPU_RW
CPU_BE[1]
CPU_BE[0]
IRQ[0]
IRQ[1]
IRQ[2]
RESET

VSS_PLL
VDD_PLL
VSS

PIX_CLK

VDD2_5

CPU_PROCLK
CPU_OE
PWM0
PWM1
PWM2
TCK
TDI
TDO
TMS
TRST

VSS
VDD3_3

ADC_PCMCLK
ADC_DATA

VSS

VDD2_5

SMI_ADR[4]

SMI_ADR[5]

SMI_ADR[6]

SMI_ADR[7]

SMI_ADR[8]

SMI_ADR[9]

SMI_ADR[3]

SMI_ADR[2]

SMI_ADR[1]

SPDIF_OUT

DAC_LRCLK

DAC_PCMCL K

DAC_PCMOUT1

DAC_PCMOUT2

SMI_ADR[0]

SMI_ADR[10]

SMI_ADR[11]

SMI_ADR[12]

SMI_ADR[13]

SMI_WE

SMI_RAS

SMI_CAS

SMI_CS[0]

SMI_CS[1]

VSS

VDD3_3

SMI_DQML

SMI_CLKIN

SMI_DQMU

SMI_DATA[0]

SMI_DATA[1]

SMI_DATA[2]

SMI_DATA[3]

SMI_DATA[4]

SMI_DATA[5]

SMI_DATA[6]

SMI_DATA[7]

VSS

VDD2_5

SMI_DATA[8]

SMI_DATA[9]

SMI_CLKOUT

SMI_DATA[10]

SMI_DATA[11]

ADC_SCLK

SMI_DATA[12]

ADC_LRCLK

SMI_DATA[13]

SMI_DATA[14]

SMI_DATA[15]

Figure 9-12

EN 56 SD-410.

10. Spare Parts List

Spare Parts List

SD4 EU

Various

0001 9305 023 61301 VAL6013/01 (PHOS) B
1301 3139 241 00131 FFC FOIL 23P/158/23P

1MMP FOLD

Mono PWB

Various

1100 2422 025 17458 CON BM H 23P F 1.00 FFC

1210 2422 543 01242 RES XTL SM 8MHz 4672

1300 2422 025 17272 CON BM H 8P F 1.00 FFC

1301 2422 025 17273 CON BM H 11P F 1.00 FFC

1303 2422 025 16543 CON BM H 4P M 2.00 PH

1501 2422 025 16703 CON H 7P M 2.00 PH SMD R
1701 2422 025 17451 CON BM H 30P F 1.00 FFC



2100 4822 122 33777 47pF 5% 63V
2101 4822 126 13193 4.7nF 10% 63V
2104 3198 016 31020 0603 25V 1nF
2105 4822 126 14305 100nF 10% 16V 0603
2108 4822 126 14305 100nF 10% 16V 0603
2109 4822 126 14305 100nF 10% 16V 0603
2110 3198 016 31020 0603 25V 1nF
2111 4822 126 14305 100nF 10% 16V 0603
2112 4822 126 14305 100nF 10% 16V 0603
2113 4822 126 14305 100nF 10% 16V 0603
2114 4822 126 14305 100nF 10% 16V 0603
2115 4822 126 14226 82pF 5% 50V 0603
2116 4822 126 13193 4.7nF 10% 63V
2117 4822 126 14226 82pF 5% 50V 0603
2118 4822 126 14305 100nF 10% 16V 0603
2119 4822 126 14507 18pF 5% 50V 0603
2120 4822 126 14305 100nF 10% 16V 0603
2121 4822 126 14305 100nF 10% 16V 0603
2122 4822 126 14305 100nF 10% 16V 0603
2137 4822 126 14305 100nF 10% 16V 0603
2200 4822 126 14305 100nF 10% 16V 0603
2201 4822 126 14305 100nF 10% 16V 0603
2202 5322 126 11583 10nF 10% 50V 0603
2203 4822 126 14305 100nF 10% 16V 0603
2204 4822 126 14305 100nF 10% 16V 0603
2205 3198 017 41050 0603 10V 1µF COL R
2206 3198 017 41050 0603 10V 1µF COL R
2207 4822 122 33761 22pF 5% 50V
2208 4822 126 14305 100nF 10% 16V 0603
2209 4822 126 14305 100nF 10% 16V 0603
2210 4822 122 33761 22pF 5% 50V
2211 4822 126 14305 100nF 10% 16V 0603
2212 4822 126 14305 100nF 10% 16V 0603
2213 4822 126 14305 100nF 10% 16V 0603
2214 4822 126 14305 100nF 10% 16V 0603
2215 4822 126 14305 100nF 10% 16V 0603
2216 4822 126 14305 100nF 10% 16V 0603
2217 4822 126 14305 100nF 10% 16V 0603
2218 4822 126 14305 100nF 10% 16V 0603
2219 4822 126 14305 100nF 10% 16V 0603
2220 4822 126 14305 100nF 10% 16V 0603
2221 4822 126 13879 220nF 20% 16V
2222 4822 126 14305 100nF 10% 16V 0603
2223 4822 126 14305 100nF 10% 16V 0603
2224 4822 126 14305 100nF 10% 16V 0603
2225 4822 126 14305 100nF 10% 16V 0603
2226 4822 126 14305 100nF 10% 16V 0603
2227 4822 126 13617 1.8nF 10% 50V
2228 4822 126 14549 33nF 16V O6O3
2229 4822 126 13617 1.8nF 10% 50V
2230 4822 126 14305 100nF 10% 16V 0603
2231 4822 126 14305 100nF 10% 16V 0603
2232 4822 126 14305 100nF 10% 16V 0603
2233 4822 122 31765 100pF 2% 63V 1206
2234 4822 122 31765 100pF 2% 63V 1206
2235 4822 122 31765 100pF 2% 63V 1206
2236 4822 122 31765 100pF 2% 63V 1206
2300 4822 126 14305 100nF 10% 16V 0603

0.3 R

30P AT-51

0.3 R

0.3 R

SMD R

0.3 R

2301 4822 126 14305 100nF 10% 16V 0603
2302 4822 126 14305 100nF 10% 16V 0603
2303 4822 126 14305 100nF 10% 16V 0603
2304 4822 126 14305 100nF 10% 16V 0603
2305 4822 126 14305 100nF 10% 16V 0603
2306 4822 126 14305 100nF 10% 16V 0603
2308 4822 126 14305 100nF 10% 16V 0603
2309 4822 126 14305 100nF 10% 16V 0603
2401 4822 126 14305 100nF 10% 16V 0603
2417 4822 126 14305 100nF 10% 16V 0603
2502 4822 126 14305 100nF 10% 16V 0603
2503 4822 126 14305 100nF 10% 16V 0603
2508 4822 126 14305 100nF 10% 16V 0603
2509 4822 126 14305 100nF 10% 16V 0603
2514 4822 126 14305 100nF 10% 16V 0603
2515 4822 126 14305 100nF 10% 16V 0603
2520 4822 126 14305 100nF 10% 16V 0603
2522 4822 126 14247 0603 50V 1N5 COL R
2603 3198 030 74780 EL SM 35V 4U7 PM20 COL

2604 4822 126 14305 100nF 10% 16V 0603
2605 4822 122 31765 100pF 2% 63V 1206
2606 4822 124 23002 10µF 16V
2607 4822 126 14305 100nF 10% 16V 0603
2608 4822 124 23002 10µF 16V
2609 4822 126 14305 100nF 10% 16V 0603
2610 4822 126 14494 22nF 10% 25V 0603
2612 4822 122 33761 22pF 5% 50V
2613 4822 122 33761 22pF 5% 50V
2614 4822 122 33761 22pF 5% 50V
2616 4822 126 14305 100nF 10% 16V 0603
2617 4822 126 14305 100nF 10% 16V 0603
2618 4822 126 14305 100nF 10% 16V 0603
2619 4822 126 14305 100nF 10% 16V 0603
2620 4822 126 14305 100nF 10% 16V 0603
2621 4822 126 14305 100nF 10% 16V 0603
2622 4822 126 14305 100nF 10% 16V 0603
2623 4822 126 14305 100nF 10% 16V 0603
2624 4822 126 14305 100nF 10% 16V 0603
2625 4822 126 14305 100nF 10% 16V 0603
2626 4822 126 14305 100nF 10% 16V 0603
2627 4822 126 14305 100nF 10% 16V 0603
2628 4822 126 14305 100nF 10% 16V 0603
2629 4822 126 14305 100nF 10% 16V 0603
2630 4822 126 14305 100nF 10% 16V 0603
2631 4822 126 14305 100nF 10% 16V 0603
2632 4822 126 14305 100nF 10% 16V 0603
2633 3198 030 74780 EL SM 35V 4U7 PM20 COL

2634 3198 030 74780 EL SM 35V 4U7 PM20 COL

2635 4822 126 14305 100nF 10% 16V 0603
2636 4822 122 33761 22pF 5% 50V
2637 4822 122 33761 22pF 5% 50V
2700 4822 126 14305 100nF 10% 16V 0603
2701 3198 030 82280 EL SM 50V 2U2 PM20 COL

2702 4822 122 33777 47pF 5% 63V
2703 4822 122 33777 47pF 5% 63V
2704 4822 126 14305 100nF 10% 16V 0603
2705 3198 030 82280 EL SM 50V 2U2 PM20 COL

2706 4822 122 33777 47pF 5% 63V
2707 4822 122 33777 47pF 5% 63V
2708 3198 016 31020 0603 25V 1nF
2711 3198 016 31020 0603 25V 1nF
2713 4822 124 12095 100µF 20% 16V
2714 4822 126 14305 100nF 10% 16V 0603
2716 4822 126 14305 100nF 10% 16V 0603
2717 3198 030 82280 EL SM 50V 2U2 PM20 COL

2718 4822 122 33777 47pF 5% 63V
2719 4822 122 33777 47pF 5% 63V
2721 4822 124 12095 100µF 20% 16V
2722 4822 126 14305 100nF 10% 16V 0603
2723 4822 126 14305 100nF 10% 16V 0603
2724 3198 030 82280 EL SM 50V 2U2 PM20 COL

2725 4822 122 33777 47pF 5% 63V
2726 4822 122 33777 47pF 5% 63V
2727 4822 122 33777 47pF 5% 63V
2728 4822 122 33777 47pF 5% 63V
2729 4822 126 14305 100nF 10% 16V 0603
2731 4822 126 14305 100nF 10% 16V 0603
2732 4822 126 14305 100nF 10% 16V 0603
2733 3198 030 82280 EL SM 50V 2U2 PM20 COL

2734 4822 122 33777 47pF 5% 63V
2735 4822 122 33777 47pF 5% 63V

R

R

R

R

R

R

R

R

2736 4822 124 12095 100µF 20% 16V
2737 4822 126 14305 100nF 10% 16V 0603
2738 4822 126 14305 100nF 10% 16V 0603
2739 4822 126 14305 100nF 10% 16V 0603
2742 3198 030 82280 EL SM 50V 2U2 PM20 COL

2743 4822 122 33777 47pF 5% 63V
2744 4822 122 33777 47pF 5% 63V
2745 4822 122 33761 22pF 5% 50V
2746 4822 124 12095 100µF 20% 16V
2760 4822 126 14305 100nF 10% 16V 0603
2761 4822 126 14305 100nF 10% 16V 0603
2762 4822 126 14305 100nF 10% 16V 0603
2763 4822 126 14305 100nF 10% 16V 0603

R



3104 4822 117 13501 82Ω 5% 0.62W 0603
3107 5322 117 13028 12k 1% 0.063W 0603 RC22H
3108 4822 117 13501 82Ω 5% 0.62W 0603
3116 4822 051 30103 10k 5% 0.062W
3118 4822 051 30103 10k 5% 0.062W
3119 4822 051 30103 10k 5% 0.062W
3120 4822 051 30103 10k 5% 0.062W
3121 4822 117 11152 4Ω7 5%
3122 4822 051 30103 10k 5% 0.062W
3123 4822 051 30103 10k 5% 0.062W
3130 4822 117 12139 22Ω 5% 0.062W
3131 4822 051 30222 2k2 5% 0.062W
3135 4822 051 30474 470k 5% 0.062W
3136 4822 051 30392 3k9 5% 0.063W 0603
3137 4822 051 30152 1k5 5% 0.062W
3139 4822 051 30221 220Ω 5% 0.062W
3140 4822 051 30103 10k 5% 0.062W
3141 4822 051 30103 10k 5% 0.062W
3142 4822 051 30101 100Ω 5% 0.062W
3143 4822 051 30103 10k 5% 0.062W
3144 4822 051 30103 10k 5% 0.062W
3145 4822 051 30101 100Ω 5% 0.062W
3147 4822 051 30472 4k7 5% 0.062W
3200 4822 051 30223 22k 5% 0.062W
3202 4822 051 30223 22k 5% 0.062W
3204 4822 051 30223 22k 5% 0.062W
3205 4822 051 30223 22k 5% 0.062W
3209 4822 051 30223 22k 5% 0.062W
3211 4822 051 30223 22k 5% 0.062W
3213 4822 051 30223 22k 5% 0.062W
3216 4822 051 30223 22k 5% 0.062W
3217 4822 051 30223 22k 5% 0.062W
3218 4822 051 30223 22k 5% 0.062W
3219 4822 051 30223 22k 5% 0.062W
3222 4822 051 30008 0Ω jumper
3223 4822 051 30101 100Ω 5% 0.062W
3224 4822 051 30101 100Ω 5% 0.062W
3227 4822 117 13573 NETW 4 X 47Ω 5% MNR14
3230 4822 051 30392 3k9 5% 0.063W 0603
3231 4822 051 30272 2k7 5% 0.062W
3232 4822 051 30392 3k9 5% 0.063W 0603
3233 4822 051 30472 4k7 5% 0.062W
3234 4822 051 30479 47Ω 5% 0.062W
3235 4822 051 30472 4k7 5% 0.062W
3236 4822 051 30103 10k 5% 0.062W
3237 4822 051 30008 0Ω jumper
3238 4822 051 30472 4k7 5% 0.062W
3239 4822 051 30472 4k7 5% 0.062W
3240 4822 051 30102 1k 5% 0.062W
3241 4822 051 30223 22k 5% 0.062W
3242 3198 031 11010 RST NETW 1206 4X100Ω

3243 4822 051 30331 330Ω 5% 0.062W
3244 4822 117 13525 24k 1% 0.62W RC22H 0603
3246 4822 051 30101 100Ω 5% 0.062W
3247 4822 051 30151 150Ω 5% 0.062W
3249 4822 051 30472 4k7 5% 0.062W
3250 4822 051 30102 1k 5% 0.062W
3251 4822 051 30472 4k7 5% 0.062W
3257 4822 051 30472 4k7 5% 0.062W
3260 4822 051 30103 10k 5% 0.062W
3261 4822 051 30472 4k7 5% 0.062W
3262 4822 051 30102 1k 5% 0.062W
3263 4822 051 30102 1k 5% 0.062W
3264 4822 051 30102 1k 5% 0.062W
3265 4822 117 12891 220k 1% ERJ3Ω
3268 4822 051 30103 10k 5% 0.062W
3269 4822 051 30103 10k 5% 0.062W
3280 4822 051 30479 47Ω 5% 0.062W
3281 4822 051 30472 4k7 5% 0.062W
3300 4822 051 30008 0Ω jumper
3301 4822 117 12917 1Ω 5% 0.062W CASE0603

PM5 COL R

Spare Parts List

EN 57SD-4 10.

3302 4822 117 12917 1Ω 5% 0.062W CASE0603
3304 4822 051 30682 6k8 5% 0.062W
3306 4822 051 30681 680Ω 5% 0.062W
3307 4822 051 30008 0Ω jumper
3308 4822 117 13501 82Ω 5% 0.62W 0603
3309 4822 051 30681 680Ω 5% 0.062W
3310 5322 117 13026 4k7 1% 0.063W 0603 RC22H
3311 5322 117 13026 4k7 1% 0.063W 0603 RC22H
3312 4822 051 30333 33k 5% 0.062W
3313 4822 117 13501 82Ω 5% 0.62W 0603
3314 4822 117 13632 100k 1% 0603 0.62W
3316 4822 051 30682 6k8 5% 0.062W
3318 4822 051 30333 33k 5% 0.062W
3319 4822 051 30681 680Ω 5% 0.062W
3320 4822 051 20228 2Ω2 5% 0.1W
3321 4822 051 30008 0Ω jumper
3322 4822 051 20228 2Ω2 5% 0.1W
3323 4822 051 30682 6k8 5% 0.062W
3324 4822 051 30008 0Ω jumper
3325 4822 051 30008 0Ω jumper
3327 5322 117 13049 470Ω 1% 0.063W 0603

3328 5322 117 13049 470Ω 1% 0.063W 0603

3330 4822 051 30103 10k 5% 0.062W
3331 4822 051 30183 18k 5% 0.062W
3333 4822 051 30008 0Ω jumper
3334 4822 051 30103 10k 5% 0.062W
3335 4822 051 20228 2Ω2 5% 0.1W
3336 4822 051 30682 6k8 5% 0.062W
3337 4822 051 20228 2Ω2 5% 0.1W
3402 4822 051 30103 10k 5% 0.062W
3426 4822 051 30008 0Ω jumper
3428 4822 051 30008 0Ω jumper
3500 4822 051 30103 10k 5% 0.062W
3521 4822 051 30102 1k 5% 0.062W
3522 4822 051 30103 10k 5% 0.062W
3523 4822 051 30472 4k7 5% 0.062W
3524 4822 051 30472 4k7 5% 0.062W
3525 4822 051 30103 10k 5% 0.062W
3526 4822 051 30101 100Ω 5% 0.062W
3528 4822 051 30103 10k 5% 0.062W
3530 4822 051 30682 6k8 5% 0.062W
3602 4822 051 30479 47Ω 5% 0.062W
3603 4822 051 30479 47Ω 5% 0.062W
3604 4822 051 30472 4k7 5% 0.062W
3606 4822 051 30689 68Ω 5% 0.063W 0603 RC21

3608 4822 051 30332 3k3 5% 0.062W
3609 4822 051 30332 3k3 5% 0.062W
3611 4822 051 30103 10k 5% 0.062W
3614 4822 051 30102 1k 5% 0.062W
3615 4822 051 30103 10k 5% 0.062W
3619 4822 051 30103 10k 5% 0.062W
3620 4822 051 30103 10k 5% 0.062W
3621 4822 051 30103 10k 5% 0.062W
3622 4822 051 30332 3k3 5% 0.062W
3625 4822 051 30103 10k 5% 0.062W
3627 4822 051 30103 10k 5% 0.062W
3628 4822 051 30332 3k3 5% 0.062W
3629 4822 051 30103 10k 5% 0.062W
3630 4822 051 30103 10k 5% 0.062W
3631 4822 051 30332 3k3 5% 0.062W
3632 4822 051 30332 3k3 5% 0.062W
3633 3198 031 11010 RST NETW 1206 4X100Ω

3635 4822 051 30479 47Ω 5% 0.062W
3637 4822 051 30101 100Ω 5% 0.062W
3638 4822 051 30101 100Ω 5% 0.062W
3639 4822 051 30101 100Ω 5% 0.062W
3641 4822 051 30479 47Ω 5% 0.062W
3644 2322 704 61303 RST SM 0603 RC22H 13k

3645 2322 704 61303 RST SM 0603 RC22H 13k

3646 5322 117 13042 3k9 1% 0.063W 0603 RC22H
3647 5322 117 13042 3k9 1% 0.063W 0603 RC22H
3648 4822 051 30101 100Ω 5% 0.062W
3702 4822 051 30683 68k 5% 0.062W
3703 4822 051 30471 470Ω 5% 0.062W
3704 4822 051 30101 100Ω 5% 0.062W
3706 4822 051 30221 220Ω 5% 0.062W
3707 4822 051 30689 68Ω 5% 0.063W 0603 RC21

3708 5322 117 13059 560Ω 1% 0.063W 0603

3709 5322 117 13059 560Ω 1% 0.063W 0603

3710 4822 117 12925 47k 1% 0.063W 0603
3711 4822 051 30221 220Ω 5% 0.062W
3715 4822 051 30683 68k 5% 0.062W
3716 4822 051 30471 470Ω 5% 0.062W
3718 4822 051 30101 100Ω 5% 0.062W
3722 4822 051 30221 220Ω 5% 0.062W

RC22H

RC22H

RST SM

PM5 COL R

PM1 R

PM1 R

RST SM

RC22H

RC22H

3723 4822 051 30689 68Ω 5% 0.063W 0603 RC21

3724 5322 117 13059 560Ω 1% 0.063W 0603

3725 5322 117 13059 560Ω 1% 0.063W 0603

3726 4822 117 12925 47k 1% 0.063W 0603
3727 4822 051 30221 220Ω 5% 0.062W
3728 4822 051 30683 68k 5% 0.062W
3729 4822 051 30471 470Ω 5% 0.062W
3730 4822 051 30101 100Ω 5% 0.062W
3731 4822 051 30221 220Ω 5% 0.062W
3732 4822 051 30689 68Ω 5% 0.063W 0603 RC21

3733 5322 117 13059 560Ω 1% 0.063W 0603

3734 5322 117 13059 560Ω 1% 0.063W 0603

3735 4822 117 12925 47k 1% 0.063W 0603
3736 4822 051 30221 220Ω 5% 0.062W
3738 4822 051 30683 68k 5% 0.062W
3739 4822 051 30471 470Ω 5% 0.062W
3740 4822 051 30101 100Ω 5% 0.062W
3742 4822 051 30221 220Ω 5% 0.062W
3743 4822 051 30689 68Ω 5% 0.063W 0603 RC21

3750 5322 117 13059 560Ω 1% 0.063W 0603

3751 5322 117 13059 560Ω 1% 0.063W 0603

3752 4822 117 12925 47k 1% 0.063W 0603
3753 4822 051 30221 220Ω 5% 0.062W
3755 4822 051 30683 68k 5% 0.062W
3756 4822 051 30471 470Ω 5% 0.062W
3757 4822 051 30101 100Ω 5% 0.062W
3758 4822 051 30221 220Ω 5% 0.062W
3759 4822 051 30689 68Ω 5% 0.063W 0603 RC21

3760 5322 117 13059 560Ω 1% 0.063W 0603

3761 5322 117 13059 560Ω 1% 0.063W 0603

3762 4822 117 12925 47k 1% 0.063W 0603
3763 4822 051 30221 220Ω 5% 0.062W
3765 4822 051 30683 68k 5% 0.062W
3766 4822 051 30471 470Ω 5% 0.062W
3768 4822 051 30101 100Ω 5% 0.062W
3770 4822 051 30221 220Ω 5% 0.062W
3771 4822 051 30689 68Ω 5% 0.063W 0603 RC21

3772 5322 117 13059 560Ω 1% 0.063W 0603

3773 5322 117 13059 560Ω 1% 0.063W 0603

3774 4822 117 12925 47k 1% 0.063W 0603
3775 4822 051 30221 220Ω 5% 0.062W
3776 4822 117 12139 22Ω 5% 0.062W
3781 4822 051 30008 0Ω jumper
3782 4822 051 30101 100Ω 5% 0.062W
3783 4822 051 30101 100Ω 5% 0.062W

RST SM

RC22H

RC22H

RST SM

RC22H

RC22H

RST SM

RC22H

RC22H

RST SM

RC22H

RC22H

RST SM

RC22H

RC22H



5100 2422 549 45153 IND FXD SM EMI 100mH z

5101 2422 549 45153 IND FXD SM EMI 100mH z

5102 2422 549 45153 IND FXD SM EMI 100mH z

5200 2422 549 45153 IND FXD SM EMI 100mH z

5201 2422 549 45153 IND FXD SM EMI 100mH z

5202 2422 549 45153 IND FXD SM EMI 100mH z

5203 2422 549 45153 IND FXD SM EMI 100mH z

5401 2422 549 45153 IND FXD SM EMI 100mH z

5500 2422 549 45153 IND FXD SM EMI 100mH z

5501 2422 549 45153 IND FXD SM EMI 100mH z

5601 2422 549 45153 IND FXD SM EMI 100mH z

5602 2422 549 45153 IND FXD SM EMI 100mH z

5603 2422 549 45153 IND FXD SM EMI 100mH z

5604 2422 549 45153 IND FXD SM EMI 100mH z

5605 2422 549 45153 IND FXD SM EMI 100mH z

60R R

60R R

60R R

60R R

60R R

60R R

60R R

60R R

60R R

60R R

60R R

60R R

60R R

60R R

60R R

5606 2422 549 45153 IND FXD SM EMI 100mH z

5700 4822 157 70651 12µH (NL322522T-120J)
5701 4822 157 70651 12µH (NL322522T-120J)
5702 4822 157 70651 12µH (NL322522T-120J)
5703 2422 549 45153 IND FXD SM EMI 100mH z

5704 4822 157 11717 BLM31P500SPT
5705 2422 549 45153 IND FXD SM EMI 100mH z

5706 2422 549 45153 IND FXD SM EMI 100mH z

5707 2422 549 45153 IND FXD SM EMI 100mH z

5708 2422 549 45153 IND FXD SM EMI 100mH z

5709 2422 549 45153 IND FXD SM EMI 100mH z

5710 4822 157 70651 12µH (NL322522T-120J)
5711 2422 549 45153 IND FXD SM EMI 100mH z

5713 2422 549 45153 IND FXD SM EMI 100mH z

5715 2422 549 45153 IND FXD SM EMI 100mH z

5716 2422 549 45153 IND FXD SM EMI 100mH z

5717 4822 157 70651 12µH (NL322522T-120J)
5718 4822 157 11717 BLM31P500SPT
5719 2422 549 45153 IND FXD SM EMI 100mH z

5722 4822 157 70651 12µH (NL322522T-120J)

60R R

60R R

60R R

60R R

60R R

60R R

60R R

60R R

60R R

60R R

60R R

60R R



6303 9322 128 69685 S1D
6304 9322 128 69685 S1D
6305 9322 128 69685 S1D



7100 9352 637 37518 TZA1033HL
7109 4822 130 60511 BC847B
7111 9337 331 10215 FET SIG SM BST82 (PHSE)

7112 9337 331 10215 FET SIG SM BST82 (PHSE)

7113 4822 130 60511 BC847B
7200 9352 681 05557 IC SM SAA7812HL/M3B

7201 4822 130 60373 BC856B
7202 9340 425 30115 TRA SIG SM BC847BPN

7206 9322 163 27685 IC SM NCP301LSN45

7300 4822 209 30095 LM833D
7301 9322 139 85668 BA6665FM
7302 4822 209 17229 BA5938FM
7405 9322 156 81668 M24C32-WMN6TNKSA
7500 9322 166 67668 IC SM MT48LC4M16A2TG-

7502 9340 425 20115 TRA SIG SM BC847BS

7600 9322 170 24671 IC SM STI5580EVA (ST00) Y
7603 2722 171 08763 OSC XTL SM 27MHZ

7605 9340 425 20115 TRA SIG SM BC847BS

7701 9340 425 30115 TRA SIG SM BC847BPN

7705 9340 425 30115 TRA SIG SM BC847BPN

7707 9340 425 30115 TRA SIG SM BC847BPN

7710 9340 425 30115 TRA SIG SM BC847BPN

7711 9322 142 88668 IC SM LF25CDT (ST00) R
7713 9340 425 30115 TRA SIG SM BC847BPN

7714 9322 142 88668 IC SM LF25CDT (ST00) R
7716 9352 456 80115 74HCT1G125GW
7718 9340 425 30115 TRA SIG SM BC847BPN

7719 9965 000 04199 BSN20
7720 9965 000 04199 BSN20

R

R

(PHSE) Y

(PHSE) R

(ONSE) R

7E(MRN0)R

(PHSE) R

2560TK-27M R

(PHSE) R

(PHSE) R

(PHSE) R

(PHSE) R

(PHSE) R

(PHSE) R

(PHSE) R