Philips SAA8122 Datasheet

INTEGRATED CIRCUITS

DATA SH EET

SAA8122

Digital Still Camera

Preliminary specification
Supersedes data of
File under Integrated Circuits, ICXX

1999 sep 01

Philips Semiconductors Preliminary specification

Digital Still Camera SAA8122

FEATURES

• Support a wide range of CCD (VGA,SVGA,QGA,XGA,EQGA)

• Perform an advanced RGB to YUV conversion

• Support smart measurement unit to speed up the control loop (Focus, auto white balance,...)

• Support a wide range of LCD and TV format (NTSC and PAL) with text re-insertion features

• Support an embedded JPEG encoder/decoder unit.

• MIPS PR3001 CPU, running in a frequency range from 12 to 28 MHz.

• PRISC compatible PI-bus architecture, interrupt, power management, clock and reset architectures.

• Support a dedicated video bus and SDRAM memory for picture storage

• Support for ROM, DRAM,SRAM, flash and PC Card (Compact Flash and SSFDC).

• Integrated general purpose peripherals like a USB,FIR,UART, timers, an I2C transceiver, ADC converters, RTC and

IO ports.

EXTERNAL UNTERFACES

• a dedicated interface to IEEE 1394 devices (such as Philips’ PDI 1394 chip-set)

• two UART (RS-232) data ports withDMA capabilities (≤ 187.5kbit/s) including hardware flow control RxD, TxD, RTS,

CTS for modem support

• 32 general purpose, bidirectional I/O interface pins, the first 8 bits may also be used as interrupt inputs

• two PWM output (8 bit resolution)

CPU relqted features

• a 32-bit PR3001 core

• 1 KB (kilo byte) data cache and 4 KB instruction cache

• a programmable low-power mode, including wake-up on interrupt

• a memory management unit (TLB: translation lookaside buffer)

• two built in 24-bit general purpose timers and one 24-bit watchdog timer in coprocessor zero two built in 24-bit general

purpose timers

• a real-time clock unit (active in sleep mode)

• an on-chip 8 KBytes SRAM for storing code which needs fast execution

GENERAL DESCRIPTION

The DSC SAA8122E/C1 is a high performance, low power, single-chip MIPS based microprocessor which is dedicated
to image processing and compression.

The DSC SAA8122E/C1 is a highly complex integrated microprocessor system, consisting of one 32-bits RISC CPU
(PR3001), a BCU, an interrupt controller and a power management controller, a ROM/DRAM/SRAM/FLASH/PC-card
memory controller, a JPEG encoder/decoder, a Progammable Pulse Generator, a specific DSP for image processing,
an SDRAM memory controller, a number of standard peripheral modules (like IO ports, timers, a real-time clock, UART,
USB, FIR, and an I2C transceiver) and a Test Control Block module. The DSC is based on the PRISC (Philips RISC)
architecture framework.

The objective of the DSC SAA8122E/C1 is twofold. In the first place, the SAA8122E/C1 is design to propose to the
customer a one chip able to perform all treatments and connections required for a wide range of Digital Still Camera. In
the second place, the SAA8122E/C1 is design around a RISC CPU for which the development environment is already
available and validate to speed up the software development time.

1999 sep 01 2

Philips Semiconductors Preliminary specification

Digital Still Camera SAA8122

SinceoneofthemainobjectivesoftheSAA8122E/C1isaddressingawiderangeofCCDsensors,aDSP(withadvanced
embedded algorithm) for camera signal processing is integrated with an high level of programmability for pulses
generation.
Another objective of the SAA8122E/C1 is to reach an high rate of picture compressed according to the JPEG standard.
So a JPEG codec block is also integrated in the chip

ORDERING INFORMATION

TYPE NUMBER

NAME DESCRIPTION VERSION

SAA8122E/C1 BGA316 316 pin plastic BGA package SOT531AA1

PACKAGE

1999 sep 01 3