Philips SA2411 User Manual

INTEGRATED CIRCUITS

SA2411

+20 dBm single chip linear amplifier for WLAN

Product data 2003 Feb 07 Supersedes data of 2002 Jul 31

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Philips Semiconductors Product data

TYPE NUMBER

SA241 1+20 dBm single chip linear amplifier for WLAN

1. DESCRIPTION

The SA2411 is a linear power amplifier designed for WLAN application in the 2.4 GHz band. Together with the SA2400A the chips form a complete 802.1 1b transceiver. The SA2411 is a Si power amplifier with integrated matching and power level detector .

2. FEATURES

•75 Ω + 25j Ω differential inputs, internally matched

•50 Ω single-ended output, internally matched

•15 dB gain block

•Power detector

•Bias adjust pin

•18% efficiency at 3 V

•RF matching for SA2400A

3. APPLICATIONS

•IEEE 802.11 and 802.11b radios

•Supports DSSS and CCK modulation

•Supports data rates: 1, 2, 5.5, and 11 Mbps

•2.45 GHz ISM band wireless communication devices

Table 1. Ordering information

PACKAGE NAME DESCRIPTION VERSION

SA2411DH TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1

4. BLOCK DIAGRAM

VDD_DRIVER VDD_BIAS VDD_MAIN

IN+

IN–

Power-up power mode

INPUT

MATCH

SA2411

Figure 1. Block diagram

OUTPUT

MATCH

ANT

DETECTOR

SR02383

2003 Feb 07

Philips Semiconductors Product data

SA2411+20 dBm single chip linear amplifier for WLAN

5. PINNING INFORMATION

16VDD_MAIN 15 14 13 12 11 10

_BIAS

PWRUP GND RF_GND ANT GND MODE GND

_DRIVER

DETECTOR

1 2

GND

IN+

IN–

GND

6 7

GND

SA2411DH

SR02384

Figure 2. Pin configuration

Table 2. Pin description

PIN type is designated by A = Analog, D = Digital, I = Input, O = Output

SYMBOL

VDD_MAIN 1 Analog supply, VDD for power amplifier, 150 mA A VDD_DRIVER 2 Analog supply, VDD for biasing driver, 35 mA A GND 3 Grounding A IN+ 4 Input pin, positive part of balanced signal AI IN– 5 Input pin, negative part of balanced signal AI GND 6 Grounding A DETECTOR 7 Power detector output AO GND 8 Grounding A GND 9 Grounding A MODE 10 Mode switch; floating = high gain, grounded = low gain AI GND 11 Grounding A ANT 12 Output pin, RF, to antenna AO RF_GND 13 RF ground must be connected A GND 14 Grounding A PWRUP 15 Power up pin. HIGH = amplifier is on. LOW = amplifier is off. DI VDD_BIAS 16 Analog supply, VDD for biasing the amplifier, 5 mA A

All GND pins should be connected to ground to guarantee the best performance.

PIN DESCRIPTION TYPE

2003 Feb 07

Philips Semiconductors Product data

SA2411+20 dBm single chip linear amplifier for WLAN

6. FUNCTIONAL DESCRIPTION

The main building-blocks are:

•Fixed gain amplifier (PA)

•Output matching

•Input matching

•Power Detector

•Power Mode

Input

The device has differential inputs so a balun is needed in the case of single ended operation, input impedance is approximately 75 Ω + 25j Ω, balanced. The inputs can be DC biased with the pin V transceiver chip.

Amplifier

The amplifier is a fixed gain, class AB amplifier. There is an additional pin, VDD_BIAS, to adjust the class A bias current. Reducing the class A currents reduces the gain. This allows trade-offs to be made among gain, linearity and current.

Output matching

The output of the amplifier is matched, on chip, for a 50 Ω load. The matching includes the supply feed for the power amplifier. The pin V

_MAIN is the main supply for the amplifier. No additional filtering is needed to meet the 802.11b spec.

Power detector

The power detector detects the power level and transforms it into a low frequency current. The detector output must be loaded with a resistor to ground for the highest accuracy. This resistor has an optimal value of 5.6 kΩ. Lower values can be used to comply with maximum input sensitivity of ADCs, at the cost of dynamic range. The maximum voltage detected is 2.3 V .

_DRIVER. The input matching is optimized to interface with the SA2400A WLAN

Power mode

This pin selects the desired gain and linearity level (13 dB or 14.5 dB gain). The low gain is more applicable to high voltage applications from

3.3 V to 3.6 V . The high gain is more applicable to low voltage applications lower than 3.3 V.

NOTE:

In order to assure optimal thermal performance, it is recommended that all ground pins be connected, and that the number of vias to ground under the chip be maximized. In addition, the use of solder mask under the chip (for scratch protection) is not recommended.

2003 Feb 07

Philips Semiconductors Product data

SA2411+20 dBm single chip linear amplifier for WLAN

7. CONNECTIVITY DIAGRAM

PWRUP

GND

PwrUp

VDD

SA2411

C4 C3

VDD

GND

RFin

IN+

C1, C2, C3 = 5.6 pF C4 = 10 nF R1 = optional connect to ground via 0 W resistor. R2 = optional resistor to ground to convert current into voltage L1, L2, L3 = Optional inductors

1 nH … 10 nH, or microstrip lines with length 1 … 10 mm. No inductors and directly connecting all supplies to V

might cause problems. The optimal values of the inductors

depends on the application board.

ANT

IN–

RFin

GND

MODE

DET

GND

Idet.

det

SR02385

2003 Feb 07

Philips Semiconductors Product data

SA2411+20 dBm single chip linear amplifier for WLAN

8. OPERATION

The SA2411 linear amplifier is intended for operation in the 2.4 GHz band, specifically for IEEE 802.11 1 and 2 Mbits/s DSSS, and 5.5 and 11 Msymbols/s CCK standards. Throughout this document, the operating RF frequency refers to the ISM band between 2.4 and 2.5 GHz.

Amplifier Output Power

The SA2411 linear amplifier is designed to give at least 19 dBm output power for an 11 Msymbols/s CCK modulated input carrier. At 19 dBm output power the ACPR specs are met. The fixed gain amplifier amplifies the input signal by 14.5 dB typically.

Power Mode

The biasing can be adjusted to change the gain and therefore the maximum linear output power. For high supply voltages (>3.2 V) the low-gain mode is advised. For low supply voltages (<3.3 V) the high-gain mode is advised.

Power Mode Pin 9 = Typical output power Typical small

signal Gain

High Floating 20.0 dBm 14.5 dB 35 mA 185 mA @ 20 dBm Low Grounded 20.0 dBm 13 dB 28 mA 185 mA @ 20 dBm

Typical DC current (no RF signal)

Typical Current consumption

Power detector

The power detector current output is linear proportional with the RF output voltage. The RF output power is quadratic proportional to the RF output voltage. Therefore, the detector is quadratic proportional to the output power. The following relation can be expressed:

out

is output power in mWatt, V

out

The quadratic factor is 1.5. The sensitivity is then 49 mWatt/V2.

out

20 dBm = 100 mW 1.7 V 300 uA 19 dBm = 79 mW 1.4 V 250 uA 17 dBm = 50 mW 1.0 V 175 uA 15 dBm = 32 mW 0.7 V 125 uA 9 dBm = 8 mW 0.3 V 50 uA

The loading of the detector can be different in the application. The highest accuracy is achieved with 5.6 kΩ. But other values can be used to adapt to the maximum input sensitivity of other circuits. Other detector loading values result in other k-factors. The maximum detector voltage is limited to about 2.4 V .

Vndetector

is detector voltage in Volt, k = sensitivity in mWatt/V2, n = quadratic factor.

detector

(5.6 kΩ load) I

detector

(5.6 kΩ in series)

DC feed at input

There is a possibility to add a DC voltage at the input pins (pin 4 and pin 5) by feeding pin 2. This option should be used in case the SA2411 is lined up with the SA2400A.

2003 Feb 07

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