Copyright 2007 Philips Consumer Electronics B.V. Eindhoven, The Netherlands.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic,
mechanical, photocopying, or otherwise without the prior permission of Philips.
Published by MW 0770 BU CD Customer ServicePrinted in the NetherlandsSubject to modificationEN 3122 785 16872
Page 2
EN 2SDI PDP 2K71.
s
7
Technical Specifications, Connections, and Chassis Overview
1.Technical Specifications, Connections, and Chassis Overview
Index of this chapter:
1.1 PDP Overview
1.2 Serial Numbers
1.3 Chassis Overview
Notes:
•Figures can deviate due to the different model executions.
•Specifications are indicative (subject to change).
1.1PDP Overview
Table 1-1 PDP overview
PDP Type / VersionModel NameH x V Pixel
1 42” HD W2S42AX-YD041024 x 768
2 42” HD W2 PlusS42AX-YD081024 x 768
3 50” HD W2S50HW-YD051366 x 768
4 50” HD W2 PlusS50HW-YD071365 x 768
1.1.142" HD W2
Figure 1-1 Rear view of plasma panel (42” HD W2)
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Figure 1-2 Location of mounting screws (42” HD W2)
Technical Specifications, Connections, and Chassis Overview
Figure 1-14 PWB location (50” HD W2 Plus)
Table 1-5 PWB overview (50” HD W2 Plus)
No. LocationName
1SMPSSMPS
2LOGIC-MAIN BoardAssy PWB LOGIC Main
3X-MAIN Driving BoardAssy PWB X Main
4Y-MAIN Driving BoardAssy PWB Y Main
5LOGIC E BUFFER BoardAssy PWB Buffer
6LOGIC F BUFFER BoardAssy PWB Buffer
7Y-BUFFER UP BoardAssy PWB Buffer
8LOGIC + Y-MAINFFC Cable-flat
9LOGIC + X-MAINFFC Cable-flat
10 LOGIC + LOGIC BUF(E)FFC Cable-flat
11 LOGIC + LOGIC BUF(F)FFC Cable-flat
12 LOGIC BUF(E) + LOG. BUF(F) Lead connector
13 SMPS + LOGIC BUF(F)Lead connector
14 SMPS + LOGIC MAINLead connector
15 SMPS + Y-MAINLead connector
16 SMPS + X-MAINLead connector
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Safety Instructions, Warnings, and Notes
2.Safety Instructions, Warnings, and Notes
EN 9SDI PDP 2K72.
Index of this chapter:
2.1 Handling Precautions
2.2 Safety Precautions
2.3 Notes
Notes:
•Only authorised persons should perform servicing of this
module.
•When using/handling this unit, pay special attention to the
PDP Module: it should not be enforced into any other way
then next rules, warnings, and/or cautions.
•"Warning" indicates a hazard that may lead to death or
injury if the warning is ignored and the product is handled
incorrectly.
•"Caution" indicates a hazard that can lead to injury or
damage to property if the caution is ignored and the
product is handled incorrectly.
2.1Handling Precautions
•The PDP module use high voltage that is dangerous to
humans. Before operating the PDP, always check for dust
to prevent short circuits. Be careful touching the circuit
device when power is “on”.
•The PDP module is sensitive to dust and humidity.
Therefore, assembling and disassembling must be done in
no dust place.
•The PDP module has a lot of electric devices. The service
engineer must wear equipment (for example, earth ring) to
prevent electric shock and working clothes to prevent
electrostatic.
•The PDP module use a fine pitch connector which is only
working by exactly connecting with flat cable. The operator
must pay attention to a complete connection when
connector is reconnected after repairing.
•The capacitor’s remaining voltage in the PDP module’s
circuit board temporarily remains after power is “off”.
Operator must wait for discharging of remaining voltage
during at least 1 minute.
2.2Safety Precautions
2.2.1Safety Precautions
parts and circuit board. Check the cord of AC power
preparing damage.
•Product Safety Mark: Some of electric or implement
material have special characteristics invisible that was
related on safety. In case of the parts are changed with new
one, even though the Voltage and Watt is higher than
before, the Safety and Protection function will be lost.
•The AC power always should be turned “off”, before next
repair.
•Check assembly condition of screw, parts and wire
arrangement after repairing. Check whether the material
around the parts get damaged.
2.2.2ESD Precautions
There are parts, which are easily damaged by electrostatics
(for example Integrated Circuits, FETs, etc.) Electrostatic
damage rate of product will be reduced by the following
technics:
•Before handling semiconductor parts/assembly, must
remove positive electric by ground connection, or must
wear the antistatic wrist-belt and ring (it must be operated
after removing dust on it. It comes under precaution of
electric shock).
•After removing the assembly, lay it with the tracks on a
conductive surface to prevent charging.
•Do not use chemical stuff containing Freon. It generates
positive electric that can damage ESD sensitive devices.
•You must use a soldering device for ground-tip when
soldering or de-soldering these devices.
•You must use anti-static solder removal device. Most
removal devices do not have antistatic which can charge a
enough positive electric enough for damaging these
devices.
•Before removing the protective material from the lead of a
new device, bring the protective material into contact with
the chassis or assembly.
•When handing an unpacked device for replacement, do not
move around too much. Moving (legs on the carpet, for
example) generates enough electrostatic to damage the
device.
•Do not take a new device from the protective case until the
it is ready to be installed. Most devices have a lead, which
is easily short-circuited by conductive materials (such as
conductive foam and aluminium)
•Before replacing a board, discharge forcibly the remaining
electricity from the board.
•When connecting FFC and TCPs to the module, recheck
that they are perfectly connected.
•To prevent electrical shock, be careful not to touch leads
during circuit operations.
•To prevent the Logic circuit from being damaged due to
wrong working, do not connect/disconnect signal cables
during circuit operations.
•Do thoroughly adjustment of a voltage label and voltageinsulation.
•Before reinstalling the chassis and the chassis assembly,
be sure to use all protective stuff including a nonmetal
controlling handle and the covering of partitioning type.
•Caution for design change: Do not install any additional
devices to the module, and do not change the electrical
circuit design.
•For example: Do not insert a subsidiary audio or video
connector. If you insert It, it cause danger on safety. And, if
you change the design or insert, manufacturer guarantee
will be not effect.
•If any parts of wire is overheats of damaged, replace it with
a new specified one immediately, and identify the cause of
the problem and remove the possible dangerous factors.
•Examine carefully the cable status if it is twisted or
damaged or displaced. Do not change the space between
2.3Notes
A glass plate is positioned before the plasma display. This
glass plate can be cleaned with a slightly humid cloth. If due to
circumstances there is some dirt between the glass plate and
the plasma display panel, it is recommended to do some
maintenance by a qualified service employee only.
2.3.1Safe PDP Handling
•The work procedures shown with the “Note” indication are
important for ensuring the safety of the product and the
servicing work. Be sure to follow these instructions.
•Before starting the work, secure a sufficient working space.
•At all times, other than when adjusting and checking the
product, be sure to turn “off” the main POWER switch and
disconnect the power cable from the power source of the
display (jig or the display itself) during servicing.
•To prevent electric shock and breakage of PWBs, start the
servicing work at least 30 seconds after the main power
has been turned “off”. Especially when installing and
removing the Power Supply PWB and the SUS PWB in
which high voltages are applied, start servicing at least 2
minutes after the main power has been turned “off”.
Page 10
EN 10SDI PDP 2K73.
Directions For Use
•While the main power is “on”, do not touch any parts or
circuits other than the ones specified. The high voltage
Power Supply block within the PDP module has a floating
ground. If any connection other than the one specified is
made between the measuring equipment and the high
voltage power supply block, it can result in electric shock or
activation of the leakage-detection circuit breaker.
•When installing the PDP module in, and removing it from
the packing carton, be sure to have at least two persons
perform the work while being careful to ensure that the
flexible printed-circuit cable of the PDP module does not
get caught by the packing carton.
•When the surface of the panel comes into contact with the
cushioning materials, be sure to confirm that there is no
foreign matter on top of the cushioning materials before the
surface of the panel comes into contact with the cushioning
materials. Failure to observe this precaution may result in,
the surface of the panel being scratched by foreign matter.
•When handling the circuit PWB, be sure to remove static
electricity from your body before handling the circuit PWB.
•Be sure to handle the circuit PWB by holding the large parts
as the heat sink or transformer. Failure to observe this
3.Directions For Use
Not applicable.
precaution may result in the occurrence of an abnormality
in the soldered areas.
•Do not stack the circuit PWB. Failure to observe this
precaution may result in problems resulting from scratches
on the parts, the deformation of parts, and short-circuits
due to residual electric charge.
•Routing of the wires and fixing them in position must be
done in accordance with the original routing and fixing
configuration when servicing is completed. All the wires are
routed far away from the areas that become hot (such as
the heat sink). These wires are fixed in position with the
wire clamps so that the wires do not move, thereby
ensuring that they are not damaged and their materials do
not deteriorate over long periods of time. Therefore, route
the cables and fix the cables to the original position and
states using the wire clamps.
•Perform a safety check when servicing is completed. Verify
that the peripherals of the serviced points have not
undergone any deterioration during servicing. Also verify
that the screws, parts and cables removed for servicing
purposes have all been returned to their proper locations in
accordance with the original
Page 11
4.Mechanical Instructions
Mechanical Instructions
EN 11SDI PDP 2K74.
Index of this chapter:
4.1 Dis-assembling / Re-assembling
4.1.1 Flexible Printed Circuit of Y-Buffer (Upper and Lower)
4.1.2 Flat Cable Connector of X-main Board
4.1.3 Assembling & Disassembling FFC and TCP Cables from
their Connectors
4.1.4 Exchange of LBE and LBF board - 42” HD W2
4.1.6 Exchange of LBE and LBF board - 50” HD W2
4.1.8 Exchange YB and YM board - 42” HD W2 & 42” HD W2
Plus
4.1.9 Exchange YB and YM board - 50” HD W2 & 50” HD W2
Plus
4.1Dis-assembling / Re-assembling
4.1.1Flexible Printed Circuit of Y-Buffer (Upper and Lower)
•Dis-assembly: Pull out the FPC from the connector by
holding the lead of the FPC with both hands.
•Re-assembly: Push the lead of the FPC with equal force on
both sides into the connector.
Note: Be careful not to damage the connector pins during
connecting.
Figure 4-1 Dis-assembly FPC of Y-buffer
Figure 4-2 Re-assembly FPC of Y-buffer
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EN 12SDI PDP 2K74.
4.1.2Flat Cable Connector of X-main Board
•Dis-assembly:
1. Pull out the clamp of the connector.
2. Pull the Flat cable out, while pressing it down lightly.
•Re-assembly: Insert the Flat Cable into the connector,
while pressing it down lightly until you hear a “Click“.
Mechanical Instructions
Figure 4-3 Dis-assembly FCC of X-main board
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Figure 4-4 Re-assembly FCC of X-main board
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Mechanical Instructions
EN 13SDI PDP 2K74.
4.1.3Assembling & Disassembling FFC and TCP Cables from
their Connectors
•Dis-assembling of TCP:
1. Open the clamp carefully.
2. Pull the TCP out from its connector.
•Re-assembling of TCP:
1. Put the TCP into the connector carefully
Figure 4-5 Dis-assembly of TCP
2. Close the clamp completely, until you hear a “Click”.
Notes:
•Carefully check if there is no foreign material on the inside
of the connector before inserting the TCP.
•Be careful, do not damage the board by ESD during
handling of the TCP.
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Figure 4-6 Re-assembly of TCP
Figure 4-7 Mis-assembly of TCP
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Figure 4-8 Dis- and re-assembly of FFC
Page 14
EN 14SDI PDP 2K74.
Mechanical Instructions
4.1.4Exchange of LBE and LBF board - 42” HD W2
1. Remove the screws in order of 2-3-1-4 from the heatsink
and remove the heatsink (“Photos 1 & 3”).
2. Remove the TPC, FFC, and power cable from the
connectors.
3. Remove all the screws from the defective board.
4. Remove the defective board.
5. Place the new board and then screw tightly.
Figure 4-9 Photo 1 - Heatsink 42” HD W2
6. Clean the connectors.
7. Re-connect the TCP, FFC, and power cable to the
connectors.
8. Re-assemble the TCP heat sink. Use the screw mounting
order 2-3-1-4.
Caution: If you screw too tight, it is possible to damage the
Driver IC of the TCP.
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Figure 4-10 Photo 2 - Exchange of LBE, LBF board 42” HD W2
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Figure 4-11 Photo 3 - Heat sink removal
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Mechanical Instructions
EN 15SDI PDP 2K74.
4.1.5Exchange of LBE and LBF board - 42” HD W2 Plus
1. Remove the screws in order of 2-3-1-4 from the heatsink
and remove the heatsink (“Photos 1 & 3”).
2. Remove the TPC, FFC, and power cable from the
connectors.
3. Remove all the screws from the defective board.
4. Remove the defective board.
5. Place the new board and then screw tightly.
Figure 4-12 Photo 1 - Heatsink 42” HD W2 Plus
6. Clean the connectors.
7. Re-connect the TCP, FFC, and power cable to the
connectors.
8. Re-assemble the TCP heat sink. Use the screw mounting
order 2-3-1-4.
Caution: If you screw too tight, it is possible to damage the
Driver IC of the TCP.
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Figure 4-13 Photo 2 - Exchange of LBE, LBF board 42” HD W2 Plus
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Figure 4-14 Photo 3 - Heat sink removal
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EN 16SDI PDP 2K74.
Mechanical Instructions
4.1.6Exchange of LBE and LBF board - 50” HD W2
1. Remove the screws in order of 2-3-1-4 from the heatsink
and remove the heatsink (“Photo 1” and “Photo 3”).
2. Remove the TPC, FFC, and power cable from the
connectors.
3. Remove all the screws from the defective board.
4. Remove the defective board.
5. Replace the new board and then screw tightly.
1
Figure 4-15 Photo 1 - Heatsink 50” HD W2
6. Clean the connectors.
7. Re-connect the TCP, FFC, and power cable to the
connectors.
8. Re-assemble the TCP heat sink. Use the same screw
mounting order as described above.
Caution: If you screw too tight, it is possible to damage the
Driver IC of the TCP.
2
3
4
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Figure 4-16 Photo 2 - Exchange of LBE and LBF board 50” HD W2
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Figure 4-17 Photo 3 - Heat sink removal
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Page 17
Mechanical Instructions
EN 17SDI PDP 2K74.
4.1.7Exchange of LBE and LBF board - 50” HD W2 Plus
1. Remove the screws in order of 2-3-1-4 from the heatsink
and remove the heatsink (“Photos 1 & 3”).
2. Remove the TPC, FFC, and power cable from the
connectors.
3. Remove all the screws from the defective board.
4. Remove the defective board.
5. Place the new board and then screw tightly.
Figure 4-18 Photo 1 - Heatsink 50” HD W2 Plus
6. Clean the connectors.
7. Re-connect the TCP, FFC, and power cable to the
connectors.
8. Re-assemble the TCP heat sink. Use the screw mounting
order 2-3-1-4.
Caution: If you screw too tight, it is possible to damage the
Driver IC of the TCP.
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Figure 4-19 Photo 2 - Exchange of LBE, LBF board 50” HD W2 Plus
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Figure 4-20 Photo 3 - Heat sink removal
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EN 18SDI PDP 2K74.
Mechanical Instructions
4.1.8Exchange YB and YM board - 42” HD W2 & 42” HD W2 Plus
1. Unplug all of the FPC connectors of Y-B. See “Photo 1”.
2. Loosen all the screws of Y-Buffer and Y-Main.
3. Remove the board from the chassis.
4. Unplug connectors CN5001, CN5002, CN5006 and
CN5003 between Y-Buffer and Y-Main. See “Photo 2”.
5. Remove Y-Buffer from the Y-main.
6. Replace the defective board.
7. Re-assemble Y-Buffer to the Y-Main.
8. Plug in connectors CN5001, CN5002, CN5006 and
CN5003 between Y-Buffer and Y-Main.
9. Arrange the boards on the chassis and tighten them.
10. Connect the FPC connectors.
11. Supply the electric power to the module and then check the
waveform of the board.
12. Turn “off” the power after the waveform is adjusted.
Figure 4-21 Photo 1 and 2: Dis-assembly of YB and YM board - 42” HD W2 & 42” HD W2 Plus
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Page 19
Mechanical Instructions
EN 19SDI PDP 2K74.
4.1.9Exchange YB and YM board - 50” HD W2 & 50” HD W2 Plus
1. Unplug all of the FPC connectors of YB. See “Photo 1”.
2. Unplug connectors CN5600 and CN5601 between YB and
YM (“Photo 2”).
3. Loosen all the screws of YB, and Y-Main.
4. Remove the board from the chassis.
5. Remove the YB from the Y-main.
6. Replace the defective board.
7. Re-assemble the YB to the Y-Main.
8. Plug in connectors CN5600 and CN5601 between YB and
YM.
9. Arrange the board on the chassis and then screw to fix.
10. Connect the FPCs.
11. Supply the electric power to the module and then check the
waveform of the board.
12. Turn “off” the power after the waveform is adjusted.
( Photo 1 ) ( Photo 2 )
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Figure 4-22 Photo 1 and 2: Dis-assembly of YB and YM board - 50” HD W2 & 50” HD W2 Plus
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EN 20SDI PDP 2K75.
Service Modes, Error Codes, and Fault Finding
5.Service Modes, Error Codes, and Fault Finding
Index of this chapter:
5.1 Repair Tools
5.1.1 ComPair
5.1.2 Other Service Tools
5.2 Fault Finding
5.2.1 Fault finding tree
5.2.2 Faulty Power Supply
5.2.3 No Display
5.2.4 Abnormal display
5.2.5 Horizontal line or block open (some horizontal lines do
not exist)
5.2.6 Address open (some vertical lines do not exist)
5.2.7 Address short (some vertical lines appear to be linked on
the screen)
5.2.8 Criteria for Panel Replacement, due to Defective Panel
Cells
5.2.9 Defect Overview
5.3 Defect Description Form
5.1Repair Tools
5.1.1ComPair
For the w2 and w2 Plus models, it will be possible to generate
test patterns with ComPair. The ComPair interface must be
connected to the Logic Board with the special interconnection
cable (see table below for the order code).
Figure 5-3 Fault symptom overview (complete TV set) [2/2]
Operating Voltages exist,
but No Display
Go to
“No Display”
flowchart
Is related to Logic adress Buffer.
Go to
“Address Open / Short”
flowchart
Abnormal Display, not
open or short Lines
Go to the
“Abnormal Display”
flowchart
Vertical
Some horizontal or Vertical
Lines don´t exist on the
Display.
Sustain open
Horizontal or
Vertical Lines?
Is related to X-Main, Y-Main
and Y-buffer.
Go to
“Sustain Open / Short”
flowchart
Horizontal
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EN 22SDI PDP 2K75.
g
5.2.2Faulty Power Supply
Service Modes, Error Codes, and Fault Finding
Check CN8001/2pin
Connect [ 230Vac]
Check
LED 8001 Green
ON/OFF Relay
(RLY 8001, 8002
Acts?
SMPS
YES
NO
AC Input
YES
SMPS
YES
LED (Green)
8001 off
NO
NO
Reconnect it
SMPS Voltage check
D5V; 5V Check
Vs ; 205V Check
Va : 63V Check
Vcc: 15V Check
D3V3; 3.3V Check
5Vstandby; 5.2V Check
Fuse
8001/8002/8003/8005
Replace SMPS
Replace
SMPS
Check Protection,
LED 8001(Green)
is not blinking?
Check output voltage
Vs, Va
SMPS
YES
NO
NO
Replace SMPS
The number
of blinkin
2
Turn off Relay SW
Open these connectors
One by One
- CN8007, X-Main check
- CN8006, Y-Main check
Check output voltage
Vs, Va
Turn off Relay SW
1
Open these connectors
One by One
- CN8005 Buffer check
NO
Replace SMPS
YES
Go to “No Display”
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Figure 5-4 Power Supply Check for 42” HD W2 & 42” HD W2 Plus models
Page 23
Service Modes, Error Codes, and Fault Finding
g
p
EN 23SDI PDP 2K75.
Check CN8001/2pin
Connect [ 230Vac]
Check
LED 8001Green
On/OFF Relay
(RLY 8001, 8002
Acts?
Check Protection,
LED 8001(Green) is
not blinkin
?
SMPS
YES
SMPS
YES
Check output voltage
Vs, Va
NO
NO
AC Input
YES
SMPS
LED (Green)
8001 off
NO
Replace SMPS
NO
NO
Replace
SMPS
The number of
blinking
2
Turn off Relay SW
Open these connectors
One by One
- CN8007, X-Main check
- CN8006, Y-Main check
Reconnect it
SMPS Voltage check
D5V; 5V Check
Vs ; 207V Check
Va : 63V Check
Vcc: 15V Check
D3V3; 3.3V Check
5Vstandby; 5.2V Check
Fuse
8001/8002/8003/8005
Replace SMPS
Turn off Relay SW
Open these connectors
1
One by One
- CN8005 Buffer check
Check output voltage
NO
Vs, Va
Re
lace SMPS
YES
Go to 4-1-2 No Display
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Figure 5-5 Power Supply Check for 50” HD W2 models
Page 24
EN 24SDI PDP 2K75.
Service Modes, Error Codes, and Fault Finding
Figure 5-6 Power Supply Check for 50” HD W2 Plus models
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Service Modes, Error Codes, and Fault Finding
Q
5.2.3No Display
“No Display” is related to Y-Main, X-Main, Logic Main and so
on. This page shows you how to check the boards, and the
following pages show you how to find the defective board.
EN 25SDI PDP 2K75.
No Display
Logic Main
[42”: LED 2000 Blinks]
[50”: LED 2002 Blinks]
Check
LVD S Cable
LED 2000;Green
Fuse F2001
CN2000 Cable
Check
F5004 for Vdd (5V)
F5003 for Vcc (15V)
F5001 for Vs (205V)
F5005 for Vset
F5006 for Vccf
Y – Main
X – Main Y – Buffer
Figure 5-7 Fault symptom: “No Display”, general guide line
Figure 5-20 FET, IGBT check points 50” HD W2 [3/5]
Short
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EN 36SDI PDP 2K75.
Service Modes, Error Codes, and Fault Finding
Vs fuse (F4701) – OK (0.x ~ x.x ohm)Vs fuse (F4701) – OPEN (x.x Mohm)
15V fuse (F4702) – OK (0.x ~ x.x ohm)15V fuse (F4702) – OPEN (x.x Mohm)
5V fuse (F4703) – OK (0.x ~ x.x ohm)5V fuse (F4703) – OPEN (x.x Mohm)
5V fuse (F4800) – OK (0.x ~ x.x ohm)5V fuse (F4800) – OPEN (x.x Mohm)
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Figure 5-21 X-Main check points 50” HD W2 [4/5]
Page 37
Service Modes, Error Codes, and Fault Finding
EN 37SDI PDP 2K75.
OUTL OUTH – OK (x.x Mohm)OUTL OUTH –Short (x.x ohm)
Figure 5-22 Y-Buffer check points 50” HD W2 [5/5]
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EN 38SDI PDP 2K75.
Service Modes, Error Codes, and Fault Finding
Figure 5-23 Fault finding tree: “No Display”, 50” HD W2 Plus [1/5]
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Service Modes, Error Codes, and Fault Finding
EN 39SDI PDP 2K75.
Figure 5-24 Y-Main check points 50” HD W2 Plus [2/5]
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Figure 5-25 FET, IGBT check points 50” HD W2 Plus [3/5]
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EN 40SDI PDP 2K75.
Service Modes, Error Codes, and Fault Finding
Figure 5-26 X-Main check points 50” HD W2 Plus [4/5]
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Figure 5-27 Y-Buffer check points 50” HD W2 Plus [5/5]
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Service Modes, Error Codes, and Fault Finding
play
5.2.4Abnormal display
“Abnormal Display” is related to Y-Main, X-Main, Logic Main
and so on. This page shows you how to check the boards, and
the following pages show you how to find the defective board.
EN 41SDI PDP 2K75.
Abnormal
Dis
Logic Main Y – Main
[42”: LED 2000 Blinks]
[50”: LED 2002 Blinks]
Check necessary points
Figure 5-28 Fault symptom: “Abnormal Display”, general guide line
Y- main
Check
F5004 for Vdd (5V)
F5003 for Vcc (15V)
F5001 for Vs (205V)
F5005 for Vset
F5006 for Vccf
Check
Q5000 ~ Q5010
F4004 for Vdd (5V)
F4001 for Vcc (15V)
F4002 for Vs (205V)
F4005 for Ve (110V)
FET,IGBT
X-main
Fuse
Fuse
SHORT
OPEN
SHORT
OPEN
SHORT
OPEN
X – Main
Check necessary points
Replace Y-B’d
Replace Y-B’d
Replace X-B’d
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Check
Q4001 ~ Q4007
FET,IGBT
OPEN
Y-BUFFER
OPEN
[Logic Main]
LED 2000 blinks
(Motion of Vsync)
Regular
Abnormal
Replace
board
SHORT
SHORT
Logic main
Normal State
Replace X-B’d
Replace Y-BUFFER
Figure 5-29 Fault symptom: “Abnormal Display” 42” HD W2
H_16870_019.eps
030407
Page 42
EN 42SDI PDP 2K75.
(
)
(
)
Service Modes, Error Codes, and Fault Finding
Y-main
Check
ྙ R5003 for Ys(Q5007)
ྚ R5002 for Yset
Q5004
jG
E
99V
R4014 for V
G
R-fusible
SHORT
X-main
R-fusible
SHORT
[Logic Main]
LED 2000 blinks
(Motion of Vsync)
Regular
Abnormal
OPEN
OPEN
Regular
Replace Y-B’d
Replace X-B ’d
Logic main
Normal State
Abnormal
Figure 5-30 Fault symptom: “Abnormal Display” 42” HD W2 Plus
H_16871_009.eps
240807
Page 43
Service Modes, Error Codes, and Fault Finding
Check
F5701 for Vdd (5V)
F5700 for Vcc (15V)
F5703 for Vs(207V)
F5704 for Vddf
F5200 for Vset
Y- main
Fuse
SHORT
EN 43SDI PDP 2K75.
OPEN
Replace Y-B’d
Check
Q5000 ~ Q5800
F4703 for Vdd (5V)
F4702 for Vcc (15V)
F4701 for Vs (207V)
F4800 for Ve (94V)
Check
Q4002,3
Q4011 ~ Q4016
FET,IGBT
OPEN
X-main
Fuse
SHORT
FET,IGBT
OPEN
Y-BUFFER
OPEN
SHORT
OPEN
SHORT
SHORT
Replace Y-B’d
Replace X-B’d
Replace X-B’d
Replace Y-BUFFER
[Logic Main]
LED 2002 Blinks
(Motion of Vsync)
Regular
Abnormal
Replace
board
Figure 5-31 Fault symptom: “Abnormal Display” 50” HD W2
Logic main
Normal State
H_16870_052.eps
050407
Page 44
EN 44SDI PDP 2K75.
Service Modes, Error Codes, and Fault Finding
Figure 5-32 Fault symptom: “Abnormal Display” 50” HD W2 Plus
Page 45
Service Modes, Error Codes, and Fault Finding
P o o o o r r
5.2.5Horizontal line or block open (some horizontal lines do not
exist)
EN 45SDI PDP 2K75.
Y- F P C
Che c k
Con n e c tion Y - buf fer
& Y - FPC
Che c k
Y - buf fer con n e ctor pi n
bro k en o r be nt?
Che c k
Y - FPC pi n
bro k en o r be nt?
Y - buf fer
c o nn ec to r
Y - buf fer
G G o o o o d d
Y - buf fer
c o nn ec to
G G o o o o d d
Y- F P C
P
R e c o nn ec tio n
B B r r o o k k e e n n
o o r r b b e e n n t t
Repl ace Y - b u f f er B’d
r
B B r r o o k k e e n n
o o r r b b e e n n t t
Repl ace PDP
G_16380_153.eps
030407
Figure 5-33 Fault symptom: “Horizontal line or block open”
Page 46
EN 46SDI PDP 2K75.
j
nG
nG
wG
5.2.6Address open (some vertical lines do not exist)
“Address open” is related to Logic Main, Logic Buffer, FFC,
TCP and so on. This page shows you how to check the boards,
and the following pages show you how to find the defective
board.
Service Modes, Error Codes, and Fault Finding
Address Open
Line Open
Data Block Open
TCP Block Open
[ Logic Main/FFC ]
Changing some parts
What is the vertical status of open?
1 Line or
1 Block
Figure 5-34 Fault symptom: “Address open” [1/2]
(The open part is black)
NO
YES
Half Block or
Half of screen
[ Logic Buffer ]
Changing necessary
Parts (E/F)
G_16380_140.eps
YES
030407
Check
TCP Connection &
Foreign Materials
{jwG G
j
Replace
PDP
Figure 5-35 Fault symptom: “Address open” [2/2]
mmjG G
G
Reconnection
NO
NO
YES
Done
Replace
1) FFC
2) Logic Main or Logic Buffer
Check
FFC Connection &
Foreign Materials
YES
Done
H_16871_010.eps
240807
Page 47
Service Modes, Error Codes, and Fault Finding
j
nG
nG
5.2.7Address short (some vertical lines appear to be linked on
the screen)
AddressShort
Line Short
Data Block Short
EN 47SDI PDP 2K75.
[ Logic Main/FFC ]
Changing some parts
What is the vertical status of shorted?
1 Line or
1 Block
Figure 5-36 Fault symptom: “Address short” [1/2]
(The shorted part is colored)
NO
YES
Half Block or
Half of screen
[ Logic Buffer ]
Changing necessary
Parts (E/F)
G_16380_144.eps
030407
YES
Check
TCP Connection &
Foreign Materials
{jwG G
j
Replace
PDP
G
Reconnection
NO
NO
Figure 5-37 Fault symptom: “Address short” [2/2]
YES
Replace
1) FFC
2) Logic Main or Logic Buffer
Done
mmjG G
Check
FFC Connection &
Foreign Materials
YES
Done
H_16871_011.eps
111007
Page 48
EN 48SDI PDP 2K75.
ڵ ۊ ۉ ۀ ڜ
ڵ ۊ ۉ ۀ ڝ
ڲ
ڣ
ڲ ڊڏڲ ڊڍ
ڲ ڊڏ
ڣ ڊڏ
ڣ ڊڍ
ڣ ڊڏ
5.2.8Criteria for Panel Replacement, due to Defective Panel Cells
Service Modes, Error Codes, and Fault Finding
H_16871_012.eps
070907
Figure 5-38 Panel zones
Item
Non-lighting
cell defect
Non-
extinguishing
cell defect
Flickering cell
defect
High Intensity
Cell defect
Adjacent
cell defect
Total
cell defects
Zone A: 4 and less
Zone B: 8 and less
Zone A: 0
Zone B: 1 and less
Zone A: 0
Zone B: 1 and less
Zone A: 0
Zone B: 1 and less
(Only Red & Blue)
Zone A: 0
Zone B: 1 and less
(Only Red & Blue)
12 and less
Number of cell defectsDistance between cell defects
Figure 5-39 Criteria for panel replacement
Specification
Regardless of A and B zone,
1 Cell Defect in an area of 50mm*50mm
G_16380_511.eps
190606
Page 49
Service Modes, Error Codes, and Fault Finding
5.2.9Defect Overview
Table 5-2 Defects, symptoms and defective parts
Condition Name Description Related Board
No output voltageOperating voltages don't exist. SMPS
No display Operating voltages exist, but no image on screen Y-MAIN, X-MAIN, Logic Main, Cables
Abnormal display Abnormal Image (not open or short) is on screen. Y-MAIN, X-MAIN, Logic Main
Sustain open Some horizontal lines are missing on screen Scan Buffer, FPC of X / Y
Sustain short Some horizontal lines appear to be linked on screen Scan Buffer, FPC of X / Y
Address open Some vertical lines are missing on screenLogic Main, Logic Buffer, FFC,TCP
Address short Some vertical lines appear to be linked on screen Logic Main, Logic Buffer, FFC,TCP
Defective panel cellsSome cells seem to be defectiveCheck criteria for replacement of the panel
Defect: Address(vertical stripe) Open Defect: Address(vertical stripe) Short
EN 49SDI PDP 2K75.
Symptom : A line or block does not light up in address
electrode direction.(1 line ,block open)
Cause
manufacturing : Panel electrode single line/
foreign material./electrostatic/
TCP defect
Parts : TCP, Board connection defect
Operation : Assembly error / Film damage
Figure 5-40 Defect overview [1/11]
Defect: Address output error Defect: Sustain(horizontal stripe) Open
Symptom: Another color simultaneously appears because
adjacent data recognizes the single pattern signal
Cause
manufacturing : Panel electrode short / Foreign material
conductive foreign object inside TCP
Part : TCP/buffer defect lighting electrode cutting defect
H_16870_021.eps
020407
Symptom.: A defect other than address open
and short Data printout signal error
occurring at certain Gradation or pattern
Figure 5-41 Defect overview [2/11]
Symptom : One or more line do not light up in Sustain direction
Cause : manufacturing : .Panel bus electrode single line
FPC pressure defect
Parts : FPC/board/connection disconnection
operation : assembly error.
H_16870_022.eps
020407
Page 50
EN 50SDI PDP 2K75.
Service Modes, Error Codes, and Fault Finding
Defect: Sustain(horizontal stripe) Short Defect: Dielectric material layer damage
Symptom : Combined or adjacent lines are short in
sustain direction. The line appear brighter
than other at Ramp gradation pattern or low
gradation patter
Cause
manufacturing : Panel electrode short/Foreign
material.
Parts : Board/ connector/pin error
Operation : connector / assembling error
Symptom: Burn caused by the damage of address bus dielectric
layer appears in the panel discharge/non discharge
area. sustain also open/short occurs by the damage
of address sustain printout
<Add Block and Line Open>
<Add and Sustain Open>
Cause : layer uneven / abnormal voltage / foreign material
•Figures can deviate due to the different model executions.
Important: Remove all non-default jumpers and reset all DIP
switches, after the repair!
X-Main
Vs
PFC
Image B’d
MICOM
Logic main
Figure 8-1 PSU layout 42" HD W2
Va/ 8V6/D5V/V
Address Connector
STBY
AC input
H_16870_034.eps
020407
H_16871_014.eps
070907
Figure 8-2 PSU layout 42" HD W2 Plus
Page 61
Alignments
H_16870_066.eps
020407
EN 61SDI PDP 2K78.
Figure 8-3 PSU layout 50" HD W2
Figure 8-4 PSU layout 50" HD W2 Plus
H_16872_015.eps
191007
Page 62
EN 62SDI PDP 2K78.
Alignments
8.1.2Adjustment Power Supply Voltages 42" HD W2
Table 8-1 Adjustment voltage level overview (also refer to the sticker on the rear side of the panel)
NoOutput voltage (V)Voltage Setting (Normal Load) Output Voltage Range
1VS205 V ± 1.5%200 V ~ 207 V
2VA63 V ± 1.5%60 V ~ 65 V
3VE110 V ± 1.5%100 V ~ 120 V
4VSCAN-190 V ± 1.5%-200 V ~ -185 V
5VG15 V ± 5%Fixed
6D5VL5.2 V ± 5%Fixed
Check voltage label on the PDP for correct values.
Vsch TP
Y-MAI N
VR5003 : Vscan(Vsc)
VR5004 : Vsch
Vscan TP
X-MAIN
VR4001 : Ve
Figure 8-5 Location of voltage check points - 42” HD W2
Ve TP
H_16870_080.eps
120407
Figure 8-6 Location of the supply lines from the PSU to the boards - 42” HD W2
H_16870_031.eps
020407
Page 63
Alignments
8.1.3Adjustment Power Supply Voltages 42" HD W2 Plus
Table 8-2 Adjustment voltage level overview (also refer to the sticker on the rear side of the panel)
NoOutput voltage (V)Voltage Setting (Normal Load) Output Voltage Range
1VS205 V ± 1.5%200 V ~ 215 V
2VA63 V ± 1.5%61 V ~ 65 V
3VE99 V ± 1.5%95 V ~ 105 V
4VSCAN-190 V ± 1.5%-195 V ~ -185 V
5VG15 V ± 5%Fixed
6D5VL5.2 V ± 5%Fixed
Check voltage label on the PDP for correct values.
EN 63SDI PDP 2K78.
Figure 8-7 Location of voltage check points - 42” HD W2 Plus
H_16871_015.eps
070907
G
Page 64
EN 64SDI PDP 2K78.
Alignments
Figure 8-8 Location of the supply lines from the PSU to the boards - 42” HD W2 Plus
H_16871_016.eps
070907
Page 65
Alignments
8.1.4Adjustment Power Supply Voltages 50" HD W2
Table 8-3 Adjustment voltage level overview (also refer to the sticker on the rear side of the panel)
NoOutput voltage (V)Voltage Setting (Normal Load) Output Voltage Range
1VS207 V ± 1.5%198 V ~ 202 V
2VA63 V ± 1.5%63 V ~ 67 V
3VE94 V ± 1.5%105 V ~ 115 V
4VSCAN-190 V ± 1.5%-192 V ~ -188 V
5VG15 V ± 5%Fixed
6D5VL5.2 V ± 5%Fixed
Check voltage label on the PDP for correct values.
Drive board’s voltage check point
Vsch TP
Vccf TP
Y-MAI N
VR5800 : Vscan
EN 65SDI PDP 2K78.
Vscan
Ve TP
Vs TP
Figure 8-9 Location of the voltage check points - 50” HD W2
Vs
Vcc
X-MAIN
VR4801 : Ve
Vs
Vcc
Vscan TP
Ve
H_16870_081.eps
120407
D5VL
Va
D5V
H_16870_063.eps
Figure 8-10 Location of the supply lines from the PSU to the boards - 50” HD W2
020407
Page 66
EN 66SDI PDP 2K78.
Alignments
8.1.5Adjustment Power Supply Voltages 50" HD W2 Plus
Table 8-4 Adjustment voltage level overview (also refer to the sticker on the rear side of the panel)
NoOutput voltage (V)Voltage Setting (Normal Load) Output Voltage Range
1VS207 V ± 1.5%200 V ~ 215 V
2VA63 V ± 1.5%Fixed
3VE94 V ± 1.5%105 V ~ 115 V
4VSCAN-190 V ± 1.5%-192 V ~ -188 V
5VG15 V ± 5%Fixed
6D5VL5.3 V ± 5%Fixed
Check voltage label on the PDP for correct values.
Figure 8-11 Location of the voltage check points - 50” HD W2 Plus
H_16872_016.eps
191007
Page 67
Alignments
H_16872_017.eps
191007
EN 67SDI PDP 2K78.
Figure 8-12 Location of the supply lines from the PSU to the boards - 50” HD W2 Plus
Page 68
EN 68SDI PDP 2K78.
Alignments
8.2Alignments 42” HD W2
8.2.1Quick Check
For a quick check on the correct Y-main waveform alignment,
use the following method: Check the position of the potmeter
VR5003 [1]. If it points in this direction [2], use a trimmer [3] to
return it to the correct position [1].
Figure 8-13 Correct position of VR5003 [1]
H_16870_074.eps
120407
8.2.2For Reference Only
If the quick check does not solve the issue, perform the
following alignments:
1. Set the pattern to “Full White”:
•Place jumper CN2013 (pins 3 and 4) on the Logic
Board
•The display starts showing a cycle of different patterns.
At the moment the “full white” pattern is visible, remove
the jumper. Now the display shows a continuous full
white pattern.
To restart the cycle of different patterns, replace the
jumper.
2. Check the waveform using an oscilloscope (see figures
“Adjusting waveforms - 42” HD W2”).
•Trigger via V_TOGG on the LOGIC Board (see figure
“Logic PWB 42” HD W2”).
•Connect the “CN5411” test point, located at the bottom
of the Y-buffer PWB, to the other channel, and then
check the first SubField (SF) waveform of one TVField.
•Check the waveform by adjusting the “horizontal
division” of the oscilloscope.
•Check the Reset waveform when the V_TOGG level is
changed.
3. Adjust the waveform of the rising ramp with VR5001.
4. Adjust the waveform of the falling ramp with VR5002.
Figure 8-14 Wrong position of VR5003 [2]
H_16870_075.eps
120407
V-TOGG
JUMPER
PIN 3 & 4
Figure 8-16 Logic PWB - 42” HD W2
CN2013
H_16870_072.eps
110407
Figure 8-15 Changing of VR5003 [3]
H_16870_076.eps
120407
Page 69
VR5001 Adjustment : Rising Ramp
Oscilloscope Setting : 20V / 10us
VR5002 Adjustment : Falling Ramp
Oscilloscope Setting : 20V / 10us
Alignments
EN 69SDI PDP 2K78.
Figure 8-17 Adjusting waveforms - 42” HD W2 [1/2]
Adjust VR5002 to set the time of Yfr
(Main Reset Falling Ramp) like the
below picture.
Oscilloscope Setting : 20V / 10us
Adjust VR5001 to set the time of Yrr
(Main Reset Rising Ramp) like the
below picture.
Oscilloscope Setting : 20V / 10us
H_16870_069.eps
060407
< Falling Ramp > <Rising Ramp>
Figure 8-18 Adjusting waveforms - 42” HD W2 [2/2]
H_16870_068.eps
060407
Page 70
EN 70SDI PDP 2K78.
R
T
T
j
w
R
T
T
R
T
T
}G}
OpG}PG
s
7
}GaGYW\G}
OYWW¥YX\P
}GaGX\G}
} aG]Z}
O]X¥]\}P
8.3Alignments 42” HD W2 Plus
8.3.1Quick Check
For a quick check on the correct Y-main waveform alignment,
use the following method: Check the position of the potmeter
VRsc (scan), see Figure “Correct position of VR for Vsc (scan)
on Y-Main”. If necesary, use a trimmer to return it to its correct
position.
Alignments
Check
Point
Ve VRVe : 99 V
42HD W2P
Ve TP
Check
Point
Vsc VRVsc : -190 V
42HD W2P
VR for adjusting Vsc
Vsc TP
Vsch TP
H_16871_017.eps
Figure 8-19 Correct position of VR for Vsc (scan) on Y-Main
8.3.2For Reference Only
If the quick check does not solve the issue, perform the PSU
(SMPS) and other alignments, as indicated in alignment pages
of the W2 models. The W2 Plus PDP alignments are equivalent
to those of the W2 PDP models, but there are some minor
differences in the locations of test points and VRs. The
differences (locations of test points and VRs) are shown in the
photo above and the photos below.
070907
VR for adjusting Ve
Figure 8-21 X-Main: VR for adjusting Ve
Figure 8-22 SMPS: VR for adjusting Vs
H_16871_019.eps
070907
H_16871_020.eps
070907
j
Yfr VRVsc : -190 V
42HD W2P
VR for adjusting Yfr
Figure 8-20 Y-Main: Vr for adjusting Yfr
H_16871_018.eps
070907
H_16871_021.ep
Figure 8-23 SMPS: Voltage measuring points
Protection mode Blink(green LED)
Vs1
Va2
LED
Alarm board
Vg3
12Vssb4
VSND5
D5V6
PFC7
Thermal8
DC_PROT9
H_16871_022.eps
07090
070907
Figure 8-24 SMPS: Protection mode (Display Ramp)
Page 71
Alignments
EN 71SDI PDP 2K78.
8.4Alignments 50” HD W2 & 50” HD W2 Plus
8.4.1Quick Check
For a quick check on the correct Y-main waveform alignment,
use the following method: Check the position of the potmeter
VR5500 [1]. If it points in this direction [2], use a trimmer [3] to
return it to the correct position [1].
H_16870_077.eps
Figure 8-25 Correct position of VR5500 [1]
8.4.2For Reference Only
1. Set the pattern to Full White:
•Place jumper CN2007 (pins 3 and 4) on the Logic
Board
•When the display starts showing a cycle of different
patterns, push button SW2000 for at least one second.
Now the display shows a continuous full white pattern.
To restart the cycle of different patterns, push the
button once more and wait for a few seconds.
2. Check the waveform using an oscilloscope (see figures
“Adjusting waveforms - 50” HD W2”).
•Trigger via V_TOGG on the Logic Board (see figure
“Logic PWB 50” HD W2”).
•Connect the “OUT240” test point, located at the centre
of the Y-buffer PWB, to the other channel, and then
check the first Sub-Field (SF) waveform of one TVField.
•Check the waveform by adjusting the “horizontal
division” of the oscilloscope.
•Check the Reset waveform when the V_TOGG level is
changed.
3. Adjust the waveform of the rising ramp with VR5200.
4. Adjust the waveform of the falling ramp with VR5500.
120407
V-TOGG
Figure 8-26 Wrong position of VR5500 [2]
H_16870_078.eps
120407
SW 2000
JUMPER
CN2007
PIN 3 & 4
Figure 8-28 Logic PWB - 50” HD W2
H_16870_073.eps
110407
Figure 8-27 Changing of VR5500 [3]
H_16870_079.eps
120407
Page 72
EN 72SDI PDP 2K78.
Alignments
VR5200 Adjustment : Rising Ramp
Oscilloscope Setting : 50V / 40us
VR5500 Adjustment : Falling Ramp
Oscilloscope Setting : 50V / 20us
Figure 8-29 Adjusting waveforms - 50” HD W2 & 50 HD W2 Plus [1/2]
W2 Ramp Waveform Inclination Adjustment ( Y-Board ) - 1st Sub Field
Adjust VR5500 to set the time of Yfr
(Main Reset Falling Ramp) like the
below picture.
Oscilloscope Setting : 50V / 20us
Adjust VR5200 to set the time of Yrr
(Main Reset Rising Ramp) like the
below picture.
Oscilloscope Setting : 50V / 40us
Figure 8-30 Adjusting waveforms - 50” HD W2 & 50 HD W2 Plus [2/2]
H_16872_019.eps
191007
Page 73
Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 73SDI PDP 2K79.
Index of this chapter:
9.1 Main Function of Each Assembly
9.2 Abbreviation List
9.3 IC Data Sheets
9.1Main Function of Each Assembly
9.1.1X Main Board
The X Main board generates a drive signal by switching the
FET and IGBT in synchronization with logic main board timing,
and supplies the X electrode of the panel with the drive signal
through the connector.
1. Maintain voltage waveforms (including ERC).
2. Generate X rising ramp signal.
3. Maintain Ve bias between Scan intervals.
9.1.2Y Main Board
The Y Main board generates a drive signal by switching the
FET and IGBT in synchronization with the logic Main Board
timing and sequentially supplies the Y electrode of the panel
with the drive signal through the scan driver IC on the Y-buffer
board. This board connected to the panel’s Y terminal has the
following main functions.
1. Maintain voltage waveforms (including ERC).
2. Generate Y-rising Falling Ramp.
3. Maintain V scan bias.
9.1.3Logic Main Board
The Logic Main board generates and outputs the address drive
output signal and the X,Y drive signal by processing the video
signals. This board buffers the address drive output signal and
feeds it to the address drive IC (TCP module, video signal- X Y
drive signal generation, frame memory circuit / address data rearrangement).
9.2Abbreviation List
ACAlternating Current
COFCircuit On Foil
DCDirect Current
ERCEnergy Recovery Circuit
ESDElectro Static Discharge
FETField Effect Transistor
FFCFlat Foil Cable
FPCFlexible Printed Circuit
FTVFlat TeleVision
HDHigh Definition
I/OInput/Output
ICIntegrated Circuit
IGBTInsulated Gate Bipolar Transistor
LBLogic Buffer
LEDLight Emitting Diode
LVDSLow Voltage Differential Signalling
PCBPrinted Circuit Board (same as PWB)
PDPPlasma Display Panel
PSUPower Supply Unit
PWBPrinted Wiring Board (same as PCB)
RGBRed, Green, Blue colour space
SDStandard Definition
SDISamsung Display Industry (supplier)
SMPSSwitched Mode Power Supply
SSBSmall Signal Board
SFSub Field
TCPTape Carrier Package
VRVariable Resistor
VscScan Voltage
YBLY Buffer Lower board
YBUY Buffer Upper board
YMY Main board
9.3IC Data Sheets
Not applicable.
9.1.4Logic Buffer (E, F)
The Logic Buffer transmits the data and control signals.
9.1.5Y Buffer Board
The Y Buffer board supplies the Y-terminal with scan
waveforms. The board comprises eight scan driver ICs.
9.1.6TCP (Tape Carrier Package)
The TCP applies the Va pulse to the address electrode and
constitutes address discharge by the potential difference
between the Va pulse and the pulse applied to the Y electrode.
The TCP comprise one data driver IC. Twelve (42”) or sixteen
(50”) TCPs are required for signal scan.
Page 74
EN 74SDI PDP 2K710.
10. Spare Parts List
Please refer to the Philips Service website, for an actual
overview (monthly updated).
11. Revision List
Manual xxxx xxx xxxx.0
•First release.
Manual xxxx xxx xxxx.1
•Information on 42 inch HD W2 Plus PDP (S42AX-YD08)
added.
Manual xxxx xxx xxxx.2
•Information on 50 inch HD W2 Plus PDP (S50HW-YD07)
added.
Spare Parts List
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