Philips PHT6NQ10T Datasheet

Philips Semiconductors Product specification

N-channel TrenchMOS transistor PHT6NQ10T

FEATURES SYMBOL QUICK REFERENCE DATA

• ’Trench’ technology

d

• Low on-state resistance V

• Fast switching

• Low thermal resistance I

g

R

DS(ON)

s

GENERAL DESCRIPTION PINNING SOT223

N-channel enhancement mode PIN DESCRIPTION
field-effect transistor in a plastic
envelope using ’trench’ 1 gate
technology.

2 drain

Applications:-

• Motor and relay drivers 3 source

• d.c. to d.c. converters
4 drain (tab)

The PHT6NQ10Tis supplied in the
SOT223 surface mounting
package.

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

= 100 V

DSS

= 6.5 A

D

≤ 90 mΩ

1

4

23

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DSS

V

DGR

V

GS

I

D

I

D

I

DM

P

D

Tj, T

Drain-source voltage Tj = 25 ˚C to 150˚C - 100 V
Drain-gate voltage Tj = 25 ˚C to 150˚C; RGS = 20 kΩ - 100 V
Gate-source voltage - ± 20 V
Continuous drain current (dc) Tsp = 25 ˚C - 6.5 A

T

= 25 ˚C - 3 A

amb

Continuous drain current (dc) Tsp = 100 ˚C - 4.1 A

T

= 100 ˚C - 1.9 A

amb

Pulsed drain current - 26 A
Total power dissipation Tsp = 25 ˚C - 8.3 W

T

= 25 ˚C - 1.8 W

Operating junction and - 65 150 ˚C

stg

amb

storage temperature

THERMAL RESISTANCES

SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT

R
R

th j-sp

th j-amb

Thermal resistance junction to surface mounted, FR4 12 15 K/W
solder point board
Thermal resistance junction to surface mounted, FR4 70 - K/W
ambient board

August 1999 1 Rev 1.000

Philips Semiconductors Product specification

N-channel TrenchMOS transistor PHT6NQ10T

ELECTRICAL CHARACTERISTICS

Tj= 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

(BR)DSS

V

GS(TO)

R

DS(ON)

I

GSS

I

DSS

Q

g(tot)

Q

gs

Q

gd

t

d on

t

r

t

d off

t

f

L

d

L

s

C

iss

C

oss

C

rss

Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 100 - - V
voltage Tj = -55˚C 89 - - V
Gate threshold voltage VDS = VGS; ID = 1 mA 2 3 4 V

Tj = 150˚C 1.2 - - V

Tj = -55˚C - 6 V
Drain-source on-state VGS = 10 V; ID = 3 A - 57 90 mΩ
resistance Tj = 150˚C - - 216 mΩ
Gate source leakage current VGS = ±10 V; VDS = 0 V - 10 100 nA
Zero gate voltage drain VDS = 100 V; VGS = 0 V; - 0.05 10 µA
current Tj = 150˚C - - 500 µA

Total gate charge ID = 6 A; V

= 80 V; VGS = 10 V - 21 - nC

DD

Gate-source charge - 2.5 - nC
Gate-drain (Miller) charge - 8.2 - nC

Turn-on delay time VDD = 50 V; RD = 8.2 Ω;-6-ns
Turn-on rise time VGS = 10 V; RG = 5.6 Ω -15-ns
Turn-off delay time Resistive load - 20 - ns
Turn-off fall time - 10 - ns

Internal drain inductance Measured tab to centre of die - 2.5 - nH
Internal source inductance Measured from source lead to source - 5 - nH

bond pad

Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 633 - pF
Output capacitance - 103 - pF
Feedback capacitance - 61 - pF

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

Tj = 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

I

S

I

SM

V

SD

t

rr

Q

rr

Continuous source current Tsp = 25 ˚C - - 5.5 A
(body diode)
Pulsed source current (body - - 26 A
diode)
Diode forward voltage IF = 6 A; VGS = 0 V - 0.8 1.2 V

Reverse recovery time IF = 6 A; -dIF/dt = 100 A/µs; - 55 - ns
Reverse recovery charge VGS = 0 V; VR = 25 V - 135 - nC

August 1999 2 Rev 1.000

Philips Semiconductors Product specification

N-channel TrenchMOS transistor PHT6NQ10T

Normalised Power Derating, PD (%)

100

90
80
70
60
50
40
30
20
10

0

0 25 50 75 100 125 150

Solder Point temperature, Tsp (C)

Fig.1. Normalised power dissipation.

PD% = 100⋅PD/P

Normalised Current Derating, ID (%)

100

90
80
70
60
50
40
30
20
10

0

0 25 50 75 100 125 150

Solder Point temperature, Tsp (C)

D 25 ˚C

= f(Tsp)

Fig.2. Normalised continuous drain current.

ID% = 100⋅ID/I

= f(Tsp); VGS ≥ 10 V

D 25 ˚C

Transient thermal impedance, Zth j-sp (K/W)

100

D = 0.5

10

0.2

0.1

1

0.05

0.02

0.1
single pulse

0.01
1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01

Pulse width, tp (s)

P

D

tp

D = tp/T

T

Fig.4. Transient thermal impedance.

Z

= f(t); parameter D = tp/T

th j-sp

Drain Current, ID (A)

6

VGS = 10V

8 V

5

6 V

4

3

2

1

0

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

5.4 V

Tj = 25 C

Drain-Source Voltage, VDS (V)

5.2 V

5 V

4.8 V

4.6 V

4.4 V

Fig.5. Typical output characteristics, Tj = 25 ˚C

ID = f(VDS)

.

Peak Pulsed Drain Current, IDM (A)

100

RDS(on) = VDS/ ID

10

1

0.1

0.01
1 10 100 1000

D.C.

Drain-Source Voltage, VDS (V)

tp = 10 us

100 us

1 ms

10 ms

100 ms

Fig.3. Safe operating area

ID & IDM = f(VDS); IDM single pulse; parameter t

p

Drain-Source On Resistance, RDS(on) (Ohms)

0.2

4.6V

0.18

0.16

0.14

0.12

0.1

0.08

0.06

0.04

0.02

Tj = 25 C

0

0123456

4.8V

Drain Current, ID (A)

5 V

5.2 V

5.4 V

6V

8 V

VGS = 10V

Fig.6. Typical on-state resistance, Tj = 25 ˚C

R

= f(ID)

DS(ON)

.

August 1999 3 Rev 1.000