Philips PHT11N06T Datasheet
Philips Semiconductors Product specification
TrenchMOS transistor PHT11N06T
Standard level FET
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT
logic level field-effect power
transistor in a plastic envelope V
suitable for surface mounting. I
DS
D
Using ’trench’ technology the Drain current (DC) T
device features very low P
on-state resistance and has T
integral zener diodes giving R
tot
j
DS(ON)
ESDprotection.Itisintendedfor resistance VGS = 10 V
use in DC-DC converters and
general purpose switching
applications.
PINNING - SOT223 PIN CONFIGURATION SYMBOL
Drain-source voltage 55 V
Drain current (DC) Tsp = 25 ˚C 10.7 A
= 25 ˚C 4.9 A
amb
Total power dissipation 8.3 W
Junction temperature 150 ˚C
Drain-source on-state 40 mΩ
PIN DESCRIPTION
4
d
1 gate
2 drain
3 source
4 drain (tab)
1
23
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
V
±V
I
D
I
D
I
DM
P
T
DS
DGR
tot
stg
GS
, T
j
Drain-source voltage - - 55 V
Drain-gate voltage RGS = 20 kΩ -55V
Gate-source voltage - - 20 V
Drain current (DC) Tsp = 25 ˚C - 10.7 A
T
= 25 ˚C - 4.9 A
amb
Drain current (DC) Tsp = 100 ˚C - 7.5 A
T
= 100 ˚C - 3.4 A
amb
Drain current (pulse peak value) Tsp = 25 ˚C - 42 A
T
= 25 ˚C - 19 A
amb
Total power dissipation Tsp = 25 ˚C - 8.3 W
T
= 25 ˚C - 1.8 W
amb
Storage & operating temperature - - 55 150 ˚C
ESD LIMITING VALUE
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
C
December 1997 1 Rev 1.100
Electrostatic discharge capacitor Human body model - 2 kV
voltage (100 pF, 1.5 kΩ)
Philips Semiconductors Product specification
TrenchMOS transistor PHT11N06T
Standard level FET
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT
R
th j-sp
R
th j-amb
STATIC CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
GS(TO)
I
DSS
I
GSS
±V
(BR)GSS
R
DS(ON)
From junction to solder point Mounted on any PCB 12 15 K/W
From junction to ambient Mounted on PCB of Fig.19 - 70 K/W
Drain-source breakdown VGS = 0 V; ID = 0.25 mA 55 - - V
voltage Tj = -55˚C 50 - - V
Gate threshold voltage VDS = VGS; ID = 1 mA 2.0 3.0 4.0 V
Tj = 150˚C 1.2 - - V
Tj = -55˚C - - 4.4 V
Zero gate voltage drain current VDS = 55 V; VGS = 0 V; - 0.05 10 µA
Tj = 150˚C - - 100 µA
Gate source leakage current VGS = ±10 V - 0.04 1 µA
Tj = 150˚C - - 10 µA
Gate source breakdown voltage IG = ±1 mA 16 - - V
Drain-source on-state VGS = 10 V; ID = 5 A - 30 40 mΩ
resistance Tj = 150˚C - - 74 mΩ
DYNAMIC CHARACTERISTICS
Tmb = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
g
Q
Q
Q
C
C
C
t
t
t
t
fs
g(tot)
gs
gd
iss
oss
rss
d on
r
d off
f
Forward transconductance VDS = 25 V; ID = 5 A; Tj = 25˚C 3 12 - S
Total gate charge ID = 9 A; V
= 44 V; VGS = 10 V - 18 - nC
DD
Gate-source charge - 4.5 - nC
Gate-drain (Miller) charge - 10 - nC
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 700 880 pF
Output capacitance - 200 240 pF
Feedback capacitance - 100 140 pF
Turn-on delay time VDD = 30 V; ID = 9 A; - 15 23 ns
Turn-on rise time VGS = 10 V; Rg = 10 Ω - 5075ns
Turn-off delay time - 33 50 ns
Turn-off fall time Tj = 25˚C - 20 30 ns
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = -55 to 175˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
DR
I
DRM
V
t
rr
Q
SD
rr
Continuous reverse drain Tsp = 25˚C - - 10.7 A
current
Pulsed reverse drain current Tsp = 25˚C - - 40 A
Diode forward voltage IF = 5 A; VGS = 0 V - 0.85 1.1 V
Reverse recovery time IF = 5 A; -dIF/dt = 100 A/µs; - 45 - ns
Reverse recovery charge VGS = -10 V; VR = 30 V - 0.3 - µC
December 1997 2 Rev 1.100
Philips Semiconductors Product specification
TrenchMOS transistor PHT11N06T
Standard level FET
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
W
DSS
Drain-source non-repetitive ID = 3.6 A; VDD ≤ 25 V; - - 60 mJ
unclamped inductive turn-off VGS = 10 V; RGS = 50 Ω; Tsp = 25 ˚C
energy
December 1997 3 Rev 1.100
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