Philips Semiconductors Product specification
PowerMOS transistor PHP5N20E
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT
field-effect power transistor in a
plastic envelope featuring high V
avalanche energy capability, stable I
blocking voltage, fast switching and P
high thermal cycling performance R
withlowthermalresistance.Intended
DS
D
tot
DS(ON)
for use in Switched Mode Power
Supplies (SMPS), motor control
circuits and general purpose
switching applications.
PINNING - TO220AB PIN CONFIGURATION SYMBOL
Drain-source voltage 200 V
Drain current (DC) 5.0 A
Total power dissipation 60 W
Drain-source on-state resistance 0.9 Ω
PIN DESCRIPTION
tab
d
1 gate
2 drain
3 source
tab drain
123
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
I
D
I
DM
P
D
∆PD/∆TmbLinear derating factor Tmb > 25 ˚C - 0.4 W/K
V
GS
E
AS
I
AS
Tj, T
Continuous drain current Tmb = 25 ˚C; VGS = 10 V - 5 A
Tmb = 100 ˚C; VGS = 10 V - 3.5 A
Pulsed drain current Tmb = 25 ˚C - 20 A
Total dissipation Tmb = 25 ˚C - 60 W
Gate-source voltage - ± 30 V
Single pulse avalanche VDD ≤ 50 V; starting Tj = 25˚C; RGS = 50 Ω; - 40 mJ
energy VGS = 10 V
Peak avalanche current VDD ≤ 50 V; starting Tj = 25˚C; RGS = 50 Ω;- 5 A
VGS = 10 V
Operating junction and - 55 175 ˚C
stg
storage temperature range
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R
th j-mb
R
th j-a
October 1997 1 Rev 1.100
Thermal resistance junction to - - 2.5 K/W
mounting base
Thermal resistance junction to - 60 - K/W
ambient
Philips Semiconductors Product specification
PowerMOS transistor PHP5N20E
ELECTRICAL CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
∆V
∆T
R
DS(ON)
V
GS(TO)
g
fs
I
DSS
I
GSS
Q
g(tot)
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
d
L
d
L
s
C
iss
C
oss
C
rss
(BR)DSS
j
Drain-source breakdown VGS = 0 V; ID = 0.25 mA 200 - - V
voltage
/ Drain-source breakdown VDS = VGS; ID = 0.25 mA - 0.25 - V/K
voltage temperature coefficient
Drain-source on resistance VGS = 10 V; ID = 2.5 A - 0.68 0.9 Ω
Gate threshold voltage VDS = VGS; ID = 0.25 mA 2.0 3.0 4.0 V
Forward transconductance VDS = 50 V; ID = 2.5 A 1.5 3.5 - S
Drain-source leakage current VDS = 200 V; VGS = 0 V - 0.1 25 µA
VDS = 160 V; VGS = 0 V; Tj = 150 ˚C - 1 250 µA
Gate-source leakage current VGS = ±30 V; VDS = 0 V - 10 100 nA
Total gate charge ID = 4.8 A; V
Gate-source charge - 2 3 nC
= 160 V; VGS = 10 V - 11 15 nC
DD
Gate-drain (Miller) charge - 5.3 7 nC
Turn-on delay time VDD = 100 V; ID = 4.8 A; - 7 - ns
Turn-on rise time RG = 18 Ω; RD = 20 Ω -29-ns
Turn-off delay time - 27 - ns
Turn-off fall time - 22 - ns
Internal drain inductance Measured from contact screw on - 3.5 - nH
tab to centre of die
Internal drain inductance Measured from drain lead 6 mm - 4.5 - nH
from package to centre of die
Internal source inductance Measured from source lead 6 mm - 7.5 - nH
from package to source bond pad
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 300 - pF
Output capacitance - 60 - pF
Feedback capacitance - 20 - pF
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous source current Tmb = 25˚C - - 5 A
(body diode)
Pulsed source current (body Tmb = 25˚C - - 20 A
diode)
Diode forward voltage IS = 5.2 A; VGS = 0 V - - 1.5 V
Reverse recovery time IS = 4.8 A; VGS = 0 V; - 114 - ns
dI/dt = 100 A/µs
Reverse recovery charge - 0.8 - µC
October 1997 2 Rev 1.100
Philips Semiconductors Product specification
PowerMOS transistor PHP5N20E
PD%
120
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
Normalised Power Derating
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
ID%
120
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
Tmb / C
= f(Tmb)
D 25 ˚C
Normalised Current Derating
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
= f(Tmb); conditions: VGS ≥ 10 V
D 25 ˚C
1E+01
1E+00
Zth j-mb / (K/W)
0.5
BUKX52
0.2
0.1
1E-01
0.05
0.02
t
p
P
D
D =
0
1E-02
1E-07 1E-05 1E-03 1E-01 1E+01
t / s
T
Fig.4. Transient thermal impedance.
Z
= f(t); parameter D = tp/T
th j-mb
ID, Drain current (Amps)
10
Tj = 25 C
8
6
4
2
0
0 5 10 15 20 25 30
VDS, Drain-Source voltage (Volts)
10 V
7 V
VGS = 4.5 V
Fig.5. Typical output characteristics
ID = f(VDS); parameter V
GS
p
t
T
t
PHP5N20
6 V
5.5 V
5 V
.
ID, Drain current (Amps)
100
10
RDS(ON) = VDS/ID
1
0.1
1 10 100 1000
VDS, Drain-source voltage (Volts)
DC
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter t
PHP5N20E
tp = 10 us
100 us
1 ms
10 ms
100 ms
RDS(on), Drain-Source on resistance (Ohms)
3
2.5
2
1.5
1
0.5
Tj = 25 C
0
0246810
4.5 V
5 V
ID, Drain current (Amps)
5.5 V
Fig.6. Typical on-state resistance
R
p
= f(ID); parameter V
DS(ON)
PHP5N20
6 V
7 V
VGS = 10 V
.
GS
October 1997 3 Rev 1.100
Philips Semiconductors Product specification
PowerMOS transistor PHP5N20E
ID, Drain current (Amps)
12
VDS = 30 V
10
8
6
4
2
0
0246810
VGS, Gate-source voltage (Volts)
PHP5N20E
Tj = 25 C
Tj = 175 C
Fig.7. Typical transfer characteristics.
ID = f(VGS); parameter T
gfs, Transconductance (S)
5
VDD = 30 V
4
3
2
Tj = 175 C
j
PHP5N20E
Tj = 25 C
VGS(TO) / V
4
3
2
1
0
-60 -20 20 60 100 140 180
max.
typ.
min.
Tj / C
Fig.10. Gate threshold voltage
V
= f(Tj); conditions: ID = 0.25 mA; VDS = V
GS(TO)
1E-01
1E-02
1E-03
1E-04
ID / A
SUB-THRESHOLD CONDUCTION
2 %
typ
.
GS
98 %
1
0
024681012
Fig.8. Typical transconductance
a
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
-60 -20 20 60 100 140 180
ID, Drain current (Amps)
gfs = f(ID); parameter T
Normalised RDS(ON) = f(Tj)
Tj / C
.
j
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)/RDS(ON)25 ˚C
= f(Tj); ID = 2.5 A; VGS = 10 V
1E-05
1E-06
0 1 2 3 4
VGS / V
Fig.11. Sub-threshold drain current.
ID = f(V
1000
100
10
1
1 10 100 1000
Fig.12. Typical capacitances, C
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
; conditions: Tj = 25 ˚C; VDS = V
GS)
Ciss, Coss, Crss, Junction capacitances (pF)
Ciss
Coss
Crss
VDS, Drain-source voltage (Volts)
PHP5N20E
, C
iss
oss
, C
GS
rss
.
October 1997 4 Rev 1.100
Philips Semiconductors Product specification
PowerMOS transistor PHP5N20E
VGS, Gate-Source voltage (Volts)
15
ID = 4.8 A
Tj = 25 C
10
5
0
0 5 10 15 20
VDS = 40 V
100 V
Qg, Gate charge (nC)
PHP5N20E
160 V
Fig.13. Typical turn-on gate-charge characteristics.
V
= f(QG); parameter V
GS
Switching times (ns)
100
tr
td(off)
tf
10
td(on)
1
0 20406080100
RG, Gate resistance (Ohms)
Fig.14. Typical switching times
t
d(on)
, tr, t
, tf = f(RG)
d(off)
DS
PHP5N20E
VDD = 100 V
VGS = 10 V
RD = 20 Ohms
ID = 4.8 A
Tj = 25 C
.
IF, Source-drain diode current (Amps)
20
VGS = 0 V
15
Tj = 175 C
10
5
0
0 0.5 1 1.5
VSDS, Source-drain voltage (Volts)
PHP5N20E
Tj = 25 C
Fig.16. Source-Drain diode characteristic.
IF = f(V
EAS, Normalised unclamped inductive energy (%)
120
110
100
90
80
70
60
50
40
30
20
10
0
20 40 60 80 100 120 140 160 180
); parameter T
SDS
Starting Tj ( C)
j
Fig.17. Normalised unclamped inductive energy.
EAS% = f(Tj)
Normalised Drain-source breakdown voltage
1.15
V(BR)DSS @ Tj
V(BR)DSS @ 25 C
1.1
1.05
1
0.95
0.9
0.85
-100 -50 0 50 100 150
Tj, Junction temperature (C)
Fig.15. Normalised drain-source breakdown voltage
V
(BR)DSS/V(BR)DSS 25 ˚C
= f(Tj)
L
VDS
VGS
0
RGS
.
Fig.18. Unclamped inductive test circuit.
EAS= 0.5⋅LI
2
⋅V
D
(BR)DSS
T.U.T.
/(V
(BR)DSS−VDD
R 01
shunt
VDD
+
-
-ID/100
)
October 1997 5 Rev 1.100
Philips Semiconductors Product specification
PowerMOS transistor PHP5N20E
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
10,3
max
1,3
3,7
4,5
max
3,0 max
not tinned
1,3
max
(2x)
123
2,54 2,54
2,8
3,0
13,5
min
0,9 max (3x)
5,9
min
15,8
max
0,6
2,4
Fig.19. SOT78 (TO220AB); pin 2 connected to mounting base.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for SOT78 (TO220) envelopes.
3. Epoxy meets UL94 V0 at 1/8".
October 1997 6 Rev 1.100
Philips Semiconductors Product specification
PowerMOS transistor PHP5N20E
DEFINITIONS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1998
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
October 1997 7 Rev 1.100
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